From a8c87c0804dd9b6365ee6f7ae692b3fe422f5af1 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Wed, 28 Nov 2018 15:11:19 +0100 Subject: [PATCH] STM32F429/STM32F439 alignment --- .../TARGET_NUCLEO_F439ZI/LICENSE | 49 ++++++++++ ...nucleo_f439zi-block_device-sotp-v3_4_0.bin | Bin 0 -> 32020 bytes .../TARGET_NUCLEO_F439ZI/mbed_lib.json | 10 ++ .../TARGET_DISCO_F429ZI/system_clock.c | 13 ++- .../TARGET_NUCLEO_F429ZI/system_clock.c | 13 ++- .../TOOLCHAIN_ARM_STD/startup_stm32f429xx.S | 6 -- .../device/TOOLCHAIN_ARM_STD/stm32f429xx.sct | 7 +- .../device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld | 87 ++++++------------ .../TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S | 24 +++-- .../TOOLCHAIN_IAR/startup_stm32f429xx.S | 12 +-- .../TOOLCHAIN_IAR/stm32f429xx_flash.icf | 8 +- .../TARGET_NUCLEO_F439ZI/PinNames.h | 2 +- .../TARGET_NUCLEO_F439ZI/system_clock.c | 24 ++--- .../device/TOOLCHAIN_ARM_STD/stm32f439xx.sct | 2 +- .../device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld | 2 +- .../TOOLCHAIN_GCC_ARM/startup_stm32f439xx.S | 6 -- .../TARGET_STM32F439xI/device/flash_data.h | 2 +- .../TARGET_STM32F4/device/stm32f4xx_hal.c | 3 - .../TARGET_STM/TARGET_STM32F4/hal_init_pre.c | 28 ------ targets/targets.json | 6 +- 20 files changed, 152 insertions(+), 152 deletions(-) create mode 100644 features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/LICENSE create mode 100644 features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/mbed-bootloader-nucleo_f439zi-block_device-sotp-v3_4_0.bin create mode 100644 features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/mbed_lib.json delete mode 100644 targets/TARGET_STM/TARGET_STM32F4/hal_init_pre.c diff --git a/features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/LICENSE b/features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/LICENSE new file mode 100644 index 0000000000..591ac29615 --- /dev/null +++ b/features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/LICENSE @@ -0,0 +1,49 @@ +Permissive Binary License + +Version 1.0, September 2015 + +Redistribution. Redistribution and use in binary form, without +modification, are permitted provided that the following conditions are +met: + +1) Redistributions must reproduce the above copyright notice and the + following disclaimer in the documentation and/or other materials + provided with the distribution. + +2) Unless to the extent explicitly permitted by law, no reverse + engineering, decompilation, or disassembly of this software is + permitted. + +3) Redistribution as part of a software development kit must include the + accompanying file named "DEPENDENCIES" and any dependencies listed in + that file. + +4) Neither the name of the copyright holder nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +Limited patent license. The copyright holders (and contributors) grant a +worldwide, non-exclusive, no-charge, royalty-free patent license to +make, have made, use, offer to sell, sell, import, and otherwise +transfer this software, where such license applies only to those patent +claims licensable by the copyright holders (and contributors) that are +necessarily infringed by this software. This patent license shall not +apply to any combinations that include this software. No hardware is +licensed hereunder. + +If you institute patent litigation against any entity (including a +cross-claim or counterclaim in a lawsuit) alleging that the software +itself infringes your patent(s), then your rights granted under this +license shall terminate as of the date such litigation is filed. + +DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND +CONTRIBUTORS "AS IS." ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT +NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED +TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. \ No newline at end of file diff --git a/features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/mbed-bootloader-nucleo_f439zi-block_device-sotp-v3_4_0.bin b/features/FEATURE_BOOTLOADER/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/mbed-bootloader-nucleo_f439zi-block_device-sotp-v3_4_0.bin new file mode 100644 index 0000000000000000000000000000000000000000..27b7049bc1f22b07644df546c05961308a0b8f20 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zZQ(owWJZg+X({J+HaqGq^<1-y^Ex@N6-8`;iie8X>~*@iI#MvX*9iKEzRBcnw78*b za_~FYO)WNivz;@!TunB!$!l{uL>}T5jNraN^#2szdp1|^w0Odm>NTPEu&0T0nHmL% z5iOKlqXQsK_4R<}iC2h>R+c?nQ@H5iN{gwUb6dR4Zc?1V)vfVbpvcr}D=Mm2a7$2y z4QmkFYR+W#+E!V(2B9$WuiGky4Fu+LI~(05dpHJlQ!`g*YrGb4U2{VNbky}?5Wi+e zON$Ey3T)P}7s0}fO(0$XT#IC~0?<}OA_!kwjSyt=PNKh4ek_mg3n$|d* zy|9KNN7EGTdA;Fec{pSOv=pH!igeQfGn{}T$7Q&27W}wHB3pPZjc%KF4QIAm%#ZLb^jb6a;P9d{ zYHAh*eS-l{6XhHaXR*7yYe-Ev{;z?fHWE1yL;%sOIj;?^>iRyvfQ@V5ZC-~`MXsp^ zBgfazL{sCcH+d})9M^Ubva4W7bbQ`yn@?n3r!$?+#D{88;kSC;%|0M_d2IXK!mIHMje|Y z;)FvxBie(pjw&Q`lmA|K&4(!|3A@!IPwcKQ-Uv z_X9zmZpC@9F|5;W!?sm8ue}rA#-=fHdRH&413@CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */ +#endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; @@ -79,6 +83,13 @@ void SystemInit(void) SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */ +#endif + } /** diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c index 02edcc0e60..88481e47e4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_NUCLEO_F429ZI/system_clock.c @@ -30,7 +30,7 @@ **/ #include "stm32f4xx.h" - +#include "nvic_addr.h" #include "mbed_error.h" // clock source is selected with CLOCK_SOURCE in json config @@ -56,6 +56,10 @@ uint8_t SetSysClock_PLL_HSI(void); */ void SystemInit(void) { + /* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */ +#endif /* Reset the RCC clock configuration to the default reset state ------------*/ /* Set HSION bit */ RCC->CR |= (uint32_t)0x00000001; @@ -79,6 +83,13 @@ void SystemInit(void) SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */ +#endif + } /** diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/startup_stm32f429xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/startup_stm32f429xx.S index 9362d09722..6e6104b04a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/startup_stm32f429xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/startup_stm32f429xx.S @@ -168,15 +168,9 @@ __Vectors_Size EQU __Vectors_End - __Vectors ; Reset handler Reset_Handler PROC EXPORT Reset_Handler [WEAK] - IMPORT SystemInitPre - IMPORT HAL_InitPre IMPORT SystemInit IMPORT __main - LDR R0, =SystemInitPre - BLX R0 - LDR R0, =HAL_InitPre - BLX R0 LDR R0, =SystemInit BLX R0 LDR R0, =__main diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct index 7dedde2cae..c40a1b035a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_STD/stm32f429xx.sct @@ -45,7 +45,7 @@ #define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) #define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; 2 MB FLASH (0x200000) + 192 KB SRAM (0x30000) +; 2 MB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000) LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address @@ -61,6 +61,9 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } - + + RW_IRAM2 (0x10000000) (0x10000) { ; RW data + .ANY (+RW +ZI) + } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld index e22e74708d..b3bb639dd7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/STM32F429xI.ld @@ -1,11 +1,3 @@ -M_VECTOR_RAM_SIZE = 0x400; - -/* With the RTOS in use, this does not affect the main stack size. The size of - * the stack where main runs is determined via the RTOS. */ -STACK_SIZE = 0x400; - -HEAP_SIZE = 0x6000; - #if !defined(MBED_APP_START) #define MBED_APP_START 0x08000000 #endif @@ -16,13 +8,13 @@ HEAP_SIZE = 0x6000; M_CRASH_DATA_RAM_SIZE = 0x100; -/* Specify the memory areas */ +/* Linker script to configure memory regions. */ +/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/ MEMORY -{ - VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x400 - FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400 - CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192k +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (rwx) : ORIGIN = 0x200001B0, LENGTH = 192k - (0x1AC+0x4) } /* Linker script to place sections and symbol values. Should be used together @@ -56,18 +48,10 @@ ENTRY(Reset_Handler) SECTIONS { - .isr_vector : - { - __vector_table = .; - KEEP(*(.isr_vector)) - . = ALIGN(8); - } > VECTORS - .text : { - + KEEP(*(.isr_vector)) *(.text*) - KEEP(*(.init)) KEEP(*(.fini)) @@ -96,7 +80,6 @@ SECTIONS } > FLASH __exidx_start = .; - .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) @@ -105,17 +88,6 @@ SECTIONS __etext = .; _sidata = .; - - .interrupts_ram : - { - . = ALIGN(8); - __VECTOR_RAM__ = .; - __interrupts_ram_start__ = .; /* Create a global symbol at data start */ - *(.m_interrupts_ram) /* This is a user defined section */ - . += M_VECTOR_RAM_SIZE; - . = ALIGN(8); - __interrupts_ram_end__ = .; /* Define a global symbol at data end */ - } > RAM .crash_data_ram : { @@ -127,12 +99,10 @@ SECTIONS . += M_CRASH_DATA_RAM_SIZE; . = ALIGN(8); __CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */ - } > RAM + } > RAM - .data : + .data : AT (__etext) { - PROVIDE( __etext = LOADADDR(.data) ); - __data_start__ = .; _sdata = .; *(vtable) @@ -165,23 +135,9 @@ SECTIONS __data_end__ = .; _edata = .; - } > RAM AT > FLASH - - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; } > RAM - .bss (NOLOAD): + .bss : { . = ALIGN(8); __bss_start__ = .; @@ -193,18 +149,29 @@ SECTIONS _ebss = .; } > RAM - .heap (NOLOAD): + .heap (COPY): { __end__ = .; end = __end__; - . += HEAP_SIZE; + *(.heap*) __HeapLimit = .; } > RAM + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); - __stack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; - - ASSERT(__StackLimit >= __HeapLimit, "Region RAM overflowed with stack and heap") + _estack = __StackTop; + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S index f0b0be02d4..d43725c822 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f429xx.S @@ -74,10 +74,10 @@ defined in linker script */ .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function -Reset_Handler: - ldr sp, =__stack /* set stack pointer */ - -/* Copy the data segment initializers from flash to SRAM */ +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -106,8 +106,6 @@ LoopFillZerobss: bcc FillZerobss /* Call the clock system intitialization function.*/ - bl SystemInitPre - bl HAL_InitPre bl SystemInit /* Call static constructors */ //bl __libc_init_array @@ -142,10 +140,10 @@ Infinite_Loop: *******************************************************************************/ .section .isr_vector,"a",%progbits .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - -g_pfnVectors: - .word __stack + .size g_pfnVectors, .-g_pfnVectors + + g_pfnVectors: + .word _estack .word Reset_Handler .word NMI_Handler @@ -212,7 +210,7 @@ g_pfnVectors: .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FMC_IRQHandler /* FMC */ + .word FMC_IRQHandler /* FMC */ .word SDIO_IRQHandler /* SDIO */ .word TIM5_IRQHandler /* TIM5 */ .word SPI3_IRQHandler /* SPI3 */ @@ -252,8 +250,8 @@ g_pfnVectors: .word SPI5_IRQHandler /* SPI5 */ .word SPI6_IRQHandler /* SPI6 */ .word SAI1_IRQHandler /* SAI1 */ - .word LTDC_IRQHandler /* LTDC_IRQHandler */ - .word LTDC_ER_IRQHandler /* LTDC_ER_IRQHandler */ + .word LTDC_IRQHandler /* LTDC */ + .word LTDC_ER_IRQHandler /* LTDC error */ .word DMA2D_IRQHandler /* DMA2D */ /******************************************************************************* diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/startup_stm32f429xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/startup_stm32f429xx.S index 85bc4368bc..339ddc9656 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/startup_stm32f429xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/startup_stm32f429xx.S @@ -61,8 +61,6 @@ SECTION .intvec:CODE:NOROOT(2) EXTERN __iar_program_start - EXTERN SystemInitPre - EXTERN HAL_InitPre EXTERN SystemInit PUBLIC __vector_table @@ -188,10 +186,6 @@ __vector_table SECTION .text:CODE:REORDER:NOROOT(2) Reset_Handler - LDR R0, =SystemInitPre - BLX R0 - LDR R0, =HAL_InitPre - BLX R0 LDR R0, =SystemInit BLX R0 LDR R0, =__iar_program_start @@ -648,13 +642,13 @@ FPU_IRQHandler B FPU_IRQHandler PUBWEAK UART7_IRQHandler - SECTION .text:CODE:REORDER:NOROOT(1) + SECTION .text:CODE:REORDER:NOROOT(1) UART7_IRQHandler B UART7_IRQHandler PUBWEAK UART8_IRQHandler SECTION .text:CODE:REORDER:NOROOT(1) -UART8_IRQHandler +UART8_IRQHandler B UART8_IRQHandler PUBWEAK SPI4_IRQHandler @@ -664,7 +658,7 @@ SPI4_IRQHandler PUBWEAK SPI5_IRQHandler SECTION .text:CODE:REORDER:NOROOT(1) -SPI5_IRQHandler +SPI5_IRQHandler B SPI5_IRQHandler PUBWEAK SPI6_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf index 3dc9c9aca3..f62d3892c6 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf @@ -17,16 +17,16 @@ define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; /*-Sizes-*/ -/*Heap 64K and stack 4K */ -define symbol __ICFEDIT_size_cstack__ = 0x1000; -define symbol __ICFEDIT_size_heap__ = 0x10000; +/*Heap 89kB and stack 1kB */ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x15C00; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; /* Define Crash Data Symbols */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h index 0b6a7f8103..ad1011aebe 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/PinNames.h @@ -259,7 +259,7 @@ typedef enum { LED2 = PB_7, // Blue LED3 = PB_14, // Red LED4 = PB_0, - LED_RED = LED2, + LED_RED = LED3, USER_BUTTON = PC_13, // Standardized button names BUTTON1 = USER_BUTTON, diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c index bbc9a292ed..88481e47e4 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_NUCLEO_F439ZI/system_clock.c @@ -17,20 +17,15 @@ /** * This file configures the system clock as follows: *----------------------------------------------------------------------------------- - * System clock source | 1- USE_PLL_HSE_EXTC (CLOCK_SOURCE_USB=1) | 3- USE_PLL_HSI (CLOCK_SOURCE_USB=1) - * | (external 8 MHz clock) | (internal 16 MHz clock) - * | 2- USE_PLL_HSE_XTAL | - * | (external 8 MHz xtal) | + * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) | + * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal) | CLOCK_SOURCE_USB=1 + * | 3- USE_PLL_HSI (internal 16 MHz clock) | *----------------------------------------------------------------------------------- - * SYSCLK(MHz) | 180 (168) - *----------------------------------------------------------------------------------- - * AHBCLK (MHz) | 180 (168) - *----------------------------------------------------------------------------------- - * APB1CLK (MHz) | 45 (42) - *----------------------------------------------------------------------------------- - * APB2CLK (MHz) | 90 (84) - *----------------------------------------------------------------------------------- - * USB capable (48 MHz) | YES (HSI calibration needed) + * SYSCLK(MHz) | 180 | 168 + * AHBCLK (MHz) | 180 | 168 + * APB1CLK (MHz) | 45 | 42 + * APB2CLK (MHz) | 90 | 84 + * USB capable (48 MHz) | NO | YES (HSI calibration needed) *----------------------------------------------------------------------------------- **/ @@ -40,7 +35,7 @@ // clock source is selected with CLOCK_SOURCE in json config #define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) -#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) +#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) #define USE_PLL_HSI 0x2 // Use HSI internal clock #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) @@ -51,6 +46,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass); uint8_t SetSysClock_PLL_HSI(void); #endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ + /** * @brief Setup the microcontroller system * Initialize the FPU setting, vector table location and External memory diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct index 0ca3edf060..c40a1b035a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct @@ -57,7 +57,7 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 107 vectors = 428 bytes(0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM + ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data .ANY (+RW +ZI) } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld index fb42b7b72e..b3bb639dd7 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld @@ -21,7 +21,7 @@ MEMORY * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler - * + * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f439xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f439xx.S index e773cef9e9..78d2e6e189 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f439xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f439xx.S @@ -254,8 +254,6 @@ Infinite_Loop: .word LTDC_ER_IRQHandler /* LTDC error */ .word DMA2D_IRQHandler /* DMA2D */ - - /******************************************************************************* * * Provide weak aliases for each Exception handler to the Default_Handler. @@ -567,7 +565,3 @@ Infinite_Loop: - - - - diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h index 2248d9f774..daa6e974b9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/flash_data.h @@ -38,7 +38,7 @@ /* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/ -/* Flash Size */ +/* FLASH SIZE */ #define FLASH_SIZE (uint32_t) 0x200000 /* Base address of the Flash sectors Bank 1 */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c index 534c6852d6..bf966f9a2b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal.c @@ -186,10 +186,7 @@ HAL_StatusTypeDef HAL_Init(void) #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ -/* MBED : moved to HAL_InitPre() */ -#if !defined (TARGET_STM32F429xI) HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); -#endif /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); diff --git a/targets/TARGET_STM/TARGET_STM32F4/hal_init_pre.c b/targets/TARGET_STM/TARGET_STM32F4/hal_init_pre.c deleted file mode 100644 index 59380cfa96..0000000000 --- a/targets/TARGET_STM/TARGET_STM32F4/hal_init_pre.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2015-2015, ARM Limited, All Rights Reserved - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "stm32f4xx_hal.h" - -HAL_StatusTypeDef HAL_InitPre(void); - -HAL_StatusTypeDef HAL_InitPre(void) -{ - /* Set Interrupt Group Priority */ - HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); - - /* Return function status */ - return HAL_OK; -} diff --git a/targets/targets.json b/targets/targets.json index 060170f24d..432ae6e061 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2603,7 +2603,10 @@ "STM32F429xI", "STM_EMAC" ], - "macros_add": ["USB_STM_HAL", "USBHOST_OTHER"], + "macros_add": [ + "USB_STM_HAL", + "USBHOST_OTHER" + ], "device_has_add": [ "ANALOGOUT", "CAN", @@ -2660,6 +2663,7 @@ "ANALOGOUT", "CAN", "EMAC", + "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH",