Decrease heap size in IAR linker so tests compile and use SRAM2 for IAR and GCC

pull/7304/head
Leon Lindenfelser 2018-09-24 13:21:11 -05:00
parent 5ff0eb9d92
commit a80b2369c3
3 changed files with 16 additions and 12 deletions

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@ -139,24 +139,28 @@ SECTIONS
__end__ = .; __end__ = .;
end = __end__; end = __end__;
*(.heap*) *(.heap*)
. += (ORIGIN(SRAM1) + LENGTH(SRAM1) - .);
__HeapLimit = .; __HeapLimit = .;
} > SRAM1 } > SRAM1
PROVIDE(__heap_size = SIZEOF(.heap));
PROVIDE(__mbed_sbrk_start = ADDR(.heap));
PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));
/* Check if data + heap exceeds RAM1 limit */
ASSERT((ORIGIN(SRAM1)+LENGTH(SRAM1)) >= __HeapLimit, "SRAM1 overflow")
/* .stack_dummy section doesn't contains any symbols. It is only /* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign * used for linker to calculate size of stack sections, and assign
* values to stack symbols later */ * values to stack symbols later */
.stack_dummy (COPY): .stack_dummy (COPY):
{ {
*(.stack*) *(.stack*)
} > SRAM1 } > SRAM2
/* Set stack top to end of RAM, and stack limit move down by /* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(SRAM1) + LENGTH(SRAM1); __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - SIZEOF(.stack_dummy); __StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);
/* Check if stack exceeds RAM2 limit */
/* Check if data + heap + stack exceeds RAM limit */ ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow")
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
} }

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@ -21,12 +21,11 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Stack 1/8 and Heap 1/4 of RAM */ /* Stack complete SRAM2 and Heap 1/3 of SRAM1 */
define symbol __size_cstack__ = 0x8000; define symbol __size_cstack__ = 0x7e00;
define symbol __size_heap__ = 0xa000; define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { }; define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { }; define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite }; initialize by copy with packing = zeros { readwrite };
do not initialize { section .noinit }; do not initialize { section .noinit };
@ -34,5 +33,5 @@ do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in SRAM1_region { readwrite, block STACKHEAP }; place in SRAM1_region { readwrite, block HEAP };
place in SRAM2_region { }; place in SRAM2_region { block CSTACK };

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@ -2257,6 +2257,7 @@
"macro_name": "MODEM_ON_BOARD_UART" "macro_name": "MODEM_ON_BOARD_UART"
} }
}, },
"macros_add": ["TWO_RAM_REGIONS"],
"detect_code": ["0312"], "detect_code": ["0312"],
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], "device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
"release_versions": ["2", "5"], "release_versions": ["2", "5"],