From a7248c3ad8bd9b0ddde2e0ba8f795316d371ef6e Mon Sep 17 00:00:00 2001 From: TsungtaWu Date: Fri, 9 Sep 2016 17:45:08 +0800 Subject: [PATCH] DELTA_DFBM_NQ620 platform porting DELTA_DFBM_NQ620 inherit to MCU_NRF52 HW config is the same with NRF52_DK Only change on serial pin config in PinNames.h --- hal/targets.json | 28 +++ .../TARGET_DELTA_DFBM_NQ620/PinNames.h | 202 ++++++++++++++++++ .../TARGET_DELTA_DFBM_NQ620/device.h | 38 ++++ 3 files changed, 268 insertions(+) create mode 100644 hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h create mode 100644 hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/device.h diff --git a/hal/targets.json b/hal/targets.json index 15a8722b9e..179c5505f5 100644 --- a/hal/targets.json +++ b/hal/targets.json @@ -2014,6 +2014,34 @@ "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], "release_versions": ["2", "5"] }, + "DELTA_DFBM_NQ620": { + "supported_form_factors": ["ARDUINO"], + "inherits": ["MCU_NRF52"], + "progen": {"target": "dfbm-nq620"}, + "macros_add": [ + "BOARD_PCA10040", + "NRF52_PAN_12", + "NRF52_PAN_15", + "NRF52_PAN_58", + "NRF52_PAN_55", + "NRF52_PAN_54", + "NRF52_PAN_31", + "NRF52_PAN_30", + "NRF52_PAN_51", + "NRF52_PAN_36", + "NRF52_PAN_53", + "S132", + "CONFIG_GPIO_AS_PINRESET", + "BLE_STACK_SUPPORT_REQD", + "SWI_DISABLE0", + "NRF52_PAN_20", + "NRF52_PAN_64", + "NRF52_PAN_62", + "NRF52_PAN_63" + ], + "device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"], + "release_versions": ["2", "5"] + }, "BLUEPILL_F103C8": { "core": "Cortex-M3", "default_toolchain": "GCC_ARM", diff --git a/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h b/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h new file mode 100644 index 0000000000..c9cb931707 --- /dev/null +++ b/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/PinNames.h @@ -0,0 +1,202 @@ +/* + * Copyright (c) 2016 Nordic Semiconductor ASA + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA + * integrated circuit in a product or a software update for such product, must reproduce + * the above copyright notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be + * used to endorse or promote products derived from this software without specific prior + * written permission. + * + * 4. This software, with or without modification, must only be used with a + * Nordic Semiconductor ASA integrated circuit. + * + * 5. Any software provided in binary or object form under this license must not be reverse + * engineered, decompiled, modified and/or disassembled. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + PIN_INPUT, + PIN_OUTPUT +} PinDirection; + +#define PORT_SHIFT 3 + +typedef enum { + p0 = 0, + p1 = 1, + p2 = 2, + p3 = 3, + p4 = 4, + p5 = 5, + p6 = 6, + p7 = 7, + p8 = 8, + p9 = 9, + p10 = 10, + p11 = 11, + p12 = 12, + p13 = 13, + p14 = 14, + p15 = 15, + p16 = 16, + p17 = 17, + p18 = 18, + p19 = 19, + p20 = 20, + p21 = 21, + p22 = 22, + p23 = 23, + p24 = 24, + p25 = 25, + p26 = 26, + p27 = 27, + p28 = 28, + p29 = 29, + p30 = 30, + p31 = 31, + + P0_0 = p0, + P0_1 = p1, + P0_2 = p2, + P0_3 = p3, + P0_4 = p4, + P0_5 = p5, + P0_6 = p6, + P0_7 = p7, + + P0_8 = p8, + P0_9 = p9, + P0_10 = p10, + P0_11 = p11, + P0_12 = p12, + P0_13 = p13, + P0_14 = p14, + P0_15 = p15, + + P0_16 = p16, + P0_17 = p17, + P0_18 = p18, + P0_19 = p19, + P0_20 = p20, + P0_21 = p21, + P0_22 = p22, + P0_23 = p23, + + P0_24 = p24, + P0_25 = p25, + P0_26 = p26, + P0_27 = p27, + P0_28 = p28, + P0_29 = p29, + P0_30 = p30, + + LED1 = p17, + LED2 = p18, + LED3 = p19, + LED4 = p20, + + BUTTON1 = p13, + BUTTON2 = p14, + BUTTON3 = p15, + BUTTON4 = p16, + + RX_PIN_NUMBER = p11, + TX_PIN_NUMBER = p12, + CTS_PIN_NUMBER = p13, + RTS_PIN_NUMBER = p14, + + // mBed interface Pins + USBTX = TX_PIN_NUMBER, + USBRX = RX_PIN_NUMBER, + + SPI_PSELMOSI0 = p23, + SPI_PSELMISO0 = p24, + SPI_PSELSS0 = p22, + SPI_PSELSCK0 = p25, + + SPI_PSELMOSI1 = p12, + SPI_PSELMISO1 = p13, + SPI_PSELSS1 = p11, + SPI_PSELSCK1 = p14, + + SPIS_PSELMOSI = p12, + SPIS_PSELMISO = p13, + SPIS_PSELSS = p11, + SPIS_PSELSCK = p14, + + I2C_SDA0 = p26, + I2C_SCL0 = p27, + + D0 = p11, + D1 = p12, + D2 = p13, + D3 = p14, + D4 = p15, + D5 = p16, + D6 = p17, + D7 = p18, + + D8 = p19, + D9 = p20, + D10 = p22, + D11 = p23, + D12 = p24, + D13 = p25, + + D14 = p26, + D15 = p27, + + A0 = p3, + A1 = p4, + A2 = p28, + A3 = p29, + A4 = p30, + A5 = p31, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +typedef enum { + PullNone = 0, + PullDown = 1, + PullUp = 3, + PullDefault = PullUp +} PinMode; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/device.h b/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/device.h new file mode 100644 index 0000000000..2427e752ea --- /dev/null +++ b/hal/targets/hal/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/TARGET_DELTA_DFBM_NQ620/device.h @@ -0,0 +1,38 @@ +// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches. +// Check the 'features' section of the target description in 'targets.json' for more details. +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_DEVICE_H +#define MBED_DEVICE_H + + + + + + + + + + + + + + + + +#include "objects.h" + +#endif