mirror of https://github.com/ARMmbed/mbed-os.git
Add support of RTOS to LPC2460 platform
Dmitry Bogdanov
parent
8b42876484
commit
a523cb7da9
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@ -28,6 +28,7 @@ __abt_stack_top__ = __und_stack_top__ - UND_Stack_Size ;
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__fiq_stack_top__ = __abt_stack_top__ - ABT_Stack_Size ;
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__irq_stack_top__ = __fiq_stack_top__ - FIQ_Stack_Size ;
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__svc_stack_top__ = __irq_stack_top__ - IRQ_Stack_Size ;
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__usr_stack_top__ = __svc_stack_top__ - User_Stack_Size ;
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/* C-accessible symbols for memory address ranges: */
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__FLASH_segment_start__ = ORIGIN( Flash );
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@ -15,6 +15,8 @@
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.weak __mbed_dcc_irq
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.weak __mbed_reset
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.global __mbed_init_realmonitor
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.extern SVC_Handler
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.extern IRQ_Handler
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/* .global __mbed_init */
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@ -29,7 +31,8 @@ __mbed_prefetch_abort:
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__mbed_data_abort:
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LDR PC, =0x7fffffc0
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__mbed_irq:
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MSR CPSR_c, #0x1F|0x80|0x40
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B IRQ_Handler
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/* MSR CPSR_c, #0x1F|0x80|0x40
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STMDB sp!, {r0-r3,r12,lr}
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@ -47,13 +50,16 @@ __mbed_irq:
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MSR CPSR_c, #0x12|0x80|0x40
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SUBS pc, lr, #4
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*/
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__mbed_swi:
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STMFD sp!, {a4, r4, ip, lr}
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B SVC_Handler
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/* STMFD sp!, {a4, r4, ip, lr}
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LDR r4, =0x40000040
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LDR a4, =0x00940000
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LDR PC, =0x7ffff820
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*/
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__mbed_dcc_irq:
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LDMFD sp!,{r0-r3,r12,lr}
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@ -76,13 +82,24 @@ __mbed_dcc_irq:
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.global Reset_handler
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Reset_Handler:
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.extern __libc_init_array
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.extern SystemInit
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.extern SystemInit
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.extern software_init_hook
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LDR R0, =SystemInit
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MOV LR, PC
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MOV LR, PC
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BX R0
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/* if (software_init_hook) // give control to the RTOS
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software_init_hook(); // this will also call __libc_init_array
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*/
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LDR R0, =software_init_hook
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CMP R0, #0
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BEQ nortos
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ORR R0,R0,#1 /* set thumb address */
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BX R0
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/* else */
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nortos:
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LDR R0, =__libc_init_array
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MOV LR, PC
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MOV LR, PC
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BX R0
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MSR CPSR_c, #0x1F /* enable irq */
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@ -118,6 +135,8 @@ __mbed_reset:
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*/
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MSR CPSR_c, #0x1F|0x80|0x40
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MOV SP, R0
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MSR CPSR_c, #0x13|0x80|0x40 /* execute in Supervisor mode */
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/* Relocate .data section (Copy from ROM to RAM) */
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LDR R1, =__text_end__ /* _etext */
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@ -147,7 +166,7 @@ BSSIsEmpty:
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/* LDR R0, =__mbed_init_realmonitor
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MOV LR, PC
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BX R0
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/*
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*/
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/* Go to Reset_Handler */
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LDR R0, =Reset_Handler
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@ -9,16 +9,16 @@
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#define __ARM7_CORE_H__
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#include "vector_defns.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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//#include "cmsis_nvic.h"
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#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */
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#define __CM3_CMSIS_VERSION_SUB (0x20) /*!< [15:0] CMSIS HAL sub version */
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#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */
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#define __CORTEX_M (0x03) /*!< Cortex core */
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#define __CORTEX_M (0x00) /*!< Cortex core */
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/**
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* Lint configuration \n
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@ -203,7 +203,7 @@ static __INLINE void __enable_irq() {
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: "memory");
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}
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static __INLINE void __disable_irq() {
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static __INLINE uint32_t __disable_irq() {
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unsigned long old,temp;
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__asm__ __volatile__("mrs %0, cpsr\n"
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"orr %1, %0, #0xc0\n"
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@ -211,11 +211,34 @@ static __INLINE void __disable_irq() {
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: "=r" (old), "=r" (temp)
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:
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: "memory");
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// return (old & 0x80) == 0;
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return (old & 0x80) == 0;
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}
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static __INLINE void __NOP() { __ASM volatile ("nop"); }
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/** \brief Get Control Bits of Status Register
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This function returns the content of the Control Bits from the Program Status Register.
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\return Control Bits value
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*/
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__attribute__( ( always_inline ) ) static inline uint32_t __get_CONTROL(void)
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{
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uint32_t result;
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__asm__ __volatile__ ("MRS %0, CPSR \n"
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"AND %0,%0,#31" : "=r" (result) );
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return(result);
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}
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#define MODE_USER 0x10
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#define MODE_FIQ 0x11
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#define MODE_IRQ 0x12
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#define MODE_SUPERVISOR 0x13
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#define MODE_ABORT 0x17
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#define MODE_UNDEFINED 0x1B
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#define MODE_SYSTEM 0x1F
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#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/
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/* TASKING carm specific functions */
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@ -237,7 +260,7 @@ static __INLINE void __NOP() { __ASM volatile ("nop"); }
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* Enable a device specific interupt in the NVIC interrupt controller.
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* The interrupt number cannot be a negative value.
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*/
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static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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static __INLINE void NVIC_EnableIRQ(uint32_t IRQn)
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{
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NVIC->IntEnable = 1 << (uint32_t)IRQn;
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}
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@ -252,11 +275,55 @@ static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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* Disable a device specific interupt in the NVIC interrupt controller.
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* The interrupt number cannot be a negative value.
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*/
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static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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static __INLINE void NVIC_DisableIRQ(uint32_t IRQn)
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{
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NVIC->IntEnClr = 1 << (uint32_t)IRQn;
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}
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/**
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* @brief Pend Interrupt in NVIC Interrupt Controller
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*
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* @param IRQn_Type IRQn specifies the interrupt number
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* @return none
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*
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* Force software a device specific interupt in the NVIC interrupt controller.
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* The interrupt number cannot be a negative value.
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*/
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static __INLINE void NVIC_PendIRQ(uint32_t IRQn)
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{
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NVIC->SoftInt = 1 << (uint32_t)IRQn;
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}
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/**
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* @brief Unpend the interrupt in NVIC Interrupt Controller
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*
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* @param IRQn_Type IRQn is the positive number of the external interrupt
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* @return none
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*
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* Clear software device specific interupt in the NVIC interrupt controller.
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* The interrupt number cannot be a negative value.
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*/
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static __INLINE void NVIC_UnpendIRQ(uint32_t IRQn)
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{
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NVIC->SoftIntClr = 1 << (uint32_t)IRQn;
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}
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/**
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* @brief Is IRQ pending
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*
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* @param IRQn_Type IRQn is the positive number of the external interrupt
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* @return 0 if IRQ is not pending
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* 1 if IRQ is pending
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*
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* Returns software device specific interupt in the NVIC interrupt controller.
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* The interrupt number cannot be a negative value.
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*/
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static __INLINE uint32_t NVIC_Pending(uint32_t IRQn)
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{
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return (NVIC->SoftInt & (1 << (uint32_t)IRQn)) != 0;
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}
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static __INLINE uint32_t __get_IPSR(void)
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{
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unsigned i;
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@ -264,7 +331,7 @@ static __INLINE uint32_t __get_IPSR(void)
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for(i = 0; i < 32; i ++)
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if(NVIC->Address == NVIC->VectAddr[i])
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return i;
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return 1; // 1 is an invalid entry in the interrupt table on LPC2368
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return 1; // 1 is an invalid entry in the interrupt table on LPC2460
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}
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#ifdef __cplusplus
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@ -0,0 +1,301 @@
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/*----------------------------------------------------------------------------
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* RL-ARM - RTX
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*----------------------------------------------------------------------------
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* Name: HAL_CM0.C
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* Purpose: Hardware Abstraction Layer for Cortex-M0
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* Rev.: V4.60
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*----------------------------------------------------------------------------
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*
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* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
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* All rights reserved.
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* - Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*---------------------------------------------------------------------------*/
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#include "rt_TypeDef.h"
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#include "RTX_Conf.h"
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#include "rt_System.h"
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#include "rt_HAL_CM.h"
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#include "rt_Task.h"
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#include "rt_MemBox.h"
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/*----------------------------------------------------------------------------
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* Functions
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*---------------------------------------------------------------------------*/
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/*--------------------------- rt_set_PSP ------------------------------------*/
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__asm void rt_set_PSP (U32 stack) {
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MSR PSP,R0
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BX LR
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}
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/*--------------------------- rt_get_PSP ------------------------------------*/
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__asm U32 rt_get_PSP (void) {
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MRS R0,PSP
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BX LR
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}
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/*--------------------------- os_set_env ------------------------------------*/
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__asm void os_set_env (void) {
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/* Switch to Unprivileged/Privileged Thread mode, use PSP. */
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MOV R0,SP ; PSP = MSP
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MSR PSP,R0
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LDR R0,=__cpp(&os_flags)
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LDRB R0,[R0]
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LSLS R0,#31
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BNE PrivilegedE
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MOVS R0,#0x03 ; Unprivileged Thread mode, use PSP
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MSR CONTROL,R0
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BX LR
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PrivilegedE
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MOVS R0,#0x02 ; Privileged Thread mode, use PSP
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MSR CONTROL,R0
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BX LR
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ALIGN
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}
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/*--------------------------- _alloc_box ------------------------------------*/
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__asm void *_alloc_box (void *box_mem) {
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/* Function wrapper for Unprivileged/Privileged mode. */
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LDR R3,=__cpp(rt_alloc_box)
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MOV R12,R3
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MRS R3,IPSR
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LSLS R3,#24
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BNE PrivilegedA
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MRS R3,CONTROL
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LSLS R3,#31
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BEQ PrivilegedA
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SVC 0
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BX LR
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PrivilegedA
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BX R12
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ALIGN
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}
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/*--------------------------- _free_box -------------------------------------*/
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__asm int _free_box (void *box_mem, void *box) {
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/* Function wrapper for Unprivileged/Privileged mode. */
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LDR R3,=__cpp(rt_free_box)
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MOV R12,R3
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MRS R3,IPSR
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LSLS R3,#24
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BNE PrivilegedF
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MRS R3,CONTROL
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LSLS R3,#31
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BEQ PrivilegedF
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SVC 0
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BX LR
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PrivilegedF
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BX R12
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ALIGN
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}
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/*-------------------------- SVC_Handler ------------------------------------*/
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__asm void SVC_Handler (void) {
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PRESERVE8
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IMPORT SVC_Count
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IMPORT SVC_Table
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IMPORT rt_stk_check
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MRS R0,PSP ; Read PSP
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LDR R1,[R0,#24] ; Read Saved PC from Stack
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SUBS R1,R1,#2 ; Point to SVC Instruction
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LDRB R1,[R1] ; Load SVC Number
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CMP R1,#0
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BNE SVC_User ; User SVC Number > 0
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MOV LR,R4
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LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
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MOV R12,R4
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MOV R4,LR
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BLX R12 ; Call SVC Function
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MRS R3,PSP ; Read PSP
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STMIA R3!,{R0-R2} ; Store return values
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LDR R3,=__cpp(&os_tsk)
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LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
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CMP R1,R2
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BEQ SVC_Exit ; no task switch
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SUBS R3,#8
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CMP R1,#0 ; Runtask deleted?
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BEQ SVC_Next
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MRS R0,PSP ; Read PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
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STMIA R0!,{R4-R7} ; Save old context (R4-R7)
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MOV R4,R8
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MOV R5,R9
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MOV R6,R10
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MOV R7,R11
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STMIA R0!,{R4-R7} ; Save old context (R8-R11)
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PUSH {R2,R3}
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BL rt_stk_check ; Check for Stack overflow
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POP {R2,R3}
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SVC_Next
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STR R2,[R3] ; os_tsk.run = os_tsk.new
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LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
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ADDS R0,R0,#16 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
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MOV R8,R4
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MOV R9,R5
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MOV R10,R6
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MOV R11,R7
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MSR PSP,R0 ; Write PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
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SVC_Exit
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MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
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MVNS R0,R0
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BX R0 ; RETI to Thread Mode, use PSP
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/*------------------- User SVC ------------------------------*/
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SVC_User
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PUSH {R4,LR} ; Save Registers
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LDR R2,=SVC_Count
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LDR R2,[R2]
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CMP R1,R2
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BHI SVC_Done ; Overflow
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LDR R4,=SVC_Table-4
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LSLS R1,R1,#2
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LDR R4,[R4,R1] ; Load SVC Function Address
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MOV LR,R4
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LDMIA R0,{R0-R3,R4} ; Read R0-R3,R12 from stack
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MOV R12,R4
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BLX LR ; Call SVC Function
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MRS R4,PSP ; Read PSP
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STMIA R4!,{R0-R3} ; Function return values
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SVC_Done
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POP {R4,PC} ; RETI
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ALIGN
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}
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/*-------------------------- PendSV_Handler ---------------------------------*/
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__asm void PendSV_Handler (void) {
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PRESERVE8
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BL __cpp(rt_pop_req)
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Sys_Switch
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LDR R3,=__cpp(&os_tsk)
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LDMIA R3!,{R1,R2} ; os_tsk.run, os_tsk.new
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CMP R1,R2
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BEQ Sys_Exit ; no task switch
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SUBS R3,#8
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MRS R0,PSP ; Read PSP
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SUBS R0,R0,#32 ; Adjust Start Address
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STR R0,[R1,#TCB_TSTACK] ; Update os_tsk.run->tsk_stack
|
||||
STMIA R0!,{R4-R7} ; Save old context (R4-R7)
|
||||
MOV R4,R8
|
||||
MOV R5,R9
|
||||
MOV R6,R10
|
||||
MOV R7,R11
|
||||
STMIA R0!,{R4-R7} ; Save old context (R8-R11)
|
||||
|
||||
PUSH {R2,R3}
|
||||
BL rt_stk_check ; Check for Stack overflow
|
||||
POP {R2,R3}
|
||||
|
||||
STR R2,[R3] ; os_tsk.run = os_tsk.new
|
||||
|
||||
LDR R0,[R2,#TCB_TSTACK] ; os_tsk.new->tsk_stack
|
||||
ADDS R0,R0,#16 ; Adjust Start Address
|
||||
LDMIA R0!,{R4-R7} ; Restore new Context (R8-R11)
|
||||
MOV R8,R4
|
||||
MOV R9,R5
|
||||
MOV R10,R6
|
||||
MOV R11,R7
|
||||
MSR PSP,R0 ; Write PSP
|
||||
SUBS R0,R0,#32 ; Adjust Start Address
|
||||
LDMIA R0!,{R4-R7} ; Restore new Context (R4-R7)
|
||||
|
||||
Sys_Exit
|
||||
MOVS R0,#:NOT:0xFFFFFFFD ; Set EXC_RETURN value
|
||||
MVNS R0,R0
|
||||
BX R0 ; RETI to Thread Mode, use PSP
|
||||
|
||||
ALIGN
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------- SysTick_Handler --------------------------------*/
|
||||
|
||||
__asm void SysTick_Handler (void) {
|
||||
PRESERVE8
|
||||
|
||||
BL __cpp(rt_systick)
|
||||
B Sys_Switch
|
||||
|
||||
ALIGN
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------- OS_Tick_Handler --------------------------------*/
|
||||
|
||||
__asm void OS_Tick_Handler (void) {
|
||||
PRESERVE8
|
||||
|
||||
BL __cpp(os_tick_irqack)
|
||||
BL __cpp(rt_systick)
|
||||
B Sys_Switch
|
||||
|
||||
ALIGN
|
||||
}
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
;/*----------------------------------------------------------------------------
|
||||
; * RL-ARM - RTX
|
||||
; *----------------------------------------------------------------------------
|
||||
; * Name: SVC_TABLE.S
|
||||
; * Purpose: Pre-defined SVC Table for Cortex-M
|
||||
; * Rev.: V4.60
|
||||
; *----------------------------------------------------------------------------
|
||||
; *
|
||||
; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
; * All rights reserved.
|
||||
; * Redistribution and use in source and binary forms, with or without
|
||||
; * modification, are permitted provided that the following conditions are met:
|
||||
; * - Redistributions of source code must retain the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer.
|
||||
; * - Redistributions in binary form must reproduce the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer in the
|
||||
; * documentation and/or other materials provided with the distribution.
|
||||
; * - Neither the name of ARM nor the names of its contributors may be used
|
||||
; * to endorse or promote products derived from this software without
|
||||
; * specific prior written permission.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
; * POSSIBILITY OF SUCH DAMAGE.
|
||||
; *---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
AREA SVC_TABLE, CODE, READONLY
|
||||
|
||||
EXPORT SVC_Count
|
||||
|
||||
SVC_Cnt EQU (SVC_End-SVC_Table)/4
|
||||
SVC_Count DCD SVC_Cnt
|
||||
|
||||
; Import user SVC functions here.
|
||||
; IMPORT __SVC_1
|
||||
|
||||
EXPORT SVC_Table
|
||||
SVC_Table
|
||||
; Insert user SVC functions here. SVC 0 used by RTL Kernel.
|
||||
; DCD __SVC_1 ; user SVC function
|
||||
|
||||
SVC_End
|
||||
|
||||
END
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,342 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: HAL_CM0.S
|
||||
* Purpose: Hardware Abstraction Layer for Cortex-M0
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
.file "HAL_CM0.S"
|
||||
.syntax unified
|
||||
|
||||
.equ TCB_TSTACK, 36
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
.arm
|
||||
|
||||
.section ".text"
|
||||
.align 2
|
||||
|
||||
/*-------------------------- Save Context --------------------------------*/
|
||||
/* MUST be called the first */
|
||||
.macro SaveContext
|
||||
|
||||
/* Push R0 as we are going to use the register. */ \
|
||||
STMDB SP!, {R0}
|
||||
|
||||
/* Set R0 to SP(user) */
|
||||
STMDB SP,{SP}^
|
||||
NOP
|
||||
SUB SP, SP, #4
|
||||
LDMIA SP!,{R0}
|
||||
|
||||
/* Push the LR return address onto the user stack. */
|
||||
STMDB R0!, {LR}
|
||||
|
||||
/* Now we have saved LR we can use it instead of R0. */
|
||||
MOV LR, R0
|
||||
|
||||
/* Pop R0 so we can save it onto the system mode stack. */
|
||||
LDMIA SP!, {R0}
|
||||
|
||||
/* Push all the system mode registers onto the task stack. */
|
||||
STMDB LR,{R0-R12,LR}^ /* LR can not be changed because user's LR is used*/
|
||||
NOP /* pass 1 cycle before changing LR */
|
||||
SUB LR, LR, #14*4 /* change LR now -15 dwords (R0-R14)*/
|
||||
|
||||
/* Push the SPSR onto the task stack. */
|
||||
MRS R0, SPSR
|
||||
STMDB LR!, {R0}
|
||||
|
||||
/* Store the new top of stack for the task. */
|
||||
LDR R0,=os_tsk
|
||||
LDR R0, [R0] /* R0 = (tcb) os_tsk.run */
|
||||
STR LR, [R0, 36] /* tcb.tsk_stack = SP(user) */
|
||||
.endm
|
||||
|
||||
/*-------------------------- Restore Context --------------------------------*/
|
||||
.type RestoreContext, %function
|
||||
.global RestoreContext
|
||||
RestoreContext:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
/* Set the LR to the task stack. */
|
||||
LDR R0,=os_tsk
|
||||
LDR R1, [R0, 4] /* R1 = (tcb) os_tsk.new */
|
||||
STR R1, [R0] /* os_tsk.run = os_tsk_newk */
|
||||
LDR LR, [R1, 36] /* LR = tcb.tsk_stack */
|
||||
|
||||
/* Get the SPSR from the stack. */
|
||||
LDMFD LR!, {R0} /* SPSR */
|
||||
MSR SPSR, R0
|
||||
|
||||
/* Restore all system mode registers for the task. */
|
||||
LDMFD LR, {R0-R12,LR}^
|
||||
NOP
|
||||
|
||||
ADD LR, LR, 15*4 /* increase starck pointer */
|
||||
/* Set SP(user) to LR */
|
||||
STMDB SP!,{LR}
|
||||
LDMIA SP,{SP}^
|
||||
NOP
|
||||
ADD SP, SP, #4
|
||||
|
||||
/* Restore the return address. */
|
||||
LDR LR, [LR,#-4] /* last dword is task's PC register */
|
||||
|
||||
/* And return - correcting the offset in the LR to obtain the */
|
||||
/* correct address. */
|
||||
SUBS PC, LR, #4
|
||||
|
||||
/*-------------------------- End --------------------------------*/
|
||||
.fnend
|
||||
.size RestoreContext, .-RestoreContext
|
||||
|
||||
|
||||
|
||||
/*--------------------------- rt_set_PSP ------------------------------------*/
|
||||
|
||||
# void rt_set_PSP (U32 stack);
|
||||
|
||||
.type rt_set_PSP, %function
|
||||
.global rt_set_PSP
|
||||
rt_set_PSP:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
MOV SP,R0
|
||||
BX LR
|
||||
|
||||
.fnend
|
||||
.size rt_set_PSP, .-rt_set_PSP
|
||||
|
||||
|
||||
/*--------------------------- rt_get_PSP ------------------------------------*/
|
||||
|
||||
# U32 rt_get_PSP (void);
|
||||
|
||||
.type rt_get_PSP, %function
|
||||
.global rt_get_PSP
|
||||
rt_get_PSP:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
MOV R0,SP
|
||||
BX LR
|
||||
|
||||
.fnend
|
||||
.size rt_get_PSP, .-rt_get_PSP
|
||||
|
||||
|
||||
|
||||
/*--------------------------- _alloc_box ------------------------------------*/
|
||||
|
||||
# void *_alloc_box (void *box_mem);
|
||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
||||
|
||||
.type _alloc_box, %function
|
||||
.global _alloc_box
|
||||
_alloc_box:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
LDR R3,=rt_alloc_box
|
||||
MOV R12, R3
|
||||
MRS R3, CPSR
|
||||
AND R3, 0x1F
|
||||
CMP R3, 0x12 /* IRQ mode*/
|
||||
BNE PrivilegedA
|
||||
CMP R3, 0x1F /* System mode*/
|
||||
BNE PrivilegedA
|
||||
SVC 0
|
||||
BX LR
|
||||
PrivilegedA:
|
||||
BX R12
|
||||
|
||||
.fnend
|
||||
.size _alloc_box, .-_alloc_box
|
||||
|
||||
|
||||
/*--------------------------- _free_box -------------------------------------*/
|
||||
|
||||
# int _free_box (void *box_mem, void *box);
|
||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
||||
|
||||
.type _free_box, %function
|
||||
.global _free_box
|
||||
_free_box:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
LDR R3,=rt_free_box
|
||||
MOV R12, R3
|
||||
MRS R3, CPSR
|
||||
AND R3, 0x1F
|
||||
CMP R3, 0x12 /* IRQ mode*/
|
||||
BNE PrivilegedA
|
||||
CMP R3, 0x1F /* System mode*/
|
||||
BNE PrivilegedA
|
||||
SVC 0
|
||||
BX LR
|
||||
PrivilegedF:
|
||||
BX R12
|
||||
|
||||
.fnend
|
||||
.size _free_box, .-_free_box
|
||||
|
||||
|
||||
/*-------------------------- SVC_Handler ------------------------------------*/
|
||||
|
||||
# void SVC_Handler (void);
|
||||
|
||||
.type SVC_Handler, %function
|
||||
.global SVC_Handler
|
||||
SVC_Handler:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
/* Within an IRQ ISR the link register has an offset from the true return
|
||||
address, but an SWI ISR does not. Add the offset manually so the same
|
||||
ISR return code can be used in both cases. */
|
||||
|
||||
STMFD SP!, {R0,LR} /* Store registers. */
|
||||
ADD LR, LR, #4
|
||||
SaveContext
|
||||
MOV R11, LR /* Save Task Stack Pointer */
|
||||
LDMFD SP!, {R0,LR} /* Restore registers and return. */
|
||||
STMFD SP!, {R11} /* Save Task Stack Pointer */
|
||||
|
||||
LDR R5, [LR,#-4] /* Calculate address of SWI instruction and load it into r5. */
|
||||
BIC R5, R5,#0xff000000 /* Mask off top 8 bits of instruction to give SWI number. */
|
||||
|
||||
CMP R5, #0
|
||||
BNE SVC_User /* User SVC Number > 0 */
|
||||
MOV LR, PC /* set LR to return address */
|
||||
BX R12 /* Call SVC Function */
|
||||
STMFD SP!, {R0-R3} /* Store return values */
|
||||
|
||||
LDR R3, =os_tsk
|
||||
LDMIA R3!, {R1,R2} /* os_tsk.run, os_tsk.new */
|
||||
CMP R1,0
|
||||
LDMFD SP!, {R0-R3} /* Restore return values */
|
||||
LDMFD SP!, {R11} /* Load Task Stack Pointer */
|
||||
BEQ SVC_Exit /* no need in return values */
|
||||
|
||||
ADD R11, 4 /* Offset to R0 in the Task Stack */
|
||||
STMDB R11, {R0-R3} /* Save return values in the Task Stack */
|
||||
SVC_Exit:
|
||||
B RestoreContext /* return to the task */
|
||||
|
||||
/*------------------- User SVC ------------------------------*/
|
||||
|
||||
SVC_User:
|
||||
LDR R6,=SVC_Count
|
||||
LDR R6,[R6]
|
||||
CMP R5,R6
|
||||
LDMFDHI SP!, {R11}
|
||||
BHI SVC_Done /* Overflow */
|
||||
|
||||
LDR R4,=SVC_Table - 4
|
||||
LSLS R5,R5,#2
|
||||
LDR R4,[R4,R5] /* Load SVC Function Address */
|
||||
/* R0-R3,R12 are unchanged */
|
||||
MOV LR, PC /* set LR to return address */
|
||||
BX R4 /* Call SVC Function */
|
||||
|
||||
LDMFD SP!, {R11} /* Load Task Stack Pointer */
|
||||
BEQ SVC_Exit /* no need in return values */
|
||||
|
||||
STMDB R11, {R0-R3} /* Save return values in the Task Stack */
|
||||
SVC_Done:
|
||||
B RestoreContext /* return to the task */
|
||||
|
||||
.fnend
|
||||
.size SVC_Handler, .-SVC_Handler
|
||||
|
||||
|
||||
/*-------------------------- IRQ_Handler ---------------------------------*/
|
||||
|
||||
# void IRQ_Handler (void);
|
||||
|
||||
.type IRQ_Handler, %function
|
||||
.global IRQ_Handler
|
||||
IRQ_Handler:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
SaveContext
|
||||
|
||||
MOV R0, #0xFFFFFF00
|
||||
LDR R0, [R0] /* Load address of raised IRQ handler*/
|
||||
|
||||
MOV LR, PC
|
||||
BX R0
|
||||
|
||||
MOV R0, #0xFFFFFF00
|
||||
STR R0, [R0] /* Clear interrupt */
|
||||
|
||||
B RestoreContext
|
||||
|
||||
.fnend
|
||||
.size IRQ_Handler, .-IRQ_Handler
|
||||
|
||||
/*-------------------------- PendSV_Handler ---------------------------------*/
|
||||
PendSV_Handler:
|
||||
BL rt_pop_req
|
||||
B RestoreContext
|
||||
|
||||
|
||||
/*-------------------------- SysTick_Handler --------------------------------*/
|
||||
|
||||
# void SysTick_Handler (void);
|
||||
|
||||
.type SysTick_Handler, %function
|
||||
.global SysTick_Handler
|
||||
SysTick_Handler:
|
||||
.fnstart
|
||||
.cantunwind
|
||||
|
||||
PUSH {LR}
|
||||
BL rt_systick
|
||||
POP {LR}
|
||||
BX LR
|
||||
|
||||
/*-------------------------- End --------------------------------*/
|
||||
.fnend
|
||||
.size SysTick_Handler, .-SysTick_Handler
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
.end
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
;/*----------------------------------------------------------------------------
|
||||
; * RL-ARM - RTX
|
||||
; *----------------------------------------------------------------------------
|
||||
; * Name: SVC_TABLE.S
|
||||
; * Purpose: Pre-defined SVC Table for Cortex-M
|
||||
; * Rev.: V4.60
|
||||
; *----------------------------------------------------------------------------
|
||||
; *
|
||||
; * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
; * All rights reserved.
|
||||
; * Redistribution and use in source and binary forms, with or without
|
||||
; * modification, are permitted provided that the following conditions are met:
|
||||
; * - Redistributions of source code must retain the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer.
|
||||
; * - Redistributions in binary form must reproduce the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer in the
|
||||
; * documentation and/or other materials provided with the distribution.
|
||||
; * - Neither the name of ARM nor the names of its contributors may be used
|
||||
; * to endorse or promote products derived from this software without
|
||||
; * specific prior written permission.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
; * POSSIBILITY OF SUCH DAMAGE.
|
||||
; *---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
.file "SVC_Table.S"
|
||||
|
||||
|
||||
.section ".svc_table"
|
||||
|
||||
.global SVC_Table
|
||||
SVC_Table:
|
||||
/* Insert user SVC functions here. SVC 0 used by RTL Kernel. */
|
||||
# .long __SVC_1 /* user SVC function */
|
||||
SVC_End:
|
||||
|
||||
.global SVC_Count
|
||||
SVC_Count:
|
||||
.long (SVC_End-SVC_Table)/4
|
||||
|
||||
|
||||
.end
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,312 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* CMSIS-RTOS - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: HAL_CM0.S
|
||||
* Purpose: Hardware Abstraction Layer for Cortex-M0
|
||||
* Rev.: V4.70
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
NAME HAL_CM0.S
|
||||
|
||||
#define TCB_TSTACK 36
|
||||
|
||||
EXTERN os_flags
|
||||
EXTERN os_tsk
|
||||
EXTERN rt_alloc_box
|
||||
EXTERN rt_free_box
|
||||
EXTERN rt_stk_check
|
||||
EXTERN rt_pop_req
|
||||
EXTERN rt_systick
|
||||
EXTERN os_tick_irqack
|
||||
EXTERN SVC_Table
|
||||
EXTERN SVC_Count
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
THUMB
|
||||
|
||||
/*--------------------------- rt_set_PSP ------------------------------------*/
|
||||
|
||||
; void rt_set_PSP (U32 stack);
|
||||
|
||||
PUBLIC rt_set_PSP
|
||||
rt_set_PSP:
|
||||
|
||||
MSR PSP,R0
|
||||
BX LR
|
||||
|
||||
|
||||
/*--------------------------- rt_get_PSP ------------------------------------*/
|
||||
|
||||
; U32 rt_get_PSP (void);
|
||||
|
||||
PUBLIC rt_get_PSP
|
||||
rt_get_PSP:
|
||||
|
||||
MRS R0,PSP
|
||||
BX LR
|
||||
|
||||
|
||||
/*--------------------------- os_set_env ------------------------------------*/
|
||||
|
||||
; void os_set_env (void);
|
||||
/* Switch to Unprivileged/Privileged Thread mode, use PSP. */
|
||||
|
||||
PUBLIC os_set_env
|
||||
os_set_env:
|
||||
|
||||
MOV R0,SP /* PSP = MSP */
|
||||
MSR PSP,R0
|
||||
LDR R0,=os_flags
|
||||
LDRB R0,[R0]
|
||||
LSLS R0,#31
|
||||
BNE PrivilegedE
|
||||
MOVS R0,#0x03 /* Unprivileged Thread mode, use PSP */
|
||||
MSR CONTROL,R0
|
||||
BX LR
|
||||
PrivilegedE:
|
||||
MOVS R0,#0x02 /* Privileged Thread mode, use PSP */
|
||||
MSR CONTROL,R0
|
||||
BX LR
|
||||
|
||||
|
||||
/*--------------------------- _alloc_box ------------------------------------*/
|
||||
|
||||
; void *_alloc_box (void *box_mem);
|
||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
||||
|
||||
PUBLIC _alloc_box
|
||||
_alloc_box:
|
||||
|
||||
LDR R3,=rt_alloc_box
|
||||
MOV R12,R3
|
||||
MRS R3,IPSR
|
||||
LSLS R3,#24
|
||||
BNE PrivilegedA
|
||||
MRS R3,CONTROL
|
||||
LSLS R3,#31
|
||||
BEQ PrivilegedA
|
||||
SVC 0
|
||||
BX LR
|
||||
PrivilegedA:
|
||||
BX R12
|
||||
|
||||
|
||||
/*--------------------------- _free_box -------------------------------------*/
|
||||
|
||||
; int _free_box (void *box_mem, void *box);
|
||||
/* Function wrapper for Unprivileged/Privileged mode. */
|
||||
|
||||
PUBLIC _free_box
|
||||
_free_box:
|
||||
|
||||
LDR R3,=rt_free_box
|
||||
MOV R12,R3
|
||||
MRS R3,IPSR
|
||||
LSLS R3,#24
|
||||
BNE PrivilegedF
|
||||
MRS R3,CONTROL
|
||||
LSLS R3,#31
|
||||
BEQ PrivilegedF
|
||||
SVC 0
|
||||
BX LR
|
||||
PrivilegedF:
|
||||
BX R12
|
||||
|
||||
|
||||
/*-------------------------- SVC_Handler ------------------------------------*/
|
||||
|
||||
; void SVC_Handler (void);
|
||||
|
||||
PUBLIC SVC_Handler
|
||||
SVC_Handler:
|
||||
|
||||
MRS R0,PSP /* Read PSP */
|
||||
LDR R1,[R0,#24] /* Read Saved PC from Stack */
|
||||
SUBS R1,R1,#2 /* Point to SVC Instruction */
|
||||
LDRB R1,[R1] /* Load SVC Number */
|
||||
CMP R1,#0
|
||||
BNE SVC_User /* User SVC Number > 0 */
|
||||
|
||||
MOV LR,R4
|
||||
LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
|
||||
MOV R12,R4
|
||||
MOV R4,LR
|
||||
BLX R12 /* Call SVC Function */
|
||||
|
||||
MRS R3,PSP /* Read PSP */
|
||||
STMIA R3!,{R0-R2} /* Store return values */
|
||||
|
||||
LDR R3,=os_tsk
|
||||
LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
|
||||
CMP R1,R2
|
||||
BEQ SVC_Exit /* no task switch */
|
||||
|
||||
SUBS R3,#8
|
||||
CMP R1,#0 /* Runtask deleted? */
|
||||
BEQ SVC_Next
|
||||
|
||||
MRS R0,PSP /* Read PSP */
|
||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
||||
STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
|
||||
STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
|
||||
MOV R4,R8
|
||||
MOV R5,R9
|
||||
MOV R6,R10
|
||||
MOV R7,R11
|
||||
STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
|
||||
|
||||
PUSH {R2,R3}
|
||||
BL rt_stk_check /* Check for Stack overflow */
|
||||
POP {R2,R3}
|
||||
|
||||
SVC_Next:
|
||||
STR R2,[R3] /* os_tsk.run = os_tsk.new */
|
||||
|
||||
LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
|
||||
ADDS R0,R0,#16 /* Adjust Start Address */
|
||||
LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
|
||||
MOV R8,R4
|
||||
MOV R9,R5
|
||||
MOV R10,R6
|
||||
MOV R11,R7
|
||||
MSR PSP,R0 /* Write PSP */
|
||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
||||
LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
|
||||
|
||||
SVC_Exit:
|
||||
MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
|
||||
MVNS R0,R0
|
||||
BX R0 /* RETI to Thread Mode, use PSP */
|
||||
|
||||
/*------------------- User SVC ------------------------------*/
|
||||
|
||||
SVC_User:
|
||||
PUSH {R4,LR} /* Save Registers */
|
||||
LDR R2,=SVC_Count
|
||||
LDR R2,[R2]
|
||||
CMP R1,R2
|
||||
BHI SVC_Done /* Overflow */
|
||||
|
||||
LDR R4,=SVC_Table-4
|
||||
LSLS R1,R1,#2
|
||||
LDR R4,[R4,R1] /* Load SVC Function Address */
|
||||
MOV LR,R4
|
||||
|
||||
LDMIA R0,{R0-R3,R4} /* Read R0-R3,R12 from stack */
|
||||
MOV R12,R4
|
||||
BLX LR /* Call SVC Function */
|
||||
|
||||
MRS R4,PSP /* Read PSP */
|
||||
STMIA R4!,{R0-R3} /* Function return values */
|
||||
SVC_Done:
|
||||
POP {R4,PC} /* RETI */
|
||||
|
||||
|
||||
/*-------------------------- PendSV_Handler ---------------------------------*/
|
||||
|
||||
; void PendSV_Handler (void);
|
||||
|
||||
PUBLIC PendSV_Handler
|
||||
PendSV_Handler:
|
||||
|
||||
BL rt_pop_req
|
||||
|
||||
Sys_Switch:
|
||||
LDR R3,=os_tsk
|
||||
LDMIA R3!,{R1,R2} /* os_tsk.run, os_tsk.new */
|
||||
CMP R1,R2
|
||||
BEQ Sys_Exit /* no task switch */
|
||||
|
||||
SUBS R3,#8
|
||||
|
||||
MRS R0,PSP /* Read PSP */
|
||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
||||
STR R0,[R1,#TCB_TSTACK] /* Update os_tsk.run->tsk_stack */
|
||||
STMIA R0!,{R4-R7} /* Save old context (R4-R7) */
|
||||
MOV R4,R8
|
||||
MOV R5,R9
|
||||
MOV R6,R10
|
||||
MOV R7,R11
|
||||
STMIA R0!,{R4-R7} /* Save old context (R8-R11) */
|
||||
|
||||
PUSH {R2,R3}
|
||||
BL rt_stk_check /* Check for Stack overflow */
|
||||
POP {R2,R3}
|
||||
|
||||
STR R2,[R3] /* os_tsk.run = os_tsk.new */
|
||||
|
||||
LDR R0,[R2,#TCB_TSTACK] /* os_tsk.new->tsk_stack */
|
||||
ADDS R0,R0,#16 /* Adjust Start Address */
|
||||
LDMIA R0!,{R4-R7} /* Restore new Context (R8-R11) */
|
||||
MOV R8,R4
|
||||
MOV R9,R5
|
||||
MOV R10,R6
|
||||
MOV R11,R7
|
||||
MSR PSP,R0 /* Write PSP */
|
||||
SUBS R0,R0,#32 /* Adjust Start Address */
|
||||
LDMIA R0!,{R4-R7} /* Restore new Context (R4-R7) */
|
||||
|
||||
Sys_Exit:
|
||||
MOVS R0,#~0xFFFFFFFD /* Set EXC_RETURN value */
|
||||
MVNS R0,R0
|
||||
BX R0 /* RETI to Thread Mode, use PSP */
|
||||
|
||||
|
||||
/*-------------------------- SysTick_Handler --------------------------------*/
|
||||
|
||||
; void SysTick_Handler (void);
|
||||
|
||||
PUBLIC SysTick_Handler
|
||||
SysTick_Handler:
|
||||
|
||||
BL rt_systick
|
||||
B Sys_Switch
|
||||
|
||||
|
||||
/*-------------------------- OS_Tick_Handler --------------------------------*/
|
||||
|
||||
; void OS_Tick_Handler (void);
|
||||
|
||||
PUBLIC OS_Tick_Handler
|
||||
OS_Tick_Handler:
|
||||
|
||||
BL os_tick_irqack
|
||||
BL rt_systick
|
||||
B Sys_Switch
|
||||
|
||||
|
||||
END
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
;/*----------------------------------------------------------------------------
|
||||
; * CMSIS-RTOS - RTX
|
||||
; *----------------------------------------------------------------------------
|
||||
; * Name: SVC_TABLE.S
|
||||
; * Purpose: Pre-defined SVC Table for Cortex-M
|
||||
; * Rev.: V4.70
|
||||
; *----------------------------------------------------------------------------
|
||||
; *
|
||||
; * Copyright (c) 1999-2009 KEIL, 2009-2013 ARM Germany GmbH
|
||||
; * All rights reserved.
|
||||
; * Redistribution and use in source and binary forms, with or without
|
||||
; * modification, are permitted provided that the following conditions are met:
|
||||
; * - Redistributions of source code must retain the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer.
|
||||
; * - Redistributions in binary form must reproduce the above copyright
|
||||
; * notice, this list of conditions and the following disclaimer in the
|
||||
; * documentation and/or other materials provided with the distribution.
|
||||
; * - Neither the name of ARM nor the names of its contributors may be used
|
||||
; * to endorse or promote products derived from this software without
|
||||
; * specific prior written permission.
|
||||
; *
|
||||
; * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
; * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
; * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
; * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
; * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
; * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
; * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
; * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
; * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
; * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
; * POSSIBILITY OF SUCH DAMAGE.
|
||||
; *---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
NAME SVC_TABLE
|
||||
SECTION .text:CONST (2)
|
||||
|
||||
PUBLIC SVC_Count
|
||||
|
||||
SVC_Cnt EQU (SVC_End-SVC_Table)/4
|
||||
SVC_Count DCD SVC_Cnt
|
||||
|
||||
; Import user SVC functions here.
|
||||
; IMPORT __SVC_1
|
||||
|
||||
PUBLIC SVC_Table
|
||||
SVC_Table
|
||||
; Insert user SVC functions here. SVC 0 used by RTL Kernel.
|
||||
; DCD __SVC_1 ; user SVC function
|
||||
|
||||
SVC_End
|
||||
|
||||
END
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,161 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: HAL_CM.C
|
||||
* Purpose: Hardware Abstraction Layer for Cortex-M
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef DBG_MSG
|
||||
BIT dbg_msg;
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_init_stack ---------------------------------*/
|
||||
|
||||
void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
|
||||
/* Prepare TCB and saved context for a first time start of a task. */
|
||||
U32 *stk,i,size;
|
||||
|
||||
/* Prepare a complete interrupt frame for first task start */
|
||||
size = p_TCB->priv_stack >> 2;
|
||||
|
||||
/* Write to the top of stack. */
|
||||
stk = &p_TCB->stack[size];
|
||||
|
||||
/* Auto correct to 8-byte ARM stack alignment. */
|
||||
if ((U32)stk & 0x04) {
|
||||
stk--;
|
||||
}
|
||||
|
||||
stk -= 16;
|
||||
|
||||
/* Default xPSR and initial PC */
|
||||
stk[15] = (U32)task_body + 4; /* add 4 byte offset because SUB PC, LR - 4 */
|
||||
stk[0] = INITIAL_xPSR;
|
||||
|
||||
/* Clear R0-R13/LR registers. */
|
||||
for (i = 1; i < 14; i++) {
|
||||
stk[i] = 0;
|
||||
}
|
||||
|
||||
/* Assign a void pointer to R0. */
|
||||
stk[TCB_STACK_R0_OFFSET_DWORDS] = (U32)p_TCB->msg;
|
||||
|
||||
/* Initial Task stack pointer. */
|
||||
p_TCB->tsk_stack = (U32)stk;
|
||||
|
||||
/* Task entry point. */
|
||||
p_TCB->ptask = task_body;
|
||||
|
||||
/* Set a magic word for checking of stack overflow.
|
||||
For the main thread (ID: 0x01) the stack is in a memory area shared with the
|
||||
heap, therefore the last word of the stack is a moving target.
|
||||
We want to do stack/heap collision detection instead.
|
||||
*/
|
||||
if (p_TCB->task_id != 0x01)
|
||||
p_TCB->stack[0] = MAGIC_WORD;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_ret_val ----------------------------------*/
|
||||
|
||||
static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
|
||||
/* Get pointer to task return value registers (R0..R3) in Stack */
|
||||
|
||||
/* Stack Frame: CPSR,R0-R13,PC */
|
||||
return (U32 *)(p_TCB->tsk_stack + TCB_STACK_R0_OFFSET_BYTES);
|
||||
}
|
||||
|
||||
void rt_ret_val (P_TCB p_TCB, U32 v0) {
|
||||
U32 *ret;
|
||||
|
||||
ret = rt_ret_regs(p_TCB);
|
||||
ret[0] = v0;
|
||||
}
|
||||
|
||||
void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
|
||||
U32 *ret;
|
||||
|
||||
ret = rt_ret_regs(p_TCB);
|
||||
ret[0] = v0;
|
||||
ret[1] = v1;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- dbg_init --------------------------------------*/
|
||||
|
||||
#ifdef DBG_MSG
|
||||
void dbg_init (void) {
|
||||
if ((DEMCR & DEMCR_TRCENA) &&
|
||||
(ITM_CONTROL & ITM_ITMENA) &&
|
||||
(ITM_ENABLE & (1UL << 31))) {
|
||||
dbg_msg = __TRUE;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*--------------------------- dbg_task_notify -------------------------------*/
|
||||
|
||||
#ifdef DBG_MSG
|
||||
void dbg_task_notify (P_TCB p_tcb, BOOL create) {
|
||||
while (ITM_PORT31_U32 == 0);
|
||||
ITM_PORT31_U32 = (U32)p_tcb->ptask;
|
||||
while (ITM_PORT31_U32 == 0);
|
||||
ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*--------------------------- dbg_task_switch -------------------------------*/
|
||||
|
||||
#ifdef DBG_MSG
|
||||
void dbg_task_switch (U32 task_id) {
|
||||
while (ITM_PORT31_U32 == 0);
|
||||
ITM_PORT31_U8 = task_id;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,467 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RTX_CM_LIB.H
|
||||
* Purpose: RTX Kernel System Configuration
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#include "mbed_error.h"
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#pragma O3
|
||||
#define __USED __attribute__((used))
|
||||
#elif defined (__GNUC__)
|
||||
#pragma GCC optimize ("O3")
|
||||
#define __USED __attribute__((used))
|
||||
#elif defined (__ICCARM__)
|
||||
#define __USED __root
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Definitions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define _declare_box(pool,size,cnt) uint32_t pool[(((size)+3)/4)*(cnt) + 3]
|
||||
#define _declare_box8(pool,size,cnt) uint64_t pool[(((size)+7)/8)*(cnt) + 2]
|
||||
|
||||
#define OS_TCB_SIZE 48
|
||||
#define OS_TMR_SIZE 8
|
||||
|
||||
#if defined (__CC_ARM) && !defined (__MICROLIB)
|
||||
|
||||
typedef void *OS_ID;
|
||||
typedef uint32_t OS_TID;
|
||||
typedef uint32_t OS_MUT[3];
|
||||
typedef uint32_t OS_RESULT;
|
||||
|
||||
#define runtask_id() rt_tsk_self()
|
||||
#define mutex_init(m) rt_mut_init(m)
|
||||
#define mutex_wait(m) os_mut_wait(m,0xFFFF)
|
||||
#define mutex_rel(m) os_mut_release(m)
|
||||
|
||||
extern OS_TID rt_tsk_self (void);
|
||||
extern void rt_mut_init (OS_ID mutex);
|
||||
extern OS_RESULT rt_mut_release (OS_ID mutex);
|
||||
extern OS_RESULT rt_mut_wait (OS_ID mutex, uint16_t timeout);
|
||||
|
||||
#define os_mut_wait(mutex,timeout) _os_mut_wait((uint32_t)rt_mut_wait,mutex,timeout)
|
||||
#define os_mut_release(mutex) _os_mut_release((uint32_t)rt_mut_release,mutex)
|
||||
|
||||
OS_RESULT _os_mut_release (uint32_t p, OS_ID mutex) __svc_indirect(0);
|
||||
OS_RESULT _os_mut_wait (uint32_t p, OS_ID mutex, uint16_t timeout) __svc_indirect(0);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#if (OS_TIMERS != 0)
|
||||
#define OS_TASK_CNT (OS_TASKCNT + 1)
|
||||
#else
|
||||
#define OS_TASK_CNT OS_TASKCNT
|
||||
#endif
|
||||
|
||||
uint16_t const os_maxtaskrun = OS_TASK_CNT;
|
||||
uint32_t const os_rrobin = (OS_ROBIN << 16) | OS_ROBINTOUT;
|
||||
uint32_t const os_trv = OS_TRV;
|
||||
uint8_t const os_flags = OS_RUNPRIV;
|
||||
|
||||
/* Export following defines to uVision debugger. */
|
||||
__USED uint32_t const os_clockrate = OS_TICK;
|
||||
__USED uint32_t const os_timernum = 0;
|
||||
|
||||
/* Stack for the os_idle_demon */
|
||||
unsigned int idle_task_stack[OS_IDLESTKSIZE];
|
||||
unsigned short const idle_task_stack_size = OS_IDLESTKSIZE;
|
||||
|
||||
#ifndef OS_FIFOSZ
|
||||
#define OS_FIFOSZ 16
|
||||
#endif
|
||||
|
||||
/* Fifo Queue buffer for ISR requests.*/
|
||||
uint32_t os_fifo[OS_FIFOSZ*2+1];
|
||||
uint8_t const os_fifo_size = OS_FIFOSZ;
|
||||
|
||||
/* An array of Active task pointers. */
|
||||
void *os_active_TCB[OS_TASK_CNT];
|
||||
|
||||
/* User Timers Resources */
|
||||
#if (OS_TIMERS != 0)
|
||||
extern void osTimerThread (void const *argument);
|
||||
osThreadDef(osTimerThread, (osPriority)(OS_TIMERPRIO-3), 4*OS_TIMERSTKSZ);
|
||||
osThreadId osThreadId_osTimerThread;
|
||||
osMessageQDef(osTimerMessageQ, OS_TIMERCBQS, void *);
|
||||
osMessageQId osMessageQId_osTimerMessageQ;
|
||||
#else
|
||||
osThreadDef_t os_thread_def_osTimerThread = { NULL };
|
||||
osThreadId osThreadId_osTimerThread;
|
||||
osMessageQDef(osTimerMessageQ, 0, void *);
|
||||
osMessageQId osMessageQId_osTimerMessageQ;
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX Optimizations (empty functions)
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#if OS_ROBIN == 0
|
||||
void rt_init_robin (void) {;}
|
||||
void rt_chk_robin (void) {;}
|
||||
#endif
|
||||
|
||||
#if OS_STKCHECK == 0
|
||||
void rt_stk_check (void) {;}
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Standard Library multithreading interface
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#if defined (__CC_ARM) && !defined (__MICROLIB)
|
||||
static OS_MUT std_libmutex[OS_MUTEXCNT];
|
||||
static uint32_t nr_mutex;
|
||||
|
||||
/*--------------------------- _mutex_initialize -----------------------------*/
|
||||
|
||||
int _mutex_initialize (OS_ID *mutex) {
|
||||
/* Allocate and initialize a system mutex. */
|
||||
|
||||
if (nr_mutex >= OS_MUTEXCNT) {
|
||||
/* If you are here, you need to increase the number OS_MUTEXCNT. */
|
||||
error("Not enough stdlib mutexes\n");
|
||||
}
|
||||
*mutex = &std_libmutex[nr_mutex++];
|
||||
mutex_init (*mutex);
|
||||
return (1);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- _mutex_acquire --------------------------------*/
|
||||
|
||||
__attribute__((used)) void _mutex_acquire (OS_ID *mutex) {
|
||||
/* Acquire a system mutex, lock stdlib resources. */
|
||||
if (runtask_id ()) {
|
||||
/* RTX running, acquire a mutex. */
|
||||
mutex_wait (*mutex);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- _mutex_release --------------------------------*/
|
||||
|
||||
__attribute__((used)) void _mutex_release (OS_ID *mutex) {
|
||||
/* Release a system mutex, unlock stdlib resources. */
|
||||
if (runtask_id ()) {
|
||||
/* RTX running, release a mutex. */
|
||||
mutex_rel (*mutex);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX Startup
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Main Thread definition */
|
||||
extern int main (void);
|
||||
osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL};
|
||||
|
||||
// This define should be probably moved to the CMSIS layer
|
||||
#if defined(TARGET_LPC1768)
|
||||
#define INITIAL_SP (0x10008000UL)
|
||||
|
||||
#elif defined(TARGET_LPC11U24)
|
||||
#define INITIAL_SP (0x10002000UL)
|
||||
|
||||
#elif defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO)
|
||||
#define INITIAL_SP (0x10002000UL)
|
||||
|
||||
#elif defined(TARGET_LPC1114)
|
||||
#define INITIAL_SP (0x10001000UL)
|
||||
|
||||
#elif defined(TARGET_LPC812)
|
||||
#define INITIAL_SP (0x10001000UL)
|
||||
|
||||
#elif defined(TARGET_LPC824)
|
||||
#define INITIAL_SP (0x10002000UL)
|
||||
|
||||
#elif defined(TARGET_KL25Z)
|
||||
#define INITIAL_SP (0x20003000UL)
|
||||
|
||||
#elif defined(TARGET_K64F)
|
||||
#define INITIAL_SP (0x20030000UL)
|
||||
|
||||
#elif defined(TARGET_K22F)
|
||||
#define INITIAL_SP (0x20010000UL)
|
||||
|
||||
#elif defined(TARGET_KL46Z)
|
||||
#define INITIAL_SP (0x20006000UL)
|
||||
|
||||
#elif defined(TARGET_KL43Z)
|
||||
#define INITIAL_SP (0x20006000UL)
|
||||
|
||||
#elif defined(TARGET_KL05Z)
|
||||
#define INITIAL_SP (0x20000C00UL)
|
||||
|
||||
#elif defined(TARGET_LPC4088)
|
||||
#define INITIAL_SP (0x10010000UL)
|
||||
|
||||
#elif defined(TARGET_LPC4337)
|
||||
#define INITIAL_SP (0x10008000UL)
|
||||
|
||||
#elif defined(TARGET_LPC1347)
|
||||
#define INITIAL_SP (0x10002000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8)
|
||||
#define INITIAL_SP (0x20002000UL)
|
||||
|
||||
#elif defined(TARGET_DISCO_F303VC)
|
||||
#define INITIAL_SP (0x2000A000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
|
||||
#define INITIAL_SP (0x20020000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F401RE)
|
||||
#define INITIAL_SP (0x20018000UL)
|
||||
|
||||
#elif defined(TARGET_LPC1549)
|
||||
#define INITIAL_SP (0x02009000UL)
|
||||
|
||||
#elif defined(TARGET_LPC11U68)
|
||||
#define INITIAL_SP (0x10004000UL)
|
||||
|
||||
#elif defined(TARGET_NRF51822)
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F411RE)
|
||||
#define INITIAL_SP (0x20020000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F103RB)
|
||||
#define INITIAL_SP (0x20005000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F302R8)
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F334R8)
|
||||
#define INITIAL_SP (0x20003000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F334C8)
|
||||
#define INITIAL_SP (0x20003000UL)
|
||||
|
||||
#elif defined(TARGET_STM32F405RG)
|
||||
#define INITIAL_SP (0x20020000UL)
|
||||
|
||||
#elif defined(TARGET_LPC2460)
|
||||
extern unsigned char __usr_stack_top__[];
|
||||
#define INITIAL_SP (__usr_stack_top__)
|
||||
|
||||
#else
|
||||
#error "no target defined"
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern unsigned char Image$$RW_IRAM1$$ZI$$Limit[];
|
||||
#define HEAP_START (Image$$RW_IRAM1$$ZI$$Limit)
|
||||
#elif defined(__GNUC__)
|
||||
extern unsigned char __end__[];
|
||||
#define HEAP_START (__end__)
|
||||
#elif defined(__ICCARM__)
|
||||
#pragma section="HEAP"
|
||||
#define HEAP_START (void *)__section_begin("HEAP")
|
||||
#endif
|
||||
|
||||
void set_main_stack(void) {
|
||||
// That is the bottom of the main stack block: no collision detection
|
||||
os_thread_def_main.stack_pointer = HEAP_START;
|
||||
|
||||
// Leave OS_SCHEDULERSTKSIZE words for the scheduler and interrupts
|
||||
os_thread_def_main.stacksize = (INITIAL_SP - (unsigned int)HEAP_START) - (OS_SCHEDULERSTKSIZE * 4);
|
||||
}
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#ifdef __MICROLIB
|
||||
void _main_init (void) __attribute__((section(".ARM.Collect$$$$000000FF")));
|
||||
void _main_init (void) {
|
||||
osKernelInitialize();
|
||||
set_main_stack();
|
||||
osThreadCreate(&os_thread_def_main, NULL);
|
||||
osKernelStart();
|
||||
for (;;);
|
||||
}
|
||||
#else
|
||||
|
||||
/* The single memory model is checking for stack collision at run time, verifing
|
||||
that the heap pointer is underneath the stack pointer.
|
||||
|
||||
With the RTOS there is not only one stack above the heap, there are multiple
|
||||
stacks and some of them are underneath the heap pointer.
|
||||
*/
|
||||
#pragma import(__use_two_region_memory)
|
||||
|
||||
__asm void __rt_entry (void) {
|
||||
|
||||
IMPORT __user_setup_stackheap
|
||||
IMPORT __rt_lib_init
|
||||
IMPORT os_thread_def_main
|
||||
IMPORT osKernelInitialize
|
||||
IMPORT set_main_stack
|
||||
IMPORT osKernelStart
|
||||
IMPORT osThreadCreate
|
||||
IMPORT exit
|
||||
|
||||
BL __user_setup_stackheap
|
||||
MOV R1,R2
|
||||
BL __rt_lib_init
|
||||
BL osKernelInitialize
|
||||
BL set_main_stack
|
||||
LDR R0,=os_thread_def_main
|
||||
MOVS R1,#0
|
||||
BL osThreadCreate
|
||||
BL osKernelStart
|
||||
BL exit
|
||||
|
||||
ALIGN
|
||||
}
|
||||
#endif
|
||||
|
||||
#elif defined (__GNUC__)
|
||||
|
||||
#ifdef __CS3__
|
||||
|
||||
/* CS3 start_c routine.
|
||||
*
|
||||
* Copyright (c) 2006, 2007 CodeSourcery Inc
|
||||
*
|
||||
* The authors hereby grant permission to use, copy, modify, distribute,
|
||||
* and license this software and its documentation for any purpose, provided
|
||||
* that existing copyright notices are retained in all copies and that this
|
||||
* notice is included verbatim in any distributions. No written agreement,
|
||||
* license, or royalty fee is required for any of the authorized uses.
|
||||
* Modifications to this software may be copyrighted by their authors
|
||||
* and need not follow the licensing terms described here, provided that
|
||||
* the new terms are clearly indicated on the first page of each file where
|
||||
* they apply.
|
||||
*/
|
||||
|
||||
#include "cs3.h"
|
||||
|
||||
extern void __libc_init_array (void);
|
||||
|
||||
__attribute ((noreturn)) void __cs3_start_c (void){
|
||||
unsigned regions = __cs3_region_num;
|
||||
const struct __cs3_region *rptr = __cs3_regions;
|
||||
|
||||
/* Initialize memory */
|
||||
for (regions = __cs3_region_num, rptr = __cs3_regions; regions--; rptr++) {
|
||||
long long *src = (long long *)rptr->init;
|
||||
long long *dst = (long long *)rptr->data;
|
||||
unsigned limit = rptr->init_size;
|
||||
unsigned count;
|
||||
|
||||
if (src != dst)
|
||||
for (count = 0; count != limit; count += sizeof (long long))
|
||||
*dst++ = *src++;
|
||||
else
|
||||
dst = (long long *)((char *)dst + limit);
|
||||
limit = rptr->zero_size;
|
||||
for (count = 0; count != limit; count += sizeof (long long))
|
||||
*dst++ = 0;
|
||||
}
|
||||
|
||||
/* Run initializers. */
|
||||
__libc_init_array ();
|
||||
|
||||
osKernelInitialize();
|
||||
set_main_stack();
|
||||
osThreadCreate(&os_thread_def_main, NULL);
|
||||
osKernelStart();
|
||||
for (;;);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
__attribute__((naked)) void software_init_hook (void) {
|
||||
__asm (
|
||||
".syntax unified\n"
|
||||
".thumb\n"
|
||||
"movs r0,#0\n"
|
||||
"movs r1,#0\n"
|
||||
"mov r8,r0\n"
|
||||
"mov r9,r1\n"
|
||||
"ldr r0,= __libc_fini_array\n"
|
||||
"bl atexit\n"
|
||||
"bl __libc_init_array\n"
|
||||
"mov r0,r8\n"
|
||||
"mov r1,r9\n"
|
||||
"bl osKernelInitialize\n"
|
||||
"bl set_main_stack\n"
|
||||
"ldr r0,=os_thread_def_main\n"
|
||||
"movs r1,#0\n"
|
||||
"bl osThreadCreate\n"
|
||||
"bl osKernelStart\n"
|
||||
"bl exit\n"
|
||||
);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#elif defined (__ICCARM__)
|
||||
|
||||
extern int __low_level_init(void);
|
||||
extern void __iar_data_init3(void);
|
||||
extern void exit(int arg);
|
||||
|
||||
__noreturn __stackless void __cmain(void) {
|
||||
int a;
|
||||
|
||||
if (__low_level_init() != 0) {
|
||||
__iar_data_init3();
|
||||
}
|
||||
osKernelInitialize();
|
||||
set_main_stack();
|
||||
osThreadCreate(&os_thread_def_main, NULL);
|
||||
a = osKernelStart();
|
||||
exit(a);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RTX_CONFIG.H
|
||||
* Purpose: Exported functions of RTX_Config.c
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/* Error Codes */
|
||||
#define OS_ERR_STK_OVF 1
|
||||
#define OS_ERR_FIFO_OVF 2
|
||||
#define OS_ERR_MBX_OVF 3
|
||||
|
||||
/* Definitions */
|
||||
#define BOX_ALIGN_8 0x80000000
|
||||
#define _declare_box(pool,size,cnt) U32 pool[(((size)+3)/4)*(cnt) + 3]
|
||||
#define _declare_box8(pool,size,cnt) U64 pool[(((size)+7)/8)*(cnt) + 2]
|
||||
#define _init_box8(pool,size,bsize) _init_box (pool,size,(bsize) | BOX_ALIGN_8)
|
||||
|
||||
/* Variables */
|
||||
extern U32 idle_task_stack[];
|
||||
extern U32 os_fifo[];
|
||||
extern void *os_active_TCB[];
|
||||
|
||||
/* Constants */
|
||||
extern U16 const os_maxtaskrun;
|
||||
extern U32 const os_trv;
|
||||
extern U8 const os_flags;
|
||||
extern U32 const os_rrobin;
|
||||
extern U32 const os_clockrate;
|
||||
extern U32 const os_timernum;
|
||||
extern U16 const idle_task_stack_size;
|
||||
|
||||
extern U8 const os_fifo_size;
|
||||
|
||||
/* Functions */
|
||||
extern void os_idle_demon (void);
|
||||
extern int os_tick_init (void);
|
||||
extern void os_tick_irqack (void);
|
||||
extern void os_tmr_call (U16 info);
|
||||
extern void os_error (U32 err_code);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,293 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RTX_Conf_CM.C
|
||||
* Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "cmsis_os.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX User configuration part BEGIN
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
|
||||
//
|
||||
// <h>Thread Configuration
|
||||
// =======================
|
||||
//
|
||||
// <o>Number of concurrent running threads <0-250>
|
||||
// <i> Defines max. number of threads that will run at the same time.
|
||||
// counting "main", but not counting "osTimerThread"
|
||||
// <i> Default: 6
|
||||
#ifndef OS_TASKCNT
|
||||
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) || defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) \
|
||||
|| defined(TARGET_STM32F405RG) || defined(TARGET_K22F) || defined(TARGET_LPC2460)
|
||||
# define OS_TASKCNT 14
|
||||
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
|
||||
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \
|
||||
|| defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8)
|
||||
# define OS_TASKCNT 6
|
||||
# else
|
||||
# error "no target defined"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
// <o>Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4>
|
||||
#ifndef OS_SCHEDULERSTKSIZE
|
||||
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC4337) || defined(TARGET_LPC1347) || defined(TARGET_K64F) || defined(TARGET_STM32F401RE)\
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) || defined(TARGET_NRF51822) || defined(TARGET_STM32F411RE) \
|
||||
|| defined(TARGET_STM32F405RG) || defined(TARGET_K22F)
|
||||
# define OS_SCHEDULERSTKSIZE 256
|
||||
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) \
|
||||
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8) \
|
||||
|| defined(TARGET_STM32F103RB) || defined(TARGET_LPC824) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8)
|
||||
# define OS_SCHEDULERSTKSIZE 128
|
||||
# elif defined(TARGET_LPC2460)
|
||||
# define OS_SCHEDULERSTKSIZE (136*2)
|
||||
# else
|
||||
# error "no target defined"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
// <o>Idle stack size [bytes] <64-4096:8><#/4>
|
||||
// <i> Defines default stack size for the Idle thread.
|
||||
#ifndef OS_IDLESTKSIZE
|
||||
#define OS_IDLESTKSIZE 136
|
||||
#endif
|
||||
|
||||
// <o>Timer Thread stack size [bytes] <64-4096:8><#/4>
|
||||
// <i> Defines stack size for Timer thread.
|
||||
// <i> Default: 200
|
||||
#ifndef OS_TIMERSTKSZ
|
||||
#define OS_TIMERSTKSZ WORDS_STACK_SIZE
|
||||
#endif
|
||||
|
||||
// <q>Check for stack overflow
|
||||
// <i> Includes the stack checking code for stack overflow.
|
||||
// <i> Note that additional code reduces the Kernel performance.
|
||||
#ifndef OS_STKCHECK
|
||||
#define OS_STKCHECK 1
|
||||
#endif
|
||||
|
||||
// <o>Processor mode for thread execution
|
||||
// <0=> Unprivileged mode
|
||||
// <1=> Privileged mode
|
||||
// <i> Default: Privileged mode
|
||||
#ifndef OS_RUNPRIV
|
||||
#define OS_RUNPRIV 1
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
// <h>SysTick Timer Configuration
|
||||
// ==============================
|
||||
//
|
||||
// <o>Timer clock value [Hz] <1-1000000000>
|
||||
// <i> Defines the timer clock value.
|
||||
// <i> Default: 6000000 (6MHz)
|
||||
#ifndef OS_CLOCK
|
||||
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368)
|
||||
# define OS_CLOCK 96000000
|
||||
|
||||
# elif defined(TARGET_LPC1347) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_STM32F302R8) || defined(TARGET_STM32F334R8) || defined(TARGET_STM32F334C8) || defined(TARGET_LPC2460)
|
||||
# define OS_CLOCK 72000000
|
||||
|
||||
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPCCAPPUCCINO) || defined(TARGET_LPC1114) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_STM32F051R8) || defined(TARGET_LPC11U68)
|
||||
# define OS_CLOCK 48000000
|
||||
|
||||
# elif defined(TARGET_LPC812)
|
||||
# define OS_CLOCK 36000000
|
||||
|
||||
# elif defined(TARGET_LPC824)
|
||||
# define OS_CLOCK 30000000
|
||||
|
||||
# elif defined(TARGET_STM32F100RB)
|
||||
# define OS_CLOCK 24000000
|
||||
|
||||
# elif defined(TARGET_LPC4088) || defined(TARGET_K64F) || defined(TARGET_K22F)
|
||||
# define OS_CLOCK 120000000
|
||||
|
||||
# elif defined(TARGET_LPC4337)
|
||||
# define OS_CLOCK 204000000
|
||||
|
||||
# elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
|
||||
# define OS_CLOCK 168000000
|
||||
|
||||
# elif defined(TARGET_NRF51822)
|
||||
# define OS_CLOCK 16000000
|
||||
|
||||
# elif defined(TARGET_STM32F401RE)
|
||||
# define OS_CLOCK 84000000
|
||||
|
||||
# elif defined(TARGET_STM32F411RE)
|
||||
# define OS_CLOCK 100000000
|
||||
|
||||
#elif defined(TARGET_STM32F103RB)
|
||||
# define OS_CLOCK 72000000
|
||||
|
||||
# else
|
||||
# error "no target defined"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
// <o>Timer tick value [us] <1-1000000>
|
||||
// <i> Defines the timer tick value.
|
||||
// <i> Default: 1000 (1ms)
|
||||
#ifndef OS_TICK
|
||||
#define OS_TICK 1000
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
// <h>System Configuration
|
||||
// =======================
|
||||
//
|
||||
// <e>Round-Robin Thread switching
|
||||
// ===============================
|
||||
//
|
||||
// <i> Enables Round-Robin Thread switching.
|
||||
#ifndef OS_ROBIN
|
||||
#define OS_ROBIN 1
|
||||
#endif
|
||||
|
||||
// <o>Round-Robin Timeout [ticks] <1-1000>
|
||||
// <i> Defines how long a thread will execute before a thread switch.
|
||||
// <i> Default: 5
|
||||
#ifndef OS_ROBINTOUT
|
||||
#define OS_ROBINTOUT 5
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <e>User Timers
|
||||
// ==============
|
||||
// <i> Enables user Timers
|
||||
#ifndef OS_TIMERS
|
||||
#define OS_TIMERS 1
|
||||
#endif
|
||||
|
||||
// <o>Timer Thread Priority
|
||||
// <1=> Low
|
||||
// <2=> Below Normal
|
||||
// <3=> Normal
|
||||
// <4=> Above Normal
|
||||
// <5=> High
|
||||
// <6=> Realtime (highest)
|
||||
// <i> Defines priority for Timer Thread
|
||||
// <i> Default: High
|
||||
#ifndef OS_TIMERPRIO
|
||||
#define OS_TIMERPRIO 5
|
||||
#endif
|
||||
|
||||
// <o>Timer Callback Queue size <1-32>
|
||||
// <i> Number of concurrent active timer callback functions.
|
||||
// <i> Default: 4
|
||||
#ifndef OS_TIMERCBQSZ
|
||||
#define OS_TIMERCBQS 4
|
||||
#endif
|
||||
|
||||
// </e>
|
||||
|
||||
// <o>ISR FIFO Queue size<4=> 4 entries <8=> 8 entries
|
||||
// <12=> 12 entries <16=> 16 entries
|
||||
// <24=> 24 entries <32=> 32 entries
|
||||
// <48=> 48 entries <64=> 64 entries
|
||||
// <96=> 96 entries
|
||||
// <i> ISR functions store requests to this buffer,
|
||||
// <i> when they are called from the interrupt handler.
|
||||
// <i> Default: 16 entries
|
||||
#ifndef OS_FIFOSZ
|
||||
#define OS_FIFOSZ 16
|
||||
#endif
|
||||
|
||||
// </h>
|
||||
|
||||
//------------- <<< end of configuration section >>> -----------------------
|
||||
|
||||
// Standard library system mutexes
|
||||
// ===============================
|
||||
// Define max. number system mutexes that are used to protect
|
||||
// the arm standard runtime library. For microlib they are not used.
|
||||
#ifndef OS_MUTEXCNT
|
||||
#define OS_MUTEXCNT 12
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX User configuration part END
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* OS Idle daemon
|
||||
*---------------------------------------------------------------------------*/
|
||||
void os_idle_demon (void) {
|
||||
/* The idle demon is a system thread, running when no other thread is */
|
||||
/* ready to run. */
|
||||
|
||||
/* Sleep: ideally, we should put the chip to sleep.
|
||||
Unfortunately, this usually requires disconnecting the interface chip (debugger).
|
||||
This can be done, but it would break the local file system.
|
||||
*/
|
||||
for (;;) {
|
||||
// sleep();
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX Errors
|
||||
*---------------------------------------------------------------------------*/
|
||||
extern void mbed_die(void);
|
||||
|
||||
void os_error (uint32_t err_code) {
|
||||
/* This function is called when a runtime error is detected. Parameter */
|
||||
/* 'err_code' holds the runtime error code (defined in RTX_Conf.h). */
|
||||
mbed_die();
|
||||
}
|
||||
|
||||
void sysThreadError(osStatus status) {
|
||||
if (status != osOK) {
|
||||
mbed_die();
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* RTX Configuration Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "RTX_CM_lib.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,774 @@
|
|||
/* ----------------------------------------------------------------------
|
||||
* Copyright (C) 2012 ARM Limited. All rights reserved.
|
||||
*
|
||||
* $Date: 5. June 2012
|
||||
* $Revision: V1.01
|
||||
*
|
||||
* Project: CMSIS-RTOS API
|
||||
* Title: cmsis_os.h RTX header file
|
||||
*
|
||||
* Version 0.02
|
||||
* Initial Proposal Phase
|
||||
* Version 0.03
|
||||
* osKernelStart added, optional feature: main started as thread
|
||||
* osSemaphores have standard behavior
|
||||
* osTimerCreate does not start the timer, added osTimerStart
|
||||
* osThreadPass is renamed to osThreadYield
|
||||
* Version 1.01
|
||||
* Support for C++ interface
|
||||
* - const attribute removed from the osXxxxDef_t typedef's
|
||||
* - const attribute added to the osXxxxDef macros
|
||||
* Added: osTimerDelete, osMutexDelete, osSemaphoreDelete
|
||||
* Added: osKernelInitialize
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
/**
|
||||
\page cmsis_os_h Header File Template: cmsis_os.h
|
||||
|
||||
The file \b cmsis_os.h is a template header file for a CMSIS-RTOS compliant Real-Time Operating System (RTOS).
|
||||
Each RTOS that is compliant with CMSIS-RTOS shall provide a specific \b cmsis_os.h header file that represents
|
||||
its implementation.
|
||||
|
||||
The file cmsis_os.h contains:
|
||||
- CMSIS-RTOS API function definitions
|
||||
- struct definitions for parameters and return types
|
||||
- status and priority values used by CMSIS-RTOS API functions
|
||||
- macros for defining threads and other kernel objects
|
||||
|
||||
|
||||
<b>Name conventions and header file modifications</b>
|
||||
|
||||
All definitions are prefixed with \b os to give an unique name space for CMSIS-RTOS functions.
|
||||
Definitions that are prefixed \b os_ are not used in the application code but local to this header file.
|
||||
All definitions and functions that belong to a module are grouped and have a common prefix, i.e. \b osThread.
|
||||
|
||||
Definitions that are marked with <b>CAN BE CHANGED</b> can be adapted towards the needs of the actual CMSIS-RTOS implementation.
|
||||
These definitions can be specific to the underlying RTOS kernel.
|
||||
|
||||
Definitions that are marked with <b>MUST REMAIN UNCHANGED</b> cannot be altered. Otherwise the CMSIS-RTOS implementation is no longer
|
||||
compliant to the standard. Note that some functions are optional and need not to be provided by every CMSIS-RTOS implementation.
|
||||
|
||||
|
||||
<b>Function calls from interrupt service routines</b>
|
||||
|
||||
The following CMSIS-RTOS functions can be called from threads and interrupt service routines (ISR):
|
||||
- \ref osSignalSet
|
||||
- \ref osSemaphoreRelease
|
||||
- \ref osPoolAlloc, \ref osPoolCAlloc, \ref osPoolFree
|
||||
- \ref osMessagePut, \ref osMessageGet
|
||||
- \ref osMailAlloc, \ref osMailCAlloc, \ref osMailGet, \ref osMailPut, \ref osMailFree
|
||||
|
||||
Functions that cannot be called from an ISR are verifying the interrupt status and return in case that they are called
|
||||
from an ISR context the status code \b osErrorISR. In some implementations this condition might be caught using the HARD FAULT vector.
|
||||
|
||||
Some CMSIS-RTOS implementations support CMSIS-RTOS function calls from multiple ISR at the same time.
|
||||
If this is impossible, the CMSIS-RTOS rejects calls by nested ISR functions with the status code \b osErrorISRRecursive.
|
||||
|
||||
|
||||
<b>Define and reference object definitions</b>
|
||||
|
||||
With <b>\#define osObjectsExternal</b> objects are defined as external symbols. This allows to create a consistent header file
|
||||
that is used throughout a project as shown below:
|
||||
|
||||
<i>Header File</i>
|
||||
\code
|
||||
#include <cmsis_os.h> // CMSIS RTOS header file
|
||||
|
||||
// Thread definition
|
||||
extern void thread_sample (void const *argument); // function prototype
|
||||
osThreadDef (thread_sample, osPriorityBelowNormal, 1, 100);
|
||||
|
||||
// Pool definition
|
||||
osPoolDef(MyPool, 10, long);
|
||||
\endcode
|
||||
|
||||
|
||||
This header file defines all objects when included in a C/C++ source file. When <b>\#define osObjectsExternal</b> is
|
||||
present before the header file, the objects are defined as external symbols. A single consistent header file can therefore be
|
||||
used throughout the whole project.
|
||||
|
||||
<i>Example</i>
|
||||
\code
|
||||
#include "osObjects.h" // Definition of the CMSIS-RTOS objects
|
||||
\endcode
|
||||
|
||||
\code
|
||||
#define osObjectExternal // Objects will be defined as external symbols
|
||||
#include "osObjects.h" // Reference to the CMSIS-RTOS objects
|
||||
\endcode
|
||||
|
||||
*/
|
||||
|
||||
#ifndef _CMSIS_OS_H
|
||||
#define _CMSIS_OS_H
|
||||
|
||||
/// \note MUST REMAIN UNCHANGED: \b osCMSIS identifies the CMSIS-RTOS API version.
|
||||
#define osCMSIS 0x10001 ///< API version (main [31:16] .sub [15:0])
|
||||
|
||||
/// \note CAN BE CHANGED: \b osCMSIS_KERNEL identifies the underlying RTOS kernel and version number.
|
||||
#define osCMSIS_RTX ((4<<16)|61) ///< RTOS identification and version (main [31:16] .sub [15:0])
|
||||
|
||||
/// \note MUST REMAIN UNCHANGED: \b osKernelSystemId shall be consistent in every CMSIS-RTOS.
|
||||
#define osKernelSystemId "RTX V4.61" ///< RTOS identification string
|
||||
|
||||
|
||||
#define CMSIS_OS_RTX
|
||||
|
||||
// The stack space occupied is mainly dependent on the underling C standard library
|
||||
#if defined(TOOLCHAIN_GCC) || defined(TOOLCHAIN_ARM_STD) || defined(TOOLCHAIN_IAR)
|
||||
# define WORDS_STACK_SIZE 512
|
||||
#elif defined(TOOLCHAIN_ARM_MICRO)
|
||||
# define WORDS_STACK_SIZE 128
|
||||
#endif
|
||||
|
||||
#define DEFAULT_STACK_SIZE (WORDS_STACK_SIZE*4)
|
||||
|
||||
|
||||
/// \note MUST REMAIN UNCHANGED: \b osFeature_xxx shall be consistent in every CMSIS-RTOS.
|
||||
#define osFeature_MainThread 1 ///< main thread 1=main can be thread, 0=not available
|
||||
#define osFeature_Pool 1 ///< Memory Pools: 1=available, 0=not available
|
||||
#define osFeature_MailQ 1 ///< Mail Queues: 1=available, 0=not available
|
||||
#define osFeature_MessageQ 1 ///< Message Queues: 1=available, 0=not available
|
||||
#define osFeature_Signals 16 ///< maximum number of Signal Flags available per thread
|
||||
#define osFeature_Semaphore 65535 ///< maximum count for \ref osSemaphoreCreate function
|
||||
#define osFeature_Wait 0 ///< osWait function: 1=available, 0=not available
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
#define os_InRegs __value_in_regs // Compiler specific: force struct in registers
|
||||
#elif defined (__ICCARM__)
|
||||
#define os_InRegs __value_in_regs // Compiler specific: force struct in registers
|
||||
#else
|
||||
#define os_InRegs
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "os_tcb.h"
|
||||
|
||||
// ==== Enumeration, structures, defines ====
|
||||
|
||||
/// Priority used for thread control.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS.
|
||||
typedef enum {
|
||||
osPriorityIdle = -3, ///< priority: idle (lowest)
|
||||
osPriorityLow = -2, ///< priority: low
|
||||
osPriorityBelowNormal = -1, ///< priority: below normal
|
||||
osPriorityNormal = 0, ///< priority: normal (default)
|
||||
osPriorityAboveNormal = +1, ///< priority: above normal
|
||||
osPriorityHigh = +2, ///< priority: high
|
||||
osPriorityRealtime = +3, ///< priority: realtime (highest)
|
||||
osPriorityError = 0x84 ///< system cannot determine priority or thread has illegal priority
|
||||
} osPriority;
|
||||
|
||||
/// Timeout value.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osWaitForever shall be consistent in every CMSIS-RTOS.
|
||||
#define osWaitForever 0xFFFFFFFF ///< wait forever timeout value
|
||||
|
||||
/// Status code values returned by CMSIS-RTOS functions.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osStatus shall be consistent in every CMSIS-RTOS.
|
||||
typedef enum {
|
||||
osOK = 0, ///< function completed; no error or event occurred.
|
||||
osEventSignal = 0x08, ///< function completed; signal event occurred.
|
||||
osEventMessage = 0x10, ///< function completed; message event occurred.
|
||||
osEventMail = 0x20, ///< function completed; mail event occurred.
|
||||
osEventTimeout = 0x40, ///< function completed; timeout occurred.
|
||||
osErrorParameter = 0x80, ///< parameter error: a mandatory parameter was missing or specified an incorrect object.
|
||||
osErrorResource = 0x81, ///< resource not available: a specified resource was not available.
|
||||
osErrorTimeoutResource = 0xC1, ///< resource not available within given time: a specified resource was not available within the timeout period.
|
||||
osErrorISR = 0x82, ///< not allowed in ISR context: the function cannot be called from interrupt service routines.
|
||||
osErrorISRRecursive = 0x83, ///< function called multiple times from ISR with same object.
|
||||
osErrorPriority = 0x84, ///< system cannot determine priority or thread has illegal priority.
|
||||
osErrorNoMemory = 0x85, ///< system is out of memory: it was impossible to allocate or reserve memory for the operation.
|
||||
osErrorValue = 0x86, ///< value of a parameter is out of range.
|
||||
osErrorOS = 0xFF, ///< unspecified RTOS error: run-time error but no other error message fits.
|
||||
os_status_reserved = 0x7FFFFFFF ///< prevent from enum down-size compiler optimization.
|
||||
} osStatus;
|
||||
|
||||
|
||||
/// Timer type value for the timer definition.
|
||||
/// \note MUST REMAIN UNCHANGED: \b os_timer_type shall be consistent in every CMSIS-RTOS.
|
||||
typedef enum {
|
||||
osTimerOnce = 0, ///< one-shot timer
|
||||
osTimerPeriodic = 1 ///< repeating timer
|
||||
} os_timer_type;
|
||||
|
||||
/// Entry point of a thread.
|
||||
/// \note MUST REMAIN UNCHANGED: \b os_pthread shall be consistent in every CMSIS-RTOS.
|
||||
typedef void (*os_pthread) (void const *argument);
|
||||
|
||||
/// Entry point of a timer call back function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b os_ptimer shall be consistent in every CMSIS-RTOS.
|
||||
typedef void (*os_ptimer) (void const *argument);
|
||||
|
||||
// >>> the following data type definitions may shall adapted towards a specific RTOS
|
||||
|
||||
/// Thread ID identifies the thread (pointer to a thread control block).
|
||||
/// \note CAN BE CHANGED: \b os_thread_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_thread_cb *osThreadId;
|
||||
|
||||
/// Timer ID identifies the timer (pointer to a timer control block).
|
||||
/// \note CAN BE CHANGED: \b os_timer_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_timer_cb *osTimerId;
|
||||
|
||||
/// Mutex ID identifies the mutex (pointer to a mutex control block).
|
||||
/// \note CAN BE CHANGED: \b os_mutex_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_mutex_cb *osMutexId;
|
||||
|
||||
/// Semaphore ID identifies the semaphore (pointer to a semaphore control block).
|
||||
/// \note CAN BE CHANGED: \b os_semaphore_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_semaphore_cb *osSemaphoreId;
|
||||
|
||||
/// Pool ID identifies the memory pool (pointer to a memory pool control block).
|
||||
/// \note CAN BE CHANGED: \b os_pool_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_pool_cb *osPoolId;
|
||||
|
||||
/// Message ID identifies the message queue (pointer to a message queue control block).
|
||||
/// \note CAN BE CHANGED: \b os_messageQ_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_messageQ_cb *osMessageQId;
|
||||
|
||||
/// Mail ID identifies the mail queue (pointer to a mail queue control block).
|
||||
/// \note CAN BE CHANGED: \b os_mailQ_cb is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_mailQ_cb *osMailQId;
|
||||
|
||||
|
||||
/// Thread Definition structure contains startup information of a thread.
|
||||
/// \note CAN BE CHANGED: \b os_thread_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_thread_def {
|
||||
os_pthread pthread; ///< start address of thread function
|
||||
osPriority tpriority; ///< initial thread priority
|
||||
uint32_t stacksize; ///< stack size requirements in bytes
|
||||
unsigned char *stack_pointer; ///< pointer to the stack memory block
|
||||
struct OS_TCB tcb;
|
||||
} osThreadDef_t;
|
||||
|
||||
/// Timer Definition structure contains timer parameters.
|
||||
/// \note CAN BE CHANGED: \b os_timer_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_timer_def {
|
||||
os_ptimer ptimer; ///< start address of a timer function
|
||||
void *timer; ///< pointer to internal data
|
||||
} osTimerDef_t;
|
||||
|
||||
/// Mutex Definition structure contains setup information for a mutex.
|
||||
/// \note CAN BE CHANGED: \b os_mutex_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_mutex_def {
|
||||
void *mutex; ///< pointer to internal data
|
||||
} osMutexDef_t;
|
||||
|
||||
/// Semaphore Definition structure contains setup information for a semaphore.
|
||||
/// \note CAN BE CHANGED: \b os_semaphore_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_semaphore_def {
|
||||
void *semaphore; ///< pointer to internal data
|
||||
} osSemaphoreDef_t;
|
||||
|
||||
/// Definition structure for memory block allocation.
|
||||
/// \note CAN BE CHANGED: \b os_pool_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_pool_def {
|
||||
uint32_t pool_sz; ///< number of items (elements) in the pool
|
||||
uint32_t item_sz; ///< size of an item
|
||||
void *pool; ///< pointer to memory for pool
|
||||
} osPoolDef_t;
|
||||
|
||||
/// Definition structure for message queue.
|
||||
/// \note CAN BE CHANGED: \b os_messageQ_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_messageQ_def {
|
||||
uint32_t queue_sz; ///< number of elements in the queue
|
||||
void *pool; ///< memory array for messages
|
||||
} osMessageQDef_t;
|
||||
|
||||
/// Definition structure for mail queue.
|
||||
/// \note CAN BE CHANGED: \b os_mailQ_def is implementation specific in every CMSIS-RTOS.
|
||||
typedef struct os_mailQ_def {
|
||||
uint32_t queue_sz; ///< number of elements in the queue
|
||||
uint32_t item_sz; ///< size of an item
|
||||
void *pool; ///< memory array for mail
|
||||
} osMailQDef_t;
|
||||
|
||||
/// Event structure contains detailed information about an event.
|
||||
/// \note MUST REMAIN UNCHANGED: \b os_event shall be consistent in every CMSIS-RTOS.
|
||||
/// However the struct may be extended at the end.
|
||||
typedef struct {
|
||||
osStatus status; ///< status code: event or error information
|
||||
union {
|
||||
uint32_t v; ///< message as 32-bit value
|
||||
void *p; ///< message or mail as void pointer
|
||||
int32_t signals; ///< signal flags
|
||||
} value; ///< event value
|
||||
union {
|
||||
osMailQId mail_id; ///< mail id obtained by \ref osMailCreate
|
||||
osMessageQId message_id; ///< message id obtained by \ref osMessageCreate
|
||||
} def; ///< event definition
|
||||
} osEvent;
|
||||
|
||||
|
||||
// ==== Kernel Control Functions ====
|
||||
|
||||
/// Initialize the RTOS Kernel for creating objects.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osKernelInitialize shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osKernelInitialize (void);
|
||||
|
||||
/// Start the RTOS Kernel.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osKernelStart (void);
|
||||
|
||||
/// Check if the RTOS kernel is already started.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osKernelRunning shall be consistent in every CMSIS-RTOS.
|
||||
/// \return 0 RTOS is not started, 1 RTOS is started.
|
||||
int32_t osKernelRunning(void);
|
||||
|
||||
|
||||
// ==== Thread Management ====
|
||||
|
||||
/// Create a Thread Definition with function, priority, and stack requirements.
|
||||
/// \param name name of the thread function.
|
||||
/// \param priority initial priority of the thread function.
|
||||
/// \param stacksz stack size (in bytes) requirements for the thread function.
|
||||
/// \note CAN BE CHANGED: The parameters to \b osThreadDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osThreadDef(name, priority, stacksz) \
|
||||
extern osThreadDef_t os_thread_def_##name
|
||||
#else // define the object
|
||||
#define osThreadDef(name, priority, stacksz) \
|
||||
unsigned char os_thread_def_stack_##name [stacksz]; \
|
||||
osThreadDef_t os_thread_def_##name = \
|
||||
{ (name), (priority), (stacksz), (os_thread_def_stack_##name)}
|
||||
#endif
|
||||
|
||||
/// Access a Thread definition.
|
||||
/// \param name name of the thread definition object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osThread shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osThread(name) \
|
||||
&os_thread_def_##name
|
||||
|
||||
/// Create a thread and add it to Active Threads and set it to state READY.
|
||||
/// \param[in] thread_def thread definition referenced with \ref osThread.
|
||||
/// \param[in] argument pointer that is passed to the thread function as start argument.
|
||||
/// \return thread ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS.
|
||||
osThreadId osThreadCreate (osThreadDef_t *thread_def, void *argument);
|
||||
|
||||
/// Return the thread ID of the current running thread.
|
||||
/// \return thread ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadGetId shall be consistent in every CMSIS-RTOS.
|
||||
osThreadId osThreadGetId (void);
|
||||
|
||||
/// Terminate execution of a thread and remove it from Active Threads.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadTerminate shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osThreadTerminate (osThreadId thread_id);
|
||||
|
||||
/// Pass control to next thread that is in state \b READY.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadYield shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osThreadYield (void);
|
||||
|
||||
/// Change priority of an active thread.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \param[in] priority new priority value for the thread function.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadSetPriority shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osThreadSetPriority (osThreadId thread_id, osPriority priority);
|
||||
|
||||
/// Get current priority of an active thread.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \return current priority value of the thread function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osThreadGetPriority shall be consistent in every CMSIS-RTOS.
|
||||
osPriority osThreadGetPriority (osThreadId thread_id);
|
||||
|
||||
|
||||
// ==== Generic Wait Functions ====
|
||||
|
||||
/// Wait for Timeout (Time Delay).
|
||||
/// \param[in] millisec time delay value
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
osStatus osDelay (uint32_t millisec);
|
||||
|
||||
#if (defined (osFeature_Wait) && (osFeature_Wait != 0)) // Generic Wait available
|
||||
|
||||
/// Wait for Signal, Message, Mail, or Timeout.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out
|
||||
/// \return event that contains signal, message, or mail information or error code.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osWait shall be consistent in every CMSIS-RTOS.
|
||||
os_InRegs osEvent osWait (uint32_t millisec);
|
||||
|
||||
#endif // Generic Wait available
|
||||
|
||||
|
||||
// ==== Timer Management Functions ====
|
||||
/// Define a Timer object.
|
||||
/// \param name name of the timer object.
|
||||
/// \param function name of the timer call back function.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osTimerDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osTimerDef(name, function) \
|
||||
extern osTimerDef_t os_timer_def_##name
|
||||
#else // define the object
|
||||
#define osTimerDef(name, function) \
|
||||
uint32_t os_timer_cb_##name[5]; \
|
||||
osTimerDef_t os_timer_def_##name = \
|
||||
{ (function), (os_timer_cb_##name) }
|
||||
#endif
|
||||
|
||||
/// Access a Timer definition.
|
||||
/// \param name name of the timer object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osTimer shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osTimer(name) \
|
||||
&os_timer_def_##name
|
||||
|
||||
/// Create a timer.
|
||||
/// \param[in] timer_def timer object referenced with \ref osTimer.
|
||||
/// \param[in] type osTimerOnce for one-shot or osTimerPeriodic for periodic behavior.
|
||||
/// \param[in] argument argument to the timer call back function.
|
||||
/// \return timer ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osTimerCreate shall be consistent in every CMSIS-RTOS.
|
||||
osTimerId osTimerCreate (osTimerDef_t *timer_def, os_timer_type type, void *argument);
|
||||
|
||||
/// Start or restart a timer.
|
||||
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
|
||||
/// \param[in] millisec time delay value of the timer.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osTimerStart shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osTimerStart (osTimerId timer_id, uint32_t millisec);
|
||||
|
||||
/// Stop the timer.
|
||||
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osTimerStop shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osTimerStop (osTimerId timer_id);
|
||||
|
||||
/// Delete a timer that was created by \ref osTimerCreate.
|
||||
/// \param[in] timer_id timer ID obtained by \ref osTimerCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osTimerDelete shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osTimerDelete (osTimerId timer_id);
|
||||
|
||||
|
||||
// ==== Signal Management ====
|
||||
|
||||
/// Set the specified Signal Flags of an active thread.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \param[in] signals specifies the signal flags of the thread that should be set.
|
||||
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSignalSet shall be consistent in every CMSIS-RTOS.
|
||||
int32_t osSignalSet (osThreadId thread_id, int32_t signals);
|
||||
|
||||
/// Clear the specified Signal Flags of an active thread.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \param[in] signals specifies the signal flags of the thread that shall be cleared.
|
||||
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSignalClear shall be consistent in every CMSIS-RTOS.
|
||||
int32_t osSignalClear (osThreadId thread_id, int32_t signals);
|
||||
|
||||
/// Get Signal Flags status of an active thread.
|
||||
/// \param[in] thread_id thread ID obtained by \ref osThreadCreate or \ref osThreadGetId.
|
||||
/// \return previous signal flags of the specified thread or 0x80000000 in case of incorrect parameters.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSignalGet shall be consistent in every CMSIS-RTOS.
|
||||
int32_t osSignalGet (osThreadId thread_id);
|
||||
|
||||
/// Wait for one or more Signal Flags to become signaled for the current \b RUNNING thread.
|
||||
/// \param[in] signals wait until all specified signal flags set or 0 for any single signal flag.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out.
|
||||
/// \return event flag information or error code.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSignalWait shall be consistent in every CMSIS-RTOS.
|
||||
os_InRegs osEvent osSignalWait (int32_t signals, uint32_t millisec);
|
||||
|
||||
|
||||
// ==== Mutex Management ====
|
||||
|
||||
/// Define a Mutex.
|
||||
/// \param name name of the mutex object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMutexDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osMutexDef(name) \
|
||||
extern osMutexDef_t os_mutex_def_##name
|
||||
#else // define the object
|
||||
#define osMutexDef(name) \
|
||||
uint32_t os_mutex_cb_##name[3]; \
|
||||
osMutexDef_t os_mutex_def_##name = { (os_mutex_cb_##name) }
|
||||
#endif
|
||||
|
||||
/// Access a Mutex definition.
|
||||
/// \param name name of the mutex object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMutex shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osMutex(name) \
|
||||
&os_mutex_def_##name
|
||||
|
||||
/// Create and Initialize a Mutex object.
|
||||
/// \param[in] mutex_def mutex definition referenced with \ref osMutex.
|
||||
/// \return mutex ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMutexCreate shall be consistent in every CMSIS-RTOS.
|
||||
osMutexId osMutexCreate (osMutexDef_t *mutex_def);
|
||||
|
||||
/// Wait until a Mutex becomes available.
|
||||
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMutexWait shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMutexWait (osMutexId mutex_id, uint32_t millisec);
|
||||
|
||||
/// Release a Mutex that was obtained by \ref osMutexWait.
|
||||
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMutexRelease shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMutexRelease (osMutexId mutex_id);
|
||||
|
||||
/// Delete a Mutex that was created by \ref osMutexCreate.
|
||||
/// \param[in] mutex_id mutex ID obtained by \ref osMutexCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMutexDelete shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMutexDelete (osMutexId mutex_id);
|
||||
|
||||
|
||||
// ==== Semaphore Management Functions ====
|
||||
|
||||
#if (defined (osFeature_Semaphore) && (osFeature_Semaphore != 0)) // Semaphore available
|
||||
|
||||
/// Define a Semaphore object.
|
||||
/// \param name name of the semaphore object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osSemaphoreDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osSemaphoreDef(name) \
|
||||
extern osSemaphoreDef_t os_semaphore_def_##name
|
||||
#else // define the object
|
||||
#define osSemaphoreDef(name) \
|
||||
uint32_t os_semaphore_cb_##name[2]; \
|
||||
osSemaphoreDef_t os_semaphore_def_##name = { (os_semaphore_cb_##name) }
|
||||
#endif
|
||||
|
||||
/// Access a Semaphore definition.
|
||||
/// \param name name of the semaphore object.
|
||||
/// \note CAN BE CHANGED: The parameter to \b osSemaphore shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osSemaphore(name) \
|
||||
&os_semaphore_def_##name
|
||||
|
||||
/// Create and Initialize a Semaphore object used for managing resources.
|
||||
/// \param[in] semaphore_def semaphore definition referenced with \ref osSemaphore.
|
||||
/// \param[in] count number of available resources.
|
||||
/// \return semaphore ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreCreate shall be consistent in every CMSIS-RTOS.
|
||||
osSemaphoreId osSemaphoreCreate (osSemaphoreDef_t *semaphore_def, int32_t count);
|
||||
|
||||
/// Wait until a Semaphore token becomes available.
|
||||
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out.
|
||||
/// \return number of available tokens, or -1 in case of incorrect parameters.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreWait shall be consistent in every CMSIS-RTOS.
|
||||
int32_t osSemaphoreWait (osSemaphoreId semaphore_id, uint32_t millisec);
|
||||
|
||||
/// Release a Semaphore token.
|
||||
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreRelease shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osSemaphoreRelease (osSemaphoreId semaphore_id);
|
||||
|
||||
/// Delete a Semaphore that was created by \ref osSemaphoreCreate.
|
||||
/// \param[in] semaphore_id semaphore object referenced with \ref osSemaphoreCreate.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osSemaphoreDelete shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osSemaphoreDelete (osSemaphoreId semaphore_id);
|
||||
|
||||
#endif // Semaphore available
|
||||
|
||||
|
||||
// ==== Memory Pool Management Functions ====
|
||||
|
||||
#if (defined (osFeature_Pool) && (osFeature_Pool != 0)) // Memory Pool Management available
|
||||
|
||||
/// \brief Define a Memory Pool.
|
||||
/// \param name name of the memory pool.
|
||||
/// \param no maximum number of blocks (objects) in the memory pool.
|
||||
/// \param type data type of a single block (object).
|
||||
/// \note CAN BE CHANGED: The parameter to \b osPoolDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osPoolDef(name, no, type) \
|
||||
extern osPoolDef_t os_pool_def_##name
|
||||
#else // define the object
|
||||
#define osPoolDef(name, no, type) \
|
||||
uint32_t os_pool_m_##name[3+((sizeof(type)+3)/4)*(no)]; \
|
||||
osPoolDef_t os_pool_def_##name = \
|
||||
{ (no), sizeof(type), (os_pool_m_##name) }
|
||||
#endif
|
||||
|
||||
/// \brief Access a Memory Pool definition.
|
||||
/// \param name name of the memory pool
|
||||
/// \note CAN BE CHANGED: The parameter to \b osPool shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osPool(name) \
|
||||
&os_pool_def_##name
|
||||
|
||||
/// Create and Initialize a memory pool.
|
||||
/// \param[in] pool_def memory pool definition referenced with \ref osPool.
|
||||
/// \return memory pool ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osPoolCreate shall be consistent in every CMSIS-RTOS.
|
||||
osPoolId osPoolCreate (osPoolDef_t *pool_def);
|
||||
|
||||
/// Allocate a memory block from a memory pool.
|
||||
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
|
||||
/// \return address of the allocated memory block or NULL in case of no memory available.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osPoolAlloc shall be consistent in every CMSIS-RTOS.
|
||||
void *osPoolAlloc (osPoolId pool_id);
|
||||
|
||||
/// Allocate a memory block from a memory pool and set memory block to zero.
|
||||
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
|
||||
/// \return address of the allocated memory block or NULL in case of no memory available.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osPoolCAlloc shall be consistent in every CMSIS-RTOS.
|
||||
void *osPoolCAlloc (osPoolId pool_id);
|
||||
|
||||
/// Return an allocated memory block back to a specific memory pool.
|
||||
/// \param[in] pool_id memory pool ID obtain referenced with \ref osPoolCreate.
|
||||
/// \param[in] block address of the allocated memory block that is returned to the memory pool.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osPoolFree shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osPoolFree (osPoolId pool_id, void *block);
|
||||
|
||||
#endif // Memory Pool Management available
|
||||
|
||||
|
||||
// ==== Message Queue Management Functions ====
|
||||
|
||||
#if (defined (osFeature_MessageQ) && (osFeature_MessageQ != 0)) // Message Queues available
|
||||
|
||||
/// \brief Create a Message Queue Definition.
|
||||
/// \param name name of the queue.
|
||||
/// \param queue_sz maximum number of messages in the queue.
|
||||
/// \param type data type of a single message element (for debugger).
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMessageQDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osMessageQDef(name, queue_sz, type) \
|
||||
extern osMessageQDef_t os_messageQ_def_##name
|
||||
#else // define the object
|
||||
#define osMessageQDef(name, queue_sz, type) \
|
||||
uint32_t os_messageQ_q_##name[4+(queue_sz)]; \
|
||||
osMessageQDef_t os_messageQ_def_##name = \
|
||||
{ (queue_sz), (os_messageQ_q_##name) }
|
||||
#endif
|
||||
|
||||
/// \brief Access a Message Queue Definition.
|
||||
/// \param name name of the queue
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMessageQ shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osMessageQ(name) \
|
||||
&os_messageQ_def_##name
|
||||
|
||||
/// Create and Initialize a Message Queue.
|
||||
/// \param[in] queue_def queue definition referenced with \ref osMessageQ.
|
||||
/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
|
||||
/// \return message queue ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMessageCreate shall be consistent in every CMSIS-RTOS.
|
||||
osMessageQId osMessageCreate (osMessageQDef_t *queue_def, osThreadId thread_id);
|
||||
|
||||
/// Put a Message to a Queue.
|
||||
/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate.
|
||||
/// \param[in] info message information.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec);
|
||||
|
||||
/// Get a Message or Wait for a Message from a Queue.
|
||||
/// \param[in] queue_id message queue ID obtained with \ref osMessageCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out.
|
||||
/// \return event information that includes status code.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMessageGet shall be consistent in every CMSIS-RTOS.
|
||||
os_InRegs osEvent osMessageGet (osMessageQId queue_id, uint32_t millisec);
|
||||
|
||||
#endif // Message Queues available
|
||||
|
||||
|
||||
// ==== Mail Queue Management Functions ====
|
||||
|
||||
#if (defined (osFeature_MailQ) && (osFeature_MailQ != 0)) // Mail Queues available
|
||||
|
||||
/// \brief Create a Mail Queue Definition.
|
||||
/// \param name name of the queue
|
||||
/// \param queue_sz maximum number of messages in queue
|
||||
/// \param type data type of a single message element
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMailQDef shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#if defined (osObjectsExternal) // object is external
|
||||
#define osMailQDef(name, queue_sz, type) \
|
||||
extern osMailQDef_t os_mailQ_def_##name
|
||||
#else // define the object
|
||||
#define osMailQDef(name, queue_sz, type) \
|
||||
uint32_t os_mailQ_q_##name[4+(queue_sz)]; \
|
||||
uint32_t os_mailQ_m_##name[3+((sizeof(type)+3)/4)*(queue_sz)]; \
|
||||
void * os_mailQ_p_##name[2] = { (os_mailQ_q_##name), os_mailQ_m_##name }; \
|
||||
osMailQDef_t os_mailQ_def_##name = \
|
||||
{ (queue_sz), sizeof(type), (os_mailQ_p_##name) }
|
||||
#endif
|
||||
|
||||
/// \brief Access a Mail Queue Definition.
|
||||
/// \param name name of the queue
|
||||
/// \note CAN BE CHANGED: The parameter to \b osMailQ shall be consistent but the
|
||||
/// macro body is implementation specific in every CMSIS-RTOS.
|
||||
#define osMailQ(name) \
|
||||
&os_mailQ_def_##name
|
||||
|
||||
/// Create and Initialize mail queue.
|
||||
/// \param[in] queue_def reference to the mail queue definition obtain with \ref osMailQ
|
||||
/// \param[in] thread_id thread ID (obtained by \ref osThreadCreate or \ref osThreadGetId) or NULL.
|
||||
/// \return mail queue ID for reference by other functions or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailCreate shall be consistent in every CMSIS-RTOS.
|
||||
osMailQId osMailCreate (osMailQDef_t *queue_def, osThreadId thread_id);
|
||||
|
||||
/// Allocate a memory block from a mail.
|
||||
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out
|
||||
/// \return pointer to memory block that can be filled with mail or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailAlloc shall be consistent in every CMSIS-RTOS.
|
||||
void *osMailAlloc (osMailQId queue_id, uint32_t millisec);
|
||||
|
||||
/// Allocate a memory block from a mail and set memory block to zero.
|
||||
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out
|
||||
/// \return pointer to memory block that can be filled with mail or NULL in case of error.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailCAlloc shall be consistent in every CMSIS-RTOS.
|
||||
void *osMailCAlloc (osMailQId queue_id, uint32_t millisec);
|
||||
|
||||
/// Put a mail to a queue.
|
||||
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
|
||||
/// \param[in] mail memory block previously allocated with \ref osMailAlloc or \ref osMailCAlloc.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailPut shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMailPut (osMailQId queue_id, void *mail);
|
||||
|
||||
/// Get a mail from a queue.
|
||||
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
|
||||
/// \param[in] millisec timeout value or 0 in case of no time-out
|
||||
/// \return event that contains mail information or error code.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailGet shall be consistent in every CMSIS-RTOS.
|
||||
os_InRegs osEvent osMailGet (osMailQId queue_id, uint32_t millisec);
|
||||
|
||||
/// Free a memory block from a mail.
|
||||
/// \param[in] queue_id mail queue ID obtained with \ref osMailCreate.
|
||||
/// \param[in] mail pointer to the memory block that was obtained with \ref osMailGet.
|
||||
/// \return status code that indicates the execution status of the function.
|
||||
/// \note MUST REMAIN UNCHANGED: \b osMailFree shall be consistent in every CMSIS-RTOS.
|
||||
osStatus osMailFree (osMailQId queue_id, void *mail);
|
||||
|
||||
#endif // Mail Queues available
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _CMSIS_OS_H
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
#ifndef OS_TCB_H
|
||||
#define OS_TCB_H
|
||||
|
||||
/* Types */
|
||||
typedef char S8;
|
||||
typedef unsigned char U8;
|
||||
typedef short S16;
|
||||
typedef unsigned short U16;
|
||||
typedef int S32;
|
||||
typedef unsigned int U32;
|
||||
typedef long long S64;
|
||||
typedef unsigned long long U64;
|
||||
typedef unsigned char BIT;
|
||||
typedef unsigned int BOOL;
|
||||
typedef void (*FUNCP)(void);
|
||||
#define TCB_STACK_LR_OFFSET_BYTES (14*4) // prelast DWORD
|
||||
#define TCB_STACK_LR_OFFSET_DWORDS (14) // prelast DWORD
|
||||
#define TCB_STACK_R0_OFFSET_BYTES (1*4) // second DWORD
|
||||
#define TCB_STACK_R0_OFFSET_DWORDS (1) // second DWORD
|
||||
|
||||
typedef struct OS_TCB {
|
||||
/* General part: identical for all implementations. */
|
||||
U8 cb_type; /* Control Block Type */
|
||||
U8 state; /* Task state */
|
||||
U8 prio; /* Execution priority */
|
||||
U8 task_id; /* Task ID value for optimized TCB access */
|
||||
struct OS_TCB *p_lnk; /* Link pointer for ready/sem. wait list */
|
||||
struct OS_TCB *p_rlnk; /* Link pointer for sem./mbx lst backwards */
|
||||
struct OS_TCB *p_dlnk; /* Link pointer for delay list */
|
||||
struct OS_TCB *p_blnk; /* Link pointer for delay list backwards */
|
||||
U16 delta_time; /* Time until time out */
|
||||
U16 interval_time; /* Time interval for periodic waits */
|
||||
U16 events; /* Event flags */
|
||||
U16 waits; /* Wait flags */
|
||||
void **msg; /* Direct message passing when task waits */
|
||||
|
||||
/* Hardware dependant part: specific for CM processor */
|
||||
U8 stack_frame; /* Stack frame: 0=Basic, 1=Extended */
|
||||
U8 reserved;
|
||||
U16 priv_stack; /* Private stack size in bytes */
|
||||
U32 tsk_stack; /* Current task Stack pointer (R13) */
|
||||
U32 *stack; /* Pointer to Task Stack memory block */
|
||||
|
||||
/* Library dependant part */
|
||||
#if defined (__CC_ARM) && !defined (__MICROLIB)
|
||||
/* A memory space for arm standard library. */
|
||||
U32 std_libspace[96/4];
|
||||
#endif
|
||||
|
||||
/* Task entry point used for uVision debugger */
|
||||
FUNCP ptask; /* Task entry address */
|
||||
} *P_TCB;
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,190 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_EVENT.C
|
||||
* Purpose: Implements waits and wake-ups for event flags
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_Event.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_evt_wait -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_evt_wait (U16 wait_flags, U16 timeout, BOOL and_wait) {
|
||||
/* Wait for one or more event flags with optional time-out. */
|
||||
/* "wait_flags" identifies the flags to wait for. */
|
||||
/* "timeout" is the time-out limit in system ticks (0xffff if no time-out) */
|
||||
/* "and_wait" specifies the AND-ing of "wait_flags" as condition to be met */
|
||||
/* to complete the wait. (OR-ing if set to 0). */
|
||||
U32 block_state;
|
||||
|
||||
if (and_wait) {
|
||||
/* Check for AND-connected events */
|
||||
if ((os_tsk.run->events & wait_flags) == wait_flags) {
|
||||
os_tsk.run->events &= ~wait_flags;
|
||||
return (OS_R_EVT);
|
||||
}
|
||||
block_state = WAIT_AND;
|
||||
}
|
||||
else {
|
||||
/* Check for OR-connected events */
|
||||
if (os_tsk.run->events & wait_flags) {
|
||||
os_tsk.run->waits = os_tsk.run->events & wait_flags;
|
||||
os_tsk.run->events &= ~wait_flags;
|
||||
return (OS_R_EVT);
|
||||
}
|
||||
block_state = WAIT_OR;
|
||||
}
|
||||
/* Task has to wait */
|
||||
os_tsk.run->waits = wait_flags;
|
||||
rt_block (timeout, (U8)block_state);
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_evt_set ------------------------------------*/
|
||||
|
||||
void rt_evt_set (U16 event_flags, OS_TID task_id) {
|
||||
/* Set one or more event flags of a selectable task. */
|
||||
P_TCB p_tcb;
|
||||
|
||||
p_tcb = os_active_TCB[task_id-1];
|
||||
if (p_tcb == NULL) {
|
||||
return;
|
||||
}
|
||||
p_tcb->events |= event_flags;
|
||||
event_flags = p_tcb->waits;
|
||||
/* If the task is not waiting for an event, it should not be put */
|
||||
/* to ready state. */
|
||||
if (p_tcb->state == WAIT_AND) {
|
||||
/* Check for AND-connected events */
|
||||
if ((p_tcb->events & event_flags) == event_flags) {
|
||||
goto wkup;
|
||||
}
|
||||
}
|
||||
if (p_tcb->state == WAIT_OR) {
|
||||
/* Check for OR-connected events */
|
||||
if (p_tcb->events & event_flags) {
|
||||
p_tcb->waits &= p_tcb->events;
|
||||
wkup: p_tcb->events &= ~event_flags;
|
||||
rt_rmv_dly (p_tcb);
|
||||
p_tcb->state = READY;
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val2(p_tcb, 0x08/*osEventSignal*/, p_tcb->waits);
|
||||
#else
|
||||
rt_ret_val (p_tcb, OS_R_EVT);
|
||||
#endif
|
||||
rt_dispatch (p_tcb);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_evt_clr ------------------------------------*/
|
||||
|
||||
void rt_evt_clr (U16 clear_flags, OS_TID task_id) {
|
||||
/* Clear one or more event flags (identified by "clear_flags") of a */
|
||||
/* selectable task (identified by "task"). */
|
||||
P_TCB task = os_active_TCB[task_id-1];
|
||||
|
||||
if (task == NULL) {
|
||||
return;
|
||||
}
|
||||
task->events &= ~clear_flags;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- isr_evt_set -----------------------------------*/
|
||||
|
||||
void isr_evt_set (U16 event_flags, OS_TID task_id) {
|
||||
/* Same function as "os_evt_set", but to be called by ISRs. */
|
||||
P_TCB p_tcb = os_active_TCB[task_id-1];
|
||||
|
||||
if (p_tcb == NULL) {
|
||||
return;
|
||||
}
|
||||
rt_psq_enq (p_tcb, event_flags);
|
||||
rt_psh_req ();
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_evt_get ------------------------------------*/
|
||||
|
||||
U16 rt_evt_get (void) {
|
||||
/* Get events of a running task after waiting for OR connected events. */
|
||||
return (os_tsk.run->waits);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_evt_psh ------------------------------------*/
|
||||
|
||||
void rt_evt_psh (P_TCB p_CB, U16 set_flags) {
|
||||
/* Check if task has to be waken up */
|
||||
U16 event_flags;
|
||||
|
||||
p_CB->events |= set_flags;
|
||||
event_flags = p_CB->waits;
|
||||
if (p_CB->state == WAIT_AND) {
|
||||
/* Check for AND-connected events */
|
||||
if ((p_CB->events & event_flags) == event_flags) {
|
||||
goto rdy;
|
||||
}
|
||||
}
|
||||
if (p_CB->state == WAIT_OR) {
|
||||
/* Check for OR-connected events */
|
||||
if (p_CB->events & event_flags) {
|
||||
p_CB->waits &= p_CB->events;
|
||||
rdy: p_CB->events &= ~event_flags;
|
||||
rt_rmv_dly (p_CB);
|
||||
p_CB->state = READY;
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val2(p_CB, 0x08/*osEventSignal*/, p_CB->waits);
|
||||
#else
|
||||
rt_ret_val (p_CB, OS_R_EVT);
|
||||
#endif
|
||||
rt_put_prio (&os_rdy, p_CB);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_EVENT.H
|
||||
* Purpose: Implements waits and wake-ups for event flags
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Functions */
|
||||
extern OS_RESULT rt_evt_wait (U16 wait_flags, U16 timeout, BOOL and_wait);
|
||||
extern void rt_evt_set (U16 event_flags, OS_TID task_id);
|
||||
extern void rt_evt_clr (U16 clear_flags, OS_TID task_id);
|
||||
extern void isr_evt_set (U16 event_flags, OS_TID task_id);
|
||||
extern U16 rt_evt_get (void);
|
||||
extern void rt_evt_psh (P_TCB p_CB, U16 set_flags);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,227 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_HAL_CM.H
|
||||
* Purpose: Hardware Abstraction Layer for Cortex-M definitions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "cmsis.h"
|
||||
/* Definitions */
|
||||
#define INITIAL_xPSR 0x00000010
|
||||
#define DEMCR_TRCENA 0x01000000
|
||||
#define ITM_ITMENA 0x00000001
|
||||
#define MAGIC_WORD 0xE25A2EA5
|
||||
|
||||
#define SYS_TICK_IRQn TIMER0_IRQn
|
||||
|
||||
extern void rt_set_PSP (U32 stack);
|
||||
extern U32 rt_get_PSP (void);
|
||||
extern void os_set_env (void);
|
||||
extern void SysTick_Handler (void);
|
||||
extern void *_alloc_box (void *box_mem);
|
||||
extern int _free_box (void *box_mem, void *box);
|
||||
|
||||
extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body);
|
||||
extern void rt_ret_val (P_TCB p_TCB, U32 v0);
|
||||
extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1);
|
||||
|
||||
extern void dbg_init (void);
|
||||
extern void dbg_task_notify (P_TCB p_tcb, BOOL create);
|
||||
extern void dbg_task_switch (U32 task_id);
|
||||
|
||||
|
||||
#if defined (__CC_ARM) /* ARM Compiler */
|
||||
|
||||
#if ((__TARGET_ARCH_7_M || __TARGET_ARCH_7E_M) && !NO_EXCLUSIVE_ACCESS)
|
||||
#define __USE_EXCLUSIVE_ACCESS
|
||||
#else
|
||||
#undef __USE_EXCLUSIVE_ACCESS
|
||||
#endif
|
||||
|
||||
#elif defined (__GNUC__) /* GNU Compiler */
|
||||
|
||||
#undef __USE_EXCLUSIVE_ACCESS
|
||||
|
||||
#if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS)
|
||||
#define __TARGET_ARCH_6S_M 1
|
||||
#else
|
||||
#define __TARGET_ARCH_6S_M 0
|
||||
#endif
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
#define __TARGET_FPU_VFP 1
|
||||
#else
|
||||
#define __TARGET_FPU_VFP 0
|
||||
#endif
|
||||
|
||||
#define __inline inline
|
||||
#define __weak __attribute__((weak))
|
||||
|
||||
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
|
||||
#undef __USE_EXCLUSIVE_ACCESS
|
||||
|
||||
#if (__CORE__ == __ARM6M__)
|
||||
#define __TARGET_ARCH_6S_M 1
|
||||
#else
|
||||
#define __TARGET_ARCH_6S_M 0
|
||||
#endif
|
||||
|
||||
#if defined __ARMVFP__
|
||||
#define __TARGET_FPU_VFP 1
|
||||
#else
|
||||
#define __TARGET_FPU_VFP 0
|
||||
#endif
|
||||
|
||||
#define __inline inline
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* NVIC registers */
|
||||
|
||||
#define OS_PEND_IRQ() NVIC_PendIRQ(SYS_TICK_IRQn)
|
||||
#define OS_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
||||
#define OS_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
||||
#define OS_PEND(fl,p) NVIC_INT_CTRL = (fl | p<<2) << 26
|
||||
#define OS_LOCK() NVIC_DisableIRQ(SYS_TICK_IRQn)
|
||||
#define OS_UNLOCK() NVIC_EnableIRQ(SYS_TICK_IRQn)
|
||||
|
||||
#define OS_X_PENDING NVIC_PendingIRQ(SYS_TICK_IRQn)
|
||||
#define OS_X_UNPEND(fl) NVIC_UnpendIRQ(SYS_TICK_IRQn)
|
||||
#define OS_X_PEND(fl,p) NVIC_PendIRQ(p)
|
||||
|
||||
#define OS_X_INIT(n) NVIC_EnableIRQ(n)
|
||||
#define OS_X_LOCK(n) NVIC_DisableIRQ(n)
|
||||
#define OS_X_UNLOCK(n) NVIC_EnableIRQ(n)
|
||||
|
||||
/* Core Debug registers */
|
||||
//#define DEMCR (*((volatile U32 *)0xE000EDFC))
|
||||
|
||||
/* ITM registers */
|
||||
//#define ITM_CONTROL (*((volatile U32 *)0xE0000E80))
|
||||
//#define ITM_ENABLE (*((volatile U32 *)0xE0000E00))
|
||||
//#define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078))
|
||||
//#define ITM_PORT31_U32 (*((volatile U32 *)0xE000007C))
|
||||
//#define ITM_PORT31_U16 (*((volatile U16 *)0xE000007C))
|
||||
//#define ITM_PORT31_U8 (*((volatile U8 *)0xE000007C))
|
||||
|
||||
/* Variables */
|
||||
extern BIT dbg_msg;
|
||||
|
||||
/* Functions */
|
||||
#ifdef __USE_EXCLUSIVE_ACCESS
|
||||
#define rt_inc(p) while(__strex((__ldrex(p)+1),p))
|
||||
#define rt_dec(p) while(__strex((__ldrex(p)-1),p))
|
||||
#else
|
||||
#define rt_inc(p) __disable_irq();(*p)++;__enable_irq();
|
||||
#define rt_dec(p) __disable_irq();(*p)--;__enable_irq();
|
||||
#endif
|
||||
|
||||
__inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) {
|
||||
U32 cnt,c2;
|
||||
#ifdef __USE_EXCLUSIVE_ACCESS
|
||||
do {
|
||||
if ((cnt = __ldrex(count)) == size) {
|
||||
__clrex();
|
||||
return (cnt); }
|
||||
} while (__strex(cnt+1, count));
|
||||
do {
|
||||
c2 = (cnt = __ldrex(first)) + 1;
|
||||
if (c2 == size) c2 = 0;
|
||||
} while (__strex(c2, first));
|
||||
#else
|
||||
__disable_irq();
|
||||
if ((cnt = *count) < size) {
|
||||
*count = cnt+1;
|
||||
c2 = (cnt = *first) + 1;
|
||||
if (c2 == size) c2 = 0;
|
||||
*first = c2;
|
||||
}
|
||||
__enable_irq ();
|
||||
#endif
|
||||
return (cnt);
|
||||
}
|
||||
|
||||
__inline static void rt_systick_init (void) {
|
||||
#if SYS_TICK_IRQn == TIMER0_IRQn
|
||||
#define SYS_TICK_TIMER LPC_TIM0
|
||||
LPC_SC->PCONP |= PCTIM0;
|
||||
LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<3))) | (1<<2); //PCLK == CPUCLK
|
||||
#elif SYS_TICK_IRQn == TIMER1_IRQn
|
||||
#define SYS_TICK_TIMER LPC_TIM1
|
||||
LPC_SC->PCONP |= PCTIM1;
|
||||
LPC_SC->PCLKSEL0 = (LPC_SC->PCLKSEL0 & (~(1<<5))) | (1<<4); //PCLK == CPUCLK
|
||||
#elif SYS_TICK_IRQn == TIMER2_IRQn
|
||||
#define SYS_TICK_TIMER LPC_TIM2
|
||||
LPC_SC->PCONP |= PCTIM2;
|
||||
LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<13))) | (1<<12); //PCLK == CPUCLK
|
||||
#else
|
||||
#define SYS_TICK_TIMER LPC_TIM3
|
||||
LPC_SC->PCONP |= PCTIM3;
|
||||
LPC_SC->PCLKSEL1 = (LPC_SC->PCLKSEL1 & (~(1<<15))) | (1<<14); //PCLK == CPUCLK
|
||||
#endif
|
||||
|
||||
// setup Timer to count forever
|
||||
//interrupt_reg
|
||||
SYS_TICK_TIMER->TCR = 2; // reset & disable timer 0
|
||||
SYS_TICK_TIMER->TC = os_trv;
|
||||
SYS_TICK_TIMER->PR = 0; // set the prescale divider
|
||||
//Reset of TC and Interrupt when MR3 MR2 matches TC
|
||||
SYS_TICK_TIMER->MCR = (1 << 6) |(1 << 7); //TMCR_MR3_R_Msk | TMCR_MR3_I_Msk
|
||||
SYS_TICK_TIMER->MR3 = os_trv; // match registers
|
||||
SYS_TICK_TIMER->CCR = 0; // disable compare registers
|
||||
SYS_TICK_TIMER->EMR = 0; // disable external match register
|
||||
// initialize the interrupt vector
|
||||
NVIC_SetVector(SYS_TICK_IRQn, (uint32_t)&SysTick_Handler);
|
||||
SYS_TICK_TIMER->TCR = 1; // enable timer 0
|
||||
}
|
||||
|
||||
__inline static void rt_svc_init (void) {
|
||||
// TODO: add svcInit
|
||||
|
||||
}
|
||||
|
||||
#ifdef DBG_MSG
|
||||
#define DBG_INIT() dbg_init()
|
||||
#define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create)
|
||||
#define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk != os_tsk.run)) \
|
||||
dbg_task_switch(task_id)
|
||||
#else
|
||||
#define DBG_INIT()
|
||||
#define DBG_TASK_NOTIFY(p_tcb,create)
|
||||
#define DBG_TASK_SWITCH(task_id)
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,320 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_LIST.C
|
||||
* Purpose: Functions for the management of different lists
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_Time.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* List head of chained ready tasks */
|
||||
struct OS_XCB os_rdy;
|
||||
/* List head of chained delay tasks */
|
||||
struct OS_XCB os_dly;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_put_prio -----------------------------------*/
|
||||
|
||||
void rt_put_prio (P_XCB p_CB, P_TCB p_task) {
|
||||
/* Put task identified with "p_task" into list ordered by priority. */
|
||||
/* "p_CB" points to head of list; list has always an element at end with */
|
||||
/* a priority less than "p_task->prio". */
|
||||
P_TCB p_CB2;
|
||||
U32 prio;
|
||||
BOOL sem_mbx = __FALSE;
|
||||
|
||||
if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {
|
||||
sem_mbx = __TRUE;
|
||||
}
|
||||
prio = p_task->prio;
|
||||
p_CB2 = p_CB->p_lnk;
|
||||
/* Search for an entry in the list */
|
||||
while (p_CB2 != NULL && prio <= p_CB2->prio) {
|
||||
p_CB = (P_XCB)p_CB2;
|
||||
p_CB2 = p_CB2->p_lnk;
|
||||
}
|
||||
/* Entry found, insert the task into the list */
|
||||
p_task->p_lnk = p_CB2;
|
||||
p_CB->p_lnk = p_task;
|
||||
if (sem_mbx) {
|
||||
if (p_CB2 != NULL) {
|
||||
p_CB2->p_rlnk = p_task;
|
||||
}
|
||||
p_task->p_rlnk = (P_TCB)p_CB;
|
||||
}
|
||||
else {
|
||||
p_task->p_rlnk = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_get_first ----------------------------------*/
|
||||
|
||||
P_TCB rt_get_first (P_XCB p_CB) {
|
||||
/* Get task at head of list: it is the task with highest priority. */
|
||||
/* "p_CB" points to head of list. */
|
||||
P_TCB p_first;
|
||||
|
||||
p_first = p_CB->p_lnk;
|
||||
p_CB->p_lnk = p_first->p_lnk;
|
||||
if (p_CB->cb_type == SCB || p_CB->cb_type == MCB || p_CB->cb_type == MUCB) {
|
||||
if (p_first->p_lnk != NULL) {
|
||||
p_first->p_lnk->p_rlnk = (P_TCB)p_CB;
|
||||
p_first->p_lnk = NULL;
|
||||
}
|
||||
p_first->p_rlnk = NULL;
|
||||
}
|
||||
else {
|
||||
p_first->p_lnk = NULL;
|
||||
}
|
||||
return (p_first);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_put_rdy_first ------------------------------*/
|
||||
|
||||
void rt_put_rdy_first (P_TCB p_task) {
|
||||
/* Put task identified with "p_task" at the head of the ready list. The */
|
||||
/* task must have at least a priority equal to highest priority in list. */
|
||||
p_task->p_lnk = os_rdy.p_lnk;
|
||||
p_task->p_rlnk = NULL;
|
||||
os_rdy.p_lnk = p_task;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_get_same_rdy_prio --------------------------*/
|
||||
|
||||
P_TCB rt_get_same_rdy_prio (void) {
|
||||
/* Remove a task of same priority from ready list if any exists. Other- */
|
||||
/* wise return NULL. */
|
||||
P_TCB p_first;
|
||||
|
||||
p_first = os_rdy.p_lnk;
|
||||
if (p_first->prio == os_tsk.run->prio) {
|
||||
os_rdy.p_lnk = os_rdy.p_lnk->p_lnk;
|
||||
return (p_first);
|
||||
}
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_resort_prio --------------------------------*/
|
||||
|
||||
void rt_resort_prio (P_TCB p_task) {
|
||||
/* Re-sort ordered lists after the priority of 'p_task' has changed. */
|
||||
P_TCB p_CB;
|
||||
|
||||
if (p_task->p_rlnk == NULL) {
|
||||
if (p_task->state == READY) {
|
||||
/* Task is chained into READY list. */
|
||||
p_CB = (P_TCB)&os_rdy;
|
||||
goto res;
|
||||
}
|
||||
}
|
||||
else {
|
||||
p_CB = p_task->p_rlnk;
|
||||
while (p_CB->cb_type == TCB) {
|
||||
/* Find a header of this task chain list. */
|
||||
p_CB = p_CB->p_rlnk;
|
||||
}
|
||||
res:rt_rmv_list (p_task);
|
||||
rt_put_prio ((P_XCB)p_CB, p_task);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_put_dly ------------------------------------*/
|
||||
|
||||
void rt_put_dly (P_TCB p_task, U16 delay) {
|
||||
/* Put a task identified with "p_task" into chained delay wait list using */
|
||||
/* a delay value of "delay". */
|
||||
P_TCB p;
|
||||
U32 delta,idelay = delay;
|
||||
|
||||
p = (P_TCB)&os_dly;
|
||||
if (p->p_dlnk == NULL) {
|
||||
/* Delay list empty */
|
||||
delta = 0;
|
||||
goto last;
|
||||
}
|
||||
delta = os_dly.delta_time;
|
||||
while (delta < idelay) {
|
||||
if (p->p_dlnk == NULL) {
|
||||
/* End of list found */
|
||||
last: p_task->p_dlnk = NULL;
|
||||
p->p_dlnk = p_task;
|
||||
p_task->p_blnk = p;
|
||||
p->delta_time = (U16)(idelay - delta);
|
||||
p_task->delta_time = 0;
|
||||
return;
|
||||
}
|
||||
p = p->p_dlnk;
|
||||
delta += p->delta_time;
|
||||
}
|
||||
/* Right place found */
|
||||
p_task->p_dlnk = p->p_dlnk;
|
||||
p->p_dlnk = p_task;
|
||||
p_task->p_blnk = p;
|
||||
if (p_task->p_dlnk != NULL) {
|
||||
p_task->p_dlnk->p_blnk = p_task;
|
||||
}
|
||||
p_task->delta_time = (U16)(delta - idelay);
|
||||
p->delta_time -= p_task->delta_time;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_dec_dly ------------------------------------*/
|
||||
|
||||
void rt_dec_dly (void) {
|
||||
/* Decrement delta time of list head: remove tasks having a value of zero.*/
|
||||
P_TCB p_rdy;
|
||||
|
||||
if (os_dly.p_dlnk == NULL) {
|
||||
return;
|
||||
}
|
||||
os_dly.delta_time--;
|
||||
while ((os_dly.delta_time == 0) && (os_dly.p_dlnk != NULL)) {
|
||||
p_rdy = os_dly.p_dlnk;
|
||||
if (p_rdy->p_rlnk != NULL) {
|
||||
/* Task is really enqueued, remove task from semaphore/mailbox */
|
||||
/* timeout waiting list. */
|
||||
p_rdy->p_rlnk->p_lnk = p_rdy->p_lnk;
|
||||
if (p_rdy->p_lnk != NULL) {
|
||||
p_rdy->p_lnk->p_rlnk = p_rdy->p_rlnk;
|
||||
p_rdy->p_lnk = NULL;
|
||||
}
|
||||
p_rdy->p_rlnk = NULL;
|
||||
}
|
||||
rt_put_prio (&os_rdy, p_rdy);
|
||||
os_dly.delta_time = p_rdy->delta_time;
|
||||
if (p_rdy->state == WAIT_ITV) {
|
||||
/* Calculate the next time for interval wait. */
|
||||
p_rdy->delta_time = p_rdy->interval_time + (U16)os_time;
|
||||
}
|
||||
p_rdy->state = READY;
|
||||
os_dly.p_dlnk = p_rdy->p_dlnk;
|
||||
if (p_rdy->p_dlnk != NULL) {
|
||||
p_rdy->p_dlnk->p_blnk = (P_TCB)&os_dly;
|
||||
p_rdy->p_dlnk = NULL;
|
||||
}
|
||||
p_rdy->p_blnk = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_rmv_list -----------------------------------*/
|
||||
|
||||
void rt_rmv_list (P_TCB p_task) {
|
||||
/* Remove task identified with "p_task" from ready, semaphore or mailbox */
|
||||
/* waiting list if enqueued. */
|
||||
P_TCB p_b;
|
||||
|
||||
if (p_task->p_rlnk != NULL) {
|
||||
/* A task is enqueued in semaphore / mailbox waiting list. */
|
||||
p_task->p_rlnk->p_lnk = p_task->p_lnk;
|
||||
if (p_task->p_lnk != NULL) {
|
||||
p_task->p_lnk->p_rlnk = p_task->p_rlnk;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
p_b = (P_TCB)&os_rdy;
|
||||
while (p_b != NULL) {
|
||||
/* Search the ready list for task "p_task" */
|
||||
if (p_b->p_lnk == p_task) {
|
||||
p_b->p_lnk = p_task->p_lnk;
|
||||
return;
|
||||
}
|
||||
p_b = p_b->p_lnk;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_rmv_dly ------------------------------------*/
|
||||
|
||||
void rt_rmv_dly (P_TCB p_task) {
|
||||
/* Remove task identified with "p_task" from delay list if enqueued. */
|
||||
P_TCB p_b;
|
||||
|
||||
p_b = p_task->p_blnk;
|
||||
if (p_b != NULL) {
|
||||
/* Task is really enqueued */
|
||||
p_b->p_dlnk = p_task->p_dlnk;
|
||||
if (p_task->p_dlnk != NULL) {
|
||||
/* 'p_task' is in the middle of list */
|
||||
p_b->delta_time += p_task->delta_time;
|
||||
p_task->p_dlnk->p_blnk = p_b;
|
||||
p_task->p_dlnk = NULL;
|
||||
}
|
||||
else {
|
||||
/* 'p_task' is at the end of list */
|
||||
p_b->delta_time = 0;
|
||||
}
|
||||
p_task->p_blnk = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_psq_enq ------------------------------------*/
|
||||
|
||||
void rt_psq_enq (OS_ID entry, U32 arg) {
|
||||
/* Insert post service request "entry" into ps-queue. */
|
||||
U32 idx;
|
||||
|
||||
idx = rt_inc_qi (os_psq->size, &os_psq->count, &os_psq->first);
|
||||
if (idx < os_psq->size) {
|
||||
os_psq->q[idx].id = entry;
|
||||
os_psq->q[idx].arg = arg;
|
||||
}
|
||||
else {
|
||||
os_error (OS_ERR_FIFO_OVF);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_LIST.H
|
||||
* Purpose: Functions for the management of different lists
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions */
|
||||
|
||||
/* Values for 'cb_type' */
|
||||
#define TCB 0
|
||||
#define MCB 1
|
||||
#define SCB 2
|
||||
#define MUCB 3
|
||||
#define HCB 4
|
||||
|
||||
/* Variables */
|
||||
extern struct OS_XCB os_rdy;
|
||||
extern struct OS_XCB os_dly;
|
||||
|
||||
/* Functions */
|
||||
extern void rt_put_prio (P_XCB p_CB, P_TCB p_task);
|
||||
extern P_TCB rt_get_first (P_XCB p_CB);
|
||||
extern void rt_put_rdy_first (P_TCB p_task);
|
||||
extern P_TCB rt_get_same_rdy_prio (void);
|
||||
extern void rt_resort_prio (P_TCB p_task);
|
||||
extern void rt_put_dly (P_TCB p_task, U16 delay);
|
||||
extern void rt_dec_dly (void);
|
||||
extern void rt_rmv_list (P_TCB p_task);
|
||||
extern void rt_rmv_dly (P_TCB p_task);
|
||||
extern void rt_psq_enq (OS_ID entry, U32 arg);
|
||||
|
||||
/* This is a fast macro generating in-line code */
|
||||
#define rt_rdy_prio(void) (os_rdy.p_lnk->prio)
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,292 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MAILBOX.C
|
||||
* Purpose: Implements waits and wake-ups for mailbox messages
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Mailbox.h"
|
||||
#include "rt_MemBox.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_mbx_init -----------------------------------*/
|
||||
|
||||
void rt_mbx_init (OS_ID mailbox, U16 mbx_size) {
|
||||
/* Initialize a mailbox */
|
||||
P_MCB p_MCB = mailbox;
|
||||
|
||||
p_MCB->cb_type = MCB;
|
||||
p_MCB->state = 0;
|
||||
p_MCB->isr_st = 0;
|
||||
p_MCB->p_lnk = NULL;
|
||||
p_MCB->first = 0;
|
||||
p_MCB->last = 0;
|
||||
p_MCB->count = 0;
|
||||
p_MCB->size = (mbx_size + sizeof(void *) - sizeof(struct OS_MCB)) /
|
||||
(U32)sizeof (void *);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mbx_send -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_mbx_send (OS_ID mailbox, void *p_msg, U16 timeout) {
|
||||
/* Send message to a mailbox */
|
||||
P_MCB p_MCB = mailbox;
|
||||
P_TCB p_TCB;
|
||||
|
||||
if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 1)) {
|
||||
/* A task is waiting for message */
|
||||
p_TCB = rt_get_first ((P_XCB)p_MCB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val2(p_TCB, 0x10/*osEventMessage*/, (U32)p_msg);
|
||||
#else
|
||||
*p_TCB->msg = p_msg;
|
||||
rt_ret_val (p_TCB, OS_R_MBX);
|
||||
#endif
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_dispatch (p_TCB);
|
||||
}
|
||||
else {
|
||||
/* Store message in mailbox queue */
|
||||
if (p_MCB->count == p_MCB->size) {
|
||||
/* No free message entry, wait for one. If message queue is full, */
|
||||
/* then no task is waiting for message. The 'p_MCB->p_lnk' list */
|
||||
/* pointer can now be reused for send message waits task list. */
|
||||
if (timeout == 0) {
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
if (p_MCB->p_lnk != NULL) {
|
||||
rt_put_prio ((P_XCB)p_MCB, os_tsk.run);
|
||||
}
|
||||
else {
|
||||
p_MCB->p_lnk = os_tsk.run;
|
||||
os_tsk.run->p_lnk = NULL;
|
||||
os_tsk.run->p_rlnk = (P_TCB)p_MCB;
|
||||
/* Task is waiting to send a message */
|
||||
p_MCB->state = 2;
|
||||
}
|
||||
os_tsk.run->msg = p_msg;
|
||||
rt_block (timeout, WAIT_MBX);
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
/* Yes, there is a free entry in a mailbox. */
|
||||
p_MCB->msg[p_MCB->first] = p_msg;
|
||||
rt_inc (&p_MCB->count);
|
||||
if (++p_MCB->first == p_MCB->size) {
|
||||
p_MCB->first = 0;
|
||||
}
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mbx_wait -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_mbx_wait (OS_ID mailbox, void **message, U16 timeout) {
|
||||
/* Receive a message; possibly wait for it */
|
||||
P_MCB p_MCB = mailbox;
|
||||
P_TCB p_TCB;
|
||||
|
||||
/* If a message is available in the fifo buffer */
|
||||
/* remove it from the fifo buffer and return. */
|
||||
if (p_MCB->count) {
|
||||
*message = p_MCB->msg[p_MCB->last];
|
||||
if (++p_MCB->last == p_MCB->size) {
|
||||
p_MCB->last = 0;
|
||||
}
|
||||
if ((p_MCB->p_lnk != NULL) && (p_MCB->state == 2)) {
|
||||
/* A task is waiting to send message */
|
||||
p_TCB = rt_get_first ((P_XCB)p_MCB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val(p_TCB, 0/*osOK*/);
|
||||
#else
|
||||
rt_ret_val(p_TCB, OS_R_OK);
|
||||
#endif
|
||||
p_MCB->msg[p_MCB->first] = p_TCB->msg;
|
||||
if (++p_MCB->first == p_MCB->size) {
|
||||
p_MCB->first = 0;
|
||||
}
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_dispatch (p_TCB);
|
||||
}
|
||||
else {
|
||||
rt_dec (&p_MCB->count);
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
/* No message available: wait for one */
|
||||
if (timeout == 0) {
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
if (p_MCB->p_lnk != NULL) {
|
||||
rt_put_prio ((P_XCB)p_MCB, os_tsk.run);
|
||||
}
|
||||
else {
|
||||
p_MCB->p_lnk = os_tsk.run;
|
||||
os_tsk.run->p_lnk = NULL;
|
||||
os_tsk.run->p_rlnk = (P_TCB)p_MCB;
|
||||
/* Task is waiting to receive a message */
|
||||
p_MCB->state = 1;
|
||||
}
|
||||
rt_block(timeout, WAIT_MBX);
|
||||
#ifndef __CMSIS_RTOS
|
||||
os_tsk.run->msg = message;
|
||||
#endif
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mbx_check ----------------------------------*/
|
||||
|
||||
OS_RESULT rt_mbx_check (OS_ID mailbox) {
|
||||
/* Check for free space in a mailbox. Returns the number of messages */
|
||||
/* that can be stored to a mailbox. It returns 0 when mailbox is full. */
|
||||
P_MCB p_MCB = mailbox;
|
||||
|
||||
return (p_MCB->size - p_MCB->count);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- isr_mbx_send ----------------------------------*/
|
||||
|
||||
void isr_mbx_send (OS_ID mailbox, void *p_msg) {
|
||||
/* Same function as "os_mbx_send", but to be called by ISRs. */
|
||||
P_MCB p_MCB = mailbox;
|
||||
|
||||
rt_psq_enq (p_MCB, (U32)p_msg);
|
||||
rt_psh_req ();
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- isr_mbx_receive -------------------------------*/
|
||||
|
||||
OS_RESULT isr_mbx_receive (OS_ID mailbox, void **message) {
|
||||
/* Receive a message in the interrupt function. The interrupt function */
|
||||
/* should not wait for a message since this would block the rtx os. */
|
||||
P_MCB p_MCB = mailbox;
|
||||
|
||||
if (p_MCB->count) {
|
||||
/* A message is available in the fifo buffer. */
|
||||
*message = p_MCB->msg[p_MCB->last];
|
||||
if (p_MCB->state == 2) {
|
||||
/* A task is locked waiting to send message */
|
||||
rt_psq_enq (p_MCB, 0);
|
||||
rt_psh_req ();
|
||||
}
|
||||
rt_dec (&p_MCB->count);
|
||||
if (++p_MCB->last == p_MCB->size) {
|
||||
p_MCB->last = 0;
|
||||
}
|
||||
return (OS_R_MBX);
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mbx_psh ------------------------------------*/
|
||||
|
||||
void rt_mbx_psh (P_MCB p_CB, void *p_msg) {
|
||||
/* Store the message to the mailbox queue or pass it to task directly. */
|
||||
P_TCB p_TCB;
|
||||
void *mem;
|
||||
|
||||
if (p_CB->p_lnk != NULL) switch (p_CB->state) {
|
||||
#ifdef __CMSIS_RTOS
|
||||
case 3:
|
||||
/* Task is waiting to allocate memory, remove it from the waiting list */
|
||||
mem = rt_alloc_box(p_msg);
|
||||
if (mem == NULL) break;
|
||||
p_TCB = rt_get_first ((P_XCB)p_CB);
|
||||
rt_ret_val(p_TCB, (U32)mem);
|
||||
p_TCB->state = READY;
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
break;
|
||||
#endif
|
||||
case 2:
|
||||
/* Task is waiting to send a message, remove it from the waiting list */
|
||||
p_TCB = rt_get_first ((P_XCB)p_CB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val(p_TCB, 0/*osOK*/);
|
||||
#else
|
||||
rt_ret_val(p_TCB, OS_R_OK);
|
||||
#endif
|
||||
p_CB->msg[p_CB->first] = p_TCB->msg;
|
||||
rt_inc (&p_CB->count);
|
||||
if (++p_CB->first == p_CB->size) {
|
||||
p_CB->first = 0;
|
||||
}
|
||||
p_TCB->state = READY;
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
break;
|
||||
case 1:
|
||||
/* Task is waiting for a message, pass the message to the task directly */
|
||||
p_TCB = rt_get_first ((P_XCB)p_CB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val2(p_TCB, 0x10/*osEventMessage*/, (U32)p_msg);
|
||||
#else
|
||||
*p_TCB->msg = p_msg;
|
||||
rt_ret_val (p_TCB, OS_R_MBX);
|
||||
#endif
|
||||
p_TCB->state = READY;
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
break;
|
||||
} else {
|
||||
/* No task is waiting for a message, store it to the mailbox queue */
|
||||
if (p_CB->count < p_CB->size) {
|
||||
p_CB->msg[p_CB->first] = p_msg;
|
||||
rt_inc (&p_CB->count);
|
||||
if (++p_CB->first == p_CB->size) {
|
||||
p_CB->first = 0;
|
||||
}
|
||||
}
|
||||
else {
|
||||
os_error (OS_ERR_MBX_OVF);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MAILBOX.H
|
||||
* Purpose: Implements waits and wake-ups for mailbox messages
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Functions */
|
||||
extern void rt_mbx_init (OS_ID mailbox, U16 mbx_size);
|
||||
extern OS_RESULT rt_mbx_send (OS_ID mailbox, void *p_msg, U16 timeout);
|
||||
extern OS_RESULT rt_mbx_wait (OS_ID mailbox, void **message, U16 timeout);
|
||||
extern OS_RESULT rt_mbx_check (OS_ID mailbox);
|
||||
extern void isr_mbx_send (OS_ID mailbox, void *p_msg);
|
||||
extern OS_RESULT isr_mbx_receive (OS_ID mailbox, void **message);
|
||||
extern void rt_mbx_psh (P_MCB p_CB, void *p_msg);
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,166 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MEMBOX.C
|
||||
* Purpose: Interface functions for fixed memory block management system
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_MemBox.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- _init_box -------------------------------------*/
|
||||
|
||||
int _init_box (void *box_mem, U32 box_size, U32 blk_size) {
|
||||
/* Initialize memory block system, returns 0 if OK, 1 if fails. */
|
||||
void *end;
|
||||
void *blk;
|
||||
void *next;
|
||||
U32 sizeof_bm;
|
||||
|
||||
/* Create memory structure. */
|
||||
if (blk_size & BOX_ALIGN_8) {
|
||||
/* Memory blocks 8-byte aligned. */
|
||||
blk_size = ((blk_size & ~BOX_ALIGN_8) + 7) & ~7;
|
||||
sizeof_bm = (sizeof (struct OS_BM) + 7) & ~7;
|
||||
}
|
||||
else {
|
||||
/* Memory blocks 4-byte aligned. */
|
||||
blk_size = (blk_size + 3) & ~3;
|
||||
sizeof_bm = sizeof (struct OS_BM);
|
||||
}
|
||||
if (blk_size == 0) {
|
||||
return (1);
|
||||
}
|
||||
if ((blk_size + sizeof_bm) > box_size) {
|
||||
return (1);
|
||||
}
|
||||
/* Create a Memory structure. */
|
||||
blk = ((U8 *) box_mem) + sizeof_bm;
|
||||
((P_BM) box_mem)->free = blk;
|
||||
end = ((U8 *) box_mem) + box_size;
|
||||
((P_BM) box_mem)->end = end;
|
||||
((P_BM) box_mem)->blk_size = blk_size;
|
||||
|
||||
/* Link all free blocks using offsets. */
|
||||
end = ((U8 *) end) - blk_size;
|
||||
while (1) {
|
||||
next = ((U8 *) blk) + blk_size;
|
||||
if (next > end) break;
|
||||
*((void **)blk) = next;
|
||||
blk = next;
|
||||
}
|
||||
/* end marker */
|
||||
*((void **)blk) = 0;
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*--------------------------- rt_alloc_box ----------------------------------*/
|
||||
|
||||
void *rt_alloc_box (void *box_mem) {
|
||||
/* Allocate a memory block and return start address. */
|
||||
void **free;
|
||||
#ifndef __USE_EXCLUSIVE_ACCESS
|
||||
int irq_dis;
|
||||
|
||||
irq_dis = __disable_irq ();
|
||||
free = ((P_BM) box_mem)->free;
|
||||
if (free) {
|
||||
((P_BM) box_mem)->free = *free;
|
||||
}
|
||||
if (!irq_dis) __enable_irq ();
|
||||
#else
|
||||
do {
|
||||
if ((free = (void **)__ldrex(&((P_BM) box_mem)->free)) == 0) {
|
||||
__clrex();
|
||||
break;
|
||||
}
|
||||
} while (__strex((U32)*free, &((P_BM) box_mem)->free));
|
||||
#endif
|
||||
return (free);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- _calloc_box -----------------------------------*/
|
||||
|
||||
void *_calloc_box (void *box_mem) {
|
||||
/* Allocate a 0-initialized memory block and return start address. */
|
||||
void *free;
|
||||
U32 *p;
|
||||
U32 i;
|
||||
|
||||
free = _alloc_box (box_mem);
|
||||
if (free) {
|
||||
p = free;
|
||||
for (i = ((P_BM) box_mem)->blk_size; i; i -= 4) {
|
||||
*p = 0;
|
||||
p++;
|
||||
}
|
||||
}
|
||||
return (free);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_free_box -----------------------------------*/
|
||||
|
||||
int rt_free_box (void *box_mem, void *box) {
|
||||
/* Free a memory block, returns 0 if OK, 1 if box does not belong to box_mem */
|
||||
#ifndef __USE_EXCLUSIVE_ACCESS
|
||||
int irq_dis;
|
||||
#endif
|
||||
|
||||
if (box < box_mem || box >= ((P_BM) box_mem)->end) {
|
||||
return (1);
|
||||
}
|
||||
|
||||
#ifndef __USE_EXCLUSIVE_ACCESS
|
||||
irq_dis = __disable_irq ();
|
||||
*((void **)box) = ((P_BM) box_mem)->free;
|
||||
((P_BM) box_mem)->free = box;
|
||||
if (!irq_dis) __enable_irq ();
|
||||
#else
|
||||
do {
|
||||
*((void **)box) = (void *)__ldrex(&((P_BM) box_mem)->free);
|
||||
} while (__strex ((U32)box, &((P_BM) box_mem)->free));
|
||||
#endif
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MEMBOX.H
|
||||
* Purpose: Interface functions for fixed memory block management system
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Functions */
|
||||
#define rt_init_box _init_box
|
||||
#define rt_calloc_box _calloc_box
|
||||
extern int _init_box (void *box_mem, U32 box_size, U32 blk_size);
|
||||
extern void *rt_alloc_box (void *box_mem);
|
||||
extern void * _calloc_box (void *box_mem);
|
||||
extern int rt_free_box (void *box_mem, void *box);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,197 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MUTEX.C
|
||||
* Purpose: Implements mutex synchronization objects
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_Mutex.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_mut_init -----------------------------------*/
|
||||
|
||||
void rt_mut_init (OS_ID mutex) {
|
||||
/* Initialize a mutex object */
|
||||
P_MUCB p_MCB = mutex;
|
||||
|
||||
p_MCB->cb_type = MUCB;
|
||||
p_MCB->prio = 0;
|
||||
p_MCB->level = 0;
|
||||
p_MCB->p_lnk = NULL;
|
||||
p_MCB->owner = NULL;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mut_delete ---------------------------------*/
|
||||
|
||||
#ifdef __CMSIS_RTOS
|
||||
OS_RESULT rt_mut_delete (OS_ID mutex) {
|
||||
/* Delete a mutex object */
|
||||
P_MUCB p_MCB = mutex;
|
||||
P_TCB p_TCB;
|
||||
|
||||
/* Restore owner task's priority. */
|
||||
if (p_MCB->level != 0) {
|
||||
p_MCB->owner->prio = p_MCB->prio;
|
||||
if (p_MCB->owner != os_tsk.run) {
|
||||
rt_resort_prio (p_MCB->owner);
|
||||
}
|
||||
}
|
||||
|
||||
while (p_MCB->p_lnk != NULL) {
|
||||
/* A task is waiting for mutex. */
|
||||
p_TCB = rt_get_first ((P_XCB)p_MCB);
|
||||
rt_ret_val(p_TCB, 0/*osOK*/);
|
||||
rt_rmv_dly(p_TCB);
|
||||
p_TCB->state = READY;
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
}
|
||||
|
||||
if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {
|
||||
/* preempt running task */
|
||||
rt_put_prio (&os_rdy, os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_dispatch (NULL);
|
||||
}
|
||||
|
||||
p_MCB->cb_type = 0;
|
||||
|
||||
return (OS_R_OK);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*--------------------------- rt_mut_release --------------------------------*/
|
||||
|
||||
OS_RESULT rt_mut_release (OS_ID mutex) {
|
||||
/* Release a mutex object */
|
||||
P_MUCB p_MCB = mutex;
|
||||
P_TCB p_TCB;
|
||||
|
||||
if (p_MCB->level == 0 || p_MCB->owner != os_tsk.run) {
|
||||
/* Unbalanced mutex release or task is not the owner */
|
||||
return (OS_R_NOK);
|
||||
}
|
||||
if (--p_MCB->level != 0) {
|
||||
return (OS_R_OK);
|
||||
}
|
||||
/* Restore owner task's priority. */
|
||||
os_tsk.run->prio = p_MCB->prio;
|
||||
if (p_MCB->p_lnk != NULL) {
|
||||
/* A task is waiting for mutex. */
|
||||
p_TCB = rt_get_first ((P_XCB)p_MCB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val(p_TCB, 0/*osOK*/);
|
||||
#else
|
||||
rt_ret_val(p_TCB, OS_R_MUT);
|
||||
#endif
|
||||
rt_rmv_dly (p_TCB);
|
||||
/* A waiting task becomes the owner of this mutex. */
|
||||
p_MCB->level = 1;
|
||||
p_MCB->owner = p_TCB;
|
||||
p_MCB->prio = p_TCB->prio;
|
||||
/* Priority inversion, check which task continues. */
|
||||
if (os_tsk.run->prio >= rt_rdy_prio()) {
|
||||
rt_dispatch (p_TCB);
|
||||
}
|
||||
else {
|
||||
/* Ready task has higher priority than running task. */
|
||||
rt_put_prio (&os_rdy, os_tsk.run);
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
os_tsk.run->state = READY;
|
||||
p_TCB->state = READY;
|
||||
rt_dispatch (NULL);
|
||||
}
|
||||
}
|
||||
else {
|
||||
/* Check if own priority raised by priority inversion. */
|
||||
if (rt_rdy_prio() > os_tsk.run->prio) {
|
||||
rt_put_prio (&os_rdy, os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_dispatch (NULL);
|
||||
}
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_mut_wait -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_mut_wait (OS_ID mutex, U16 timeout) {
|
||||
/* Wait for a mutex, continue when mutex is free. */
|
||||
P_MUCB p_MCB = mutex;
|
||||
|
||||
if (p_MCB->level == 0) {
|
||||
p_MCB->owner = os_tsk.run;
|
||||
p_MCB->prio = os_tsk.run->prio;
|
||||
goto inc;
|
||||
}
|
||||
if (p_MCB->owner == os_tsk.run) {
|
||||
/* OK, running task is the owner of this mutex. */
|
||||
inc:p_MCB->level++;
|
||||
return (OS_R_OK);
|
||||
}
|
||||
/* Mutex owned by another task, wait until released. */
|
||||
if (timeout == 0) {
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
/* Raise the owner task priority if lower than current priority. */
|
||||
/* This priority inversion is called priority inheritance. */
|
||||
if (p_MCB->prio < os_tsk.run->prio) {
|
||||
p_MCB->owner->prio = os_tsk.run->prio;
|
||||
rt_resort_prio (p_MCB->owner);
|
||||
}
|
||||
if (p_MCB->p_lnk != NULL) {
|
||||
rt_put_prio ((P_XCB)p_MCB, os_tsk.run);
|
||||
}
|
||||
else {
|
||||
p_MCB->p_lnk = os_tsk.run;
|
||||
os_tsk.run->p_lnk = NULL;
|
||||
os_tsk.run->p_rlnk = (P_TCB)p_MCB;
|
||||
}
|
||||
rt_block(timeout, WAIT_MUT);
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_MUTEX.H
|
||||
* Purpose: Implements mutex synchronization objects
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Functions */
|
||||
extern void rt_mut_init (OS_ID mutex);
|
||||
extern OS_RESULT rt_mut_delete (OS_ID mutex);
|
||||
extern OS_RESULT rt_mut_release (OS_ID mutex);
|
||||
extern OS_RESULT rt_mut_wait (OS_ID mutex, U16 timeout);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,84 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_ROBIN.C
|
||||
* Purpose: Round Robin Task switching
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_Time.h"
|
||||
#include "rt_Robin.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
struct OS_ROBIN os_robin;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/*--------------------------- rt_init_robin ---------------------------------*/
|
||||
|
||||
__weak void rt_init_robin (void) {
|
||||
/* Initialize Round Robin variables. */
|
||||
os_robin.task = NULL;
|
||||
os_robin.tout = (U16)os_rrobin;
|
||||
}
|
||||
|
||||
/*--------------------------- rt_chk_robin ----------------------------------*/
|
||||
|
||||
__weak void rt_chk_robin (void) {
|
||||
/* Check if Round Robin timeout expired and switch to the next ready task.*/
|
||||
P_TCB p_new;
|
||||
|
||||
if (os_robin.task != os_rdy.p_lnk) {
|
||||
/* New task was suspended, reset Round Robin timeout. */
|
||||
os_robin.task = os_rdy.p_lnk;
|
||||
os_robin.time = (U16)os_time + os_robin.tout - 1;
|
||||
}
|
||||
if (os_robin.time == (U16)os_time) {
|
||||
/* Round Robin timeout has expired, swap Robin tasks. */
|
||||
os_robin.task = NULL;
|
||||
p_new = rt_get_first (&os_rdy);
|
||||
rt_put_prio ((P_XCB)&os_rdy, p_new);
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_ROBIN.H
|
||||
* Purpose: Round Robin Task switching definitions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Variables */
|
||||
extern struct OS_ROBIN os_robin;
|
||||
|
||||
/* Functions */
|
||||
extern void rt_init_robin (void);
|
||||
extern void rt_chk_robin (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,183 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_SEMAPHORE.C
|
||||
* Purpose: Implements binary and counting semaphores
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_Semaphore.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_sem_init -----------------------------------*/
|
||||
|
||||
void rt_sem_init (OS_ID semaphore, U16 token_count) {
|
||||
/* Initialize a semaphore */
|
||||
P_SCB p_SCB = semaphore;
|
||||
|
||||
p_SCB->cb_type = SCB;
|
||||
p_SCB->p_lnk = NULL;
|
||||
p_SCB->tokens = token_count;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_sem_delete ---------------------------------*/
|
||||
|
||||
#ifdef __CMSIS_RTOS
|
||||
OS_RESULT rt_sem_delete (OS_ID semaphore) {
|
||||
/* Delete semaphore */
|
||||
P_SCB p_SCB = semaphore;
|
||||
P_TCB p_TCB;
|
||||
|
||||
while (p_SCB->p_lnk != NULL) {
|
||||
/* A task is waiting for token */
|
||||
p_TCB = rt_get_first ((P_XCB)p_SCB);
|
||||
rt_ret_val(p_TCB, 0);
|
||||
rt_rmv_dly(p_TCB);
|
||||
p_TCB->state = READY;
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
}
|
||||
|
||||
if (os_rdy.p_lnk && (os_rdy.p_lnk->prio > os_tsk.run->prio)) {
|
||||
/* preempt running task */
|
||||
rt_put_prio (&os_rdy, os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_dispatch (NULL);
|
||||
}
|
||||
|
||||
p_SCB->cb_type = 0;
|
||||
|
||||
return (OS_R_OK);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*--------------------------- rt_sem_send -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_sem_send (OS_ID semaphore) {
|
||||
/* Return a token to semaphore */
|
||||
P_SCB p_SCB = semaphore;
|
||||
P_TCB p_TCB;
|
||||
|
||||
if (p_SCB->p_lnk != NULL) {
|
||||
/* A task is waiting for token */
|
||||
p_TCB = rt_get_first ((P_XCB)p_SCB);
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val(p_TCB, 1);
|
||||
#else
|
||||
rt_ret_val(p_TCB, OS_R_SEM);
|
||||
#endif
|
||||
rt_rmv_dly (p_TCB);
|
||||
rt_dispatch (p_TCB);
|
||||
}
|
||||
else {
|
||||
/* Store token. */
|
||||
p_SCB->tokens++;
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_sem_wait -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_sem_wait (OS_ID semaphore, U16 timeout) {
|
||||
/* Obtain a token; possibly wait for it */
|
||||
P_SCB p_SCB = semaphore;
|
||||
|
||||
if (p_SCB->tokens) {
|
||||
p_SCB->tokens--;
|
||||
return (OS_R_OK);
|
||||
}
|
||||
/* No token available: wait for one */
|
||||
if (timeout == 0) {
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
if (p_SCB->p_lnk != NULL) {
|
||||
rt_put_prio ((P_XCB)p_SCB, os_tsk.run);
|
||||
}
|
||||
else {
|
||||
p_SCB->p_lnk = os_tsk.run;
|
||||
os_tsk.run->p_lnk = NULL;
|
||||
os_tsk.run->p_rlnk = (P_TCB)p_SCB;
|
||||
}
|
||||
rt_block(timeout, WAIT_SEM);
|
||||
return (OS_R_TMO);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- isr_sem_send ----------------------------------*/
|
||||
|
||||
void isr_sem_send (OS_ID semaphore) {
|
||||
/* Same function as "os_sem"send", but to be called by ISRs */
|
||||
P_SCB p_SCB = semaphore;
|
||||
|
||||
rt_psq_enq (p_SCB, 0);
|
||||
rt_psh_req ();
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_sem_psh ------------------------------------*/
|
||||
|
||||
void rt_sem_psh (P_SCB p_CB) {
|
||||
/* Check if task has to be waken up */
|
||||
P_TCB p_TCB;
|
||||
|
||||
if (p_CB->p_lnk != NULL) {
|
||||
/* A task is waiting for token */
|
||||
p_TCB = rt_get_first ((P_XCB)p_CB);
|
||||
rt_rmv_dly (p_TCB);
|
||||
p_TCB->state = READY;
|
||||
#ifdef __CMSIS_RTOS
|
||||
rt_ret_val(p_TCB, 1);
|
||||
#else
|
||||
rt_ret_val(p_TCB, OS_R_SEM);
|
||||
#endif
|
||||
rt_put_prio (&os_rdy, p_TCB);
|
||||
}
|
||||
else {
|
||||
/* Store token */
|
||||
p_CB->tokens++;
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_SEMAPHORE.H
|
||||
* Purpose: Implements binary and counting semaphores
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Functions */
|
||||
extern void rt_sem_init (OS_ID semaphore, U16 token_count);
|
||||
extern OS_RESULT rt_sem_delete(OS_ID semaphore);
|
||||
extern OS_RESULT rt_sem_send (OS_ID semaphore);
|
||||
extern OS_RESULT rt_sem_wait (OS_ID semaphore, U16 timeout);
|
||||
extern void isr_sem_send (OS_ID semaphore);
|
||||
extern void rt_sem_psh (P_SCB p_CB);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,293 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_SYSTEM.C
|
||||
* Purpose: System Task Manager
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_Event.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_Mailbox.h"
|
||||
#include "rt_Semaphore.h"
|
||||
#include "rt_Time.h"
|
||||
#include "rt_Robin.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
int os_tick_irqn;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Local Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
static volatile BIT os_lock;
|
||||
static volatile BIT os_psh_flag;
|
||||
static U8 pend_flags;
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#if defined (__CC_ARM)
|
||||
__asm void $$RTX$$version (void) {
|
||||
/* Export a version number symbol for a version control. */
|
||||
|
||||
EXPORT __RL_RTX_VER
|
||||
|
||||
__RL_RTX_VER EQU 0x450
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*--------------------------- rt_suspend ------------------------------------*/
|
||||
U32 rt_suspend (void) {
|
||||
/* Suspend OS scheduler */
|
||||
U32 delta = 0xFFFF;
|
||||
|
||||
rt_tsk_lock();
|
||||
|
||||
if (os_dly.p_dlnk) {
|
||||
delta = os_dly.delta_time;
|
||||
}
|
||||
#ifndef __CMSIS_RTOS
|
||||
if (os_tmr.next) {
|
||||
if (os_tmr.tcnt < delta) delta = os_tmr.tcnt;
|
||||
}
|
||||
#endif
|
||||
|
||||
return (delta);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_resume -------------------------------------*/
|
||||
void rt_resume (U32 sleep_time) {
|
||||
/* Resume OS scheduler after suspend */
|
||||
P_TCB next;
|
||||
U32 delta;
|
||||
|
||||
os_tsk.run->state = READY;
|
||||
rt_put_rdy_first (os_tsk.run);
|
||||
|
||||
os_robin.task = NULL;
|
||||
|
||||
/* Update delays. */
|
||||
if (os_dly.p_dlnk) {
|
||||
delta = sleep_time;
|
||||
if (delta >= os_dly.delta_time) {
|
||||
delta -= os_dly.delta_time;
|
||||
os_time += os_dly.delta_time;
|
||||
os_dly.delta_time = 1;
|
||||
while (os_dly.p_dlnk) {
|
||||
rt_dec_dly();
|
||||
if (delta == 0) break;
|
||||
delta--;
|
||||
os_time++;
|
||||
}
|
||||
} else {
|
||||
os_time += delta;
|
||||
os_dly.delta_time -= delta;
|
||||
}
|
||||
} else {
|
||||
os_time += sleep_time;
|
||||
}
|
||||
|
||||
#ifndef __CMSIS_RTOS
|
||||
/* Check the user timers. */
|
||||
if (os_tmr.next) {
|
||||
delta = sleep_time;
|
||||
if (delta >= os_tmr.tcnt) {
|
||||
delta -= os_tmr.tcnt;
|
||||
os_tmr.tcnt = 1;
|
||||
while (os_tmr.next) {
|
||||
rt_tmr_tick();
|
||||
if (delta == 0) break;
|
||||
delta--;
|
||||
}
|
||||
} else {
|
||||
os_tmr.tcnt -= delta;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Switch back to highest ready task */
|
||||
next = rt_get_first (&os_rdy);
|
||||
rt_switch_req (next);
|
||||
|
||||
rt_tsk_unlock();
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_tsk_lock -----------------------------------*/
|
||||
|
||||
void rt_tsk_lock (void) {
|
||||
/* Prevent task switching by locking out scheduler */
|
||||
OS_X_LOCK(os_tick_irqn);
|
||||
os_lock = __TRUE;
|
||||
OS_X_UNPEND (&pend_flags);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_tsk_unlock ---------------------------------*/
|
||||
|
||||
void rt_tsk_unlock (void) {
|
||||
/* Unlock scheduler and re-enable task switching */
|
||||
OS_X_UNLOCK(os_tick_irqn);
|
||||
os_lock = __FALSE;
|
||||
OS_X_PEND (pend_flags, os_psh_flag);
|
||||
os_psh_flag = __FALSE;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_psh_req ------------------------------------*/
|
||||
|
||||
void rt_psh_req (void) {
|
||||
/* Initiate a post service handling request if required. */
|
||||
if (os_lock == __FALSE) {
|
||||
OS_PEND_IRQ ();
|
||||
}
|
||||
else {
|
||||
os_psh_flag = __TRUE;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_pop_req ------------------------------------*/
|
||||
|
||||
void rt_pop_req (void) {
|
||||
/* Process an ISR post service requests. */
|
||||
struct OS_XCB *p_CB;
|
||||
P_TCB next;
|
||||
U32 idx;
|
||||
|
||||
os_tsk.run->state = READY;
|
||||
rt_put_rdy_first (os_tsk.run);
|
||||
|
||||
idx = os_psq->last;
|
||||
while (os_psq->count) {
|
||||
p_CB = os_psq->q[idx].id;
|
||||
if (p_CB->cb_type == TCB) {
|
||||
/* Is of TCB type */
|
||||
rt_evt_psh ((P_TCB)p_CB, (U16)os_psq->q[idx].arg);
|
||||
}
|
||||
else if (p_CB->cb_type == MCB) {
|
||||
/* Is of MCB type */
|
||||
rt_mbx_psh ((P_MCB)p_CB, (void *)os_psq->q[idx].arg);
|
||||
}
|
||||
else {
|
||||
/* Must be of SCB type */
|
||||
rt_sem_psh ((P_SCB)p_CB);
|
||||
}
|
||||
if (++idx == os_psq->size) idx = 0;
|
||||
rt_dec (&os_psq->count);
|
||||
}
|
||||
os_psq->last = idx;
|
||||
|
||||
next = rt_get_first (&os_rdy);
|
||||
rt_switch_req (next);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- os_tick_init ----------------------------------*/
|
||||
|
||||
__weak int os_tick_init (void) {
|
||||
/* Initialize SysTick timer as system tick timer. */
|
||||
rt_systick_init ();
|
||||
return (SYS_TICK_IRQn); /* Return IRQ number of SysTick timer */
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- os_tick_irqack --------------------------------*/
|
||||
|
||||
__weak void os_tick_irqack (void) {
|
||||
/* Acknowledge timer interrupt. */
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_systick ------------------------------------*/
|
||||
|
||||
extern void sysTimerTick(void);
|
||||
|
||||
void rt_systick (void) {
|
||||
if(NVIC_Pending(SYS_TICK_IRQn)){
|
||||
rt_pop_req();
|
||||
NVIC_UnpendIRQ(SYS_TICK_IRQn);
|
||||
SYS_TICK_TIMER->IR = 0xF; // clear timer interrupt
|
||||
return;
|
||||
}
|
||||
/* Check for system clock update, suspend running task. */
|
||||
P_TCB next;
|
||||
|
||||
os_tsk.run->state = READY;
|
||||
rt_put_rdy_first (os_tsk.run);
|
||||
|
||||
/* Check Round Robin timeout. */
|
||||
rt_chk_robin ();
|
||||
|
||||
/* Update delays. */
|
||||
os_time++;
|
||||
rt_dec_dly ();
|
||||
|
||||
/* Check the user timers. */
|
||||
#ifdef __CMSIS_RTOS
|
||||
sysTimerTick();
|
||||
#else
|
||||
rt_tmr_tick ();
|
||||
#endif
|
||||
|
||||
/* Switch back to highest ready task */
|
||||
next = rt_get_first (&os_rdy);
|
||||
rt_switch_req (next);
|
||||
SYS_TICK_TIMER->IR = 0xF; // clear timer interrupt
|
||||
}
|
||||
|
||||
/*--------------------------- rt_stk_check ----------------------------------*/
|
||||
__weak void rt_stk_check (void) {
|
||||
/* Check for stack overflow. */
|
||||
if (os_tsk.run->task_id == 0x01) {
|
||||
// TODO: For the main thread the check should be done against the main heap pointer
|
||||
} else {
|
||||
if ((os_tsk.run->tsk_stack < (U32)os_tsk.run->stack) ||
|
||||
(os_tsk.run->stack[0] != MAGIC_WORD)) {
|
||||
os_error (OS_ERR_STK_OVF);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_SYSTEM.H
|
||||
* Purpose: System Task Manager definitions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Variables */
|
||||
#define os_psq ((P_PSQ)&os_fifo)
|
||||
extern int os_tick_irqn;
|
||||
|
||||
/* Functions */
|
||||
extern U32 rt_suspend (void);
|
||||
extern void rt_resume (U32 sleep_time);
|
||||
extern void rt_tsk_lock (void);
|
||||
extern void rt_tsk_unlock (void);
|
||||
extern void rt_psh_req (void);
|
||||
extern void rt_pop_req (void);
|
||||
extern void rt_systick (void);
|
||||
extern void rt_stk_check (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,341 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_TASK.C
|
||||
* Purpose: Task functions and system start up.
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_System.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_List.h"
|
||||
#include "rt_MemBox.h"
|
||||
#include "rt_Robin.h"
|
||||
#include "rt_HAL_CM.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Running and next task info. */
|
||||
struct OS_TSK os_tsk;
|
||||
|
||||
/* Task Control Blocks of idle demon */
|
||||
struct OS_TCB os_idle_TCB;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Local Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
OS_TID rt_get_TID (void) {
|
||||
U32 tid;
|
||||
|
||||
for (tid = 1; tid <= os_maxtaskrun; tid++) {
|
||||
if (os_active_TCB[tid-1] == NULL) {
|
||||
return ((OS_TID)tid);
|
||||
}
|
||||
}
|
||||
return (0);
|
||||
}
|
||||
|
||||
#if defined (__CC_ARM) && !defined (__MICROLIB)
|
||||
/*--------------------------- __user_perthread_libspace ---------------------*/
|
||||
extern void *__libspace_start;
|
||||
|
||||
void *__user_perthread_libspace (void) {
|
||||
/* Provide a separate libspace for each task. */
|
||||
if (os_tsk.run == NULL) {
|
||||
/* RTX not running yet. */
|
||||
return (&__libspace_start);
|
||||
}
|
||||
return (void *)(os_tsk.run->std_libspace);
|
||||
}
|
||||
#endif
|
||||
|
||||
/*--------------------------- rt_init_context -------------------------------*/
|
||||
|
||||
void rt_init_context (P_TCB p_TCB, U8 priority, FUNCP task_body) {
|
||||
/* Initialize general part of the Task Control Block. */
|
||||
p_TCB->cb_type = TCB;
|
||||
p_TCB->state = READY;
|
||||
p_TCB->prio = priority;
|
||||
p_TCB->p_lnk = NULL;
|
||||
p_TCB->p_rlnk = NULL;
|
||||
p_TCB->p_dlnk = NULL;
|
||||
p_TCB->p_blnk = NULL;
|
||||
p_TCB->delta_time = 0;
|
||||
p_TCB->interval_time = 0;
|
||||
p_TCB->events = 0;
|
||||
p_TCB->waits = 0;
|
||||
p_TCB->stack_frame = 0;
|
||||
|
||||
rt_init_stack (p_TCB, task_body);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_switch_req ---------------------------------*/
|
||||
|
||||
void rt_switch_req (P_TCB p_new) {
|
||||
/* Switch to next task (identified by "p_new"). */
|
||||
os_tsk.new_tsk = p_new;
|
||||
p_new->state = RUNNING;
|
||||
DBG_TASK_SWITCH(p_new->task_id);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_dispatch -----------------------------------*/
|
||||
|
||||
void rt_dispatch (P_TCB next_TCB) {
|
||||
/* Dispatch next task if any identified or dispatch highest ready task */
|
||||
/* "next_TCB" identifies a task to run or has value NULL (=no next task) */
|
||||
if (next_TCB == NULL) {
|
||||
/* Running task was blocked: continue with highest ready task */
|
||||
next_TCB = rt_get_first (&os_rdy);
|
||||
rt_switch_req (next_TCB);
|
||||
}
|
||||
else {
|
||||
/* Check which task continues */
|
||||
if (next_TCB->prio > os_tsk.run->prio) {
|
||||
/* preempt running task */
|
||||
rt_put_rdy_first (os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_switch_req (next_TCB);
|
||||
}
|
||||
else {
|
||||
/* put next task into ready list, no task switch takes place */
|
||||
next_TCB->state = READY;
|
||||
rt_put_prio (&os_rdy, next_TCB);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_block --------------------------------------*/
|
||||
|
||||
void rt_block (U16 timeout, U8 block_state) {
|
||||
/* Block running task and choose next ready task. */
|
||||
/* "timeout" sets a time-out value or is 0xffff (=no time-out). */
|
||||
/* "block_state" defines the appropriate task state */
|
||||
P_TCB next_TCB;
|
||||
|
||||
if (timeout) {
|
||||
if (timeout < 0xffff) {
|
||||
rt_put_dly (os_tsk.run, timeout);
|
||||
}
|
||||
os_tsk.run->state = block_state;
|
||||
next_TCB = rt_get_first (&os_rdy);
|
||||
rt_switch_req (next_TCB);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_tsk_pass -----------------------------------*/
|
||||
|
||||
void rt_tsk_pass (void) {
|
||||
/* Allow tasks of same priority level to run cooperatively.*/
|
||||
P_TCB p_new;
|
||||
|
||||
p_new = rt_get_same_rdy_prio();
|
||||
if (p_new != NULL) {
|
||||
rt_put_prio ((P_XCB)&os_rdy, os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_switch_req (p_new);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_tsk_self -----------------------------------*/
|
||||
|
||||
OS_TID rt_tsk_self (void) {
|
||||
/* Return own task identifier value. */
|
||||
if (os_tsk.run == NULL) {
|
||||
return (0);
|
||||
}
|
||||
return (os_tsk.run->task_id);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_tsk_prio -----------------------------------*/
|
||||
|
||||
OS_RESULT rt_tsk_prio (OS_TID task_id, U8 new_prio) {
|
||||
/* Change execution priority of a task to "new_prio". */
|
||||
P_TCB p_task;
|
||||
|
||||
if (task_id == 0) {
|
||||
/* Change execution priority of calling task. */
|
||||
os_tsk.run->prio = new_prio;
|
||||
run:if (rt_rdy_prio() > new_prio) {
|
||||
rt_put_prio (&os_rdy, os_tsk.run);
|
||||
os_tsk.run->state = READY;
|
||||
rt_dispatch (NULL);
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
/* Find the task in the "os_active_TCB" array. */
|
||||
if (task_id > os_maxtaskrun || os_active_TCB[task_id-1] == NULL) {
|
||||
/* Task with "task_id" not found or not started. */
|
||||
return (OS_R_NOK);
|
||||
}
|
||||
p_task = os_active_TCB[task_id-1];
|
||||
p_task->prio = new_prio;
|
||||
if (p_task == os_tsk.run) {
|
||||
goto run;
|
||||
}
|
||||
rt_resort_prio (p_task);
|
||||
if (p_task->state == READY) {
|
||||
/* Task enqueued in a ready list. */
|
||||
p_task = rt_get_first (&os_rdy);
|
||||
rt_dispatch (p_task);
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
/*--------------------------- rt_tsk_delete ---------------------------------*/
|
||||
|
||||
OS_RESULT rt_tsk_delete (OS_TID task_id) {
|
||||
/* Terminate the task identified with "task_id". */
|
||||
P_TCB task_context;
|
||||
|
||||
if (task_id == 0 || task_id == os_tsk.run->task_id) {
|
||||
/* Terminate itself. */
|
||||
os_tsk.run->state = INACTIVE;
|
||||
os_tsk.run->tsk_stack = 0;
|
||||
rt_stk_check ();
|
||||
os_active_TCB[os_tsk.run->task_id-1] = NULL;
|
||||
|
||||
os_tsk.run->stack = NULL;
|
||||
DBG_TASK_NOTIFY(os_tsk.run, __FALSE);
|
||||
os_tsk.run = NULL;
|
||||
rt_dispatch (NULL);
|
||||
/* The program should never come to this point. */
|
||||
}
|
||||
else {
|
||||
/* Find the task in the "os_active_TCB" array. */
|
||||
if (task_id > os_maxtaskrun || os_active_TCB[task_id-1] == NULL) {
|
||||
/* Task with "task_id" not found or not started. */
|
||||
return (OS_R_NOK);
|
||||
}
|
||||
task_context = os_active_TCB[task_id-1];
|
||||
rt_rmv_list (task_context);
|
||||
rt_rmv_dly (task_context);
|
||||
os_active_TCB[task_id-1] = NULL;
|
||||
|
||||
task_context->stack = NULL;
|
||||
DBG_TASK_NOTIFY(task_context, __FALSE);
|
||||
}
|
||||
return (OS_R_OK);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_sys_init -----------------------------------*/
|
||||
|
||||
#ifdef __CMSIS_RTOS
|
||||
void rt_sys_init (void) {
|
||||
#else
|
||||
void rt_sys_init (FUNCP first_task, U32 prio_stksz, void *stk) {
|
||||
#endif
|
||||
/* Initialize system and start up task declared with "first_task". */
|
||||
U32 i;
|
||||
|
||||
DBG_INIT();
|
||||
|
||||
/* Initialize dynamic memory and task TCB pointers to NULL. */
|
||||
for (i = 0; i < os_maxtaskrun; i++) {
|
||||
os_active_TCB[i] = NULL;
|
||||
}
|
||||
|
||||
/* Set up TCB of idle demon */
|
||||
os_idle_TCB.task_id = 255;
|
||||
os_idle_TCB.priv_stack = idle_task_stack_size;
|
||||
os_idle_TCB.stack = idle_task_stack;
|
||||
rt_init_context (&os_idle_TCB, 0, os_idle_demon);
|
||||
|
||||
/* Set up ready list: initially empty */
|
||||
os_rdy.cb_type = HCB;
|
||||
os_rdy.p_lnk = NULL;
|
||||
/* Set up delay list: initially empty */
|
||||
os_dly.cb_type = HCB;
|
||||
os_dly.p_dlnk = NULL;
|
||||
os_dly.p_blnk = NULL;
|
||||
os_dly.delta_time = 0;
|
||||
|
||||
/* Fix SP and systemvariables to assume idle task is running */
|
||||
/* Transform main program into idle task by assuming idle TCB */
|
||||
#ifndef __CMSIS_RTOS
|
||||
rt_set_PSP (os_idle_TCB.tsk_stack);
|
||||
#endif
|
||||
os_tsk.run = &os_idle_TCB;
|
||||
os_tsk.run->state = RUNNING;
|
||||
|
||||
/* Initialize ps queue */
|
||||
os_psq->first = 0;
|
||||
os_psq->last = 0;
|
||||
os_psq->size = os_fifo_size;
|
||||
|
||||
rt_init_robin ();
|
||||
|
||||
/* Intitialize SVC and PendSV */
|
||||
rt_svc_init ();
|
||||
|
||||
#ifndef __CMSIS_RTOS
|
||||
/* Intitialize and start system clock timer */
|
||||
os_tick_irqn = os_tick_init ();
|
||||
if (os_tick_irqn >= 0) {
|
||||
OS_X_INIT(os_tick_irqn);
|
||||
}
|
||||
|
||||
/* Start up first user task before entering the endless loop */
|
||||
rt_tsk_create (first_task, prio_stksz, stk, NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_sys_start ----------------------------------*/
|
||||
|
||||
#ifdef __CMSIS_RTOS
|
||||
void rt_sys_start (void) {
|
||||
/* Start system */
|
||||
|
||||
/* Intitialize and start system clock timer */
|
||||
os_tick_irqn = os_tick_init ();
|
||||
if (os_tick_irqn >= 0) {
|
||||
OS_X_INIT(os_tick_irqn);
|
||||
}
|
||||
extern void RestoreContext();
|
||||
RestoreContext(); // Start the first task
|
||||
}
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_TASK.H
|
||||
* Purpose: Task functions and system start up.
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Definitions */
|
||||
#define __CMSIS_RTOS 1
|
||||
|
||||
/* Values for 'state' */
|
||||
#define INACTIVE 0
|
||||
#define READY 1
|
||||
#define RUNNING 2
|
||||
#define WAIT_DLY 3
|
||||
#define WAIT_ITV 4
|
||||
#define WAIT_OR 5
|
||||
#define WAIT_AND 6
|
||||
#define WAIT_SEM 7
|
||||
#define WAIT_MBX 8
|
||||
#define WAIT_MUT 9
|
||||
|
||||
/* Return codes */
|
||||
#define OS_R_TMO 0x01
|
||||
#define OS_R_EVT 0x02
|
||||
#define OS_R_SEM 0x03
|
||||
#define OS_R_MBX 0x04
|
||||
#define OS_R_MUT 0x05
|
||||
|
||||
#define OS_R_OK 0x00
|
||||
#define OS_R_NOK 0xff
|
||||
|
||||
/* Variables */
|
||||
extern struct OS_TSK os_tsk;
|
||||
extern struct OS_TCB os_idle_TCB;
|
||||
|
||||
/* Functions */
|
||||
extern void rt_switch_req (P_TCB p_new);
|
||||
extern void rt_dispatch (P_TCB next_TCB);
|
||||
extern void rt_block (U16 timeout, U8 block_state);
|
||||
extern void rt_tsk_pass (void);
|
||||
extern OS_TID rt_tsk_self (void);
|
||||
extern OS_RESULT rt_tsk_prio (OS_TID task_id, U8 new_prio);
|
||||
extern OS_RESULT rt_tsk_delete (OS_TID task_id);
|
||||
extern void rt_sys_init (void);
|
||||
extern void rt_sys_start (void);
|
||||
|
|
@ -0,0 +1,94 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_TIME.C
|
||||
* Purpose: Delay and interval wait functions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#include "rt_TypeDef.h"
|
||||
#include "RTX_Conf.h"
|
||||
#include "rt_Task.h"
|
||||
#include "rt_Time.h"
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Global Variables
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Free running system tick counter */
|
||||
U32 os_time;
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* Functions
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*--------------------------- rt_time_get -----------------------------------*/
|
||||
|
||||
U32 rt_time_get (void) {
|
||||
/* Get system time tick */
|
||||
return (os_time);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_dly_wait -----------------------------------*/
|
||||
|
||||
void rt_dly_wait (U16 delay_time) {
|
||||
/* Delay task by "delay_time" */
|
||||
rt_block (delay_time, WAIT_DLY);
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_itv_set ------------------------------------*/
|
||||
|
||||
void rt_itv_set (U16 interval_time) {
|
||||
/* Set interval length and define start of first interval */
|
||||
os_tsk.run->interval_time = interval_time;
|
||||
os_tsk.run->delta_time = interval_time + (U16)os_time;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------- rt_itv_wait -----------------------------------*/
|
||||
|
||||
void rt_itv_wait (void) {
|
||||
/* Wait for interval end and define start of next one */
|
||||
U16 delta;
|
||||
|
||||
delta = os_tsk.run->delta_time - (U16)os_time;
|
||||
os_tsk.run->delta_time += os_tsk.run->interval_time;
|
||||
if ((delta & 0x8000) == 0) {
|
||||
rt_block (delta, WAIT_ITV);
|
||||
}
|
||||
}
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_TIME.H
|
||||
* Purpose: Delay and interval wait functions definitions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Variables */
|
||||
extern U32 os_time;
|
||||
|
||||
/* Functions */
|
||||
extern U32 rt_time_get (void);
|
||||
extern void rt_dly_wait (U16 delay_time);
|
||||
extern void rt_itv_set (U16 interval_time);
|
||||
extern void rt_itv_wait (void);
|
||||
|
||||
/*----------------------------------------------------------------------------
|
||||
* end of file
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
|
@ -0,0 +1,128 @@
|
|||
/*----------------------------------------------------------------------------
|
||||
* RL-ARM - RTX
|
||||
*----------------------------------------------------------------------------
|
||||
* Name: RT_TYPEDEF.H
|
||||
* Purpose: Type Definitions
|
||||
* Rev.: V4.60
|
||||
*----------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
|
||||
* All rights reserved.
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* - Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* - Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* - Neither the name of ARM nor the names of its contributors may be used
|
||||
* to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#ifndef RT_TYPE_DEF_H
|
||||
#define RT_TYPE_DEF_H
|
||||
|
||||
#include "os_tcb.h"
|
||||
|
||||
typedef U32 OS_TID;
|
||||
typedef void *OS_ID;
|
||||
typedef U32 OS_RESULT;
|
||||
|
||||
#define TCB_STACKF 32 /* 'stack_frame' offset */
|
||||
#define TCB_TSTACK 36 /* 'tsk_stack' offset */
|
||||
|
||||
typedef struct OS_PSFE { /* Post Service Fifo Entry */
|
||||
void *id; /* Object Identification */
|
||||
U32 arg; /* Object Argument */
|
||||
} *P_PSFE;
|
||||
|
||||
typedef struct OS_PSQ { /* Post Service Queue */
|
||||
U8 first; /* FIFO Head Index */
|
||||
U8 last; /* FIFO Tail Index */
|
||||
U8 count; /* Number of stored items in FIFO */
|
||||
U8 size; /* FIFO Size */
|
||||
struct OS_PSFE q[1]; /* FIFO Content */
|
||||
} *P_PSQ;
|
||||
|
||||
typedef struct OS_TSK {
|
||||
P_TCB run; /* Current running task */
|
||||
P_TCB new_tsk; /* Scheduled task to run */
|
||||
} *P_TSK;
|
||||
|
||||
typedef struct OS_ROBIN { /* Round Robin Control */
|
||||
P_TCB task; /* Round Robin task */
|
||||
U16 time; /* Round Robin switch time */
|
||||
U16 tout; /* Round Robin timeout */
|
||||
} *P_ROBIN;
|
||||
|
||||
typedef struct OS_XCB {
|
||||
U8 cb_type; /* Control Block Type */
|
||||
struct OS_TCB *p_lnk; /* Link pointer for ready/sem. wait list */
|
||||
struct OS_TCB *p_rlnk; /* Link pointer for sem./mbx lst backwards */
|
||||
struct OS_TCB *p_dlnk; /* Link pointer for delay list */
|
||||
struct OS_TCB *p_blnk; /* Link pointer for delay list backwards */
|
||||
U16 delta_time; /* Time until time out */
|
||||
} *P_XCB;
|
||||
|
||||
typedef struct OS_MCB {
|
||||
U8 cb_type; /* Control Block Type */
|
||||
U8 state; /* State flag variable */
|
||||
U8 isr_st; /* State flag variable for isr functions */
|
||||
struct OS_TCB *p_lnk; /* Chain of tasks waiting for message */
|
||||
U16 first; /* Index of the message list begin */
|
||||
U16 last; /* Index of the message list end */
|
||||
U16 count; /* Actual number of stored messages */
|
||||
U16 size; /* Maximum number of stored messages */
|
||||
void *msg[1]; /* FIFO for Message pointers 1st element */
|
||||
} *P_MCB;
|
||||
|
||||
typedef struct OS_SCB {
|
||||
U8 cb_type; /* Control Block Type */
|
||||
U8 mask; /* Semaphore token mask */
|
||||
U16 tokens; /* Semaphore tokens */
|
||||
struct OS_TCB *p_lnk; /* Chain of tasks waiting for tokens */
|
||||
} *P_SCB;
|
||||
|
||||
typedef struct OS_MUCB {
|
||||
U8 cb_type; /* Control Block Type */
|
||||
U8 prio; /* Owner task default priority */
|
||||
U16 level; /* Call nesting level */
|
||||
struct OS_TCB *p_lnk; /* Chain of tasks waiting for mutex */
|
||||
struct OS_TCB *owner; /* Mutex owner task */
|
||||
} *P_MUCB;
|
||||
|
||||
typedef struct OS_XTMR {
|
||||
struct OS_TMR *next;
|
||||
U16 tcnt;
|
||||
} *P_XTMR;
|
||||
|
||||
typedef struct OS_TMR {
|
||||
struct OS_TMR *next; /* Link pointer to Next timer */
|
||||
U16 tcnt; /* Timer delay count */
|
||||
U16 info; /* User defined call info */
|
||||
} *P_TMR;
|
||||
|
||||
typedef struct OS_BM {
|
||||
void *free; /* Pointer to first free memory block */
|
||||
void *end; /* Pointer to memory block end */
|
||||
U32 blk_size; /* Memory block size */
|
||||
} *P_BM;
|
||||
|
||||
/* Definitions */
|
||||
#define __TRUE 1
|
||||
#define __FALSE 0
|
||||
#define NULL ((void *) 0)
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue