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MIMXRT1050: Update UART driver 

The UART first instance is 1 and not 0. Update the code logic to account
for this.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
pull/12562/head
Mahesh Mahadevan 2019-11-15 09:17:13 -06:00 committed by Arto Kinnunen
parent 43701a1773
commit a513634ea3
1 changed files with 12 additions and 10 deletions
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22
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/serial_api.c
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@ -29,7 +29,8 @@
#include "PeripheralPins.h" #include "PeripheralPins.h"
#include "fsl_clock_config.h" #include "fsl_clock_config.h"
static uint32_t serial_irq_ids[FSL_FEATURE_SOC_LPUART_COUNT] = {0}; /* LPUART starts from index 1 */
static uint32_t serial_irq_ids[FSL_FEATURE_SOC_LPUART_COUNT + 1] = {0};
static uart_irq_handler irq_handler; static uart_irq_handler irq_handler;
/* Array of UART peripheral base address. */ /* Array of UART peripheral base address. */
static LPUART_Type *const uart_addrs[] = LPUART_BASE_PTRS; static LPUART_Type *const uart_addrs[] = LPUART_BASE_PTRS;
@ -320,28 +321,28 @@ static int serial_is_enabled(uint32_t uart_index)
{ {
int clock_enabled = 0; int clock_enabled = 0;
switch (uart_index) { switch (uart_index) {
case 0: case 1:
clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG12_MASK) >> CCM_CCGR5_CG12_SHIFT; clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG12_MASK) >> CCM_CCGR5_CG12_SHIFT;
break; break;
case 1: case 2:
clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG14_MASK) >> CCM_CCGR0_CG14_SHIFT; clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG14_MASK) >> CCM_CCGR0_CG14_SHIFT;
break; break;
case 2: case 3:
clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG6_MASK) >> CCM_CCGR0_CG6_SHIFT; clock_enabled = (CCM->CCGR0 & CCM_CCGR0_CG6_MASK) >> CCM_CCGR0_CG6_SHIFT;
break; break;
case 3: case 4:
clock_enabled = (CCM->CCGR1 & CCM_CCGR1_CG12_MASK) >> CCM_CCGR1_CG12_SHIFT; clock_enabled = (CCM->CCGR1 & CCM_CCGR1_CG12_MASK) >> CCM_CCGR1_CG12_SHIFT;
break; break;
case 4: case 5:
clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG1_MASK) >> CCM_CCGR3_CG1_SHIFT; clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG1_MASK) >> CCM_CCGR3_CG1_SHIFT;
break; break;
case 5: case 6:
clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG3_MASK) >> CCM_CCGR3_CG3_SHIFT; clock_enabled = (CCM->CCGR3 & CCM_CCGR3_CG3_MASK) >> CCM_CCGR3_CG3_SHIFT;
break; break;
case 6: case 7:
clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG13_MASK) >> CCM_CCGR5_CG13_SHIFT; clock_enabled = (CCM->CCGR5 & CCM_CCGR5_CG13_MASK) >> CCM_CCGR5_CG13_SHIFT;
break; break;
case 7: case 8:
clock_enabled = (CCM->CCGR6 & CCM_CCGR6_CG7_MASK) >> CCM_CCGR6_CG7_SHIFT; clock_enabled = (CCM->CCGR6 & CCM_CCGR6_CG7_MASK) >> CCM_CCGR6_CG7_SHIFT;
break; break;
default: default:
@ -357,7 +358,8 @@ bool serial_check_tx_ongoing()
int i; int i;
bool uart_tx_ongoing = false; bool uart_tx_ongoing = false;
for (i = 0; i < FSL_FEATURE_SOC_LPUART_COUNT; i++) { /* The first LPUART instance number is 1 */
for (i = 1; i <= FSL_FEATURE_SOC_LPUART_COUNT; i++) {
/* First check if UART is enabled */ /* First check if UART is enabled */
if (!serial_is_enabled(i)) { if (!serial_is_enabled(i)) {
/* UART is not enabled, check the next instance */ /* UART is not enabled, check the next instance */