diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_count.h b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_count.h index bcbeb461f1..3c205ddfb2 100644 --- a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_count.h +++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_count.h @@ -40,9 +40,9 @@ * \asf_license_stop * */ - /** - * Support and FAQ: visit Atmel Support - */ +/** +* Support and FAQ: visit Atmel Support +*/ #ifndef RTC_COUNT_H_INCLUDED #define RTC_COUNT_H_INCLUDED @@ -383,18 +383,18 @@ extern "C" { * RTC clock source. */ enum rtc_clock_sel { - /** 1.024KHz from 32KHz internal ULP oscillator. */ - RTC_CLOCK_SELECTION_ULP1K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val, - /** 32.768KHz from 32KHz internal ULP oscillator. */ - RTC_CLOCK_SELECTION_ULP32K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val, - /** 1.024KHz from 32KHz internal oscillator. */ - RTC_CLOCK_SELECTION_OSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC1K_Val, - /** 32.768KHz from 32KHz internal oscillator. */ - RTC_CLOCK_SELECTION_OSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC32K_Val, - /** 1.024KHz from 32KHz internal oscillator. */ - RTC_CLOCK_SELECTION_XOSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val, - /** 32.768KHz from 32.768KHz external crystal oscillator. */ - RTC_CLOCK_SELECTION_XOSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val, + /** 1.024KHz from 32KHz internal ULP oscillator. */ + RTC_CLOCK_SELECTION_ULP1K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val, + /** 32.768KHz from 32KHz internal ULP oscillator. */ + RTC_CLOCK_SELECTION_ULP32K = OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val, + /** 1.024KHz from 32KHz internal oscillator. */ + RTC_CLOCK_SELECTION_OSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC1K_Val, + /** 32.768KHz from 32KHz internal oscillator. */ + RTC_CLOCK_SELECTION_OSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_OSC32K_Val, + /** 1.024KHz from 32KHz internal oscillator. */ + RTC_CLOCK_SELECTION_XOSC1K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val, + /** 32.768KHz from 32.768KHz external crystal oscillator. */ + RTC_CLOCK_SELECTION_XOSC32K = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val, }; #endif @@ -405,10 +405,10 @@ enum rtc_clock_sel { * operation. */ enum rtc_count_mode { - /** RTC Count module operates in 16-bit mode. */ - RTC_COUNT_MODE_16BIT = 0, - /** RTC Count module operates in 32-bit mode. */ - RTC_COUNT_MODE_32BIT = 1, + /** RTC Count module operates in 16-bit mode. */ + RTC_COUNT_MODE_16BIT = 0, + /** RTC Count module operates in 32-bit mode. */ + RTC_COUNT_MODE_32BIT = 1, }; #if !defined (RTC_NUM_OF_COMP16) && defined(RTC_COMP16_NUM) @@ -421,27 +421,27 @@ enum rtc_count_mode { * \note Not all compare channels are available in all devices and modes. */ enum rtc_count_compare { - /** Compare channel 0. */ - RTC_COUNT_COMPARE_0 = 0, + /** Compare channel 0. */ + RTC_COUNT_COMPARE_0 = 0, #if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__) - /** Compare channel 1. */ - RTC_COUNT_COMPARE_1 = 1, + /** Compare channel 1. */ + RTC_COUNT_COMPARE_1 = 1, #endif #if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__) - /** Compare channel 2. */ - RTC_COUNT_COMPARE_2 = 2, + /** Compare channel 2. */ + RTC_COUNT_COMPARE_2 = 2, #endif #if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__) - /** Compare channel 3. */ - RTC_COUNT_COMPARE_3 = 3, + /** Compare channel 3. */ + RTC_COUNT_COMPARE_3 = 3, #endif #if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__) - /** Compare channel 4. */ - RTC_COUNT_COMPARE_4 = 4, + /** Compare channel 4. */ + RTC_COUNT_COMPARE_4 = 4, #endif #if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__) - /** Compare channel 5. */ - RTC_COUNT_COMPARE_5 = 5, + /** Compare channel 5. */ + RTC_COUNT_COMPARE_5 = 5, #endif }; @@ -449,23 +449,23 @@ enum rtc_count_compare { /** * \brief Available periodic interval source. */ -enum rtc_count_periodic_interval{ - /** Periodic interval 0 */ - RTC_COUNT_PERIODIC_INTERVAL_0 = 0, - /** Periodic interval 1 */ - RTC_COUNT_PERIODIC_INTERVAL_1 = 1, - /** Periodic interval 2 */ - RTC_COUNT_PERIODIC_INTERVAL_2 = 2, - /** Periodic interval 3 */ - RTC_COUNT_PERIODIC_INTERVAL_3 = 3, - /** Periodic interval 4 */ - RTC_COUNT_PERIODIC_INTERVAL_4 = 4, - /** Periodic interval 5 */ - RTC_COUNT_PERIODIC_INTERVAL_5 = 5, - /** Periodic interval 6 */ - RTC_COUNT_PERIODIC_INTERVAL_6 = 6, - /** Periodic interval 7 */ - RTC_COUNT_PERIODIC_INTERVAL_7 = 7, +enum rtc_count_periodic_interval { + /** Periodic interval 0 */ + RTC_COUNT_PERIODIC_INTERVAL_0 = 0, + /** Periodic interval 1 */ + RTC_COUNT_PERIODIC_INTERVAL_1 = 1, + /** Periodic interval 2 */ + RTC_COUNT_PERIODIC_INTERVAL_2 = 2, + /** Periodic interval 3 */ + RTC_COUNT_PERIODIC_INTERVAL_3 = 3, + /** Periodic interval 4 */ + RTC_COUNT_PERIODIC_INTERVAL_4 = 4, + /** Periodic interval 5 */ + RTC_COUNT_PERIODIC_INTERVAL_5 = 5, + /** Periodic interval 6 */ + RTC_COUNT_PERIODIC_INTERVAL_6 = 6, + /** Periodic interval 7 */ + RTC_COUNT_PERIODIC_INTERVAL_7 = 7, }; #endif @@ -477,50 +477,50 @@ enum rtc_count_periodic_interval{ * The available callback types for the RTC count module. */ enum rtc_count_callback { - /** Callback for Periodic Interval 0 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_0 = 0, - /** Callback for Periodic Interval 1 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_1, - /** Callback for Periodic Interval 2 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_2, - /** Callback for Periodic Interval 3 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_3, - /** Callback for Periodic Interval 4 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_4, - /** Callback for Periodic Interval 5 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_5, - /** Callback for Periodic Interval 6 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_6, - /** Callback for Periodic Interval 7 Interrupt. */ - RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_7, - /** Callback for compare channel 0. */ - RTC_COUNT_CALLBACK_COMPARE_0, + /** Callback for Periodic Interval 0 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_0 = 0, + /** Callback for Periodic Interval 1 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_1, + /** Callback for Periodic Interval 2 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_2, + /** Callback for Periodic Interval 3 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_3, + /** Callback for Periodic Interval 4 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_4, + /** Callback for Periodic Interval 5 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_5, + /** Callback for Periodic Interval 6 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_6, + /** Callback for Periodic Interval 7 Interrupt. */ + RTC_COUNT_CALLBACK_PERIODIC_INTERVAL_7, + /** Callback for compare channel 0. */ + RTC_COUNT_CALLBACK_COMPARE_0, # if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__) - /** Callback for compare channel 1. */ - RTC_COUNT_CALLBACK_COMPARE_1, + /** Callback for compare channel 1. */ + RTC_COUNT_CALLBACK_COMPARE_1, # endif # if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__) - /** Callback for compare channel 2. */ - RTC_COUNT_CALLBACK_COMPARE_2, + /** Callback for compare channel 2. */ + RTC_COUNT_CALLBACK_COMPARE_2, # endif # if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__) - /** Callback for compare channel 3. */ - RTC_COUNT_CALLBACK_COMPARE_3, + /** Callback for compare channel 3. */ + RTC_COUNT_CALLBACK_COMPARE_3, # endif # if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__) - /** Callback for compare channel 4. */ - RTC_COUNT_CALLBACK_COMPARE_4, + /** Callback for compare channel 4. */ + RTC_COUNT_CALLBACK_COMPARE_4, # endif # if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__) - /** Callback for compare channel 5. */ - RTC_COUNT_CALLBACK_COMPARE_5, + /** Callback for compare channel 5. */ + RTC_COUNT_CALLBACK_COMPARE_5, # endif - /** Callback for overflow. */ - RTC_COUNT_CALLBACK_OVERFLOW, + /** Callback for overflow. */ + RTC_COUNT_CALLBACK_OVERFLOW, # if !defined(__DOXYGEN__) - /** Total number of callbacks. */ - _RTC_COUNT_CALLBACK_N + /** Total number of callbacks. */ + _RTC_COUNT_CALLBACK_N # endif }; #else @@ -530,33 +530,33 @@ enum rtc_count_callback { * The available callback types for the RTC count module. */ enum rtc_count_callback { - /** Callback for compare channel 0. */ - RTC_COUNT_CALLBACK_COMPARE_0 = 0, + /** Callback for compare channel 0. */ + RTC_COUNT_CALLBACK_COMPARE_0 = 0, # if (RTC_NUM_OF_COMP16 > 1) || defined(__DOXYGEN__) - /** Callback for compare channel 1. */ - RTC_COUNT_CALLBACK_COMPARE_1, + /** Callback for compare channel 1. */ + RTC_COUNT_CALLBACK_COMPARE_1, # endif # if (RTC_NUM_OF_COMP16 > 2) || defined(__DOXYGEN__) - /** Callback for compare channel 2. */ - RTC_COUNT_CALLBACK_COMPARE_2, + /** Callback for compare channel 2. */ + RTC_COUNT_CALLBACK_COMPARE_2, # endif # if (RTC_NUM_OF_COMP16 > 3) || defined(__DOXYGEN__) - /** Callback for compare channel 3. */ - RTC_COUNT_CALLBACK_COMPARE_3, + /** Callback for compare channel 3. */ + RTC_COUNT_CALLBACK_COMPARE_3, # endif # if (RTC_NUM_OF_COMP16 > 4) || defined(__DOXYGEN__) - /** Callback for compare channel 4. */ - RTC_COUNT_CALLBACK_COMPARE_4, + /** Callback for compare channel 4. */ + RTC_COUNT_CALLBACK_COMPARE_4, # endif # if (RTC_NUM_OF_COMP16 > 5) || defined(__DOXYGEN__) - /** Callback for compare channel 5. */ - RTC_COUNT_CALLBACK_COMPARE_5, + /** Callback for compare channel 5. */ + RTC_COUNT_CALLBACK_COMPARE_5, # endif - /** Callback for overflow. */ - RTC_COUNT_CALLBACK_OVERFLOW, + /** Callback for overflow. */ + RTC_COUNT_CALLBACK_OVERFLOW, # if !defined(__DOXYGEN__) - /** Total number of callbacks. */ - _RTC_COUNT_CALLBACK_N + /** Total number of callbacks. */ + _RTC_COUNT_CALLBACK_N # endif }; #endif @@ -573,31 +573,31 @@ typedef void (*rtc_count_callback_t)(void); * The available input clock prescaler values for the RTC count module. */ enum rtc_count_prescaler { - /** RTC prescaler is off, and the input clock frequency is - prescaled by a factor of 1. */ - RTC_COUNT_PRESCALER_OFF = RTC_MODE0_CTRLA_PRESCALER_OFF, - /** RTC input clock frequency is prescaled by a factor of 1. */ - RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRLA_PRESCALER_DIV1, - /** RTC input clock frequency is prescaled by a factor of 2. */ - RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRLA_PRESCALER_DIV2, - /** RTC input clock frequency is prescaled by a factor of 4. */ - RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRLA_PRESCALER_DIV4, - /** RTC input clock frequency is prescaled by a factor of 8. */ - RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRLA_PRESCALER_DIV8, - /** RTC input clock frequency is prescaled by a factor of 16. */ - RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRLA_PRESCALER_DIV16, - /** RTC input clock frequency is prescaled by a factor of 32. */ - RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRLA_PRESCALER_DIV32, - /** RTC input clock frequency is prescaled by a factor of 64. */ - RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRLA_PRESCALER_DIV64, - /** RTC input clock frequency is prescaled by a factor of 128. */ - RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRLA_PRESCALER_DIV128, - /** RTC input clock frequency is prescaled by a factor of 256. */ - RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRLA_PRESCALER_DIV256, - /** RTC input clock frequency is prescaled by a factor of 512. */ - RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRLA_PRESCALER_DIV512, - /** RTC input clock frequency is prescaled by a factor of 1024. */ - RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRLA_PRESCALER_DIV1024, + /** RTC prescaler is off, and the input clock frequency is + prescaled by a factor of 1. */ + RTC_COUNT_PRESCALER_OFF = RTC_MODE0_CTRLA_PRESCALER_OFF, + /** RTC input clock frequency is prescaled by a factor of 1. */ + RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRLA_PRESCALER_DIV1, + /** RTC input clock frequency is prescaled by a factor of 2. */ + RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRLA_PRESCALER_DIV2, + /** RTC input clock frequency is prescaled by a factor of 4. */ + RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRLA_PRESCALER_DIV4, + /** RTC input clock frequency is prescaled by a factor of 8. */ + RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRLA_PRESCALER_DIV8, + /** RTC input clock frequency is prescaled by a factor of 16. */ + RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRLA_PRESCALER_DIV16, + /** RTC input clock frequency is prescaled by a factor of 32. */ + RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRLA_PRESCALER_DIV32, + /** RTC input clock frequency is prescaled by a factor of 64. */ + RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRLA_PRESCALER_DIV64, + /** RTC input clock frequency is prescaled by a factor of 128. */ + RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRLA_PRESCALER_DIV128, + /** RTC input clock frequency is prescaled by a factor of 256. */ + RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRLA_PRESCALER_DIV256, + /** RTC input clock frequency is prescaled by a factor of 512. */ + RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRLA_PRESCALER_DIV512, + /** RTC input clock frequency is prescaled by a factor of 1024. */ + RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRLA_PRESCALER_DIV1024, }; #else /** @@ -606,28 +606,28 @@ enum rtc_count_prescaler { * The available input clock prescaler values for the RTC count module. */ enum rtc_count_prescaler { - /** RTC input clock frequency is prescaled by a factor of 1. */ - RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRL_PRESCALER_DIV1, - /** RTC input clock frequency is prescaled by a factor of 2. */ - RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRL_PRESCALER_DIV2, - /** RTC input clock frequency is prescaled by a factor of 4. */ - RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRL_PRESCALER_DIV4, - /** RTC input clock frequency is prescaled by a factor of 8. */ - RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRL_PRESCALER_DIV8, - /** RTC input clock frequency is prescaled by a factor of 16. */ - RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRL_PRESCALER_DIV16, - /** RTC input clock frequency is prescaled by a factor of 32. */ - RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRL_PRESCALER_DIV32, - /** RTC input clock frequency is prescaled by a factor of 64. */ - RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRL_PRESCALER_DIV64, - /** RTC input clock frequency is prescaled by a factor of 128. */ - RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRL_PRESCALER_DIV128, - /** RTC input clock frequency is prescaled by a factor of 256. */ - RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRL_PRESCALER_DIV256, - /** RTC input clock frequency is prescaled by a factor of 512. */ - RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRL_PRESCALER_DIV512, - /** RTC input clock frequency is prescaled by a factor of 1024. */ - RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRL_PRESCALER_DIV1024, + /** RTC input clock frequency is prescaled by a factor of 1. */ + RTC_COUNT_PRESCALER_DIV_1 = RTC_MODE0_CTRL_PRESCALER_DIV1, + /** RTC input clock frequency is prescaled by a factor of 2. */ + RTC_COUNT_PRESCALER_DIV_2 = RTC_MODE0_CTRL_PRESCALER_DIV2, + /** RTC input clock frequency is prescaled by a factor of 4. */ + RTC_COUNT_PRESCALER_DIV_4 = RTC_MODE0_CTRL_PRESCALER_DIV4, + /** RTC input clock frequency is prescaled by a factor of 8. */ + RTC_COUNT_PRESCALER_DIV_8 = RTC_MODE0_CTRL_PRESCALER_DIV8, + /** RTC input clock frequency is prescaled by a factor of 16. */ + RTC_COUNT_PRESCALER_DIV_16 = RTC_MODE0_CTRL_PRESCALER_DIV16, + /** RTC input clock frequency is prescaled by a factor of 32. */ + RTC_COUNT_PRESCALER_DIV_32 = RTC_MODE0_CTRL_PRESCALER_DIV32, + /** RTC input clock frequency is prescaled by a factor of 64. */ + RTC_COUNT_PRESCALER_DIV_64 = RTC_MODE0_CTRL_PRESCALER_DIV64, + /** RTC input clock frequency is prescaled by a factor of 128. */ + RTC_COUNT_PRESCALER_DIV_128 = RTC_MODE0_CTRL_PRESCALER_DIV128, + /** RTC input clock frequency is prescaled by a factor of 256. */ + RTC_COUNT_PRESCALER_DIV_256 = RTC_MODE0_CTRL_PRESCALER_DIV256, + /** RTC input clock frequency is prescaled by a factor of 512. */ + RTC_COUNT_PRESCALER_DIV_512 = RTC_MODE0_CTRL_PRESCALER_DIV512, + /** RTC input clock frequency is prescaled by a factor of 1024. */ + RTC_COUNT_PRESCALER_DIV_1024 = RTC_MODE0_CTRL_PRESCALER_DIV1024, }; #endif @@ -638,14 +638,14 @@ enum rtc_count_prescaler { * \ref rtc_count_disable_events(). */ struct rtc_count_events { - /** Generate an output event on each overflow of the RTC count. */ - bool generate_event_on_overflow; - /** Generate an output event on a compare channel match against the RTC - * count. */ - bool generate_event_on_compare[RTC_NUM_OF_COMP16]; - /** Generate an output event periodically at a binary division of the RTC - * counter frequency. */ - bool generate_event_on_periodic[8]; + /** Generate an output event on each overflow of the RTC count. */ + bool generate_event_on_overflow; + /** Generate an output event on a compare channel match against the RTC + * count. */ + bool generate_event_on_compare[RTC_NUM_OF_COMP16]; + /** Generate an output event periodically at a binary division of the RTC + * counter frequency. */ + bool generate_event_on_periodic[8]; }; #if !defined(__DOXYGEN__) @@ -653,21 +653,21 @@ struct rtc_count_events { * \brief Device structure. */ struct rtc_module { - /** RTC hardware module. */ - Rtc *hw; - /** Operation mode of count. */ - enum rtc_count_mode mode; + /** RTC hardware module. */ + Rtc *hw; + /** Operation mode of count. */ + enum rtc_count_mode mode; #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED - /** Set if counter value should be continuously updated. */ - bool continuously_update; + /** Set if counter value should be continuously updated. */ + bool continuously_update; #endif # if RTC_COUNT_ASYNC == true - /** Pointers to callback functions. */ - volatile rtc_count_callback_t callbacks[_RTC_COUNT_CALLBACK_N]; - /** Mask for registered callbacks. */ - volatile uint16_t registered_callback; - /** Mask for enabled callbacks. */ - volatile uint16_t enabled_callback; + /** Pointers to callback functions. */ + volatile rtc_count_callback_t callbacks[_RTC_COUNT_CALLBACK_N]; + /** Mask for registered callbacks. */ + volatile uint16_t registered_callback; + /** Mask for enabled callbacks. */ + volatile uint16_t enabled_callback; # endif }; #endif @@ -680,21 +680,21 @@ struct rtc_module { * user configurations are set. */ struct rtc_count_config { - /** Input clock prescaler for the RTC module. */ - enum rtc_count_prescaler prescaler; - /** Select the operation mode of the RTC.*/ - enum rtc_count_mode mode; - /** If true, clears the counter value on compare match. Only available - * whilst running in 32-bit mode. */ - bool clear_on_match; + /** Input clock prescaler for the RTC module. */ + enum rtc_count_prescaler prescaler; + /** Select the operation mode of the RTC.*/ + enum rtc_count_mode mode; + /** If true, clears the counter value on compare match. Only available + * whilst running in 32-bit mode. */ + bool clear_on_match; #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED - /** Continuously update the counter value so no synchronization is - * needed for reading. */ - bool continuously_update; + /** Continuously update the counter value so no synchronization is + * needed for reading. */ + bool continuously_update; #endif - /** Array of Compare values. Not all Compare values are available in 32-bit - * mode. */ - uint32_t compare_values[RTC_NUM_OF_COMP16]; + /** Array of Compare values. Not all Compare values are available in 32-bit + * mode. */ + uint32_t compare_values[RTC_NUM_OF_COMP16]; }; @@ -721,23 +721,23 @@ struct rtc_count_config { * values. */ static inline void rtc_count_get_config_defaults( - struct rtc_count_config *const config) + struct rtc_count_config *const config) { - /* Sanity check argument */ - Assert(config); + /* Sanity check argument */ + Assert(config); - /* Set default into configuration structure */ - config->prescaler = RTC_COUNT_PRESCALER_DIV_1024; - config->mode = RTC_COUNT_MODE_32BIT; - config->clear_on_match = false; + /* Set default into configuration structure */ + config->prescaler = RTC_COUNT_PRESCALER_DIV_1024; + config->mode = RTC_COUNT_MODE_32BIT; + config->clear_on_match = false; #ifdef FEATURE_RTC_CONTINUOUSLY_UPDATED - config->continuously_update = false; + config->continuously_update = false; #endif - for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { - config->compare_values[i] = 0; - } + for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { + config->compare_values[i] = 0; + } } void rtc_count_reset(struct rtc_module *const module); @@ -753,32 +753,32 @@ void rtc_count_disable(struct rtc_module *const module); * \return Index of the given AC module instance. */ uint8_t _rtc_get_inst_index( - Rtc *const hw) + Rtc *const hw) { - /* List of available RTC modules. */ - static Rtc *const rtc_modules[RTC_INST_NUM] = RTC_INSTS; + /* List of available RTC modules. */ + static Rtc *const rtc_modules[RTC_INST_NUM] = RTC_INSTS; - /* Find index for RTC instance. */ - for (uint32_t i = 0; i < RTC_INST_NUM; i++) { - if (hw == rtc_modules[i]) { - return i; - } - } + /* Find index for RTC instance. */ + for (uint32_t i = 0; i < RTC_INST_NUM; i++) { + if (hw == rtc_modules[i]) { + return i; + } + } - /* Invalid data given. */ - Assert(false); - return 0; + /* Invalid data given. */ + Assert(false); + return 0; } #endif /* (RTC_INST_NUM > 1) && !defined(__DOXYGEN__) */ enum status_code rtc_count_init( - struct rtc_module *const module, - Rtc *const hw, - const struct rtc_count_config *const config); + struct rtc_module *const module, + Rtc *const hw, + const struct rtc_count_config *const config); enum status_code rtc_count_frequency_correction( - struct rtc_module *const module, - const int8_t value); + struct rtc_module *const module, + const int8_t value); /** @} */ @@ -786,28 +786,28 @@ enum status_code rtc_count_frequency_correction( * @{ */ enum status_code rtc_count_set_count( - struct rtc_module *const module, - const uint32_t count_value); + struct rtc_module *const module, + const uint32_t count_value); uint32_t rtc_count_get_count(struct rtc_module *const module); enum status_code rtc_count_set_compare( - struct rtc_module *const module, - const uint32_t comp_value, - const enum rtc_count_compare comp_index); + struct rtc_module *const module, + const uint32_t comp_value, + const enum rtc_count_compare comp_index); enum status_code rtc_count_get_compare( - struct rtc_module *const module, - uint32_t *const comp_value, - const enum rtc_count_compare comp_index); + struct rtc_module *const module, + uint32_t *const comp_value, + const enum rtc_count_compare comp_index); enum status_code rtc_count_set_period( - struct rtc_module *const module, - uint16_t period_value); + struct rtc_module *const module, + uint16_t period_value); enum status_code rtc_count_get_period( - struct rtc_module *const module, - uint16_t *const period_value); + struct rtc_module *const module, + uint16_t *const period_value); /** @} */ @@ -832,14 +832,14 @@ enum status_code rtc_count_get_period( static inline bool rtc_count_is_overflow(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Return status of flag */ - return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_OVF); + /* Return status of flag */ + return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_OVF); } /** @@ -852,14 +852,14 @@ static inline bool rtc_count_is_overflow(struct rtc_module *const module) */ static inline void rtc_count_clear_overflow(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Clear OVF flag */ - rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF; + /* Clear OVF flag */ + rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_OVF; } #ifdef FEATURE_RTC_PERIODIC_INT @@ -877,16 +877,16 @@ static inline void rtc_count_clear_overflow(struct rtc_module *const module) * \retval false RTC periodic interval interrupt dosen't occurs */ static inline bool rtc_count_is_periodic_interval(struct rtc_module *const module, - enum rtc_count_periodic_interval n) + enum rtc_count_periodic_interval n) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Return status of flag */ - return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_PER(1 << n)); + /* Return status of flag */ + return (rtc_module->MODE0.INTFLAG.reg & RTC_MODE0_INTFLAG_PER(1 << n)); } /** @@ -899,25 +899,25 @@ static inline bool rtc_count_is_periodic_interval(struct rtc_module *const modul * \param[in] n RTC periodic interval interrupt */ static inline void rtc_count_clear_periodic_interval(struct rtc_module *const module, - enum rtc_count_periodic_interval n) + enum rtc_count_periodic_interval n) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Clear periodic interval flag */ - rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_PER(1 << n); + /* Clear periodic interval flag */ + rtc_module->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_PER(1 << n); } #endif bool rtc_count_is_compare_match( - struct rtc_module *const module, - const enum rtc_count_compare comp_index); + struct rtc_module *const module, + const enum rtc_count_compare comp_index); enum status_code rtc_count_clear_compare_match( - struct rtc_module *const module, - const enum rtc_count_compare comp_index); + struct rtc_module *const module, + const enum rtc_count_compare comp_index); /** @} */ @@ -939,38 +939,38 @@ enum status_code rtc_count_clear_compare_match( * \param[in] events Struct containing flags of events to enable */ static inline void rtc_count_enable_events( - struct rtc_module *const module, - struct rtc_count_events *const events) + struct rtc_module *const module, + struct rtc_count_events *const events) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - uint32_t event_mask = 0; + uint32_t event_mask = 0; - /* Check if the user has requested an overflow event. */ - if (events->generate_event_on_overflow) { - event_mask |= RTC_MODE0_EVCTRL_OVFEO; - } + /* Check if the user has requested an overflow event. */ + if (events->generate_event_on_overflow) { + event_mask |= RTC_MODE0_EVCTRL_OVFEO; + } - /* Check if the user has requested any compare events. */ - for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { - if (events->generate_event_on_compare[i]) { - event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i); - } - } + /* Check if the user has requested any compare events. */ + for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { + if (events->generate_event_on_compare[i]) { + event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i); + } + } - /* Check if the user has requested any periodic events. */ - for (uint8_t i = 0; i < 8; i++) { - if (events->generate_event_on_periodic[i]) { - event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i); - } - } + /* Check if the user has requested any periodic events. */ + for (uint8_t i = 0; i < 8; i++) { + if (events->generate_event_on_periodic[i]) { + event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i); + } + } - /* Enable given event(s). */ - rtc_module->MODE0.EVCTRL.reg |= event_mask; + /* Enable given event(s). */ + rtc_module->MODE0.EVCTRL.reg |= event_mask; } /** @@ -985,38 +985,38 @@ static inline void rtc_count_enable_events( * \param[in] events Struct containing flags of events to disable */ static inline void rtc_count_disable_events( - struct rtc_module *const module, - struct rtc_count_events *const events) + struct rtc_module *const module, + struct rtc_count_events *const events) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - uint32_t event_mask = 0; + uint32_t event_mask = 0; - /* Check if the user has requested an overflow event. */ - if (events->generate_event_on_overflow) { - event_mask |= RTC_MODE0_EVCTRL_OVFEO; - } + /* Check if the user has requested an overflow event. */ + if (events->generate_event_on_overflow) { + event_mask |= RTC_MODE0_EVCTRL_OVFEO; + } - /* Check if the user has requested any compare events. */ - for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { - if (events->generate_event_on_compare[i]) { - event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i); - } - } + /* Check if the user has requested any compare events. */ + for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { + if (events->generate_event_on_compare[i]) { + event_mask |= RTC_MODE0_EVCTRL_CMPEO(1 << i); + } + } - /* Check if the user has requested any periodic events. */ - for (uint8_t i = 0; i < 8; i++) { - if (events->generate_event_on_periodic[i]) { - event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i); - } - } + /* Check if the user has requested any periodic events. */ + for (uint8_t i = 0; i < 8; i++) { + if (events->generate_event_on_periodic[i]) { + event_mask |= RTC_MODE0_EVCTRL_PEREO(1 << i); + } + } - /* Disable given event(s). */ - rtc_module->MODE0.EVCTRL.reg &= ~event_mask; + /* Disable given event(s). */ + rtc_module->MODE0.EVCTRL.reg &= ~event_mask; } /** @} */ @@ -1036,18 +1036,18 @@ static inline void rtc_count_disable_events( * */ static inline void rtc_write_general_purpose_reg( - struct rtc_module *const module, - const uint8_t index, - uint32_t value) + struct rtc_module *const module, + const uint8_t index, + uint32_t value) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); - Assert(index <= 3); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); + Assert(index <= 3); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - rtc_module->MODE0.GP[index].reg = value; + rtc_module->MODE0.GP[index].reg = value; } /** @@ -1059,17 +1059,17 @@ static inline void rtc_write_general_purpose_reg( * \retval Value of general purpose register */ static inline uint32_t rtc_read_general_purpose_reg( - struct rtc_module *const module, - const uint8_t index) + struct rtc_module *const module, + const uint8_t index) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); - Assert(index <= 3); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); + Assert(index <= 3); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - return rtc_module->MODE0.GP[index].reg; + return rtc_module->MODE0.GP[index].reg; } /** @} */ diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_sam_d_r/rtc_count.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_sam_d_r/rtc_count.c index 81aff76f22..c3b1f8a8b4 100644 --- a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_sam_d_r/rtc_count.c +++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/drivers/rtc/rtc_sam_d_r/rtc_count.c @@ -40,9 +40,9 @@ * \asf_license_stop * */ - /** - * Support and FAQ: visit Atmel Support - */ +/** +* Support and FAQ: visit Atmel Support +*/ #include "rtc_count.h" #include @@ -68,17 +68,17 @@ struct rtc_module *_rtc_instance[RTC_INST_NUM]; */ static bool rtc_count_is_syncing(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - if (rtc_module->MODE0.STATUS.reg & RTC_STATUS_SYNCBUSY) { - return true; - } + if (rtc_module->MODE0.STATUS.reg & RTC_STATUS_SYNCBUSY) { + return true; + } - return false; + return false; } /** @@ -91,22 +91,22 @@ static bool rtc_count_is_syncing(struct rtc_module *const module) */ void rtc_count_enable(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; #if RTC_COUNT_ASYNC == true - system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_RTC); + system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_RTC); #endif - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Enable RTC module. */ - rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_ENABLE; + /* Enable RTC module. */ + rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_ENABLE; } /** @@ -118,22 +118,22 @@ void rtc_count_enable(struct rtc_module *const module) */ void rtc_count_disable(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; #if RTC_COUNT_ASYNC == true - system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_RTC); + system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_RTC); #endif - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Disable RTC module. */ - rtc_module->MODE0.CTRL.reg &= ~RTC_MODE0_CTRL_ENABLE; + /* Disable RTC module. */ + rtc_module->MODE0.CTRL.reg &= ~RTC_MODE0_CTRL_ENABLE; } /** @@ -144,26 +144,26 @@ void rtc_count_disable(struct rtc_module *const module) */ void rtc_count_reset(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Disable module before reset. */ - rtc_count_disable(module); + /* Disable module before reset. */ + rtc_count_disable(module); #if RTC_COUNT_ASYNC == true - module->registered_callback = 0; - module->enabled_callback = 0; + module->registered_callback = 0; + module->enabled_callback = 0; #endif - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Initiate software reset. */ - rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_SWRST; + /* Initiate software reset. */ + rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_SWRST; } /** @@ -180,72 +180,72 @@ void rtc_count_reset(struct rtc_module *const module) * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given. */ static enum status_code _rtc_count_set_config( - struct rtc_module *const module, - const struct rtc_count_config *const config) + struct rtc_module *const module, + const struct rtc_count_config *const config) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - rtc_module->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | config->prescaler; + rtc_module->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | config->prescaler; - /* Set mode and clear on match if applicable. */ - switch (config->mode) { - case RTC_COUNT_MODE_32BIT: - /* Set 32bit mode and clear on match if applicable. */ - rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MODE(0); + /* Set mode and clear on match if applicable. */ + switch (config->mode) { + case RTC_COUNT_MODE_32BIT: + /* Set 32bit mode and clear on match if applicable. */ + rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MODE(0); - /* Check if clear on compare match should be set. */ - if (config->clear_on_match) { - /* Set clear on match. */ - rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MATCHCLR; - } - /* Set compare values. */ - for (uint8_t i = 0; i < RTC_NUM_OF_COMP32; i++) { - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + /* Check if clear on compare match should be set. */ + if (config->clear_on_match) { + /* Set clear on match. */ + rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MATCHCLR; + } + /* Set compare values. */ + for (uint8_t i = 0; i < RTC_NUM_OF_COMP32; i++) { + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - rtc_count_set_compare(module, config->compare_values[i], - (enum rtc_count_compare)i); - } - break; + rtc_count_set_compare(module, config->compare_values[i], + (enum rtc_count_compare)i); + } + break; - case RTC_COUNT_MODE_16BIT: - /* Set 16bit mode. */ - rtc_module->MODE1.CTRL.reg |= RTC_MODE1_CTRL_MODE(1); + case RTC_COUNT_MODE_16BIT: + /* Set 16bit mode. */ + rtc_module->MODE1.CTRL.reg |= RTC_MODE1_CTRL_MODE(1); - /* Check if match on clear is set, and return invalid - * argument if set. */ - if (config->clear_on_match) { - Assert(false); - return STATUS_ERR_INVALID_ARG; - } - /* Set compare values. */ - for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + /* Check if match on clear is set, and return invalid + * argument if set. */ + if (config->clear_on_match) { + Assert(false); + return STATUS_ERR_INVALID_ARG; + } + /* Set compare values. */ + for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) { + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - rtc_count_set_compare(module, config->compare_values[i], - (enum rtc_count_compare)i); - } - break; - default: - Assert(false); - return STATUS_ERR_INVALID_ARG; - } + rtc_count_set_compare(module, config->compare_values[i], + (enum rtc_count_compare)i); + } + break; + default: + Assert(false); + return STATUS_ERR_INVALID_ARG; + } - /* Check to set continuously clock read update mode. */ - if (config->continuously_update) { - /* Set continuously mode. */ - rtc_module->MODE0.READREQ.reg |= RTC_READREQ_RCONT; - } + /* Check to set continuously clock read update mode. */ + if (config->continuously_update) { + /* Set continuously mode. */ + rtc_module->MODE0.READREQ.reg |= RTC_READREQ_RCONT; + } - /* Return status OK if everything was configured. */ - return STATUS_OK; + /* Return status OK if everything was configured. */ + return STATUS_OK; } /** @@ -263,44 +263,44 @@ static enum status_code _rtc_count_set_config( * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given. */ enum status_code rtc_count_init( - struct rtc_module *const module, - Rtc *const hw, - const struct rtc_count_config *const config) + struct rtc_module *const module, + Rtc *const hw, + const struct rtc_count_config *const config) { - /* Sanity check arguments */ - Assert(module); - Assert(hw); - Assert(config); + /* Sanity check arguments */ + Assert(module); + Assert(hw); + Assert(config); - /* Initialize device instance */ - module->hw = hw; + /* Initialize device instance */ + module->hw = hw; - /* Turn on the digital interface clock */ - system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_RTC); + /* Turn on the digital interface clock */ + system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_RTC); - /* Set up GCLK */ - struct system_gclk_chan_config gclk_chan_conf; - system_gclk_chan_get_config_defaults(&gclk_chan_conf); - gclk_chan_conf.source_generator = GCLK_GENERATOR_2; - system_gclk_chan_set_config(RTC_GCLK_ID, &gclk_chan_conf); - system_gclk_chan_enable(RTC_GCLK_ID); + /* Set up GCLK */ + struct system_gclk_chan_config gclk_chan_conf; + system_gclk_chan_get_config_defaults(&gclk_chan_conf); + gclk_chan_conf.source_generator = GCLK_GENERATOR_2; + system_gclk_chan_set_config(RTC_GCLK_ID, &gclk_chan_conf); + system_gclk_chan_enable(RTC_GCLK_ID); - /* Reset module to hardware defaults. */ - rtc_count_reset(module); + /* Reset module to hardware defaults. */ + rtc_count_reset(module); - /* Save conf_struct internally for continued use. */ - module->mode = config->mode; - module->continuously_update = config->continuously_update; + /* Save conf_struct internally for continued use. */ + module->mode = config->mode; + module->continuously_update = config->continuously_update; # if (RTC_INST_NUM == 1) - _rtc_instance[0] = module; + _rtc_instance[0] = module; # else - /* Register this instance for callbacks*/ - _rtc_instance[_rtc_get_inst_index(hw)] = module; + /* Register this instance for callbacks*/ + _rtc_instance[_rtc_get_inst_index(hw)] = module; # endif - /* Set config and return status. */ - return _rtc_count_set_config(module, config); + /* Set config and return status. */ + return _rtc_count_set_config(module, config); } /** @@ -316,43 +316,43 @@ enum status_code rtc_count_init( * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided. */ enum status_code rtc_count_set_count( - struct rtc_module *const module, - const uint32_t count_value) + struct rtc_module *const module, + const uint32_t count_value) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Set count according to mode */ - switch(module->mode){ - case RTC_COUNT_MODE_32BIT: - /* Write value to register. */ - rtc_module->MODE0.COUNT.reg = count_value; + /* Set count according to mode */ + switch(module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Write value to register. */ + rtc_module->MODE0.COUNT.reg = count_value; - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Check if 16-bit value is provided. */ - if(count_value > 0xffff){ - return STATUS_ERR_INVALID_ARG; - } + case RTC_COUNT_MODE_16BIT: + /* Check if 16-bit value is provided. */ + if(count_value > 0xffff) { + return STATUS_ERR_INVALID_ARG; + } - /* Write value to register. */ - rtc_module->MODE1.COUNT.reg = (uint32_t)count_value; + /* Write value to register. */ + rtc_module->MODE1.COUNT.reg = (uint32_t)count_value; - break; + break; - default: - Assert(false); - return STATUS_ERR_INVALID_ARG; - } - return STATUS_OK; + default: + Assert(false); + return STATUS_ERR_INVALID_ARG; + } + return STATUS_OK; } /** @@ -366,48 +366,48 @@ enum status_code rtc_count_set_count( */ uint32_t rtc_count_get_count(struct rtc_module *const module) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Initialize return value. */ - uint32_t ret_val; + /* Initialize return value. */ + uint32_t ret_val; - /* Change of read method based on value of continuously_update value in - * the configuration structure. */ - if(!(module->continuously_update)) { - /* Request read on count register. */ - rtc_module->MODE0.READREQ.reg = RTC_READREQ_RREQ; + /* Change of read method based on value of continuously_update value in + * the configuration structure. */ + if(!(module->continuously_update)) { + /* Request read on count register. */ + rtc_module->MODE0.READREQ.reg = RTC_READREQ_RREQ; - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } + } - /* Read value based on mode. */ - switch (module->mode) { - case RTC_COUNT_MODE_32BIT: - /* Return count value in 32-bit mode. */ - ret_val = rtc_module->MODE0.COUNT.reg; + /* Read value based on mode. */ + switch (module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Return count value in 32-bit mode. */ + ret_val = rtc_module->MODE0.COUNT.reg; - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Return count value in 16-bit mode. */ - ret_val = (uint32_t)rtc_module->MODE1.COUNT.reg; + case RTC_COUNT_MODE_16BIT: + /* Return count value in 16-bit mode. */ + ret_val = (uint32_t)rtc_module->MODE1.COUNT.reg; - break; + break; - default: - Assert(false); - /* Counter not initialized. Assume counter value 0.*/ - ret_val = 0; - break; - } + default: + Assert(false); + /* Counter not initialized. Assume counter value 0.*/ + ret_val = 0; + break; + } - return ret_val; + return ret_val; } /** @@ -427,57 +427,57 @@ uint32_t rtc_count_get_count(struct rtc_module *const module) * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode. */ enum status_code rtc_count_set_compare( - struct rtc_module *const module, - const uint32_t comp_value, - const enum rtc_count_compare comp_index) + struct rtc_module *const module, + const uint32_t comp_value, + const enum rtc_count_compare comp_index) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Set compare values based on operation mode. */ - switch (module->mode) { - case RTC_COUNT_MODE_32BIT: - /* Check sanity of comp_index. */ - if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) { - return STATUS_ERR_INVALID_ARG; - } + /* Set compare values based on operation mode. */ + switch (module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Check sanity of comp_index. */ + if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) { + return STATUS_ERR_INVALID_ARG; + } - /* Set compare value for COMP. */ - rtc_module->MODE0.COMP[comp_index].reg = comp_value; + /* Set compare value for COMP. */ + rtc_module->MODE0.COMP[comp_index].reg = comp_value; - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Check sanity of comp_index. */ - if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) { - return STATUS_ERR_INVALID_ARG; - } + case RTC_COUNT_MODE_16BIT: + /* Check sanity of comp_index. */ + if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) { + return STATUS_ERR_INVALID_ARG; + } - /* Check that 16-bit value is provided. */ - if (comp_value > 0xffff) { - Assert(false); - return STATUS_ERR_INVALID_ARG; - } + /* Check that 16-bit value is provided. */ + if (comp_value > 0xffff) { + Assert(false); + return STATUS_ERR_INVALID_ARG; + } - /* Set compare value for COMP. */ - rtc_module->MODE1.COMP[comp_index].reg = comp_value & 0xffff; + /* Set compare value for COMP. */ + rtc_module->MODE1.COMP[comp_index].reg = comp_value & 0xffff; - break; + break; - default: - Assert(false); - return STATUS_ERR_BAD_FORMAT; - } + default: + Assert(false); + return STATUS_ERR_BAD_FORMAT; + } - /* Return status if everything is OK. */ - return STATUS_OK; + /* Return status if everything is OK. */ + return STATUS_OK; } /** @@ -498,45 +498,45 @@ enum status_code rtc_count_set_compare( * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode. */ enum status_code rtc_count_get_compare( - struct rtc_module *const module, - uint32_t *const comp_value, - const enum rtc_count_compare comp_index) + struct rtc_module *const module, + uint32_t *const comp_value, + const enum rtc_count_compare comp_index) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - switch (module->mode) { - case RTC_COUNT_MODE_32BIT: - /* Check sanity of comp_index. */ - if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) { - return STATUS_ERR_INVALID_ARG; - } + switch (module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Check sanity of comp_index. */ + if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) { + return STATUS_ERR_INVALID_ARG; + } - /* Get compare value for COMP. */ - *comp_value = rtc_module->MODE0.COMP[comp_index].reg; + /* Get compare value for COMP. */ + *comp_value = rtc_module->MODE0.COMP[comp_index].reg; - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Check sanity of comp_index. */ - if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) { - return STATUS_ERR_INVALID_ARG; - } + case RTC_COUNT_MODE_16BIT: + /* Check sanity of comp_index. */ + if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) { + return STATUS_ERR_INVALID_ARG; + } - /* Get compare value for COMP. */ - *comp_value = (uint32_t)rtc_module->MODE1.COMP[comp_index].reg; + /* Get compare value for COMP. */ + *comp_value = (uint32_t)rtc_module->MODE1.COMP[comp_index].reg; - break; + break; - default: - Assert(false); - return STATUS_ERR_BAD_FORMAT; - } - /* Return status showing everything is OK. */ - return STATUS_OK; + default: + Assert(false); + return STATUS_ERR_BAD_FORMAT; + } + /* Return status showing everything is OK. */ + return STATUS_OK; } /** @@ -554,24 +554,24 @@ enum status_code rtc_count_get_compare( * \retval STATUS_ERR_UNSUPPORTED_DEV If incorrect mode was set. */ enum status_code rtc_count_get_period( - struct rtc_module *const module, - uint16_t *const period_value) + struct rtc_module *const module, + uint16_t *const period_value) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Check that correct mode is set. */ - if (module->mode != RTC_COUNT_MODE_16BIT) { - return STATUS_ERR_UNSUPPORTED_DEV; - } + /* Check that correct mode is set. */ + if (module->mode != RTC_COUNT_MODE_16BIT) { + return STATUS_ERR_UNSUPPORTED_DEV; + } - /* Returns the value. */ - *period_value = rtc_module->MODE1.PER.reg; + /* Returns the value. */ + *period_value = rtc_module->MODE1.PER.reg; - return STATUS_OK; + return STATUS_OK; } /** @@ -589,28 +589,28 @@ enum status_code rtc_count_get_period( * \retval STATUS_ERR_UNSUPPORTED_DEV If module is not operated in 16-bit mode. */ enum status_code rtc_count_set_period( - struct rtc_module *const module, - const uint16_t period_value) + struct rtc_module *const module, + const uint16_t period_value) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Check that correct mode is set. */ - if (module->mode != RTC_COUNT_MODE_16BIT) { - return STATUS_ERR_UNSUPPORTED_DEV; - } + /* Check that correct mode is set. */ + if (module->mode != RTC_COUNT_MODE_16BIT) { + return STATUS_ERR_UNSUPPORTED_DEV; + } - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Write value to register. */ - rtc_module->MODE1.PER.reg = period_value; + /* Write value to register. */ + rtc_module->MODE1.PER.reg = period_value; - return STATUS_OK; + return STATUS_OK; } /** @@ -625,40 +625,40 @@ enum status_code rtc_count_set_period( * \param[in] comp_index Index of compare to check current flag. */ bool rtc_count_is_compare_match( - struct rtc_module *const module, - const enum rtc_count_compare comp_index) + struct rtc_module *const module, + const enum rtc_count_compare comp_index) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Check sanity. */ - switch (module->mode) { - case RTC_COUNT_MODE_32BIT: - /* Check sanity for 32-bit mode. */ - if (comp_index > RTC_NUM_OF_COMP32) { - return false; - } + /* Check sanity. */ + switch (module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Check sanity for 32-bit mode. */ + if (comp_index > RTC_NUM_OF_COMP32) { + return false; + } - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Check sanity for 16-bit mode. */ - if (comp_index > RTC_NUM_OF_COMP16) { - return false; - } + case RTC_COUNT_MODE_16BIT: + /* Check sanity for 16-bit mode. */ + if (comp_index > RTC_NUM_OF_COMP16) { + return false; + } - break; + break; - default: - Assert(false); - return false; - } + default: + Assert(false); + return false; + } - /* Set status of INTFLAG as return argument. */ - return (rtc_module->MODE0.INTFLAG.reg & (1 << comp_index)); + /* Set status of INTFLAG as return argument. */ + return (rtc_module->MODE0.INTFLAG.reg & (1 << comp_index)); } /** @@ -678,42 +678,42 @@ bool rtc_count_is_compare_match( * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode. */ enum status_code rtc_count_clear_compare_match( - struct rtc_module *const module, - const enum rtc_count_compare comp_index) + struct rtc_module *const module, + const enum rtc_count_compare comp_index) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Check sanity. */ - switch (module->mode){ - case RTC_COUNT_MODE_32BIT: - /* Check sanity for 32-bit mode. */ - if (comp_index > RTC_NUM_OF_COMP32) { - return STATUS_ERR_INVALID_ARG; - } + /* Check sanity. */ + switch (module->mode) { + case RTC_COUNT_MODE_32BIT: + /* Check sanity for 32-bit mode. */ + if (comp_index > RTC_NUM_OF_COMP32) { + return STATUS_ERR_INVALID_ARG; + } - break; + break; - case RTC_COUNT_MODE_16BIT: - /* Check sanity for 16-bit mode. */ - if (comp_index > RTC_NUM_OF_COMP16) { - return STATUS_ERR_INVALID_ARG; - } + case RTC_COUNT_MODE_16BIT: + /* Check sanity for 16-bit mode. */ + if (comp_index > RTC_NUM_OF_COMP16) { + return STATUS_ERR_INVALID_ARG; + } - break; + break; - default: - Assert(false); - return STATUS_ERR_BAD_FORMAT; - } + default: + Assert(false); + return STATUS_ERR_BAD_FORMAT; + } - /* Clear INTFLAG. */ - rtc_module->MODE0.INTFLAG.reg = RTC_MODE1_INTFLAG_CMP(1 << comp_index); + /* Clear INTFLAG. */ + rtc_module->MODE0.INTFLAG.reg = RTC_MODE1_INTFLAG_CMP(1 << comp_index); - return STATUS_OK; + return STATUS_OK; } /** @@ -736,38 +736,38 @@ enum status_code rtc_count_clear_compare_match( * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided. */ enum status_code rtc_count_frequency_correction( - struct rtc_module *const module, - const int8_t value) + struct rtc_module *const module, + const int8_t value) { - /* Sanity check arguments */ - Assert(module); - Assert(module->hw); + /* Sanity check arguments */ + Assert(module); + Assert(module->hw); - Rtc *const rtc_module = module->hw; + Rtc *const rtc_module = module->hw; - /* Check if valid argument. */ - if (abs(value) > 0x7F) { - /* Value bigger than allowed, return invalid argument. */ - return STATUS_ERR_INVALID_ARG; - } + /* Check if valid argument. */ + if (abs(value) > 0x7F) { + /* Value bigger than allowed, return invalid argument. */ + return STATUS_ERR_INVALID_ARG; + } - uint32_t new_correction_value; + uint32_t new_correction_value; - /* Load the new correction value as a positive value, sign added later */ - new_correction_value = abs(value); + /* Load the new correction value as a positive value, sign added later */ + new_correction_value = abs(value); - /* Convert to positive value and adjust register sign bit. */ - if (value < 0) { - new_correction_value |= RTC_FREQCORR_SIGN; - } + /* Convert to positive value and adjust register sign bit. */ + if (value < 0) { + new_correction_value |= RTC_FREQCORR_SIGN; + } - while (rtc_count_is_syncing(module)) { - /* Wait for synchronization */ - } + while (rtc_count_is_syncing(module)) { + /* Wait for synchronization */ + } - /* Set value. */ - rtc_module->MODE0.FREQCORR.reg = new_correction_value; + /* Set value. */ + rtc_module->MODE0.FREQCORR.reg = new_correction_value; - return STATUS_OK; + return STATUS_OK; } diff --git a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/sleep_api.c b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/sleep_api.c index 7018892920..beea12086f 100644 --- a/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/sleep_api.c +++ b/libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM21/sleep_api.c @@ -30,8 +30,8 @@ */ void sleep(void) { - system_set_sleepmode(SYSTEM_SLEEPMODE_IDLE_2); - system_sleep(); + system_set_sleepmode(SYSTEM_SLEEPMODE_IDLE_2); + system_sleep(); } /** Send the device to deep sleep @@ -44,6 +44,6 @@ void sleep(void) */ void deepsleep(void) { - system_set_sleepmode(SYSTEM_SLEEPMODE_STANDBY); - system_sleep(); + system_set_sleepmode(SYSTEM_SLEEPMODE_STANDBY); + system_sleep(); } \ No newline at end of file