diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/startup_stm32f411xe.s b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/startup_stm32f411xe.s new file mode 100644 index 0000000000..1b782c36dc --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/startup_stm32f411xe.s @@ -0,0 +1,523 @@ +;/******************** (C) COPYRIGHT 2014 STMicroelectronics ******************** +;* File Name : startup_stm32f411xe.s +;* Author : MCD Application Team +;* Version : V2.1.0 +;* Date : 19-June-2014 +;* Description : STM32F411xExx devices vector table for EWARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == _iar_program_start, +;* - Set the vector table entries with the exceptions ISR +;* address. +;* - Configure the system clock +;* - Branches to main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M4 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;******************************************************************************** +;* +;* Redistribution and use in source and binary forms, with or without modification, +;* are permitted provided that the following conditions are met: +;* 1. Redistributions of source code must retain the above copyright notice, +;* this list of conditions and the following disclaimer. +;* 2. Redistributions in binary form must reproduce the above copyright notice, +;* this list of conditions and the following disclaimer in the documentation +;* and/or other materials provided with the distribution. +;* 3. Neither the name of STMicroelectronics nor the names of its contributors +;* may be used to endorse or promote products derived from this software +;* without specific prior written permission. +;* +;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +;* +;******************************************************************************* +; +; +; The modules in this file are included in the libraries, and may be replaced +; by any user-defined modules that define the PUBLIC symbol _program_start or +; a user defined start symbol. +; To override the cstartup defined in the library, simply add your modified +; version to the workbench project. +; +; The vector table is normally located at address 0. +; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. +; The name "__vector_table" has special meaning for C-SPY: +; it is where the SP start value is found, and the NVIC vector +; table register (VTOR) is initialized to this address if != 0. +; +; Cortex-M version +; + + MODULE ?cstartup + + ;; Forward declaration of sections. + SECTION CSTACK:DATA:NOROOT(3) + + SECTION .intvec:CODE:NOROOT(2) + + EXTERN __iar_program_start + EXTERN SystemInit + PUBLIC __vector_table + + DATA +__vector_table + DCD sfe(CSTACK) + DCD Reset_Handler ; Reset Handler + + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog + DCD PVD_IRQHandler ; PVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9 + DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10 + DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11 + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD 0 ; Reserved + DCD EXTI15_10_IRQHandler ; External Line[15:10]s + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD 0 ; Reserved + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD FPU_IRQHandler ; FPU + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SPI4_IRQHandler ; SPI4 + DCD SPI5_IRQHandler ; SPI5 + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; +;; Default interrupt handlers. +;; + THUMB + PUBWEAK Reset_Handler + SECTION .text:CODE:REORDER:NOROOT(2) +Reset_Handler + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__iar_program_start + BX R0 + + PUBWEAK NMI_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +NMI_Handler + B NMI_Handler + + PUBWEAK HardFault_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +HardFault_Handler + B HardFault_Handler + + PUBWEAK MemManage_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +MemManage_Handler + B MemManage_Handler + + PUBWEAK BusFault_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +BusFault_Handler + B BusFault_Handler + + PUBWEAK UsageFault_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +UsageFault_Handler + B UsageFault_Handler + + PUBWEAK SVC_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +SVC_Handler + B SVC_Handler + + PUBWEAK DebugMon_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +DebugMon_Handler + B DebugMon_Handler + + PUBWEAK PendSV_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +PendSV_Handler + B PendSV_Handler + + PUBWEAK SysTick_Handler + SECTION .text:CODE:REORDER:NOROOT(1) +SysTick_Handler + B SysTick_Handler + + PUBWEAK WWDG_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +WWDG_IRQHandler + B WWDG_IRQHandler + + PUBWEAK PVD_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +PVD_IRQHandler + B PVD_IRQHandler + + PUBWEAK TAMP_STAMP_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TAMP_STAMP_IRQHandler + B TAMP_STAMP_IRQHandler + + PUBWEAK RTC_WKUP_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +RTC_WKUP_IRQHandler + B RTC_WKUP_IRQHandler + + PUBWEAK FLASH_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +FLASH_IRQHandler + B FLASH_IRQHandler + + PUBWEAK RCC_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +RCC_IRQHandler + B RCC_IRQHandler + + PUBWEAK EXTI0_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI0_IRQHandler + B EXTI0_IRQHandler + + PUBWEAK EXTI1_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI1_IRQHandler + B EXTI1_IRQHandler + + PUBWEAK EXTI2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI2_IRQHandler + B EXTI2_IRQHandler + + PUBWEAK EXTI3_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI3_IRQHandler + B EXTI3_IRQHandler + + PUBWEAK EXTI4_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI4_IRQHandler + B EXTI4_IRQHandler + + PUBWEAK DMA1_Stream0_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream0_IRQHandler + B DMA1_Stream0_IRQHandler + + PUBWEAK DMA1_Stream1_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream1_IRQHandler + B DMA1_Stream1_IRQHandler + + PUBWEAK DMA1_Stream2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream2_IRQHandler + B DMA1_Stream2_IRQHandler + + PUBWEAK DMA1_Stream3_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream3_IRQHandler + B DMA1_Stream3_IRQHandler + + PUBWEAK DMA1_Stream4_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream4_IRQHandler + B DMA1_Stream4_IRQHandler + + PUBWEAK DMA1_Stream5_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream5_IRQHandler + B DMA1_Stream5_IRQHandler + + PUBWEAK DMA1_Stream6_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream6_IRQHandler + B DMA1_Stream6_IRQHandler + + PUBWEAK ADC_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +ADC_IRQHandler + B ADC_IRQHandler + + PUBWEAK EXTI9_5_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI9_5_IRQHandler + B EXTI9_5_IRQHandler + + PUBWEAK TIM1_BRK_TIM9_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM1_BRK_TIM9_IRQHandler + B TIM1_BRK_TIM9_IRQHandler + + PUBWEAK TIM1_UP_TIM10_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM1_UP_TIM10_IRQHandler + B TIM1_UP_TIM10_IRQHandler + + PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM1_TRG_COM_TIM11_IRQHandler + B TIM1_TRG_COM_TIM11_IRQHandler + + PUBWEAK TIM1_CC_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM1_CC_IRQHandler + B TIM1_CC_IRQHandler + + PUBWEAK TIM2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM2_IRQHandler + B TIM2_IRQHandler + + PUBWEAK TIM3_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM3_IRQHandler + B TIM3_IRQHandler + + PUBWEAK TIM4_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM4_IRQHandler + B TIM4_IRQHandler + + PUBWEAK I2C1_EV_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C1_EV_IRQHandler + B I2C1_EV_IRQHandler + + PUBWEAK I2C1_ER_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C1_ER_IRQHandler + B I2C1_ER_IRQHandler + + PUBWEAK I2C2_EV_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C2_EV_IRQHandler + B I2C2_EV_IRQHandler + + PUBWEAK I2C2_ER_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C2_ER_IRQHandler + B I2C2_ER_IRQHandler + + PUBWEAK SPI1_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SPI1_IRQHandler + B SPI1_IRQHandler + + PUBWEAK SPI2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SPI2_IRQHandler + B SPI2_IRQHandler + + PUBWEAK USART1_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +USART1_IRQHandler + B USART1_IRQHandler + + PUBWEAK USART2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +USART2_IRQHandler + B USART2_IRQHandler + + PUBWEAK EXTI15_10_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +EXTI15_10_IRQHandler + B EXTI15_10_IRQHandler + + PUBWEAK RTC_Alarm_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +RTC_Alarm_IRQHandler + B RTC_Alarm_IRQHandler + + PUBWEAK OTG_FS_WKUP_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +OTG_FS_WKUP_IRQHandler + B OTG_FS_WKUP_IRQHandler + + PUBWEAK DMA1_Stream7_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA1_Stream7_IRQHandler + B DMA1_Stream7_IRQHandler + + PUBWEAK SDIO_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SDIO_IRQHandler + B SDIO_IRQHandler + + PUBWEAK TIM5_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +TIM5_IRQHandler + B TIM5_IRQHandler + + PUBWEAK SPI3_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SPI3_IRQHandler + B SPI3_IRQHandler + + PUBWEAK DMA2_Stream0_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream0_IRQHandler + B DMA2_Stream0_IRQHandler + + PUBWEAK DMA2_Stream1_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream1_IRQHandler + B DMA2_Stream1_IRQHandler + + PUBWEAK DMA2_Stream2_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream2_IRQHandler + B DMA2_Stream2_IRQHandler + + PUBWEAK DMA2_Stream3_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream3_IRQHandler + B DMA2_Stream3_IRQHandler + + PUBWEAK DMA2_Stream4_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream4_IRQHandler + B DMA2_Stream4_IRQHandler + + PUBWEAK OTG_FS_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +OTG_FS_IRQHandler + B OTG_FS_IRQHandler + + PUBWEAK DMA2_Stream5_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream5_IRQHandler + B DMA2_Stream5_IRQHandler + + PUBWEAK DMA2_Stream6_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream6_IRQHandler + B DMA2_Stream6_IRQHandler + + PUBWEAK DMA2_Stream7_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +DMA2_Stream7_IRQHandler + B DMA2_Stream7_IRQHandler + + PUBWEAK USART6_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +USART6_IRQHandler + B USART6_IRQHandler + + PUBWEAK I2C3_EV_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C3_EV_IRQHandler + B I2C3_EV_IRQHandler + + PUBWEAK I2C3_ER_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +I2C3_ER_IRQHandler + B I2C3_ER_IRQHandler + + PUBWEAK FPU_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +FPU_IRQHandler + B FPU_IRQHandler + + PUBWEAK SPI4_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SPI4_IRQHandler + B SPI4_IRQHandler + + PUBWEAK SPI5_IRQHandler + SECTION .text:CODE:REORDER:NOROOT(1) +SPI5_IRQHandler + B SPI5_IRQHandler + + END +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/stm32f411xe_flash.icf b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/stm32f411xe_flash.icf new file mode 100644 index 0000000000..963a230a69 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/TOOLCHAIN_IAR/stm32f411xe_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; \ No newline at end of file diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_adc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_adc.c index 6f56bf14d4..a5512e561e 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_adc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_adc.c @@ -206,7 +206,7 @@ static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) { /* Check ADC handle */ - if(hadc == NULL) + if(hadc == HAL_NULL) { return HAL_ERROR; } @@ -259,7 +259,7 @@ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) { /* Check ADC handle */ - if(hadc == NULL) + if(hadc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_crc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_crc.c index de655fabf5..a1401ac383 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_crc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_crc.c @@ -112,7 +112,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == NULL) + if(hcrc == HAL_NULL) { return HAL_ERROR; } @@ -145,7 +145,7 @@ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) { /* Check the CRC handle allocation */ - if(hcrc == NULL) + if(hcrc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_def.h b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_def.h index fbca862ca3..dc3b23d515 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_def.h +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_def.h @@ -71,7 +71,7 @@ typedef enum /* Exported macro ------------------------------------------------------------*/ #ifndef NULL - #define NULL (void *) 0 + #define HAL_NULL (void *) 0 #endif #define HAL_MAX_DELAY 0xFFFFFFFF diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma.c index ee2dd41593..8043d734fd 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_dma.c @@ -172,7 +172,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) uint32_t tmp = 0; /* Check the DMA peripheral state */ - if(hdma == NULL) + if(hdma == HAL_NULL) { return HAL_ERROR; } @@ -262,7 +262,7 @@ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) { /* Check the DMA peripheral state */ - if(hdma == NULL) + if(hdma == HAL_NULL) { return HAL_ERROR; } @@ -648,7 +648,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != NULL) + if(hdma->XferErrorCallback != HAL_NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -675,7 +675,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != NULL) + if(hdma->XferErrorCallback != HAL_NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -702,7 +702,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferErrorCallback != NULL) + if(hdma->XferErrorCallback != HAL_NULL) { /* Transfer error callback */ hdma->XferErrorCallback(hdma); @@ -748,7 +748,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; } - if(hdma->XferHalfCpltCallback != NULL) + if(hdma->XferHalfCpltCallback != HAL_NULL) { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); @@ -768,7 +768,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Current memory buffer used is Memory 1 */ if((hdma->Instance->CR & DMA_SxCR_CT) == 0) { - if(hdma->XferM1CpltCallback != NULL) + if(hdma->XferM1CpltCallback != HAL_NULL) { /* Transfer complete Callback for memory1 */ hdma->XferM1CpltCallback(hdma); @@ -777,7 +777,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Current memory buffer used is Memory 0 */ else if((hdma->Instance->CR & DMA_SxCR_CT) != 0) { - if(hdma->XferCpltCallback != NULL) + if(hdma->XferCpltCallback != HAL_NULL) { /* Transfer complete Callback for memory0 */ hdma->XferCpltCallback(hdma); @@ -804,7 +804,7 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) /* Process Unlocked */ __HAL_UNLOCK(hdma); - if(hdma->XferCpltCallback != NULL) + if(hdma->XferCpltCallback != HAL_NULL) { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_flash.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_flash.c index 2ac682f288..36983348a8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_flash.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_flash.c @@ -708,7 +708,7 @@ static void FLASH_SetErrorCode(void) if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR) != RESET) { - pFlash.ErrorCode |= FLASH_ERROR_PGA; + pFlash.ErrorCode |= (FLASH_ErrorTypeDef)FLASH_ERROR_PGA; } if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGPERR) != RESET) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_hcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_hcd.c index d52a7c8308..eba3d223de 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_hcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_hcd.c @@ -119,7 +119,7 @@ static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd); HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd) { /* Check the HCD handle allocation */ - if(hhcd == NULL) + if(hhcd == HAL_NULL) { return HAL_ERROR; } @@ -233,7 +233,7 @@ HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd) { /* Check the HCD handle allocation */ - if(hhcd == NULL) + if(hhcd == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2c.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2c.c index 8c68e5afe8..1ef36398a5 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2c.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2c.c @@ -280,7 +280,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) uint32_t pclk1 = 0; /* Check the I2C handle allocation */ - if(hi2c == NULL) + if(hi2c == HAL_NULL) { return HAL_ERROR; } @@ -355,7 +355,7 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) { /* Check the I2C handle allocation */ - if(hi2c == NULL) + if(hi2c == HAL_NULL) { return HAL_ERROR; } @@ -484,7 +484,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -582,7 +582,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -773,7 +773,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -878,7 +878,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -970,7 +970,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1041,7 +1041,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1139,7 +1139,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1192,7 +1192,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1246,7 +1246,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1322,7 +1322,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1408,7 +1408,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1493,7 +1493,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD { if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1566,7 +1566,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1666,7 +1666,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1858,7 +1858,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1931,7 +1931,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -2034,7 +2034,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -2112,7 +2112,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr if(hi2c->State == HAL_I2C_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s.c index b5e1b4d042..5adee35094 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s.c @@ -205,7 +205,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) uint32_t tmp = 0, i2sclk = 0; /* Check the I2S handle allocation */ - if(hi2s == NULL) + if(hi2s == HAL_NULL) { return HAL_ERROR; } @@ -383,7 +383,7 @@ HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) { /* Check the I2S handle allocation */ - if(hi2s == NULL) + if(hi2s == HAL_NULL) { return HAL_ERROR; } @@ -492,7 +492,7 @@ HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -574,7 +574,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uin HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -659,7 +659,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -727,7 +727,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, u uint32_t tmp1 = 0, tmp2 = 0; if(hi2s->State == HAL_I2S_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -793,7 +793,7 @@ HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -878,7 +878,7 @@ HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1071,12 +1071,12 @@ HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) } /* Abort the I2S DMA Stream tx */ - if(hi2s->hdmatx != NULL) + if(hi2s->hdmatx != HAL_NULL) { HAL_DMA_Abort(hi2s->hdmatx); } /* Abort the I2S DMA Stream rx */ - if(hi2s->hdmarx != NULL) + if(hi2s->hdmarx != HAL_NULL) { HAL_DMA_Abort(hi2s->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s_ex.c index bc90dd899f..005b3b377d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_i2s_ex.c @@ -186,7 +186,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, uint16_t *p uint32_t tickstart = 0; uint32_t tmp1 = 0, tmp2 = 0; - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -360,7 +360,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, uint16_t if(hi2s->State == HAL_I2S_STATE_READY) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -485,7 +485,7 @@ HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, uint16_ uint32_t *tmp; uint32_t tmp1 = 0, tmp2 = 0; - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_irda.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_irda.c index 36fd02331d..1e028b7336 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_irda.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_irda.c @@ -202,7 +202,7 @@ static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == NULL) + if(hirda == HAL_NULL) { return HAL_ERROR; } @@ -260,7 +260,7 @@ HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda) { /* Check the IRDA handle allocation */ - if(hirda == NULL) + if(hirda == HAL_NULL) { return HAL_ERROR; } @@ -380,7 +380,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -472,7 +472,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -564,7 +564,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -619,7 +619,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -676,7 +676,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pDat tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -743,7 +743,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData tmp1 = hirda->State; if((tmp1 == HAL_IRDA_STATE_READY) || (tmp1 == HAL_IRDA_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -882,12 +882,12 @@ HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda) hirda->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx Stream */ - if(hirda->hdmatx != NULL) + if(hirda->hdmatx != HAL_NULL) { HAL_DMA_Abort(hirda->hdmatx); } /* Abort the UART DMA rx Stream */ - if(hirda->hdmarx != NULL) + if(hirda->hdmarx != HAL_NULL) { HAL_DMA_Abort(hirda->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_iwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_iwdg.c index 8fac48efad..add9f64b4d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_iwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_iwdg.c @@ -164,7 +164,7 @@ HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) { /* Check the IWDG handle allocation */ - if(hiwdg == NULL) + if(hiwdg == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pcd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pcd.c index ca85245e8d..c0c9b3443f 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pcd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_pcd.c @@ -124,7 +124,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) uint32_t i = 0; /* Check the PCD handle allocation */ - if(hpcd == NULL) + if(hpcd == HAL_NULL) { return HAL_ERROR; } @@ -191,7 +191,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) { /* Check the PCD handle allocation */ - if(hpcd == NULL) + if(hpcd == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_rtc.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_rtc.c index 0fb2a03918..dd580785c0 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_rtc.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_rtc.c @@ -203,7 +203,7 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) { /* Check the RTC peripheral state */ - if(hrtc == NULL) + if(hrtc == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_sd.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_sd.c index 574837e00c..d87da33e29 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_sd.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_sd.c @@ -2574,7 +2574,7 @@ static HAL_SD_ErrorTypedef SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardS SDIO_CmdInitTypeDef sdio_cmdinitstructure; HAL_SD_ErrorTypedef errorstate = SD_OK; - if(pCardStatus == NULL) + if(pCardStatus == HAL_NULL) { errorstate = SD_INVALID_PARAMETER; diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_smartcard.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_smartcard.c index 478af659d3..372c19cf86 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_smartcard.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_smartcard.c @@ -222,7 +222,7 @@ static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDe HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == NULL) + if(hsc == HAL_NULL) { return HAL_ERROR; } @@ -285,7 +285,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsc) HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsc) { /* Check the SMARTCARD handle allocation */ - if(hsc == NULL) + if(hsc == HAL_NULL) { return HAL_ERROR; } @@ -404,7 +404,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsc, uint8_t * tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -497,7 +497,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsc, uint8_t *p tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -594,7 +594,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsc, uint8_ tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -652,7 +652,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsc, uint8_t tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -711,7 +711,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsc, uint8 tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_RX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -776,7 +776,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsc, uint8_ tmp1 = hsc->State; if((tmp1 == HAL_SMARTCARD_STATE_READY) || (tmp1 == HAL_SMARTCARD_STATE_BUSY_TX)) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.c index 384549da66..8ab5f2e683 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.c @@ -169,7 +169,7 @@ static HAL_StatusTypeDef SPI_WaitOnFlagUntilTimeout(SPI_HandleTypeDef *hspi, uin HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == NULL) + if(hspi == HAL_NULL) { return HAL_ERROR; } @@ -230,7 +230,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi) { /* Check the SPI handle allocation */ - if(hspi == NULL) + if(hspi == HAL_NULL) { return HAL_ERROR; } @@ -345,7 +345,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -489,7 +489,7 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -665,7 +665,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD tmpstate = hspi->State; if((tmpstate == HAL_SPI_STATE_READY) || (tmpstate == HAL_SPI_STATE_BUSY_RX)) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -912,7 +912,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -987,7 +987,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, ui { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1071,7 +1071,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *p if((tmpstate == HAL_SPI_STATE_READY) || \ ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1140,7 +1140,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1223,7 +1223,7 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u { if(hspi->State == HAL_SPI_STATE_READY) { - if((pData == NULL) || (Size == 0)) + if((pData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1315,7 +1315,7 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * if((tmpstate == HAL_SPI_STATE_READY) || ((hspi->Init.Mode == SPI_MODE_MASTER) && \ (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmpstate == HAL_SPI_STATE_BUSY_RX))) { - if((pTxData == NULL ) || (pRxData == NULL ) || (Size == 0)) + if((pTxData == HAL_NULL ) || (pRxData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1378,9 +1378,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t * /* Enable Rx DMA Request */ hspi->Instance->CR2 |= SPI_CR2_RXDMAEN; - /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing + /* Set the SPI Tx DMA transfer complete callback as HAL_NULL because the communication closing is performed in DMA reception complete callback */ - hspi->hdmatx->XferCpltCallback = NULL; + hspi->hdmatx->XferCpltCallback = HAL_NULL; /* Set the DMA error callback */ hspi->hdmatx->XferErrorCallback = SPI_DMAError; @@ -1466,12 +1466,12 @@ HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi) */ /* Abort the SPI DMA tx Stream */ - if(hspi->hdmatx != NULL) + if(hspi->hdmatx != HAL_NULL) { HAL_DMA_Abort(hspi->hdmatx); } /* Abort the SPI DMA rx Stream */ - if(hspi->hdmarx != NULL) + if(hspi->hdmarx != HAL_NULL) { HAL_DMA_Abort(hspi->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.c index 37685c5c54..31c66b2595 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim.c @@ -200,7 +200,7 @@ static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -477,7 +477,7 @@ HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -984,7 +984,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -1494,7 +1494,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -1970,7 +1970,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) { /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } @@ -2245,7 +2245,7 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_Ini uint32_t tmpccer = 0; /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim_ex.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim_ex.c index 452d89f241..e638b2e201 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim_ex.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_tim_ex.c @@ -155,7 +155,7 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSen TIM_OC_InitTypeDef OC_Config; /* Check the TIM handle allocation */ - if(htim == NULL) + if(htim == HAL_NULL) { return HAL_ERROR; } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_uart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_uart.c index 718a09942f..53adc6983b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_uart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_uart.c @@ -231,7 +231,7 @@ static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -287,7 +287,7 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -339,7 +339,7 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -398,7 +398,7 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethode) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -455,7 +455,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart) { /* Check the UART handle allocation */ - if(huart == NULL) + if(huart == HAL_NULL) { return HAL_ERROR; } @@ -576,7 +576,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -670,7 +670,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -768,7 +768,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData tmp = huart->State; if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -826,7 +826,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, tmp = huart->State; if((tmp == HAL_UART_STATE_READY) || (tmp == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -885,7 +885,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_RX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -953,7 +953,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData tmp1 = huart->State; if((tmp1 == HAL_UART_STATE_READY) || (tmp1 == HAL_UART_STATE_BUSY_TX)) { - if((pData == NULL ) || (Size == 0)) + if((pData == HAL_NULL ) || (Size == 0)) { return HAL_ERROR; } @@ -1094,12 +1094,12 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) huart->Instance->CR3 &= ~USART_CR3_DMAR; /* Abort the UART DMA tx Stream */ - if(huart->hdmatx != NULL) + if(huart->hdmatx != HAL_NULL) { HAL_DMA_Abort(huart->hdmatx); } /* Abort the UART DMA rx Stream */ - if(huart->hdmarx != NULL) + if(huart->hdmarx != HAL_NULL) { HAL_DMA_Abort(huart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_usart.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_usart.c index 314a6b273d..73118b5b17 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_usart.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_usart.c @@ -213,7 +213,7 @@ static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husar HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == NULL) + if(husart == HAL_NULL) { return HAL_ERROR; } @@ -257,7 +257,7 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) { /* Check the USART handle allocation */ - if(husart == NULL) + if(husart == HAL_NULL) { return HAL_ERROR; } @@ -380,7 +380,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -457,7 +457,7 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL) || (Size == 0)) + if((pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -559,7 +559,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -667,7 +667,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pT { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -716,7 +716,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx { if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL) || (Size == 0)) + if((pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -766,7 +766,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint { if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -820,7 +820,7 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -878,7 +878,7 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR if(husart->State == HAL_USART_STATE_READY) { - if((pRxData == NULL) || (Size == 0)) + if((pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -951,7 +951,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin if(husart->State == HAL_USART_STATE_READY) { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) + if((pTxData == HAL_NULL) || (pRxData == HAL_NULL) || (Size == 0)) { return HAL_ERROR; } @@ -1069,12 +1069,12 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) */ /* Abort the USART DMA Tx Stream */ - if(husart->hdmatx != NULL) + if(husart->hdmatx != HAL_NULL) { HAL_DMA_Abort(husart->hdmatx); } /* Abort the USART DMA Rx Stream */ - if(husart->hdmarx != NULL) + if(husart->hdmarx != HAL_NULL) { HAL_DMA_Abort(husart->hdmarx); } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_wwdg.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_wwdg.c index 79d11d009f..8b114f68a8 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_wwdg.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F411RE/stm32f4xx_hal_wwdg.c @@ -151,7 +151,7 @@ HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) { /* Check the WWDG handle allocation */ - if(hwwdg == NULL) + if(hwwdg == HAL_NULL) { return HAL_ERROR; } @@ -192,7 +192,7 @@ HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg) { /* Check the WWDG handle allocation */ - if(hwwdg == NULL) + if(hwwdg == HAL_NULL) { return HAL_ERROR; } diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py index b865facd19..f154edb189 100755 --- a/workspace_tools/build_release.py +++ b/workspace_tools/build_release.py @@ -57,7 +57,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = ( ('NUCLEO_F302R8', ('ARM', 'uARM')), ('NUCLEO_F334R8', ('ARM', 'uARM')), ('NUCLEO_F401RE', ('ARM', 'uARM')), - ('NUCLEO_F411RE', ('ARM', 'uARM')), + ('NUCLEO_F411RE', ('ARM', 'uARM', 'IAR')), ('NUCLEO_L053R8', ('ARM', 'uARM')), ('NUCLEO_L152RE', ('ARM', 'uARM')), diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py index e5c12306d3..f21b744690 100644 --- a/workspace_tools/export/iar.py +++ b/workspace_tools/export/iar.py @@ -25,6 +25,7 @@ class IAREmbeddedWorkbench(Exporter): 'LPC1768', 'UBLOX_C027', 'ARCH_PRO', + 'NUCLEO_F411RE', ] def generate(self): diff --git a/workspace_tools/export/iar_nucleo_f411re.ewp.tmpl b/workspace_tools/export/iar_nucleo_f411re.ewp.tmpl new file mode 100644 index 0000000000..f937a9744b --- /dev/null +++ b/workspace_tools/export/iar_nucleo_f411re.ewp.tmpl @@ -0,0 +1,1901 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 22 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + {% for files in source_files %} + + $PROJ_DIR$\{{files}} + + {% endfor %} + + + diff --git a/workspace_tools/export_test.py b/workspace_tools/export_test.py index 45237a9f1c..cd71d96d72 100755 --- a/workspace_tools/export_test.py +++ b/workspace_tools/export_test.py @@ -158,6 +158,7 @@ if __name__ == '__main__': ('ds5_5', 'LPC1768'), ('ds5_5', 'LPC11U24'), ('iar', 'LPC1768'), + ('iar', 'NUCLEO_F411RE'), (None, None), ]: diff --git a/workspace_tools/settings.py b/workspace_tools/settings.py index f3cc460593..1195e9c26a 100644 --- a/workspace_tools/settings.py +++ b/workspace_tools/settings.py @@ -63,7 +63,7 @@ GCC_CS_PATH = "C:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_A GCC_CR_PATH = "C:/code_red/RedSuite_4.2.0_349/redsuite/Tools/bin" # IAR -IAR_PATH = "C:/Program Files (x86)/IAR Systems/Embedded Workbench 6.0/arm" +IAR_PATH = "C:/Program Files (x86)/IAR Systems/Embedded Workbench 7.0/arm" # GCC Code Warrior CW_GCC_PATH = "C:/Freescale/CW MCU v10.3/Cross_Tools/arm-none-eabi-gcc-4_6_2/bin" diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index 6a0d526c1e..c30a451603 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -371,7 +371,7 @@ class NUCLEO_F411RE(Target): Target.__init__(self) self.core = "Cortex-M4F" self.extra_labels = ['STM', 'STM32F4', 'STM32F411RE'] - self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"] self.default_toolchain = "uARM" self.supported_form_factors = ["ARDUINO", "MORPHO"] self.detect_code = "0740"