Refine SPI code

1. Remove dead code
2. Remove space in empty lines
3. Fix compile warnings
4. Fix some comments

targets/TARGET_NUVOTON/TARGET_M451/spi_api.c

@@ -129,7 +129,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     // Reset this module
     SYS_ResetModule(modinit->rsetidx);
@@ -139,8 +139,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     // Enable IP clock
     CLK_EnableModuleClock(modinit->clkidx);
 
-    //SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
-        
     pinmap_pinout(mosi, PinMap_SPI_MOSI);
     pinmap_pinout(miso, PinMap_SPI_MISO);
     pinmap_pinout(sclk, PinMap_SPI_SCLK);
@@ -152,10 +150,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     obj->spi.pin_ssel = ssel;
 
 
-    // Configure the SPI data format and frequency
-    //spi_format(obj, 8, 0, SPI_MSB); // 8 bits, mode 0
-    //spi_frequency(obj, 1000000);
-    
 #if DEVICE_SPI_ASYNCH
     obj->spi.dma_usage = DMA_USAGE_NEVER;
     obj->spi.event = 0;
@@ -190,7 +184,7 @@ void spi_free(spi_t *obj)
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     SPI_DisableInt(((SPI_T *) NU_MODBASE(obj->spi.spi)), (SPI_FIFO_RXOV_INT_MASK | SPI_FIFO_RXTH_INT_MASK | SPI_FIFO_TXTH_INT_MASK));
     NVIC_DisableIRQ(modinit->irq_n);
@@ -198,12 +192,11 @@ void spi_free(spi_t *obj)
     // Disable IP clock
     CLK_DisableModuleClock(modinit->clkidx);
 
-    //((struct nu_spi_var *) modinit->var)->obj = NULL;
-    
     // Mark this module to be deinited.
     int i = modinit - spi_modinit_tab;
     spi_modinit_mask &= ~(1 << i);
 }
+
 void spi_format(spi_t *obj, int bits, int mode, int slave)
 {
     MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
@@ -323,7 +316,6 @@ void spi_slave_write(spi_t *obj, int value)
 #if DEVICE_SPI_ASYNCH
 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
 {
-    //MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
     SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
     SPI_SET_DATA_WIDTH(spi_base, bit_width);
 
@@ -357,7 +349,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
         // DMA way
         const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
         MBED_ASSERT(modinit != NULL);
-        MBED_ASSERT(modinit->modname == obj->spi.spi);
+        MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
         PDMA_T *pdma_base = dma_modbase();
 
@@ -469,16 +461,14 @@ void spi_abort_asynch(spi_t *obj)
 
         if (obj->spi.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->spi.dma_chn_id_tx, PDMA_INT_TRANS_DONE);
-            // FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->spi.dma_chn_id_tx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_tx);
         }
         SPI_DISABLE_TX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
 
         if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->spi.dma_chn_id_rx, PDMA_INT_TRANS_DONE);
-            // FIXME: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->spi.dma_chn_id_rx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_rx);
         }
         SPI_DISABLE_RX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
@@ -528,7 +518,6 @@ uint8_t spi_active(spi_t *obj)
 static int spi_writeable(spi_t * obj)
 {
     // Receive FIFO must not be full to avoid receive FIFO overflow on next transmit/receive
-    //return (! SPI_GET_TX_FIFO_FULL_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi)))) && (SPI_GET_RX_FIFO_COUNT(((SPI_T *) NU_MODBASE(obj->spi.spi))) < NU_SPI_FIFO_DEPTH);
     return (! SPI_GET_TX_FIFO_FULL_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi))));
 }
 
@@ -550,7 +539,7 @@ static void spi_enable_vector_interrupt(spi_t *obj, uint32_t handler, uint8_t en
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     if (enable) {
         NVIC_SetVector(modinit->irq_n, handler);
@@ -574,7 +563,7 @@ static void spi_master_enable_interrupt(spi_t *obj, uint8_t enable)
         else {
             SPI_SetFIFO(spi_base, 2, 2);
         }
-        //SPI_SET_SUSPEND_CYCLE(spi_base, 4);
+
         // Enable tx/rx FIFO threshold interrupt
         SPI_EnableInt(spi_base, SPI_FIFO_RXTH_INT_MASK | SPI_FIFO_TXTH_INT_MASK);
     }
@@ -773,9 +762,7 @@ static uint8_t spi_get_data_width(spi_t *obj)
 
 static int spi_is_tx_complete(spi_t *obj)
 {
-    // ???: Exclude tx fifo empty check due to no such interrupt on DMA way
     return (obj->tx_buff.pos == obj->tx_buff.length);
-    //return (obj->tx_buff.pos == obj->tx_buff.length && SPI_GET_TX_FIFO_EMPTY_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi))));
 }
 
 static int spi_is_rx_complete(spi_t *obj)
@@ -787,20 +774,20 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->tx_buff.pos = obj->tx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();
@@ -810,20 +797,20 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->rx_buff.pos = obj->rx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();

targets/TARGET_NUVOTON/TARGET_M480/spi_api.c

@@ -211,6 +211,7 @@ void spi_free(spi_t *obj)
     int i = modinit - spi_modinit_tab;
     spi_modinit_mask &= ~(1 << i);
 }
+
 void spi_format(spi_t *obj, int bits, int mode, int slave)
 {
     MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
@@ -776,14 +777,14 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->tx_buff.pos = obj->tx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 
@@ -799,14 +800,14 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->rx_buff.pos = obj->rx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 

targets/TARGET_NUVOTON/TARGET_NANO100/spi_api.c

@@ -43,8 +43,8 @@ struct nu_spi_var {
 #endif
 };
 
-// NOTE:
-// NANO130: No support for relocating vector table. ISR vector passed into NVIC_SetVector() can only be weak symbol defined in startup_Nano100Series.c.
+/* NOTE: NANO130 doesn't support relocating vector table. ISR vector passed into NVIC_SetVector() can
+ *       only be weak symbol defined in startup_Nano100Series.c. */
 void SPI0_IRQHandler(void);
 void SPI1_IRQHandler(void);
 void SPI2_IRQHandler(void);
@@ -156,7 +156,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     // Reset this module
     SYS_ResetModule(modinit->rsetidx);
@@ -216,7 +216,8 @@ void spi_free(spi_t *obj)
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
+
     SPI_DisableInt(((SPI_T *) NU_MODBASE(obj->spi.spi)), (SPI_FIFO_RXOVR_INTEN_MASK | SPI_FIFO_RX_INTEN_MASK | SPI_FIFO_TX_INTEN_MASK));
     NVIC_DisableIRQ(modinit->irq_n);
 
@@ -227,6 +228,7 @@ void spi_free(spi_t *obj)
     int i = modinit - spi_modinit_tab;
     spi_modinit_mask &= ~(1 << i);
 }
+
 void spi_format(spi_t *obj, int bits, int mode, int slave)
 {
     MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
@@ -405,7 +407,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
         // DMA way
         const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
         MBED_ASSERT(modinit != NULL);
-        MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+        MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
         
         // Configure tx DMA
         dma_enable(obj->spi.dma_chn_id_tx, 1);                  // Enable this DMA channel
@@ -509,7 +511,6 @@ void spi_abort_asynch(spi_t *obj)
             // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
             dma_enable(obj->spi.dma_chn_id_tx, 0);
         }
-        //SPI_DISABLE_TX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
         spi_base->DMA &= ~SPI_DMA_TX_DMA_EN_Msk;
 
         if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
@@ -517,7 +518,6 @@ void spi_abort_asynch(spi_t *obj)
             // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called.
             dma_enable(obj->spi.dma_chn_id_rx, 0);
         }
-        //SPI_DISABLE_RX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
         spi_base->DMA &= ~SPI_DMA_RX_DMA_EN_Msk;
     }
 
@@ -611,7 +611,7 @@ static void spi_enable_vector_interrupt(spi_t *obj, uint32_t handler, uint8_t en
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
     
     struct nu_spi_var *var = (struct nu_spi_var *) modinit->var;
     
@@ -676,6 +676,7 @@ static uint32_t spi_event_check(spi_t *obj)
     // Receive Time-Out
     if (spi_base->STATUS & SPI_STATUS_TIME_OUT_STS_Msk) {
         spi_base->STATUS = SPI_STATUS_TIME_OUT_STS_Msk;
+        // Not using this IF. Just clear it.
     }
     
     return event;
@@ -861,7 +862,7 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();
@@ -884,7 +885,7 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT((SPIName) modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();

targets/TARGET_NUVOTON/TARGET_NUC472/spi_api.c

@@ -136,7 +136,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     // Reset this module
     SYS_ResetModule(modinit->rsetidx);
@@ -144,8 +144,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     // Enable IP clock
     CLK_EnableModuleClock(modinit->clkidx);
 
-    //SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
-    
     pinmap_pinout(mosi, PinMap_SPI_MOSI);
     pinmap_pinout(miso, PinMap_SPI_MISO);
     pinmap_pinout(sclk, PinMap_SPI_SCLK);
@@ -156,9 +154,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     obj->spi.pin_sclk = sclk;
     obj->spi.pin_ssel = ssel;
 
-    // Configure the SPI data format and frequency
-    //spi_format(obj, 8, 0, SPI_MSB); // 8 bits, mode 0
-    //spi_frequency(obj, 1000000);
 
 #if DEVICE_SPI_ASYNCH
     obj->spi.dma_usage = DMA_USAGE_NEVER;
@@ -194,7 +189,7 @@ void spi_free(spi_t *obj)
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     SPI_DisableInt(((SPI_T *) NU_MODBASE(obj->spi.spi)), (SPI_FIFO_RXOVIEN_MASK | SPI_FIFO_RXTHIEN_MASK | SPI_FIFO_TXTHIEN_MASK));
     NVIC_DisableIRQ(modinit->irq_n);
@@ -202,12 +197,11 @@ void spi_free(spi_t *obj)
     // Disable IP clock
     CLK_DisableModuleClock(modinit->clkidx);
 
-    //((struct nu_spi_var *) modinit->var)->obj = NULL;
-    
     // Mark this module to be deinited.
     int i = modinit - spi_modinit_tab;
     spi_modinit_mask &= ~(1 << i);
 }
+
 void spi_format(spi_t *obj, int bits, int mode, int slave)
 {
     MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
@@ -329,7 +323,6 @@ void spi_slave_write(spi_t *obj, int value)
 #if DEVICE_SPI_ASYNCH
 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
 {
-    //MBED_ASSERT(bits >= NU_SPI_FRAME_MIN && bits <= NU_SPI_FRAME_MAX);
     SPI_T *spi_base = (SPI_T *) NU_MODBASE(obj->spi.spi);
     SPI_SET_DATA_WIDTH(spi_base, bit_width);
 
@@ -363,7 +356,7 @@ void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx,
         // DMA way
         const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
         MBED_ASSERT(modinit != NULL);
-        MBED_ASSERT(modinit->modname == obj->spi.spi);
+        MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
         PDMA_T *pdma_base = dma_modbase();
 
@@ -471,16 +464,14 @@ void spi_abort_asynch(spi_t *obj)
 
         if (obj->spi.dma_chn_id_tx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->spi.dma_chn_id_tx, 0);
-            // FIXME: Next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->spi.dma_chn_id_tx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_tx);
         }
         SPI_DISABLE_TX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
 
         if (obj->spi.dma_chn_id_rx != DMA_ERROR_OUT_OF_CHANNELS) {
             PDMA_DisableInt(obj->spi.dma_chn_id_rx, 0);
-            // FIXME: Next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
-            //PDMA_STOP(obj->spi.dma_chn_id_rx);
+            // NOTE: On NUC472, next PDMA transfer will fail with PDMA_STOP() called. Cause is unknown.
             pdma_base->CHCTL &= ~(1 << obj->spi.dma_chn_id_rx);
         }
         SPI_DISABLE_RX_PDMA(((SPI_T *) NU_MODBASE(obj->spi.spi)));
@@ -530,7 +521,6 @@ uint8_t spi_active(spi_t *obj)
 static int spi_writeable(spi_t * obj)
 {
     // Receive FIFO must not be full to avoid receive FIFO overflow on next transmit/receive
-    //return (! SPI_GET_TX_FIFO_FULL_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi)))) && (SPI_GET_RX_FIFO_COUNT(((SPI_T *) NU_MODBASE(obj->spi.spi))) < NU_SPI_FIFO_DEPTH);
     return (! SPI_GET_TX_FIFO_FULL_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi))));
 }
 
@@ -552,7 +542,7 @@ static void spi_enable_vector_interrupt(spi_t *obj, uint32_t handler, uint8_t en
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     if (enable) {
         NVIC_SetVector(modinit->irq_n, handler);
@@ -570,7 +560,7 @@ static void spi_master_enable_interrupt(spi_t *obj, uint8_t enable)
 
     if (enable) {
         SPI_SetFIFOThreshold(spi_base, 4, 4);
-        //SPI_SET_SUSPEND_CYCLE(spi_base, 4);
+
         // Enable tx/rx FIFO threshold interrupt
         SPI_EnableInt(spi_base, SPI_FIFO_RXTHIEN_MASK | SPI_FIFO_TXTHIEN_MASK);
     }
@@ -769,9 +759,7 @@ static uint8_t spi_get_data_width(spi_t *obj)
 
 static int spi_is_tx_complete(spi_t *obj)
 {
-    // ???: Exclude tx fifo empty check due to no such interrupt on DMA way
     return (obj->tx_buff.pos == obj->tx_buff.length);
-    //return (obj->tx_buff.pos == obj->tx_buff.length && SPI_GET_TX_FIFO_EMPTY_FLAG(((SPI_T *) NU_MODBASE(obj->spi.spi))));
 }
 
 static int spi_is_rx_complete(spi_t *obj)
@@ -783,20 +771,20 @@ static void spi_dma_handler_tx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->tx_buff.pos = obj->tx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();
@@ -806,20 +794,20 @@ static void spi_dma_handler_rx(uint32_t id, uint32_t event_dma)
 {
     spi_t *obj = (spi_t *) id;
 
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_ABORT) {
     }
     // Expect SPI IRQ will catch this transfer done event
     if (event_dma & DMA_EVENT_TRANSFER_DONE) {
         obj->rx_buff.pos = obj->rx_buff.length;
     }
-    // FIXME: Pass this error to caller
+    // TODO: Pass this error to caller
     if (event_dma & DMA_EVENT_TIMEOUT) {
     }
 
     const struct nu_modinit_s *modinit = get_modinit(obj->spi.spi, spi_modinit_tab);
     MBED_ASSERT(modinit != NULL);
-    MBED_ASSERT(modinit->modname == obj->spi.spi);
+    MBED_ASSERT(modinit->modname == (int) obj->spi.spi);
 
     void (*vec)(void) = (void (*)(void)) NVIC_GetVector(modinit->irq_n);
     vec();