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simplify checking for F4_g2 exception

pull/13797/head
JojoS62 2020-10-22 11:20:51 +02:00
parent 8145b69959
commit a209d44a07
1 changed files with 8 additions and 9 deletions
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15
targets/TARGET_STM/mbed_overrides.c
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@ -34,14 +34,14 @@ extern void SetSysClock(void);
#if MBED_CONF_TARGET_LSE_AVAILABLE #if MBED_CONF_TARGET_LSE_AVAILABLE
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\ // set defaults for LSE drive load level, with exception for F4_g2 MCU
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) #ifdef RCC_LSE_HIGHDRIVE_MODE
# if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL # if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
# define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL # define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
# else # else
# define LSE_DRIVE_LOAD_LEVEL RCC_LSE_HIGHDRIVE_MODE # define LSE_DRIVE_LOAD_LEVEL RCC_LSE_HIGHDRIVE_MODE
# endif # endif
#else // defined(STM32F4xx) #else
# if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL # if MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
# define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL # define LSE_DRIVE_LOAD_LEVEL MBED_CONF_TARGET_LSE_DRIVE_LOAD_LEVEL
# else # else
@ -80,13 +80,12 @@ static void LSEDriveConfig(void) {
} }
// set LSE drive level. Exception only for F4_g2 series // set LSE drive level. Exception only for F4_g2 series
#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
#else
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
#ifdef __HAL_RCC_LSEDRIVE_CONFIG
__HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL); __HAL_RCC_LSEDRIVE_CONFIG(LSE_DRIVE_LOAD_LEVEL);
#endif #else
HAL_RCCEx_SelectLSEMode(LSE_DRIVE_LOAD_LEVEL);
#endif
} }
#endif // MBED_CONF_TARGET_LSE_AVAILABLE #endif // MBED_CONF_TARGET_LSE_AVAILABLE