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Merge branch 'master' of https://github.com/mbedmicro/mbed

pull/1289/head
bcostm 2015-08-07 11:54:06 +02:00
parent 277b2d033f 020975119c
commit a1bd132fc1
32 changed files with 7142 additions and 1003 deletions
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2
libraries/mbed/api/mbed.h
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@ -16,7 +16,7 @@
#ifndef MBED_H #ifndef MBED_H
#define MBED_H #define MBED_H
#define MBED_LIBRARY_VERSION 103 #define MBED_LIBRARY_VERSION 104
#include "platform.h" #include "platform.h"

24
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct Normal file
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@ -0,0 +1,24 @@
;WITHOUT SOFTDEVICE:
;LR_IROM1 0x00000000 0x00040000 {
; ER_IROM1 0x00000000 0x00040000 {
; *.o (RESET, +First)
; *(InRoot$$Sections)
; .ANY (+RO)
; }
; RW_IRAM1 0x20000000 0x00004000 {
; .ANY (+RW +ZI)
; }
;}
;
;WITH SOFTDEVICE:
LR_IROM1 0x18000 0x0028000 {
ER_IROM1 0x18000 0x0028000 {
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20002000 0x00002000 {
.ANY (+RW +ZI)
}
}

0
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct → libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct
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151
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld Normal file
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@ -0,0 +1,151 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x00016000, LENGTH = 0x2A000
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.Vectors))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
*(.jcr)
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM
.heap (COPY):
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

0
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld → libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S130/NRF51822.ld
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3
libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/system_nrf51.c
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@ -83,7 +83,8 @@ void SystemInit(void)
// Start the external 32khz crystal oscillator. // Start the external 32khz crystal oscillator.
#if defined(TARGET_DELTA_DFCM_NNN40) || defined(TARGET_HRM1017) /* for Nordic devices without an external LF crystal */
#if defined(TARGET_NRF_LFCLK_RC)
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos); NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
#else #else
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos); NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/hal_tick.c
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@ -89,7 +89,7 @@ void timer_oc_irq_handler(void)
// Prepare next interrupt // Prepare next interrupt
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY); __HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
PreviousVal = val; PreviousVal = val;
#if 1 // For DEBUG only #if 0 // For DEBUG only
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6); HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
#endif #endif
} }
@ -140,7 +140,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
// Enable timer // Enable timer
HAL_TIM_Base_Start(&TimMasterHandle); HAL_TIM_Base_Start(&TimMasterHandle);
#if 1 // For DEBUG only #if 0 // For DEBUG only
__GPIOB_CLK_ENABLE(); __GPIOB_CLK_ENABLE();
GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = GPIO_PIN_6; GPIO_InitStruct.Pin = GPIO_PIN_6;

12
libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_gpio.c
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@ -176,7 +176,7 @@ uint8_t HAL_GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
return bitstatus; return bitstatus;
} }
uint8_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) uint16_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
{ {
assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
return ((uint16_t)GPIOx->DATA); return ((uint16_t)GPIOx->DATA);
@ -286,3 +286,13 @@ void HAL_PAD_AFConfig(PAD_Type Px, uint16_t GPIO_Pin, PAD_AF_TypeDef P_AF)
} }
} }
void GPIO_OutEnClr(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
GPIOx->OUTENCLR = GPIO_Pin;
}
void GPIO_OutEnSet(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
GPIOx->OUTENSET = GPIO_Pin;
}

5
libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_gpio.h
View File

@ -117,7 +117,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef* GPIOx);
void HAL_GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); void HAL_GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
void HAL_GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); void HAL_GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
uint8_t HAL_GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint8_t HAL_GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint8_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint16_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
uint8_t HAL_GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint8_t HAL_GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
uint16_t HAL_GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); uint16_t HAL_GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
void HAL_GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void HAL_GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
@ -126,6 +126,9 @@ void HAL_GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
void HAL_GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); void HAL_GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
void HAL_PAD_AFConfig(PAD_Type Px, uint16_t Pnum, PAD_AF_TypeDef P_AF); void HAL_PAD_AFConfig(PAD_Type Px, uint16_t Pnum, PAD_AF_TypeDef P_AF);
void GPIO_OutEnClr(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void GPIO_OutEnSet(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
#ifdef __cplusplus #ifdef __cplusplus
} }

783
libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_i2c.c
View File

@ -1,589 +1,290 @@
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
/*include -------------------------------------*/
#include <stdio.h>
#include "W7500x.h" #include "W7500x.h"
/** @defgroup I2C_Private_Functions
* @{
*/
GPIO_InitTypeDef GPIO_InitDef; GPIO_InitTypeDef GPIO_InitDef;
void i2c_loop_us(int us);
#define SCL GPIO_Pin_9 uint32_t I2C_Init(I2C_ConfigStruct* conf)
#define SDA GPIO_Pin_10
uint16_t buf[] ={0x00,0x01};
/**
* @brief Initializes the I2Cx peripheral according to the specified
* parameters in the I2C_InitStruct.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
* contains the configuration information for the specified I2C peripheral.
* @retval None
*/
uint32_t I2C_Init(I2C_TypeDef* I2Cx, I2C_ConfigStruct conf)
{ {
uint32_t mode; uint32_t scl_port_num;
uint8_t prescale; uint32_t scl_pin_index;
uint16_t timeout; uint32_t sda_port_num;
uint16_t slave_address; uint32_t sda_pin_index;
scl_port_num = I2C_PORT(conf->scl);
scl_pin_index = I2C_PIN_INDEX(conf->scl);
mode = conf.mode; sda_port_num = I2C_PORT(conf->sda);
slave_address = conf.slave_address; sda_pin_index = I2C_PIN_INDEX(conf->sda);
if(mode == I2C_Master)
{ //SCL setting
prescale = conf.master.prescale; GPIO_InitDef.GPIO_Pin = scl_pin_index;
timeout = conf.master.timeout; GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT;
I2C_CoreEn(I2Cx,ENABLE); HAL_GPIO_Init((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), &GPIO_InitDef);
I2C_MasterSlave(I2Cx,ENABLE); HAL_GPIO_SetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
I2C_Prescale(I2Cx,prescale); // 0x61 //When PLL clk is 20MHz and Prescale value set 0x61, SCL is 100KHz //SDA setting
I2C_TimeoutSet(I2Cx,timeout); // 0xFFFF GPIO_InitDef.GPIO_Pin = sda_pin_index;
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN;
I2C_CoreEn(I2Cx,DISABLE);
} HAL_GPIO_Init((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), &GPIO_InitDef);
else if(conf.mode == I2C_Slave) HAL_GPIO_ResetBits((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
{
I2C_AcknowledgeConfig(I2Cx,ENABLE); //Pin muxing
I2C_SetSlavAddress(I2Cx,slave_address); HAL_PAD_AFConfig(scl_port_num, scl_pin_index, PAD_AF1);
} HAL_PAD_AFConfig(sda_port_num, sda_pin_index, PAD_AF1);
return 0;
}
void I2C_WriteBitSCL(I2C_ConfigStruct* conf, uint8_t data)
{
uint32_t scl_port_num = I2C_PORT(conf->scl);
uint32_t scl_pin_index = I2C_PIN_INDEX(conf->scl);
if(data == 1)
HAL_GPIO_SetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
else else
return ERROR; HAL_GPIO_ResetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
I2C_AcknowledgeConfig(I2Cx,ENABLE);
return SUCCESS;
} }
void I2C_WriteBitSDA(I2C_ConfigStruct* conf, uint8_t data)
void I2C_DeInit(I2C_TypeDef* I2Cx)
{ {
I2C_InterRst(I2Cx,ENABLE); uint32_t sda_port_num = I2C_PORT(conf->sda);
I2C_CoreEn(I2Cx, ENABLE); uint32_t sda_pin_index = I2C_PIN_INDEX(conf->sda);
I2C_InterRst(I2Cx,DISABLE);
I2C_CoreEn(I2Cx, DISABLE); if(data == 1)
GPIO_OutEnClr((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
else
GPIO_OutEnSet((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
} }
uint8_t I2C_ReadBitSDA(I2C_ConfigStruct* conf)
ErrorStatus I2C_Start(I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr)
{ {
ErrorStatus ret; uint32_t sda_port_num = I2C_PORT(conf->sda);
uint32_t sda_pin_index = I2C_PIN_INDEX(conf->sda);
I2C_GenerateSTART(I2Cx,ENABLE);
I2C_SendSlaveAddress(I2Cx,slave_address,(I2C_CTR)ctr); if(HAL_GPIO_ReadInputDataBit((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index))
I2C_GenerateSTART(I2Cx,DISABLE); return 1;
else
ret=I2C_CheckEvent(I2Cx,I2C_ACKR); return 0;
return 0;
}
void I2C_Start(I2C_ConfigStruct* conf)
{
I2C_WriteBitSCL(conf, 1);
I2C_WriteBitSDA(conf, 1);
I2C_WriteBitSDA(conf, 0);
I2C_WriteBitSCL(conf, 0);
}
void I2C_Stop(I2C_ConfigStruct* conf)
{
I2C_WriteBitSCL(conf, 0);
I2C_WriteBitSDA(conf, 0);
I2C_WriteBitSCL(conf, 1);
I2C_WriteBitSDA(conf, 1);
}
uint8_t I2C_WriteByte(I2C_ConfigStruct* conf, uint8_t data)
{
int i;
uint8_t ret;
//Write byte
for(i=0; i<8; i++)
{
if((data << i) & 0x80)
I2C_WriteBitSDA(conf, 1);
else
I2C_WriteBitSDA(conf, 0);
I2C_WriteBitSCL(conf, 1);
I2C_WriteBitSCL(conf, 0);
}
//Make clk for receiving ack
I2C_WriteBitSDA(conf, 1);
I2C_WriteBitSCL(conf, 1);
//Read Ack/Nack
ret = I2C_ReadBitSDA(conf);
I2C_WriteBitSCL(conf, 0);
return ret; return ret;
} }
void I2C_Stop(I2C_TypeDef* I2Cx) void I2C_SendACK(I2C_ConfigStruct* conf)
{ {
I2C_GenerateSTOP(I2Cx,ENABLE); I2C_WriteBitSDA(conf, 0);
I2C_GenerateSTOP(I2Cx,DISABLE); I2C_WriteBitSCL(conf, 1);
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output I2C_WriteBitSCL(conf, 0);
HAL_GPIO_Init(GPIOA, &GPIO_InitDef); }
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF0); // PAD Config - LED used 2nd Function
void I2C_SendNACK(I2C_ConfigStruct* conf)
{
I2C_WriteBitSDA(conf, 1);
I2C_WriteBitSCL(conf, 1);
I2C_WriteBitSCL(conf, 0);
} }
void I2C_Reset(I2C_TypeDef* I2Cx) uint8_t I2C_ReadByte(I2C_ConfigStruct* conf)
{ {
I2C_CoreEn(I2Cx,ENABLE); int i;
// Maybe, it needs a little delay uint8_t ret = 0;
I2C_CoreEn(I2Cx,DISABLE);
} I2C_WriteBitSDA(conf, 1); //out enable clear(GPIO is input)
void I2C_SendData(I2C_TypeDef* I2Cx,uint16_t Data) //Read byte
{ for(i=0; i<8; i++)
I2Cx -> TXR = (uint16_t)Data;
}
int8_t I2C_SendDataAck(I2C_TypeDef* I2Cx,uint16_t Data)
{
buf[0] = Data;
if(buf[0] == buf[1])
{ {
I2C_GPIO(); I2C_WriteBitSCL(conf, 1);
WriteByte(Data); ret = (ret << 1) | (I2C_ReadBitSDA(conf));
i2c_loop_us(1); I2C_WriteBitSCL(conf, 0);
GPIO_I2C();
} }
else
return ret;
}
int I2C_Write(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
{
int i;
I2C_Start(conf);
//Write addr
if(I2C_WriteByte(conf, addr) != 0)
{ {
I2Cx -> TXR = (uint16_t)Data; printf("Received NACK at address phase!!\r\n");
if(I2C_CheckEvent(I2Cx,I2C_ACKR) == ERROR)
{
return ERROR;
}
}
buf[1] = buf[0];
return SUCCESS;
}
int I2C_ReceiveData(I2C_TypeDef* I2Cx, int last)
{
if(last)
{
I2C_AcknowledgeConfig(I2Cx,DISABLE);
if( I2C_CheckEvent(I2Cx,I2C_ACKT) == ERROR ) {
return -1;
}
}
else if( I2C_CheckEvent(I2Cx,I2C_ACKT) == ERROR ) {
return -1;
}
return (uint8_t)I2Cx -> RXR;
}
int I2C_Burst_Read(I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop)
{
int recv_cnt;
if( I2C_Start(I2Cx,address,I2C_READ_SA7) == ERROR){
return -1; return -1;
} }
for(recv_cnt=0;recv_cnt<length;recv_cnt++) //Write data
for(i=0; i<len; i++)
{ {
} if(I2C_WriteByte(conf, data[i]))
return recv_cnt;
}
int I2C_Burst_Write(I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop)
{
int cnt;
if( I2C_Start(I2Cx,address,I2C_WRITE_SA7) == ERROR)
{
return -1;
}
for(cnt=0;cnt<length;cnt++)
{
if( I2C_SendDataAck(I2Cx,data[cnt]) == ERROR )
{
I2C_Stop(I2Cx);
return -1; return -1;
}
} }
// If not repeated start, send stop
if(stop)
{
I2C_Stop(I2Cx);
}
return length;
}
/**
* @brief Generates I2Cx communication START condition.
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
* @param NewState: NewState of the I2C START condition generation.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CMDR = I2C_CMDR_STA;
}
else
{
I2Cx->CMDR = I2C_CMDR_STA;
}
}
/**
* @brief Generates I2Cx communication STOP condition.
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
* @param NewState: NewState of the I2C STOP condition generation.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE)
{
I2Cx->CMDR = I2C_CMDR_STO;
}
else
{
I2Cx->CMDR = I2C_CMDR_STO;
}
}
/**
* @brief Enables or disables the specified I2C acknowledge feature.
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
* @param NewState: NewState of the I2C Acknowledgement.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE) I2Cx -> CMDR = I2C_CMDR_ACK;
else I2Cx -> CMDR = I2C_CMDR_ACK;
}
/**
* @brief Generates I2Cx communication REGenerateSTART condition
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
* @param NewState: NewState of the I2C Acknowledgement.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void I2C_RESTART(I2C_TypeDef * I2Cx, FunctionalState NewState)
{
if(NewState != DISABLE) I2Cx->CMDR = I2C_CMDR_RESTA;
else I2Cx->CMDR = I2C_CMDR_RESTA;
}
/**
* @brief Enable or disable the specified I2C Core_en feature
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
* @param NewState: NewState of the I2C Acknowledgement.
* This parameter can be: ENABLE or DISABLE.
* @retval None.
*/
void I2C_CoreEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control*/
if(NewState != DISABLE) I2Cx -> CTR = I2C_CTR_COREEN;
else I2Cx -> CTR = I2C_CTR_COREEN;
}
void I2C_InterEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control Interrupt Enable*/
if(NewState != DISABLE) I2Cx -> CTR = I2C_CTR_INTEREN;
else I2Cx -> CTR = I2C_CTR_INTEREN;
}
void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control MasterSlave select*/
if(NewState == ENABLE)
{
if( (I2Cx->CTR & I2C_CTR_MODE) != I2C_CTR_MODE )
{
I2Cx->CTR = I2C_CTR_MODE;
}
}
else // DISABLE
{
if( (I2Cx->CTR & I2C_CTR_MODE) == I2C_CTR_MODE )
{
I2Cx->CTR = I2C_CTR_MODE;
}
}
}
void I2C_ControlRW(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control Read(receive)*/
if(NewState == ENABLE)
{
if( (I2Cx->CTR & I2C_CTR_CTRRWN) != I2C_CTR_CTRRWN )
{
I2Cx->CTR = I2C_CTR_CTRRWN;
}
}
else // DISABLE
{
if( (I2Cx->CTR & I2C_CTR_CTRRWN) == I2C_CTR_CTRRWN )
{
I2Cx->CTR = I2C_CTR_CTRRWN;
}
}
}
void I2C_ControlEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control*/
if(NewState == ENABLE)
{
if( (I2Cx->CTR & I2C_CTR_CTEN) != I2C_CTR_CTEN )
{
I2Cx->CTR = I2C_CTR_CTEN;
}
}
else // DISABLE
{
if( (I2Cx->CTR & I2C_CTR_CTEN) == I2C_CTR_CTEN )
{
I2Cx->CTR = I2C_CTR_CTEN;
}
}
}
void I2C_InterRst(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Control*/
if(NewState == ENABLE)
{
if( (I2Cx->ISCR & I2C_ISCR_RST) != I2C_ISCR_RST )
{
I2Cx->ISCR = I2C_ISCR_RST;
}
}
else // DISABLE
{
if( (I2Cx->ISCR & I2C_ISCR_RST) == I2C_ISCR_RST )
{
I2Cx->ISCR = I2C_ISCR_RST;
}
}
}
void I2C_Prescale(I2C_TypeDef* I2Cx,uint16_t Data)
{
I2Cx -> PRER = (uint16_t)Data;
}
void I2C_TimeoutSet(I2C_TypeDef* I2Cx,uint16_t Data)
{
I2Cx -> TSR = (uint16_t)Data;
}
void I2C_SetSlavAddress(I2C_TypeDef* I2Cx,uint16_t Data)
{
I2Cx -> SADDR = (uint16_t)Data;
}
uint8_t I2C_StatusRead(I2C_TypeDef* I2Cx)
{
return (uint8_t)I2Cx -> SR;
}
ErrorStatus WaitEvent(I2C_TypeDef* I2Cx, uint32_t flag, FlagStatus status)
{
int Timeout=0,loopcnt=0;
Timeout = I2Cx->TSR; I2C_Stop(conf);
if(status == SET)
{
for(loopcnt=Timeout; loopcnt>0; loopcnt--)
{
if( ((I2Cx->SR) & flag) == flag )
return SUCCESS;
}
}
else
{
for(loopcnt=Timeout; loopcnt>0; loopcnt--)
{
if( ((I2Cx->SR) & flag) != flag )
return SUCCESS;
}
}
return ERROR;
}
/**
* @brief Checks whether the specified I2C flag is set or not.
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
* @param I2C_EVENT: specifies the event to be checked.
*/
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr)
{
switch(sr)
{
case(I2C_ACKR):
if( WaitEvent(I2Cx, I2C_SR_ACKR, SET) == ERROR) return ERROR;
if( WaitEvent(I2Cx, I2C_SR_ACKR, RESET) == ERROR) return ERROR;
break;
case(I2C_ACKT ):
if( WaitEvent(I2Cx, I2C_SR_ACKT, SET) == ERROR) return ERROR;
if( WaitEvent(I2Cx, I2C_SR_ACKT, RESET) == ERROR) return ERROR;
break;
case(I2C_OACKR):
if( WaitEvent(I2Cx, I2C_SR_ACKR, SET) == ERROR) return ERROR;
break;
case(I2C_SACKR ):
if( WaitEvent(I2Cx, I2C_SR_ACKR, RESET) == ERROR) return ERROR;
break;
case(I2C_BT ):
if( WaitEvent(I2Cx, I2C_SR_BT, RESET) == ERROR) return ERROR;
break;
default:
return ERROR;
}
return SUCCESS;
}
void I2C_SendSlaveAddress(I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr)
{
switch(Ctr)
{
case(I2C_READ_SA7):
I2C_SendData(I2Cx,SlaveAddress|I2C_READ);
break;
case(I2C_WRITE_SA7):
I2C_SendData(I2Cx,SlaveAddress|I2C_WRITE);
break;
case(I2C_CTRWRITE_SA7):
case(I2C_CTRREAD_SA7):
I2C_SendData(I2Cx,SlaveAddress);
break;
default:
return;
}
}
int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr)
{
I2C_RESTART(I2Cx,ENABLE);
I2C_SendSlaveAddress(I2Cx,SlaveAddress,Ctr);
if((I2C_CheckEvent(I2Cx,I2C_OACKR)) == ERROR )
{
return 0;
}
I2C_RESTART(I2Cx,DISABLE);
if((I2C_CheckEvent(I2Cx,I2C_SACKR)) == ERROR)
{
return 0;
}
return 1;
}
/** return 0;//success
* @brief Reads the specified I2C register and returns its value.
* @param I2C_Register: specifies the register to read.
* This parameter can be one of the following values:
* @arg I2C_Register_CR1: CR1 register.
* @arg I2C_Register_CR2: CR2 register.
* @arg I2C_Register_OAR1: OAR1 register.
* @arg I2C_Register_OAR2: OAR2 register.
* @arg I2C_Register_DR: DR register.
* @arg I2C_Register_SR1: SR1 register.
* @arg I2C_Register_SR2: SR2 register.
* @arg I2C_Register_CCR: CCR register.
* @arg I2C_Register_TRISE: TRISE register.
* @retval The value of the read register.
*/
uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
{
__IO uint32_t tmp = 0;
tmp = (uint32_t) I2Cx;
tmp += I2C_Register;
/* Return the selected register value */
return (*(__IO uint16_t *) tmp);
} }
int I2C_WriteRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
{
int i;
void I2C_GPIO(void ) I2C_Start(conf);
{
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF1); // PAD Config - LED used 2nd Function
GPIO_InitDef.GPIO_Pin = GPIO_Pin_10; // Set to Pin_9 (SCL0))
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_10, PAD_AF1); // PAD Config - LED used 2nd Function
}
void GPIO_I2C(void )
{
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF0); // PAD Config - LED used 2nd Function
GPIO_InitDef.GPIO_Pin = GPIO_Pin_10; // Set to Pin_10 (SDA0))
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN; // Set to Mode Output
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_10, PAD_AF0); // PAD Config - LED used 2nd Functio
}
void WriteByte(uint8_t val)
{
int i;
GPIO_TypeDef* GPIOx;
GPIOx = GPIOA;
for(i=0;i<8;i++)
{
if((val << i) & 0x80){
digitalWrite(GPIOx,SDA, Bit_SET);
}else{
digitalWrite(GPIOx,SDA, Bit_RESET);
}
i2c_loop_us(1);
digitalWrite(GPIOx,SCL, Bit_SET);
i2c_loop_us(2);
digitalWrite(GPIOx,SCL, Bit_RESET);
}
digitalWrite(GPIOx,SDA, Bit_SET);
i2c_loop_us(1);
digitalWrite(GPIOx,SCL, Bit_SET);
i2c_loop_us(2);
digitalWrite(GPIOx,SCL, Bit_RESET);
}
void digitalWrite(GPIO_TypeDef* GPIOx,uint16_t pin, uint16_t val)
{
if(val == Bit_SET) //Write addr
if(I2C_WriteByte(conf, addr) != 0)
{ {
GPIOx -> OUTENCLR = pin; printf("Received NACK at address phase!!\r\n");
return -1;
} }
else
//Write data
for(i=0; i<len; i++)
{ {
GPIOx -> OUTENSET |= pin; if(I2C_WriteByte(conf, data[i]))
return -1;
} }
return 0;//success
} }
int I2C_Read(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
void i2c_loop_us(int us)
{ {
volatile uint32_t delay = us; // approximate loops per ms at 24 MHz, Debug config int i;
for(; delay != 0; delay--)
__NOP(); I2C_Start(conf);
}
void i2c_loop_ms(int count) { //Write addr | read command
i2c_loop_us(count*1000); if(I2C_WriteByte(conf, (addr | 1)) != 0)
{
printf("Received NACK at address phase!!\r\n");
return -1;
}
//Read data
for(i=0; i<len; i++)
{
data[i] = I2C_ReadByte(conf);
if( i == (len - 1) )
I2C_SendNACK(conf);
else
I2C_SendACK(conf);
}
I2C_Stop(conf);
return 0;//success
}
int I2C_ReadRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
{
int i;
I2C_Start(conf);
//Write addr | read command
if(I2C_WriteByte(conf, (addr | 1)) != 0)
{
printf("Received NACK at address phase!!\r\n");
return -1;
}
//Read data
for(i=0; i<len; i++)
{
data[i] = I2C_ReadByte(conf);
if( i == (len - 1) )
I2C_SendNACK(conf);
else
I2C_SendACK(conf);
}
return 0;//success
} }

221
libraries/mbed/targets/cmsis/TARGET_WIZNET/TARGET_W7500x/W7500x_i2c.h
View File

@ -27,210 +27,55 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************* *******************************************************************************
*/ */
/*include -------------------------------------*/
#include "W7500x.h" #include "W7500x.h"
typedef enum #ifndef __W7500X_I2C_H
{ #define __W7500X_I2C_H
I2C_WRITE_SA7=0,
I2C_READ_SA7,
I2C_CTRWRITE_SA7,
I2C_CTRREAD_SA7,
} I2C_CTR;
typedef enum
{
I2C_ACKR=0,
I2C_ACKT,
I2C_OACKR,
I2C_SACKR,
I2C_BT,
} I2C_SR;
typedef enum typedef enum {
{ I2C_PA_5 = 0x05,
INT_ACKR=-1, I2C_PA_6 = 0x06,
INT_ACKT=-2, I2C_PA_9 = 0x09,
INT_NACKR=-3, I2C_PA_10 = 0x0A,
INT_NACKT=-4, I2C_PC_4 = 0x24,
INT_BT=-5, I2C_PC_5 = 0x25,
} I2C_ERROR; I2C_PC_8 = 0x28,
// Not connected
I2C_NC = (int)0xFFFFFFFF
/** } I2C_PinName;
*@
*/
/** @defgroup I2C_registers
* @{
*/
#define I2C_Register_PRER ((uint8_t)0x00)
#define I2C_Register_CTR ((uint8_t)0x04)
#define I2C_Register_CMDR ((uint8_t)0x08)
#define I2C_Register_SR ((uint8_t)0x0C)
#define I2C_Register_TSR ((uint8_t)0x10)
#define I2C_Register_SADDR ((uint8_t)0x14)
#define I2C_Register_TXR ((uint8_t)0x18)
#define I2C_Register_RXR ((uint8_t)0x1C)
#define I2C_Register_ISR ((uint8_t)0x20)
#define I2C_Register_ISCR ((uint8_t)0x24)
#define I2C_Register_ISMR ((uint8_t)0x28)
#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_PRER) || \
((REGISTER) == I2C_Register_CTR) || \
((REGISTER) == I2C_Register_CMDR) || \
((REGISTER) == I2C_Register_SR) || \
((REGISTER) == I2C_Register_TSR) || \
((REGISTER) == I2C_Register_SADDR) || \
((REGISTER) == I2C_Register_TXR) || \
((REGISTER) == I2C_Register_RXR) || \
((REGISTER) == I2C_Register_ISR)|| \
((REGISTER) == I2C_Register_ISCR)| \
((REGISTER) == I2C_Register_ISMR))
/** @defgroup I2C_Private_Defines
* @{
*/
/* I2C COREEN mask */
#define I2C_CTR_COREEN_DIS ((uint16_t)0xFF7F)
/* I2C INTEREN mask */
#define I2C_CTR_INTEREN_DIS ((uint16_t)0xFFBF)
/* I2C MODE(M/SN) mask */
#define I2C_CTR_MODE_SLAVE ((uint16_t)0xFFDF)
/* I2C ADDR10(10/7N) mask */
#define I2C_CTR_ADDR10_7BIT ((uint16_t)0xFFEF)
/* I2C CTRRWN(R/WN) mask */
#define I2C_CTR_CTRRWN_DIS ((uint16_t)0xFFF7)
/* I2C CTREN mask */
#define I2C_CTR_CTEN_DIS ((uint16_t)0xFFFB)
/* I2C START mask */
#define I2C_CMDR_START_DIS ((uint16_t)0xFF7F)
/* I2C STOP mask */
#define I2C_CMDR_STOP_DIS ((uint16_t)0xFFBF)
/* I2C ACK mask */
#define I2C_CMDR_ACK_NAK ((uint16_t)0xFFDF)
/* I2C RESTART mask */
#define I2C_CMDR_RESTA_DIS ((uint16_t)0xFFEF)
/* I2C INTERRUPT RESET mask */
#define I2C_ISCR_RST_DIS ((uint16_t)0xFFFE)
/**
* @}
*/
#define I2C_WRITE 0
#define I2C_READ 1
#define I2C_RWSEL(NewState) (((NewState) == I2C_WRITE)|| \
((NewState) == I2C_READ))
#define I2C_Ack_Enable (0x01ul << 5)
#define I2C_Ack_Disable (0x00ul << 5)
#define IS_I2C_ACK_NewState(NewState) (((NewState) == I2C_Ack_Enable) || \
((NewState) == I2C_Ack_Disable))
#define I2C_MASTER_MODE (0x01ul << 5 ) // 0x20
#define I2C_SLAVE_MODE (0x00ul << 5 ) // 0x20
#define IS_I2C_MODE(MODE) ((MODE) == I2C_MASTER_MODE)|| \
(MODE) == I2C_SLAVE_MODE))
#define I2C_CTR_MODE (0x01ul << 5 ) // 0x20
#define SLAVE_ADDR10 0x208
typedef enum
{
I2C_Master = I2C_MASTER_MODE,
I2C_Slave = I2C_SLAVE_MODE
}I2C_MODE;
typedef struct
{
uint8_t prescale;
uint16_t timeout;
I2C_CTR control;
}I2C_MasterConfStruct;
typedef struct typedef struct
{ {
uint32_t mode; I2C_PinName scl;
uint16_t slave_address; // only on slave mode I2C_PinName sda;
I2C_MasterConfStruct master;
}I2C_ConfigStruct; }I2C_ConfigStruct;
/** @defgroup I2C_Exported_Functions #define I2C_PORT(X) (((uint32_t)(X) >> 4) & 0xF) // port number (0=A, 1=B, 2=C, 3=D)
* @{ #define I2C_PIN_INDEX(X) (1 << ((uint32_t)(X) & 0xF)) // pin index : flag bit
*/
uint32_t I2C_Init (I2C_TypeDef* I2Cx, I2C_ConfigStruct conf); uint32_t I2C_Init(I2C_ConfigStruct* conf);
void setFrequency (I2C_TypeDef* I2Cx, uint8_t prescale);
void I2C_DeInit (I2C_TypeDef* I2Cx);
ErrorStatus I2C_Start (I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr); void I2C_WriteBitSDA(I2C_ConfigStruct* conf, uint8_t data);
void I2C_Stop (I2C_TypeDef* I2Cx); void I2C_WriteBitSCL(I2C_ConfigStruct* conf, uint8_t data);
void I2C_Reset (I2C_TypeDef* I2Cx); uint8_t I2C_ReadBitSDA(I2C_ConfigStruct* conf);
void I2C_SendData (I2C_TypeDef* I2Cx,uint16_t Data); void I2C_SendACK(I2C_ConfigStruct* conf);
int8_t I2C_SendDataAck (I2C_TypeDef* I2Cx,uint16_t Data); void I2C_SendNACK(I2C_ConfigStruct* conf);
int I2C_ReceiveData (I2C_TypeDef* I2Cx, int last);
int I2C_Burst_Read (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop); uint8_t I2C_WriteByte(I2C_ConfigStruct* conf, uint8_t data);
int I2C_Burst_Write (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop); uint8_t I2C_ReadByte(I2C_ConfigStruct* conf);
void I2C_GenerateSTART (I2C_TypeDef* I2Cx, FunctionalState NewState); void I2C_Start(I2C_ConfigStruct* conf);
void I2C_GenerateSTOP (I2C_TypeDef* I2Cx, FunctionalState NewState); void I2C_Stop(I2C_ConfigStruct* conf);
void I2C_AcknowledgeConfig (I2C_TypeDef* I2Cx, FunctionalState NewState); int I2C_Write(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
void I2C_RESTART (I2C_TypeDef * I2Cx, FunctionalState NewState); int I2C_WriteRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
int I2C_Read(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
int I2C_ReadRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
void I2C_CoreEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
void I2C_InterEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState);
void I2C_ControlRW (I2C_TypeDef* I2Cx,FunctionalState NewState);
void I2C_ControlEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
void I2C_InterRst (I2C_TypeDef* I2Cx,FunctionalState NewState); #endif //__W7500X_I2C_H
void I2C_Prescale (I2C_TypeDef* I2Cx,uint16_t Data);
void I2C_TimeoutSet (I2C_TypeDef* I2Cx,uint16_t Data);
void I2C_SetSlavAddress (I2C_TypeDef* I2Cx,uint16_t Data);
uint8_t I2C_StatusRead (I2C_TypeDef* I2Cx);
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr);
void I2C_MasterInit (I2C_TypeDef * I2Cx,uint8_t Prescale,uint16_t Timeout,I2C_CTR Ctr);
void I2C_SlaveInit (I2C_TypeDef * I2Cx,FunctionalState NewState, uint16_t data);
void I2C_SendSlaveAddress (I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr);
int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr);
uint16_t I2C_ReadRegister (I2C_TypeDef* I2Cx, uint8_t I2C_Register);
void I2C_GPIO(void);
void GPIO_I2C(void );
void WriteByte(uint8_t val);
void digitalWrite(GPIO_TypeDef* GPIOx,uint16_t pin, uint16_t val);
uint16_t digitalRead(GPIO_TypeDef* GPIOx,uint16_t pin);
void i2c_loop_us(int us);
void i2c_loop_ms(int count) ;
/**
* @}
*/

4
libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32600/pwmout_api.c
View File

@ -77,9 +77,9 @@ void pwmout_init(pwmout_t* obj, PinName pin)
} }
// If all instances are in use, overwrite the last // If all instances are in use, overwrite the last
pwm = PinMap_PWM[++i]; pwm = PinMap_PWM[i++];
if(pwm.pin != pin) { if(pwm.pin != pin) {
pwm = PinMap_PWM[--i]; pwm = PinMap_PWM[(i-1)];
i = -1; i = -1;
break; break;
} }

4
libraries/mbed/targets/hal/TARGET_Maxim/TARGET_MAX32610/pwmout_api.c
View File

@ -77,9 +77,9 @@ void pwmout_init(pwmout_t* obj, PinName pin)
} }
// If all instances are in use, overwrite the last // If all instances are in use, overwrite the last
pwm = PinMap_PWM[++i]; pwm = PinMap_PWM[i++];
if(pwm.pin != pin) { if(pwm.pin != pin) {
pwm = PinMap_PWM[--i]; pwm = PinMap_PWM[(i-1)];
i = -1; i = -1;
break; break;
} }

90
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_licence_agreement.txt Normal file
View File

@ -0,0 +1,90 @@
S110/S120/S130 license agreement
NORDIC SEMICONDUCTOR ASA SOFTDEVICE LICENSE AGREEMENT
License Agreement for the Nordic Semiconductor ASA ("Nordic") S110, S120 and S130 Bluetooth SoftDevice software packages ("SoftDevice").
You ("You" "Licensee") must carefully and thoroughly read this License Agreement ("Agreement"), and accept to adhere to this Agreement before
downloading, installing and/or using any software or content in the SoftDevice provided herewith.
YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS
OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SOFTDEVICE, IN THIS CASE YOU AGREE THAT THE USE OF
THE SOFTDEVICE CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS.
IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE
INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SOFTDEVICE.
1. Grant of License
Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license
("License"): (a) to use the SoftDevice solely in connection with a Nordic integrated circuit, and (b) to distribute the SoftDevice solely as integrated
in Licensee Product. Licensee shall not use the SoftDevice for any purpose other than specifically authorized herein. It is a material breach of this
agreement to use or modify the SoftDevice for use on any wireless connectivity integrated circuit other than a Nordic integrated circuit.
2. Title
Nordic retains full rights, title, and ownership to the SoftDevice and any and all patents, copyrights, trade secrets, trade names, trademarks, and
other intellectual property rights in and to the SoftDevice.
3. No Modifications or Reverse Engineering
Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code
parts of the SoftDevice including, but not limited to pre-compiled hex files, binaries and object code.
4. Distribution Restrictions
Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SoftDevice to any third party.
Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SoftDevice as proscribed herein.
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necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making
such employees and subcontractors comply with the obligations concerning use and non-disclosure of the SoftDevice.
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contrary to this Agreement.
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LICENSORS OR AFFILIATES NOR THE COPYRIGHT HOLDERS MAKE ANY REPRESENTATIONS OR WARRANTIES, EXPRESS OR
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5649
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex Normal file
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198
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/PinNames.h Normal file
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@ -0,0 +1,198 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 3
typedef enum {
p0 = 0,
p1 = 1,
p2 = 2,
p3 = 3,
p4 = 4,
p5 = 5,
p6 = 6,
p7 = 7,
p8 = 8,
p9 = 9,
p10 = 10,
p11 = 11,
p12 = 12,
p13 = 13,
p14 = 14,
p15 = 15,
p16 = 16,
p17 = 17,
p18 = 18,
p19 = 19,
p20 = 20,
p21 = 21,
p22 = 22,
p23 = 23,
p24 = 24,
p25 = 25,
p26 = 26,
p27 = 27,
p28 = 28,
p29 = 29,
p30 = 30,
//NORMAL PINS...
P0_0 = p0,
P0_1 = p1,
P0_2 = p2,
P0_3 = p3,
P0_4 = p4,
P0_5 = p5,
P0_6 = p6,
P0_7 = p7,
P0_8 = p8,
P0_9 = p9,
P0_10 = p10,
P0_11 = p11,
P0_12 = p12,
P0_13 = p13,
P0_14 = p14,
P0_15 = p15,
P0_16 = p16,
P0_17 = p17,
P0_18 = p18,
P0_19 = p19,
P0_20 = p20,
P0_21 = p21,
P0_22 = p22,
P0_23 = p23,
P0_24 = p24,
P0_25 = p25,
P0_26 = p26,
P0_27 = p27,
P0_28 = p28,
P0_29 = p29,
P0_30 = p30,
//PADS
PAD3 = p1,
PAD2 = p2,
PAD1 = p3,
//LED MATRIX COLS
COL1 = p4,
COL2 = p5,
COL3 = p6,
COL4 = p7,
COL5 = p8,
COL6 = p9,
COL7 = p10,
COL8 = p11,
COL9 = p12,
//LED MATRIX ROWS
ROW1 = p13,
ROW2 = p14,
ROW3 = p15,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_16
// BUTTON A
BUTTON_A = p17,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_18
//TARGET RESET
TGT_NRESET = p19,
//NORMAL PIN (NO SPECIFIED FUNCTIONALITY)
//PIN_20
//MASTER OUT SLAVE IN
MOSI = p21,
//MASTER IN SLAVE OUT
MISO = p22,
//SERIAL CLOCK
SCK = p23,
// RX AND TX PINS
TGT_TX = p24,
TGT_RX = p25,
//BUTTON B
BUTTON_B = p26,
//ACCEL INTERRUPT PINS (MMA8653FC)
ACCEL_INT2 = p27,
ACCEL_INT1 = p28,
//MAGENETOMETER INTERRUPT PIN (MAG3110)
MAG_INT1 = p29,
// Not connected
NC = (int)0xFFFFFFFF,
RX_PIN_NUMBER = TGT_RX,
TX_PIN_NUMBER = TGT_TX,
CTS_PIN_NUMBER = 31, //unused ** REQUIRES A PROPER FIX **
RTS_PIN_NUMBER = 31, //unused
// mBed interface Pins
USBTX = TX_PIN_NUMBER,
USBRX = RX_PIN_NUMBER,
LED1 = PAD1,
LED2 = PAD2,
LED3 = PAD3,
LED4 = P0_16,
//SDA (SERIAL DATA LINE)
I2C_SDA0 = p30,
//SCL (SERIAL CLOCK LINE)
I2C_SCL0 = p0
} PinName;
typedef enum {
PullNone = 0,
PullDown = 1,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

57
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_NRF51_MICROBIT/device.h Normal file
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@ -0,0 +1,57 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 0
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 0
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 1
#include "objects.h"
#endif

3
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/TARGET_WALLBOT_BLE/PinNames.h
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@ -158,6 +158,9 @@ typedef enum {
I2C_SCL = P0_21, I2C_SCL = P0_21,
I2C_SDA = P0_22, I2C_SDA = P0_22,
I2C_SCL0 = P0_21, //required definition for the i2c patch
I2C_SDA0 = P0_22, //required definition for the i2c patch
// Not connected // Not connected
NC = (int)0xFFFFFFFF NC = (int)0xFFFFFFFF

4
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/i2c_api.c
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@ -17,6 +17,7 @@
#include "i2c_api.h" #include "i2c_api.h"
#include "cmsis.h" #include "cmsis.h"
#include "pinmap.h" #include "pinmap.h"
#include "twi_master.h"
#include "mbed_error.h" #include "mbed_error.h"
// nRF51822's I2C_0 and SPI_0 (I2C_1, SPI_1 and SPIS1) share the same address. // nRF51822's I2C_0 and SPI_0 (I2C_1, SPI_1 and SPIS1) share the same address.
@ -53,7 +54,8 @@ void twi_master_init(i2c_t *obj, PinName sda, PinName scl, int frequency)
void i2c_init(i2c_t *obj, PinName sda, PinName scl) void i2c_init(i2c_t *obj, PinName sda, PinName scl)
{ {
NRF_TWI_Type *i2c; twi_master_init_and_clear();
NRF_TWI_Type *i2c = NULL;
if (i2c0_spi0_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_I2C && if (i2c0_spi0_peripheral.usage == I2C_SPI_PERIPHERAL_FOR_I2C &&
i2c0_spi0_peripheral.sda_mosi == (uint8_t)sda && i2c0_spi0_peripheral.sda_mosi == (uint8_t)sda &&

20
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_config.h Executable file
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@ -0,0 +1,20 @@
/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef TWI_MASTER_CONFIG
#define TWI_MASTER_CONFIG
#include "PinNames.h"
#define TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER (I2C_SCL0)
#define TWI_MASTER_CONFIG_DATA_PIN_NUMBER (I2C_SDA0)
#endif

303
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.c Executable file
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@ -0,0 +1,303 @@
/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "twi_master.h"
#include "twi_config.h"
#include <stdbool.h>
#include <stdint.h>
#include "nrf.h"
#include "nrf_delay.h"
/* Max cycles approximately to wait on RXDREADY and TXDREADY event,
* This is optimized way instead of using timers, this is not power aware. */
#define MAX_TIMEOUT_LOOPS (20000UL) /**< MAX while loops to wait for RXD/TXD event */
static bool twi_master_write(uint8_t * data, uint8_t data_length, bool issue_stop_condition)
{
uint32_t timeout = MAX_TIMEOUT_LOOPS; /* max loops to wait for EVENTS_TXDSENT event*/
if (data_length == 0)
{
/* Return false for requesting data of size 0 */
return false;
}
NRF_TWI1->TXD = *data++;
NRF_TWI1->TASKS_STARTTX = 1;
/** @snippet [TWI HW master write] */
while (true)
{
while (NRF_TWI1->EVENTS_TXDSENT == 0 && NRF_TWI1->EVENTS_ERROR == 0 && (--timeout))
{
// Do nothing.
}
if (timeout == 0 || NRF_TWI1->EVENTS_ERROR != 0)
{
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
NRF_TWI1->EVENTS_ERROR = 0;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
NRF_TWI1->POWER = 0;
nrf_delay_us(5);
NRF_TWI1->POWER = 1;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
(void)twi_master_init_and_clear();
return false;
}
NRF_TWI1->EVENTS_TXDSENT = 0;
if (--data_length == 0)
{
break;
}
NRF_TWI1->TXD = *data++;
}
/** @snippet [TWI HW master write] */
if (issue_stop_condition)
{
NRF_TWI1->EVENTS_STOPPED = 0;
NRF_TWI1->TASKS_STOP = 1;
/* Wait until stop sequence is sent */
while(NRF_TWI1->EVENTS_STOPPED == 0)
{
// Do nothing.
}
}
return true;
}
/** @brief Function for read by twi_master.
*/
static bool twi_master_read(uint8_t * data, uint8_t data_length, bool issue_stop_condition)
{
uint32_t timeout = MAX_TIMEOUT_LOOPS; /* max loops to wait for RXDREADY event*/
if (data_length == 0)
{
/* Return false for requesting data of size 0 */
return false;
}
else if (data_length == 1)
{
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_TWI1->TASKS_STOP;
}
else
{
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_TWI1->TASKS_SUSPEND;
}
NRF_PPI->CHENSET = PPI_CHENSET_CH0_Msk;
NRF_TWI1->EVENTS_RXDREADY = 0;
NRF_TWI1->TASKS_STARTRX = 1;
/** @snippet [TWI HW master read] */
while (true)
{
while (NRF_TWI1->EVENTS_RXDREADY == 0 && NRF_TWI1->EVENTS_ERROR == 0 && (--timeout))
{
// Do nothing.
}
NRF_TWI1->EVENTS_RXDREADY = 0;
if (timeout == 0 || NRF_TWI1->EVENTS_ERROR != 0)
{
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
NRF_TWI1->EVENTS_ERROR = 0;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
NRF_TWI1->POWER = 0;
nrf_delay_us(5);
NRF_TWI1->POWER = 1;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
(void)twi_master_init_and_clear();
return false;
}
*data++ = NRF_TWI1->RXD;
/* Configure PPI to stop TWI master before we get last BB event */
if (--data_length == 1)
{
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_TWI1->TASKS_STOP;
}
if (data_length == 0)
{
break;
}
// Recover the peripheral as indicated by PAN 56: "TWI: TWI module lock-up." found at
// Product Anomaly Notification document found at
// https://www.nordicsemi.com/eng/Products/Bluetooth-R-low-energy/nRF51822/#Downloads
nrf_delay_us(20);
NRF_TWI1->TASKS_RESUME = 1;
}
/** @snippet [TWI HW master read] */
/* Wait until stop sequence is sent */
while(NRF_TWI1->EVENTS_STOPPED == 0)
{
// Do nothing.
}
NRF_TWI1->EVENTS_STOPPED = 0;
NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Msk;
return true;
}
/**
* @brief Function for detecting stuck slaves (SDA = 0 and SCL = 1) and tries to clear the bus.
*
* @return
* @retval false Bus is stuck.
* @retval true Bus is clear.
*/
static bool twi_master_clear_bus(void)
{
uint32_t twi_state;
bool bus_clear;
uint32_t clk_pin_config;
uint32_t data_pin_config;
// Save and disable TWI hardware so software can take control over the pins.
twi_state = NRF_TWI1->ENABLE;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos;
clk_pin_config = \
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER];
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
data_pin_config = \
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER];
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
TWI_SDA_HIGH();
TWI_SCL_HIGH();
TWI_DELAY();
if ((TWI_SDA_READ() == 1) && (TWI_SCL_READ() == 1))
{
bus_clear = true;
}
else
{
uint_fast8_t i;
bus_clear = false;
// Clock max 18 pulses worst case scenario(9 for master to send the rest of command and 9
// for slave to respond) to SCL line and wait for SDA come high.
for (i=18; i--;)
{
TWI_SCL_LOW();
TWI_DELAY();
TWI_SCL_HIGH();
TWI_DELAY();
if (TWI_SDA_READ() == 1)
{
bus_clear = true;
break;
}
}
}
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = clk_pin_config;
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = data_pin_config;
NRF_TWI1->ENABLE = twi_state;
return bus_clear;
}
/** @brief Function for initializing the twi_master.
*/
bool twi_master_init_and_clear(void)
{
/* To secure correct signal levels on the pins used by the TWI
master when the system is in OFF mode, and when the TWI master is
disabled, these pins must be configured in the GPIO peripheral.
*/
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[TWI_MASTER_CONFIG_DATA_PIN_NUMBER] = \
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) \
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos) \
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos) \
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) \
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_TWI1->EVENTS_RXDREADY = 0;
NRF_TWI1->EVENTS_TXDSENT = 0;
NRF_TWI1->PSELSCL = TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER;
NRF_TWI1->PSELSDA = TWI_MASTER_CONFIG_DATA_PIN_NUMBER;
NRF_TWI1->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos;
NRF_PPI->CH[0].EEP = (uint32_t)&NRF_TWI1->EVENTS_BB;
NRF_PPI->CH[0].TEP = (uint32_t)&NRF_TWI1->TASKS_SUSPEND;
NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Msk;
NRF_TWI1->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
return twi_master_clear_bus();
}
/** @brief Function for transfer by twi_master.
*/
bool twi_master_transfer(uint8_t address,
uint8_t * data,
uint8_t data_length,
bool issue_stop_condition)
{
bool transfer_succeeded = false;
if (data_length > 0 && twi_master_clear_bus())
{
NRF_TWI1->ADDRESS = (address >> 1);
if ((address & TWI_READ_BIT))
{
transfer_succeeded = twi_master_read(data, data_length, issue_stop_condition);
}
else
{
transfer_succeeded = twi_master_write(data, data_length, issue_stop_condition);
}
}
return transfer_succeeded;
}
/*lint --flb "Leave library region" */

108
libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_MCU_NRF51822/twi_master.h Normal file
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@ -0,0 +1,108 @@
/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef TWI_MASTER_H
#define TWI_MASTER_H
#ifdef __cplusplus
extern "C" {
#endif
/*lint ++flb "Enter library region" */
#include <stdbool.h>
#include <stdint.h>
/** @file
* @brief Software controlled TWI Master driver.
*
*
* @defgroup lib_driver_twi_master Software controlled TWI Master driver
* @{
* @ingroup nrf_drivers
* @brief Software controlled TWI Master driver.
*
* Supported features:
* - Repeated start
* - No multi-master
* - Only 7-bit addressing
* - Supports clock stretching (with optional SMBus style slave timeout)
* - Tries to handle slaves stuck in the middle of transfer
*/
#define TWI_READ_BIT (0x01) //!< If this bit is set in the address field, transfer direction is from slave to master.
#define TWI_ISSUE_STOP ((bool)true) //!< Parameter for @ref twi_master_transfer
#define TWI_DONT_ISSUE_STOP ((bool)false) //!< Parameter for @ref twi_master_transfer
/* These macros are needed to see if the slave is stuck and we as master send dummy clock cycles to end its wait */
/*lint -e717 -save "Suppress do {} while (0) for these macros" */
/*lint ++flb "Enter library region" */
#define TWI_SCL_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line high */
#define TWI_SCL_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Pulls SCL line low */
#define TWI_SDA_HIGH() do { NRF_GPIO->OUTSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line high */
#define TWI_SDA_LOW() do { NRF_GPIO->OUTCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Pulls SDA line low */
#define TWI_SDA_INPUT() do { NRF_GPIO->DIRCLR = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as input */
#define TWI_SDA_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_DATA_PIN_NUMBER); } while(0) /*!< Configures SDA pin as output */
#define TWI_SCL_OUTPUT() do { NRF_GPIO->DIRSET = (1UL << TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER); } while(0) /*!< Configures SCL pin as output */
/*lint -restore */
#define TWI_SDA_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_DATA_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SDA */
#define TWI_SCL_READ() ((NRF_GPIO->IN >> TWI_MASTER_CONFIG_CLOCK_PIN_NUMBER) & 0x1UL) /*!< Reads current state of SCL */
#define TWI_DELAY() nrf_delay_us(4) /*!< Time to wait when pin states are changed. For fast-mode the delay can be zero and for standard-mode 4 us delay is sufficient. */
/**
* @brief Function for initializing TWI bus IO pins and checks if the bus is operational.
*
* Both pins are configured as Standard-0, No-drive-1 (open drain).
*
* @return
* @retval true TWI bus is clear for transfers.
* @retval false TWI bus is stuck.
*/
bool twi_master_init_and_clear(void);
/**
* @brief Function for transferring data over TWI bus.
*
* If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
* and the function returns false.
* Bit 0 (@ref TWI_READ_BIT) in the address parameter controls transfer direction;
* - If 1, master reads data_length number of bytes from the slave
* - If 0, master writes data_length number of bytes to the slave.
*
* @note Make sure at least data_length number of bytes is allocated in data if TWI_READ_BIT is set.
* @note @ref TWI_ISSUE_STOP
*
* @param address Data transfer direction (LSB) / Slave address (7 MSBs).
* @param data Pointer to data.
* @param data_length Number of bytes to transfer.
* @param issue_stop_condition If @ref TWI_ISSUE_STOP, STOP condition is issued before exiting function. If @ref TWI_DONT_ISSUE_STOP, STOP condition is not issued before exiting function. If transfer failed for any reason, STOP condition will be issued in any case.
* @return
* @retval true Data transfer succeeded without errors.
* @retval false Data transfer failed.
*/
bool twi_master_transfer(uint8_t address, uint8_t *data, uint8_t data_length, bool issue_stop_condition);
/**
*@}
**/
#ifdef __cplusplus
}
#endif
/*lint --flb "Leave library region" */
#endif //TWI_MASTER_H

14
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c
View File

@ -196,8 +196,18 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
default: default:
break; break;
} }
obj->uart->CFG = (data_bits << 2) // First disable the the usart as described in documentation and then enable while updating CFG
// 24.6.1 USART Configuration register
// Remark: If software needs to change configuration values, the following sequence should
// be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
// the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
// Write the new configuration value, with the ENABLE bit set to 1.
obj->uart->CFG &= ~(1 << 0);
obj->uart->CFG = (1 << 0) // this will enable the usart
| (data_bits << 2)
| (paritysel << 4) | (paritysel << 4)
| (stop_bits << 6); | (stop_bits << 6);
} }

12
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/serial_api.c
View File

@ -230,7 +230,17 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
break; break;
} }
obj->uart->CFG = (data_bits << 2) // First disable the the usart as described in documentation and then enable while updating CFG
// 24.6.1 USART Configuration register
// Remark: If software needs to change configuration values, the following sequence should
// be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
// the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
// Write the new configuration value, with the ENABLE bit set to 1.
obj->uart->CFG &= ~(1 << 0);
obj->uart->CFG = (1 << 0) // this will enable the usart
| (data_bits << 2)
| (paritysel << 4) | (paritysel << 4)
| (stop_bits << 6); | (stop_bits << 6);
} }

6
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PeripheralPins.c
View File

@ -63,11 +63,17 @@ const PinMap PinMap_UART_RX[] = {
//*** I2C *** //*** I2C ***
const PinMap PinMap_I2C_SDA[] = { const PinMap PinMap_I2C_SDA[] = {
{PA_10, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, {PA_10, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_5, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PA_6, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{NC, NC, 0} {NC, NC, 0}
}; };
const PinMap PinMap_I2C_SCL[] = { const PinMap PinMap_I2C_SCL[] = {
{PA_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)}, {PA_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_8, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{PC_4, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
{PC_5, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
{NC, NC, 0} {NC, NC, 0}
}; };

4
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/objects.h
View File

@ -81,7 +81,9 @@ struct spi_s {
}; };
struct i2c_s { struct i2c_s {
I2CName i2c; I2CName I2Cx;
PinName sda;
PinName scl;
uint16_t ADDRESS; uint16_t ADDRESS;
uint16_t is_setAddress; uint16_t is_setAddress;
}; };

318
libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/i2c_api.c
View File

@ -47,303 +47,135 @@
#define FLAG_TIMEOUT ((int)0x1000) #define FLAG_TIMEOUT ((int)0x1000)
#define LONG_TIMEOUT ((int)0xFFFF) #define LONG_TIMEOUT ((int)0xFFFF)
I2C_TypeDef * I2cHandle;
int i2c0_inited = 0;
int i2c1_inited = 0;
void i2c_init(i2c_t *obj, PinName sda, PinName scl) void i2c_init(i2c_t *obj, PinName sda, PinName scl)
{ {
// Determine the I2C to use I2C_ConfigStruct conf;
//Determine the I2C to use
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
obj->I2Cx = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl); MBED_ASSERT(obj->I2Cx != (I2CName)NC);
MBED_ASSERT(obj->i2c != (I2CName)NC);
obj->sda = sda;
// Enable I2C1 clock and pinout if not done obj->scl = scl;
if ((obj->i2c == I2C_0) && !i2c0_inited) { obj->ADDRESS = 0x0;
i2c0_inited = 1;
// Configure I2C pins
pinmap_pinout(sda, PinMap_I2C_SDA);
pinmap_pinout(scl, PinMap_I2C_SCL);
pin_mode(sda, PullUp);
pin_mode(scl, PullUp);
}
// Enable I2C2 clock and pinout if not done
if ((obj->i2c == I2C_1) && !i2c1_inited) {
i2c1_inited = 1;
// Configure I2C pins
pinmap_pinout(sda, PinMap_I2C_SDA);
pinmap_pinout(scl, PinMap_I2C_SCL);
pin_mode(sda, PullUp);
pin_mode(scl, PullUp);
}
// Reset to clear pending flags if any
i2c_reset(obj);
// I2C configuration
i2c_frequency(obj, 100000); // 100 kHz per default
obj->is_setAddress = 0; obj->is_setAddress = 0;
conf.sda = (I2C_PinName)obj->sda;
conf.scl = (I2C_PinName)obj->scl;
I2C_Init(&conf);
} }
void i2c_frequency(i2c_t *obj, int hz) void i2c_frequency(i2c_t *obj, int hz)
{ {
//MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
MBED_ASSERT((hz == 100000));
I2cHandle = (I2C_TypeDef *)(obj->i2c);
// wait before init
I2C_ConfigStruct conf;
conf.mode = I2C_Master;
conf.master.timeout = LONG_TIMEOUT;
conf.master.prescale = 0x61; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
// Common settings: I2C clock = 48 MHz, Analog filter = ON, Digital filter coefficient = 0
// switch (hz) {
// case 100000:
// conf.master.prescale = 0x61; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
// break;
// case 400000:
// break;
// case 1000000:
// break;
// default:
// break;
// }
// I2C configuration
I2C_Init(I2cHandle, conf);
} }
inline int i2c_start(i2c_t *obj) inline int i2c_start(i2c_t *obj)
{ {
obj->is_setAddress = 0; I2C_ConfigStruct conf;
conf.sda = (I2C_PinName)obj->sda;
conf.scl = (I2C_PinName)obj->scl;
I2C_Start(&conf);
return 0; return 0;
} }
inline int i2c_stop(i2c_t *obj) inline int i2c_stop(i2c_t *obj)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c); I2C_ConfigStruct conf;
conf.sda = (I2C_PinName)obj->sda;
// Generate the STOP condition conf.scl = (I2C_PinName)obj->scl;
I2C_Stop(I2cHandle);
I2C_Reset(I2cHandle);
obj->is_setAddress = 0; I2C_Stop(&conf);
return 0; return 0;
} }
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c); I2C_ConfigStruct conf;
int count;
int value; conf.sda = (I2C_PinName)obj->sda;
conf.scl = (I2C_PinName)obj->scl;
if(!obj->is_setAddress)
{ if(stop)
if( I2C_Start(I2cHandle, address, I2C_READ_SA7) == ERROR ) {
{ if(I2C_Read(&conf, address, data, length) != 0)
return -1; return -1;
}
obj->is_setAddress = 1;
obj->ADDRESS = address;
} }
else else
{ {
I2C_Restart_Structure(I2cHandle, address, I2C_READ_SA7); if(I2C_ReadRepeated(&conf, address, data, length) != 0)
obj->ADDRESS = address; return -1;
}
// Read all bytes
for (count = 0; count < (length-1); count++) {
if( (value = i2c_byte_read(obj, 0)) == -1) {
return value;
}
data[count] = (char)value;
}
if(stop){
if( (value = i2c_byte_read(obj, 1)) == -1) {
return value;
}
data[count] = (char)value;
i2c_stop(obj);
obj->is_setAddress =1;
count++;
}
else{
if( (value = i2c_byte_read(obj, 0)) == -1) {
return value;
}
data[count] = (char)value;
count++;
} }
return count; return length;
} }
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c); I2C_ConfigStruct conf;
int count =0;
if(!obj->is_setAddress) conf.sda = (I2C_PinName)obj->sda;
{ conf.scl = (I2C_PinName)obj->scl;
if( I2C_Start(I2cHandle, address, I2C_WRITE_SA7) == ERROR )
{
return -1; if(stop)
} {
obj->is_setAddress = 1; if(I2C_Write(&conf, address, data, length) != 0)
obj->ADDRESS = address; return -1;
} }
else else
{ {
I2C_Restart_Structure(I2cHandle, address, I2C_WRITE_SA7); if(I2C_WriteRepeated(&conf, address, data, length) != 0)
obj->ADDRESS = address; return -1;
} }
for (count = 0; count < length; count++) {
i2c_byte_write(obj, data[count]);
wait_us(1);
}
if(length == 0x00) return length;
{
I2C_GPIO();
i2c_byte_write(obj, 0xff);
GPIO_I2C();
}
// If not repeated start, send stop
if (stop) {
i2c_stop(obj);
}
else
{
i2c_reset(obj);
}
return count;
} }
int i2c_byte_read(i2c_t *obj, int last) int i2c_byte_read(i2c_t *obj, int last)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c); uint8_t ret;
I2C_ConfigStruct conf;
return I2C_ReceiveData(I2cHandle, last);
conf.sda = (I2C_PinName)obj->sda;
conf.scl = (I2C_PinName)obj->scl;
ret = I2C_ReadByte(&conf);
if(last)
I2C_SendNACK(&conf);
else
I2C_SendACK(&conf);
return (int)ret;
} }
int i2c_byte_write(i2c_t *obj, int data) int i2c_byte_write(i2c_t *obj, int data)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c); I2C_ConfigStruct conf;
return I2C_SendDataAck(I2cHandle,(uint8_t)data);
conf.sda = (I2C_PinName)obj->sda;
conf.scl = (I2C_PinName)obj->scl;
if(I2C_WriteByte(&conf, (uint8_t)data)) // NACK
return 0;
else //ack
return 1;
} }
void i2c_reset(i2c_t *obj) void i2c_reset(i2c_t *obj)
{ {
I2cHandle = (I2C_TypeDef *)(obj->i2c);
I2C_Reset(I2cHandle);
} }
//#if DEVICE_I2CSLAVE
//
//void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
//{
// I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
// uint16_t tmpreg = 0;
//
// // disable
// i2c->OAR1 &= (uint32_t)(~I2C_OAR1_OA1EN);
// // Get the old register value
// tmpreg = i2c->OAR1;
// // Reset address bits
// tmpreg &= 0xFC00;
// // Set new address
// tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
// // Store the new register value
// i2c->OAR1 = tmpreg;
// // enable
// i2c->OAR1 |= I2C_OAR1_OA1EN;
//}
//
//void i2c_slave_mode(i2c_t *obj, int enable_slave)
//{
// I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
// uint16_t tmpreg;
//
// // Get the old register value
// tmpreg = i2c->OAR1;
//
// // Enable / disable slave
// if (enable_slave == 1) {
// tmpreg |= I2C_OAR1_OA1EN;
// } else {
// tmpreg &= (uint32_t)(~I2C_OAR1_OA1EN);
// }
//
// // Set new mode
// i2c->OAR1 = tmpreg;
//}
//
//// See I2CSlave.h
//#define NoData 0 // the slave has not been addressed
//#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
//#define WriteGeneral 2 // the master is writing to all slave
//#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
//
//int i2c_slave_receive(i2c_t *obj)
//{
// I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
// int retValue = NoData;
//
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY) == 1) {
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_ADDR) == 1) {
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_DIR) == 1)
// retValue = ReadAddressed;
// else
// retValue = WriteAddressed;
//
// __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_ADDR);
// }
// }
//
// return (retValue);
//}
//
//int i2c_slave_read(i2c_t *obj, char *data, int length)
//{
// char size = 0;
//
// while (size < length) data[size++] = (char)i2c_byte_read(obj, 0);
//
// return size;
//}
//
//int i2c_slave_write(i2c_t *obj, const char *data, int length)
//{
// char size = 0;
// I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
//
// do {
// i2c_byte_write(obj, data[size]);
// size++;
// } while (size < length);
//
// return size;
//}
//
//
//#endif // DEVICE_I2CSLAVE
#endif // DEVICE_I2C #endif // DEVICE_I2C

2
workspace_tools/build_release.py
View File

@ -91,6 +91,8 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('RBLAB_BLENANO', ('ARM', 'GCC_ARM')), ('RBLAB_BLENANO', ('ARM', 'GCC_ARM')),
('WALLBOT_BLE', ('ARM', 'GCC_ARM')), ('WALLBOT_BLE', ('ARM', 'GCC_ARM')),
('DELTA_DFCM_NNN40', ('ARM', 'GCC_ARM')), ('DELTA_DFCM_NNN40', ('ARM', 'GCC_ARM')),
('NRF51_MICROBIT', ('ARM',)),
('NRF51_MICROBIT_B', ('ARM',)),
('LPC11U68', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')), ('LPC11U68', ('ARM', 'uARM','GCC_ARM','GCC_CR', 'IAR')),
('OC_MBUINO', ('ARM', 'uARM', 'GCC_ARM', 'IAR')), ('OC_MBUINO', ('ARM', 'uARM', 'GCC_ARM', 'IAR')),

1
workspace_tools/export/uvision4.py
View File

@ -100,6 +100,7 @@ class Uvision4(Exporter):
'NUCLEO_L053R8', 'NUCLEO_L053R8',
'NUCLEO_L073RZ', 'NUCLEO_L073RZ',
'NUCLEO_L152RE', 'NUCLEO_L152RE',
'DISCO_L053C8',
'DISCO_F334C8', 'DISCO_F334C8',
'DISCO_F746NG', 'DISCO_F746NG',
'DISCO_L476VG', 'DISCO_L476VG',

3
workspace_tools/export_test.py
View File

@ -135,6 +135,7 @@ if __name__ == '__main__':
('uvision', 'MTS_MDOT_F405RG'), ('uvision', 'MTS_MDOT_F405RG'),
('uvision', 'MAXWSNENV'), ('uvision', 'MAXWSNENV'),
('uvision', 'MAX32600MBED'), ('uvision', 'MAX32600MBED'),
('uvision', 'DISCO_L053C8'),
('uvision', 'DISCO_F334C8'), ('uvision', 'DISCO_F334C8'),
('uvision', 'DISCO_F746NG'), ('uvision', 'DISCO_F746NG'),
('uvision', 'DISCO_L476VG'), ('uvision', 'DISCO_L476VG'),
@ -171,6 +172,7 @@ if __name__ == '__main__':
('gcc_arm', 'DISCO_F051R8'), ('gcc_arm', 'DISCO_F051R8'),
('gcc_arm', 'DISCO_F407VG'), ('gcc_arm', 'DISCO_F407VG'),
('gcc_arm', 'DISCO_F303VC'), ('gcc_arm', 'DISCO_F303VC'),
('gcc_arm', 'DISCO_L053C8'),
('gcc_arm', 'DISCO_F334C8'), ('gcc_arm', 'DISCO_F334C8'),
('gcc_arm', 'DISCO_L053C8'), ('gcc_arm', 'DISCO_L053C8'),
('gcc_arm', 'DISCO_F746NG'), ('gcc_arm', 'DISCO_F746NG'),
@ -221,6 +223,7 @@ if __name__ == '__main__':
('iar', 'NUCLEO_L053R8'), ('iar', 'NUCLEO_L053R8'),
('iar', 'NUCLEO_L073RZ'), ('iar', 'NUCLEO_L073RZ'),
('iar', 'NUCLEO_L152RE'), ('iar', 'NUCLEO_L152RE'),
('iar', 'DISCO_L053C8'),
('iar', 'DISCO_F334C8'), ('iar', 'DISCO_F334C8'),
('iar', 'DISCO_F746NG'), ('iar', 'DISCO_F746NG'),
('iar', 'DISCO_L476VG'), ('iar', 'DISCO_L476VG'),

138
workspace_tools/targets.py
View File

@ -1026,30 +1026,77 @@ class MCU_NRF51(Target):
binh.tofile(f, format='hex') binh.tofile(f, format='hex')
# 16KB Nordic targets are tight on SRAM using S130 (default) so we
# introduce two possible options:
# 1) Use S130 (default) - for this derive from MCU_NRF51_16K
# 2) Use S110 - for this derive from MCU_NRF51_16K_S110
# Note that the 'default' option will track the default choice
# for other Nordic targets, and so can take advantage of other
# future SoftDevice improvements
# The *_BASE targets should *not* be inherited from, as they do not
# specify enough for building a target
# 16KB MCU version, e.g. Nordic nRF51822, Seeed Arch BLE, etc. # 16KB MCU version, e.g. Nordic nRF51822, Seeed Arch BLE, etc.
class MCU_NRF51_16K(MCU_NRF51): class MCU_NRF51_16K_BASE(MCU_NRF51):
def __init__(self): def __init__(self):
MCU_NRF51.__init__(self) MCU_NRF51.__init__(self)
self.extra_labels += ['MCU_NORDIC_16K', 'MCU_NRF51_16K'] self.extra_labels += ['MCU_NORDIC_16K', 'MCU_NRF51_16K']
self.macros += ['TARGET_MCU_NORDIC_16K', 'TARGET_MCU_NRF51_16K'] self.macros += ['TARGET_MCU_NORDIC_16K', 'TARGET_MCU_NRF51_16K']
# derivative class used to create softdevice+bootloader enabled images # derivative class used to create softdevice+bootloader enabled images
class MCU_NRF51_16K_BOOT(MCU_NRF51_16K): class MCU_NRF51_16K_BOOT_BASE(MCU_NRF51_16K_BASE):
def __init__(self): def __init__(self):
MCU_NRF51_16K.__init__(self) MCU_NRF51_16K_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_BOOT'] self.extra_labels += ['MCU_NRF51_16K_BOOT']
self.macros += ['TARGET_MCU_NRF51_16K_BOOT', 'TARGET_OTA_ENABLED'] self.macros += ['TARGET_MCU_NRF51_16K_BOOT', 'TARGET_OTA_ENABLED']
self.MERGE_SOFT_DEVICE = True self.MERGE_SOFT_DEVICE = True
self.MERGE_BOOTLOADER = True self.MERGE_BOOTLOADER = True
# derivative class used to create program only images for use with FOTA # derivative class used to create program only images for use with FOTA
class MCU_NRF51_16K_OTA(MCU_NRF51_16K): class MCU_NRF51_16K_OTA_BASE(MCU_NRF51_16K_BASE):
def __init__(self): def __init__(self):
MCU_NRF51_16K.__init__(self) MCU_NRF51_16K_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_OTA'] self.extra_labels += ['MCU_NRF51_16K_OTA']
self.macros += ['TARGET_MCU_NRF51_16K_OTA', 'TARGET_OTA_ENABLED'] self.macros += ['TARGET_MCU_NRF51_16K_OTA', 'TARGET_OTA_ENABLED']
self.MERGE_SOFT_DEVICE = False self.MERGE_SOFT_DEVICE = False
class MCU_NRF51_16K(MCU_NRF51_16K_BASE):
def __init__(self):
MCU_NRF51_16K_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S130']
self.macros += ['TARGET_MCU_NRF51_16K_S130']
class MCU_NRF51_16K_S110(MCU_NRF51_16K_BASE):
def __init__(self):
MCU_NRF51_16K_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S110']
self.macros += ['TARGET_MCU_NRF51_16K_S110']
class MCU_NRF51_16K_BOOT(MCU_NRF51_16K_BOOT_BASE):
def __init__(self):
MCU_NRF51_16K_BOOT_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S130']
self.macros += ['TARGET_MCU_NRF51_16K_S130']
class MCU_NRF51_16K_BOOT_S110(MCU_NRF51_16K_BOOT_BASE):
def __init__(self):
MCU_NRF51_16K_BOOT_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S110']
self.macros += ['TARGET_MCU_NRF51_16K_S110']
class MCU_NRF51_16K_OTA(MCU_NRF51_16K_OTA_BASE):
def __init__(self):
MCU_NRF51_16K_OTA_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S130']
self.macros += ['TARGET_MCU_NRF51_16K_S130']
class MCU_NRF51_16K_OTA_S110(MCU_NRF51_16K_OTA_BASE):
def __init__(self):
MCU_NRF51_16K_OTA_BASE.__init__(self)
self.extra_labels += ['MCU_NRF51_16K_S110']
self.macros += ['TARGET_MCU_NRF51_16K_S110']
# 32KB MCU version, e.g. Nordic nRF51-DK, nRF51-Dongle, etc. # 32KB MCU version, e.g. Nordic nRF51-DK, nRF51-Dongle, etc.
class MCU_NRF51_32K(MCU_NRF51): class MCU_NRF51_32K(MCU_NRF51):
@ -1134,18 +1181,19 @@ class SEEED_TINY_BLE_OTA(MCU_NRF51_16K_OTA):
class HRM1017(MCU_NRF51_16K): class HRM1017(MCU_NRF51_16K):
def __init__(self): def __init__(self):
MCU_NRF51_16K.__init__(self) MCU_NRF51_16K.__init__(self)
self.macros += ['TARGET_NRF_LFCLK_RC']
class HRM1017_BOOT(MCU_NRF51_16K_BOOT): class HRM1017_BOOT(MCU_NRF51_16K_BOOT):
def __init__(self): def __init__(self):
MCU_NRF51_16K_BOOT.__init__(self) MCU_NRF51_16K_BOOT.__init__(self)
self.extra_labels += ['HRM1017'] self.extra_labels += ['HRM1017']
self.macros += ['TARGET_HRM1017'] self.macros += ['TARGET_HRM1017', 'TARGET_NRF_LFCLK_RC']
class HRM1017_OTA(MCU_NRF51_16K_OTA): class HRM1017_OTA(MCU_NRF51_16K_OTA):
def __init__(self): def __init__(self):
MCU_NRF51_16K_OTA.__init__(self) MCU_NRF51_16K_OTA.__init__(self)
self.extra_labels += ['HRM1017'] self.extra_labels += ['HRM1017']
self.macros += ['TARGET_HRM1017'] self.macros += ['TARGET_HRM1017', 'TARGET_NRF_LFCLK_RC']
class RBLAB_NRF51822(MCU_NRF51_16K): class RBLAB_NRF51822(MCU_NRF51_16K):
def __init__(self): def __init__(self):
@ -1202,21 +1250,31 @@ class WALLBOT_BLE_OTA(MCU_NRF51_16K_OTA):
self.extra_labels += ['WALLBOT_BLE'] self.extra_labels += ['WALLBOT_BLE']
self.macros += ['TARGET_WALLBOT_BLE'] self.macros += ['TARGET_WALLBOT_BLE']
class DELTA_DFCM_NNN40(MCU_NRF51_16K): class DELTA_DFCM_NNN40(MCU_NRF51_32K):
def __init__(self): def __init__(self):
MCU_NRF51_16K.__init__(self) MCU_NRF51_32K.__init__(self)
self.supported_toolchains = ["ARM", "GCC_ARM"]
self.macros += ['TARGET_NRF_LFCLK_RC']
def program_cycle_s(self):
return 10
class DELTA_DFCM_NNN40_BOOT(MCU_NRF51_16K_BOOT): class DELTA_DFCM_NNN40_BOOT(MCU_NRF51_32K_BOOT):
def __init__(self): def __init__(self):
MCU_NRF51_16K_BOOT.__init__(self) MCU_NRF51_32K_BOOT.__init__(self)
self.supported_toolchains = ["ARM", "GCC_ARM"]
self.extra_labels += ['DELTA_DFCM_NNN40'] self.extra_labels += ['DELTA_DFCM_NNN40']
self.macros += ['TARGET_DELTA_DFCM_NNN40'] self.macros += ['TARGET_DELTA_DFCM_NNN40', 'TARGET_NRF_LFCLK_RC']
def program_cycle_s(self):
return 10
class DELTA_DFCM_NNN40_OTA(MCU_NRF51_16K_OTA): class DELTA_DFCM_NNN40_OTA(MCU_NRF51_32K_OTA):
def __init__(self): def __init__(self):
MCU_NRF51_16K_OTA.__init__(self) MCU_NRF51_32K_OTA.__init__(self)
self.supported_toolchains = ["ARM", "GCC_ARM"]
self.extra_labels += ['DELTA_DFCM_NNN40'] self.extra_labels += ['DELTA_DFCM_NNN40']
self.macros += ['TARGET_DELTA_DFCM_NNN40'] self.macros += ['TARGET_DELTA_DFCM_NNN40', 'TARGET_NRF_LFCLK_RC']
def program_cycle_s(self):
return 10
class NRF51_DK(MCU_NRF51_32K): class NRF51_DK(MCU_NRF51_32K):
def __init__(self): def __init__(self):
@ -1256,6 +1314,53 @@ class NRF51_DONGLE_OTA(MCU_NRF51_32K_OTA):
self.extra_labels = ['NRF51_DONGLE'] self.extra_labels = ['NRF51_DONGLE']
self.macros += ['TARGET_NRF51_DONGLE'] self.macros += ['TARGET_NRF51_DONGLE']
class NRF51_MICROBIT(MCU_NRF51_16K_S110):
def __init__(self):
MCU_NRF51_16K_S110.__init__(self)
self.EXPECTED_SOFTDEVICES_WITH_OFFSETS = [
{
'name' : 's110_nrf51822_8.0.0_softdevice.hex',
'boot' : 's110_nrf51822_8.0.0_bootloader.hex',
'offset' : 0x18000
},
{
'name' : 's110_nrf51822_7.1.0_softdevice.hex',
'boot' : 's110_nrf51822_7.1.0_bootloader.hex',
'offset' : 0x16000
}
]
self.macros += ['TARGET_NRF_LFCLK_RC']
class NRF51_MICROBIT_BOOT(MCU_NRF51_16K_BOOT_S110):
def __init__(self):
MCU_NRF51_16K_BOOT_S110.__init__(self)
self.extra_labels += ['NRF51_MICROBIT']
self.macros += ['TARGET_NRF51_MICROBIT', 'TARGET_NRF_LFCLK_RC']
class NRF51_MICROBIT_OTA(MCU_NRF51_16K_OTA_S110):
def __init__(self):
MCU_NRF51_16K_OTA_S110.__init__(self)
self.extra_labels += ['NRF51_MICROBIT']
self.macros += ['TARGET_NRF51_MICROBIT', 'TARGET_NRF_LFCLK_RC']
class NRF51_MICROBIT_B(MCU_NRF51_16K):
def __init__(self):
MCU_NRF51_16K.__init__(self)
self.extra_labels += ['NRF51_MICROBIT']
self.macros += ['TARGET_NRF51_MICROBIT', 'TARGET_NRF_LFCLK_RC']
class NRF51_MICROBIT_B_BOOT(MCU_NRF51_16K_BOOT):
def __init__(self):
MCU_NRF51_16K_BOOT.__init__(self)
self.extra_labels += ['NRF51_MICROBIT']
self.macros += ['TARGET_NRF51_MICROBIT', 'TARGET_NRF_LFCLK_RC']
class NRF51_MICROBIT_B_OTA(MCU_NRF51_16K_OTA):
def __init__(self):
MCU_NRF51_16K_OTA.__init__(self)
self.extra_labels += ['NRF51_MICROBIT']
self.macros += ['TARGET_NRF51_MICROBIT', 'TARGET_NRF_LFCLK_RC']
### ARM ### ### ARM ###
@ -1557,6 +1662,9 @@ TARGETS = [
NRF51_DONGLE(), # nRF51_32K NRF51_DONGLE(), # nRF51_32K
NRF51_DONGLE_BOOT(), # nRF51_32K NRF51_DONGLE_BOOT(), # nRF51_32K
NRF51_DONGLE_OTA(), # nRF51_32K NRF51_DONGLE_OTA(), # nRF51_32K
NRF51_MICROBIT(), # nRF51_16K - S110
NRF51_MICROBIT_B(), # nRF51_16K - default
### ARM ### ### ARM ###
ARM_MPS2_M0(), ARM_MPS2_M0(),

2
workspace_tools/toolchains/__init__.py
View File

@ -287,7 +287,7 @@ class mbedToolchain:
if hasattr(self.target, 'supported_form_factors'): if hasattr(self.target, 'supported_form_factors'):
self.symbols.extend(["TARGET_FF_%s" % t for t in self.target.supported_form_factors]) self.symbols.extend(["TARGET_FF_%s" % t for t in self.target.supported_form_factors])
return self.symbols return list(set(self.symbols)) # Return only unique symbols
def get_labels(self): def get_labels(self):
if self.labels is None: if self.labels is None: