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+ description of the NRF52840_DK target 

+ mbed RTx setings for nRF52840

fix build of test for NRF52840
+ few sdk's missing filess
- few sdk's unvanted files
corect mbed HAL implementation to changes made in sdk v13
pull/3841/head
Andrzej Puzdrowski 2016-12-19 11:31:15 +01:00
parent 9bf209ef00
commit a175e2ce31
61 changed files with 11404 additions and 4027 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h
View File

@ -354,7 +354,8 @@ __attribute__((used)) void _mutex_release (OS_ID *mutex) {
/* Main Thread definition */
extern void pre_main (void);
#if defined(TARGET_MCU_NRF51822) || defined(TARGET_MCU_NRF52832) || defined (TARGET_STM32F334R8) ||\
#if defined(TARGET_MCU_NRF52832) ||\
defined(TARGET_MCU_NRF51822) || defined(TARGET_MCU_NRF52832) || defined (TARGET_STM32F334R8) ||\
defined(TARGET_STM32F070RB) || defined(TARGET_STM32F072RB) || \
defined(TARGET_STM32F302R8) || defined(TARGET_STM32F303K8) || defined (TARGET_STM32F334C8) ||\
defined(TARGET_STM32F103RB)

4
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52832.ld → targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/TOOLCHAIN_GCC_ARM/NRF52840.ld
View File

@ -18,8 +18,8 @@
MEMORY
{
FLASH (rx) : ORIGIN = 0x1C000, LENGTH = 0x64000
RAM (rwx) : ORIGIN = 0x20002ef8, LENGTH = 0xd108
FLASH (rx) : ORIGIN = 0x21000, LENGTH = 0xDF000
RAM (rwx) : ORIGIN = 0x20002ef8, LENGTH = 0x3d108
}

2
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/cmsis_nvic.h
View File

@ -35,7 +35,7 @@
#define NVIC_NUM_VECTORS (16 + 38) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#include "nrf52.h"
#include "nrf.h"
#include "cmsis.h"

321
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/system_nrf52.c
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@ -1,321 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf52.h"
#include "nrf5x_lf_clk_helper.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK_64M (64000000UL)
static bool errata_16(void);
static bool errata_31(void);
static bool errata_32(void);
static bool errata_36(void);
static bool errata_37(void);
static bool errata_57(void);
static bool errata_66(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK_64M;
}
void SystemInit(void)
{
/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_16()){
*(volatile uint32_t *)0x4007C074 = 3131961357ul;
}
/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_31()){
*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
}
/* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_32()){
CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
}
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
NRF_CLOCK->CTIV = 0;
}
/* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_37()){
*(volatile uint32_t *)0x400005A0 = 0x3;
}
/* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_57()){
*(volatile uint32_t *)0x40005610 = 0x00000005;
*(volatile uint32_t *)0x40005688 = 0x00000001;
*(volatile uint32_t *)0x40005618 = 0x00000000;
*(volatile uint32_t *)0x40005614 = 0x0000003F;
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
}
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
* operations are not used in your code. */
#if (__FPU_USED == 1)
SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();
#endif
/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
normal GPIOs. */
#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[0] = 21;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[1] = 21;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
Specification to see which one). */
#if defined (ENABLE_SWO)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
Specification to see which ones). */
#if defined (ENABLE_TRACE)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
SystemCoreClockUpdate();
// Start the LF oscilator according to the mbed configuration (over the nrf5x_lf_clk_helper.h file)
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_TO_USE << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->TASKS_LFCLKSTART = 1;
// Wait for the external oscillator to start up.
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
// Do nothing.
}
}
static bool errata_16(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_31(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
static bool errata_32(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_36(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
static bool errata_37(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_57(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_66(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
/*lint --flb "Leave library region" */

78
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/system_nrf52.h
View File

@ -1,78 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF52_H
#define SYSTEM_NRF52_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF52_H */

209
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/system_nrf52840.c Normal file
View File

@ -0,0 +1,209 @@
/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf52840.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK_64M (64000000UL)
static bool errata_36(void);
static bool errata_98(void);
static bool errata_103(void);
static bool errata_115(void);
static bool errata_120(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK_64M;
}
void SystemInit(void)
{
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
NRF_CLOCK->CTIV = 0;
}
/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_98()){
*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
}
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_103()){
NRF_CCM->MAXPACKETSIZE = 0xFBul;
}
/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_115()){
*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
}
/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_120()){
*(volatile uint32_t *)0x40029640ul = 0x200ul;
}
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
* operations are not used in your code. */
#if (__FPU_USED == 1)
SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();
#endif
/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
normal GPIOs. */
#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[0] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[1] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
Specification to see which one). */
#if defined (ENABLE_SWO)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
Specification to see which ones). */
#if defined (ENABLE_TRACE)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
SystemCoreClockUpdate();
}
static bool errata_36(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_98(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_103(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_115(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
static bool errata_120(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
return true;
}
return false;
}
/*lint --flb "Leave library region" */

69
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/device/system_nrf52840.h Normal file
View File

@ -0,0 +1,69 @@
/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF52840_H
#define SYSTEM_NRF52840_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF52840_H */

2
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/pwmout_api.c
View File

@ -369,7 +369,7 @@ static void internal_pwmout_exe(pwmout_t *obj, bool new_period, bool initializat
NRF_DRV_PWM_PIN_NOT_USED, // channel 2
NRF_DRV_PWM_PIN_NOT_USED, // channel 3
},
.irq_priority = PWM0_CONFIG_IRQ_PRIORITY,
.irq_priority = PWM_DEFAULT_CONFIG_IRQ_PRIORITY,
.base_clock = pulsewidth_set.pwm_clk,
.count_mode = NRF_PWM_MODE_UP,
.top_value = pulsewidth_set.period_hwu,

495
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/sdk/nrf_drv_config.h
View File

@ -1,495 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_DRV_CONFIG_H
#define NRF_DRV_CONFIG_H
/**
* Provide a non-zero value here in applications that need to use several
* peripherals with the same ID that are sharing certain resources
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
* simultaneously. Therefore, this definition allows to initialize the driver
* for another peripheral from a given group only after the previously used one
* is uninitialized. Normally, this is not possible, because interrupt handlers
* are implemented in individual drivers.
* This functionality requires a more complicated interrupt handling and driver
* initialization, hence it is not always desirable to use it.
*/
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 1
/* CLOCK */
#define CLOCK_ENABLED 1
#if (CLOCK_ENABLED == 1)
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
/* GPIOTE */
#define GPIOTE_ENABLED 1
#if (GPIOTE_ENABLED == 1)
#define GPIOTE_CONFIG_USE_SWI_EGU false
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 8
#endif
/* TIMER */
#ifdef SOFTDEVICE_PRESENT
#define TIMER0_ENABLED 0
#else
#define TIMER0_ENABLED 1
#endif
#if (TIMER0_ENABLED == 1)
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TIMER0_INSTANCE_INDEX 0
#endif
#define TIMER1_ENABLED 1
#if (TIMER1_ENABLED == 1)
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
#endif
#define TIMER2_ENABLED 1
#if (TIMER2_ENABLED == 1)
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER3_ENABLED 0
#if (TIMER3_ENABLED == 1)
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER4_ENABLED 0
#if (TIMER4_ENABLED == 1)
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
/* RTC */
#define RTC0_ENABLED 0
#if (RTC0_ENABLED == 1)
#define RTC0_CONFIG_FREQUENCY 32678
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define RTC0_CONFIG_RELIABLE false
#define RTC0_INSTANCE_INDEX 0
#endif
#define RTC1_ENABLED 0
#if (RTC1_ENABLED == 1)
#define RTC1_CONFIG_FREQUENCY 32768
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define RTC1_CONFIG_RELIABLE false
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
#endif
#define RTC2_ENABLED 0
#if (RTC2_ENABLED == 1)
#define RTC2_CONFIG_FREQUENCY 32768
#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define RTC2_CONFIG_RELIABLE false
#define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED)
#endif
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
#define NRF_MAXIMUM_LATENCY_US 2000
/* RNG */
#define RNG_ENABLED 0
#if (RNG_ENABLED == 1)
#define RNG_CONFIG_ERROR_CORRECTION true
#define RNG_CONFIG_POOL_SIZE 8
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
/* PWM */
#define PWM0_ENABLED 1
#if (PWM0_ENABLED == 1)
#define PWM0_CONFIG_OUT0_PIN 2
#define PWM0_CONFIG_OUT1_PIN 3
#define PWM0_CONFIG_OUT2_PIN 4
#define PWM0_CONFIG_OUT3_PIN 5
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM0_CONFIG_TOP_VALUE 1000
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM0_INSTANCE_INDEX 0
#endif
#define PWM1_ENABLED 1
#if (PWM1_ENABLED == 1)
#define PWM1_CONFIG_OUT0_PIN 2
#define PWM1_CONFIG_OUT1_PIN 3
#define PWM1_CONFIG_OUT2_PIN 4
#define PWM1_CONFIG_OUT3_PIN 5
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM1_CONFIG_TOP_VALUE 1000
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
#endif
#define PWM2_ENABLED 1
#if (PWM2_ENABLED == 1)
#define PWM2_CONFIG_OUT0_PIN 2
#define PWM2_CONFIG_OUT1_PIN 3
#define PWM2_CONFIG_OUT2_PIN 4
#define PWM2_CONFIG_OUT3_PIN 5
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM2_CONFIG_TOP_VALUE 1000
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
#endif
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
/* SPI */
#define SPI0_ENABLED 1
#if (SPI0_ENABLED == 1)
#define SPI0_USE_EASY_DMA 0
#define SPI0_CONFIG_SCK_PIN 2
#define SPI0_CONFIG_MOSI_PIN 3
#define SPI0_CONFIG_MISO_PIN 4
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPI0_INSTANCE_INDEX 0
#endif
#define SPI1_ENABLED 1
#if (SPI1_ENABLED == 1)
#define SPI1_USE_EASY_DMA 0
#define SPI1_CONFIG_SCK_PIN 2
#define SPI1_CONFIG_MOSI_PIN 3
#define SPI1_CONFIG_MISO_PIN 4
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
#endif
#define SPI2_ENABLED 1
#if (SPI2_ENABLED == 1)
#define SPI2_USE_EASY_DMA 0
#define SPI2_CONFIG_SCK_PIN 2
#define SPI2_CONFIG_MOSI_PIN 3
#define SPI2_CONFIG_MISO_PIN 4
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
#endif
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
/* SPIS */
#define SPIS0_ENABLED 1
#if (SPIS0_ENABLED == 1)
#define SPIS0_CONFIG_SCK_PIN 2
#define SPIS0_CONFIG_MOSI_PIN 3
#define SPIS0_CONFIG_MISO_PIN 4
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPIS0_INSTANCE_INDEX 0
#endif
#define SPIS1_ENABLED 1
#if (SPIS1_ENABLED == 1)
#define SPIS1_CONFIG_SCK_PIN 2
#define SPIS1_CONFIG_MOSI_PIN 3
#define SPIS1_CONFIG_MISO_PIN 4
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
#endif
#define SPIS2_ENABLED 1
#if (SPIS2_ENABLED == 1)
#define SPIS2_CONFIG_SCK_PIN 2
#define SPIS2_CONFIG_MOSI_PIN 3
#define SPIS2_CONFIG_MISO_PIN 4
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
#endif
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
/* UART */
#define UART0_ENABLED 1
#if (UART0_ENABLED == 1)
#define UART0_CONFIG_HWFC NRF_UART_HWFC_ENABLED
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_9600
#define UART0_CONFIG_PSEL_TXD 6
#define UART0_CONFIG_PSEL_RXD 8
#define UART0_CONFIG_PSEL_CTS 7
#define UART0_CONFIG_PSEL_RTS 5
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#ifdef NRF52
#define UART0_CONFIG_USE_EASY_DMA false
//Compile time flag
#define UART_EASY_DMA_SUPPORT 1
#define UART_LEGACY_SUPPORT 1
#endif //NRF52
#endif
#define TWI0_ENABLED 1
#if (TWI0_ENABLED == 1)
#define TWI0_USE_EASY_DMA 0
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI0_CONFIG_SCL 0
#define TWI0_CONFIG_SDA 1
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TWI0_INSTANCE_INDEX 0
#endif
#define TWI1_ENABLED 1
#if (TWI1_ENABLED == 1)
#define TWI1_USE_EASY_DMA 0
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI1_CONFIG_SCL 0
#define TWI1_CONFIG_SDA 1
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
#endif
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
/* TWIS */
#define TWIS0_ENABLED 0
#if (TWIS0_ENABLED == 1)
#define TWIS0_CONFIG_ADDR0 0
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS0_CONFIG_SCL 0
#define TWIS0_CONFIG_SDA 1
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TWIS0_INSTANCE_INDEX 0
#endif
#define TWIS1_ENABLED 0
#if (TWIS1_ENABLED == 1)
#define TWIS1_CONFIG_ADDR0 0
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS1_CONFIG_SCL 0
#define TWIS1_CONFIG_SDA 1
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
#endif
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_NO_SYNC_MODE 0
/* QDEC */
#define QDEC_ENABLED 0
#if (QDEC_ENABLED == 1)
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
#define QDEC_CONFIG_PIO_A 1
#define QDEC_CONFIG_PIO_B 2
#define QDEC_CONFIG_PIO_LED 3
#define QDEC_CONFIG_LEDPRE 511
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define QDEC_CONFIG_DBFEN false
#define QDEC_CONFIG_SAMPLE_INTEN false
#endif
/* ADC */
#define ADC_ENABLED 0
#if (ADC_ENABLED == 1)
#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
/* SAADC */
#define SAADC_ENABLED 1
#if (SAADC_ENABLED == 1)
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
/* PDM */
#define PDM_ENABLED 0
#if (PDM_ENABLED == 1)
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
/* COMP */
#define COMP_ENABLED 0
#if (COMP_ENABLED == 1)
#define COMP_CONFIG_REF NRF_COMP_REF_Int1V8
#define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE
#define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High
#define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst
#define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off
#define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define COMP_CONFIG_INPUT NRF_COMP_INPUT_0
#endif
/* LPCOMP */
#define LPCOMP_ENABLED 0
#if (LPCOMP_ENABLED == 1)
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
#endif
/* WDT */
#define WDT_ENABLED 0
#if (WDT_ENABLED == 1)
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
#define WDT_CONFIG_RELOAD_VALUE 2000
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#endif
/* SWI EGU */
#ifdef NRF52
#define EGU_ENABLED 0
#endif
/* I2S */
#define I2S_ENABLED 0
#if (I2S_ENABLED == 1)
#define I2S_CONFIG_SCK_PIN 22
#define I2S_CONFIG_LRCK_PIN 23
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
#define I2S_CONFIG_SDOUT_PIN 24
#define I2S_CONFIG_SDIN_PIN 25
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
#endif
#include "nrf_drv_config_validation.h"
#endif // NRF_DRV_CONFIG_H

3494
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/TARGET_MCU_NRF52840/sdk/sdk_config.h Normal file
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2
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/i2c_api.c
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@ -146,7 +146,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
.frequency = NRF_TWI_FREQ_100K,
#ifdef NRF51
.interrupt_priority = APP_IRQ_PRIORITY_LOW
#elif defined(NRF52)
#elif defined(NRF52) || defined(NRF52840_XXAA)
.interrupt_priority = APP_IRQ_PRIORITY_LOWEST
#endif

119
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/ble/ble_dtm/ble_dtm_hw_nrf51.c
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@ -1,119 +0,0 @@
/*
* Copyright (c) 2016 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "ble_dtm_hw.h"
#include "ble_dtm.h"
#include <stdbool.h>
#include <string.h>
#include "nrf.h"
void dtm_turn_off_test()
{
NRF_RADIO->TEST = 0;
}
void dtm_constant_carrier()
{
NRF_RADIO->TEST = (RADIO_TEST_PLL_LOCK_Enabled << RADIO_TEST_PLL_LOCK_Pos) |
(RADIO_TEST_CONST_CARRIER_Enabled << RADIO_TEST_CONST_CARRIER_Pos);
}
uint32_t dtm_radio_validate(int32_t m_tx_power, uint8_t m_radio_mode)
{
// Handle BLE Radio tuning parameters from production for DTM if required.
// Only needed for DTM without SoftDevice, as the SoftDevice normally handles this.
// PCN-083.
if ( ((NRF_FICR->OVERRIDEEN) & FICR_OVERRIDEEN_BLE_1MBIT_Msk) == FICR_OVERRIDEEN_BLE_1MBIT_Override)
{
NRF_RADIO->OVERRIDE0 = NRF_FICR->BLE_1MBIT[0];
NRF_RADIO->OVERRIDE1 = NRF_FICR->BLE_1MBIT[1];
NRF_RADIO->OVERRIDE2 = NRF_FICR->BLE_1MBIT[2];
NRF_RADIO->OVERRIDE3 = NRF_FICR->BLE_1MBIT[3];
NRF_RADIO->OVERRIDE4 = NRF_FICR->BLE_1MBIT[4];
}
// Initializing code below is quite generic - for BLE, the values are fixed, and expressions
// are constant. Non-constant values are essentially set in radio_prepare().
if (!(m_tx_power == RADIO_TXPOWER_TXPOWER_0dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Pos4dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg30dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg20dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg16dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg12dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg8dBm ||
m_tx_power == RADIO_TXPOWER_TXPOWER_Neg4dBm
) ||
(m_radio_mode > RADIO_MODE_MODE_Ble_1Mbit) // Values 0 - 2: Proprietary mode, 3 (last valid): BLE
)
{
return DTM_ERROR_ILLEGAL_CONFIGURATION;
}
return DTM_SUCCESS;
}
bool dtm_hw_set_timer(NRF_TIMER_Type ** mp_timer, IRQn_Type * m_timer_irq, uint32_t new_timer)
{
if (new_timer == 0)
{
*mp_timer = NRF_TIMER0;
*m_timer_irq = TIMER0_IRQn;
}
else if (new_timer == 1)
{
*mp_timer = NRF_TIMER1;
*m_timer_irq = TIMER1_IRQn;
}
else if (new_timer == 2)
{
*mp_timer = NRF_TIMER2;
*m_timer_irq = TIMER2_IRQn;
}
else
{
// Parameter error: Only TIMER 0, 1, 2 provided by nRF51
return false;
}
// New timer has been selected:
return true;
}

414
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/ble/ble_services/ble_dfu/ble_dfu.c
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@ -1,414 +0,0 @@
/*
* Copyright (c) 2012 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/* Attention!
* To maintain compliance with Nordic Semiconductor ASA’s Bluetooth profile
* qualification listings, this section of source code must not be modified.
*/
#include "ble_dfu.h"
#include "nrf_log.h"
#include <string.h>
#include "ble_hci.h"
#include "sdk_macros.h"
#include "ble_srv_common.h"
#include "nrf_dfu_settings.h"
#define MAX_CTRL_POINT_RESP_PARAM_LEN 3
ble_dfu_t * p_m_dfu;
void flash_callback(fs_evt_t const * const evt, fs_ret_t result)
{
if (result == FS_SUCCESS)
{
NRF_LOG_INFO("Obtained settings, enter dfu is %d\n", s_dfu_settings.enter_buttonless_dfu);
(void)sd_ble_gap_disconnect(p_m_dfu->conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
p_m_dfu->is_waiting_for_disconnection = true;
}
}
static void enter_bootloader(ble_dfu_t * p_dfu)
{
if (p_dfu->evt_handler != NULL)
{
ble_dfu_evt_t evt;
evt.type = BLE_DFU_EVT_ENTERING_BOOTLOADER;
p_dfu->evt_handler(p_dfu, &evt);
}
s_dfu_settings.enter_buttonless_dfu = true;
(void)nrf_dfu_settings_write(flash_callback);
/*
TODO:
- Save bond data
*/
}
/**@brief Function for adding RX characteristic.
*
* @param[in] p_nus Nordic UART Service structure.
* @param[in] p_nus_init Information needed to initialize the service.
*
* @return NRF_SUCCESS on success, otherwise an error code.
*/
static uint32_t rx_char_add(ble_dfu_t * p_dfu, const ble_dfu_init_t * p_dfu_init)
{
/**@snippet [Adding proprietary characteristic to S110 SoftDevice] */
ble_gatts_char_md_t char_md;
ble_gatts_attr_md_t cccd_md;
ble_gatts_attr_t attr_char_value;
ble_uuid_t ble_uuid;
ble_gatts_attr_md_t attr_md;
memset(&cccd_md, 0, sizeof(cccd_md));
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm);
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.write_perm);
cccd_md.vloc = BLE_GATTS_VLOC_STACK;
memset(&char_md, 0, sizeof(char_md));
char_md.char_props.notify = 1;
char_md.char_props.write = 1;
char_md.p_char_user_desc = NULL;
char_md.p_char_pf = NULL;
char_md.p_user_desc_md = NULL;
char_md.p_cccd_md = &cccd_md;
char_md.p_sccd_md = NULL;
ble_uuid.type = p_dfu->uuid_type;
ble_uuid.uuid = 0x0001;
memset(&attr_md, 0, sizeof(attr_md));
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.read_perm);
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&attr_md.write_perm);
attr_md.vloc = BLE_GATTS_VLOC_STACK;
attr_md.rd_auth = 0;
attr_md.wr_auth = 1;
attr_md.vlen = 1;
memset(&attr_char_value, 0, sizeof(attr_char_value));
attr_char_value.p_uuid = &ble_uuid;
attr_char_value.p_attr_md = &attr_md;
attr_char_value.init_len = 0;
attr_char_value.init_offs = 0;
attr_char_value.max_len = BLE_L2CAP_MTU_DEF;
return sd_ble_gatts_characteristic_add(p_dfu->service_handle,
&char_md,
&attr_char_value,
&p_dfu->control_point_char);
/**@snippet [Adding proprietary characteristic to S110 SoftDevice] */
}
uint32_t ble_dfu_init(ble_dfu_t * p_dfu, const ble_dfu_init_t * p_dfu_init)
{
uint32_t err_code;
ble_uuid_t ble_uuid;
ble_uuid128_t nus_base_uuid = BLE_DFU_BASE_UUID;
VERIFY_PARAM_NOT_NULL(p_dfu);
VERIFY_PARAM_NOT_NULL(p_dfu_init);
p_m_dfu = p_dfu; // TODO: find a nicer solution to this
// Initialize the service structure.
p_dfu->conn_handle = BLE_CONN_HANDLE_INVALID;
p_dfu->evt_handler = p_dfu_init->evt_handler;
p_dfu->is_waiting_for_disconnection = false;
p_dfu->is_ctrlpt_notification_enabled = false;
/**@snippet [Adding proprietary Service to S110 SoftDevice] */
// Add a custom base UUID.
err_code = sd_ble_uuid_vs_add(&nus_base_uuid, &p_dfu->uuid_type);
VERIFY_SUCCESS(err_code);
ble_uuid.type = p_dfu->uuid_type;
ble_uuid.uuid = BLE_UUID_DFU_SERVICE;
// Add the service.
err_code = sd_ble_gatts_service_add(BLE_GATTS_SRVC_TYPE_PRIMARY,
&ble_uuid,
&p_dfu->service_handle);
/**@snippet [Adding proprietary Service to S110 SoftDevice] */
VERIFY_SUCCESS(err_code);
// Add the RX Characteristic.
err_code = rx_char_add(p_dfu, p_dfu_init);
VERIFY_SUCCESS(err_code);
err_code = nrf_dfu_flash_init(true);
VERIFY_SUCCESS(err_code);
nrf_dfu_settings_init();
return NRF_SUCCESS;
}
static void resp_send(ble_dfu_t * p_dfu, ble_dfu_buttonless_op_code_t op_code, ble_dfu_rsp_code_t rsp_code)
{
// Send notification
uint16_t hvx_len;
uint8_t hvx_data[MAX_CTRL_POINT_RESP_PARAM_LEN];
ble_gatts_hvx_params_t hvx_params;
memset(&hvx_params, 0, sizeof(hvx_params));
hvx_len = 3;
hvx_data[0] = DFU_OP_RESPONSE_CODE;
hvx_data[1] = (uint8_t)op_code;
hvx_data[2] = (uint8_t)rsp_code;
hvx_params.handle = p_dfu->control_point_char.value_handle;
hvx_params.type = BLE_GATT_HVX_NOTIFICATION;
hvx_params.offset = 0;
hvx_params.p_len = &hvx_len;
hvx_params.p_data = hvx_data;
(void)sd_ble_gatts_hvx(p_dfu->conn_handle, &hvx_params);
}
/**@brief Handle write events to the Location and Navigation Service Control Point characteristic.
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_evt_write Write event received from the BLE stack.
*/
static void on_ctrlpt_write(ble_dfu_t * p_dfu, ble_gatts_evt_write_t const * p_evt_write)
{
uint32_t err_code;
ble_dfu_rsp_code_t rsp_code = DFU_RSP_OPERATION_FAILED;
ble_gatts_rw_authorize_reply_params_t write_authorize_reply;
memset(&write_authorize_reply, 0, sizeof(write_authorize_reply));
write_authorize_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
if (p_dfu->is_ctrlpt_notification_enabled)
{
write_authorize_reply.params.write.update = 1;
write_authorize_reply.params.write.gatt_status = BLE_GATT_STATUS_SUCCESS;
}
else
{
write_authorize_reply.params.write.gatt_status = DFU_RSP_CCCD_CONFIG_IMPROPER;
}
// reply to the write authorization
do {
err_code = sd_ble_gatts_rw_authorize_reply(p_dfu->conn_handle, &write_authorize_reply);
} while (err_code == NRF_ERROR_BUSY);
if (write_authorize_reply.params.write.gatt_status != BLE_GATT_STATUS_SUCCESS)
{
return;
}
// Start executing the control point write action
switch (p_evt_write->data[0])
{
case BLE_DFU_ENTER_BOOTLOADER:
rsp_code = DFU_RSP_SUCCESS;
break;
// Unrecognized Op Code
default:
rsp_code = DFU_RSP_OP_CODE_NOT_SUPPORTED;
break;
}
resp_send(p_dfu, (ble_dfu_buttonless_op_code_t)p_evt_write->data[0], rsp_code);
if (rsp_code == BLE_DFU_ENTER_BOOTLOADER
&& p_evt_write->data[0] == BLE_DFU_ENTER_BOOTLOADER)
{
enter_bootloader(p_dfu);
}
}
/**@brief Write authorization request event handler.
*
* @details The write authorization request event handler is called when writing to the control point.
*
* @param[in] p_dfu DFU structure.
* @param[in] p_ble_evt Event received from the BLE stack.
*/
static void on_rw_authorize_req(ble_dfu_t * p_dfu, ble_evt_t const * p_ble_evt)
{
if (p_ble_evt->evt.gatts_evt.conn_handle != p_dfu->conn_handle)
{
return;
}
const ble_gatts_evt_rw_authorize_request_t * p_auth_req =
&p_ble_evt->evt.gatts_evt.params.authorize_request;
if (
(p_auth_req->type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
&&
(p_auth_req->request.write.handle == p_dfu->control_point_char.value_handle)
&&
(p_auth_req->request.write.op != BLE_GATTS_OP_PREP_WRITE_REQ)
&&
(p_auth_req->request.write.op != BLE_GATTS_OP_EXEC_WRITE_REQ_NOW)
&&
(p_auth_req->request.write.op != BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL)
)
{
on_ctrlpt_write(p_dfu, &p_auth_req->request.write);
}
}
/**@brief Connect event handler.
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_ble_evt Event received from the BLE stack.
*/
static void on_connect(ble_dfu_t * p_dfu, ble_evt_t const * p_ble_evt)
{
p_dfu->conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
}
/**@brief Disconnect event handler.
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_ble_evt Event received from the BLE stack.
*/
static void on_disconnect(ble_dfu_t * p_dfu, ble_evt_t const * p_ble_evt)
{
if (p_dfu->conn_handle != p_ble_evt->evt.gatts_evt.conn_handle)
{
return;
}
p_dfu->conn_handle = BLE_CONN_HANDLE_INVALID;
if (p_dfu->is_waiting_for_disconnection)
{
NVIC_SystemReset();
}
}
/**@brief Write event handler.
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_ble_evt Event received from the BLE stack.rtt
*/
static void on_write(ble_dfu_t * p_dfu, ble_evt_t const * p_ble_evt)
{
const ble_gatts_evt_write_t * p_evt_write = &p_ble_evt->evt.gatts_evt.params.write;
if (p_evt_write->handle != p_dfu->control_point_char.cccd_handle)
{
return;
}
if (p_evt_write->len == BLE_CCCD_VALUE_LEN)
{
// CCCD written, update indications state
p_dfu->is_ctrlpt_notification_enabled = ble_srv_is_notification_enabled(p_evt_write->data);
if (p_dfu->evt_handler != NULL)
{
ble_dfu_evt_t evt;
if (p_dfu->is_ctrlpt_notification_enabled)
{
evt.type = BLE_DFU_EVT_INDICATION_ENABLED;
}
else
{
evt.type = BLE_DFU_EVT_INDICATION_DISABLED;
}
p_dfu->evt_handler(p_dfu, &evt);
}
}
}
void ble_dfu_on_ble_evt(ble_dfu_t * p_dfu, ble_evt_t * p_ble_evt)
{
VERIFY_PARAM_NOT_NULL_VOID(p_dfu);
VERIFY_PARAM_NOT_NULL_VOID(p_ble_evt);
switch (p_ble_evt->header.evt_id)
{
case BLE_GAP_EVT_CONNECTED:
on_connect(p_dfu, p_ble_evt);
break;
case BLE_GAP_EVT_DISCONNECTED:
on_disconnect(p_dfu, p_ble_evt);
break;
case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
on_rw_authorize_req(p_dfu, p_ble_evt);
break;
case BLE_GATTS_EVT_WRITE:
on_write(p_dfu, p_ble_evt);
break;
default:
// no implementation
break;
}
}

152
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/ble/ble_services/ble_dfu/ble_dfu.h
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@ -1,152 +0,0 @@
/*
* Copyright (c) 2012 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/** @file
*
* @defgroup ble_dfu Buttonless DFU Service
* @{
* @ingroup ble_sdk_srv
* @brief Buttonless DFU Service module.
*
* @details
*
* @note Attention!
* To maintain compliance with Nordic Semiconductor ASA Bluetooth profile
* qualification listings, this section of source code must not be modified.
*/
#ifndef BLE_DFU_H__
#define BLE_DFU_H__
#include <stdint.h>
#include "ble_srv_common.h"
#ifdef __cplusplus
extern "C" {
#endif
#define BLE_UUID_DFU_SERVICE 0x0001
#define BLE_DFU_BASE_UUID {{0x50, 0xEA, 0xDA, 0x30, 0x88, 0x83, 0xB8, 0x9F, 0x60, 0x4F, 0x15, 0xF3, 0x00, 0x00, 0x40, 0x8E}} /**< Used vendor specific UUID. */
#define BLE_DFU_ENTER_BOOTLOADER 0x01
typedef enum {
BLE_DFU_EVT_ENTERING_BOOTLOADER, /**< Event indicating that the bootloader will be entered after return of this event.*/
BLE_DFU_EVT_INDICATION_ENABLED, /**< Indication that the control point is enabled.*/
BLE_DFU_EVT_INDICATION_DISABLED /**< Indication that the control point is disabled.*/
} ble_dfu_evt_type_t;
typedef struct {
ble_dfu_evt_type_t type;
} ble_dfu_evt_t;
/* Forward declaration of the ble_nus_t type. */
typedef struct ble_dfu_s ble_dfu_t;
/**@brief Nordic UART Service event handler type. */
typedef void (*ble_dfu_evt_handler_t) (ble_dfu_t * p_dfu, ble_dfu_evt_t * p_evt);
// Control Point response values
typedef enum
{
DFU_RSP_RESERVED = 0x00, /**< Reserved for future use. */
DFU_RSP_SUCCESS = 0x01, /**< Success. */
DFU_RSP_OP_CODE_NOT_SUPPORTED = 0x02, /**< Op Code not supported. */
DFU_RSP_OPERATION_FAILED = 0x04, /**< Operation Failed. */
DFU_RSP_CCCD_CONFIG_IMPROPER = BLE_GATT_STATUS_ATTERR_CPS_CCCD_CONFIG_ERROR /**< CCCD is improperly configured. */
} ble_dfu_rsp_code_t;
// Control Point Op Code values
typedef enum
{
DFU_OP_RESERVED = 0x00, /**< Reserved for future use. */
DFU_OP_ENTER_BOOTLOADER = 0x01, /**< Enter bootloader. */
DFU_OP_RESPONSE_CODE = 0x20 /**< Response code. */
} ble_dfu_buttonless_op_code_t;
struct ble_dfu_s {
uint8_t uuid_type; /**< UUID type for DFU UUID. */
uint16_t service_handle; /**< Handle of DFU (as provided by the SoftDevice). */
uint16_t conn_handle;
ble_gatts_char_handles_t control_point_char; /**< Handles related to the DFU Control Point characteristic. */
bool is_ctrlpt_notification_enabled;
ble_dfu_evt_handler_t evt_handler; /**< Event handler which is called right before. */
bool is_waiting_for_disconnection;
};
typedef struct {
ble_dfu_evt_handler_t evt_handler; /**< Event handler which is called right before. */
security_req_t ctrl_point_security_req_write_perm; /**< Read security level of the LN Control Point characteristic. */
security_req_t ctrl_point_security_req_cccd_write_perm; /**< CCCD write security level of the LN Control Point characteristic. */
} ble_dfu_init_t;
/**@brief Function for initializing the Device Firmware Update module
*
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_dfu_init The structure containing the values of characteristics needed by the
* service.
*
* @return NRF_SUCCESS on successful initialization of service.
*/
uint32_t ble_dfu_init(ble_dfu_t * p_dfu, const ble_dfu_init_t * p_dfu_init);
/**@brief Function for handling the Application's BLE Stack events.
*
* @details Handles all events from the BLE stack of interest to the Battery Service.
*
* @param[in] p_dfu DFU Service structure.
* @param[in] p_ble_evt Event received from the BLE stack.
*/
void ble_dfu_on_ble_evt(ble_dfu_t * p_dfu, ble_evt_t * p_ble_evt);
#ifdef __cplusplus
}
#endif
#endif // BLE_DIS_H__
/** @} */

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef ARDUINO_PRIMO_H
#define ARDUINO_PRIMO_H
#ifdef __cplusplus
extern "C" {
#endif
// LEDs definitions
#define LEDS_NUMBER 1
#define LED_1 25
#define LEDS_ACTIVE_STATE 0
#define LEDS_LIST { LED_1}
#define BSP_LED_0 LED_1
#define LEDS_INV_MASK 0
#define BUTTONS_NUMBER 1
#define BUTTON_START 7
#define BUTTON_1 7
#define BUTTON_STOP 7
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BUTTONS_LIST { BUTTON_1 }
#define BSP_BUTTON_0 BUTTON_1
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 12
#define CTS_PIN_NUMBER UART_PIN_DISCONNECTED
#define RTS_PIN_NUMBER UART_PIN_DISCONNECTED
#define HWFC false
// Arduino board mappings
#define ARDUINO_SCL_PIN 27 // SCL signal pin
#define ARDUINO_SDA_PIN 26 // SDA signal pin
#define ARDUINO_AREF_PIN 2 // Aref pin
#define ARDUINO_13_PIN 25 // Digital pin 13
#define ARDUINO_12_PIN 24 // Digital pin 12
#define ARDUINO_11_PIN 23 // Digital pin 11
#define ARDUINO_10_PIN 22 // Digital pin 10
#define ARDUINO_9_PIN 20 // Digital pin 9
#define ARDUINO_8_PIN 19 // Digital pin 8
#define ARDUINO_7_PIN 18 // Digital pin 7
#define ARDUINO_6_PIN 17 // Digital pin 6
#define ARDUINO_5_PIN 16 // Digital pin 5
#define ARDUINO_4_PIN 15 // Digital pin 4
#define ARDUINO_3_PIN 14 // Digital pin 3
#define ARDUINO_2_PIN 13 // Digital pin 2
#define ARDUINO_1_PIN 12 // Digital pin 1
#define ARDUINO_0_PIN 11 // Digital pin 0
#define ARDUINO_A0_PIN 3 // Analog channel 0
#define ARDUINO_A1_PIN 4 // Analog channel 1
#define ARDUINO_A2_PIN 28 // Analog channel 2
#define ARDUINO_A3_PIN 29 // Analog channel 3
#define ARDUINO_A4_PIN 30 // Analog channel 4
#define ARDUINO_A5_PIN 31 // Analog channel 5
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif // ARDUINO_PRIMO_H

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "boards.h"
#include <stdint.h>
#include <stdbool.h>
#if LEDS_NUMBER > 0
static const uint8_t m_board_led_list[LEDS_NUMBER] = LEDS_LIST;
#endif
#if BUTTONS_NUMBER > 0
static const uint8_t m_board_btn_list[BUTTONS_NUMBER] = BUTTONS_LIST;
#endif
#if LEDS_NUMBER > 0
bool bsp_board_led_state_get(uint32_t led_idx)
{
ASSERT(led_idx < LEDS_NUMBER);
bool pin_set = nrf_gpio_pin_out_read(m_board_led_list[led_idx]) ? true : false;
return (pin_set == (LEDS_ACTIVE_STATE ? true : false));
}
void bsp_board_led_on(uint32_t led_idx)
{
ASSERT(led_idx < LEDS_NUMBER);
nrf_gpio_pin_write(m_board_led_list[led_idx], LEDS_ACTIVE_STATE ? 1 : 0);
}
void bsp_board_led_off(uint32_t led_idx)
{
ASSERT(led_idx < LEDS_NUMBER);
nrf_gpio_pin_write(m_board_led_list[led_idx], LEDS_ACTIVE_STATE ? 0 : 1);
}
void bsp_board_leds_off(void)
{
uint32_t i;
for(i = 0; i < LEDS_NUMBER; ++i)
{
bsp_board_led_off(i);
}
}
void bsp_board_leds_on(void)
{
uint32_t i;
for(i = 0; i < LEDS_NUMBER; ++i)
{
bsp_board_led_on(i);
}
}
void bsp_board_led_invert(uint32_t led_idx)
{
ASSERT(led_idx < LEDS_NUMBER);
nrf_gpio_pin_toggle(m_board_led_list[led_idx]);
}
void bsp_board_leds_init(void)
{
uint32_t i;
for(i = 0; i < LEDS_NUMBER; ++i)
{
nrf_gpio_cfg_output(m_board_led_list[i]);
}
bsp_board_leds_off();
}
uint32_t bsp_board_led_idx_to_pin(uint32_t led_idx)
{
ASSERT(led_idx < LEDS_NUMBER);
return m_board_led_list[led_idx];
}
uint32_t bsp_board_pin_to_led_idx(uint32_t pin_number)
{
uint32_t ret = 0xFFFFFFFF;
uint32_t i;
for(i = 0; i < LEDS_NUMBER; ++i)
{
if (m_board_led_list[i] == pin_number)
{
ret = i;
break;
}
}
return ret;
}
#endif //LEDS_NUMBER > 0
#if BUTTONS_NUMBER > 0
bool bsp_board_button_state_get(uint32_t button_idx)
{
ASSERT(button_idx < BUTTONS_NUMBER);
bool pin_set = nrf_gpio_pin_read(m_board_btn_list[button_idx]) ? true : false;
return (pin_set == (BUTTONS_ACTIVE_STATE ? true : false));
}
void bsp_board_buttons_init(void)
{
uint32_t i;
for(i = 0; i < BUTTONS_NUMBER; ++i)
{
nrf_gpio_cfg_input(m_board_btn_list[i], BUTTON_PULL);
}
}
uint32_t bsp_board_pin_to_button_idx(uint32_t pin_number)
{
uint32_t i;
uint32_t ret = 0xFFFFFFFF;
for(i = 0; i < BUTTONS_NUMBER; ++i)
{
if (m_board_btn_list[i] == pin_number)
{
ret = i;
break;
}
}
return ret;
}
uint32_t bsp_board_button_idx_to_pin(uint32_t button_idx)
{
ASSERT(button_idx < BUTTONS_NUMBER);
return m_board_btn_list[button_idx];
}
#endif //BUTTONS_NUMBER > 0

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef BOARDS_H
#define BOARDS_H
#include "nrf_gpio.h"
#if defined(BOARD_NRF6310)
#include "nrf6310.h"
#elif defined(BOARD_PCA10000)
#include "pca10000.h"
#elif defined(BOARD_PCA10001)
#include "pca10001.h"
#elif defined(BOARD_PCA10002)
#include "pca10000.h"
#elif defined(BOARD_PCA10003)
#include "pca10003.h"
#elif defined(BOARD_PCA20006)
#include "pca20006.h"
#elif defined(BOARD_PCA10028)
#include "pca10028.h"
#elif defined(BOARD_PCA10031)
#include "pca10031.h"
#elif defined(BOARD_PCA10036)
#include "pca10036.h"
#elif defined(BOARD_PCA10040)
#include "pca10040.h"
#elif defined(BOARD_PCA10056)
#include "pca10056.h"
#elif defined(BOARD_WT51822)
#include "wt51822.h"
#elif defined(BOARD_N5DK1)
#include "n5_starterkit.h"
#elif defined (BOARD_D52DK1)
#include "d52_starterkit.h"
#elif defined (BOARD_ARDUINO_PRIMO)
#include "arduino_primo.h"
#elif defined(BOARD_CUSTOM)
#include "custom_board.h"
#else
#error "Board is not defined"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**
* Function for returning the state of an LED.
*
* @param led_idx LED index (starting from 0), as defined in the board-specific header.
*
* @return True if the LED is turned on.
*/
bool bsp_board_led_state_get(uint32_t led_idx);
/**
* Function for turning on an LED.
*
* @param led_idx LED index (starting from 0), as defined in the board-specific header.
*/
void bsp_board_led_on(uint32_t led_idx);
/**
* Function for turning off an LED.
*
* @param led_idx LED index (starting from 0), as defined in the board-specific header.
*/
void bsp_board_led_off(uint32_t led_idx);
/**
* Function for inverting the state of an LED.
*
* @param led_idx LED index (starting from 0), as defined in the board-specific header.
*/
void bsp_board_led_invert(uint32_t led_idx);
/**
* Function for turning off all LEDs.
*/
void bsp_board_leds_off(void);
/**
* Function for turning on all LEDs.
*/
void bsp_board_leds_on(void);
/**
* Function for initializing LEDs.
*/
void bsp_board_leds_init(void);
/**
* Function for converting pin number to LED index.
*
* @param pin_number Pin number.
*
* @return LED index of the given pin or 0xFFFFFFFF if invalid pin provided.
*/
uint32_t bsp_board_pin_to_led_idx(uint32_t pin_number);
/**
* Function for converting LED index to pin number.
*
* @param led_idx LED index.
*
* @return Pin number.
*/
uint32_t bsp_board_led_idx_to_pin(uint32_t led_idx);
/**
* Function for returning the state of a button.
*
* @param button_idx Button index (starting from 0), as defined in the board-specific header.
*
* @return True if the button is pressed.
*/
bool bsp_board_button_state_get(uint32_t button_idx);
/**
* Function for initializing buttons.
*/
void bsp_board_buttons_init(void);
/**
* Function for converting pin number to button index.
*
* @param pin_number Pin number.
*
* @return Button index of the given pin or 0xFFFFFFFF if invalid pin provided.
*/
uint32_t bsp_board_pin_to_button_idx(uint32_t pin_number);
/**
* Function for converting button index to pin number.
*
* @param button_idx Button index.
*
* @return Pin number.
*/
uint32_t bsp_board_button_idx_to_pin(uint32_t button_idx);
#define BSP_BOARD_LED_0 0
#define BSP_BOARD_LED_1 1
#define BSP_BOARD_LED_2 2
#define BSP_BOARD_LED_3 3
#define BSP_BOARD_LED_4 4
#define BSP_BOARD_LED_5 5
#define BSP_BOARD_LED_6 6
#define BSP_BOARD_LED_7 7
#ifdef BSP_LED_0
#define BSP_LED_0_MASK (1<<BSP_LED_0)
#else
#define BSP_LED_0_MASK 0
#endif
#ifdef BSP_LED_1
#define BSP_LED_1_MASK (1<<BSP_LED_1)
#else
#define BSP_LED_1_MASK 0
#endif
#ifdef BSP_LED_2
#define BSP_LED_2_MASK (1<<BSP_LED_2)
#else
#define BSP_LED_2_MASK 0
#endif
#ifdef BSP_LED_3
#define BSP_LED_3_MASK (1<<BSP_LED_3)
#else
#define BSP_LED_3_MASK 0
#endif
#ifdef BSP_LED_4
#define BSP_LED_4_MASK (1<<BSP_LED_4)
#else
#define BSP_LED_4_MASK 0
#endif
#ifdef BSP_LED_5
#define BSP_LED_5_MASK (1<<BSP_LED_5)
#else
#define BSP_LED_5_MASK 0
#endif
#ifdef BSP_LED_6
#define BSP_LED_6_MASK (1<<BSP_LED_6)
#else
#define BSP_LED_6_MASK 0
#endif
#ifdef BSP_LED_7
#define BSP_LED_7_MASK (1<<BSP_LED_7)
#else
#define BSP_LED_7_MASK 0
#endif
#define LEDS_MASK (BSP_LED_0_MASK | BSP_LED_1_MASK | \
BSP_LED_2_MASK | BSP_LED_3_MASK | \
BSP_LED_4_MASK | BSP_LED_5_MASK | \
BSP_LED_6_MASK | BSP_LED_7_MASK)
#define BSP_BOARD_BUTTON_0 0
#define BSP_BOARD_BUTTON_1 1
#define BSP_BOARD_BUTTON_2 2
#define BSP_BOARD_BUTTON_3 3
#define BSP_BOARD_BUTTON_4 4
#define BSP_BOARD_BUTTON_5 5
#define BSP_BOARD_BUTTON_6 6
#define BSP_BOARD_BUTTON_7 7
#ifdef BSP_BUTTON_0
#define BSP_BUTTON_0_MASK (1<<BSP_BUTTON_0)
#else
#define BSP_BUTTON_0_MASK 0
#endif
#ifdef BSP_BUTTON_1
#define BSP_BUTTON_1_MASK (1<<BSP_BUTTON_1)
#else
#define BSP_BUTTON_1_MASK 0
#endif
#ifdef BSP_BUTTON_2
#define BSP_BUTTON_2_MASK (1<<BSP_BUTTON_2)
#else
#define BSP_BUTTON_2_MASK 0
#endif
#ifdef BSP_BUTTON_3
#define BSP_BUTTON_3_MASK (1<<BSP_BUTTON_3)
#else
#define BSP_BUTTON_3_MASK 0
#endif
#ifdef BSP_BUTTON_4
#define BSP_BUTTON_4_MASK (1<<BSP_BUTTON_4)
#else
#define BSP_BUTTON_4_MASK 0
#endif
#ifdef BSP_BUTTON_5
#define BSP_BUTTON_5_MASK (1<<BSP_BUTTON_5)
#else
#define BSP_BUTTON_5_MASK 0
#endif
#ifdef BSP_BUTTON_6
#define BSP_BUTTON_6_MASK (1<<BSP_BUTTON_6)
#else
#define BSP_BUTTON_6_MASK 0
#endif
#ifdef BSP_BUTTON_7
#define BSP_BUTTON_7_MASK (1<<BSP_BUTTON_7)
#else
#define BSP_BUTTON_7_MASK 0
#endif
#define BUTTONS_MASK (BSP_BUTTON_0_MASK | BSP_BUTTON_1_MASK | \
BSP_BUTTON_2_MASK | BSP_BUTTON_3_MASK | \
BSP_BUTTON_4_MASK | BSP_BUTTON_5_MASK | \
BSP_BUTTON_6_MASK | BSP_BUTTON_7_MASK)
#define LEDS_OFF(leds_mask) do { ASSERT(sizeof(leds_mask) == 4); \
NRF_GPIO->OUTSET = (leds_mask) & (LEDS_MASK & LEDS_INV_MASK); \
NRF_GPIO->OUTCLR = (leds_mask) & (LEDS_MASK & ~LEDS_INV_MASK); } while (0)
#define LEDS_ON(leds_mask) do { ASSERT(sizeof(leds_mask) == 4); \
NRF_GPIO->OUTCLR = (leds_mask) & (LEDS_MASK & LEDS_INV_MASK); \
NRF_GPIO->OUTSET = (leds_mask) & (LEDS_MASK & ~LEDS_INV_MASK); } while (0)
#define LED_IS_ON(leds_mask) ((leds_mask) & (NRF_GPIO->OUT ^ LEDS_INV_MASK) )
#define LEDS_INVERT(leds_mask) do { uint32_t gpio_state = NRF_GPIO->OUT; \
ASSERT(sizeof(leds_mask) == 4); \
NRF_GPIO->OUTSET = ((leds_mask) & ~gpio_state); \
NRF_GPIO->OUTCLR = ((leds_mask) & gpio_state); } while (0)
#define LEDS_CONFIGURE(leds_mask) do { uint32_t pin; \
ASSERT(sizeof(leds_mask) == 4); \
for (pin = 0; pin < 32; pin++) \
if ( (leds_mask) & (1 << pin) ) \
nrf_gpio_cfg_output(pin); } while (0)
#ifdef __cplusplus
}
#endif
#endif

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/*
This software is subject to the license described in the License.txt file
included with this software distribution. You may not use this file except in compliance
with this license.
Copyright (c) Dynastream Innovations Inc. 2016
All rights reserved.
*/
#ifndef D52STARTERKIT_H
#define D52STARTERKIT_H
#include "nrf_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
// LEDs definitions for D52DK1
#define LEDS_NUMBER 4
// IO board active low leds
// D52DK1 does not define LED_START or LED_STOP since the LEDS are not on sequential pins
#define LED_A 24 //LED A on D52 Starter Kit IO Board
#define LED_B 31 //LED B on D52 Starter Kit IO Board
#define LED_C 17 //LED C on D52 Starter Kit IO Board
#define LED_D 20 //LED D on D52 Starter Kit IO Board
#define LEDS_ACTIVE_STATE 0
#define LEDS_LIST { LED_A, LED_B, LED_C, LED_D }
#define BSP_LED_0 LED_A
#define BSP_LED_1 LED_B
#define BSP_LED_2 LED_C
#define BSP_LED_3 LED_D
#define LEDS_INV_MASK LEDS_MASK
#define BUTTONS_NUMBER 4
// IO board pull-up buttons
#define BUTTON_A 6 //BUTTON A on D52 Starter Kit IO Board
#define BUTTON_B 7 //BUTTON B on D52 Starter Kit IO Board
#define BUTTON_C 16 //BUTTON C on D52 Starter Kit IO Board
#define BUTTON_D 19 //BUTTON D on D52 Starter Kit IO Board
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 BUTTON_A
#define BSP_BUTTON_1 BUTTON_B
#define BSP_BUTTON_2 BUTTON_C
#define BSP_BUTTON_3 BUTTON_D
#define BUTTONS_LIST { BUTTON_A, BUTTON_B, BUTTON_C, BUTTON_D }
// Battery board pull-up switches
#define SWITCH_1 12 // Switch 1 on D52 Starter Kit Battery Board
#define SWITCH_2 8 // Switch 2 on D52 Starter Kit Battery Board
#define SWITCH_3 15 // Switch 3 on D52 Starter Kit Battery Board
#define SWITCH_4 11 // Switch 4 on D52 Starter Kit Battery Board
#define SWITCH_5 14 // Switch 5 on D52 Starter Kit Battery Board
#define SWITCH_PULL NRF_GPIO_PIN_PULLUP
#define SWITCHES_NUMBER 5
#define BSP_SWITCH_0 SWITCH_1
#define BSP_SWITCH_1 SWITCH_2
#define BSP_SWITCH_2 SWITCH_3
#define BSP_SWITCH_3 SWITCH_4
#define BSP_SWITCH_4 SWITCH_5
#define BSP_SWITCH_0_MASK (1<<BSP_SWITCH_0)
#define BSP_SWITCH_1_MASK (1<<BSP_SWITCH_1)
#define BSP_SWITCH_2_MASK (1<<BSP_SWITCH_2)
#define BSP_SWITCH_3_MASK (1<<BSP_SWITCH_3)
#define BSP_SWITCH_4_MASK (1<<BSP_SWITCH_4)
#define SWITCHES_MASK (BSP_SWITCH_0_MASK | BSP_SWITCH_1_MASK | BSP_SWITCH_2_MASK | BSP_SWITCH_3_MASK | BSP_SWITCH_4_MASK)
// D52DK1 does not have UART peripheral. Dummy defines for compilation.
#define RX_PIN_NUMBER UART_PIN_DISCONNECTED
#define TX_PIN_NUMBER UART_PIN_DISCONNECTED
#define CTS_PIN_NUMBER UART_PIN_DISCONNECTED
#define RTS_PIN_NUMBER UART_PIN_DISCONNECTED
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif

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/*
This software is subject to the license described in the License.txt file
included with this software distribution. You may not use this file except in compliance
with this license.
Copyright (c) Dynastream Innovations Inc. 2015
All rights reserved.
*/
#ifndef N5STARTERKIT_H
#define N5STARTERKIT_H
#include "nrf_gpio.h"
#ifdef __cplusplus
extern "C" {
#endif
// LEDs definitions for N5DK1
#define LEDS_NUMBER 4
// IO board active low leds
// N5DK1 does not define LED_START or LED_STOP since the LEDS are not on sequential pins
#define LED_A 8 //LED A on N5 Starter Kit IO Board
#define LED_B 3 //LED B on N5 Starter Kit IO Board
#define LED_C 15 //LED C on N5 Starter Kit IO Board
#define LED_D 30 //LED D on N5 Starter Kit IO Board
#define LEDS_ACTIVE_STATE 0
#define LEDS_LIST { LED_A, LED_B, LED_C, LED_D }
#define LEDS_INV_MASK LEDS_MASK
#define BSP_LED_0 LED_A
#define BSP_LED_1 LED_B
#define BSP_LED_2 LED_C
#define BSP_LED_3 LED_D
#define BUTTONS_NUMBER 4
// IO board pull-up buttons
#define BUTTON_A 23 //BUTTON A on N5 Starter Kit IO Board
#define BUTTON_B 2 //BUTTON B on N5 Starter Kit IO Board
#define BUTTON_C 12 //BUTTON C on N5 Starter Kit IO Board
#define BUTTON_D 11 //BUTTON D on N5 Starter Kit IO Board
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 BUTTON_A
#define BSP_BUTTON_1 BUTTON_B
#define BSP_BUTTON_2 BUTTON_C
#define BSP_BUTTON_3 BUTTON_D
#define BUTTONS_LIST { BUTTON_A, BUTTON_B, BUTTON_C, BUTTON_D }
// Battery board pull-up switches
#define SWITCH_1 5 // Switch 1 on N5 Starter Kit Battery Board
#define SWITCH_2 0 // Switch 2 on N5 Starter Kit Battery Board
#define SWITCH_3 6 // Switch 3 on N5 Starter Kit Battery Board
#define SWITCH_4 24 // Switch 4 on N5 Starter Kit Battery Board
#define SWITCH_5 9 // Switch 5 on N5 Starter Kit Battery Board
#define SWITCH_PULL NRF_GPIO_PIN_PULLUP
#define SWITCHES_NUMBER 5
#define BSP_SWITCH_0 SWITCH_1
#define BSP_SWITCH_1 SWITCH_2
#define BSP_SWITCH_2 SWITCH_3
#define BSP_SWITCH_3 SWITCH_4
#define BSP_SWITCH_4 SWITCH_5
#define SWITCHES_MASK 0x01000261
// N5DK1 does not have UART peripheral. Dummy defines for compilation.
#define RX_PIN_NUMBER UART_PIN_DISCONNECTED
#define TX_PIN_NUMBER UART_PIN_DISCONNECTED
#define CTS_PIN_NUMBER UART_PIN_DISCONNECTED
#define RTS_PIN_NUMBER UART_PIN_DISCONNECTED
// Low frequency clock source to be used by the SoftDevice
#ifdef S210
#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_50_PPM
#else
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_50_PPM}
#endif
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef NRF6310_H__
#define NRF6310_H__
#ifdef __cplusplus
extern "C" {
#endif
#define LED_START 8
#define LED_0 8
#define LED_1 9
#define LED_2 10
#define LED_3 11
#define LED_4 12
#define LED_5 13
#define LED_6 14
#define LED_7 15
#define LED_STOP 15
#define BSP_LED_0 LED_0
#define BSP_LED_1 LED_1
#define BSP_LED_2 LED_2
#define BSP_LED_3 LED_3
#define BSP_LED_4 LED_4
#define BSP_LED_5 LED_5
#define BSP_LED_6 LED_6
#define BSP_LED_7 LED_7
#define LEDS_ACTIVE_STATE 1
#define BUTTON_START 0
#define BUTTON_0 0
#define BUTTON_1 1
#define BUTTON_2 2
#define BUTTON_3 3
#define BUTTON_4 4
#define BUTTON_5 5
#define BUTTON_6 6
#define BUTTON_7 7
#define BUTTON_STOP 7
#define BUTTON_PULL NRF_GPIO_PIN_NOPULL
#define BSP_BUTTON_0 BUTTON_0
#define BSP_BUTTON_1 BUTTON_1
#define BSP_BUTTON_2 BUTTON_2
#define BSP_BUTTON_3 BUTTON_3
#define BSP_BUTTON_4 BUTTON_4
#define BSP_BUTTON_5 BUTTON_5
#define BSP_BUTTON_6 BUTTON_6
#define BSP_BUTTON_7 BUTTON_7
#define BUTTONS_ACTIVE_STATE 1
#define BUTTONS_LIST {BUTTON_0, BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4, BUTTON_5, BUTTON_6, BUTTON_7}
#define LEDS_LIST {LED_0, LED_1, LED_2, LED_3, LED_4, LED_5, LED_6, LED_7}
#define LEDS_INV_MASK 0x00000000
#define BUTTONS_NUMBER 8
#define LEDS_NUMBER 8
#define RX_PIN_NUMBER 16 // UART RX pin number.
#define TX_PIN_NUMBER 17 // UART TX pin number.
#define CTS_PIN_NUMBER 18 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define RTS_PIN_NUMBER 19 // UART Request To Send pin number. Not used if HWFC is set to false.
#define HWFC false // UART hardware flow control.
#define SPIS_MISO_PIN 20 // SPI MISO signal.
#define SPIS_CSN_PIN 21 // SPI CSN signal.
#define SPIS_MOSI_PIN 22 // SPI MOSI signal.
#define SPIS_SCK_PIN 23 // SPI SCK signal.
#define SPIM0_SCK_PIN 23u /**< SPI clock GPIO pin number. */
#define SPIM0_MOSI_PIN 20u /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM0_MISO_PIN 22u /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM0_SS_PIN 21u /**< SPI Slave Select GPIO pin number. */
#define SPIM1_SCK_PIN 16u /**< SPI clock GPIO pin number. */
#define SPIM1_MOSI_PIN 18u /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM1_MISO_PIN 17u /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM1_SS_PIN 19u /**< SPI Slave Select GPIO pin number. */
// serialization APPLICATION board
#define SER_APP_RX_PIN 16 // UART RX pin number.
#define SER_APP_TX_PIN 17 // UART TX pin number.
#define SER_APP_CTS_PIN 18 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 19 // UART Request To Send pin number.
#if 0
#define SER_APP_SPIM0_SCK_PIN 20 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 17 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 16 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 19 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 18 // SPI REQUEST GPIO pin number
#else
#define SER_APP_SPIM0_SCK_PIN 23 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 20 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 22 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 29 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 28 // SPI REQUEST GPIO pin number
#endif
// serialization CONNECTIVITY board
#if 0
#define SER_CON_RX_PIN 17 // UART RX pin number.
#define SER_CON_TX_PIN 16 // UART TX pin number.
#define SER_CON_CTS_PIN 19 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 18 // UART Request To Send pin number. Not used if HWFC is set to false.
#else
#define SER_CON_RX_PIN 16 // UART RX pin number.
#define SER_CON_TX_PIN 17 // UART TX pin number.
#define SER_CON_CTS_PIN 18 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 19 // UART Request To Send pin number. Not used if HWFC is set to false.
#endif
#if 0
#define SER_CON_SPIS_SCK_PIN 20 // SPI SCK signal.
#define SER_CON_SPIS_MISO_PIN 16 // SPI MISO signal.
#define SER_CON_SPIS_MOSI_PIN 17 // SPI MOSI signal.
#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 19 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 18 // SPI REQUEST GPIO pin number.
#else
#define SER_CON_SPIS_SCK_PIN 23 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 22 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 20 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 29 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 28 // SPI REQUEST GPIO pin number.
#endif
#define SER_CONN_ASSERT_LED_PIN LED_2
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif // NRF6310_H__

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/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10000_H
#define PCA10000_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// Definitions for PCA10000 v2.0.0 or higher
#if 1
#define LEDS_NUMBER 3
// there is RGB LED on this board
#define LED_RGB_RED 21
#define LED_RGB_GREEN 22
#define LED_RGB_BLUE 23
#define LED_START LED_RGB_RED
#define BSP_LED_0 LED_RGB_RED
#define BSP_LED_1 LED_RGB_GREEN
#define BSP_LED_2 LED_RGB_BLUE
#define LED_STOP LED_RGB_BLUE
#define LEDS_ACTIVE_STATE 0
#define BUTTONS_LIST {}
#define LEDS_LIST { LED_RGB_RED, LED_RGB_GREEN, LED_RGB_BLUE }
#define LEDS_INV_MASK LEDS_MASK
// there are no buttons on this board
#define BUTTONS_NUMBER 0
// UART pins connected to J-Link
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 10
#define RTS_PIN_NUMBER 8
#define HWFC true
// Definitions for PCA10000 v1.0
#else
#define RX_PIN_NUMBER 3
#define TX_PIN_NUMBER 1
#define CTS_PIN_NUMBER 2
#define RTS_PIN_NUMBER 0
#define HWFC true
#endif
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10001_H
#define PCA10001_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
#define LED_START 18
#define LED_0 18
#define LED_1 19
#define LED_STOP 19
#define LEDS_ACTIVE_STATE 1
#define BSP_LED_0 LED_0
#define BSP_LED_1 LED_1
#define LEDS_INV_MASK 0x00000000
#define BUTTON_START 16
#define BUTTON_0 16
#define BUTTON_1 17
#define BUTTON_STOP 17
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 BUTTON_0
#define BSP_BUTTON_1 BUTTON_1
#define BUTTONS_NUMBER 2
#define LEDS_NUMBER 2
#define BUTTONS_LIST { BUTTON_0, BUTTON_1 }
#define LEDS_LIST { LED_0, LED_1 }
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 10
#define RTS_PIN_NUMBER 8
#define HWFC true
#define SPIS_MISO_PIN 20 // SPI MISO signal.
#define SPIS_CSN_PIN 21 // SPI CSN signal.
#define SPIS_MOSI_PIN 22 // SPI MOSI signal.
#define SPIS_SCK_PIN 23 // SPI SCK signal.
#define SPIM0_SCK_PIN 23u /**< SPI clock GPIO pin number. */
#define SPIM0_MOSI_PIN 20u /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM0_MISO_PIN 22u /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM0_SS_PIN 21u /**< SPI Slave Select GPIO pin number. */
#define SPIM1_SCK_PIN 29u /**< SPI clock GPIO pin number. */
#define SPIM1_MOSI_PIN 24u /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM1_MISO_PIN 28u /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM1_SS_PIN 25u /**< SPI Slave Select GPIO pin number. */
// serialization APPLICATION board
// UART
// this configuration works with the SPI wires setup
#define SER_APP_RX_PIN 20 // UART RX pin number.
#define SER_APP_TX_PIN 22 // UART TX pin number.
#define SER_APP_CTS_PIN 23 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 21 // UART Request To Send pin number.
// SPI
#if 0
#define SER_APP_SPIM0_SCK_PIN 20 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 17 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 16 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 19 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 18 // SPI REQUEST GPIO pin number
#else
#define SER_APP_SPIM0_SCK_PIN 23 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 20 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 22 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 21 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number
#endif
// serialization CONNECTIVITY board
// UART
#if 0
#define SER_CON_RX_PIN 22 // UART RX pin number.
#define SER_CON_TX_PIN 20 // UART TX pin number.
#define SER_CON_CTS_PIN 21 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 23 // UART Request To Send pin number. Not used if HWFC is set to false.
#else
// this configuration works with the SPI wires setup
#define SER_CON_RX_PIN 20 // UART RX pin number.
#define SER_CON_TX_PIN 22 // UART TX pin number.
#define SER_CON_CTS_PIN 21 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 23 // UART Request To Send pin number. Not used if HWFC is set to false.
#endif
//SPI
#if 0
#define SER_CON_SPIS_SCK_PIN 20 // SPI SCK signal.
#define SER_CON_SPIS_MISO_PIN 16 // SPI MISO signal.
#define SER_CON_SPIS_MOSI_PIN 17 // SPI MOSI signal.
#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 19 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 18 // SPI REQUEST GPIO pin number.
#else
#define SER_CON_SPIS_SCK_PIN 23 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 22 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 20 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 21 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number.
#endif
#define SER_CONN_ASSERT_LED_PIN LED_0
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10003_H
#define PCA10003_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
#define LED_START 18
#define LED_0 18
#define LED_1 19
#define LED_STOP 19
#define LEDS_ACTIVE_STATE 1
#define LEDS_INV_MASK 0x00000000
#define BSP_LED_0 LED_0
#define BSP_LED_1 LED_1
#define BUTTON_START 16
#define BUTTON_0 16
#define BUTTON_1 17
#define BUTTON_STOP 17
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 BUTTON_0
#define BSP_BUTTON_1 BUTTON_1
#define BUTTONS_NUMBER 2
#define LEDS_NUMBER 2
#define LEDS_LIST { LED_0, LED_1 }
#define BUTTONS_LIST { BUTTON_0, BUTTON_1 }
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 10
#define RTS_PIN_NUMBER 8
#define HWFC true
// Low frequency clock source to be used by the SoftDevice
#ifdef S210
#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM
#else
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#endif
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10028_H
#define PCA10028_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs definitions for PCA10028
#define LEDS_NUMBER 4
#define LED_START 21
#define LED_1 21
#define LED_2 22
#define LED_3 23
#define LED_4 24
#define LED_STOP 24
#define LEDS_ACTIVE_STATE 0
#define LEDS_LIST { LED_1, LED_2, LED_3, LED_4 }
#define LEDS_INV_MASK LEDS_MASK
#define BSP_LED_0 LED_1
#define BSP_LED_1 LED_2
#define BSP_LED_2 LED_3
#define BSP_LED_3 LED_4
#define BUTTONS_NUMBER 4
#define BUTTON_START 17
#define BUTTON_1 17
#define BUTTON_2 18
#define BUTTON_3 19
#define BUTTON_4 20
#define BUTTON_STOP 20
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BUTTONS_LIST { BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4 }
#define BSP_BUTTON_0 BUTTON_1
#define BSP_BUTTON_1 BUTTON_2
#define BSP_BUTTON_2 BUTTON_3
#define BSP_BUTTON_3 BUTTON_4
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 10
#define RTS_PIN_NUMBER 8
#define HWFC true
#define SPIS_MISO_PIN 28 // SPI MISO signal.
#define SPIS_CSN_PIN 12 // SPI CSN signal.
#define SPIS_MOSI_PIN 25 // SPI MOSI signal.
#define SPIS_SCK_PIN 29 // SPI SCK signal.
#define SPIM0_SCK_PIN 4 /**< SPI clock GPIO pin number. */
#define SPIM0_MOSI_PIN 1 /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM0_MISO_PIN 3 /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM0_SS_PIN 2 /**< SPI Slave Select GPIO pin number. */
#define SPIM1_SCK_PIN 15 /**< SPI clock GPIO pin number. */
#define SPIM1_MOSI_PIN 12 /**< SPI Master Out Slave In GPIO pin number. */
#define SPIM1_MISO_PIN 14 /**< SPI Master In Slave Out GPIO pin number. */
#define SPIM1_SS_PIN 13 /**< SPI Slave Select GPIO pin number. */
// serialization APPLICATION board
#define SER_CONN_CHIP_RESET_PIN 12 // Pin used to reset connectivity chip
#define SER_APP_RX_PIN 25 // UART RX pin number.
#define SER_APP_TX_PIN 28 // UART TX pin number.
#define SER_APP_CTS_PIN 0 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 29 // UART Request To Send pin number.
#define SER_APP_SPIM0_SCK_PIN 7 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 0 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 30 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 25 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 29 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 28 // SPI REQUEST GPIO pin number
// serialization CONNECTIVITY board
#define SER_CON_RX_PIN 28 // UART RX pin number.
#define SER_CON_TX_PIN 25 // UART TX pin number.
#define SER_CON_CTS_PIN 29 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 0 // UART Request To Send pin number. Not used if HWFC is set to false.
#define SER_CON_SPIS_SCK_PIN 7 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 0 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 30 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 25 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 29 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 28 // SPI REQUEST GPIO pin number.
// Arduino board mappings
#define ARDUINO_SCL_PIN 7 // SCL signal pin
#define ARDUINO_SDA_PIN 30 // SDA signal pin
#define ARDUINO_AREF_PIN 0 // Aref pin
#define ARDUINO_13_PIN 29 // Digital pin 13
#define ARDUINO_12_PIN 28 // Digital pin 12
#define ARDUINO_11_PIN 25 // Digital pin 11
#define ARDUINO_10_PIN 24 // Digital pin 10
#define ARDUINO_9_PIN 23 // Digital pin 9
#define ARDUINO_8_PIN 20 // Digital pin 8
#define ARDUINO_7_PIN 19 // Digital pin 7
#define ARDUINO_6_PIN 18 // Digital pin 6
#define ARDUINO_5_PIN 17 // Digital pin 5
#define ARDUINO_4_PIN 16 // Digital pin 4
#define ARDUINO_3_PIN 15 // Digital pin 3
#define ARDUINO_2_PIN 14 // Digital pin 2
#define ARDUINO_1_PIN 13 // Digital pin 1
#define ARDUINO_0_PIN 12 // Digital pin 0
#define ARDUINO_A0_PIN 1 // Analog channel 0
#define ARDUINO_A1_PIN 2 // Analog channel 1
#define ARDUINO_A2_PIN 3 // Analog channel 2
#define ARDUINO_A3_PIN 4 // Analog channel 3
#define ARDUINO_A4_PIN 5 // Analog channel 4
#define ARDUINO_A5_PIN 6 // Analog channel 5
// Low frequency clock source to be used by the SoftDevice
#ifdef S210
#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM
#else
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#endif
#ifdef __cplusplus
}
#endif
#endif // PCA10028_H

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10031_H
#define PCA10031_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs definitions for PCA10031
#define LEDS_NUMBER 3
#define LED_START 21
#define LED_RGB_RED 21
#define LED_RGB_GREEN 22
#define LED_RGB_BLUE 23
#define LED_STOP 23
#define LEDS_ACTIVE_STATE 1
#define LEDS_INV_MASK LEDS_MASK
#define LED_RGB_RED_MASK (1<<LED_RGB_RED)
#define LED_RGB_GREEN_MASK (1<<LED_RGB_GREEN)
#define LED_RGB_BLUE_MASK (1<<LED_RGB_BLUE)
#define LEDS_LIST { LED_RGB_RED, LED_RGB_GREEN, LED_RGB_BLUE}
// defining RGB led as 3 single LEDs
#define BSP_LED_0 LED_RGB_RED
#define BSP_LED_1 LED_RGB_GREEN
#define BSP_LED_2 LED_RGB_BLUE
// there are no user buttons
#define BUTTONS_NUMBER 0
#define BUTTONS_LIST {}
// UART connection with J-Link
#define RX_PIN_NUMBER 11
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 10
#define RTS_PIN_NUMBER 8
#define HWFC true
// Low frequency clock source to be used by the SoftDevice
#ifdef S210
#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM
#else
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#endif
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10036_H
#define PCA10036_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs definitions for PCA10036
#define LEDS_NUMBER 4
#define LED_START 17
#define LED_1 17
#define LED_2 18
#define LED_3 19
#define LED_4 20
#define LED_STOP 20
#define LEDS_ACTIVE_STATE 0
#define LEDS_INV_MASK LEDS_MASK
#define LEDS_LIST { LED_1, LED_2, LED_3, LED_4 }
#define BSP_LED_0 LED_1
#define BSP_LED_1 LED_2
#define BSP_LED_2 LED_3
#define BSP_LED_3 LED_4
#define BUTTONS_NUMBER 4
#define BUTTON_START 13
#define BUTTON_1 13
#define BUTTON_2 14
#define BUTTON_3 15
#define BUTTON_4 16
#define BUTTON_STOP 16
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BUTTONS_LIST { BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4 }
#define BSP_BUTTON_0 BUTTON_1
#define BSP_BUTTON_1 BUTTON_2
#define BSP_BUTTON_2 BUTTON_3
#define BSP_BUTTON_3 BUTTON_4
#define RX_PIN_NUMBER 8
#define TX_PIN_NUMBER 6
#define CTS_PIN_NUMBER 7
#define RTS_PIN_NUMBER 5
#define HWFC true
#define SPIS_MISO_PIN 28 // SPI MISO signal.
#define SPIS_CSN_PIN 12 // SPI CSN signal.
#define SPIS_MOSI_PIN 25 // SPI MOSI signal.
#define SPIS_SCK_PIN 29 // SPI SCK signal.
#define SPIM0_SCK_PIN 29 // SPI clock GPIO pin number.
#define SPIM0_MOSI_PIN 25 // SPI Master Out Slave In GPIO pin number.
#define SPIM0_MISO_PIN 28 // SPI Master In Slave Out GPIO pin number.
#define SPIM0_SS_PIN 12 // SPI Slave Select GPIO pin number.
#define SPIM1_SCK_PIN 2 // SPI clock GPIO pin number.
#define SPIM1_MOSI_PIN 3 // SPI Master Out Slave In GPIO pin number.
#define SPIM1_MISO_PIN 4 // SPI Master In Slave Out GPIO pin number.
#define SPIM1_SS_PIN 5 // SPI Slave Select GPIO pin number.
#define SPIM2_SCK_PIN 12 // SPI clock GPIO pin number.
#define SPIM2_MOSI_PIN 13 // SPI Master Out Slave In GPIO pin number.
#define SPIM2_MISO_PIN 14 // SPI Master In Slave Out GPIO pin number.
#define SPIM2_SS_PIN 15 // SPI Slave Select GPIO pin number.
// serialization APPLICATION board - temp. setup for running serialized MEMU tests
#define SER_APP_RX_PIN 23 // UART RX pin number.
#define SER_APP_TX_PIN 24 // UART TX pin number.
#define SER_APP_CTS_PIN 2 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 25 // UART Request To Send pin number.
#define SER_APP_SPIM0_SCK_PIN 27 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 2 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 26 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 23 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number
// serialization CONNECTIVITY board
#define SER_CON_RX_PIN 24 // UART RX pin number.
#define SER_CON_TX_PIN 23 // UART TX pin number.
#define SER_CON_CTS_PIN 25 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 2 // UART Request To Send pin number. Not used if HWFC is set to false.
#define SER_CON_SPIS_SCK_PIN 27 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 2 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 26 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 23 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number.
#define SER_CONN_CHIP_RESET_PIN 11 // Pin used to reset connectivity chip
// Arduino board mappings
#define ARDUINO_SCL_PIN 27 // SCL signal pin
#define ARDUINO_SDA_PIN 26 // SDA signal pin
#define ARDUINO_AREF_PIN 2 // Aref pin
#define ARDUINO_13_PIN 25 // Digital pin 13
#define ARDUINO_12_PIN 24 // Digital pin 12
#define ARDUINO_11_PIN 23 // Digital pin 11
#define ARDUINO_10_PIN 22 // Digital pin 10
#define ARDUINO_9_PIN 20 // Digital pin 9
#define ARDUINO_8_PIN 19 // Digital pin 8
#define ARDUINO_7_PIN 18 // Digital pin 7
#define ARDUINO_6_PIN 17 // Digital pin 6
#define ARDUINO_5_PIN 16 // Digital pin 5
#define ARDUINO_4_PIN 15 // Digital pin 4
#define ARDUINO_3_PIN 14 // Digital pin 3
#define ARDUINO_2_PIN 13 // Digital pin 2
#define ARDUINO_1_PIN 12 // Digital pin 1
#define ARDUINO_0_PIN 11 // Digital pin 0
#define ARDUINO_A0_PIN 3 // Analog channel 0
#define ARDUINO_A1_PIN 4 // Analog channel 1
#define ARDUINO_A2_PIN 28 // Analog channel 2
#define ARDUINO_A3_PIN 29 // Analog channel 3
#define ARDUINO_A4_PIN 30 // Analog channel 4
#define ARDUINO_A5_PIN 31 // Analog channel 5
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif // PCA10036_H

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10040_H
#define PCA10040_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs definitions for PCA10040
#define LEDS_NUMBER 4
#define LED_START 17
#define LED_1 17
#define LED_2 18
#define LED_3 19
#define LED_4 20
#define LED_STOP 20
#define LEDS_ACTIVE_STATE 0
#define LEDS_INV_MASK LEDS_MASK
#define LEDS_LIST { LED_1, LED_2, LED_3, LED_4 }
#define BSP_LED_0 LED_1
#define BSP_LED_1 LED_2
#define BSP_LED_2 LED_3
#define BSP_LED_3 LED_4
#define BUTTONS_NUMBER 4
#define BUTTON_START 13
#define BUTTON_1 13
#define BUTTON_2 14
#define BUTTON_3 15
#define BUTTON_4 16
#define BUTTON_STOP 16
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BUTTONS_LIST { BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4 }
#define BSP_BUTTON_0 BUTTON_1
#define BSP_BUTTON_1 BUTTON_2
#define BSP_BUTTON_2 BUTTON_3
#define BSP_BUTTON_3 BUTTON_4
#define RX_PIN_NUMBER 8
#define TX_PIN_NUMBER 6
#define CTS_PIN_NUMBER 7
#define RTS_PIN_NUMBER 5
#define HWFC true
#define SPIS_MISO_PIN 28 // SPI MISO signal.
#define SPIS_CSN_PIN 12 // SPI CSN signal.
#define SPIS_MOSI_PIN 25 // SPI MOSI signal.
#define SPIS_SCK_PIN 29 // SPI SCK signal.
#define SPIM0_SCK_PIN 29 // SPI clock GPIO pin number.
#define SPIM0_MOSI_PIN 25 // SPI Master Out Slave In GPIO pin number.
#define SPIM0_MISO_PIN 28 // SPI Master In Slave Out GPIO pin number.
#define SPIM0_SS_PIN 12 // SPI Slave Select GPIO pin number.
#define SPIM1_SCK_PIN 2 // SPI clock GPIO pin number.
#define SPIM1_MOSI_PIN 3 // SPI Master Out Slave In GPIO pin number.
#define SPIM1_MISO_PIN 4 // SPI Master In Slave Out GPIO pin number.
#define SPIM1_SS_PIN 5 // SPI Slave Select GPIO pin number.
#define SPIM2_SCK_PIN 12 // SPI clock GPIO pin number.
#define SPIM2_MOSI_PIN 13 // SPI Master Out Slave In GPIO pin number.
#define SPIM2_MISO_PIN 14 // SPI Master In Slave Out GPIO pin number.
#define SPIM2_SS_PIN 15 // SPI Slave Select GPIO pin number.
// serialization APPLICATION board - temp. setup for running serialized MEMU tests
#define SER_APP_RX_PIN 23 // UART RX pin number.
#define SER_APP_TX_PIN 24 // UART TX pin number.
#define SER_APP_CTS_PIN 2 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 25 // UART Request To Send pin number.
#define SER_APP_SPIM0_SCK_PIN 27 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 2 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 26 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 23 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number
// serialization CONNECTIVITY board
#define SER_CON_RX_PIN 24 // UART RX pin number.
#define SER_CON_TX_PIN 23 // UART TX pin number.
#define SER_CON_CTS_PIN 25 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 2 // UART Request To Send pin number. Not used if HWFC is set to false.
#define SER_CON_SPIS_SCK_PIN 27 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 2 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 26 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 23 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number.
#define SER_CONN_CHIP_RESET_PIN 11 // Pin used to reset connectivity chip
// Arduino board mappings
#define ARDUINO_SCL_PIN 27 // SCL signal pin
#define ARDUINO_SDA_PIN 26 // SDA signal pin
#define ARDUINO_AREF_PIN 2 // Aref pin
#define ARDUINO_13_PIN 25 // Digital pin 13
#define ARDUINO_12_PIN 24 // Digital pin 12
#define ARDUINO_11_PIN 23 // Digital pin 11
#define ARDUINO_10_PIN 22 // Digital pin 10
#define ARDUINO_9_PIN 20 // Digital pin 9
#define ARDUINO_8_PIN 19 // Digital pin 8
#define ARDUINO_7_PIN 18 // Digital pin 7
#define ARDUINO_6_PIN 17 // Digital pin 6
#define ARDUINO_5_PIN 16 // Digital pin 5
#define ARDUINO_4_PIN 15 // Digital pin 4
#define ARDUINO_3_PIN 14 // Digital pin 3
#define ARDUINO_2_PIN 13 // Digital pin 2
#define ARDUINO_1_PIN 12 // Digital pin 1
#define ARDUINO_0_PIN 11 // Digital pin 0
#define ARDUINO_A0_PIN 3 // Analog channel 0
#define ARDUINO_A1_PIN 4 // Analog channel 1
#define ARDUINO_A2_PIN 28 // Analog channel 2
#define ARDUINO_A3_PIN 29 // Analog channel 3
#define ARDUINO_A4_PIN 30 // Analog channel 4
#define ARDUINO_A5_PIN 31 // Analog channel 5
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif // PCA10040_H

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA10056_H
#define PCA10056_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs definitions for PCA10056
#define LEDS_NUMBER 4
#define LED_1 NRF_GPIO_PIN_MAP(0,13)
#define LED_2 NRF_GPIO_PIN_MAP(0,14)
#define LED_3 NRF_GPIO_PIN_MAP(0,15)
#define LED_4 NRF_GPIO_PIN_MAP(0,16)
#define LEDS_ACTIVE_STATE 0
#define LEDS_LIST { LED_1, LED_2, LED_3, LED_4 }
#define LEDS_INV_MASK LEDS_MASK
#define BSP_LED_0 13
#define BSP_LED_1 14
#define BSP_LED_2 15
#define BSP_LED_3 16
#define BUTTONS_NUMBER 4
#define BUTTON_1 11
#define BUTTON_2 12
#define BUTTON_3 24
#define BUTTON_4 25
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BUTTONS_LIST { BUTTON_1, BUTTON_2, BUTTON_3, BUTTON_4 }
#define BSP_BUTTON_0 BUTTON_1
#define BSP_BUTTON_1 BUTTON_2
#define BSP_BUTTON_2 BUTTON_3
#define BSP_BUTTON_3 BUTTON_4
#define RX_PIN_NUMBER 8
#define TX_PIN_NUMBER 6
#define CTS_PIN_NUMBER 7
#define RTS_PIN_NUMBER 5
#define HWFC true
#define BSP_QSPI_SCK_PIN 19
#define BSP_QSPI_CSN_PIN 17
#define BSP_QSPI_IO0_PIN 20
#define BSP_QSPI_IO1_PIN 21
#define BSP_QSPI_IO2_PIN 22
#define BSP_QSPI_IO3_PIN 23
// serialization APPLICATION board - temp. setup for running serialized MEMU tests
#define SER_APP_RX_PIN NRF_GPIO_PIN_MAP(1,13) // UART RX pin number.
#define SER_APP_TX_PIN NRF_GPIO_PIN_MAP(1,14) // UART TX pin number.
#define SER_APP_CTS_PIN NRF_GPIO_PIN_MAP(0,2) // UART Clear To Send pin number.
#define SER_APP_RTS_PIN NRF_GPIO_PIN_MAP(1,15) // UART Request To Send pin number.
#define SER_APP_SPIM0_SCK_PIN NRF_GPIO_PIN_MAP(0,27) // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN NRF_GPIO_PIN_MAP(0,2) // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN NRF_GPIO_PIN_MAP(0,26) // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN NRF_GPIO_PIN_MAP(1,13) // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN NRF_GPIO_PIN_MAP(1,15) // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN NRF_GPIO_PIN_MAP(1,14) // SPI REQUEST GPIO pin number
// serialization CONNECTIVITY board
#define SER_CON_RX_PIN NRF_GPIO_PIN_MAP(1,14) // UART RX pin number.
#define SER_CON_TX_PIN NRF_GPIO_PIN_MAP(1,13) // UART TX pin number.
#define SER_CON_CTS_PIN NRF_GPIO_PIN_MAP(1,15) // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN NRF_GPIO_PIN_MAP(0,2) // UART Request To Send pin number. Not used if HWFC is set to false.
#define SER_CON_SPIS_SCK_PIN NRF_GPIO_PIN_MAP(0,27) // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN NRF_GPIO_PIN_MAP(0,2) // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN NRF_GPIO_PIN_MAP(0,26) // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN NRF_GPIO_PIN_MAP(1,13) // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN NRF_GPIO_PIN_MAP(1,15) // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN NRF_GPIO_PIN_MAP(1,14) // SPI REQUEST GPIO pin number.
#define SER_CONN_CHIP_RESET_PIN NRF_GPIO_PIN_MAP(1,1) // Pin used to reset connectivity chip
// Arduino board mappings
#define ARDUINO_SCL_PIN 27 // SCL signal pin
#define ARDUINO_SDA_PIN 26 // SDA signal pin
#define ARDUINO_AREF_PIN 2 // Aref pin
#define ARDUINO_13_PIN NRF_GPIO_PIN_MAP(1, 15) // Digital pin 13
#define ARDUINO_12_PIN NRF_GPIO_PIN_MAP(1, 14) // Digital pin 12
#define ARDUINO_11_PIN NRF_GPIO_PIN_MAP(1, 13) // Digital pin 11
#define ARDUINO_10_PIN NRF_GPIO_PIN_MAP(1, 12) // Digital pin 10
#define ARDUINO_9_PIN NRF_GPIO_PIN_MAP(1, 11) // Digital pin 9
#define ARDUINO_8_PIN NRF_GPIO_PIN_MAP(1, 10) // Digital pin 8
#define ARDUINO_7_PIN NRF_GPIO_PIN_MAP(1, 8) // Digital pin 7
#define ARDUINO_6_PIN NRF_GPIO_PIN_MAP(1, 7) // Digital pin 6
#define ARDUINO_5_PIN NRF_GPIO_PIN_MAP(1, 6) // Digital pin 5
#define ARDUINO_4_PIN NRF_GPIO_PIN_MAP(1, 5) // Digital pin 4
#define ARDUINO_3_PIN NRF_GPIO_PIN_MAP(1, 4) // Digital pin 3
#define ARDUINO_2_PIN NRF_GPIO_PIN_MAP(1, 3) // Digital pin 2
#define ARDUINO_1_PIN NRF_GPIO_PIN_MAP(1, 2) // Digital pin 1
#define ARDUINO_0_PIN NRF_GPIO_PIN_MAP(1, 1) // Digital pin 0
#define ARDUINO_A0_PIN 3 // Analog channel 0
#define ARDUINO_A1_PIN 4 // Analog channel 1
#define ARDUINO_A2_PIN 28 // Analog channel 2
#define ARDUINO_A3_PIN 29 // Analog channel 3
#define ARDUINO_A4_PIN 30 // Analog channel 4
#define ARDUINO_A5_PIN 31 // Analog channel 5
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#ifdef __cplusplus
}
#endif
#endif // PCA10056_H

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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/boards/pca20006.h Normal file
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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef PCA20006_H
#define PCA20006_H
#ifdef __cplusplus
extern "C" {
#endif
#include "nrf_gpio.h"
// LEDs and buttons definition for PCA20006 board (beacon)
#define LEDS_NUMBER 3
#define LED_RGB_RED 16
#define LED_RGB_GREEN 12
#define LED_RGB_BLUE 15
#define LEDS_ACTIVE_STATE 0
#define BSP_LED_0 LED_RGB_RED
#define BSP_LED_1 LED_RGB_GREEN
#define BSP_LED_2 LED_RGB_BLUE
#define LEDS_LIST { LED_RGB_RED, LED_RGB_GREEN, LED_RGB_BLUE}
#define LEDS_INV_MASK LEDS_MASK
#define BUTTON_0 8
#define BUTTON_1 18
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 BUTTON_0
#define BSP_BUTTON_1 BUTTON_1
#define BUTTONS_NUMBER 2
#define BUTTONS_LIST { BUTTON_0, BUTTON_1 }
#define RX_PIN_NUMBER 24
#define TX_PIN_NUMBER 9
#define CTS_PIN_NUMBER 21
#define RTS_PIN_NUMBER 11
#define HWFC true
// Low frequency clock source to be used by the SoftDevice
#ifdef S210
#define NRF_CLOCK_LFCLKSRC NRF_CLOCK_LFCLKSRC_XTAL_20_PPM
#else
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, .rc_ctiv = 0, .rc_temp_ctiv = 0, .xtal_accuracy=NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#endif
#ifdef __cplusplus
}
#endif
#endif

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef WT51822_H
#define WT51822_H
#ifdef __cplusplus
extern "C" {
#endif
#define LEDS_NUMBER 3
#define LED_1 3
#define LED_2 4
#define LED_3 5
#define LEDS_LIST { LED_1, LED_2, LED_3 }
#define LEDS_ACTIVE_STATE 0
#define BSP_LED_0 LED_1
#define BSP_LED_1 LED_2
#define BSP_LED_2 LED_3
#define LEDS_INV_MASK LEDS_MASK
#define BUTTONS_NUMBER 3
#define SW_1 0
#define SW_2 1
#define SW_3 2
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_LIST { SW_1, SW_2, SW_3 }
#define BUTTONS_ACTIVE_STATE 0
#define BSP_BUTTON_0 SW_1
#define BSP_BUTTON_1 SW_2
#define BSP_BUTTON_2 SW_3
#define RX_PIN_NUMBER 13
#define TX_PIN_NUMBER 12
#define CTS_PIN_NUMBER 14
#define RTS_PIN_NUMBER 15
#define HWFC true
#define SER_CON_RX_PIN 13
#define SER_CON_TX_PIN 12
#define SER_CON_CTS_PIN 14
#define SER_CON_RTS_PIN 15
#ifdef __cplusplus
}
#endif
#endif

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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/device/nrf.h
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#endif /* NRF51, NRF52832_XXAA, NRF52840_XXAA */
#include "compiler_abstraction.h"
#include "irq_handlers_hw.h"
#endif /* _WIN32 || __unix || __APPLE__ */

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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/hal/nrf_power.h Normal file
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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/power/nrf_drv_power.c Normal file
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/* Copyright (c) Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "sdk_config.h"
#if POWER_ENABLED
#include "nrf_drv_power.h"
#include "nrf_assert.h"
#include "nordic_common.h"
/* Validate configuration */
INTERRUPT_PRIORITY_VALIDATION(POWER_CONFIG_IRQ_PRIORITY);
/**
* @internal
* @defgroup nrf_drv_power_internals POWER driver internals
* @ingroup nrf_drv_power
*
* Internal variables, auxiliary macros and functions of POWER driver.
* @{
*/
/**
* @brief Default configuration
*
* The structure with default configuration data.
* This structure would be used if configuration pointer given
* to the @ref nrf_drv_power_init is set to NULL.
*/
static const nrf_drv_power_config_t m_drv_power_config_default =
{
.dcdcen = POWER_CONFIG_DEFAULT_DCDCEN,
#if NRF_POWER_HAS_VDDH
.dcdcenhv = POWER_CONFIG_DEFAULT_DCDCENHV,
#endif
};
/**
* @brief The initialization flag
*/
static bool m_initialized;
/**
* @brief The handler of power fail comparator warning event
*/
static nrf_drv_power_pofwarn_event_handler_t m_pofwarn_handler;
#if NRF_POWER_HAS_SLEEPEVT
/**
* @brief The handler of sleep event handler
*/
static nrf_drv_power_sleep_event_handler_t m_sleepevt_handler;
#endif
#if NRF_POWER_HAS_USBREG
/**
* @brief The handler of USB power events
*/
static nrf_drv_power_usb_event_handler_t m_usbevt_handler;
#endif
/** @} */
bool nrf_drv_power_init_check(void)
{
return m_initialized;
}
ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config)
{
nrf_drv_power_config_t const * p_used_config;
if(m_initialized)
{
return NRF_ERROR_MODULE_ALREADY_INITIALIZED;
}
p_used_config = (p_config != NULL) ?
p_config : (&m_drv_power_config_default);
nrf_power_dcdcen_set(p_used_config->dcdcen);
#if NRF_POWER_HAS_VDDH
nrf_power_dcdcen_vddh_set(p_used_config->dcdcenhv);
#endif
nrf_drv_common_power_clock_irq_init();
m_initialized = true;
return NRF_SUCCESS;
}
void nrf_drv_power_uninit(void)
{
ASSERT(m_initialized);
nrf_drv_power_pof_uninit();
#if NRF_POWER_HAS_SLEEPEVT
nrf_drv_power_sleepevt_uninit();
#endif
#if NRF_POWER_HAS_USBREG
nrf_drv_power_usbevt_uninit();
#endif
m_initialized = false;
}
void nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config)
{
ASSERT(p_config != NULL);
nrf_drv_power_pof_uninit();
nrf_power_pofcon_set(true, p_config->thr);
#if NRF_POWER_HAS_VDDH
nrf_power_pofcon_vddh_set(p_config->thrvddh);
#endif
if(p_config->handler != NULL)
{
m_pofwarn_handler = p_config->handler;
nrf_power_int_enable(NRF_POWER_INT_POFWARN_MASK);
}
}
void nrf_drv_power_pof_uninit(void)
{
nrf_power_int_disable(NRF_POWER_INT_POFWARN_MASK);
m_pofwarn_handler = NULL;
}
#if NRF_POWER_HAS_SLEEPEVT
void nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config)
{
ASSERT(p_config != NULL);
nrf_drv_power_sleepevt_uninit();
if(p_config->handler != NULL)
{
uint32_t enmask = 0;
m_sleepevt_handler = p_config->handler;
if(p_config->en_enter)
{
enmask |= NRF_POWER_INT_SLEEPENTER_MASK;
}
if(p_config->en_exit)
{
enmask |= NRF_POWER_INT_SLEEPEXIT_MASK;
}
nrf_power_int_enable(enmask);
}
}
void nrf_drv_power_sleepevt_uninit(void)
{
nrf_power_int_disable(
NRF_POWER_INT_SLEEPENTER_MASK |
NRF_POWER_INT_SLEEPEXIT_MASK);
m_sleepevt_handler = NULL;
}
#endif /* NRF_POWER_HAS_SLEEPEVT */
#if NRF_POWER_HAS_USBREG
void nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config)
{
nrf_drv_power_usbevt_uninit();
if(p_config->handler != NULL)
{
m_usbevt_handler = p_config->handler;
nrf_power_int_enable(
NRF_POWER_INT_USBDETECTED_MASK |
NRF_POWER_INT_USBREMOVED_MASK |
NRF_POWER_INT_USBPWRRDY_MASK);
}
}
void nrf_drv_power_usbevt_uninit(void)
{
nrf_power_int_disable(
NRF_POWER_INT_USBDETECTED_MASK |
NRF_POWER_INT_USBREMOVED_MASK |
NRF_POWER_INT_USBPWRRDY_MASK);
m_usbevt_handler = NULL;
}
#endif /* NRF_POWER_HAS_USBREG */
/**
* @ingroup nrf_drv_power_internals
* @brief Interrupt handler
*
* POWER peripheral interrupt handler
*/
#if NRF_DRV_COMMON_POWER_CLOCK_ISR
void nrf_drv_power_onIRQ(void)
#else
void POWER_POWER_IRQHandler(void)
#endif
{
uint32_t enabled = nrf_power_int_enable_get();
if((0 != (enabled & NRF_POWER_INT_POFWARN_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_POFWARN))
{
ASSERT(m_pofwarn_handler != NULL); /* Cannot be null if event is enabled */
m_pofwarn_handler();
}
#if NRF_POWER_HAS_SLEEPEVT
if((0 != (enabled & NRF_POWER_INT_SLEEPENTER_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPENTER))
{
ASSERT(m_sleepevt_handler != NULL); /* Cannot be null if event is enabled */
m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_ENTER);
}
if((0 != (enabled & NRF_POWER_INT_SLEEPEXIT_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_SLEEPEXIT))
{
ASSERT(m_sleepevt_handler != NULL); /* Cannot be null if event is enabled */
m_sleepevt_handler(NRF_DRV_POWER_SLEEP_EVT_EXIT);
}
#endif
#if NRF_POWER_HAS_USBREG
if((0 != (enabled & NRF_POWER_INT_USBDETECTED_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBDETECTED))
{
ASSERT(m_usbevt_handler != NULL); /* Cannot be null if event is enabled */
m_usbevt_handler(NRF_DRV_POWER_USB_EVT_DETECTED);
}
if((0 != (enabled & NRF_POWER_INT_USBREMOVED_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBREMOVED))
{
ASSERT(m_usbevt_handler != NULL); /* Cannot be null if event is enabled */
m_usbevt_handler(NRF_DRV_POWER_USB_EVT_REMOVED);
}
if((0 != (enabled & NRF_POWER_INT_USBPWRRDY_MASK)) &&
nrf_power_event_get_and_clear(NRF_POWER_EVENT_USBPWRRDY))
{
ASSERT(m_usbevt_handler != NULL); /* Cannot be null if event is enabled */
m_usbevt_handler(NRF_DRV_POWER_USB_EVT_READY);
}
#endif
}
#endif /* POWER_ENABLED */

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/* Copyright (c) Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef NRF_DRV_POWER_H__
#define NRF_DRV_POWER_H__
#include <stdbool.h>
#include <stdint.h>
#include "nrf_power.h"
#include "sdk_config.h"
#include "nrf_drv_common.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_power Power HAL and driver
* @ingroup nrf_drivers
* @brief POWER peripheral APIs.
*
* The power peripheral HAL provides basic APIs for accessing
* the registers of the POWER peripheral.
* The POWER driver provides APIs on a higher level.
*/
/**
* @defgroup nrf_drv_power POWER driver
* @{
* @ingroup nrf_power
* @brief Driver for managing events and the state of POWER peripheral.
*
*/
/**
* @brief Power mode possible configurations
*/
typedef enum
{
NRF_DRV_POWER_MODE_CONSTLAT, /**< Constant latency mode *///!< NRF_DRV_POWER_MODE_CONSTLAT
NRF_DRV_POWER_MODE_LOWPWR /**< Low power mode *///!< NRF_DRV_POWER_MODE_LOWPWR
}nrf_drv_power_mode_t;
#if NRF_POWER_HAS_SLEEPEVT
/**
* @brief Events from power system
*/
typedef enum
{
NRF_DRV_POWER_SLEEP_EVT_ENTER, /**< CPU entered WFI/WFE sleep
*
* Keep in mind that if this interrupt is enabled,
* it means that CPU was waken up just after WFI by this interrupt.
*/
NRF_DRV_POWER_SLEEP_EVT_EXIT /**< CPU exited WFI/WFE sleep */
}nrf_drv_power_sleep_evt_t;
#endif /* NRF_POWER_HAS_SLEEPEVT */
#if NRF_POWER_HAS_USBREG
/**
* @brief Events from USB power system
*/
typedef enum
{
NRF_DRV_POWER_USB_EVT_DETECTED, /**< USB power detected on the connector (plugged in). */
NRF_DRV_POWER_USB_EVT_REMOVED, /**< USB power removed from the connector. */
NRF_DRV_POWER_USB_EVT_READY /**< USB power regulator ready. */
}nrf_drv_power_usb_evt_t;
/**
* @brief USB power state
*
* The single enumerator that holds all data about current state of USB
* related POWER.
*
* Organized this way that higher power state has higher numeric value
*/
typedef enum
{
NRF_DRV_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */
NRF_DRV_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */
NRF_DRV_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */
}nrf_drv_power_usb_state_t;
#endif /* NRF_POWER_HAS_USBREG */
/**
* @name Callback types
*
* Defined types of callback functions
* @{
*/
/**
* @brief Event handler for power failure warning
*/
typedef void (*nrf_drv_power_pofwarn_event_handler_t)(void);
#if NRF_POWER_HAS_SLEEPEVT
/**
* @brief Event handler for entering/exiting sleep
*
* @param event Event type
*/
typedef void (*nrf_drv_power_sleep_event_handler_t)(nrf_drv_power_sleep_evt_t event);
#endif
#if NRF_POWER_HAS_USBREG
/**
* @brief Event handler for USB related power events
*
* @param event Event type
*/
typedef void (*nrf_drv_power_usb_event_handler_t)(nrf_drv_power_usb_evt_t event);
#endif
/** @} */
/**
* @brief General power configuration
*
* Parameters required to initialize power driver.
*/
typedef struct
{
/**
* @brief Enable main DCDC regulator
*
* This bit only informs the driver that elements for DCDC regulator
* are installed and regulator can be used.
* The regulator would be enabled or disabled automatically
* automatically by the hardware, basing on current power requirement.
*/
bool dcdcen:1;
#if NRF_POWER_HAS_VDDH
/**
* @brief Enable HV DCDC regulator
*
* This bit only informs the driver that elements for DCDC regulator
* are installed and regulator can be used.
* The regulator would be enabled or disabled automatically
* automatically by the hardware, basing on current power requirement.
*/
bool dcdcenhv: 1;
#endif
}nrf_drv_power_config_t;
/**
* @brief The configuration for power failure comparator
*
* Configuration used to enable and configure power failure comparator
*/
typedef struct
{
nrf_drv_power_pofwarn_event_handler_t handler; //!< Event handler
nrf_power_pof_thr_t thr; //!< Threshold for power failure detection
#if NRF_POWER_HAS_VDDH
nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin
#endif
}nrf_drv_power_pofwarn_config_t;
#if NRF_POWER_HAS_SLEEPEVT
/**
* @brief The configuration of sleep event processing
*
* Configuration used to enable and configure sleep event handling
*/
typedef struct
{
nrf_drv_power_sleep_event_handler_t handler; //!< Event handler
bool en_enter:1; //!< Enable event on sleep entering
bool en_exit :1; //!< Enable event on sleep exiting
}nrf_drv_power_sleepevt_config_t;
#endif
#if NRF_POWER_HAS_USBREG
/**
* @brief The configuration of USB related power events
*
* Configuration used to enable and configure USB power event handling
*/
typedef struct
{
nrf_drv_power_usb_event_handler_t handler; //!< Event processing
}nrf_drv_power_usbevt_config_t;
#endif /* NRF_POWER_HAS_USBREG */
/**
* @brief Function for checking if driver is already initialized
*
* This function is used to check whatever common POWER_CLOCK common interrupt
* should be disabled or not if @ref nrf_drv_clock tries to disable the interrupt.
*
* @retval true Driver is initialized
* @retval false Driver is uninitialized
*
* @sa nrf_drv_power_uninit
*/
bool nrf_drv_power_init_check(void);
/**
* @brief Initialize power module driver
*
* Enabled power module driver would process all the interrupts from power system.
*
* @param[in] p_config Driver configuration. Can be NULL - the default configuration
* from @em sdk_config.h file would be used then.
*
* @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED Module is initialized already.
* @retval NRF_SUCCESS Successfully initialized.
*/
ret_code_t nrf_drv_power_init(nrf_drv_power_config_t const * p_config);
/**
* @brief Unintialize power module driver
*
* Disables all the interrupt handling in the module.
*
* @sa nrf_drv_power_init
*/
void nrf_drv_power_uninit(void);
/**
* @brief Initialize power failure comparator
*
* Configures and setups the power failure comparator and enables it.
*
* @param[in] p_config Configuration with values and event handler.
* If event handler is set to NULL, interrupt would be disabled.
*/
void nrf_drv_power_pof_init(nrf_drv_power_pofwarn_config_t const * p_config);
/**
* @brief Turn off the power failure comparator
*
* Disables and clears the settings of the power failure comparator.
*/
void nrf_drv_power_pof_uninit(void);
#if NRF_POWER_HAS_SLEEPEVT
/**
* @brief Initialize sleep entering and exiting events processing
*
* Configures and setups the sleep event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
* @sa nrf_drv_power_sleepevt_uninit
*/
void nrf_drv_power_sleepevt_init(nrf_drv_power_sleepevt_config_t const * p_config);
/**
* @brief Uninitialize sleep entering and exiting events processing
*
* @sa nrf_drv_power_sleepevt_init
*/
void nrf_drv_power_sleepevt_uninit(void);
#endif /* NRF_POWER_HAS_SLEEPEVT */
#if NRF_POWER_HAS_USBREG
/**
* @brief Initialize USB power event processing
*
* Configures and setups the USB power event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
* @sa nrf_drv_power_usbevt_uninit
*/
void nrf_drv_power_usbevt_init(nrf_drv_power_usbevt_config_t const * p_config);
/**
* @brief Uninitalize USB power event processing
*
* @sa nrf_drv_power_usbevt_init
*/
void nrf_drv_power_usbevt_uninit(void);
/**
* @brief Get the status of USB power
*
* @return Current USB power status
*/
__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void);
#endif /* NRF_POWER_HAS_USBREG */
/** @} */
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
#if NRF_POWER_HAS_USBREG
__STATIC_INLINE nrf_drv_power_usb_state_t nrf_drv_power_usbstatus_get(void)
{
uint32_t status = nrf_power_usbregstatus_get();
if(0 == (status & NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK))
{
return NRF_DRV_POWER_USB_STATE_DISCONNECTED;
}
if(0 == (status & NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK))
{
return NRF_DRV_POWER_USB_STATE_CONNECTED;
}
return NRF_DRV_POWER_USB_STATE_READY;
}
#endif /* NRF_POWER_HAS_USBREG */
#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
#ifdef __cplusplus
}
#endif
#endif /* NRF_DRV_POWER_H__ */

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/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "nrf_drv_common.h"
#include "nrf_error.h"
#include "nrf_assert.h"
#include <stdbool.h>
#include <stdint.h>
#include <stdlib.h>
#include "nrf_drv_swi.h"
#include "app_util_platform.h"
#define NRF_LOG_MODULE_NAME "SWI"
#if EGU_ENABLED
#if SWI_CONFIG_LOG_ENABLED
#define NRF_LOG_LEVEL SWI_CONFIG_LOG_LEVEL
#define NRF_LOG_INFO_COLOR SWI_CONFIG_INFO_COLOR
#define NRF_LOG_DEBUG_COLOR SWI_CONFIG_DEBUG_COLOR
#else //SWI_CONFIG_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif //SWI_CONFIG_LOG_ENABLED
#endif //EGU_ENABLED
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
STATIC_ASSERT(SWI_COUNT > 0);
STATIC_ASSERT(SWI_COUNT <= SWI_MAX);
#ifdef SWI_DISABLE0
#undef SWI_DISABLE0
#define SWI_DISABLE0 1uL
#else
#if SWI_COUNT > 0
#define SWI_DISABLE0 0uL
#else
#define SWI_DISABLE0 1uL
#endif
#endif
#ifdef SWI_DISABLE1
#undef SWI_DISABLE1
#define SWI_DISABLE1 1uL
#else
#if SWI_COUNT > 1
#define SWI_DISABLE1 0uL
#else
#define SWI_DISABLE1 1uL
#endif
#endif
#ifdef SWI_DISABLE2
#undef SWI_DISABLE2
#define SWI_DISABLE2 1uL
#else
#if SWI_COUNT > 2
#define SWI_DISABLE2 0uL
#else
#define SWI_DISABLE2 1uL
#endif
#endif
#ifdef SWI_DISABLE3
#undef SWI_DISABLE3
#define SWI_DISABLE3 1uL
#else
#if SWI_COUNT > 3
#define SWI_DISABLE3 0uL
#else
#define SWI_DISABLE3 1uL
#endif
#endif
#ifdef SWI_DISABLE4
#undef SWI_DISABLE4
#define SWI_DISABLE4 1uL
#else
#if SWI_COUNT > 4
#define SWI_DISABLE4 0uL
#else
#define SWI_DISABLE4 1uL
#endif
#endif
#ifdef SWI_DISABLE5
#undef SWI_DISABLE5
#define SWI_DISABLE5 1uL
#else
#if SWI_COUNT > 5
#define SWI_DISABLE5 0uL
#else
#define SWI_DISABLE5 1uL
#endif
#endif
#define SWI_START_NUMBER ( (SWI_DISABLE0) \
+ (SWI_DISABLE0 * SWI_DISABLE1) \
+ (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2) \
+ (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3) \
+ (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3 * SWI_DISABLE4) \
+ (SWI_DISABLE0 * SWI_DISABLE1 * SWI_DISABLE2 * SWI_DISABLE3 * SWI_DISABLE4 \
* SWI_DISABLE5) )
#define SWI_ARRAY_SIZE (SWI_COUNT - SWI_START_NUMBER)
#if (SWI_COUNT <= SWI_START_NUMBER)
#undef SWI_ARRAY_SIZE
#define SWI_ARRAY_SIZE 1
#endif
static nrf_drv_state_t m_drv_state = NRF_DRV_STATE_UNINITIALIZED;
static nrf_swi_handler_t m_swi_handlers[SWI_ARRAY_SIZE];
#if !EGU_ENABLED
static nrf_swi_flags_t m_swi_flags[SWI_ARRAY_SIZE];
#endif
/**@brief Function for getting max channel number of given SWI.
*
* @param[in] swi SWI number.
* @return number of available channels.
*/
#if NRF_MODULE_ENABLED(EGU)
__STATIC_INLINE uint32_t swi_channel_number(nrf_swi_t swi)
{
uint32_t retval = 0;
switch(swi){
case 0:
retval = EGU0_CH_NUM;
break;
case 1:
retval = EGU1_CH_NUM;
break;
case 2:
retval = EGU2_CH_NUM;
break;
case 3:
retval = EGU3_CH_NUM;
break;
case 4:
retval = EGU4_CH_NUM;
break;
case 5:
retval = EGU5_CH_NUM;
break;
default:
retval = 0;
}
return retval;
}
#else
#define swi_channel_number(swi) SWI_MAX_FLAGS
#endif
#if NRF_MODULE_ENABLED(EGU)
/**@brief Get the specific EGU instance. */
__STATIC_INLINE NRF_EGU_Type * egu_instance_get(nrf_swi_t swi)
{
return (NRF_EGU_Type*) (NRF_EGU0_BASE + (((uint32_t) swi) * (NRF_EGU1_BASE - NRF_EGU0_BASE)));
}
/**@brief Software interrupt handler (using EGU). */
static void nrf_drv_swi_process(nrf_swi_t swi)
{
ASSERT(m_swi_handlers[swi - SWI_START_NUMBER]);
nrf_swi_flags_t flags = 0;
NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi);
for (uint8_t i = 0; i < swi_channel_number(swi); ++i)
{
nrf_egu_event_t egu_event = nrf_egu_event_triggered_get(NRF_EGUx, i);
if (nrf_egu_event_check(NRF_EGUx, egu_event))
{
flags |= (1u << i);
nrf_egu_event_clear(NRF_EGUx, egu_event);
}
}
m_swi_handlers[swi - SWI_START_NUMBER](swi, flags);
}
#define SWI_HANDLER_TEMPLATE(NUM) void SWI##NUM##_EGU##NUM##_IRQHandler(void) \
{ \
nrf_drv_swi_process(NUM); \
}
#else
/**@brief Software interrupt handler (without EGU). */
static void nrf_drv_swi_process(nrf_swi_t swi, nrf_swi_flags_t flags)
{
ASSERT(m_swi_handlers[swi - SWI_START_NUMBER]);
m_swi_flags[swi - SWI_START_NUMBER] &= ~flags;
m_swi_handlers[swi - SWI_START_NUMBER](swi, flags);
}
#define SWI_HANDLER_TEMPLATE(NUM) void SWI##NUM##_IRQHandler(void) \
{ \
nrf_drv_swi_process((NUM), m_swi_flags[(NUM) - SWI_START_NUMBER]); \
}
#endif
#if SWI_DISABLE0 == 0
SWI_HANDLER_TEMPLATE(0)
#endif
#if SWI_DISABLE1 == 0
SWI_HANDLER_TEMPLATE(1)
#endif
#if SWI_DISABLE2 == 0
SWI_HANDLER_TEMPLATE(2)
#endif
#if SWI_DISABLE3 == 0
SWI_HANDLER_TEMPLATE(3)
#endif
#if SWI_DISABLE4 == 0
SWI_HANDLER_TEMPLATE(4)
#endif
#if SWI_DISABLE5 == 0
SWI_HANDLER_TEMPLATE(5)
#endif
#define AVAILABLE_SWI (0x3FuL & ~( \
(SWI_DISABLE0 << 0) | (SWI_DISABLE1 << 1) | (SWI_DISABLE2 << 2) \
| (SWI_DISABLE3 << 3) | (SWI_DISABLE4 << 4) | (SWI_DISABLE5 << 5) \
))
#if (AVAILABLE_SWI == 0)
#warning No available SWIs.
#endif
/**@brief Function for converting SWI number to system interrupt number.
*
* @param[in] swi SWI number.
*
* @retval IRQ number.
*/
__STATIC_INLINE IRQn_Type nrf_drv_swi_irq_of(nrf_swi_t swi)
{
return (IRQn_Type)((uint32_t)SWI0_IRQn + (uint32_t)swi);
}
/**@brief Function for checking if given SWI is allocated.
*
* @param[in] swi SWI number.
*/
__STATIC_INLINE bool swi_is_allocated(nrf_swi_t swi)
{
ASSERT(swi < SWI_COUNT);
#if SWI_START_NUMBER > 0
if (swi < SWI_START_NUMBER)
{
return false;
}
#endif
/*lint -e(661) out of range case handled by assert above*/
return m_swi_handlers[swi - SWI_START_NUMBER];
}
ret_code_t nrf_drv_swi_init(void)
{
ret_code_t err_code;
if (m_drv_state == NRF_DRV_STATE_UNINITIALIZED)
{
m_drv_state = NRF_DRV_STATE_INITIALIZED;
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
err_code = NRF_ERROR_MODULE_ALREADY_INITIALIZED;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
void nrf_drv_swi_uninit(void)
{
ASSERT(m_drv_state != NRF_DRV_STATE_UNINITIALIZED)
for (uint32_t i = SWI_START_NUMBER; i < SWI_COUNT; ++i)
{
m_swi_handlers[i - SWI_START_NUMBER] = NULL;
nrf_drv_common_irq_disable(nrf_drv_swi_irq_of((nrf_swi_t) i));
#if NRF_MODULE_ENABLED(EGU)
NRF_EGU_Type * NRF_EGUx = egu_instance_get(i);
nrf_egu_int_disable(NRF_EGUx, NRF_EGU_INT_ALL);
#endif
}
m_drv_state = NRF_DRV_STATE_UNINITIALIZED;
return;
}
void nrf_drv_swi_free(nrf_swi_t * p_swi)
{
ASSERT(swi_is_allocated(*p_swi));
nrf_drv_common_irq_disable(nrf_drv_swi_irq_of(*p_swi));
m_swi_handlers[(*p_swi) - SWI_START_NUMBER] = NULL;
*p_swi = NRF_SWI_UNALLOCATED;
}
ret_code_t nrf_drv_swi_alloc(nrf_swi_t * p_swi, nrf_swi_handler_t event_handler, uint32_t priority)
{
ASSERT(event_handler);
uint32_t err_code = NRF_ERROR_NO_MEM;
for (uint32_t i = SWI_START_NUMBER; i < SWI_COUNT; i++)
{
CRITICAL_REGION_ENTER();
if ((!swi_is_allocated(i)) && (AVAILABLE_SWI & (1 << i)))
{
m_swi_handlers[i - SWI_START_NUMBER] = event_handler;
*p_swi = (nrf_swi_t) i;
nrf_drv_common_irq_enable(nrf_drv_swi_irq_of(*p_swi), priority);
#if NRF_MODULE_ENABLED(EGU)
NRF_EGU_Type * NRF_EGUx = egu_instance_get(i);
nrf_egu_int_enable(NRF_EGUx, NRF_EGU_INT_ALL);
#endif
err_code = NRF_SUCCESS;
}
CRITICAL_REGION_EXIT();
if (err_code == NRF_SUCCESS)
{
NRF_LOG_INFO("SWI channel allocated: %d.\r\n", (*p_swi));
break;
}
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
void nrf_drv_swi_trigger(nrf_swi_t swi, uint8_t flag_number)
{
ASSERT(swi_is_allocated((uint32_t) swi));
ASSERT(flag_number < swi_channel_number(swi));
#if NRF_MODULE_ENABLED(EGU)
NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi);
nrf_egu_task_trigger(NRF_EGUx, nrf_egu_task_trigger_get(NRF_EGUx, flag_number));
#else
m_swi_flags[swi - SWI_START_NUMBER] |= (1 << flag_number);
NVIC_SetPendingIRQ(nrf_drv_swi_irq_of(swi));
#endif
}
#if NRF_MODULE_ENABLED(EGU)
uint32_t nrf_drv_swi_task_trigger_address_get(nrf_swi_t swi, uint8_t channel)
{
NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi);
return (uint32_t) nrf_egu_task_trigger_addres_get(NRF_EGUx, channel);
}
uint32_t nrf_drv_swi_event_triggered_address_get(nrf_swi_t swi, uint8_t channel)
{
NRF_EGU_Type * NRF_EGUx = egu_instance_get(swi);
return (uint32_t) nrf_egu_event_triggered_addres_get(NRF_EGUx, channel);
}
#endif

191
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/swi/nrf_drv_swi.h
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@ -1,191 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**@file
*
* @defgroup nrf_drv_swi SWI driver
* @{
* @ingroup nrf_drivers
*
* @brief Driver for software interrupts (SWI).
* @details The SWI driver allows the user to allocate SWIs and pass extra flags to interrupt handler functions.
*/
#ifndef NRF_DRV_SWI_H__
#define NRF_DRV_SWI_H__
#include <stdbool.h>
#include <stdint.h>
#include "app_util.h"
#include "app_util_platform.h"
#include "sdk_common.h"
#include "sdk_errors.h"
#include "nrf_peripherals.h"
#ifndef EGU_ENABLED
#define EGU_ENABLED 0
#endif
#if NRF_MODULE_ENABLED(EGU)
#include "nrf_egu.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
typedef uint8_t nrf_swi_t; ///< @brief SWI channel (unsigned integer).
/** @brief SWI user flags (unsigned integer).
*
* User flags are set during the SWI trigger and passed to the callback function as an argument.
*/
typedef uint16_t nrf_swi_flags_t;
/** @brief Unallocated channel value. */
#define NRF_SWI_UNALLOCATED ((nrf_swi_t) 0xFFFFFFFFuL)
/** @brief SWI handler function.
*
* Takes two arguments: SWI number (nrf_swi_t) and flags (nrf_swi_flags_t).
*/
typedef void (* nrf_swi_handler_t)(nrf_swi_t, nrf_swi_flags_t);
/**@brief Maximum numbers of SWIs. This number is fixed for a specific chip. */
#if NRF_MODULE_ENABLED(EGU)
#define SWI_MAX EGU_COUNT
#else
#define SWI_MAX SWI_COUNT
/**@brief Number of flags per SWI (fixed number). */
#define SWI_MAX_FLAGS 16
#endif
#ifdef SOFTDEVICE_PRESENT
#if SWI_COUNT > 2
#undef SWI_COUNT
#define SWI_COUNT 2
#endif
#else
#ifdef SVCALL_AS_NORMAL_FUNCTION
// Serialization is enabled.
#if SWI_COUNT > 2
#undef SWI_COUNT
#define SWI_COUNT 2
#endif
#endif
#endif
/**@brief Default SWI priority. */
#define SWI_DEFAULT_PRIORITY APP_IRQ_PRIORITY_LOWEST
/**@brief Function for initializing the SWI module.
*
* @retval NRF_SUCCESS If the module was successfully initialized.
* @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the module has already been initialized.
*/
ret_code_t nrf_drv_swi_init(void);
/**@brief Function for uninitializing the SWI module.
*
* This function also disables all SWIs.
*/
void nrf_drv_swi_uninit(void);
/**@brief Function for allocating a first unused SWI instance and setting a handler.
* @details The event handler function returns void and takes one uint32_t argument (SWI number).
*
* @param[out] p_swi Pointer to the SWI that has been allocated.
* @param[in] event_handler Event handler function (must not be NULL).
* @param[in] priority Interrupt priority.
*
* @retval NRF_SUCCESS If the SWI was successfully allocated.
* @retval NRF_ERROR_NO_MEM If there is no available SWI to be used.
*/
ret_code_t nrf_drv_swi_alloc(nrf_swi_t * p_swi, nrf_swi_handler_t event_handler, uint32_t priority);
/**@brief Function for freeing a previously allocated SWI.
*
* @param[in,out] p_swi SWI to free. The value is changed to NRF_SWI_UNALLOCATED on success.
*/
void nrf_drv_swi_free(nrf_swi_t * p_swi);
/**@brief Function for triggering the SWI.
*
* @param[in] swi SWI to trigger.
* @param[in] flag_number Number of user flag to trigger.
*/
void nrf_drv_swi_trigger(nrf_swi_t swi, uint8_t flag_number);
#if (EGU_ENABLED > 0) || defined(__SDK_DOXYGEN__)
/**@brief Function for returning the EGU trigger task address.
*
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
*
* @returns EGU trigger task address.
*/
uint32_t nrf_drv_swi_task_trigger_address_get(nrf_swi_t swi, uint8_t channel);
/**@brief Function for returning the EGU triggered event address.
*
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
*
* @returns EGU triggered event address.
*/
uint32_t nrf_drv_swi_event_triggered_address_get(nrf_swi_t swi, uint8_t channel);
#endif // NRF_MODULE_ENABLED(EGU)
#ifdef __cplusplus
}
#endif
#endif // NRF_DRV_SWI_H__
/** @} */

20
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/twis_slave/nrf_drv_twis_inst.def Normal file
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@ -0,0 +1,20 @@
/**
* @file
* @brief Xmacro file with contains enumeration of TWIS instances to implement
*
* Use this file everywhere where anything has to be generated for all active TWIS instances.
* Xmacro format:
*
* @code
X(n)
* @endcode
*
* Where @em n is number of the instance itself (0 for NRF_TWIS0).
*/
#if (TWIS0_ENABLED == 1)
X(0)
#endif
#if (TWIS1_ENABLED == 1)
X(1)
#endif
#undef X

972
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/uart/nrf_drv_uart.c
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@ -1,972 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(UART)
#include "nrf_drv_uart.h"
#include "nrf_assert.h"
#include "nrf_drv_common.h"
#include "nrf_gpio.h"
#include "app_util_platform.h"
#define NRF_LOG_MODULE_NAME "UART"
#if UART_CONFIG_LOG_ENABLED
#define NRF_LOG_LEVEL UART_CONFIG_LOG_LEVEL
#define NRF_LOG_INFO_COLOR UART_CONFIG_INFO_COLOR
#define NRF_LOG_DEBUG_COLOR UART_CONFIG_DEBUG_COLOR
#define EVT_TO_STR(event) (event == NRF_UART_EVENT_ERROR ? "NRF_UART_EVENT_ERROR" : "UNKNOWN EVENT")
#else //UART_CONFIG_LOG_ENABLED
#define EVT_TO_STR(event) ""
#define NRF_LOG_LEVEL 0
#endif //UART_CONFIG_LOG_ENABLED
#include "nrf_log.h"
#include "nrf_log_ctrl.h"
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
// UARTE and UART combined
#define CODE_FOR_UARTE(code) if (m_cb[p_instance->drv_inst_idx].use_easy_dma) { code }
#define CODE_FOR_UARTE_INT(idx, code) if (m_cb[idx].use_easy_dma) { code }
#define CODE_FOR_UART(code) else { code }
#elif (defined(UARTE_IN_USE) && !defined(UART_IN_USE))
// UARTE only
#define CODE_FOR_UARTE(code) { code }
#define CODE_FOR_UARTE_INT(idx, code) { code }
#define CODE_FOR_UART(code)
#elif (!defined(UARTE_IN_USE) && defined(UART_IN_USE))
// UART only
#define CODE_FOR_UARTE(code)
#define CODE_FOR_UARTE_INT(idx, code)
#define CODE_FOR_UART(code) { code }
#else
#error "Wrong configuration."
#endif
#define TX_COUNTER_ABORT_REQ_VALUE 256
typedef struct
{
void * p_context;
nrf_uart_event_handler_t handler;
uint8_t const * p_tx_buffer;
uint8_t * p_rx_buffer;
uint8_t * p_rx_secondary_buffer;
volatile uint16_t tx_counter;
uint8_t tx_buffer_length;
uint8_t rx_buffer_length;
uint8_t rx_secondary_buffer_length;
volatile uint8_t rx_counter;
bool rx_enabled;
nrf_drv_state_t state;
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
bool use_easy_dma;
#endif
} uart_control_block_t;
static uart_control_block_t m_cb[UART_ENABLED_COUNT];
__STATIC_INLINE void apply_config(nrf_drv_uart_t const * p_instance, nrf_drv_uart_config_t const * p_config)
{
if (p_config->pseltxd != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_pin_set(p_config->pseltxd);
nrf_gpio_cfg_output(p_config->pseltxd);
}
if (p_config->pselrxd != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_input(p_config->pselrxd, NRF_GPIO_PIN_NOPULL);
}
CODE_FOR_UARTE
(
nrf_uarte_baudrate_set(p_instance->reg.p_uarte, (nrf_uarte_baudrate_t)p_config->baudrate);
nrf_uarte_configure(p_instance->reg.p_uarte, (nrf_uarte_parity_t)p_config->parity,
(nrf_uarte_hwfc_t)p_config->hwfc);
nrf_uarte_txrx_pins_set(p_instance->reg.p_uarte, p_config->pseltxd, p_config->pselrxd);
if (p_config->hwfc == NRF_UART_HWFC_ENABLED)
{
if (p_config->pselcts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL);
}
if (p_config->pselrts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_pin_set(p_config->pselrts);
nrf_gpio_cfg_output(p_config->pselrts);
}
nrf_uarte_hwfc_pins_set(p_instance->reg.p_uarte, p_config->pselrts, p_config->pselcts);
}
)
CODE_FOR_UART
(
nrf_uart_baudrate_set(p_instance->reg.p_uart, p_config->baudrate);
nrf_uart_configure(p_instance->reg.p_uart, p_config->parity, p_config->hwfc);
nrf_uart_txrx_pins_set(p_instance->reg.p_uart, p_config->pseltxd, p_config->pselrxd);
if (p_config->hwfc == NRF_UART_HWFC_ENABLED)
{
if (p_config->pselcts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_input(p_config->pselcts, NRF_GPIO_PIN_NOPULL);
}
if (p_config->pselrts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_pin_set(p_config->pselrts);
nrf_gpio_cfg_output(p_config->pselrts);
}
nrf_uart_hwfc_pins_set(p_instance->reg.p_uart, p_config->pselrts, p_config->pselcts);
}
)
}
__STATIC_INLINE void interrupts_enable(const nrf_drv_uart_t * p_instance, uint8_t interrupt_priority)
{
CODE_FOR_UARTE
(
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX);
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR);
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO);
nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uarte), interrupt_priority);
)
CODE_FOR_UART
(
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY);
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO);
nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_TXDRDY |
NRF_UART_INT_MASK_RXTO);
nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uart), interrupt_priority);
)
}
__STATIC_INLINE void interrupts_disable(const nrf_drv_uart_t * p_instance)
{
CODE_FOR_UARTE
(
nrf_uarte_int_disable(p_instance->reg.p_uarte, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uarte));
)
CODE_FOR_UART
(
nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY |
NRF_UART_INT_MASK_TXDRDY |
NRF_UART_INT_MASK_ERROR |
NRF_UART_INT_MASK_RXTO);
nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)p_instance->reg.p_uart));
)
}
__STATIC_INLINE void pins_to_default(const nrf_drv_uart_t * p_instance)
{
/* Reset pins to default states */
uint32_t txd;
uint32_t rxd;
uint32_t rts;
uint32_t cts;
CODE_FOR_UARTE
(
txd = nrf_uarte_tx_pin_get(p_instance->reg.p_uarte);
rxd = nrf_uarte_rx_pin_get(p_instance->reg.p_uarte);
rts = nrf_uarte_rts_pin_get(p_instance->reg.p_uarte);
cts = nrf_uarte_cts_pin_get(p_instance->reg.p_uarte);
nrf_uarte_txrx_pins_disconnect(p_instance->reg.p_uarte);
nrf_uarte_hwfc_pins_disconnect(p_instance->reg.p_uarte);
)
CODE_FOR_UART
(
txd = nrf_uart_tx_pin_get(p_instance->reg.p_uart);
rxd = nrf_uart_rx_pin_get(p_instance->reg.p_uart);
rts = nrf_uart_rts_pin_get(p_instance->reg.p_uart);
cts = nrf_uart_cts_pin_get(p_instance->reg.p_uart);
nrf_uart_txrx_pins_disconnect(p_instance->reg.p_uart);
nrf_uart_hwfc_pins_disconnect(p_instance->reg.p_uart);
)
if (txd != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(txd);
}
if (rxd != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(rxd);
}
if (cts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(cts);
}
if (rts != NRF_UART_PSEL_DISCONNECTED)
{
nrf_gpio_cfg_default(rts);
}
}
__STATIC_INLINE void uart_enable(const nrf_drv_uart_t * p_instance)
{
CODE_FOR_UARTE(nrf_uarte_enable(p_instance->reg.p_uarte);)
CODE_FOR_UART(nrf_uart_enable(p_instance->reg.p_uart););
}
__STATIC_INLINE void uart_disable(const nrf_drv_uart_t * p_instance)
{
CODE_FOR_UARTE(nrf_uarte_disable(p_instance->reg.p_uarte);)
CODE_FOR_UART(nrf_uart_disable(p_instance->reg.p_uart););
}
ret_code_t nrf_drv_uart_init(const nrf_drv_uart_t * p_instance, nrf_drv_uart_config_t const * p_config,
nrf_uart_event_handler_t event_handler)
{
ASSERT(p_config);
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
ret_code_t err_code = NRF_SUCCESS;
if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
{
err_code = NRF_ERROR_INVALID_STATE;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#if (defined(UARTE_IN_USE) && defined(UART_IN_USE))
p_cb->use_easy_dma = p_config->use_easy_dma;
#endif
apply_config(p_instance, p_config);
p_cb->handler = event_handler;
p_cb->p_context = p_config->p_context;
if (p_cb->handler)
{
interrupts_enable(p_instance, p_config->interrupt_priority);
}
uart_enable(p_instance);
p_cb->rx_buffer_length = 0;
p_cb->rx_secondary_buffer_length = 0;
p_cb->tx_buffer_length = 0;
p_cb->state = NRF_DRV_STATE_INITIALIZED;
p_cb->rx_enabled = false;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
void nrf_drv_uart_uninit(const nrf_drv_uart_t * p_instance)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
uart_disable(p_instance);
if (p_cb->handler)
{
interrupts_disable(p_instance);
}
pins_to_default(p_instance);
p_cb->state = NRF_DRV_STATE_UNINITIALIZED;
p_cb->handler = NULL;
NRF_LOG_INFO("Instance uninitialized: %d.\r\n", p_instance->drv_inst_idx);
}
#if defined(UART_IN_USE)
__STATIC_INLINE void tx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
{
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY);
uint8_t txd = p_cb->p_tx_buffer[p_cb->tx_counter];
p_cb->tx_counter++;
nrf_uart_txd_set(p_uart, txd);
}
__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uart(const nrf_drv_uart_t * p_instance)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
ret_code_t err_code = NRF_SUCCESS;
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY);
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTTX);
tx_byte(p_instance->reg.p_uart, p_cb);
if (p_cb->handler == NULL)
{
while (p_cb->tx_counter < (uint16_t) p_cb->tx_buffer_length)
{
while (!nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY) &&
p_cb->tx_counter != TX_COUNTER_ABORT_REQ_VALUE)
{
}
if (p_cb->tx_counter != TX_COUNTER_ABORT_REQ_VALUE)
{
tx_byte(p_instance->reg.p_uart, p_cb);
}
}
if (p_cb->tx_counter == TX_COUNTER_ABORT_REQ_VALUE)
{
err_code = NRF_ERROR_FORBIDDEN;
}
else
{
while (!nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_TXDRDY))
{
}
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPTX);
}
p_cb->tx_buffer_length = 0;
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE ret_code_t nrf_drv_uart_tx_for_uarte(const nrf_drv_uart_t * p_instance)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
ret_code_t err_code = NRF_SUCCESS;
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_tx_buffer_set(p_instance->reg.p_uarte, p_cb->p_tx_buffer, p_cb->tx_buffer_length);
nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STARTTX);
if (p_cb->handler == NULL)
{
bool endtx;
bool txstopped;
do
{
endtx = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDTX);
txstopped = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED);
}
while ((!endtx) && (!txstopped));
if (txstopped)
{
err_code = NRF_ERROR_FORBIDDEN;
}
p_cb->tx_buffer_length = 0;
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
ret_code_t nrf_drv_uart_tx(const nrf_drv_uart_t * p_instance, uint8_t const * const p_data, uint8_t length)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
ASSERT(p_cb->state == NRF_DRV_STATE_INITIALIZED);
ASSERT(length>0);
ASSERT(p_data);
ret_code_t err_code;
CODE_FOR_UARTE
(
// EasyDMA requires that transfer buffers are placed in DataRAM,
// signal error if the are not.
if (!nrf_drv_is_in_RAM(p_data))
{
err_code = NRF_ERROR_INVALID_ADDR;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
)
if (nrf_drv_uart_tx_in_progress(p_instance))
{
err_code = NRF_ERROR_BUSY;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
p_cb->tx_buffer_length = length;
p_cb->p_tx_buffer = p_data;
p_cb->tx_counter = 0;
NRF_LOG_INFO("Transfer tx_len: %d.\r\n", p_cb->tx_buffer_length);
NRF_LOG_DEBUG("Tx data:\r\n");
NRF_LOG_HEXDUMP_DEBUG((uint8_t *)p_cb->p_tx_buffer, p_cb->tx_buffer_length * sizeof(p_cb->p_tx_buffer));
CODE_FOR_UARTE
(
return nrf_drv_uart_tx_for_uarte(p_instance);
)
CODE_FOR_UART
(
return nrf_drv_uart_tx_for_uart(p_instance);
)
}
bool nrf_drv_uart_tx_in_progress(const nrf_drv_uart_t * p_instance)
{
return (m_cb[p_instance->drv_inst_idx].tx_buffer_length != 0);
}
#if defined(UART_IN_USE)
__STATIC_INLINE void rx_enable(const nrf_drv_uart_t * p_instance)
{
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR);
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXDRDY);
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTRX);
}
__STATIC_INLINE void rx_byte(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
{
if (!p_cb->rx_buffer_length)
{
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY);
// Byte received when buffer is not set - data lost.
(void) nrf_uart_rxd_get(p_uart);
return;
}
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXDRDY);
p_cb->p_rx_buffer[p_cb->rx_counter] = nrf_uart_rxd_get(p_uart);
p_cb->rx_counter++;
}
__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uart(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length, bool second_buffer)
{
ret_code_t err_code;
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
if ((!p_cb->rx_enabled) && (!second_buffer))
{
rx_enable(p_instance);
}
if (p_cb->handler == NULL)
{
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO);
bool rxrdy;
bool rxto;
bool error;
do
{
do
{
error = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR);
rxrdy = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_RXDRDY);
rxto = nrf_uart_event_check(p_instance->reg.p_uart, NRF_UART_EVENT_RXTO);
} while ((!rxrdy) && (!rxto) && (!error));
if (error || rxto)
{
break;
}
rx_byte(p_instance->reg.p_uart, p_cb);
} while (p_cb->rx_buffer_length > p_cb->rx_counter);
p_cb->rx_buffer_length = 0;
if (error)
{
err_code = NRF_ERROR_INTERNAL;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if (rxto)
{
err_code = NRF_ERROR_FORBIDDEN;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
if (p_cb->rx_enabled)
{
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STARTRX);
}
else
{
// Skip stopping RX if driver is forced to be enabled.
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX);
}
}
else
{
nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
}
err_code = NRF_SUCCESS;
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE ret_code_t nrf_drv_uart_rx_for_uarte(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length, bool second_buffer)
{
ret_code_t err_code = NRF_SUCCESS;
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX);
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO);
nrf_uarte_rx_buffer_set(p_instance->reg.p_uarte, p_data, length);
if (!second_buffer)
{
nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STARTRX);
}
else
{
nrf_uarte_shorts_enable(p_instance->reg.p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX);
}
if (m_cb[p_instance->drv_inst_idx].handler == NULL)
{
bool endrx;
bool rxto;
bool error;
do {
endrx = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ENDRX);
rxto = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_RXTO);
error = nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR);
}while ((!endrx) && (!rxto) && (!error));
m_cb[p_instance->drv_inst_idx].rx_buffer_length = 0;
if (error)
{
err_code = NRF_ERROR_INTERNAL;
}
if (rxto)
{
err_code = NRF_ERROR_FORBIDDEN;
}
}
else
{
nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
}
NRF_LOG_INFO("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
#endif
ret_code_t nrf_drv_uart_rx(const nrf_drv_uart_t * p_instance, uint8_t * p_data, uint8_t length)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
ASSERT(m_cb[p_instance->drv_inst_idx].state == NRF_DRV_STATE_INITIALIZED);
ASSERT(length>0);
ret_code_t err_code;
CODE_FOR_UARTE
(
// EasyDMA requires that transfer buffers are placed in DataRAM,
// signal error if the are not.
if (!nrf_drv_is_in_RAM(p_data))
{
err_code = NRF_ERROR_INVALID_ADDR;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
)
bool second_buffer = false;
if (p_cb->handler)
{
CODE_FOR_UARTE
(
nrf_uarte_int_disable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
)
CODE_FOR_UART
(
nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
)
}
if (p_cb->rx_buffer_length != 0)
{
if (p_cb->rx_secondary_buffer_length != 0)
{
if (p_cb->handler)
{
CODE_FOR_UARTE
(
nrf_uarte_int_enable(p_instance->reg.p_uarte, NRF_UARTE_INT_ERROR_MASK | NRF_UARTE_INT_ENDRX_MASK);
)
CODE_FOR_UART
(
nrf_uart_int_enable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
)
}
err_code = NRF_ERROR_BUSY;
NRF_LOG_WARNING("Function: %s, error code: %s.\r\n", (uint32_t)__func__, (uint32_t)ERR_TO_STR(err_code));
return err_code;
}
second_buffer = true;
}
if (!second_buffer)
{
p_cb->rx_buffer_length = length;
p_cb->p_rx_buffer = p_data;
p_cb->rx_counter = 0;
p_cb->rx_secondary_buffer_length = 0;
}
else
{
p_cb->p_rx_secondary_buffer = p_data;
p_cb->rx_secondary_buffer_length = length;
}
NRF_LOG_INFO("Transfer rx_len: %d.\r\n", length);
CODE_FOR_UARTE
(
return nrf_drv_uart_rx_for_uarte(p_instance, p_data, length, second_buffer);
)
CODE_FOR_UART
(
return nrf_drv_uart_rx_for_uart(p_instance, p_data, length, second_buffer);
)
}
void nrf_drv_uart_rx_enable(const nrf_drv_uart_t * p_instance)
{
//Easy dma mode does not support enabling receiver without setting up buffer.
CODE_FOR_UARTE
(
ASSERT(false);
)
CODE_FOR_UART
(
if (!m_cb[p_instance->drv_inst_idx].rx_enabled)
{
rx_enable(p_instance);
m_cb[p_instance->drv_inst_idx].rx_enabled = true;
}
)
}
void nrf_drv_uart_rx_disable(const nrf_drv_uart_t * p_instance)
{
//Easy dma mode does not support enabling receiver without setting up buffer.
CODE_FOR_UARTE
(
ASSERT(false);
)
CODE_FOR_UART
(
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX);
m_cb[p_instance->drv_inst_idx].rx_enabled = false;
)
}
uint32_t nrf_drv_uart_errorsrc_get(const nrf_drv_uart_t * p_instance)
{
uint32_t errsrc;
CODE_FOR_UARTE
(
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_ERROR);
errsrc = nrf_uarte_errorsrc_get_and_clear(p_instance->reg.p_uarte);
)
CODE_FOR_UART
(
nrf_uart_event_clear(p_instance->reg.p_uart, NRF_UART_EVENT_ERROR);
errsrc = nrf_uart_errorsrc_get_and_clear(p_instance->reg.p_uart);
)
return errsrc;
}
__STATIC_INLINE void rx_done_event(uart_control_block_t * p_cb, uint8_t bytes, uint8_t * p_data)
{
nrf_drv_uart_event_t event;
event.type = NRF_DRV_UART_EVT_RX_DONE;
event.data.rxtx.bytes = bytes;
event.data.rxtx.p_data = p_data;
p_cb->handler(&event, p_cb->p_context);
}
__STATIC_INLINE void tx_done_event(uart_control_block_t * p_cb, uint8_t bytes)
{
nrf_drv_uart_event_t event;
event.type = NRF_DRV_UART_EVT_TX_DONE;
event.data.rxtx.bytes = bytes;
event.data.rxtx.p_data = (uint8_t *)p_cb->p_tx_buffer;
p_cb->tx_buffer_length = 0;
p_cb->handler(&event, p_cb->p_context);
}
void nrf_drv_uart_tx_abort(const nrf_drv_uart_t * p_instance)
{
uart_control_block_t * p_cb = &m_cb[p_instance->drv_inst_idx];
CODE_FOR_UARTE
(
nrf_uarte_event_clear(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STOPTX);
if (p_cb->handler == NULL)
{
while (!nrf_uarte_event_check(p_instance->reg.p_uarte, NRF_UARTE_EVENT_TXSTOPPED));
}
)
CODE_FOR_UART
(
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPTX);
if (p_cb->handler)
{
tx_done_event(p_cb, p_cb->tx_counter);
}
else
{
p_cb->tx_counter = TX_COUNTER_ABORT_REQ_VALUE;
}
)
NRF_LOG_INFO("TX transaction aborted.\r\n");
}
void nrf_drv_uart_rx_abort(const nrf_drv_uart_t * p_instance)
{
CODE_FOR_UARTE
(
nrf_uarte_task_trigger(p_instance->reg.p_uarte, NRF_UARTE_TASK_STOPRX);
)
CODE_FOR_UART
(
nrf_uart_int_disable(p_instance->reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
nrf_uart_task_trigger(p_instance->reg.p_uart, NRF_UART_TASK_STOPRX);
)
NRF_LOG_INFO("RX transaction aborted.\r\n");
}
#if defined(UART_IN_USE)
__STATIC_INLINE void uart_irq_handler(NRF_UART_Type * p_uart, uart_control_block_t * p_cb)
{
if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_ERROR) &&
nrf_uart_event_check(p_uart, NRF_UART_EVENT_ERROR))
{
nrf_drv_uart_event_t event;
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_ERROR);
NRF_LOG_DEBUG("Event: %s.\r\n", (uint32_t)EVT_TO_STR(NRF_UART_EVENT_ERROR));
nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
if (!p_cb->rx_enabled)
{
nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX);
}
event.type = NRF_DRV_UART_EVT_ERROR;
event.data.error.error_mask = nrf_uart_errorsrc_get_and_clear(p_uart);
event.data.error.rxtx.bytes = p_cb->rx_buffer_length;
event.data.error.rxtx.p_data = p_cb->p_rx_buffer;
//abort transfer
p_cb->rx_buffer_length = 0;
p_cb->rx_secondary_buffer_length = 0;
p_cb->handler(&event,p_cb->p_context);
}
else if (nrf_uart_int_enable_check(p_uart, NRF_UART_INT_MASK_RXDRDY) &&
nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXDRDY))
{
rx_byte(p_uart, p_cb);
if (p_cb->rx_buffer_length == p_cb->rx_counter)
{
if (p_cb->rx_secondary_buffer_length)
{
uint8_t * p_data = p_cb->p_rx_buffer;
uint8_t rx_counter = p_cb->rx_counter;
//Switch to secondary buffer.
p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length;
p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer;
p_cb->rx_secondary_buffer_length = 0;
p_cb->rx_counter = 0;
rx_done_event(p_cb, rx_counter, p_data);
}
else
{
if (!p_cb->rx_enabled)
{
nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STOPRX);
}
nrf_uart_int_disable(p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
p_cb->rx_buffer_length = 0;
rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer);
}
}
}
if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_TXDRDY))
{
if (p_cb->tx_counter < (uint16_t) p_cb->tx_buffer_length)
{
tx_byte(p_uart, p_cb);
}
else
{
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_TXDRDY);
if (p_cb->tx_buffer_length)
{
tx_done_event(p_cb, p_cb->tx_buffer_length);
}
}
}
if (nrf_uart_event_check(p_uart, NRF_UART_EVENT_RXTO))
{
nrf_uart_event_clear(p_uart, NRF_UART_EVENT_RXTO);
// RXTO event may be triggered as a result of abort call. In th
if (p_cb->rx_enabled)
{
nrf_uart_task_trigger(p_uart, NRF_UART_TASK_STARTRX);
}
if (p_cb->rx_buffer_length)
{
p_cb->rx_buffer_length = 0;
rx_done_event(p_cb, p_cb->rx_counter, p_cb->p_rx_buffer);
}
}
}
#endif
#if defined(UARTE_IN_USE)
__STATIC_INLINE void uarte_irq_handler(NRF_UARTE_Type * p_uarte, uart_control_block_t * p_cb)
{
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ERROR))
{
nrf_drv_uart_event_t event;
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ERROR);
event.type = NRF_DRV_UART_EVT_ERROR;
event.data.error.error_mask = nrf_uarte_errorsrc_get_and_clear(p_uarte);
event.data.error.rxtx.bytes = nrf_uarte_rx_amount_get(p_uarte);
event.data.error.rxtx.p_data = p_cb->p_rx_buffer;
//abort transfer
p_cb->rx_buffer_length = 0;
p_cb->rx_secondary_buffer_length = 0;
p_cb->handler(&event, p_cb->p_context);
}
else if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDRX))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDRX);
uint8_t amount = nrf_uarte_rx_amount_get(p_uarte);
// If the transfer was stopped before completion, amount of transfered bytes
// will not be equal to the buffer length. Interrupted trunsfer is ignored.
if (amount == p_cb->rx_buffer_length)
{
if (p_cb->rx_secondary_buffer_length)
{
uint8_t * p_data = p_cb->p_rx_buffer;
nrf_uarte_shorts_disable(p_uarte, NRF_UARTE_SHORT_ENDRX_STARTRX);
p_cb->rx_buffer_length = p_cb->rx_secondary_buffer_length;
p_cb->p_rx_buffer = p_cb->p_rx_secondary_buffer;
p_cb->rx_secondary_buffer_length = 0;
rx_done_event(p_cb, amount, p_data);
}
else
{
p_cb->rx_buffer_length = 0;
rx_done_event(p_cb, amount, p_cb->p_rx_buffer);
}
}
}
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_RXTO))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_RXTO);
if (p_cb->rx_buffer_length)
{
p_cb->rx_buffer_length = 0;
rx_done_event(p_cb, nrf_uarte_rx_amount_get(p_uarte), p_cb->p_rx_buffer);
}
}
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX);
if (p_cb->tx_buffer_length)
{
tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte));
}
}
}
#endif
#if UART0_ENABLED
void UART0_IRQHandler(void)
{
CODE_FOR_UARTE_INT
(
UART0_INSTANCE_INDEX,
uarte_irq_handler(NRF_UARTE0, &m_cb[UART0_INSTANCE_INDEX]);
)
CODE_FOR_UART
(
uart_irq_handler(NRF_UART0, &m_cb[UART0_INSTANCE_INDEX]);
)
}
#endif
#if UART1_ENABLED
void UARTE1_IRQHandler(void)
{
CODE_FOR_UARTE_INT
(
UART1_INSTANCE_INDEX,
uarte_irq_handler(NRF_UARTE1, &m_cb[UART1_INSTANCE_INDEX]);
)
CODE_FOR_UART
(
uart_irq_handler(NRF_UART1, &m_cb[UART1_INSTANCE_INDEX]);
)
}
#endif
#endif //NRF_MODULE_ENABLED(UART)

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@ -1,429 +0,0 @@
/*
* Copyright (c) 2015 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**@file
* @addtogroup nrf_uart UART driver and HAL
* @ingroup nrf_drivers
* @brief UART API.
* @details The UART driver provides APIs for utilizing the UART peripheral.
*
* @defgroup nrf_drv_uart UART driver
* @{
* @ingroup nrf_uart
*
* @brief UART driver.
*/
#ifndef NRF_DRV_UART_H
#define NRF_DRV_UART_H
#include "nrf_uart.h"
#ifdef UARTE_PRESENT
#include "nrf_uarte.h"
#endif
#include "sdk_errors.h"
#include "sdk_config.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef UART1_ENABLED
#define UART1_ENABLED 0
#endif
#ifndef UART0_ENABLED
#define UART0_ENABLED 0
#endif
#define UART0_INSTANCE_INDEX 0
#define UART1_INSTANCE_INDEX UART0_ENABLED
#define UART_ENABLED_COUNT UART0_ENABLED + UART1_ENABLED
#if defined(UARTE_PRESENT)
#define NRF_DRV_UART_PERIPHERAL(id) \
(CONCAT_3(UART, id, _CONFIG_USE_EASY_DMA) == 1 ? \
(void *)CONCAT_2(NRF_UARTE, id) \
: (void *)CONCAT_2(NRF_UART, id))
#else
#define NRF_DRV_UART_PERIPHERAL(id) (void *)CONCAT_2(NRF_UART, id)
#endif
// This set of macros makes it possible to exclude parts of code, when one type
// of supported peripherals is not used.
#if defined(UARTE_PRESENT)
#if (UART_EASY_DMA_SUPPORT == 1)
#define UARTE_IN_USE
#endif
#if (UART_LEGACY_SUPPORT == 1)
#define UART_IN_USE
#endif
#if (UART_ENABLED == 1) && ((!defined(UARTE_IN_USE) && !defined(UART_IN_USE)) || ((UART_EASY_DMA_SUPPORT == 0) && (UART_LEGACY_SUPPORT == 0)))
#error "Illegal settings in uart module!"
#endif
#elif defined(UART_PRESENT)
#define UART_IN_USE
#endif
/**
* @brief Structure for the UART driver instance.
*/
typedef struct
{
union
{
#if (defined(UARTE_IN_USE))
NRF_UARTE_Type * p_uarte; ///< Pointer to a structure with UARTE registers.
#endif
#if (defined(UART_IN_USE) || (UART_ENABLED == 0))
NRF_UART_Type * p_uart; ///< Pointer to a structure with UART registers.
#endif
} reg;
uint8_t drv_inst_idx; ///< Driver instance index.
} nrf_drv_uart_t;
/**
* @brief Macro for creating an UART driver instance.
*/
#define NRF_DRV_UART_INSTANCE(id) \
{ \
.reg = {NRF_DRV_UART_PERIPHERAL(id)}, \
.drv_inst_idx = CONCAT_3(UART, id, _INSTANCE_INDEX),\
}
/**
* @brief Types of UART driver events.
*/
typedef enum
{
NRF_DRV_UART_EVT_TX_DONE, ///< Requested TX transfer completed.
NRF_DRV_UART_EVT_RX_DONE, ///< Requested RX transfer completed.
NRF_DRV_UART_EVT_ERROR, ///< Error reported by UART peripheral.
} nrf_drv_uart_evt_type_t;
/**@brief Structure for UART configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
uint32_t pselrxd; ///< RXD pin number.
uint32_t pselcts; ///< CTS pin number.
uint32_t pselrts; ///< RTS pin number.
void * p_context; ///< Context passed to interrupt handler.
nrf_uart_hwfc_t hwfc; ///< Flow control configuration.
nrf_uart_parity_t parity; ///< Parity configuration.
nrf_uart_baudrate_t baudrate; ///< Baudrate.
uint8_t interrupt_priority; ///< Interrupt priority.
#ifdef UARTE_PRESENT
bool use_easy_dma;
#endif
} nrf_drv_uart_config_t;
/**@brief UART default configuration. */
#ifdef UARTE_PRESENT
#if !UART_LEGACY_SUPPORT
#define DEFAULT_CONFIG_USE_EASY_DMA true
#elif !UART_EASY_DMA_SUPPORT
#define DEFAULT_CONFIG_USE_EASY_DMA false
#else
#define DEFAULT_CONFIG_USE_EASY_DMA UART0_USE_EASY_DMA
#endif
#define NRF_DRV_UART_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UART_PSEL_DISCONNECTED, \
.pselrxd = NRF_UART_PSEL_DISCONNECTED, \
.pselcts = NRF_UART_PSEL_DISCONNECTED, \
.pselrts = NRF_UART_PSEL_DISCONNECTED, \
.p_context = NULL, \
.hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \
.parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \
.baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \
.interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \
.use_easy_dma = true \
}
#else
#define NRF_DRV_UART_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UART_PSEL_DISCONNECTED, \
.pselrxd = NRF_UART_PSEL_DISCONNECTED, \
.pselcts = NRF_UART_PSEL_DISCONNECTED, \
.pselrts = NRF_UART_PSEL_DISCONNECTED, \
.p_context = NULL, \
.hwfc = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC, \
.parity = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY, \
.baudrate = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE, \
.interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
#endif
/**@brief Structure for UART transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
uint8_t bytes; ///< Number of bytes transfered.
} nrf_drv_uart_xfer_evt_t;
/**@brief Structure for UART error event. */
typedef struct
{
nrf_drv_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transfered.
uint32_t error_mask;///< Mask of error flags that generated the event.
} nrf_drv_uart_error_evt_t;
/**@brief Structure for UART event. */
typedef struct
{
nrf_drv_uart_evt_type_t type; ///< Event type.
union
{
nrf_drv_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrf_drv_uart_error_evt_t error;///< Data provided for error event.
} data;
} nrf_drv_uart_event_t;
/**
* @brief UART interrupt event handler.
*
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to interrupt handler, set on initialization.
*/
typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void * p_context);
/**
* @brief Function for initializing the UART driver.
*
* This function configures and enables UART. After this function GPIO pins are controlled by UART.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Initial configuration. Default configuration used if NULL.
* @param[in] event_handler Event handler provided by the user. If not provided driver works in
* blocking mode.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_INVALID_STATE If driver is already initialized.
*/
ret_code_t nrf_drv_uart_init(nrf_drv_uart_t const * p_instance,
nrf_drv_uart_config_t const * p_config,
nrf_uart_event_handler_t event_handler);
/**
* @brief Function for uninitializing the UART driver.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for getting the address of a specific UART task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] task Task.
*
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance,
nrf_uart_task_t task);
/**
* @brief Function for getting the address of a specific UART event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Event.
*
* @return Event address.
*/
__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance,
nrf_uart_event_t event);
/**
* @brief Function for sending data over UART.
*
* If an event handler was provided in nrf_drv_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
*
* @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers
* are placed in the Data RAM region. If they are not and UARTE instance is
* used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to send.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_BUSY If driver is already transferring.
* @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only, also see @ref nrf_drv_uart_rx_disable).
* @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
*/
ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance,
uint8_t const * const p_data, uint8_t length);
/**
* @brief Function for checking if UART is currently transmitting.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If UART is transmitting.
* @retval false If UART is not transmitting.
*/
bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRF_DRV_UART_EVT_TX_DONE event will be generated in non-blocking mode. Event will
* contain number of bytes sent until abort was called. If Easy DMA is not used event will be
* called from the function context. If Easy DMA is used it will be called from UART interrupt
* context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for receiving data over UART.
*
* If an event handler was provided in the nrf_drv_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
* The receive buffer pointer is double buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
* when the primary buffer is full. The double buffering feature allows
* receiving data continuously.
*
* @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers
* are placed in the Data RAM region. If they are not and UARTE driver instance
* is used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to receive.
*
* @retval NRF_SUCCESS If initialization was successful.
* @retval NRF_ERROR_BUSY If the driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
* @retval NRF_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only, also see @ref nrf_drv_uart_rx_disable).
* @retval NRF_ERROR_INTERNAL If UART peripheral reported an error.
* @retval NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
*/
ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance,
uint8_t * p_data, uint8_t length);
/**
* @brief Function for enabling receiver.
*
* UART has 6 byte long RX FIFO and it will be used to store incoming data. If user will not call
* UART receive function before FIFO is filled, overrun error will encounter. Enabling receiver
* without specifying RX buffer is supported only in UART mode (without Easy DMA). Receiver must be
* explicitly closed by the user @sa nrf_drv_uart_rx_disable. Function asserts if mode is wrong.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for disabling receiver.
*
* Function must be called to close the receiver after it has been explicitly enabled by
* @sa nrf_drv_uart_rx_enable. Feature is supported only in UART mode (without Easy DMA). Function
* asserts if mode is wrong.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. The event will
* contain the number of bytes received until abort was called. The event is called from UART interrupt
* context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance);
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t.
* @note Function should be used in blocking mode only. In case of non-blocking mode error event is
* generated. Function clears error sources after reading.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval Mask of reported errors.
*/
uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance,
nrf_uart_task_t task)
{
#ifdef UART_IN_USE
return nrf_uart_task_address_get(p_instance->reg.p_uart, task);
#else
return nrf_uarte_task_address_get(p_instance->reg.p_uarte, (nrf_uarte_task_t)task);
#endif
}
__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance,
nrf_uart_event_t event)
{
#ifdef UART_IN_USE
return nrf_uart_event_address_get(p_instance->reg.p_uart, event);
#else
return nrf_uarte_event_address_get(p_instance->reg.p_uarte, (nrf_uarte_event_t)event);
#endif
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
#ifdef __cplusplus
}
#endif
#endif //NRF_DRV_UART_H
/** @} */

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/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(CRC32)
#include "crc32.h"
#include <stdlib.h>
uint32_t crc32_compute(uint8_t const * p_data, uint32_t size, uint32_t const * p_crc)
{
uint32_t crc;
crc = (p_crc == NULL) ? 0xFFFFFFFF : ~(*p_crc);
for (uint32_t i = 0; i < size; i++)
{
crc = crc ^ p_data[i];
for (uint32_t j = 8; j > 0; j--)
{
crc = (crc >> 1) ^ (0xEDB88320U & ((crc & 1) ? 0xFFFFFFFF : 0));
}
}
return ~crc;
}
#endif //NRF_MODULE_ENABLED(CRC32)

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/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup crc32 CRC32 compute
* @{
* @ingroup hci_transport
*
* @brief This module implements the CRC-32 calculation in the blocks.
*/
#ifndef CRC32_H__
#define CRC32_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Function for calculating CRC-32 in blocks.
*
* Feed each consecutive data block into this function, along with the current value of p_crc as
* returned by the previous call of this function. The first call of this function should pass NULL
* as the initial value of the crc in p_crc.
*
* @param[in] p_data The input data block for computation.
* @param[in] size The size of the input data block in bytes.
* @param[in] p_crc The previous calculated CRC-32 value or NULL if first call.
*
* @return The updated CRC-32 value, based on the input supplied.
*/
uint32_t crc32_compute(uint8_t const * p_data, uint32_t size, uint32_t const * p_crc);
#ifdef __cplusplus
}
#endif
#endif // CRC32_H__
/** @} */

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(NRF_QUEUE)
#include "nrf_queue.h"
#include "app_util_platform.h"
/**@brief Get next element index.
*
* @param[in] p_queue Pointer to the queue instance.
* @param[in] idx Current index.
*
* @return Next element index.
*/
__STATIC_INLINE size_t nrf_queue_next_idx(nrf_queue_t const * p_queue, size_t idx)
{
ASSERT(p_queue != NULL);
return (idx < p_queue->size) ? (idx + 1) : 0;
}
/**@brief Get current queue utilization. This function assumes that this process will not be interrupted.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return Current queue utilization.
*/
__STATIC_INLINE size_t queue_utilization_get(nrf_queue_t const * p_queue)
{
return (p_queue->p_cb->back >= p_queue->p_cb->front) ?
(p_queue->p_cb->back - p_queue->p_cb->front) :
(p_queue->size + 1 - p_queue->p_cb->front + p_queue->p_cb->back);
}
bool nrf_queue_is_full(nrf_queue_t const * p_queue)
{
ASSERT(p_queue != NULL);
return (nrf_queue_next_idx(p_queue, p_queue->p_cb->back) == p_queue->p_cb->front);
}
ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element)
{
ret_code_t status = NRF_SUCCESS;
ASSERT(p_queue != NULL);
ASSERT(p_element != NULL);
CRITICAL_REGION_ENTER();
bool is_full = nrf_queue_is_full(p_queue);
if (!is_full || (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW))
{
// Get write position.
size_t write_pos = p_queue->p_cb->back;
p_queue->p_cb->back = nrf_queue_next_idx(p_queue, p_queue->p_cb->back);
if (is_full)
{
// Overwrite the oldest element.
p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front);
}
// Write a new element.
switch (p_queue->element_size)
{
case sizeof(uint8_t):
((uint8_t *)p_queue->p_buffer)[write_pos] = *((uint8_t *)p_element);
break;
case sizeof(uint16_t):
((uint16_t *)p_queue->p_buffer)[write_pos] = *((uint16_t *)p_element);
break;
case sizeof(uint32_t):
((uint32_t *)p_queue->p_buffer)[write_pos] = *((uint32_t *)p_element);
break;
case sizeof(uint64_t):
((uint64_t *)p_queue->p_buffer)[write_pos] = *((uint64_t *)p_element);
break;
default:
memcpy((void *)((size_t)p_queue->p_buffer + write_pos * p_queue->element_size),
p_element,
p_queue->element_size);
break;
}
// Update utilization.
size_t utilization = queue_utilization_get(p_queue);
if (p_queue->p_cb->max_utilization < utilization)
{
p_queue->p_cb->max_utilization = utilization;
}
}
else
{
status = NRF_ERROR_NO_MEM;
}
CRITICAL_REGION_EXIT();
return status;
}
ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue,
void * p_element,
bool just_peek)
{
ret_code_t status = NRF_SUCCESS;
ASSERT(p_queue != NULL);
ASSERT(p_element != NULL);
CRITICAL_REGION_ENTER();
if (!nrf_queue_is_empty(p_queue))
{
// Get read position.
size_t read_pos = p_queue->p_cb->front;
// Update next read position.
if (!just_peek)
{
p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->front);
}
// Read element.
switch (p_queue->element_size)
{
case sizeof(uint8_t):
*((uint8_t *)p_element) = ((uint8_t *)p_queue->p_buffer)[read_pos];
break;
case sizeof(uint16_t):
*((uint16_t *)p_element) = ((uint16_t *)p_queue->p_buffer)[read_pos];
break;
case sizeof(uint32_t):
*((uint32_t *)p_element) = ((uint32_t *)p_queue->p_buffer)[read_pos];
break;
case sizeof(uint64_t):
*((uint64_t *)p_element) = ((uint64_t *)p_queue->p_buffer)[read_pos];
break;
default:
memcpy(p_element,
(void const *)((size_t)p_queue->p_buffer + read_pos * p_queue->element_size),
p_queue->element_size);
break;
}
}
else
{
status = NRF_ERROR_NOT_FOUND;
}
CRITICAL_REGION_EXIT();
return status;
}
/**@brief Write elements to the queue. This function assumes that there is enough room in the queue
* to write the requested number of elements and that this process will not be interrupted.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[in] p_data Pointer to the buffer with elements to write.
* @param[in] element_count Number of elements to write.
*/
static void queue_write(nrf_queue_t const * p_queue, void const * p_data, uint32_t element_count)
{
size_t prev_available = nrf_queue_available_get(p_queue);
size_t continuous = p_queue->size + 1 - p_queue->p_cb->back;
void * p_write_ptr = (void *)((size_t)p_queue->p_buffer
+ p_queue->p_cb->back * p_queue->element_size);
if (element_count <= continuous)
{
memcpy(p_write_ptr,
p_data,
element_count * p_queue->element_size);
p_queue->p_cb->back = ((p_queue->p_cb->back + element_count) <= p_queue->size)
? (p_queue->p_cb->back + element_count)
: 0;
}
else
{
size_t first_write_length = continuous * p_queue->element_size;
memcpy(p_write_ptr,
p_data,
first_write_length);
size_t elements_left = element_count - continuous;
memcpy(p_queue->p_buffer,
(void const *)((size_t)p_data + first_write_length),
elements_left * p_queue->element_size);
p_queue->p_cb->back = elements_left;
if (prev_available < element_count)
{
// Overwrite the oldest elements.
p_queue->p_cb->front = nrf_queue_next_idx(p_queue, p_queue->p_cb->back);
}
}
// Update utilization.
size_t utilization = queue_utilization_get(p_queue);
if (p_queue->p_cb->max_utilization < utilization)
{
p_queue->p_cb->max_utilization = utilization;
}
}
ret_code_t nrf_queue_write(nrf_queue_t const * p_queue,
void const * p_data,
size_t element_count)
{
ret_code_t status = NRF_SUCCESS;
ASSERT(p_queue != NULL);
ASSERT(p_data != NULL);
ASSERT(element_count <= p_queue->size);
if (element_count == 0)
{
return NRF_SUCCESS;
}
CRITICAL_REGION_ENTER();
if ((nrf_queue_available_get(p_queue) >= element_count)
|| (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW))
{
queue_write(p_queue, p_data, element_count);
}
else
{
status = NRF_ERROR_NO_MEM;
}
CRITICAL_REGION_EXIT();
return status;
}
size_t nrf_queue_in(nrf_queue_t const * p_queue,
void const * p_data,
size_t element_count)
{
ASSERT(p_queue != NULL);
ASSERT(p_data != NULL);
if (element_count == 0)
{
return 0;
}
CRITICAL_REGION_ENTER();
if (p_queue->mode == NRF_QUEUE_MODE_OVERFLOW)
{
element_count = MIN(element_count, p_queue->size);
}
else
{
size_t available = nrf_queue_available_get(p_queue);
element_count = MIN(element_count, available);
}
queue_write(p_queue, p_data, element_count);
CRITICAL_REGION_EXIT();
return element_count;
}
/**@brief Read elements from the queue. This function assumes that there are enough elements
* in the queue to read and that this process will not be interrupted.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[out] p_data Pointer to the buffer where elements will be copied.
* @param[in] element_count Number of elements to read.
*/
static void queue_read(nrf_queue_t const * p_queue, void * p_data, uint32_t element_count)
{
size_t continuous = (p_queue->p_cb->front <= p_queue->p_cb->back)
? p_queue->p_cb->back - p_queue->p_cb->front
: p_queue->size + 1 - p_queue->p_cb->front;
void const * p_read_ptr = (void const *)((size_t)p_queue->p_buffer
+ p_queue->p_cb->front * p_queue->element_size);
if (element_count <= continuous)
{
memcpy(p_data,
p_read_ptr,
element_count * p_queue->element_size);
p_queue->p_cb->front = ((p_queue->p_cb->front + element_count) <= p_queue->size)
? (p_queue->p_cb->front + element_count)
: 0;
}
else
{
size_t first_read_length = continuous * p_queue->element_size;
memcpy(p_data,
p_read_ptr,
first_read_length);
size_t elements_left = element_count - continuous;
memcpy((void *)((size_t)p_data + first_read_length),
p_queue->p_buffer,
elements_left * p_queue->element_size);
p_queue->p_cb->front = elements_left;
}
}
ret_code_t nrf_queue_read(nrf_queue_t const * p_queue,
void * p_data,
size_t element_count)
{
ret_code_t status = NRF_SUCCESS;
ASSERT(p_queue != NULL);
ASSERT(p_data != NULL);
if (element_count == 0)
{
return NRF_SUCCESS;
}
CRITICAL_REGION_ENTER();
if (element_count <= queue_utilization_get(p_queue))
{
queue_read(p_queue, p_data, element_count);
}
else
{
status = NRF_ERROR_NOT_FOUND;
}
CRITICAL_REGION_EXIT();
return status;
}
size_t nrf_queue_out(nrf_queue_t const * p_queue,
void * p_data,
size_t element_count)
{
ASSERT(p_queue != NULL);
ASSERT(p_data != NULL);
if (element_count == 0)
{
return 0;
}
CRITICAL_REGION_ENTER();
size_t utilization = queue_utilization_get(p_queue);
element_count = MIN(element_count, utilization);
queue_read(p_queue, p_data, element_count);
CRITICAL_REGION_EXIT();
return element_count;
}
void nrf_queue_reset(nrf_queue_t const * p_queue)
{
ASSERT(p_queue != NULL);
CRITICAL_REGION_ENTER();
memset(p_queue->p_cb, 0, sizeof(nrf_queue_cb_t));
CRITICAL_REGION_EXIT();
}
size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue)
{
size_t utilization;
ASSERT(p_queue != NULL);
CRITICAL_REGION_ENTER();
utilization = queue_utilization_get(p_queue);
CRITICAL_REGION_EXIT();
return utilization;
}
#endif // NRF_MODULE_ENABLED(NRF_QUEUE)

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/**
* @defgroup nrf_queue Queue module
* @{
* @ingroup app_common
* @brief Functions that handle the queue instances.
*/
#ifndef NRF_QUEUE_H__
#define NRF_QUEUE_H__
#include <stdint.h>
#include <stdint.h>
#include <string.h>
#include "nrf_assert.h"
#include "sdk_errors.h"
#include "app_util.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Queue control block. */
typedef struct
{
size_t front; //!< Queue front index.
size_t back; //!< Queue back index.
size_t max_utilization; //!< Maximum utilization of the queue.
} nrf_queue_cb_t;
/**@brief Supported queue modes. */
typedef enum
{
NRF_QUEUE_MODE_OVERFLOW, //!< If the queue is full, new element will not be accepted.
NRF_QUEUE_MODE_NO_OVERFLOW, //!< If the queue is full, new element will overwrite the oldest.
} nrf_queue_mode_t;
/**@brief Instance of the queue. */
typedef struct
{
nrf_queue_cb_t * p_cb; //!< Pointer to the instance control block.
void * p_buffer; //!< Pointer to the memory that is used as storage.
size_t size; //!< Size of the queue.
size_t element_size; //!< Size of one element.
nrf_queue_mode_t mode; //!< Mode of the queue.
} nrf_queue_t;
/**@brief Create a queue instance.
*
* @note This macro reserves memory for the given queue instance.
*
* @param[in] _type Type which is stored.
* @param[in] _name Name of the queue.
* @param[in] _size Size of the queue.
* @param[in] _mode Mode of the queue.
*/
#define NRF_QUEUE_DEF(_type, _name, _size, _mode) \
static _type _name##_nrf_queue_buffer[(_size) + 1]; \
static nrf_queue_cb_t _name##_nrf_queue_cb; \
static const nrf_queue_t _name = \
{ \
.p_cb = &_name##_nrf_queue_cb, \
.p_buffer = _name##_nrf_queue_buffer, \
.size = (_size), \
.element_size = sizeof(_type), \
.mode = _mode, \
}
/**@brief Declare a queue interface.
*
* @param[in] _type Type which is stored.
* @param[in] _name Name of the queue.
*/
#define NRF_QUEUE_INTERFACE_DEC(_type, _name) \
ret_code_t _name##_push(_type const * p_element); \
ret_code_t _name##_pop(_type * p_element); \
ret_code_t _name##_peek(_type * p_element); \
ret_code_t _name##_write(_type const * p_data, \
size_t element_count); \
ret_code_t _name##_read(_type * p_data, \
size_t element_count); \
size_t _name##_out(_type * p_data, \
size_t element_count); \
size_t _name##_in(_type const * p_data, \
size_t element_count); \
bool _name##_is_full(void); \
bool _name##_is_empty(void); \
size_t _name##_utilization_get(void); \
size_t _name##_available_get(void); \
size_t _name##_max_utilization_get(void); \
void _name##_reset(void)
/**@brief Define a custom queue interface.
*
* @param[in] _attr Function attribute that will be added to the queue function definition.
* @param[in] _type Type which is stored.
* @param[in] _name Name of the queue.
* @param[in] _p_queue Queue instance.
*/
#define NRF_QUEUE_INTERFACE_CUSTOM_DEF(_attr, _type, _name, _p_queue) \
_attr ret_code_t _name##_push(_type const * p_element) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_push((_p_queue), p_element); \
} \
_attr ret_code_t _name##_pop(_type * p_element) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_pop((_p_queue), p_element); \
} \
_attr ret_code_t _name##_peek(_type * p_element) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_peek((_p_queue), p_element); \
} \
ret_code_t _name##_write(_type const * p_data, \
size_t element_count) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_write((_p_queue), p_data, element_count); \
} \
ret_code_t _name##_read(_type * p_data, \
size_t element_count) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_read((_p_queue), p_data, element_count); \
} \
size_t _name##_in(_type const * p_data, \
size_t element_count) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_in((_p_queue), p_data, element_count); \
} \
size_t _name##_out(_type * p_data, \
size_t element_count) \
{ \
ASSERT((_p_queue) != NULL); \
ASSERT((_p_queue)->element_size == sizeof(_type)); \
return nrf_queue_out((_p_queue), p_data, element_count); \
} \
bool _name##_is_full(void) \
{ \
ASSERT((_p_queue) != NULL); \
return nrf_queue_is_full(_p_queue); \
} \
bool _name##_is_empty(void) \
{ \
ASSERT((_p_queue) != NULL); \
return nrf_queue_is_empty(_p_queue); \
} \
size_t _name##_utilization_get(void) \
{ \
ASSERT((_p_queue) != NULL); \
return nrf_queue_utilization_get(_p_queue); \
} \
size_t _name##_available_get(void) \
{ \
ASSERT((_p_queue) != NULL); \
return nrf_queue_available_get(_p_queue); \
} \
size_t _name##_max_utilization_get(void) \
{ \
ASSERT((_p_queue) != NULL); \
return nrf_queue_max_utilization_get(_p_queue); \
} \
void _name##_reset(void) \
{ \
ASSERT((_p_queue) != NULL); \
nrf_queue_reset(_p_queue); \
}
/**@brief Define a queue interface.
*
* @param[in] _type Type which is stored.
* @param[in] _name Name of the queue.
* @param[in] _p_queue Queue instance.
*/
#define NRF_QUEUE_INTERFACE_DEF(_type, _name, _p_queue) \
NRF_QUEUE_INTERFACE_CUSTOM_DEF(/* empty */, _type, _name, _p_queue)
/**@brief Define a local queue interface.
*
* @param[in] _type Type which is stored.
* @param[in] _name Name of the queue.
* @param[in] _p_queue Queue instance.
*/
#define NRF_QUEUE_INTERFACE_LOCAL_DEF(_type, _name, _p_queue) \
NRF_QUEUE_INTERFACE_CUSTOM_DEF(static, _type, _name, _p_queue)
/**@brief Function for pushing an element to the end of queue.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[in] p_element Pointer to the element that will be stored in the queue.
*
* @return NRF_SUCCESS If an element has been successfully added.
* @return NRF_ERROR_NO_MEM If the queue is full (only in @ref NRF_QUEUE_MODE_NO_OVERFLOW).
*/
ret_code_t nrf_queue_push(nrf_queue_t const * p_queue, void const * p_element);
/**@brief Generic pop implementation.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[out] p_element Pointer where the element will be copied.
* @param[out] just_peek If true, the returned element will not be removed from queue.
*
* @return NRF_SUCCESS If an element was returned.
* @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue.
*/
ret_code_t nrf_queue_generic_pop(nrf_queue_t const * p_queue,
void * p_element,
bool just_peek);
/**@brief Pop element from the front of the queue.
*
* @param[in] _p_queue Pointer to the nrf_queue_t instance.
* @param[out] _p_element Pointer where the element will be copied.
*
* @return NRF_SUCCESS If an element was returned.
* @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue.
*/
#define nrf_queue_pop(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), false)
/**@brief Peek element from the front of the queue.
*
* @param[in] _p_queue Pointer to the nrf_queue_t instance.
* @param[out] _p_element Pointer where the element will be copied.
*
* @return NRF_SUCCESS If an element was returned.
* @return NRF_ERROR_NOT_FOUND If there are no more elements in the queue.
*/
#define nrf_queue_peek(_p_queue, _p_element) nrf_queue_generic_pop((_p_queue), (_p_element), true)
/**@brief Function for writing elements to the queue.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[in] p_data Pointer to the buffer with elements to write.
* @param[in] element_count Number of elements to write.
*
* @return NRF_SUCCESS If an element was written.
* @return NRF_ERROR_NO_MEM There is not enough space in the queue. No element was written.
*/
ret_code_t nrf_queue_write(nrf_queue_t const * p_queue,
void const * p_data,
size_t element_count);
/**@brief Function for writing a portion of elements to the queue.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[in] p_data Pointer to the buffer with elements to write.
* @param[in] element_count Number of elements to write.
*
* @return The number of added elements.
*/
size_t nrf_queue_in(nrf_queue_t const * p_queue,
void const * p_data,
size_t element_count);
/**@brief Function for reading elements from the queue.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[out] p_data Pointer to the buffer where elements will be copied.
* @param[in] element_count Number of elements to read.
*
* @return NRF_SUCCESS If an element was returned.
* @return NRF_ERROR_NOT_FOUND There is not enough elements in the queue.
*/
ret_code_t nrf_queue_read(nrf_queue_t const * p_queue,
void * p_data,
size_t element_count);
/**@brief Function for reading a portion of elements from the queue.
*
* @param[in] p_queue Pointer to the nrf_queue_t instance.
* @param[out] p_data Pointer to the buffer where elements will be copied.
* @param[in] element_count Number of elements to read.
*
* @return The number of read elements.
*/
size_t nrf_queue_out(nrf_queue_t const * p_queue,
void * p_data,
size_t element_count);
/**@brief Function for checking if the queue is full.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return True if the queue is full.
*/
bool nrf_queue_is_full(nrf_queue_t const * p_queue);
/**@brief Function for checking if the queue is empty.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return True if the queue is empty.
*/
__STATIC_INLINE bool nrf_queue_is_empty(nrf_queue_t const * p_queue);
/**@brief Function for getting the current queue utilization.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return Current queue utilization.
*/
size_t nrf_queue_utilization_get(nrf_queue_t const * p_queue);
/**@brief Function for getting the size of available space.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return Size of available space.
*/
__STATIC_INLINE size_t nrf_queue_available_get(nrf_queue_t const * p_queue);
/**@brief Function for getting the maximal queue utilization.
*
* @param[in] p_queue Pointer to the queue instance.
*
* @return Maximal queue utilization.
*/
__STATIC_INLINE size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue);
/**@brief Function for resetting the queue state.
*
* @param[in] p_queue Pointer to the queue instance.
*/
void nrf_queue_reset(nrf_queue_t const * p_queue);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrf_queue_is_empty(nrf_queue_t const * p_queue)
{
ASSERT(p_queue != NULL);
return (p_queue->p_cb->front == p_queue->p_cb->back);
}
__STATIC_INLINE size_t nrf_queue_available_get(nrf_queue_t const * p_queue)
{
ASSERT(p_queue != NULL);
return p_queue->size - nrf_queue_utilization_get(p_queue);
}
__STATIC_INLINE size_t nrf_queue_max_utilization_get(nrf_queue_t const * p_queue)
{
ASSERT(p_queue != NULL);
return p_queue->p_cb->max_utilization;
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
#ifdef __cplusplus
}
#endif
#endif // NRF_QUEUE_H__
/** @} */

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/*
* Copyright (c) 2016 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_SVC_FUNCTION_H__
#define NRF_SVC_FUNCTION_H__
#include <stdint.h>
#include "section_vars.h"
#include "app_util.h"
#include "nrf_svci.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Function to be called from an SVC handler.
*
* @warning The function prototype must be limited to a maximum of four arguments, due to the nature of SVC calls.
*/
typedef uint32_t (*nrf_svc_func_t)();
/** @brief Type holding the SVC number and the pointer to the corresponding function.
*
* Not that the function that is pointed to must not change version.
*/
typedef struct
{
uint32_t svc_num; /**< Supervisor call number (actually 8-bit, padded for alignment). */
uint32_t svci_num; /**< Supervisor call indirect number. */
nrf_svc_func_t func_ptr;
} nrf_svc_func_reg_t;
// Verify that the size of nrf_svc_func_t is aligned.
STATIC_ASSERT(sizeof(nrf_svc_func_reg_t) % 4 == 0);
/** @brief Macro for registering a structure holding SVC number and function pointer.
*
* @details This macro places the variable in a section named "svc_data" that
the SVC handler uses during regular operation.
*/
#define SVC_REGISTER_FUNCTION(svc_var) NRF_SECTION_VARS_ADD(svc_data, svc_var)
#ifdef __cplusplus
}
#endif
#endif // NRF_SVC_FUNCTION_H__

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/*
* Copyright (c) 2016 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdbool.h>
#include <stdint.h>
#include "nrf_svc_function.h"
#include "nrf_error.h"
#include "nrf_log.h"
//lint -save -e19 -e526
NRF_SECTION_VARS_CREATE_SECTION(svc_data, const nrf_svc_func_t);
//lint -restore
#define SVC_DATA_SECTION_VARS_GET(i) NRF_SECTION_VARS_GET((i), nrf_svc_func_reg_t, svc_data)
#define SVC_DATA_SECTION_VARS_COUNT NRF_SECTION_VARS_COUNT(nrf_svc_func_reg_t, svc_data)
/**@brief Function for handling second stage of SuperVisor Calls (SVC).
*
* @details The function will use loop through the registered svc functions stored
* in the named section "svc_data" and will call the registered function
* if the svn_num corresponds with the registration.
*
* @param[in] svc_num SVC number for function to be executed
* @param[in] p_svc_args Argument list for the SVC.
*
* @return This function returns by updating p_svc_arsg[0]. This will be reported back to the caller of SVC
* @ref NRF_ERROR_SVC_HANDLER_MISSING is returned if no SVC handler is implemented for the
* provided svc_num.
*/
void nrf_svc_handler_c(uint8_t svc_num, uint32_t * p_svc_args)
{
uint32_t const num_funcs = SVC_DATA_SECTION_VARS_COUNT;
bool handled = false;
uint32_t svci_num = NRF_SVCI_SVC_NUM_INVALID;
if(svc_num == NRF_SVCI_SVC_NUM)
{
/* load the stacked R12 as the svci_num */
svci_num = p_svc_args[4];
}
for (int i = 0; i < num_funcs; i++)
{
nrf_svc_func_reg_t const * func_reg = SVC_DATA_SECTION_VARS_GET(i);
if (func_reg->svc_num != svc_num)
{
continue;
}
if(svci_num != NRF_SVCI_SVC_NUM_INVALID && func_reg->svci_num != svci_num)
{
continue;
}
p_svc_args[0] = func_reg->func_ptr(p_svc_args[0], p_svc_args[1], p_svc_args[2], p_svc_args[3]);
handled = true;
}
if (handled == false)
{
p_svc_args[0] = NRF_ERROR_SVC_HANDLER_MISSING;
}
}
/**@brief Function for handling the first stage of SuperVisor Calls (SVC) in assembly.
*
* @details The function will use the link register (LR) to determine the stack (PSP or MSP) to be
* used and then decode the SVC number afterwards. After decoding the SVC number then
* @ref C_SVC_Handler is called for further processing of the SVC.
*/
#if defined ( __CC_ARM )
__ASM void SVC_Handler(void)
{
EXC_RETURN_CMD_PSP EQU 0xFFFFFFFD ; EXC_RETURN using PSP for ARM Cortex.If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
IMPORT nrf_svc_handler_c
LDR R0, =EXC_RETURN_CMD_PSP ; Load the EXC_RETURN into R0 to be able to compare against LR to determine stack pointer used.
CMP R0, LR ; Compare the link register with R0.If equal then PSP was used, otherwise MSP was used before SVC.
BNE UseMSP ; Branch to code fetching SVC arguments using MSP.
MRS R1, PSP ; Move PSP into R1.
B Call_nrf_svc_handler_c ; Branch to call_nrf_svc_handler_c below.
UseMSP ;
MRS R1, MSP ; MSP was used, therefore Move MSP into R1.
Call_nrf_svc_handler_c ;
LDR R0, [R1, #24] ; The arguments for the SVC was stacked.R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC(Return address), xPSR.
; R1 contains current SP so the PC of the stacked frame is at SP + 6 words(24 bytes).We load the PC into R0.
SUBS R0, #2 ; The PC before the SVC is in R0.We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
LDRB R0, [R0] ; SVC instruction low octet : Load the byte at the address before the PC to fetch the SVC number.
LDR R2, =nrf_svc_handler_c ; Load address of C implementation of SVC handler.
BX R2 ; Branch to C implementation of SVC handler.R0 is now the SVC number, R1 is the StackPointer where the arguments(R0 - R3) of the original SVC are located.
ALIGN
}
#elif defined ( __GNUC__ )
void __attribute__((naked)) SVC_Handler(void)
{
const uint32_t exc_return = 0xFFFFFFFD; // EXC_RETURN using PSP for ARM Cortex. If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
__ASM volatile(
"cmp lr, %0\t\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
"bne UseMSP\t\n" // Branch to code fetching SVC arguments using MSP.
"mrs r1, psp\t\n" // Move PSP into R1.
"b Call_nrf_svc_handler_c\t\n" // Branch to Call_nrf_svc_handler_c below.
"UseMSP:\t\n" //
"mrs r1, msp\t\n" // MSP was used, therefore Move MSP into R1.
"Call_nrf_svc_handler_c:\t\n" //
"ldr r0, [r1, #24]\t\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
"sub r0, r0, #2\t\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
"ldrb r0, [r0]\t\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
"bx %1\t\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
".align\t\n" //
:: "r" (exc_return), "r" (nrf_svc_handler_c) // Argument list for the gcc assembly. exc_return is %0, nrf_svc_handler_c is %1.
: "r0", "r1" // List of register maintained manually.
);
}
#elif defined ( __ICCARM__ )
void SVC_Handler(void)
{
__ASM("movs r0, #0x02\n" // Load 0x02 into R6 to prepare for exec return test.
"mvns r0, r0\n" // Invert R0 to obtain exec return code using PSP for ARM Cortex.
"cmp lr, r0\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
"bne.n UseMSP\n" // Branch to code fetching SVC arguments using MSP.
"mrs r1, psp\n" // Move PSP into R1.
"b.n Call_nrf_svc_handler_c\t\n" // Branch to Call_nrf_svc_handler_c below.
"UseMSP: \n" //
"mrs r1, msp\n" // MSP was used, therefore Move MSP into R1.
"Call_nrf_svc_handler_c: \n" //
"ldr r0, [r1, #24]\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
"subs r0, #0x02\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
"ldrb r0, [r0]\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
"bx %0\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
:: "r" (nrf_svc_handler_c) // Argument list for the gcc assembly. nrf_svc_handler_c is %0.
: "r0", "r1" // List of register maintained manually.
);
}
#else
#error Compiler not supported.
#endif

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/*
* Copyright (c) 2000 Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
* integrated circuit in a product or a software update for such product, must reproduce
* the above copyright notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
* used to endorse or promote products derived from this software without specific prior
* written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary or object form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_SVCI_H__
#define NRF_SVCI_H__
#include "stdint.h"
#include "compiler_abstraction.h"
#ifdef __cplusplus
extern "C" {
#endif
#define NRF_SVCI_SVC_NUM 0 /**< SVC number used for all SVCI functions. */
#define NRF_SVCI_SVC_NUM_INVALID (0xFFFFFFFF) /**< Invalid SVCI number. */
#if defined (__CC_ARM)
#define SVCI_DECL(svci_num, return_type, function_name, ...) \
return_type __svc_indirect(NRF_SVCI_SVC_NUM) svci_##function_name(uint32_t _svci_num, ##__VA_ARGS__);
#elif defined (__GNUC__)
#ifdef __cplusplus
#define GCC_CAST_CPP (uint8_t)
#else
#define GCC_CAST_CPP
#endif
#define SVCI_DECL(svci_num, return_type, function_name, ...) \
_Pragma("GCC diagnostic push") \
_Pragma("GCC diagnostic ignored \"-Wreturn-type\"") \
__attribute__((naked, unused)) \
static return_type function_name(uint32_t svci_num, \
__VA_ARGS__) \
{ \
__asm __volatile ( \
"mov r12, %1\n\t" \
"svc %0\n\t" \
"bx r14\n\t" \
: /* no output */ \
: "I" (GCC_CAST_CPP NRF_SVCI_SVC_NUM), "r" (svci_num) \
: "r12" /* do we need to clobber? */ \
); \
} \
_Pragma("GCC diagnostic pop")
#elif defined (__ICCARM__)
#define SVCI_DECL(svci_num, return_type, function_name, ...) \
/* Suppress return value warming. */ \
_Pragma("diag_suppress=Pe940") \
static return_type function_name(uint32_t svci_num, \
__VA_ARGS__) \
{ \
__asm volatile ( \
"mov r12, %1\n\t" \
"svc %0\n\t" \
"bx r14\n\t" \
: /* no output */ \
: "I" (NRF_SVCI_SVC_NUM), "r" (svci_num) \
: "r12" /* do we need to clobber? */ \
); \
}
#else
#define SVCI_DECL(svci_number, return_type, function_name, ...)
#endif
#define VA_NARGS_IMPL(_0, _1, _2, _3, _4, _5, _6, _7, _8, N, ...) N
#define VA_NARGS(...) VA_NARGS_IMPL(__VA_ARGS__, 4, 4, 3, 3, 2, 2, 1, 1, 0)
#ifdef SVC_INTERFACE_CALL_AS_NORMAL_FUNCTION
#define SVCI_0(svci_num, return_type, function_name) \
return_type function_name(void)
#define SVCI_1(svci_num, return_type, function_name, p0t, p0n) \
return_type function_name(p0t p0n)
#define SVCI_2(svci_num, return_type, function_name, p0t, p0n, p1t, p1n) \
return_type function_name(p0t p0n, p1t p1n)
#define SVCI_3(svci_num, return_type, function_name, p0t, p0n, p1t, p1n, p2t, p2n) \
return_type function_name(p0t p0n, p1t p1n, p2t p2n)
#define SVCI_4(svci_num, return_type, function_name, p0t, p0n, p1t, p1n, p2t, p2n, p3t, p3n) \
return_type function_name(p0t p0n, p1t p1n, p2t p2n, p3t p3n)
#else
#define SVCI_0(svci_num, return_type, function_name) \
SVCI_DECL(svci_num, return_type, function_name) \
static __INLINE return_type function_name(void) {return svci_##function_name(svci_num);}
#define SVCI_1(svci_num, return_type, function_name, p0t, p0n) \
SVCI_DECL(svci_num, return_type, function_name, p0t p0n) \
static __INLINE return_type function_name(p0t p0n) {return svci_##function_name(svci_num, p0n);}
#define SVCI_2(svci_num, return_type, function_name, p0t, p0n, p1t, p1n) \
SVCI_DECL(svci_num, return_type, function_name, p0t p0n, p1t p1n) \
static __INLINE return_type function_name(p0t p0n, p1t p1n) {return svci_##function_name(svci_num, p0n, p1n);}
#define SVCI_3(svci_num, return_type, function_name, p0t, p0n, p1t, p1n, p2t, p2n) \
SVCI_DECL(svci_num, return_type, function_name, p0t p0n, p1t p1n, p2t p2n) \
static __INLINE return_type function_name(p0t p0n, p1t p1n, p2t p2n) {return svci_##function_name(svci_num, p0n, p1n, p2n);}
#define SVCI_4(svci_num, return_type, function_name, p0t, p0n, p1t, p1n, p2t, p2n, p3t, p3n) \
SVCI_DECL(svci_num, return_type, function_name, p0t p0n, p1t p1n, p2t p2n, p3t p3n) \
static __INLINE return_type function_name(p0t p0n, p1t p1n, p2t p2n, p3t p3n) {return svci_##function_name(svci_num, p0n, p1n, p2n, p3n);}
#endif // SVCALL_AS_NORMAL_FUNCTION
#define SVCI_IMPLI(count, svci_num, return_type, function_name, ...) SVCI##_##count (svci_num, return_type, function_name, ##__VA_ARGS__)
#define SVCI_IMPL(count, svci_num, return_type, function_name, ...) SVCI_IMPLI(count, svci_num, return_type, function_name, ##__VA_ARGS__)
#define SVCI(svci_num, return_type, function_name, ...) SVCI_IMPL(VA_NARGS(__VA_ARGS__), svci_num, return_type, function_name, ##__VA_ARGS__)
#ifdef __cplusplus
}
#endif
#endif // NRF_SVCI_H__

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/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @file
*
* @defgroup app_timer Application Timer
* @{
* @ingroup app_common
*
* @brief Application timer functionality.
*
* @details This module enables the application to create multiple timer instances based on the RTC1
* peripheral. Checking for time-outs and invocation of user time-out handlers is performed
* in the RTC1 interrupt handler. List handling is done using a software interrupt (SWI0).
* Both interrupt handlers are running in APP_LOW priority level.
*
* @details When calling app_timer_start() or app_timer_stop(), the timer operation is just queued,
* and the software interrupt is triggered. The actual timer start/stop operation is
* executed by the SWI0 interrupt handler. Since the SWI0 interrupt is running in APP_LOW,
* if the application code calling the timer function is running in APP_LOW or APP_HIGH,
* the timer operation will not be performed until the application handler has returned.
* This will be the case, for example, when stopping a timer from a time-out handler when not using
* the scheduler.
*
* @details Use the USE_SCHEDULER parameter of the APP_TIMER_INIT() macro to select if the
* @ref app_scheduler should be used or not. Even if the scheduler is
* not used, app_timer.h will include app_scheduler.h, so when
* compiling, app_scheduler.h must be available in one of the compiler include paths.
*/
#ifndef APP_TIMER_H__
#define APP_TIMER_H__
#include "sdk_config.h"
#include "app_error.h"
#include "app_util.h"
#include "compiler_abstraction.h"
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#ifdef __cplusplus
extern "C" {
#endif
#define APP_TIMER_CLOCK_FREQ 32768 /**< Clock frequency of the RTC timer used to implement the app timer module. */
#define APP_TIMER_MIN_TIMEOUT_TICKS 5 /**< Minimum value of the timeout_ticks parameter of app_timer_start(). */
#ifdef RTX
#define APP_TIMER_NODE_SIZE 40 /**< Size of app_timer.timer_node_t (used to allocate data). */
#else
#define APP_TIMER_NODE_SIZE 32 /**< Size of app_timer.timer_node_t (used to allocate data). */
#endif // RTX
#define APP_TIMER_USER_OP_SIZE 24 /**< Size of app_timer.timer_user_op_t (only for use inside APP_TIMER_BUF_SIZE()). */
/**@brief Compute number of bytes required to hold the application timer data structures.
*
* @param[in] OP_QUEUE_SIZE Size of the queue holding timer operations that are pending execution.
* Note that due to the queue implementation, this size must be one more
* than the size that is actually needed.
*
* @return Required application timer buffer size (in bytes).
*/
#define APP_TIMER_BUF_SIZE(OP_QUEUE_SIZE) \
( \
( \
(((OP_QUEUE_SIZE) + 1) * APP_TIMER_USER_OP_SIZE) \
) \
)
/**@brief Convert milliseconds to timer ticks.
*
* This macro uses 64-bit integer arithmetic, but as long as the macro parameters are
* constants (i.e. defines), the computation will be done by the preprocessor.
*
* When using this macro, ensure that the
* values provided as input result in an output value that is supported by the
* @ref app_timer_start function. For example, when the ticks for 1 ms is needed, the
* maximum possible value of PRESCALER must be 6, when @ref APP_TIMER_CLOCK_FREQ is 32768.
* This will result in a ticks value as 5. Any higher value for PRESCALER will result in a
* ticks value that is not supported by this module.
*
* @param[in] MS Milliseconds.
* @param[in] PRESCALER Value of the RTC1 PRESCALER register (must be the same value that was
* passed to APP_TIMER_INIT()).
*
* @return Number of timer ticks.
*/
#define APP_TIMER_TICKS(MS, PRESCALER)\
((uint32_t)ROUNDED_DIV((MS) * (uint64_t)APP_TIMER_CLOCK_FREQ, ((PRESCALER) + 1) * 1000))
typedef struct app_timer_t { uint32_t data[CEIL_DIV(APP_TIMER_NODE_SIZE, sizeof(uint32_t))]; } app_timer_t;
/**@brief Timer ID type.
* Never declare a variable of this type, but use the macro @ref APP_TIMER_DEF instead.*/
typedef app_timer_t * app_timer_id_t;
/**
* @brief Create a timer identifier and statically allocate memory for the timer.
*
* @param timer_id Name of the timer identifier variable that will be used to control the timer.
*/
#define APP_TIMER_DEF(timer_id) \
static app_timer_t timer_id##_data = { {0} }; \
static const app_timer_id_t timer_id = &timer_id##_data
/**@brief Application time-out handler type. */
typedef void (*app_timer_timeout_handler_t)(void * p_context);
/**@brief Type of function for passing events from the timer module to the scheduler. */
typedef uint32_t (*app_timer_evt_schedule_func_t) (app_timer_timeout_handler_t timeout_handler,
void * p_context);
/**@brief Timer modes. */
typedef enum
{
APP_TIMER_MODE_SINGLE_SHOT, /**< The timer will expire only once. */
APP_TIMER_MODE_REPEATED /**< The timer will restart each time it expires. */
} app_timer_mode_t;
/**@brief Initialize the application timer module.
*
* @details This macro handles dimensioning and allocation of the memory buffer required by the timer,
* making sure that the buffer is correctly aligned. It will also connect the timer module
* to the scheduler (if specified).
*
* @note This module assumes that the LFCLK is already running. If it is not, the module will
* be non-functional, since the RTC will not run. If you do not use a SoftDevice, you
* must start the LFCLK manually. See the rtc_example's lfclk_config() function
* for an example of how to do this. If you use a SoftDevice, the LFCLK is started on
* SoftDevice init.
*
*
* @param[in] PRESCALER Value of the RTC1 PRESCALER register. This will decide the
* timer tick rate. Set to 0 for no prescaling.
* @param[in] OP_QUEUE_SIZE Size of the queue holding timer operations that are pending execution.
* @param[in] SCHEDULER_FUNC Pointer to scheduler event handler
*
* @note Since this macro allocates a buffer, it must only be called once (it is OK to call it
* several times as long as it is from the same location, for example, to do a re-initialization).
*/
/*lint -emacro(506, APP_TIMER_INIT) */ /* Suppress "Constant value Boolean */
#define APP_TIMER_INIT(PRESCALER, OP_QUEUE_SIZE, SCHEDULER_FUNC) \
do \
{ \
static uint32_t APP_TIMER_BUF[CEIL_DIV(APP_TIMER_BUF_SIZE(OP_QUEUE_SIZE), \
sizeof(uint32_t))]; \
uint32_t ERR_CODE = app_timer_init((PRESCALER), \
(OP_QUEUE_SIZE) + 1, \
APP_TIMER_BUF, \
SCHEDULER_FUNC); \
APP_ERROR_CHECK(ERR_CODE); \
} while (0)
/**@brief Function for initializing the timer module.
*
* Normally, initialization should be done using the APP_TIMER_INIT() macro, because that macro will both
* allocate the buffers needed by the timer module (including aligning the buffers correctly)
* and take care of connecting the timer module to the scheduler (if specified).
*
* @param[in] prescaler Value of the RTC1 PRESCALER register. Set to 0 for no prescaling.
* @param[in] op_queue_size Size of the queue holding timer operations that are pending
* execution. Note that due to the queue implementation, this size must
* be one more than the size that is actually needed.
* @param[in] p_buffer Pointer to memory buffer for internal use in the app_timer
* module. The size of the buffer can be computed using the
* APP_TIMER_BUF_SIZE() macro. The buffer must be aligned to a
* 4 byte boundary.
* @param[in] evt_schedule_func Function for passing time-out events to the scheduler. Point to
* app_timer_evt_schedule() to connect to the scheduler. Set to NULL
* to make the timer module call the time-out handler directly from
* the timer interrupt handler.
*
* @retval NRF_SUCCESS If the module was initialized successfully.
* @retval NRF_ERROR_INVALID_PARAM If a parameter was invalid (buffer not aligned to a 4 byte
* boundary or NULL).
*/
uint32_t app_timer_init(uint32_t prescaler,
uint8_t op_queue_size,
void * p_buffer,
app_timer_evt_schedule_func_t evt_schedule_func);
/**@brief Function for creating a timer instance.
*
* @param[in] p_timer_id Pointer to timer identifier.
* @param[in] mode Timer mode.
* @param[in] timeout_handler Function to be executed when the timer expires.
*
* @retval NRF_SUCCESS If the timer was successfully created.
* @retval NRF_ERROR_INVALID_PARAM If a parameter was invalid.
* @retval NRF_ERROR_INVALID_STATE If the application timer module has not been initialized or
* the timer is running.
*
* @note This function does the timer allocation in the caller's context. It is also not protected
* by a critical region. Therefore care must be taken not to call it from several interrupt
* levels simultaneously.
* @note The function can be called again on the timer instance and will re-initialize the instance if
* the timer is not running.
* @attention The FreeRTOS and RTX app_timer implementation does not allow app_timer_create to
* be called on the previously initialized instance.
*/
uint32_t app_timer_create(app_timer_id_t const * p_timer_id,
app_timer_mode_t mode,
app_timer_timeout_handler_t timeout_handler);
/**@brief Function for starting a timer.
*
* @param[in] timer_id Timer identifier.
* @param[in] timeout_ticks Number of ticks (of RTC1, including prescaling) to time-out event
* (minimum 5 ticks).
* @param[in] p_context General purpose pointer. Will be passed to the time-out handler when
* the timer expires.
*
* @retval NRF_SUCCESS If the timer was successfully started.
* @retval NRF_ERROR_INVALID_PARAM If a parameter was invalid.
* @retval NRF_ERROR_INVALID_STATE If the application timer module has not been initialized or the timer
* has not been created.
* @retval NRF_ERROR_NO_MEM If the timer operations queue was full.
*
* @note The minimum timeout_ticks value is 5.
* @note For multiple active timers, time-outs occurring in close proximity to each other (in the
* range of 1 to 3 ticks) will have a positive jitter of maximum 3 ticks.
* @note When calling this method on a timer that is already running, the second start operation
* is ignored.
*/
uint32_t app_timer_start(app_timer_id_t timer_id, uint32_t timeout_ticks, void * p_context);
/**@brief Function for stopping the specified timer.
*
* @param[in] timer_id Timer identifier.
*
* @retval NRF_SUCCESS If the timer was successfully stopped.
* @retval NRF_ERROR_INVALID_PARAM If a parameter was invalid.
* @retval NRF_ERROR_INVALID_STATE If the application timer module has not been initialized or the timer
* has not been created.
* @retval NRF_ERROR_NO_MEM If the timer operations queue was full.
*/
uint32_t app_timer_stop(app_timer_id_t timer_id);
/**@brief Function for stopping all running timers.
*
* @retval NRF_SUCCESS If all timers were successfully stopped.
* @retval NRF_ERROR_INVALID_STATE If the application timer module has not been initialized.
* @retval NRF_ERROR_NO_MEM If the timer operations queue was full.
*/
uint32_t app_timer_stop_all(void);
/**@brief Function for returning the current value of the RTC1 counter.
*
* @return Current value of the RTC1 counter.
*/
uint32_t app_timer_cnt_get(void);
/**@brief Function for computing the difference between two RTC1 counter values.
*
* @param[in] ticks_to Value returned by app_timer_cnt_get().
* @param[in] ticks_from Value returned by app_timer_cnt_get().
* @param[out] p_ticks_diff Number of ticks from ticks_from to ticks_to.
*
* @retval NRF_SUCCESS If the counter difference was successfully computed.
*/
uint32_t app_timer_cnt_diff_compute(uint32_t ticks_to,
uint32_t ticks_from,
uint32_t * p_ticks_diff);
/**@brief Function for getting the maximum observed operation queue utilization.
*
* Function for tuning the module and determining OP_QUEUE_SIZE value and thus module RAM usage.
*
* @note APP_TIMER_WITH_PROFILER must be enabled to use this functionality.
*
* @return Maximum number of events in queue observed so far.
*/
uint8_t app_timer_op_queue_utilization_get(void);
#ifdef __cplusplus
}
#endif
#endif // APP_TIMER_H__
/** @} */

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "app_timer_appsh.h"
#include "app_scheduler.h"
static void app_timer_evt_get(void * p_event_data, uint16_t event_size)
{
app_timer_event_t * p_timer_event = (app_timer_event_t *)p_event_data;
APP_ERROR_CHECK_BOOL(event_size == sizeof(app_timer_event_t));
p_timer_event->timeout_handler(p_timer_event->p_context);
}
uint32_t app_timer_evt_schedule(app_timer_timeout_handler_t timeout_handler,
void * p_context)
{
app_timer_event_t timer_event;
timer_event.timeout_handler = timeout_handler;
timer_event.p_context = p_context;
return app_sched_event_put(&timer_event, sizeof(timer_event), app_timer_evt_get);
}

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef APP_TIMER_APPSH_H
#define APP_TIMER_APPSH_H
#include "app_timer.h"
#ifdef __cplusplus
extern "C" {
#endif
#define APP_TIMER_SCHED_EVT_SIZE sizeof(app_timer_event_t) /**< Size of button events being passed through the scheduler (is to be used for computing the maximum size of scheduler events). */
/**@brief Macro for initializing the application timer module to use with app_scheduler.
*
* @param[in] PRESCALER Value of the RTC1 PRESCALER register. This will decide the
* timer tick rate. Set to 0 for no prescaling.
* @param[in] OP_QUEUES_SIZE Size of queues holding timer operations that are pending execution.
* @param[in] USE_SCHEDULER TRUE if the application is using the app_scheduler,
* FALSE otherwise.
*
* @note Since this macro allocates a buffer, it must only be called once (it is OK to call it
* several times as long as it is from the same location, e.g. to do a reinitialization).
*/
#define APP_TIMER_APPSH_INIT(PRESCALER, OP_QUEUES_SIZE, USE_SCHEDULER) \
APP_TIMER_INIT(PRESCALER, OP_QUEUES_SIZE, \
(USE_SCHEDULER) ? app_timer_evt_schedule : NULL)
typedef struct
{
app_timer_timeout_handler_t timeout_handler;
void * p_context;
} app_timer_event_t;
uint32_t app_timer_evt_schedule(app_timer_timeout_handler_t timeout_handler,
void * p_context);
#ifdef __cplusplus
}
#endif
#endif // APP_TIMER_APPSH_H

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/**
*
* @defgroup app_timer_config Application timer functionality configuration
* @{
* @ingroup app_timer
*/
/** @brief Enabling app_timer module
*
* Set to 1 to activate.
*
* @note This is an NRF_CONFIG macro.
*/
#define APP_TIMER_ENABLED
/** @brief Enable app_timer profiling
*
* Set to 1 to activate.
*
* @note This is an NRF_CONFIG macro.
*/
#define APP_TIMER_WITH_PROFILER
/** @brief Enable RTC always on
*
* If option is enabled RTC is kept running even if there is no active timers.
* This option can be used when app_timer is used for timestamping.
*
* Set to 1 to activate.
*
* @note This is an NRF_CONFIG macro.
*/
#define APP_TIMER_KEEPS_RTC_ACTIVE
/** @} */

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(APP_TIMER)
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "app_timer.h"
#include <stdlib.h>
#include <string.h>
#include "nrf.h"
#include "app_error.h"
/* Check if RTC FreeRTOS version is used */
#if configTICK_SOURCE != FREERTOS_USE_RTC
#error app_timer in FreeRTOS variant have to be used with RTC tick source configuration. Default configuration have to be used in other case.
#endif
/**
* @brief Waiting time for the timer queue
*
* Number of system ticks to wait for the timer queue to put the message.
* It is strongly recommended to set this to the value bigger than 1.
* In other case if timer message queue is full - any operation on timer may fail.
* @note
* Timer functions called from interrupt context would never wait.
*/
#define APP_TIMER_WAIT_FOR_QUEUE 2
/**@brief This structure keeps information about osTimer.*/
typedef struct
{
void * argument;
TimerHandle_t osHandle;
app_timer_timeout_handler_t func;
/**
* This member is to make sure that timer function is only called if timer is running.
* FreeRTOS may have timer running even after stop function is called,
* because it processes commands in Timer task and stopping function only puts command into the queue. */
bool active;
}app_timer_info_t;
/**
* @brief Prescaler that was set by the user
*
* In FreeRTOS version of app_timer the prescaler setting is constant and done by the operating system.
* But the application expect the prescaler to be set according to value given in setup and then
* calculate required ticks using this value.
* For compatibility we remember the value set and use it for recalculation of required timer setting.
*/
static uint32_t m_prescaler;
/* Check if freeRTOS timers are activated */
#if configUSE_TIMERS == 0
#error app_timer for freeRTOS requires configUSE_TIMERS option to be activated.
#endif
/* Check if app_timer_t variable type can held our app_timer_info_t structure */
STATIC_ASSERT(sizeof(app_timer_info_t) <= sizeof(app_timer_t));
/**
* @brief Internal callback function for the system timer
*
* Internal function that is called from the system timer.
* It gets our parameter from timer data and sends it to user function.
* @param[in] xTimer Timer handler
*/
static void app_timer_callback(TimerHandle_t xTimer)
{
app_timer_info_t * pinfo = (app_timer_info_t*)(pvTimerGetTimerID(xTimer));
ASSERT(pinfo->osHandle == xTimer);
ASSERT(pinfo->func != NULL);
if (pinfo->active)
pinfo->func(pinfo->argument);
}
uint32_t app_timer_init(uint32_t prescaler,
uint8_t op_queues_size,
void * p_buffer,
app_timer_evt_schedule_func_t evt_schedule_func)
{
UNUSED_PARAMETER(op_queues_size);
UNUSED_PARAMETER(p_buffer);
UNUSED_PARAMETER(evt_schedule_func);
m_prescaler = prescaler + 1;
return NRF_SUCCESS;
}
uint32_t app_timer_create(app_timer_id_t const * p_timer_id,
app_timer_mode_t mode,
app_timer_timeout_handler_t timeout_handler)
{
app_timer_info_t * pinfo = (app_timer_info_t*)(*p_timer_id);
uint32_t err_code = NRF_SUCCESS;
unsigned long timer_mode;
if ((timeout_handler == NULL) || (p_timer_id == NULL))
{
return NRF_ERROR_INVALID_PARAM;
}
if (pinfo->active)
{
return NRF_ERROR_INVALID_STATE;
}
if (pinfo->osHandle == NULL)
{
/* New timer is created */
memset(pinfo, 0, sizeof(app_timer_info_t));
if (mode == APP_TIMER_MODE_SINGLE_SHOT)
timer_mode = pdFALSE;
else
timer_mode = pdTRUE;
pinfo->func = timeout_handler;
pinfo->osHandle = xTimerCreate(" ", 1000, timer_mode, pinfo, app_timer_callback);
if (pinfo->osHandle == NULL)
err_code = NRF_ERROR_NULL;
}
else
{
/* Timer cannot be reinitialized using FreeRTOS API */
return NRF_ERROR_INVALID_STATE;
}
return err_code;
}
uint32_t app_timer_start(app_timer_id_t timer_id, uint32_t timeout_ticks, void * p_context)
{
app_timer_info_t * pinfo = (app_timer_info_t*)(timer_id);
TimerHandle_t hTimer = pinfo->osHandle;
uint32_t rtc_prescaler = portNRF_RTC_REG->PRESCALER + 1;
/* Get back the microseconds to wait */
uint32_t timeout_corrected = ROUNDED_DIV(timeout_ticks * m_prescaler, rtc_prescaler);
if (hTimer == NULL)
{
return NRF_ERROR_INVALID_STATE;
}
if (pinfo->active && (xTimerIsTimerActive(hTimer) != pdFALSE))
{
// Timer already running - exit silently
return NRF_SUCCESS;
}
pinfo->argument = p_context;
if (__get_IPSR() != 0)
{
BaseType_t yieldReq = pdFALSE;
if (xTimerChangePeriodFromISR(hTimer, timeout_corrected, &yieldReq) != pdPASS)
{
return NRF_ERROR_NO_MEM;
}
if ( xTimerStartFromISR(hTimer, &yieldReq) != pdPASS )
{
return NRF_ERROR_NO_MEM;
}
portYIELD_FROM_ISR(yieldReq);
}
else
{
if (xTimerChangePeriod(hTimer, timeout_corrected, APP_TIMER_WAIT_FOR_QUEUE) != pdPASS)
{
return NRF_ERROR_NO_MEM;
}
if (xTimerStart(hTimer, APP_TIMER_WAIT_FOR_QUEUE) != pdPASS)
{
return NRF_ERROR_NO_MEM;
}
}
pinfo->active = true;
return NRF_SUCCESS;
}
uint32_t app_timer_stop(app_timer_id_t timer_id)
{
app_timer_info_t * pinfo = (app_timer_info_t*)(timer_id);
TimerHandle_t hTimer = pinfo->osHandle;
if (hTimer == NULL)
{
return NRF_ERROR_INVALID_STATE;
}
if (__get_IPSR() != 0)
{
BaseType_t yieldReq = pdFALSE;
if (xTimerStopFromISR(timer_id, &yieldReq) != pdPASS)
{
return NRF_ERROR_NO_MEM;
}
portYIELD_FROM_ISR(yieldReq);
}
else
{
if (xTimerStop(timer_id, APP_TIMER_WAIT_FOR_QUEUE) != pdPASS)
{
return NRF_ERROR_NO_MEM;
}
}
pinfo->active = false;
return NRF_SUCCESS;
}
#endif //NRF_MODULE_ENABLED(APP_TIMER)

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/* Copyright (c) 2016 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(APP_TIMER)
#include "app_timer.h"
#include <stdlib.h>
#include "nrf.h"
#include "nrf_soc.h"
#include "app_error.h"
#include "cmsis_os.h"
#include "app_util_platform.h"
#define RTC1_IRQ_PRI APP_IRQ_PRIORITY_LOWEST /**< Priority of the RTC1 interrupt. */
#define MAX_RTC_COUNTER_VAL 0x00FFFFFF /**< Maximum value of the RTC counter. */
/**@brief This structure keeps information about osTimer.*/
typedef struct
{
osTimerDef_t timerDef;
uint32_t buffer[6];
osTimerId id;
}app_timer_info_t;
/**@brief Store an array of timers with configuration. */
typedef struct
{
uint8_t max_timers; /**< The maximum number of timers*/
uint32_t prescaler;
app_timer_info_t * app_timers; /**< Pointer to table of timers*/
}app_timer_control_t;
app_timer_control_t app_timer_control;
/**@brief This structure is defined by RTX. It keeps information about created osTimers. It is used in app_timer_start(). */
typedef struct os_timer_cb_
{
struct os_timer_cb_ * next; /**< Pointer to next active Timer */
uint8_t state; /**< Timer State */
uint8_t type; /**< Timer Type (Periodic/One-shot). */
uint16_t reserved; /**< Reserved. */
uint32_t tcnt; /**< Timer Delay Count. */
uint32_t icnt; /**< Timer Initial Count. */
void * arg; /**< Timer Function Argument. */
const osTimerDef_t * timer; /**< Pointer to Timer definition. */
} os_timer_cb;
/**@brief This functions are defined by RTX.*/
//lint --save -e10 -e19 -e526
extern osStatus svcTimerStop(osTimerId timer_id); /**< Used in app_timer_stop(). */
extern osStatus svcTimerStart(osTimerId timer_id, uint32_t millisec); /**< Used in app_timer_start(). */
// lint --restore
static void * rt_id2obj (void *id) /**< Used in app_timer_start(). This function gives information if osTimerID is valid */
{
if ((uint32_t)id & 3U)
{
return NULL;
}
#ifdef OS_SECTIONS_LINK_INFO
if ((os_section_id$$Base != 0U) && (os_section_id$$Limit != 0U))
{
if (id < (void *)os_section_id$$Base)
{
return NULL;
}
if (id >= (void *)os_section_id$$Limit)
{
return NULL;
}
}
#endif
return id;
}
uint32_t app_timer_init(uint32_t prescaler,
uint8_t op_queues_size,
void * p_buffer,
app_timer_evt_schedule_func_t evt_schedule_func)
{
if (p_buffer == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}
app_timer_control.prescaler = prescaler;
app_timer_control.app_timers = p_buffer;
NVIC_SetPriority(RTC1_IRQn, RTC1_IRQ_PRI);
return NRF_SUCCESS;
}
uint32_t app_timer_create(app_timer_id_t const * p_timer_id,
app_timer_mode_t mode,
app_timer_timeout_handler_t timeout_handler)
{
if ((timeout_handler == NULL) || (p_timer_id == NULL))
{
return NRF_ERROR_INVALID_PARAM;
}
app_timer_info_t * p_timer_info = (app_timer_info_t *)*p_timer_id;
p_timer_info->timerDef.timer = p_timer_info->buffer;
p_timer_info->timerDef.ptimer = (os_ptimer)timeout_handler;
p_timer_info->id = osTimerCreate(&(p_timer_info->timerDef), (os_timer_type)mode, NULL);
if (p_timer_info->id)
return NRF_SUCCESS;
else
{
return NRF_ERROR_INVALID_PARAM; // This error is unspecified by rtx
}
}
#define osTimerRunning 2
uint32_t app_timer_start(app_timer_id_t timer_id, uint32_t timeout_ticks, void * p_context)
{
if ((timeout_ticks < APP_TIMER_MIN_TIMEOUT_TICKS))
{
return NRF_ERROR_INVALID_PARAM;
}
uint32_t timeout_ms =
((uint32_t)ROUNDED_DIV(timeout_ticks * 1000 * (app_timer_control.prescaler + 1),
(uint32_t)APP_TIMER_CLOCK_FREQ));
app_timer_info_t * p_timer_info = (app_timer_info_t *)timer_id;
if (rt_id2obj((void *)p_timer_info->id) == NULL)
return NRF_ERROR_INVALID_PARAM;
// Pass p_context to timer_timeout_handler
((os_timer_cb *)(p_timer_info->id))->arg = p_context;
if (((os_timer_cb *)(p_timer_info->id))->state == osTimerRunning)
{
return NRF_SUCCESS;
}
// osTimerStart() returns osErrorISR if it is called in interrupt routine.
switch (osTimerStart((osTimerId)p_timer_info->id, timeout_ms) )
{
case osOK:
return NRF_SUCCESS;
case osErrorISR:
break;
case osErrorParameter:
return NRF_ERROR_INVALID_PARAM;
default:
return NRF_ERROR_INVALID_PARAM;
}
// Start timer without svcCall
switch (svcTimerStart((osTimerId)p_timer_info->id, timeout_ms))
{
case osOK:
return NRF_SUCCESS;
case osErrorISR:
return NRF_ERROR_INVALID_STATE;
case osErrorParameter:
return NRF_ERROR_INVALID_PARAM;
default:
return NRF_ERROR_INVALID_PARAM;
}
}
uint32_t app_timer_stop(app_timer_id_t timer_id)
{
app_timer_info_t * p_timer_info = (app_timer_info_t *)timer_id;
switch (osTimerStop((osTimerId)p_timer_info->id) )
{
case osOK:
return NRF_SUCCESS;
case osErrorISR:
break;
case osErrorParameter:
return NRF_ERROR_INVALID_PARAM;
case osErrorResource:
return NRF_SUCCESS;
default:
return NRF_ERROR_INVALID_PARAM;
}
// Stop timer without svcCall
switch (svcTimerStop((osTimerId)p_timer_info->id))
{
case osOK:
return NRF_SUCCESS;
case osErrorISR:
return NRF_ERROR_INVALID_STATE;
case osErrorParameter:
return NRF_ERROR_INVALID_PARAM;
case osErrorResource:
return NRF_SUCCESS;
default:
return NRF_ERROR_INVALID_PARAM;
}
}
uint32_t app_timer_stop_all(void)
{
for (int i = 0; i < app_timer_control.max_timers; i++)
{
if (app_timer_control.app_timers[i].id)
{
(void)app_timer_stop((app_timer_id_t)app_timer_control.app_timers[i].id);
}
}
return 0;
}
extern uint32_t os_tick_val(void);
uint32_t app_timer_cnt_get(void)
{
return os_tick_val();
}
uint32_t app_timer_cnt_diff_compute(uint32_t ticks_to,
uint32_t ticks_from,
uint32_t * p_ticks_diff)
{
*p_ticks_diff = ((ticks_to - ticks_from) & MAX_RTC_COUNTER_VAL);
return NRF_SUCCESS;
}
#endif //NRF_MODULE_ENABLED(APP_TIMER)

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/*
* Copyright (c) 2006 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is confidential property of Nordic Semiconductor. The use,
* copying, transfer or disclosure of such information is prohibited except by express written
* agreement with Nordic Semiconductor.
*
*/
#ifndef NRF_BITMASK_H
#define NRF_BITMASK_H
#include "compiler_abstraction.h"
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8)
#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007)
/**
* Function for checking if bit in the multi-byte bit mask is set.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
*
* @return 0 if bit is not set, positive value otherwise.
*/
__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
{
uint8_t const * p_mask8 = (uint8_t const *)p_mask;
uint32_t byte_idx = BITMASK_BYTE_GET(bit);
bit = BITMASK_RELBIT_GET(bit);
return (1 << bit) & p_mask8[byte_idx];
}
/**
* Function for setting a bit in the multi-byte bit mask.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
{
uint8_t * p_mask8 = (uint8_t *)p_mask;
uint32_t byte_idx = BITMASK_BYTE_GET(bit);
bit = BITMASK_RELBIT_GET(bit);
p_mask8[byte_idx] |= (1 << bit);
}
/**
* Function for clearing a bit in the multi-byte bit mask.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
uint8_t * p_mask8 = (uint8_t *)p_mask;
uint32_t byte_idx = BITMASK_BYTE_GET(bit);
bit = BITMASK_RELBIT_GET(bit);
p_mask8[byte_idx] &= ~(1 << bit);
}
/**
* Function for performing bitwise OR operation on two multi-byte bit masks.
*
* @param p_mask1 A pointer to the first bit mask.
* @param p_mask2 A pointer to the second bit mask.
* @param p_mask_out A pointer to the output bit mask.
* @param length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
void const * p_mask2,
void * p_out_mask,
uint32_t length)
{
uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
uint32_t i;
for (i = 0; i < length; i++)
{
p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i];
}
}
/**
* Function for performing bitwise AND operation on two multi-byte bit masks.
*
* @param p_mask1 A pointer to the first bit mask.
* @param p_mask2 A pointer to the second bit mask.
* @param p_mask_out A pointer to the output bit mask.
* @param length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1,
void const * p_mask2,
void * p_out_mask,
uint32_t length)
{
uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
uint32_t i;
for (i = 0; i < length; i++)
{
p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i];
}
}
#ifdef __cplusplus
}
#endif
#endif //NRF_BITMASK_H

15
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/serial_api.c
View File

@ -45,7 +45,6 @@
#include "mbed_error.h"
#include "nrf_uart.h"
#include "nrf_drv_common.h"
#include "nrf_drv_config.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
@ -56,8 +55,8 @@
#define UART_INSTANCE_ID 0
#define UART_CB uart_cb[UART_INSTANCE_ID]
#define UART_DEFAULT_BAUDRATE UART0_CONFIG_BAUDRATE
#define UART_DEFAULT_PARITY UART0_CONFIG_PARITY
#define UART_DEFAULT_BAUDRATE UART_DEFAULT_CONFIG_BAUDRATE
#define UART_DEFAULT_PARITY UART_DEFAULT_CONFIG_PARITY
// expected the macro from mbed configuration system
#ifndef MBED_CONF_NORDIC_UART_HWFC
@ -66,17 +65,17 @@
#endif
#if MBED_CONF_NORDIC_UART_HWFC == 1
#define UART_DEFAULT_HWFC UART0_CONFIG_HWFC
#define UART_DEFAULT_HWFC UART_DEFAULT_CONFIG_HWFC
#else
#define UART_DEFAULT_HWFC NRF_UART_HWFC_DISABLED
#endif
#define UART_DEFAULT_CTS UART0_CONFIG_PSEL_CTS
#define UART_DEFAULT_RTS UART0_CONFIG_PSEL_RTS
#define UART_DEFAULT_CTS CTS_PIN_NUMBER
#define UART_DEFAULT_RTS RTS_PIN_NUMBER
#ifdef NRF51
#define NRFx_MBED_UART_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#elif defined(NRF52)
#elif defined(NRF52) || defined(NRF52840_XXAA)
#define NRFx_MBED_UART_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
#endif
@ -555,7 +554,7 @@ static void internal_set_hwfc(FlowControl type,
nrf_gpio_cfg_input(UART_CB.pselcts, NRF_GPIO_PIN_NOPULL);
}
UART_CB.hwfc = (type == FlowControlNone)? NRF_UART_HWFC_DISABLED : UART0_CONFIG_HWFC;
UART_CB.hwfc = (type == FlowControlNone)? NRF_UART_HWFC_DISABLED : UART_DEFAULT_CONFIG_HWFC;
nrf_uart_configure(UART_INSTANCE, UART_CB.parity, UART_CB.hwfc);
nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_CB.pselrts, UART_CB.pselcts);

4
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sleep.c
View File

@ -33,7 +33,7 @@ void sleep(void)
// the processor from disabled interrupts.
SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
#ifdef NRF52
#if defined(NRF52) || defined(NRF52840_XXAA)
/* Clear exceptions and PendingIRQ from the FPU unit */
__set_FPSCR(__get_FPSCR() & ~(FPU_EXCEPTION_MASK));
(void) __get_FPSCR();
@ -41,7 +41,7 @@ void sleep(void)
#endif
// If the SoftDevice is enabled, its API must be used to go to sleep.
if (softdevice_handler_isEnabled()) {
if (softdevice_handler_is_enabled()) {
sd_power_mode_set(NRF_POWER_MODE_LOWPWR);
sd_app_evt_wait();
} else {

12
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/spi_api.c
View File

@ -186,7 +186,7 @@ static void slave_event_handler(uint8_t spi_idx,
// And prepare for the next transfer.
// Previous data set in 'spi_slave_write' (if any) has been transmitted,
// now use the default one, until some new is set by 'spi_slave_write'.
p_spi_info->tx_buf = NRF_DRV_SPIS_DEFAULT_ORC;
p_spi_info->tx_buf = SPIS_DEFAULT_ORC;
nrf_drv_spis_buffers_set(&m_instances[spi_idx].slave,
(uint8_t const *)&p_spi_info->tx_buf, 1,
(uint8_t *)&p_spi_info->rx_buf, 1);
@ -228,7 +228,7 @@ static void prepare_master_config(nrf_drv_spi_config_t *p_config,
p_config->frequency = p_spi_info->frequency;
p_config->mode = (nrf_drv_spi_mode_t)p_spi_info->spi_mode;
p_config->irq_priority = SPI1_CONFIG_IRQ_PRIORITY;
p_config->irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY;
p_config->orc = 0xFF;
p_config->bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
}
@ -242,9 +242,9 @@ static void prepare_slave_config(nrf_drv_spis_config_t *p_config,
p_config->csn_pin = p_spi_info->ss_pin;
p_config->mode = (nrf_drv_spis_mode_t)p_spi_info->spi_mode;
p_config->irq_priority = SPIS1_CONFIG_IRQ_PRIORITY;
p_config->orc = NRF_DRV_SPIS_DEFAULT_ORC;
p_config->def = NRF_DRV_SPIS_DEFAULT_DEF;
p_config->irq_priority = SPIS_DEFAULT_CONFIG_IRQ_PRIORITY;
p_config->orc = SPIS_DEFAULT_ORC;
p_config->def = SPIS_DEFAULT_DEF;
p_config->bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST;
p_config->csn_pullup = NRF_DRV_SPIS_DEFAULT_CSN_PULLUP;
p_config->miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE;
@ -360,7 +360,7 @@ void spi_format(spi_t *obj, int bits, int mode, int slave)
m_slave_event_handlers[SPI_IDX(obj)]);
// Prepare the slave for transfer.
p_spi_info->tx_buf = NRF_DRV_SPIS_DEFAULT_ORC;
p_spi_info->tx_buf = SPIS_DEFAULT_ORC;
nrf_drv_spis_buffers_set(SLAVE_INST(obj),
(uint8_t const *)&p_spi_info->tx_buf, 1,
(uint8_t *)&p_spi_info->rx_buf, 1);

3
targets/TARGET_NORDIC/TARGET_NRF5_SDK13/us_ticker.c
View File

@ -40,7 +40,6 @@
#include "common_rtc.h"
#include "app_util.h"
#include "nrf_drv_common.h"
#include "nrf_drv_config.h"
#include "lp_ticker_api.h"
@ -132,7 +131,7 @@ void common_rtc_init(void)
nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE),
#ifdef NRF51
APP_IRQ_PRIORITY_LOW
#elif defined(NRF52)
#elif defined(NRF52) || defined(NRF52840_XXAA)
APP_IRQ_PRIORITY_LOWEST
#endif
);

17
targets/TARGET_NORDIC/mbed_rtx.h
View File

@ -55,6 +55,21 @@
#define OS_CLOCK 64000000
#endif
#elif defined(TARGET_MCU_NRF52840)
#ifndef INITIAL_SP
#define INITIAL_SP (0x20040000UL)
#endif
#ifndef OS_TASKCNT
#define OS_TASKCNT 24
#endif
#ifndef OS_MAINSTKSIZE
#define OS_MAINSTKSIZE 2048
#endif
#ifndef OS_CLOCK
#define OS_CLOCK 64000000
#endif
#endif
#endif // defined(TARGET_MCU_NRF51822)...
#endif // #ifndef MBED_MBED_RTX_H

46
targets/targets.json
View File

@ -2557,6 +2557,52 @@
},
"device_name": "nRF52832_xxAA"
},
"MCU_NRF52840": {
"inherits": ["Target"],
"core": "Cortex-M4F",
"macros": ["TARGET_NRF52840", "BLE_STACK_SUPPORT_REQD", "SOFTDEVICE_PRESENT", "S140", "NRF_SD_BLE_API_VERSION=5", "NRF52840_XXAA", "NRF_DFU_SETTINGS_VERSION=1"],
"extra_labels": ["NORDIC", "MCU_NRF52840", "NRF5_SDK13"],
"OUTPUT_EXT": "hex",
"is_disk_virtual": true,
"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
"public": false,
"detect_code": ["1101"],
"program_cycle_s": 6,
"MERGE_SOFT_DEVICE": true,
"EXPECTED_SOFTDEVICES_WITH_OFFSETS": [
{
"boot": "",
"name": "s140_nrf52840_5.0.0-1.alpha_softdevice.hex",
"offset": 135168
}
],
"bootloader_select_index": 0,
"post_binary_hook": {
"function": "MCU_NRF51Code.binary_hook",
"toolchains": ["ARM_STD", "GCC_ARM", "IAR"]
},
"MERGE_BOOTLOADER": false,
"features": [],
"config": {
"lf_clock_src": {
"value": "NRF_LF_SRC_XTAL",
"macro_name": "MBED_CONF_NORDIC_NRF_LF_CLOCK_SRC"
},
"uart_hwfc": {
"help": "Value: 1 for enable, 0 for disable",
"value": 1,
"macro_name": "MBED_CONF_NORDIC_UART_HWFC"
}
}
},
"NRF52840_DK": {
"supported_form_factors": ["ARDUINO"],
"inherits": ["MCU_NRF52840"],
"macros_add": ["BOARD_PCA10056", "CONFIG_GPIO_AS_PINRESET", "SWI_DISABLE0"],
"device_has": ["ANALOGIN", "ERROR_PATTERN", "I2C", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPI_ASYNCH", "SPISLAVE"],
"release_versions": ["2", "5"],
"device_name": "nRF52840_xxAA"
},
"BLUEPILL_F103C8": {
"core": "Cortex-M3",
"default_toolchain": "GCC_ARM",