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Pull up EFM32 linker and startup files to latest SDK version.

pull/1501/head
Steven Cooreman 2016-01-12 14:16:06 +01:00
parent 764d54f2d5
commit a0ba4e6489
23 changed files with 27 additions and 182 deletions
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21
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/TOOLCHAIN_ARM_MICRO/startup_efm32gg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32gg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32GG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -269,27 +269,8 @@ EMU_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

12
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/TOOLCHAIN_ARM_STD/startup_efm32gg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32gg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32GG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -269,14 +269,6 @@ EMU_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
@ -290,6 +282,4 @@ __user_initial_stackheap PROC
ALIGN
ENDIF
END

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/TOOLCHAIN_GCC_ARM/efm32gg.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG_STK3700/TOOLCHAIN_GCC_ARM/startup_efm32gg.S
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@ -1,7 +1,7 @@
/* @file startup_efm32gg.S
* @brief startup file for Silicon Labs EFM32GG devices.
* For use with GCC for ARM Embedded Processors
* @version 4.1.0
* @version 4.2.1
* Date: 12 June 2014
*
*/

21
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG_STK3400/TOOLCHAIN_ARM_MICRO/startup_efm32hg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32hg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32HG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -195,27 +195,8 @@ TIMER2_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG_STK3400/TOOLCHAIN_GCC_ARM/efm32hg.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG_STK3400/TOOLCHAIN_GCC_ARM/startup_efm32hg.S
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@ -1,7 +1,7 @@
/* @file startup_efm32hg.S
* @brief startup file for Silicon Labs EFM32HG devices.
* For use with GCC for ARM Embedded Processors
* @version 4.1.0
* @version 4.2.1
* Date: 12 June 2014
*
*/

22
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/TOOLCHAIN_ARM_MICRO/startup_efm32lg.S
View File

@ -2,7 +2,7 @@
; * @file startup_efm32lg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32LG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -263,7 +263,6 @@ MSC_IRQHandler
AES_IRQHandler
EBI_IRQHandler
EMU_IRQHandler
B .
ENDP
@ -271,27 +270,8 @@ EMU_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

14
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/TOOLCHAIN_ARM_STD/startup_efm32lg.S
View File

@ -2,7 +2,7 @@
; * @file startup_efm32lg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32LG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -35,6 +35,7 @@ Stack_Size EQU 0x00000400
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x20008000
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
@ -262,7 +263,6 @@ MSC_IRQHandler
AES_IRQHandler
EBI_IRQHandler
EMU_IRQHandler
B .
ENDP
@ -270,14 +270,6 @@ EMU_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
@ -291,6 +283,4 @@ __user_initial_stackheap PROC
ALIGN
ENDIF
END

3
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/TOOLCHAIN_GCC_ARM/efm32lg.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY
@ -14,7 +14,6 @@ MEMORY
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 262144
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 32768
}
/* MBED: mbed needs to be able to dynamically set the interrupt vector table.
* We make room for the table at the very beginning of RAM, i.e. at
* 0x20000000. We need (16+40) * sizeof(uint32_t) = 224 bytes for EFM32LG */

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG_STK3600/TOOLCHAIN_GCC_ARM/startup_efm32lg.S
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@ -1,7 +1,7 @@
/* @file startup_efm32lg.S
* @brief startup file for Silicon Labs EFM32LG devices.
* For use with GCC for ARM Embedded Processors
* @version 4.1.0
* @version 4.2.1
* Date: 12 June 2014
*
*/

21
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG_STK3401/TOOLCHAIN_ARM_MICRO/startup_efm32pg1b.S
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@ -2,7 +2,7 @@
; * @file startup_efm32pg1b.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32PG1B Device Series
; * @version 4.2.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -235,27 +235,8 @@ FPUEH_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

12
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG_STK3401/TOOLCHAIN_ARM_STD/startup_efm32pg1b.S
View File

@ -2,7 +2,7 @@
; * @file startup_efm32pg1b.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32PG1B Device Series
; * @version 4.2.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -235,14 +235,6 @@ FPUEH_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
@ -256,6 +248,4 @@ __user_initial_stackheap PROC
ALIGN
ENDIF
END

4
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG_STK3401/TOOLCHAIN_GCC_ARM/efm32pg1b.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY
@ -17,7 +17,7 @@ MEMORY
/* MBED: mbed needs to be able to dynamically set the interrupt vector table.
* We make room for the table at the very beginning of RAM, i.e. at
* 0x20000000. We need (16+34) * sizeof(uint32_t) = 200 bytes for EFM32LG */
* 0x20000000. We need (16+34) * sizeof(uint32_t) = 200 bytes for EFM32PG */
__vector_size = 0xC8;
/* Linker script to place sections and symbol values. Should be used together

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG_STK3401/TOOLCHAIN_GCC_ARM/startup_efm32pg1b.S
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@ -1,7 +1,7 @@
/* @file startup_efm32pg1b.S
* @brief startup file for Silicon Labs EFM32PG1B devices.
* For use with GCC for ARM Embedded Processors
* @version 4.2.0
* @version 4.2.1
* Date: 12 June 2014
*
*/

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG_STK3401/TOOLCHAIN_IAR/startup_efm32pg1b.S
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@ -2,7 +2,7 @@
; * @file startup_efm32pg1b.s
; * @brief CMSIS Core Device Startup File
; * Silicon Labs EFM32PG1B Device Series
; * @version 4.2.0
; * @version 4.2.1
; * @date 30. January 2012
; *
; * @note

21
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/TOOLCHAIN_ARM_MICRO/startup_efm32wg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32wg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32WG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -272,27 +272,8 @@ FPUEH_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

13
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/TOOLCHAIN_ARM_STD/startup_efm32wg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32wg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32WG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -35,6 +35,7 @@ Stack_Size EQU 0x00000400
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x20008000
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
@ -271,14 +272,6 @@ FPUEH_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
@ -292,6 +285,4 @@ __user_initial_stackheap PROC
ALIGN
ENDIF
END

4
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/TOOLCHAIN_GCC_ARM/efm32wg.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY
@ -73,7 +73,7 @@ SECTIONS
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/TOOLCHAIN_GCC_ARM/startup_efm32wg.S
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@ -1,7 +1,7 @@
/* @file startup_efm32wg.S
* @brief startup file for Silicon Labs EFM32WG devices.
* For use with GCC for ARM Embedded Processors
* @version 4.1.0
* @version 4.2.1
* Date: 12 June 2014
*
*/

21
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/TOOLCHAIN_ARM_MICRO/startup_efm32zg.S
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@ -2,7 +2,7 @@
; * @file startup_efm32zg.s
; * @brief CMSIS Core Device Startup File for
; * Silicon Labs EFM32ZG Device Series
; * @version 4.1.0
; * @version 4.2.1
; * @date 03. February 2012
; *
; * @note
@ -186,27 +186,8 @@ AES_IRQHandler
; User Initial Stack & Heap
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap PROC
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ENDP
ALIGN
ENDIF
END

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/TOOLCHAIN_GCC_ARM/efm32zg.ld
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@ -6,7 +6,7 @@
/* */
/* Silicon Laboratories, Inc. 2015 */
/* */
/* Version 4.1.0 */
/* Version 4.2.0 */
/* */
MEMORY

2
libraries/mbed/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/TOOLCHAIN_GCC_ARM/startup_efm32zg.S
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@ -1,7 +1,7 @@
/* @file startup_efm32zg.S
* @brief startup file for Silicon Labs EFM32ZG devices.
* For use with GCC for ARM Embedded Processors
* @version 4.1.0
* @version 4.2.1
* Date: 12 June 2014
*
*/