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Meet new RTC HAL spec (Mbed OS 5.9) 

1. Power down RTC access from CPU domain in rtc_free. After rtc_free, RTC gets
   inaccessible from CPU domain but keeps counting.
2. Fix RTC cannot cross reset cycle.
pull/7631/head
ccli8 2018-05-28 16:24:36 +08:00 committed by Cruz Monrreal II
parent d5d8c233d0
commit 9fac970523
2 changed files with 18 additions and 2 deletions
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18
targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c
View File

@ -127,7 +127,7 @@ void rtc_init(void)
__NONSECURE_ENTRY __NONSECURE_ENTRY
void rtc_free(void) void rtc_free(void)
{ {
// N/A CLK_DisableModuleClock_S(rtc_modinit.clkidx);
} }
__NONSECURE_ENTRY __NONSECURE_ENTRY
@ -169,9 +169,17 @@ time_t rtc_read(void)
if (! _rtc_maketime(&datetime_tm, &t_hwrtc_origin, RTC_FULL_LEAP_YEAR_SUPPORT)) { if (! _rtc_maketime(&datetime_tm, &t_hwrtc_origin, RTC_FULL_LEAP_YEAR_SUPPORT)) {
return 0; return 0;
} }
/* Load t_write from RTC spare register to cross reset cycle */
RTC_T *rtc_base = (RTC_T *) NU_MODBASE(rtc_modinit.modname);
RTC_WaitAccessEnable();
RTC_EnableSpareAccess();
RTC_WaitAccessEnable();
t_write = RTC_READ_SPARE_REGISTER(rtc_base, 0);
} }
S_RTC_TIME_DATA_T hwrtc_datetime_2K_present; S_RTC_TIME_DATA_T hwrtc_datetime_2K_present;
RTC_WaitAccessEnable();
RTC_GetDateAndTime(&hwrtc_datetime_2K_present); RTC_GetDateAndTime(&hwrtc_datetime_2K_present);
/* Convert date time from H/W RTC to struct TM */ /* Convert date time from H/W RTC to struct TM */
rtc_convert_datetime_hwrtc_to_tm(&datetime_tm, &hwrtc_datetime_2K_present); rtc_convert_datetime_hwrtc_to_tm(&datetime_tm, &hwrtc_datetime_2K_present);
@ -195,6 +203,14 @@ void rtc_write(time_t t)
t_write = t; t_write = t;
/* Store t_write to RTC spare register to cross reset cycle */
RTC_T *rtc_base = (RTC_T *) NU_MODBASE(rtc_modinit.modname);
RTC_WaitAccessEnable();
RTC_EnableSpareAccess();
RTC_WaitAccessEnable();
RTC_WRITE_SPARE_REGISTER(rtc_base, 0, t_write);
RTC_WaitAccessEnable();
RTC_SetDateAndTime((S_RTC_TIME_DATA_T *) &DATETIME_HWRTC_ORIGIN); RTC_SetDateAndTime((S_RTC_TIME_DATA_T *) &DATETIME_HWRTC_ORIGIN);
/* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */ /* NOTE: When engine is clocked by low power clock source (LXT/LIRC), we need to wait for 3 engine clocks. */
wait_us((NU_US_PER_SEC / NU_RTCCLK_PER_SEC) * 3); wait_us((NU_US_PER_SEC / NU_RTCCLK_PER_SEC) * 3);

2
targets/targets.json
View File

@ -4316,7 +4316,7 @@
} }
}, },
"inherits": ["Target"], "inherits": ["Target"],
"device_has": ["USTICKER", "LPTICKER", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "RTC", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"], "device_has": ["USTICKER", "LPTICKER", "RTC", "ANALOGIN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "STDIO_MESSAGES", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "TRNG", "FLASH"],
"detect_code": ["1305"], "detect_code": ["1305"],
"release_versions": ["5"], "release_versions": ["5"],
"device_name": "M2351KIAAEES", "device_name": "M2351KIAAEES",