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Modify HW accelerator drivers to new error code 

Have the HW accelearation drivers return the platform module
errors about feature unsupported, and hw acceleration failure,
because the moduel specific errors will be removed.
pull/8643/head
Ron Eldor 2018-10-24 14:21:59 +03:00
parent c40d86038c
commit 9f4e752ef3
14 changed files with 71 additions and 68 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
features/cryptocell/FEATURE_CRYPTOCELL310/cc_internal.c
View File

@ -24,6 +24,7 @@
#include "cc_internal.h"
#include "crys_ecpki_error.h"
#include "crys_ec_mont_edw_error.h"
#include "mbedtls/platform.h"
CRYS_ECPKI_DomainID_t convert_mbedtls_grp_id_to_crys_domain_id( mbedtls_ecp_group_id grp_id )
{
@ -135,7 +136,7 @@ int convert_CrysError_to_mbedtls_err( CRYSError_t Crys_err )
case CRYS_ECMONT_IS_NOT_SUPPORTED:
case CRYS_ECEDW_IS_NOT_SUPPORTED:
return ( MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE );
return ( MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED );
case CRYS_ECEDW_RND_GEN_VECTOR_FUNC_ERROR:
return ( MBEDTLS_ERR_ECP_RANDOM_FAILED );
@ -146,7 +147,7 @@ int convert_CrysError_to_mbedtls_err( CRYSError_t Crys_err )
return ( MBEDTLS_ERR_ECP_INVALID_KEY );
default:
return ( MBEDTLS_ERR_ECP_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
}

2
features/cryptocell/FEATURE_CRYPTOCELL310/cc_internal.h
View File

@ -122,7 +122,7 @@ uint32_t convert_mbedtls_to_cc_rand( void* mbedtls_rand, uint16_t outSizeBytes,
*
*
* \return \c The corresponding Mbed TLS error,
* MBEDTLS_ERR_ECP_HW_ACCEL_FAILED as default, if none found
* MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED as default, if none found
*/
int convert_CrysError_to_mbedtls_err( CRYSError_t Crys_err );

6
features/cryptocell/FEATURE_CRYPTOCELL310/ccm_alt.c
View File

@ -51,7 +51,7 @@ int mbedtls_ccm_setkey( mbedtls_ccm_context *ctx,
if( cipher != MBEDTLS_CIPHER_ID_AES ||
keybits != 128 )
{
return ( MBEDTLS_ERR_AES_FEATURE_UNAVAILABLE );
return ( MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED );
}
memcpy( ctx->cipher_key , key, keybits / 8 );
@ -93,7 +93,7 @@ int mbedtls_ccm_encrypt_and_tag( mbedtls_ccm_context *ctx, size_t length,
CrysRet = CRYS_AESCCM( SASI_AES_ENCRYPT, ctx->cipher_key, ctx->keySize_ID,(uint8_t*)iv, iv_len,
(uint8_t*)add, add_len, (uint8_t*)input, length, output, tag_len, tag );
if( CrysRet != CRYS_OK )
return ( MBEDTLS_ERR_CCM_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
@ -130,7 +130,7 @@ int mbedtls_ccm_auth_decrypt( mbedtls_ccm_context *ctx, size_t length,
CrysRet = CRYS_AESCCM( SASI_AES_DECRYPT, ctx->cipher_key, ctx->keySize_ID,(uint8_t*)iv, iv_len,
(uint8_t*)add, add_len, (uint8_t*)input, length, output, tag_len, (uint8_t*)tag );
if ( CrysRet != CRYS_OK )
return ( MBEDTLS_ERR_CCM_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );

4
features/cryptocell/FEATURE_CRYPTOCELL310/ecdh_alt.c
View File

@ -118,7 +118,7 @@ int mbedtls_ecdh_gen_public( mbedtls_ecp_group *grp, mbedtls_mpi *d, mbedtls_ecp
MBEDTLS_MPI_CHK( mbedtls_mpi_lset( &Q->Z, 1 ) );
}
else
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
cleanup:
@ -231,7 +231,7 @@ int mbedtls_ecdh_compute_shared( mbedtls_ecp_group *grp, mbedtls_mpi *z,
}
else
{
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
goto cleanup;
}

6
features/cryptocell/FEATURE_CRYPTOCELL310/ecdsa_alt.c
View File

@ -132,7 +132,7 @@ int mbedtls_ecdsa_sign( mbedtls_ecp_group *grp, mbedtls_mpi *r, mbedtls_mpi *s,
}
else
{
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
goto cleanup;
}
@ -226,7 +226,7 @@ int mbedtls_ecdsa_verify( mbedtls_ecp_group *grp,
}
}
else
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
cleanup:
@ -313,7 +313,7 @@ int mbedtls_ecdsa_genkey( mbedtls_ecdsa_context *ctx, mbedtls_ecp_group_id gid,
}
}
else
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
cleanup:

8
features/cryptocell/FEATURE_CRYPTOCELL310/sha1_alt.c
View File

@ -47,7 +47,7 @@ void mbedtls_sha1_clone( mbedtls_sha1_context *dst,
int mbedtls_sha1_starts_ret( mbedtls_sha1_context *ctx )
{
if( CRYS_HASH_Init( &ctx->crys_hash_ctx, CRYS_HASH_SHA1_mode ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
@ -57,7 +57,7 @@ int mbedtls_sha1_update_ret( mbedtls_sha1_context *ctx,
size_t ilen )
{
if( CRYS_HASH_Update( &ctx->crys_hash_ctx, (uint8_t*)input, ilen ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
@ -73,14 +73,14 @@ int mbedtls_sha1_finish_ret( mbedtls_sha1_context *ctx,
return ( 0 );
}
else
return ( MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
}
int mbedtls_internal_sha1_process( mbedtls_sha1_context *ctx,
const unsigned char data[64] )
{
if( CRYS_HASH_Update( &ctx->crys_hash_ctx, (uint8_t*)data, 64 ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
#endif //MBEDTLS_SHA1_ALT

8
features/cryptocell/FEATURE_CRYPTOCELL310/sha256_alt.c
View File

@ -47,7 +47,7 @@ int mbedtls_sha256_starts_ret( mbedtls_sha256_context *ctx, int is224 )
{
if(CRYS_HASH_Init( &ctx->crys_hash_ctx, is224 ?
CRYS_HASH_SHA224_mode : CRYS_HASH_SHA256_mode ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
@ -55,7 +55,7 @@ int mbedtls_internal_sha256_process( mbedtls_sha256_context *ctx,
const unsigned char data[64] )
{
if( CRYS_HASH_Update( &ctx->crys_hash_ctx, (uint8_t*)data, 64 ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
@ -64,7 +64,7 @@ int mbedtls_sha256_update_ret( mbedtls_sha256_context *ctx,
size_t ilen )
{
if( CRYS_HASH_Update( &ctx->crys_hash_ctx, (uint8_t*)input, ilen ) != CRYS_OK )
return ( MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
return ( 0 );
}
@ -80,7 +80,7 @@ int mbedtls_sha256_finish_ret( mbedtls_sha256_context *ctx,
return ( 0 );
}
else
return ( MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED );
return ( MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED );
}
#endif //MBEDTLS_SHA256_ALT

4
features/mbedtls/targets/TARGET_NUVOTON/TARGET_M480/ecp/ecp_internal_alt.c
View File

@ -484,7 +484,7 @@ NU_STATIC int internal_run_eccop(const mbedtls_ecp_group *grp,
/* Check supported maximum key bits */
if (grp->pbits > NU_ECC_MAXKEYBITS) {
return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
return MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
}
int ret;
@ -675,7 +675,7 @@ NU_STATIC int internal_run_modop(mbedtls_mpi *r,
/* Check supported maximum key bits */
if (pbits > NU_ECC_MAXKEYBITS) {
return MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
return MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
}
/* Check MODOP operations are legal */

3
features/mbedtls/targets/TARGET_STM/aes_alt.c
View File

@ -24,6 +24,7 @@
#if defined(MBEDTLS_AES_ALT)
#if defined(TARGET_STM32L486xG) || defined (TARGET_STM32L443xC)
#include "mbedtls/platform.h"
//the following defines are provided to maintain compatibility between STM32 families
#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
#define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
@ -40,7 +41,7 @@ static int aes_set_key(mbedtls_aes_context *ctx, const unsigned char *key, unsig
break;
case 192:
#if defined (TARGET_STM32L486xG) || defined (TARGET_STM32L443xC)
return (MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
return (MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED);
#else
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_192B;
memcpy(ctx->aes_key, key, 24);

26
features/mbedtls/targets/TARGET_STM/md5_alt.c
View File

@ -99,7 +99,7 @@ int mbedtls_md5_starts_ret(mbedtls_md5_context *ctx)
{
/* HASH IP initialization */
if (HAL_HASH_DeInit(&ctx->hhash_md5) != 0) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
/* HASH Configuration */
@ -107,11 +107,11 @@ int mbedtls_md5_starts_ret(mbedtls_md5_context *ctx)
/* clear CR ALGO value */
HASH->CR &= ~HASH_CR_ALGO_Msk;
if (HAL_HASH_Init(&ctx->hhash_md5) != 0) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_md5_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
@ -121,14 +121,14 @@ int mbedtls_internal_md5_process(mbedtls_md5_context *ctx, const unsigned char d
{
if (st_md5_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)data, ST_MD5_BLOCK_SIZE) != 0) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_md5_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -141,7 +141,7 @@ int mbedtls_md5_update_ret(mbedtls_md5_context *ctx, const unsigned char *input,
if (currentlen != 0) {
if (st_md5_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
// store mechanism to accumulate ST_MD5_BLOCK_SIZE bytes (512 bits) in the HW
@ -161,7 +161,7 @@ int mbedtls_md5_update_ret(mbedtls_md5_context *ctx, const unsigned char *input,
size_t iter = currentlen / ST_MD5_BLOCK_SIZE;
if (iter != 0) {
if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)(input + ST_MD5_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_MD5_BLOCK_SIZE)) != 0) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
// sbuf is completely accumulated, now copy up to 63 remaining bytes
@ -173,7 +173,7 @@ int mbedtls_md5_update_ret(mbedtls_md5_context *ctx, const unsigned char *input,
if (st_md5_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
return 0;
@ -183,12 +183,12 @@ int mbedtls_md5_finish_ret(mbedtls_md5_context *ctx, unsigned char output[16])
{
if (st_md5_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
/* Last accumulation for extra bytes in sbuf_len */
/* This sets HW flags in case mbedtls_md5_update has not been called yet */
if (HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, ctx->sbuf, ctx->sbuf_len) != 0) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
mbedtls_zeroize(ctx->sbuf, ST_MD5_BLOCK_SIZE);
@ -196,11 +196,11 @@ int mbedtls_md5_finish_ret(mbedtls_md5_context *ctx, unsigned char output[16])
__HAL_HASH_START_DIGEST();
if (HAL_HASH_MD5_Finish(&ctx->hhash_md5, output, 10)) {
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_md5_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_MD5_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}

26
features/mbedtls/targets/TARGET_STM/sha1_alt.c
View File

@ -97,7 +97,7 @@ int mbedtls_sha1_starts_ret(mbedtls_sha1_context *ctx)
{
/* Deinitializes the HASH peripheral */
if (HAL_HASH_DeInit(&ctx->hhash_sha1) == HAL_ERROR) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
/* HASH Configuration */
@ -105,11 +105,11 @@ int mbedtls_sha1_starts_ret(mbedtls_sha1_context *ctx)
/* clear CR ALGO value */
HASH->CR &= ~HASH_CR_ALGO_Msk;
if (HAL_HASH_Init(&ctx->hhash_sha1) == HAL_ERROR) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_sha1_save_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -118,15 +118,15 @@ int mbedtls_internal_sha1_process(mbedtls_sha1_context *ctx, const unsigned char
{
if (st_sha1_restore_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, (uint8_t *) data, ST_SHA1_BLOCK_SIZE) != 0) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_sha1_save_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -137,7 +137,7 @@ int mbedtls_sha1_update_ret(mbedtls_sha1_context *ctx, const unsigned char *inpu
size_t currentlen = ilen;
if (st_sha1_restore_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
// store mechanism to accumulate ST_SHA1_BLOCK_SIZE bytes (512 bits) in the HW
@ -163,7 +163,7 @@ int mbedtls_sha1_update_ret(mbedtls_sha1_context *ctx, const unsigned char *inpu
// Process every input as long as it is %64 bytes, ie 512 bits
size_t iter = currentlen / ST_SHA1_BLOCK_SIZE;
if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, (uint8_t *)(input + ST_SHA1_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA1_BLOCK_SIZE)) != 0) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
// sbuf is completely accumulated, now copy up to 63 remaining bytes
ctx->sbuf_len = currentlen % ST_SHA1_BLOCK_SIZE;
@ -173,7 +173,7 @@ int mbedtls_sha1_update_ret(mbedtls_sha1_context *ctx, const unsigned char *inpu
}
if (st_sha1_save_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -182,24 +182,24 @@ int mbedtls_sha1_finish_ret(mbedtls_sha1_context *ctx, unsigned char output[20])
{
if (st_sha1_restore_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
/* Last accumulation for extra bytes in sbuf_len */
/* This allows the HW flags to be in place in case mbedtls_sha256_update has not been called yet */
if (HAL_HASH_SHA1_Accumulate(&ctx->hhash_sha1, ctx->sbuf, ctx->sbuf_len) != 0) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
mbedtls_zeroize(ctx->sbuf, ST_SHA1_BLOCK_SIZE);
ctx->sbuf_len = 0;
__HAL_HASH_START_DIGEST();
if (HAL_HASH_SHA1_Finish(&ctx->hhash_sha1, output, 10) != 0) {
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_sha1_save_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA1_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}

34
features/mbedtls/targets/TARGET_STM/sha256_alt.c
View File

@ -97,7 +97,7 @@ int mbedtls_sha256_starts_ret(mbedtls_sha256_context *ctx, int is224)
{
/* HASH IP initialization */
if (HAL_HASH_DeInit(&ctx->hhash_sha256) == HAL_ERROR) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
ctx->is224 = is224;
@ -107,11 +107,11 @@ int mbedtls_sha256_starts_ret(mbedtls_sha256_context *ctx, int is224)
HASH->CR &= ~HASH_CR_ALGO_Msk;
if (HAL_HASH_Init(&ctx->hhash_sha256) == HAL_ERROR) {
// error found to be returned
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (st_sha256_save_hw_context(ctx) != 1) {
// return HASH_BUSY timeout Error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -120,21 +120,21 @@ int mbedtls_internal_sha256_process(mbedtls_sha256_context *ctx, const unsigned
{
if (st_sha256_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
if (ctx->is224 == 0) {
if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, (uint8_t *) data, ST_SHA256_BLOCK_SIZE) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
} else {
if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, (uint8_t *) data, ST_SHA256_BLOCK_SIZE) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
if (st_sha256_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -145,7 +145,7 @@ int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *
size_t currentlen = ilen;
if (st_sha256_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
// store mechanism to accumulate ST_SHA256_BLOCK_SIZE bytes (512 bits) in the HW
@ -177,11 +177,11 @@ int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *
if (iter != 0) {
if (ctx->is224 == 0) {
if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, (uint8_t *)(input + ST_SHA256_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA256_BLOCK_SIZE)) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
} else {
if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, (uint8_t *)(input + ST_SHA256_BLOCK_SIZE - ctx->sbuf_len), (iter * ST_SHA256_BLOCK_SIZE)) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
}
@ -193,7 +193,7 @@ int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *
}
if (st_sha256_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}
@ -202,17 +202,17 @@ int mbedtls_sha256_finish_ret(mbedtls_sha256_context *ctx, unsigned char output[
{
if (st_sha256_restore_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
/* Last accumulation for extra bytes in sbuf_len */
/* This allows the HW flags to be in place in case mbedtls_sha256_update has not been called yet */
if (ctx->is224 == 0) {
if (HAL_HASHEx_SHA256_Accumulate(&ctx->hhash_sha256, ctx->sbuf, ctx->sbuf_len) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
} else {
if (HAL_HASHEx_SHA224_Accumulate(&ctx->hhash_sha256, ctx->sbuf, ctx->sbuf_len) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
@ -222,16 +222,16 @@ int mbedtls_sha256_finish_ret(mbedtls_sha256_context *ctx, unsigned char output[
if (ctx->is224 == 0) {
if (HAL_HASHEx_SHA256_Finish(&ctx->hhash_sha256, output, 10) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
} else {
if (HAL_HASHEx_SHA224_Finish(&ctx->hhash_sha256, output, 10) != 0) {
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
}
if (st_sha256_save_hw_context(ctx) != 1) {
// Return HASH_BUSY timeout error here
return MBEDTLS_ERR_SHA256_HW_ACCEL_FAILED;
return MBEDTLS_ERR_PLATFORM_HW_ACCEL_FAILED;
}
return 0;
}

5
features/mbedtls/targets/TARGET_Silicon_Labs/aes_aes.c
View File

@ -28,6 +28,7 @@
#include "em_cmu.h"
#include "em_bus.h"
#include <string.h>
#include "mbedtls/platform.h"
#if defined(MBEDTLS_THREADING_C)
#include "mbedtls/threading.h"
@ -98,7 +99,7 @@ int mbedtls_aes_setkey_enc( mbedtls_aes_context *ctx,
if ( ( 128 != keybits ) && ( 256 != keybits ) )
{
/* Unsupported key size */
return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
return( MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED );
}
ctx->keybits = keybits;
@ -116,7 +117,7 @@ int mbedtls_aes_setkey_dec( mbedtls_aes_context *ctx,
{
if ( ( 128 != keybits ) && ( 256 != keybits ) )
/* Unsupported key size */
return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
return( MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED );
ctx->keybits = keybits;
switch (keybits)

2
features/mbedtls/targets/TARGET_Silicon_Labs/crypto_ecp.c
View File

@ -427,7 +427,7 @@ static int crypto_device_init( CRYPTO_TypeDef *device, const mbedtls_ecp_group *
#endif /* MBEDTLS_ECP_DP_SECP256R1_ENABLED */
default:
ret = MBEDTLS_ERR_ECP_FEATURE_UNAVAILABLE;
ret = MBEDTLS_ERR_PLATFORM_FEATURE_UNSUPPORTED;
break;
}