mirror of https://github.com/ARMmbed/mbed-os.git
Fix code style issues
parent
16d121c5d2
commit
9deecacc9b
132
drivers/QSPI.cpp
132
drivers/QSPI.cpp
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@ -26,8 +26,8 @@
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namespace mbed {
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QSPI* QSPI::_owner = NULL;
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SingletonPtr<PlatformMutex> QSPI::_mutex;
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SingletonPtr<PlatformMutex> QSPI::_mutex;
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QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel) :
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_qspi() {
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// No lock needed in the constructor
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@ -49,59 +49,115 @@ QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, Pin
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}
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qspi_return_status_t QSPI::configure_format(qspi_config_bus_width_t inst_width, qspi_config_bus_width_t address_width, qspi_config_address_size_t address_size, qspi_config_bus_width_t alt_width, qspi_config_alt_size_t alt_size, qspi_config_bus_width_t data_width, int dummy_cycles, int mode ) {
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if(!IS_BUS_WIDTH_VALID(inst_width)) return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(address_width)) return QSPI_INVALID_PARAMETER;
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if(!IS_SIZE_VALID(address_size)) return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(alt_width)) return QSPI_INVALID_PARAMETER;
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if(!IS_ALT_SIZE_VALID(alt_size)) return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(data_width)) return QSPI_INVALID_PARAMETER;
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if(dummy_cycles < 0) return QSPI_INVALID_PARAMETER;
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if(mode != 0 && mode != 1) return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(inst_width))
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return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(address_width))
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return QSPI_INVALID_PARAMETER;
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if(!IS_SIZE_VALID(address_size))
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return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(alt_width))
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return QSPI_INVALID_PARAMETER;
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if(!IS_ALT_SIZE_VALID(alt_size))
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return QSPI_INVALID_PARAMETER;
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if(!IS_BUS_WIDTH_VALID(data_width))
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return QSPI_INVALID_PARAMETER;
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if(dummy_cycles < 0)
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return QSPI_INVALID_PARAMETER;
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if(mode != 0 && mode != 1)
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return QSPI_INVALID_PARAMETER;
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lock();
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switch(inst_width) {
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case QSPI_BUS_SINGLE:_inst_width = QSPI_CFG_BUS_SINGLE; break;
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case QSPI_BUS_DUAL:_inst_width = QSPI_CFG_BUS_DUAL; break;
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case QSPI_BUS_QUAD:_inst_width = QSPI_CFG_BUS_QUAD; break;
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default:_inst_width = QSPI_CFG_BUS_SINGLE;
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case QSPI_BUS_SINGLE:
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_inst_width = QSPI_CFG_BUS_SINGLE;
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break;
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case QSPI_BUS_DUAL:
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_inst_width = QSPI_CFG_BUS_DUAL;
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break;
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case QSPI_BUS_QUAD:
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_inst_width = QSPI_CFG_BUS_QUAD;
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break;
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default:
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_inst_width = QSPI_CFG_BUS_SINGLE;
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}
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switch(address_width) {
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case QSPI_BUS_SINGLE:_address_width = QSPI_CFG_BUS_SINGLE; break;
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case QSPI_BUS_DUAL:_address_width = QSPI_CFG_BUS_DUAL; break;
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case QSPI_BUS_QUAD:_address_width = QSPI_CFG_BUS_QUAD; break;
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default:_address_width = QSPI_CFG_BUS_SINGLE;
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case QSPI_BUS_SINGLE:
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_address_width = QSPI_CFG_BUS_SINGLE;
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break;
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case QSPI_BUS_DUAL:
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_address_width = QSPI_CFG_BUS_DUAL;
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break;
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case QSPI_BUS_QUAD:
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_address_width = QSPI_CFG_BUS_QUAD;
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break;
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default:
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_address_width = QSPI_CFG_BUS_SINGLE;
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}
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switch(address_size) {
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case QSPI_ADDR_SIZE_8:_address_size = QSPI_CFG_ADDR_SIZE_8; break;
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case QSPI_ADDR_SIZE_16:_address_size = QSPI_CFG_ADDR_SIZE_16; break;
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case QSPI_ADDR_SIZE_24:_address_size = QSPI_CFG_ADDR_SIZE_24; break;
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case QSPI_ADDR_SIZE_32:_address_size = QSPI_CFG_ADDR_SIZE_32; break;
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default:_address_size = QSPI_CFG_ADDR_SIZE_8;
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case QSPI_ADDR_SIZE_8:
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_address_size = QSPI_CFG_ADDR_SIZE_8;
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break;
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case QSPI_ADDR_SIZE_16:
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_address_size = QSPI_CFG_ADDR_SIZE_16;
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break;
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case QSPI_ADDR_SIZE_24:
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_address_size = QSPI_CFG_ADDR_SIZE_24;
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break;
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case QSPI_ADDR_SIZE_32:
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_address_size = QSPI_CFG_ADDR_SIZE_32;
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break;
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default:
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_address_size = QSPI_CFG_ADDR_SIZE_8;
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}
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switch(alt_width) {
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case QSPI_BUS_SINGLE:_alt_width = QSPI_CFG_BUS_SINGLE; break;
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case QSPI_BUS_DUAL:_alt_width = QSPI_CFG_BUS_DUAL; break;
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case QSPI_BUS_QUAD:_alt_width = QSPI_CFG_BUS_QUAD; break;
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default:_alt_width = QSPI_CFG_BUS_SINGLE;
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case QSPI_BUS_SINGLE:
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_alt_width = QSPI_CFG_BUS_SINGLE;
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break;
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case QSPI_BUS_DUAL:
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_alt_width = QSPI_CFG_BUS_DUAL;
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break;
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case QSPI_BUS_QUAD:
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_alt_width = QSPI_CFG_BUS_QUAD;
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break;
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default:
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_alt_width = QSPI_CFG_BUS_SINGLE;
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}
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switch(alt_size) {
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case QSPI_ALT_SIZE_NONE:_alt_size = QSPI_CFG_ALT_SIZE_NONE; break;
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case QSPI_ALT_SIZE_8:_alt_size = QSPI_CFG_ALT_SIZE_8; break;
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case QSPI_ALT_SIZE_16:_alt_size = QSPI_CFG_ALT_SIZE_16; break;
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case QSPI_ALT_SIZE_24:_alt_size = QSPI_CFG_ALT_SIZE_24; break;
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case QSPI_ALT_SIZE_32:_alt_size = QSPI_CFG_ALT_SIZE_32; break;
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default:_alt_size = QSPI_CFG_ALT_SIZE_NONE;
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case QSPI_ALT_SIZE_NONE:
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_alt_size = QSPI_CFG_ALT_SIZE_NONE;
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break;
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case QSPI_ALT_SIZE_8:
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_alt_size = QSPI_CFG_ALT_SIZE_8;
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break;
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case QSPI_ALT_SIZE_16:
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_alt_size = QSPI_CFG_ALT_SIZE_16;
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break;
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case QSPI_ALT_SIZE_24:
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_alt_size = QSPI_CFG_ALT_SIZE_24;
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break;
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case QSPI_ALT_SIZE_32:
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_alt_size = QSPI_CFG_ALT_SIZE_32;
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break;
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default:
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_alt_size = QSPI_CFG_ALT_SIZE_NONE;
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}
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switch(data_width) {
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case QSPI_BUS_SINGLE:_data_width = QSPI_CFG_BUS_SINGLE; break;
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case QSPI_BUS_DUAL:_data_width = QSPI_CFG_BUS_DUAL; break;
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case QSPI_BUS_QUAD:_data_width = QSPI_CFG_BUS_QUAD; break;
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default:_data_width = QSPI_CFG_BUS_SINGLE;
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case QSPI_BUS_SINGLE:
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_data_width = QSPI_CFG_BUS_SINGLE;
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break;
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case QSPI_BUS_DUAL:
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_data_width = QSPI_CFG_BUS_DUAL;
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break;
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case QSPI_BUS_QUAD:
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_data_width = QSPI_CFG_BUS_QUAD;
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break;
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default:
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_data_width = QSPI_CFG_BUS_SINGLE;
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}
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_num_dummy_cycles = dummy_cycles;
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@ -135,7 +191,7 @@ qspi_return_status_t QSPI::initialize() {
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qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode );
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unlock();
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return ( ret == QSPI_STATUS_OK )? QSPI_SUCCESS:QSPI_ERROR;
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return ( ret == QSPI_STATUS_OK )? QSPI_SUCCESS : QSPI_ERROR;
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}
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qspi_return_status_t QSPI::read(unsigned int address, char *rx_buffer, size_t *rx_length) {
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@ -27,6 +27,9 @@
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#define ONE_MHZ 1000000
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namespace mbed {
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// Config/Mode Defines
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/** QSPI Bus width Enum
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*/
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typedef enum qspi_config_bus_width {
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@ -61,9 +64,8 @@ typedef enum qspi_return_status {
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QSPI_ERROR = -1, /**< Generic error >*/
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QSPI_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/
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QSPI_SUCCESS = 0, /**< Function executed sucessfully >*/
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} qspi_return_status_t;
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namespace mbed {
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} qspi_return_status_t;
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/** \addtogroup drivers */
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/** A QSPI Driver, used for communicating with QSPI slave devices
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@ -100,7 +102,7 @@ namespace mbed {
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class QSPI : private NonCopyable<QSPI> {
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public:
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/** Create a QSPI master connected to the specified pins
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*
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* io0-io3 is used to specify the Pins used for Quad SPI mode
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