mirror of https://github.com/ARMmbed/mbed-os.git
Interrupt and Overflow check for us_ticker
parent
0a781c4f04
commit
9dca3fe5df
|
@ -14,24 +14,24 @@
|
||||||
* limitations under the License.
|
* limitations under the License.
|
||||||
*/
|
*/
|
||||||
#include "us_ticker_api.h"
|
#include "us_ticker_api.h"
|
||||||
|
#include "mbed_critical.h"
|
||||||
|
|
||||||
#define TMR16A_100US 0x960 // fsys = fc = 24MHz, Ttmra = 1/24us, 100us*24us = 2400 = 0x960
|
#define TMR16A_100US 0x960 // fsys = fc = 24MHz, Ttmra = 1/24us, 100us*24us = 2400 = 0x960
|
||||||
#define TMR16A_SYSCK ((uint32_t)0x00000001)
|
#define TMR16A_SYSCK ((uint32_t)0x00000001)
|
||||||
#define TMR16A_RUN ((uint32_t)0x00000001)
|
#define TMR16A_RUN ((uint32_t)0x00000001)
|
||||||
#define TMR16A_STOP ((uint32_t)0x00000000)
|
#define TMR16A_STOP ((uint32_t)0x00000000)
|
||||||
|
#define OVERFLOW_32BIT (0xFFFFFFFF / 0x64)
|
||||||
|
|
||||||
static uint8_t us_ticker_inited = 0; // Is ticker initialized yet?
|
static uint8_t us_ticker_inited = 0; // Is ticker initialized yet?
|
||||||
static volatile uint32_t acc_us_ticker = 0;
|
static volatile uint32_t ticker_int_counter = 0; // Amount of overflows until user interrupt
|
||||||
|
static volatile uint32_t us_ticker = 0; // timer counter
|
||||||
// 16Bb high timer counter
|
|
||||||
static volatile uint32_t us_ticker_16h = 0;
|
|
||||||
|
|
||||||
void INT16A0_IRQHandler(void)
|
void INT16A0_IRQHandler(void)
|
||||||
{
|
{
|
||||||
us_ticker_16h++;
|
us_ticker++;
|
||||||
if (us_ticker_16h >= 0xFFFF) {
|
|
||||||
acc_us_ticker++;
|
if (us_ticker > OVERFLOW_32BIT) {
|
||||||
us_ticker_16h = 0;
|
us_ticker = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -67,18 +67,30 @@ uint32_t us_ticker_read(void)
|
||||||
if (!us_ticker_inited) {
|
if (!us_ticker_inited) {
|
||||||
us_ticker_init();
|
us_ticker_init();
|
||||||
}
|
}
|
||||||
ret_val = (((acc_us_ticker << 16) + us_ticker_16h) * 100);
|
|
||||||
|
uint32_t tickerbefore = 0;
|
||||||
|
do {
|
||||||
|
tickerbefore = us_ticker;
|
||||||
|
ret_val = (us_ticker * 100);
|
||||||
|
} while (tickerbefore != us_ticker);
|
||||||
|
|
||||||
return ret_val;
|
return ret_val;
|
||||||
}
|
}
|
||||||
|
|
||||||
void us_ticker_set_interrupt(timestamp_t timestamp)
|
void us_ticker_set_interrupt(timestamp_t timestamp)
|
||||||
{
|
{
|
||||||
int delta = 0;
|
int delta = 0;
|
||||||
|
|
||||||
// Stops and clear count operation
|
// Stops and clear count operation
|
||||||
TSB_T16A1->RUN = TMR16A_STOP;
|
TSB_T16A1->RUN = TMR16A_STOP;
|
||||||
TSB_T16A1->CR = TMR16A_SYSCK;
|
TSB_T16A1->CR = TMR16A_SYSCK;
|
||||||
// Set the compare register
|
// Set the compare register
|
||||||
delta = (int)(timestamp - us_ticker_read());
|
delta = (int)(timestamp - us_ticker_read());
|
||||||
|
if (delta < 0) {
|
||||||
|
// Ticker interrupt handle
|
||||||
|
us_ticker_irq_handler();
|
||||||
|
return;
|
||||||
|
}
|
||||||
TSB_T16A1->RG = delta;
|
TSB_T16A1->RG = delta;
|
||||||
// Set Interrupt
|
// Set Interrupt
|
||||||
NVIC_EnableIRQ(INT16A1_IRQn);
|
NVIC_EnableIRQ(INT16A1_IRQn);
|
||||||
|
@ -98,5 +110,5 @@ void us_ticker_disable_interrupt(void)
|
||||||
|
|
||||||
void us_ticker_clear_interrupt(void)
|
void us_ticker_clear_interrupt(void)
|
||||||
{
|
{
|
||||||
//no flags to clear
|
NVIC_ClearPendingIRQ(INT16A1_IRQn);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue