mirror of https://github.com/ARMmbed/mbed-os.git
commit
9d276ebad7
|
@ -176,7 +176,7 @@ uint8_t HAL_GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
|||
return bitstatus;
|
||||
}
|
||||
|
||||
uint8_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
uint16_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
||||
{
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
return ((uint16_t)GPIOx->DATA);
|
||||
|
@ -286,3 +286,13 @@ void HAL_PAD_AFConfig(PAD_Type Px, uint16_t GPIO_Pin, PAD_AF_TypeDef P_AF)
|
|||
}
|
||||
}
|
||||
|
||||
void GPIO_OutEnClr(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
GPIOx->OUTENCLR = GPIO_Pin;
|
||||
}
|
||||
|
||||
void GPIO_OutEnSet(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
GPIOx->OUTENSET = GPIO_Pin;
|
||||
}
|
||||
|
||||
|
|
|
@ -117,7 +117,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef* GPIOx);
|
|||
void HAL_GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
void HAL_GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
|
||||
uint8_t HAL_GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint8_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t HAL_GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
uint8_t HAL_GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t HAL_GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
|
||||
void HAL_GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
|
@ -126,6 +126,9 @@ void HAL_GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
|||
void HAL_GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
|
||||
void HAL_PAD_AFConfig(PAD_Type Px, uint16_t Pnum, PAD_AF_TypeDef P_AF);
|
||||
|
||||
void GPIO_OutEnClr(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_OutEnSet(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
@ -1,589 +1,290 @@
|
|||
/* mbed Microcontroller Library
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of ARM Limited nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
/*include -------------------------------------*/
|
||||
#include <stdio.h>
|
||||
#include "W7500x.h"
|
||||
|
||||
/** @defgroup I2C_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitDef;
|
||||
void i2c_loop_us(int us);
|
||||
|
||||
#define SCL GPIO_Pin_9
|
||||
#define SDA GPIO_Pin_10
|
||||
uint16_t buf[] ={0x00,0x01};
|
||||
|
||||
/**
|
||||
* @brief Initializes the I2Cx peripheral according to the specified
|
||||
* parameters in the I2C_InitStruct.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
|
||||
* contains the configuration information for the specified I2C peripheral.
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
uint32_t I2C_Init(I2C_TypeDef* I2Cx, I2C_ConfigStruct conf)
|
||||
uint32_t I2C_Init(I2C_ConfigStruct* conf)
|
||||
{
|
||||
uint32_t mode;
|
||||
uint8_t prescale;
|
||||
uint16_t timeout;
|
||||
uint16_t slave_address;
|
||||
uint32_t scl_port_num;
|
||||
uint32_t scl_pin_index;
|
||||
uint32_t sda_port_num;
|
||||
uint32_t sda_pin_index;
|
||||
|
||||
scl_port_num = I2C_PORT(conf->scl);
|
||||
scl_pin_index = I2C_PIN_INDEX(conf->scl);
|
||||
|
||||
mode = conf.mode;
|
||||
slave_address = conf.slave_address;
|
||||
if(mode == I2C_Master)
|
||||
{
|
||||
prescale = conf.master.prescale;
|
||||
timeout = conf.master.timeout;
|
||||
sda_port_num = I2C_PORT(conf->sda);
|
||||
sda_pin_index = I2C_PIN_INDEX(conf->sda);
|
||||
|
||||
I2C_CoreEn(I2Cx,ENABLE);
|
||||
I2C_MasterSlave(I2Cx,ENABLE);
|
||||
//SCL setting
|
||||
GPIO_InitDef.GPIO_Pin = scl_pin_index;
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT;
|
||||
|
||||
I2C_Prescale(I2Cx,prescale); // 0x61 //When PLL clk is 20MHz and Prescale value set 0x61, SCL is 100KHz
|
||||
I2C_TimeoutSet(I2Cx,timeout); // 0xFFFF
|
||||
HAL_GPIO_Init((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), &GPIO_InitDef);
|
||||
HAL_GPIO_SetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
|
||||
|
||||
I2C_CoreEn(I2Cx,DISABLE);
|
||||
}
|
||||
else if(conf.mode == I2C_Slave)
|
||||
{
|
||||
I2C_AcknowledgeConfig(I2Cx,ENABLE);
|
||||
I2C_SetSlavAddress(I2Cx,slave_address);
|
||||
}
|
||||
//SDA setting
|
||||
GPIO_InitDef.GPIO_Pin = sda_pin_index;
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN;
|
||||
|
||||
HAL_GPIO_Init((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), &GPIO_InitDef);
|
||||
HAL_GPIO_ResetBits((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
|
||||
|
||||
//Pin muxing
|
||||
HAL_PAD_AFConfig(scl_port_num, scl_pin_index, PAD_AF1);
|
||||
HAL_PAD_AFConfig(sda_port_num, sda_pin_index, PAD_AF1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void I2C_WriteBitSCL(I2C_ConfigStruct* conf, uint8_t data)
|
||||
{
|
||||
uint32_t scl_port_num = I2C_PORT(conf->scl);
|
||||
uint32_t scl_pin_index = I2C_PIN_INDEX(conf->scl);
|
||||
|
||||
if(data == 1)
|
||||
HAL_GPIO_SetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
|
||||
else
|
||||
return ERROR;
|
||||
HAL_GPIO_ResetBits((GPIO_TypeDef*)(GPIOA_BASE + (scl_port_num << 24)), scl_pin_index);
|
||||
|
||||
|
||||
I2C_AcknowledgeConfig(I2Cx,ENABLE);
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void I2C_DeInit(I2C_TypeDef* I2Cx)
|
||||
void I2C_WriteBitSDA(I2C_ConfigStruct* conf, uint8_t data)
|
||||
{
|
||||
I2C_InterRst(I2Cx,ENABLE);
|
||||
I2C_CoreEn(I2Cx, ENABLE);
|
||||
I2C_InterRst(I2Cx,DISABLE);
|
||||
I2C_CoreEn(I2Cx, DISABLE);
|
||||
uint32_t sda_port_num = I2C_PORT(conf->sda);
|
||||
uint32_t sda_pin_index = I2C_PIN_INDEX(conf->sda);
|
||||
|
||||
if(data == 1)
|
||||
GPIO_OutEnClr((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
|
||||
else
|
||||
GPIO_OutEnSet((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index);
|
||||
|
||||
}
|
||||
|
||||
|
||||
ErrorStatus I2C_Start(I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr)
|
||||
uint8_t I2C_ReadBitSDA(I2C_ConfigStruct* conf)
|
||||
{
|
||||
ErrorStatus ret;
|
||||
uint32_t sda_port_num = I2C_PORT(conf->sda);
|
||||
uint32_t sda_pin_index = I2C_PIN_INDEX(conf->sda);
|
||||
|
||||
I2C_GenerateSTART(I2Cx,ENABLE);
|
||||
I2C_SendSlaveAddress(I2Cx,slave_address,(I2C_CTR)ctr);
|
||||
I2C_GenerateSTART(I2Cx,DISABLE);
|
||||
if(HAL_GPIO_ReadInputDataBit((GPIO_TypeDef*)(GPIOA_BASE + (sda_port_num << 24)), sda_pin_index))
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
|
||||
ret=I2C_CheckEvent(I2Cx,I2C_ACKR);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void I2C_Start(I2C_ConfigStruct* conf)
|
||||
{
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
I2C_WriteBitSDA(conf, 1);
|
||||
|
||||
I2C_WriteBitSDA(conf, 0);
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
}
|
||||
|
||||
void I2C_Stop(I2C_ConfigStruct* conf)
|
||||
{
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
I2C_WriteBitSDA(conf, 0);
|
||||
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
I2C_WriteBitSDA(conf, 1);
|
||||
}
|
||||
|
||||
uint8_t I2C_WriteByte(I2C_ConfigStruct* conf, uint8_t data)
|
||||
{
|
||||
int i;
|
||||
uint8_t ret;
|
||||
|
||||
//Write byte
|
||||
for(i=0; i<8; i++)
|
||||
{
|
||||
if((data << i) & 0x80)
|
||||
I2C_WriteBitSDA(conf, 1);
|
||||
else
|
||||
I2C_WriteBitSDA(conf, 0);
|
||||
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
}
|
||||
//Make clk for receiving ack
|
||||
I2C_WriteBitSDA(conf, 1);
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
//Read Ack/Nack
|
||||
ret = I2C_ReadBitSDA(conf);
|
||||
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void I2C_Stop(I2C_TypeDef* I2Cx)
|
||||
void I2C_SendACK(I2C_ConfigStruct* conf)
|
||||
{
|
||||
I2C_GenerateSTOP(I2Cx,ENABLE);
|
||||
I2C_GenerateSTOP(I2Cx,DISABLE);
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF0); // PAD Config - LED used 2nd Function
|
||||
I2C_WriteBitSDA(conf, 0);
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
}
|
||||
|
||||
void I2C_Reset(I2C_TypeDef* I2Cx)
|
||||
void I2C_SendNACK(I2C_ConfigStruct* conf)
|
||||
{
|
||||
I2C_CoreEn(I2Cx,ENABLE);
|
||||
// Maybe, it needs a little delay
|
||||
I2C_CoreEn(I2Cx,DISABLE);
|
||||
I2C_WriteBitSDA(conf, 1);
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
}
|
||||
|
||||
void I2C_SendData(I2C_TypeDef* I2Cx,uint16_t Data)
|
||||
{
|
||||
I2Cx -> TXR = (uint16_t)Data;
|
||||
}
|
||||
|
||||
int8_t I2C_SendDataAck(I2C_TypeDef* I2Cx,uint16_t Data)
|
||||
{
|
||||
buf[0] = Data;
|
||||
if(buf[0] == buf[1])
|
||||
{
|
||||
I2C_GPIO();
|
||||
WriteByte(Data);
|
||||
i2c_loop_us(1);
|
||||
GPIO_I2C();
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx -> TXR = (uint16_t)Data;
|
||||
if(I2C_CheckEvent(I2Cx,I2C_ACKR) == ERROR)
|
||||
{
|
||||
return ERROR;
|
||||
}
|
||||
}
|
||||
buf[1] = buf[0];
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
int I2C_ReceiveData(I2C_TypeDef* I2Cx, int last)
|
||||
{
|
||||
if(last)
|
||||
{
|
||||
I2C_AcknowledgeConfig(I2Cx,DISABLE);
|
||||
if( I2C_CheckEvent(I2Cx,I2C_ACKT) == ERROR ) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
else if( I2C_CheckEvent(I2Cx,I2C_ACKT) == ERROR ) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return (uint8_t)I2Cx -> RXR;
|
||||
}
|
||||
|
||||
|
||||
int I2C_Burst_Read(I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop)
|
||||
{
|
||||
int recv_cnt;
|
||||
|
||||
if( I2C_Start(I2Cx,address,I2C_READ_SA7) == ERROR){
|
||||
return -1;
|
||||
}
|
||||
|
||||
for(recv_cnt=0;recv_cnt<length;recv_cnt++)
|
||||
{
|
||||
}
|
||||
|
||||
return recv_cnt;
|
||||
}
|
||||
|
||||
|
||||
int I2C_Burst_Write(I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop)
|
||||
{
|
||||
int cnt;
|
||||
|
||||
if( I2C_Start(I2Cx,address,I2C_WRITE_SA7) == ERROR)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
for(cnt=0;cnt<length;cnt++)
|
||||
{
|
||||
if( I2C_SendDataAck(I2Cx,data[cnt]) == ERROR )
|
||||
{
|
||||
I2C_Stop(I2Cx);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
// If not repeated start, send stop
|
||||
if(stop)
|
||||
{
|
||||
I2C_Stop(I2Cx);
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Generates I2Cx communication START condition.
|
||||
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
|
||||
* @param NewState: NewState of the I2C START condition generation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None.
|
||||
*/
|
||||
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState != DISABLE)
|
||||
{
|
||||
I2Cx->CMDR = I2C_CMDR_STA;
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx->CMDR = I2C_CMDR_STA;
|
||||
}
|
||||
}
|
||||
/**
|
||||
* @brief Generates I2Cx communication STOP condition.
|
||||
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
|
||||
* @param NewState: NewState of the I2C STOP condition generation.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None.
|
||||
*/
|
||||
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState != DISABLE)
|
||||
{
|
||||
|
||||
I2Cx->CMDR = I2C_CMDR_STO;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
I2Cx->CMDR = I2C_CMDR_STO;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified I2C acknowledge feature.
|
||||
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
|
||||
* @param NewState: NewState of the I2C Acknowledgement.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None.
|
||||
*/
|
||||
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState != DISABLE) I2Cx -> CMDR = I2C_CMDR_ACK;
|
||||
else I2Cx -> CMDR = I2C_CMDR_ACK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Generates I2Cx communication REGenerateSTART condition
|
||||
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
|
||||
* @param NewState: NewState of the I2C Acknowledgement.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None.
|
||||
*/
|
||||
void I2C_RESTART(I2C_TypeDef * I2Cx, FunctionalState NewState)
|
||||
{
|
||||
if(NewState != DISABLE) I2Cx->CMDR = I2C_CMDR_RESTA;
|
||||
else I2Cx->CMDR = I2C_CMDR_RESTA;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the specified I2C Core_en feature
|
||||
* @param I2Cx: where x can be 0 or 1 to select the I2C peripheral.
|
||||
* @param NewState: NewState of the I2C Acknowledgement.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval None.
|
||||
*/
|
||||
void I2C_CoreEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control*/
|
||||
if(NewState != DISABLE) I2Cx -> CTR = I2C_CTR_COREEN;
|
||||
else I2Cx -> CTR = I2C_CTR_COREEN;
|
||||
}
|
||||
|
||||
|
||||
void I2C_InterEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control Interrupt Enable*/
|
||||
if(NewState != DISABLE) I2Cx -> CTR = I2C_CTR_INTEREN;
|
||||
else I2Cx -> CTR = I2C_CTR_INTEREN;
|
||||
}
|
||||
|
||||
|
||||
void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control MasterSlave select*/
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_MODE) != I2C_CTR_MODE )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_MODE;
|
||||
}
|
||||
}
|
||||
else // DISABLE
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_MODE) == I2C_CTR_MODE )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_MODE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void I2C_ControlRW(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control Read(receive)*/
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_CTRRWN) != I2C_CTR_CTRRWN )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_CTRRWN;
|
||||
}
|
||||
}
|
||||
else // DISABLE
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_CTRRWN) == I2C_CTR_CTRRWN )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_CTRRWN;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void I2C_ControlEn(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control*/
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_CTEN) != I2C_CTR_CTEN )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_CTEN;
|
||||
}
|
||||
}
|
||||
else // DISABLE
|
||||
{
|
||||
if( (I2Cx->CTR & I2C_CTR_CTEN) == I2C_CTR_CTEN )
|
||||
{
|
||||
I2Cx->CTR = I2C_CTR_CTEN;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void I2C_InterRst(I2C_TypeDef* I2Cx,FunctionalState NewState)
|
||||
{
|
||||
/*Control*/
|
||||
if(NewState == ENABLE)
|
||||
{
|
||||
if( (I2Cx->ISCR & I2C_ISCR_RST) != I2C_ISCR_RST )
|
||||
{
|
||||
I2Cx->ISCR = I2C_ISCR_RST;
|
||||
}
|
||||
}
|
||||
else // DISABLE
|
||||
{
|
||||
if( (I2Cx->ISCR & I2C_ISCR_RST) == I2C_ISCR_RST )
|
||||
{
|
||||
I2Cx->ISCR = I2C_ISCR_RST;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void I2C_Prescale(I2C_TypeDef* I2Cx,uint16_t Data)
|
||||
{
|
||||
I2Cx -> PRER = (uint16_t)Data;
|
||||
}
|
||||
|
||||
void I2C_TimeoutSet(I2C_TypeDef* I2Cx,uint16_t Data)
|
||||
{
|
||||
I2Cx -> TSR = (uint16_t)Data;
|
||||
}
|
||||
void I2C_SetSlavAddress(I2C_TypeDef* I2Cx,uint16_t Data)
|
||||
{
|
||||
I2Cx -> SADDR = (uint16_t)Data;
|
||||
}
|
||||
|
||||
|
||||
uint8_t I2C_StatusRead(I2C_TypeDef* I2Cx)
|
||||
{
|
||||
return (uint8_t)I2Cx -> SR;
|
||||
}
|
||||
|
||||
|
||||
ErrorStatus WaitEvent(I2C_TypeDef* I2Cx, uint32_t flag, FlagStatus status)
|
||||
{
|
||||
int Timeout=0,loopcnt=0;
|
||||
|
||||
Timeout = I2Cx->TSR;
|
||||
if(status == SET)
|
||||
{
|
||||
for(loopcnt=Timeout; loopcnt>0; loopcnt--)
|
||||
{
|
||||
if( ((I2Cx->SR) & flag) == flag )
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for(loopcnt=Timeout; loopcnt>0; loopcnt--)
|
||||
{
|
||||
if( ((I2Cx->SR) & flag) != flag )
|
||||
return SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified I2C flag is set or not.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_EVENT: specifies the event to be checked.
|
||||
*/
|
||||
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr)
|
||||
{
|
||||
switch(sr)
|
||||
{
|
||||
case(I2C_ACKR):
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKR, SET) == ERROR) return ERROR;
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKR, RESET) == ERROR) return ERROR;
|
||||
break;
|
||||
|
||||
case(I2C_ACKT ):
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKT, SET) == ERROR) return ERROR;
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKT, RESET) == ERROR) return ERROR;
|
||||
break;
|
||||
|
||||
case(I2C_OACKR):
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKR, SET) == ERROR) return ERROR;
|
||||
break;
|
||||
|
||||
case(I2C_SACKR ):
|
||||
if( WaitEvent(I2Cx, I2C_SR_ACKR, RESET) == ERROR) return ERROR;
|
||||
break;
|
||||
|
||||
case(I2C_BT ):
|
||||
if( WaitEvent(I2Cx, I2C_SR_BT, RESET) == ERROR) return ERROR;
|
||||
break;
|
||||
|
||||
default:
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void I2C_SendSlaveAddress(I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr)
|
||||
{
|
||||
switch(Ctr)
|
||||
{
|
||||
case(I2C_READ_SA7):
|
||||
I2C_SendData(I2Cx,SlaveAddress|I2C_READ);
|
||||
break;
|
||||
|
||||
|
||||
case(I2C_WRITE_SA7):
|
||||
I2C_SendData(I2Cx,SlaveAddress|I2C_WRITE);
|
||||
break;
|
||||
|
||||
case(I2C_CTRWRITE_SA7):
|
||||
case(I2C_CTRREAD_SA7):
|
||||
I2C_SendData(I2Cx,SlaveAddress);
|
||||
break;
|
||||
|
||||
default:
|
||||
return;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr)
|
||||
{
|
||||
|
||||
I2C_RESTART(I2Cx,ENABLE);
|
||||
I2C_SendSlaveAddress(I2Cx,SlaveAddress,Ctr);
|
||||
if((I2C_CheckEvent(I2Cx,I2C_OACKR)) == ERROR )
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
I2C_RESTART(I2Cx,DISABLE);
|
||||
if((I2C_CheckEvent(I2Cx,I2C_SACKR)) == ERROR)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reads the specified I2C register and returns its value.
|
||||
* @param I2C_Register: specifies the register to read.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_Register_CR1: CR1 register.
|
||||
* @arg I2C_Register_CR2: CR2 register.
|
||||
* @arg I2C_Register_OAR1: OAR1 register.
|
||||
* @arg I2C_Register_OAR2: OAR2 register.
|
||||
* @arg I2C_Register_DR: DR register.
|
||||
* @arg I2C_Register_SR1: SR1 register.
|
||||
* @arg I2C_Register_SR2: SR2 register.
|
||||
* @arg I2C_Register_CCR: CCR register.
|
||||
* @arg I2C_Register_TRISE: TRISE register.
|
||||
* @retval The value of the read register.
|
||||
*/
|
||||
uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
|
||||
{
|
||||
__IO uint32_t tmp = 0;
|
||||
|
||||
|
||||
tmp = (uint32_t) I2Cx;
|
||||
tmp += I2C_Register;
|
||||
|
||||
/* Return the selected register value */
|
||||
return (*(__IO uint16_t *) tmp);
|
||||
}
|
||||
|
||||
|
||||
void I2C_GPIO(void )
|
||||
{
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF1); // PAD Config - LED used 2nd Function
|
||||
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_10; // Set to Pin_9 (SCL0))
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_10, PAD_AF1); // PAD Config - LED used 2nd Function
|
||||
|
||||
}
|
||||
void GPIO_I2C(void )
|
||||
{
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_9; // Set to Pin_9 (SCL0))
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_OUT; // Set to Mode Output
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_9, PAD_AF0); // PAD Config - LED used 2nd Function
|
||||
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_10; // Set to Pin_10 (SDA0))
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN; // Set to Mode Output
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
HAL_PAD_AFConfig(PAD_PA,GPIO_Pin_10, PAD_AF0); // PAD Config - LED used 2nd Functio
|
||||
|
||||
}
|
||||
|
||||
|
||||
void WriteByte(uint8_t val)
|
||||
uint8_t I2C_ReadByte(I2C_ConfigStruct* conf)
|
||||
{
|
||||
int i;
|
||||
GPIO_TypeDef* GPIOx;
|
||||
GPIOx = GPIOA;
|
||||
uint8_t ret = 0;
|
||||
|
||||
for(i=0;i<8;i++)
|
||||
I2C_WriteBitSDA(conf, 1); //out enable clear(GPIO is input)
|
||||
|
||||
//Read byte
|
||||
for(i=0; i<8; i++)
|
||||
{
|
||||
if((val << i) & 0x80){
|
||||
digitalWrite(GPIOx,SDA, Bit_SET);
|
||||
}else{
|
||||
digitalWrite(GPIOx,SDA, Bit_RESET);
|
||||
I2C_WriteBitSCL(conf, 1);
|
||||
ret = (ret << 1) | (I2C_ReadBitSDA(conf));
|
||||
I2C_WriteBitSCL(conf, 0);
|
||||
}
|
||||
i2c_loop_us(1);
|
||||
digitalWrite(GPIOx,SCL, Bit_SET);
|
||||
i2c_loop_us(2);
|
||||
digitalWrite(GPIOx,SCL, Bit_RESET);
|
||||
}
|
||||
digitalWrite(GPIOx,SDA, Bit_SET);
|
||||
i2c_loop_us(1);
|
||||
digitalWrite(GPIOx,SCL, Bit_SET);
|
||||
i2c_loop_us(2);
|
||||
digitalWrite(GPIOx,SCL, Bit_RESET);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
void digitalWrite(GPIO_TypeDef* GPIOx,uint16_t pin, uint16_t val)
|
||||
int I2C_Write(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
|
||||
{
|
||||
int i;
|
||||
|
||||
if(val == Bit_SET)
|
||||
I2C_Start(conf);
|
||||
|
||||
//Write addr
|
||||
if(I2C_WriteByte(conf, addr) != 0)
|
||||
{
|
||||
GPIOx -> OUTENCLR = pin;
|
||||
printf("Received NACK at address phase!!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
//Write data
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
if(I2C_WriteByte(conf, data[i]))
|
||||
return -1;
|
||||
}
|
||||
|
||||
I2C_Stop(conf);
|
||||
|
||||
return 0;//success
|
||||
}
|
||||
|
||||
int I2C_WriteRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
|
||||
{
|
||||
int i;
|
||||
|
||||
I2C_Start(conf);
|
||||
|
||||
//Write addr
|
||||
if(I2C_WriteByte(conf, addr) != 0)
|
||||
{
|
||||
printf("Received NACK at address phase!!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
//Write data
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
if(I2C_WriteByte(conf, data[i]))
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;//success
|
||||
}
|
||||
|
||||
int I2C_Read(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
|
||||
{
|
||||
int i;
|
||||
|
||||
I2C_Start(conf);
|
||||
|
||||
//Write addr | read command
|
||||
if(I2C_WriteByte(conf, (addr | 1)) != 0)
|
||||
{
|
||||
printf("Received NACK at address phase!!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
//Read data
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
data[i] = I2C_ReadByte(conf);
|
||||
|
||||
if( i == (len - 1) )
|
||||
I2C_SendNACK(conf);
|
||||
else
|
||||
{
|
||||
GPIOx -> OUTENSET |= pin;
|
||||
|
||||
I2C_SendACK(conf);
|
||||
}
|
||||
|
||||
I2C_Stop(conf);
|
||||
|
||||
return 0;//success
|
||||
}
|
||||
|
||||
|
||||
void i2c_loop_us(int us)
|
||||
int I2C_ReadRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len)
|
||||
{
|
||||
volatile uint32_t delay = us; // approximate loops per ms at 24 MHz, Debug config
|
||||
for(; delay != 0; delay--)
|
||||
__NOP();
|
||||
}
|
||||
void i2c_loop_ms(int count) {
|
||||
i2c_loop_us(count*1000);
|
||||
int i;
|
||||
|
||||
I2C_Start(conf);
|
||||
|
||||
//Write addr | read command
|
||||
if(I2C_WriteByte(conf, (addr | 1)) != 0)
|
||||
{
|
||||
printf("Received NACK at address phase!!\r\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
//Read data
|
||||
for(i=0; i<len; i++)
|
||||
{
|
||||
data[i] = I2C_ReadByte(conf);
|
||||
|
||||
if( i == (len - 1) )
|
||||
I2C_SendNACK(conf);
|
||||
else
|
||||
I2C_SendACK(conf);
|
||||
}
|
||||
|
||||
return 0;//success
|
||||
}
|
||||
|
||||
|
|
|
@ -27,210 +27,55 @@
|
|||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
/*include -------------------------------------*/
|
||||
#include "W7500x.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I2C_WRITE_SA7=0,
|
||||
I2C_READ_SA7,
|
||||
I2C_CTRWRITE_SA7,
|
||||
I2C_CTRREAD_SA7,
|
||||
} I2C_CTR;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I2C_ACKR=0,
|
||||
I2C_ACKT,
|
||||
I2C_OACKR,
|
||||
I2C_SACKR,
|
||||
I2C_BT,
|
||||
} I2C_SR;
|
||||
#ifndef __W7500X_I2C_H
|
||||
#define __W7500X_I2C_H
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
INT_ACKR=-1,
|
||||
INT_ACKT=-2,
|
||||
INT_NACKR=-3,
|
||||
INT_NACKT=-4,
|
||||
INT_BT=-5,
|
||||
} I2C_ERROR;
|
||||
|
||||
|
||||
/**
|
||||
*@
|
||||
*/
|
||||
/** @defgroup I2C_registers
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define I2C_Register_PRER ((uint8_t)0x00)
|
||||
#define I2C_Register_CTR ((uint8_t)0x04)
|
||||
#define I2C_Register_CMDR ((uint8_t)0x08)
|
||||
#define I2C_Register_SR ((uint8_t)0x0C)
|
||||
#define I2C_Register_TSR ((uint8_t)0x10)
|
||||
#define I2C_Register_SADDR ((uint8_t)0x14)
|
||||
#define I2C_Register_TXR ((uint8_t)0x18)
|
||||
#define I2C_Register_RXR ((uint8_t)0x1C)
|
||||
#define I2C_Register_ISR ((uint8_t)0x20)
|
||||
#define I2C_Register_ISCR ((uint8_t)0x24)
|
||||
#define I2C_Register_ISMR ((uint8_t)0x28)
|
||||
#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_PRER) || \
|
||||
((REGISTER) == I2C_Register_CTR) || \
|
||||
((REGISTER) == I2C_Register_CMDR) || \
|
||||
((REGISTER) == I2C_Register_SR) || \
|
||||
((REGISTER) == I2C_Register_TSR) || \
|
||||
((REGISTER) == I2C_Register_SADDR) || \
|
||||
((REGISTER) == I2C_Register_TXR) || \
|
||||
((REGISTER) == I2C_Register_RXR) || \
|
||||
((REGISTER) == I2C_Register_ISR)|| \
|
||||
((REGISTER) == I2C_Register_ISCR)| \
|
||||
((REGISTER) == I2C_Register_ISMR))
|
||||
|
||||
/** @defgroup I2C_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
/* I2C COREEN mask */
|
||||
#define I2C_CTR_COREEN_DIS ((uint16_t)0xFF7F)
|
||||
|
||||
/* I2C INTEREN mask */
|
||||
#define I2C_CTR_INTEREN_DIS ((uint16_t)0xFFBF)
|
||||
|
||||
/* I2C MODE(M/SN) mask */
|
||||
#define I2C_CTR_MODE_SLAVE ((uint16_t)0xFFDF)
|
||||
|
||||
/* I2C ADDR10(10/7N) mask */
|
||||
#define I2C_CTR_ADDR10_7BIT ((uint16_t)0xFFEF)
|
||||
|
||||
/* I2C CTRRWN(R/WN) mask */
|
||||
#define I2C_CTR_CTRRWN_DIS ((uint16_t)0xFFF7)
|
||||
|
||||
/* I2C CTREN mask */
|
||||
#define I2C_CTR_CTEN_DIS ((uint16_t)0xFFFB)
|
||||
|
||||
|
||||
/* I2C START mask */
|
||||
#define I2C_CMDR_START_DIS ((uint16_t)0xFF7F)
|
||||
|
||||
/* I2C STOP mask */
|
||||
#define I2C_CMDR_STOP_DIS ((uint16_t)0xFFBF)
|
||||
|
||||
/* I2C ACK mask */
|
||||
#define I2C_CMDR_ACK_NAK ((uint16_t)0xFFDF)
|
||||
|
||||
/* I2C RESTART mask */
|
||||
#define I2C_CMDR_RESTA_DIS ((uint16_t)0xFFEF)
|
||||
|
||||
/* I2C INTERRUPT RESET mask */
|
||||
#define I2C_ISCR_RST_DIS ((uint16_t)0xFFFE)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#define I2C_WRITE 0
|
||||
#define I2C_READ 1
|
||||
#define I2C_RWSEL(NewState) (((NewState) == I2C_WRITE)|| \
|
||||
((NewState) == I2C_READ))
|
||||
|
||||
|
||||
#define I2C_Ack_Enable (0x01ul << 5)
|
||||
#define I2C_Ack_Disable (0x00ul << 5)
|
||||
#define IS_I2C_ACK_NewState(NewState) (((NewState) == I2C_Ack_Enable) || \
|
||||
((NewState) == I2C_Ack_Disable))
|
||||
|
||||
#define I2C_MASTER_MODE (0x01ul << 5 ) // 0x20
|
||||
#define I2C_SLAVE_MODE (0x00ul << 5 ) // 0x20
|
||||
#define IS_I2C_MODE(MODE) ((MODE) == I2C_MASTER_MODE)|| \
|
||||
(MODE) == I2C_SLAVE_MODE))
|
||||
|
||||
#define I2C_CTR_MODE (0x01ul << 5 ) // 0x20
|
||||
|
||||
#define SLAVE_ADDR10 0x208
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I2C_Master = I2C_MASTER_MODE,
|
||||
I2C_Slave = I2C_SLAVE_MODE
|
||||
}I2C_MODE;
|
||||
|
||||
typedef enum {
|
||||
I2C_PA_5 = 0x05,
|
||||
I2C_PA_6 = 0x06,
|
||||
I2C_PA_9 = 0x09,
|
||||
I2C_PA_10 = 0x0A,
|
||||
I2C_PC_4 = 0x24,
|
||||
I2C_PC_5 = 0x25,
|
||||
I2C_PC_8 = 0x28,
|
||||
// Not connected
|
||||
I2C_NC = (int)0xFFFFFFFF
|
||||
} I2C_PinName;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t prescale;
|
||||
uint16_t timeout;
|
||||
I2C_CTR control;
|
||||
}I2C_MasterConfStruct;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t mode;
|
||||
uint16_t slave_address; // only on slave mode
|
||||
I2C_MasterConfStruct master;
|
||||
I2C_PinName scl;
|
||||
I2C_PinName sda;
|
||||
}I2C_ConfigStruct;
|
||||
|
||||
|
||||
/** @defgroup I2C_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
#define I2C_PORT(X) (((uint32_t)(X) >> 4) & 0xF) // port number (0=A, 1=B, 2=C, 3=D)
|
||||
#define I2C_PIN_INDEX(X) (1 << ((uint32_t)(X) & 0xF)) // pin index : flag bit
|
||||
|
||||
uint32_t I2C_Init (I2C_TypeDef* I2Cx, I2C_ConfigStruct conf);
|
||||
void setFrequency (I2C_TypeDef* I2Cx, uint8_t prescale);
|
||||
void I2C_DeInit (I2C_TypeDef* I2Cx);
|
||||
uint32_t I2C_Init(I2C_ConfigStruct* conf);
|
||||
|
||||
ErrorStatus I2C_Start (I2C_TypeDef* I2Cx, uint16_t slave_address, I2C_CTR ctr);
|
||||
void I2C_Stop (I2C_TypeDef* I2Cx);
|
||||
void I2C_Reset (I2C_TypeDef* I2Cx);
|
||||
void I2C_WriteBitSDA(I2C_ConfigStruct* conf, uint8_t data);
|
||||
void I2C_WriteBitSCL(I2C_ConfigStruct* conf, uint8_t data);
|
||||
uint8_t I2C_ReadBitSDA(I2C_ConfigStruct* conf);
|
||||
|
||||
void I2C_SendData (I2C_TypeDef* I2Cx,uint16_t Data);
|
||||
int8_t I2C_SendDataAck (I2C_TypeDef* I2Cx,uint16_t Data);
|
||||
int I2C_ReceiveData (I2C_TypeDef* I2Cx, int last);
|
||||
void I2C_SendACK(I2C_ConfigStruct* conf);
|
||||
void I2C_SendNACK(I2C_ConfigStruct* conf);
|
||||
|
||||
int I2C_Burst_Read (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
|
||||
int I2C_Burst_Write (I2C_TypeDef* I2Cx, uint16_t address, uint8_t *data, int length, int stop);
|
||||
uint8_t I2C_WriteByte(I2C_ConfigStruct* conf, uint8_t data);
|
||||
uint8_t I2C_ReadByte(I2C_ConfigStruct* conf);
|
||||
|
||||
void I2C_GenerateSTART (I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_GenerateSTOP (I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_Start(I2C_ConfigStruct* conf);
|
||||
void I2C_Stop(I2C_ConfigStruct* conf);
|
||||
|
||||
void I2C_AcknowledgeConfig (I2C_TypeDef* I2Cx, FunctionalState NewState);
|
||||
void I2C_RESTART (I2C_TypeDef * I2Cx, FunctionalState NewState);
|
||||
int I2C_Write(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
|
||||
int I2C_WriteRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
|
||||
int I2C_Read(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
|
||||
int I2C_ReadRepeated(I2C_ConfigStruct* conf, uint8_t addr, uint8_t* data, uint32_t len);
|
||||
|
||||
void I2C_CoreEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
void I2C_InterEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
void I2C_MasterSlave(I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
void I2C_ControlRW (I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
void I2C_ControlEn (I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
|
||||
void I2C_InterRst (I2C_TypeDef* I2Cx,FunctionalState NewState);
|
||||
void I2C_Prescale (I2C_TypeDef* I2Cx,uint16_t Data);
|
||||
void I2C_TimeoutSet (I2C_TypeDef* I2Cx,uint16_t Data);
|
||||
void I2C_SetSlavAddress (I2C_TypeDef* I2Cx,uint16_t Data);
|
||||
uint8_t I2C_StatusRead (I2C_TypeDef* I2Cx);
|
||||
|
||||
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,I2C_SR sr);
|
||||
|
||||
void I2C_MasterInit (I2C_TypeDef * I2Cx,uint8_t Prescale,uint16_t Timeout,I2C_CTR Ctr);
|
||||
void I2C_SlaveInit (I2C_TypeDef * I2Cx,FunctionalState NewState, uint16_t data);
|
||||
void I2C_SendSlaveAddress (I2C_TypeDef* I2Cx, uint8_t SlaveAddress,I2C_CTR Ctr);
|
||||
|
||||
int8_t I2C_Restart_Structure(I2C_TypeDef * I2Cx,uint32_t SlaveAddress,I2C_CTR Ctr);
|
||||
uint16_t I2C_ReadRegister (I2C_TypeDef* I2Cx, uint8_t I2C_Register);
|
||||
|
||||
void I2C_GPIO(void);
|
||||
void GPIO_I2C(void );
|
||||
|
||||
void WriteByte(uint8_t val);
|
||||
|
||||
void digitalWrite(GPIO_TypeDef* GPIOx,uint16_t pin, uint16_t val);
|
||||
uint16_t digitalRead(GPIO_TypeDef* GPIOx,uint16_t pin);
|
||||
void i2c_loop_us(int us);
|
||||
void i2c_loop_ms(int count) ;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif //__W7500X_I2C_H
|
||||
|
||||
|
|
|
@ -63,11 +63,17 @@ const PinMap PinMap_UART_RX[] = {
|
|||
//*** I2C ***
|
||||
const PinMap PinMap_I2C_SDA[] = {
|
||||
{PA_10, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
|
||||
{PC_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
|
||||
{PC_5, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
|
||||
{PA_6, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_9, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
|
||||
{PC_8, I2C_0, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
|
||||
{PC_4, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF0)},
|
||||
{PC_5, I2C_1, WIZ_PIN_DATA(WIZ_MODE_AF, WIZ_GPIO_NOPULL, Px_AFSR_AF2)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
|
|
|
@ -81,7 +81,9 @@ struct spi_s {
|
|||
};
|
||||
|
||||
struct i2c_s {
|
||||
I2CName i2c;
|
||||
I2CName I2Cx;
|
||||
PinName sda;
|
||||
PinName scl;
|
||||
uint16_t ADDRESS;
|
||||
uint16_t is_setAddress;
|
||||
};
|
||||
|
|
|
@ -47,303 +47,135 @@
|
|||
#define FLAG_TIMEOUT ((int)0x1000)
|
||||
#define LONG_TIMEOUT ((int)0xFFFF)
|
||||
|
||||
I2C_TypeDef * I2cHandle;
|
||||
|
||||
int i2c0_inited = 0;
|
||||
int i2c1_inited = 0;
|
||||
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
|
||||
{
|
||||
// Determine the I2C to use
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
//Determine the I2C to use
|
||||
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||
obj->I2Cx = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
|
||||
MBED_ASSERT(obj->I2Cx != (I2CName)NC);
|
||||
|
||||
obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
|
||||
MBED_ASSERT(obj->i2c != (I2CName)NC);
|
||||
|
||||
// Enable I2C1 clock and pinout if not done
|
||||
if ((obj->i2c == I2C_0) && !i2c0_inited) {
|
||||
i2c0_inited = 1;
|
||||
// Configure I2C pins
|
||||
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||
pin_mode(sda, PullUp);
|
||||
pin_mode(scl, PullUp);
|
||||
}
|
||||
|
||||
// Enable I2C2 clock and pinout if not done
|
||||
if ((obj->i2c == I2C_1) && !i2c1_inited) {
|
||||
i2c1_inited = 1;
|
||||
// Configure I2C pins
|
||||
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||
pin_mode(sda, PullUp);
|
||||
pin_mode(scl, PullUp);
|
||||
}
|
||||
|
||||
// Reset to clear pending flags if any
|
||||
i2c_reset(obj);
|
||||
|
||||
// I2C configuration
|
||||
i2c_frequency(obj, 100000); // 100 kHz per default
|
||||
obj->sda = sda;
|
||||
obj->scl = scl;
|
||||
obj->ADDRESS = 0x0;
|
||||
obj->is_setAddress = 0;
|
||||
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
I2C_Init(&conf);
|
||||
}
|
||||
|
||||
void i2c_frequency(i2c_t *obj, int hz)
|
||||
{
|
||||
//MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
|
||||
MBED_ASSERT((hz == 100000));
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
|
||||
// wait before init
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
conf.mode = I2C_Master;
|
||||
conf.master.timeout = LONG_TIMEOUT;
|
||||
conf.master.prescale = 0x61; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
|
||||
|
||||
// Common settings: I2C clock = 48 MHz, Analog filter = ON, Digital filter coefficient = 0
|
||||
// switch (hz) {
|
||||
// case 100000:
|
||||
// conf.master.prescale = 0x61; // Standard mode with Rise Time = 400ns and Fall Time = 100ns
|
||||
// break;
|
||||
// case 400000:
|
||||
// break;
|
||||
// case 1000000:
|
||||
// break;
|
||||
// default:
|
||||
// break;
|
||||
// }
|
||||
|
||||
// I2C configuration
|
||||
I2C_Init(I2cHandle, conf);
|
||||
}
|
||||
|
||||
inline int i2c_start(i2c_t *obj)
|
||||
{
|
||||
obj->is_setAddress = 0;
|
||||
I2C_ConfigStruct conf;
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
I2C_Start(&conf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
inline int i2c_stop(i2c_t *obj)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
I2C_ConfigStruct conf;
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
// Generate the STOP condition
|
||||
I2C_Stop(I2cHandle);
|
||||
I2C_Reset(I2cHandle);
|
||||
|
||||
obj->is_setAddress = 0;
|
||||
I2C_Stop(&conf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
int count;
|
||||
int value;
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
if(!obj->is_setAddress)
|
||||
{
|
||||
if( I2C_Start(I2cHandle, address, I2C_READ_SA7) == ERROR )
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
|
||||
if(stop)
|
||||
{
|
||||
if(I2C_Read(&conf, address, data, length) != 0)
|
||||
return -1;
|
||||
}
|
||||
obj->is_setAddress = 1;
|
||||
obj->ADDRESS = address;
|
||||
}
|
||||
else
|
||||
{
|
||||
I2C_Restart_Structure(I2cHandle, address, I2C_READ_SA7);
|
||||
obj->ADDRESS = address;
|
||||
if(I2C_ReadRepeated(&conf, address, data, length) != 0)
|
||||
return -1;
|
||||
}
|
||||
|
||||
// Read all bytes
|
||||
for (count = 0; count < (length-1); count++) {
|
||||
if( (value = i2c_byte_read(obj, 0)) == -1) {
|
||||
return value;
|
||||
}
|
||||
data[count] = (char)value;
|
||||
}
|
||||
|
||||
if(stop){
|
||||
if( (value = i2c_byte_read(obj, 1)) == -1) {
|
||||
return value;
|
||||
}
|
||||
data[count] = (char)value;
|
||||
|
||||
i2c_stop(obj);
|
||||
obj->is_setAddress =1;
|
||||
count++;
|
||||
}
|
||||
else{
|
||||
if( (value = i2c_byte_read(obj, 0)) == -1) {
|
||||
|
||||
return value;
|
||||
}
|
||||
data[count] = (char)value;
|
||||
count++;
|
||||
}
|
||||
|
||||
return count;
|
||||
return length;
|
||||
|
||||
}
|
||||
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
int count =0;
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
if(!obj->is_setAddress)
|
||||
{
|
||||
if( I2C_Start(I2cHandle, address, I2C_WRITE_SA7) == ERROR )
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
|
||||
if(stop)
|
||||
{
|
||||
if(I2C_Write(&conf, address, data, length) != 0)
|
||||
return -1;
|
||||
}
|
||||
obj->is_setAddress = 1;
|
||||
obj->ADDRESS = address;
|
||||
}
|
||||
else
|
||||
{
|
||||
I2C_Restart_Structure(I2cHandle, address, I2C_WRITE_SA7);
|
||||
obj->ADDRESS = address;
|
||||
|
||||
if(I2C_WriteRepeated(&conf, address, data, length) != 0)
|
||||
return -1;
|
||||
}
|
||||
|
||||
for (count = 0; count < length; count++) {
|
||||
i2c_byte_write(obj, data[count]);
|
||||
wait_us(1);
|
||||
}
|
||||
|
||||
|
||||
if(length == 0x00)
|
||||
{
|
||||
I2C_GPIO();
|
||||
i2c_byte_write(obj, 0xff);
|
||||
GPIO_I2C();
|
||||
}
|
||||
// If not repeated start, send stop
|
||||
if (stop) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
else
|
||||
{
|
||||
i2c_reset(obj);
|
||||
|
||||
}
|
||||
return count;
|
||||
return length;
|
||||
}
|
||||
|
||||
int i2c_byte_read(i2c_t *obj, int last)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
uint8_t ret;
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
return I2C_ReceiveData(I2cHandle, last);
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
ret = I2C_ReadByte(&conf);
|
||||
|
||||
if(last)
|
||||
I2C_SendNACK(&conf);
|
||||
else
|
||||
I2C_SendACK(&conf);
|
||||
|
||||
return (int)ret;
|
||||
}
|
||||
|
||||
int i2c_byte_write(i2c_t *obj, int data)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
return I2C_SendDataAck(I2cHandle,(uint8_t)data);
|
||||
I2C_ConfigStruct conf;
|
||||
|
||||
conf.sda = (I2C_PinName)obj->sda;
|
||||
conf.scl = (I2C_PinName)obj->scl;
|
||||
|
||||
if(I2C_WriteByte(&conf, (uint8_t)data)) // NACK
|
||||
return 0;
|
||||
else //ack
|
||||
return 1;
|
||||
}
|
||||
|
||||
void i2c_reset(i2c_t *obj)
|
||||
{
|
||||
I2cHandle = (I2C_TypeDef *)(obj->i2c);
|
||||
|
||||
I2C_Reset(I2cHandle);
|
||||
}
|
||||
|
||||
//#if DEVICE_I2CSLAVE
|
||||
//
|
||||
//void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
|
||||
//{
|
||||
// I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||
// uint16_t tmpreg = 0;
|
||||
//
|
||||
// // disable
|
||||
// i2c->OAR1 &= (uint32_t)(~I2C_OAR1_OA1EN);
|
||||
// // Get the old register value
|
||||
// tmpreg = i2c->OAR1;
|
||||
// // Reset address bits
|
||||
// tmpreg &= 0xFC00;
|
||||
// // Set new address
|
||||
// tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
|
||||
// // Store the new register value
|
||||
// i2c->OAR1 = tmpreg;
|
||||
// // enable
|
||||
// i2c->OAR1 |= I2C_OAR1_OA1EN;
|
||||
//}
|
||||
//
|
||||
//void i2c_slave_mode(i2c_t *obj, int enable_slave)
|
||||
//{
|
||||
// I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||
// uint16_t tmpreg;
|
||||
//
|
||||
// // Get the old register value
|
||||
// tmpreg = i2c->OAR1;
|
||||
//
|
||||
// // Enable / disable slave
|
||||
// if (enable_slave == 1) {
|
||||
// tmpreg |= I2C_OAR1_OA1EN;
|
||||
// } else {
|
||||
// tmpreg &= (uint32_t)(~I2C_OAR1_OA1EN);
|
||||
// }
|
||||
//
|
||||
// // Set new mode
|
||||
// i2c->OAR1 = tmpreg;
|
||||
//}
|
||||
//
|
||||
//// See I2CSlave.h
|
||||
//#define NoData 0 // the slave has not been addressed
|
||||
//#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
|
||||
//#define WriteGeneral 2 // the master is writing to all slave
|
||||
//#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
||||
//
|
||||
//int i2c_slave_receive(i2c_t *obj)
|
||||
//{
|
||||
// I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||
// int retValue = NoData;
|
||||
//
|
||||
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY) == 1) {
|
||||
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_ADDR) == 1) {
|
||||
// if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_DIR) == 1)
|
||||
// retValue = ReadAddressed;
|
||||
// else
|
||||
// retValue = WriteAddressed;
|
||||
//
|
||||
// __HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_ADDR);
|
||||
// }
|
||||
// }
|
||||
//
|
||||
// return (retValue);
|
||||
//}
|
||||
//
|
||||
//int i2c_slave_read(i2c_t *obj, char *data, int length)
|
||||
//{
|
||||
// char size = 0;
|
||||
//
|
||||
// while (size < length) data[size++] = (char)i2c_byte_read(obj, 0);
|
||||
//
|
||||
// return size;
|
||||
//}
|
||||
//
|
||||
//int i2c_slave_write(i2c_t *obj, const char *data, int length)
|
||||
//{
|
||||
// char size = 0;
|
||||
// I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||
//
|
||||
// do {
|
||||
// i2c_byte_write(obj, data[size]);
|
||||
// size++;
|
||||
// } while (size < length);
|
||||
//
|
||||
// return size;
|
||||
//}
|
||||
//
|
||||
//
|
||||
//#endif // DEVICE_I2CSLAVE
|
||||
|
||||
#endif // DEVICE_I2C
|
||||
|
|
Loading…
Reference in New Issue