From b70b65c1b50a33b71e7c43201102945e7e044641 Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Mon, 4 May 2020 16:14:02 +0800 Subject: [PATCH 1/4] Nuvoton: Enlarge WDT reset delay to avoid premature WDT reset Consider the following factors to define WDT reset delay: 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading. 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance. --- targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c | 8 ++++++-- targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c | 8 ++++++-- targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c | 8 ++++++-- targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c | 8 ++++++-- 4 files changed, 24 insertions(+), 8 deletions(-) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c index cf54a405d2..308a577812 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c @@ -43,8 +43,12 @@ #define NU_WDT_65536CLK 65536 #define NU_WDT_262144CLK 262144 -/* Watchdog reset delay */ -#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_3CLK +/* Watchdog reset delay + * + * 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading. + * 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance. + */ +#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_130CLK /* Support watchdog timeout values beyond H/W * diff --git a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c index a61bb6909e..f8ea4597e8 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c @@ -42,8 +42,12 @@ #define NU_WDT_65536CLK 65536 #define NU_WDT_262144CLK 262144 -/* Watchdog reset delay */ -#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_3CLK +/* Watchdog reset delay + * + * 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading. + * 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance. + */ +#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_130CLK /* Support watchdog timeout values beyond H/W * diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c index 288e9367fb..907657888a 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c @@ -42,8 +42,12 @@ #define NU_WDT_65536CLK 65536 #define NU_WDT_262144CLK 262144 -/* Watchdog reset delay */ -#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_3CLK +/* Watchdog reset delay + * + * 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading. + * 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance. + */ +#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_130CLK /* Support watchdog timeout values beyond H/W * diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c index 01fb436b2e..aa4f4e130b 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c @@ -42,8 +42,12 @@ #define NU_WDT_65536CLK 65536 #define NU_WDT_262144CLK 262144 -/* Watchdog reset delay */ -#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_3CLK +/* Watchdog reset delay + * + * 1. Cannot be too small. This is to avoid premature WDT reset in pieces of timeout cascading. + * 2. Cannot be too large. This is to pass Greentea reset_reason/watchdog_reset tests, which have e.g. 50~100 reset delay tolerance. + */ +#define NU_WDT_RESET_DELAY_RSTDSEL WDT_RESET_DELAY_130CLK /* Support watchdog timeout values beyond H/W * From 2162aaaea3a8f8ff549ef35bf90b678f6474f8ea Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Mon, 4 May 2020 15:16:16 +0800 Subject: [PATCH 2/4] Nuvoton: Fix WDT feature report with clock frequency --- .../TARGET_NUVOTON/TARGET_M451/watchdog_api.c | 34 +++++++++++++++--- .../TARGET_NUVOTON/TARGET_M480/watchdog_api.c | 35 +++++++++++++++---- .../TARGET_NANO100/watchdog_api.c | 31 +++++++++++++--- .../TARGET_NUC472/watchdog_api.c | 34 +++++++++++++++--- 4 files changed, 113 insertions(+), 21 deletions(-) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c index 308a577812..af1e864c15 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c @@ -21,11 +21,30 @@ #include "cmsis.h" -/* Micro seconds per second */ -#define NU_US_PER_SEC 1000000 +/* Define WDT clock source in target configuration option */ +#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#endif + +/* WDT clock source definition */ +#define NU_INTERN_WDT_CLKSRC_LXT 1 +#define NU_INTERN_WDT_CLKSRC_LIRC 2 + +/* WDT clock source selection */ +#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL +#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL) +#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL) /* Watchdog clock per second */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT +#define NU_WDTCLK_PER_SEC (__LXT) +#define NU_WDTCLK_PER_SEC_MAX (__LXT) +#define NU_WDTCLK_PER_SEC_MIN (__LXT) +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC #define NU_WDTCLK_PER_SEC (__LIRC) +#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.5f)) +#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f)) +#endif /* Convert watchdog clock to nearest ms */ #define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC)) @@ -84,7 +103,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_EnableModuleClock(WDT_MODULE); /* Select IP clock source */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT + CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0); +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); +#endif /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); @@ -129,9 +152,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void) wdt_feat.update_config = 1; /* Support stopping watchdog timer */ wdt_feat.disable_watchdog = 1; - /* Accuracy of watchdog timer */ - wdt_feat.clock_typical_frequency = 10000; - wdt_feat.clock_max_frequency = 15000; + /* Typical frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC; + /* Maximum frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX; return wdt_feat; } diff --git a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c index f8ea4597e8..1016492a50 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c @@ -20,11 +20,30 @@ #include "cmsis.h" -/* Micro seconds per second */ -#define NU_US_PER_SEC 1000000 +/* Define WDT clock source in target configuration option */ +#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#endif + +/* WDT clock source definition */ +#define NU_INTERN_WDT_CLKSRC_LXT 1 +#define NU_INTERN_WDT_CLKSRC_LIRC 2 + +/* WDT clock source selection */ +#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL +#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL) +#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL) /* Watchdog clock per second */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT +#define NU_WDTCLK_PER_SEC (__LXT) +#define NU_WDTCLK_PER_SEC_MAX (__LXT) +#define NU_WDTCLK_PER_SEC_MIN (__LXT) +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC #define NU_WDTCLK_PER_SEC (__LIRC) +#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 2.0f)) +#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f)) +#endif /* Convert watchdog clock to nearest ms */ #define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC)) @@ -83,7 +102,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_EnableModuleClock(WDT_MODULE); /* Select IP clock source */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT + CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0); +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); +#endif /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); @@ -128,10 +151,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void) wdt_feat.update_config = 1; /* Support stopping watchdog timer */ wdt_feat.disable_watchdog = 1; - /* Accuracy of watchdog timer */ - wdt_feat.clock_typical_frequency = 10000; - wdt_feat.clock_max_frequency = 15000; - + /* Typical frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC; + /* Maximum frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX; return wdt_feat; } diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c index 907657888a..c0bc933cca 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c @@ -20,11 +20,31 @@ #include "cmsis.h" -/* Micro seconds per second */ -#define NU_US_PER_SEC 1000000 +/* Define WDT clock source in target configuration option */ +#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#endif + +/* WDT clock source definition */ +#define NU_INTERN_WDT_CLKSRC_LXT 1 +/* Not support LIRC clocked WDT */ +//#define NU_INTERN_WDT_CLKSRC_LIRC 2 + +/* WDT clock source selection */ +#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL +#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL) +#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL) /* Watchdog clock per second */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT +#define NU_WDTCLK_PER_SEC (__LXT) +#define NU_WDTCLK_PER_SEC_MAX (__LXT) +#define NU_WDTCLK_PER_SEC_MIN (__LXT) +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC #define NU_WDTCLK_PER_SEC (__LIRC) +#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.5f)) +#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.5f)) +#endif /* Convert watchdog clock to nearest ms */ #define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC)) @@ -134,9 +154,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void) wdt_feat.update_config = 1; /* Support stopping watchdog timer */ wdt_feat.disable_watchdog = 1; - /* Accuracy of watchdog timer */ - wdt_feat.clock_typical_frequency = 10000; - wdt_feat.clock_max_frequency = 15000; + /* Typical frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC; + /* Maximum frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX; return wdt_feat; } diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c index aa4f4e130b..529cd73244 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c @@ -20,11 +20,30 @@ #include "cmsis.h" -/* Micro seconds per second */ -#define NU_US_PER_SEC 1000000 +/* Define WDT clock source in target configuration option */ +#ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#endif + +/* WDT clock source definition */ +#define NU_INTERN_WDT_CLKSRC_LXT 1 +#define NU_INTERN_WDT_CLKSRC_LIRC 2 + +/* WDT clock source selection */ +#define NU_INTERN_WDT_CLKSRC_SEL__(SEL) NU_INTERN_WDT_CLKSRC_##SEL +#define NU_INTERN_WDT_CLKSRC_SEL_(SEL) NU_INTERN_WDT_CLKSRC_SEL__(SEL) +#define NU_INTERN_WDT_CLKSRC_SEL NU_INTERN_WDT_CLKSRC_SEL_(MBED_CONF_TARGET_WDT_CLKSRC_SEL) /* Watchdog clock per second */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT +#define NU_WDTCLK_PER_SEC (__LXT) +#define NU_WDTCLK_PER_SEC_MAX (__LXT) +#define NU_WDTCLK_PER_SEC_MIN (__LXT) +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC #define NU_WDTCLK_PER_SEC (__LIRC) +#define NU_WDTCLK_PER_SEC_MAX ((uint32_t) ((__LIRC) * 1.4f)) +#define NU_WDTCLK_PER_SEC_MIN ((uint32_t) ((__LIRC) * 0.6f)) +#endif /* Convert watchdog clock to nearest ms */ #define NU_WDTCLK2MS(WDTCLK) (((WDTCLK) * 1000 + ((NU_WDTCLK_PER_SEC) / 2)) / (NU_WDTCLK_PER_SEC)) @@ -83,7 +102,11 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_EnableModuleClock(WDT_MODULE); /* Select IP clock source */ +#if NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LXT + CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LXT, 0); +#elif NU_INTERN_WDT_CLKSRC_SEL == NU_INTERN_WDT_CLKSRC_LIRC CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); +#endif /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); @@ -128,9 +151,10 @@ watchdog_features_t hal_watchdog_get_platform_features(void) wdt_feat.update_config = 1; /* Support stopping watchdog timer */ wdt_feat.disable_watchdog = 1; - /* Accuracy of watchdog timer */ - wdt_feat.clock_typical_frequency = 10000; - wdt_feat.clock_max_frequency = 14000; + /* Typical frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_typical_frequency = NU_WDTCLK_PER_SEC; + /* Maximum frequency of not calibrated watchdog clock in Hz */ + wdt_feat.clock_max_frequency = NU_WDTCLK_PER_SEC_MAX; return wdt_feat; } From 572bae3ad617050b36e9b836807a897bf172e8a2 Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Tue, 5 May 2020 11:22:11 +0800 Subject: [PATCH 3/4] Nuvoton: Fix failure to change WDT clock source WDT clock source selection and its enablement bits are protected. Add unlock sequence before write to them. --- targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c | 4 ++++ targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c | 4 ++++ targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c | 4 ++++ targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c index af1e864c15..1ac841e78e 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c @@ -99,6 +99,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) if (! wdt_hw_inited) { wdt_hw_inited = 1; + SYS_UnlockReg(); + /* Enable IP module clock */ CLK_EnableModuleClock(WDT_MODULE); @@ -109,6 +111,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); #endif + SYS_LockReg(); + /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); NVIC_EnableIRQ(WDT_IRQn); diff --git a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c index 1016492a50..ae011649df 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c @@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) if (! wdt_hw_inited) { wdt_hw_inited = 1; + SYS_UnlockReg(); + /* Enable IP module clock */ CLK_EnableModuleClock(WDT_MODULE); @@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); #endif + SYS_LockReg(); + /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); NVIC_EnableIRQ(WDT_IRQn); diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c index c0bc933cca..a058bd2d5b 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c @@ -101,12 +101,16 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) if (! wdt_hw_inited) { wdt_hw_inited = 1; + SYS_UnlockReg(); + /* Enable IP module clock */ CLK_EnableModuleClock(WDT_MODULE); /* Select IP clock source */ CLK_SetModuleClock(WDT_MODULE, 0, 0); + SYS_LockReg(); + /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); NVIC_EnableIRQ(WDT_IRQn); diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c index 529cd73244..9480a6ce79 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c @@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) if (! wdt_hw_inited) { wdt_hw_inited = 1; + SYS_UnlockReg(); + /* Enable IP module clock */ CLK_EnableModuleClock(WDT_MODULE); @@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0); #endif + SYS_LockReg(); + /* Set up IP interrupt */ NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler); NVIC_EnableIRQ(WDT_IRQn); From 3d1fd6ae0d9317848ef3a214eb9338994ed14f0e Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Tue, 5 May 2020 11:28:53 +0800 Subject: [PATCH 4/4] Nuvoton: Change WDT clock source to LXT LIRC has 40%~50% error rate, so change WDT clock source to LXT from LIRC. NOTE: NANO100 series just supports LIRC-clocked WDT. --- targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c | 2 +- targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c | 2 +- targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c index 1ac841e78e..38bd1b44b5 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c @@ -23,7 +23,7 @@ /* Define WDT clock source in target configuration option */ #ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL -#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LXT #endif /* WDT clock source definition */ diff --git a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c index ae011649df..243e9f3e8e 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c @@ -22,7 +22,7 @@ /* Define WDT clock source in target configuration option */ #ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL -#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LXT #endif /* WDT clock source definition */ diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c index 9480a6ce79..ca2ada2868 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c @@ -22,7 +22,7 @@ /* Define WDT clock source in target configuration option */ #ifndef MBED_CONF_TARGET_WDT_CLKSRC_SEL -#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LIRC +#define MBED_CONF_TARGET_WDT_CLKSRC_SEL LXT #endif /* WDT clock source definition */