From 9bc59fe2d77ad6617d6a5531afd2ef60564c4968 Mon Sep 17 00:00:00 2001 From: Steven Cooreman Date: Tue, 25 Feb 2020 11:44:12 +0100 Subject: [PATCH] Bugfix for #12374 Use an RTCC retention register to keep track of user timebase for RTC API. RTC and LP Ticker implementations use the same counter, but they shouldn't share timebases. --- targets/TARGET_Silicon_Labs/TARGET_EFM32/rtcc.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/rtcc.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/rtcc.c index 91fcda9852..5efdc57b73 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/rtcc.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/rtcc.c @@ -56,6 +56,7 @@ void rtc_init(void) rtcc_init.presc = rtccCntPresc_32768; RTCC_Init(&rtcc_init); RTCC_Enable(true); + RTCC->RET[0].REG = 0; } void rtc_free(void) @@ -71,20 +72,13 @@ int rtc_isenabled(void) time_t rtc_read(void) { - return RTCC_CounterGet(); + return RTCC_CounterGet() + RTCC->RET[0].REG; } void rtc_write(time_t t) { core_util_critical_section_enter(); - uint32_t diff = t - RTCC_CounterGet(); - lptick_offset += diff; - - if(RTCC_IntGetEnabled() & RTCC_IF_CC0) { - RTCC->CC[0].CCV += diff << 15; - } - - RTCC_CounterSet(t); + RTCC->RET[0].REG = t - RTCC_CounterGet(); core_util_critical_section_exit(); }