diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct
index adecbdcafe..ada669253f 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM/stm32h743xI.sct
@@ -1,9 +1,11 @@
#! armcc -E
; Scatter-Loading Description File
+;
+; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
-;* Copyright (c) 2018-2019 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,45 +15,46 @@
;*
;******************************************************************************
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x200000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-#define MBED_RAM_START 0x24000000
-#define MBED_RAM_SIZE 0x80000
-#define MBED_VECTTABLE_RAM_START 0x20000000
-#define MBED_VECTTABLE_RAM_SIZE 0x298
-#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
+#define MBED_CRASH_REPORT_RAM_START (NVIC_RAM_VECTOR_ADDRESS + VECTORS_SIZE)
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
-#define MBED_RAM0_START (MBED_RAM_START)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
- RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
RW_DMARxDscrTab 0x30040000 0x60 {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/cmsis_nvic.h
new file mode 100644
index 0000000000..adf7752e2f
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/cmsis_nvic.h
@@ -0,0 +1,39 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x200000 // 2.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x24000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x80000 // 128 KB
+#endif
+
+#define NVIC_NUM_VECTORS 166
+#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
+
+#endif
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct
index 07df525113..50f930c713 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/TOOLCHAIN_ARM/stm32h745xI_CM4.sct
@@ -1,9 +1,11 @@
#! armcc -E
; Scatter-Loading Description File
+;
+; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
-;* Copyright (c) 2019 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,39 +15,39 @@
;*
;******************************************************************************
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08100000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-#define MBED_RAM_START 0x10000000
-#define MBED_RAM_SIZE 0x48000
-#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
-#define MBED_VECTTABLE_RAM_SIZE 0x298
-#define MBED_RAM0_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
-
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
-
- RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
- .ANY (+RW +ZI)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
+ }
+
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/cmsis_nvic.h
new file mode 100644
index 0000000000..82b9862fcc
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM4/cmsis_nvic.h
@@ -0,0 +1,40 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8100000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x48000 // 288 KB
+#endif
+
+
+#define NVIC_NUM_VECTORS 166
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
+
+#endif
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct
index 22ffad0d4d..9355115db1 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/TOOLCHAIN_ARM/stm32h745xI.sct
@@ -1,9 +1,11 @@
#! armcc -E
; Scatter-Loading Description File
+;
+; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
-;* Copyright (c) 2018-2019 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,40 +15,40 @@
;*
;******************************************************************************
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-#define MBED_RAM_START 0x24000000
-#define MBED_RAM_SIZE 0x80000
-#define MBED_VECTTABLE_RAM_START 0x20000000
-#define MBED_VECTTABLE_RAM_SIZE 0x298
-#define MBED_RAM0_START (MBED_RAM_START)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
-
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
RW_DMARxDscrTab 0x30040000 0x60 {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/cmsis_nvic.h
similarity index 62%
rename from targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h
rename to targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/cmsis_nvic.h
index fe8d889142..54f04ba4e7 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/TARGET_GENERIC_H745I/TARGET_GENERIC_H745I_CM7/cmsis_nvic.h
@@ -16,10 +16,24 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297
-// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
-#define NVIC_NUM_VECTORS 166
-#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x24000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x80000 // 512 KB
+#endif
+
+
+#define NVIC_NUM_VECTORS 166
+#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct
index 07df525113..50f930c713 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/TOOLCHAIN_ARM/stm32h747xI_CM4.sct
@@ -1,9 +1,11 @@
#! armcc -E
; Scatter-Loading Description File
+;
+; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
-;* Copyright (c) 2019 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,39 +15,39 @@
;*
;******************************************************************************
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08100000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-#define MBED_RAM_START 0x10000000
-#define MBED_RAM_SIZE 0x48000
-#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
-#define MBED_VECTTABLE_RAM_SIZE 0x298
-#define MBED_RAM0_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
-
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
-
- RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
- .ANY (+RW +ZI)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
+ .ANY (+RW +ZI)
+ }
+
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
}
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/cmsis_nvic.h
new file mode 100644
index 0000000000..82b9862fcc
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM4/cmsis_nvic.h
@@ -0,0 +1,40 @@
+/* mbed Microcontroller Library
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
+ *
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+*/
+
+#ifndef MBED_CMSIS_NVIC_H
+#define MBED_CMSIS_NVIC_H
+
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8100000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x48000 // 288 KB
+#endif
+
+
+#define NVIC_NUM_VECTORS 166
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
+
+#endif
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/TOOLCHAIN_ARM/stm32h747xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/TOOLCHAIN_ARM/stm32h747xI.sct
index 22ffad0d4d..9355115db1 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/TOOLCHAIN_ARM/stm32h747xI.sct
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/TOOLCHAIN_ARM/stm32h747xI.sct
@@ -1,9 +1,11 @@
#! armcc -E
; Scatter-Loading Description File
+;
+; SPDX-License-Identifier: BSD-3-Clause
;******************************************************************************
;* @attention
;*
-;* Copyright (c) 2018-2019 STMicroelectronics.
+;* Copyright (c) 2016-2020 STMicroelectronics.
;* All rights reserved.
;*
;* This software component is licensed by ST under BSD 3-Clause license,
@@ -13,40 +15,40 @@
;*
;******************************************************************************
+#include "../cmsis_nvic.h"
+
#if !defined(MBED_APP_START)
- #define MBED_APP_START 0x08000000
+ #define MBED_APP_START MBED_ROM_START
#endif
#if !defined(MBED_APP_SIZE)
- #define MBED_APP_SIZE 0x100000
+ #define MBED_APP_SIZE MBED_ROM_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
- #define MBED_BOOT_STACK_SIZE 0x400
+/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
+ #define MBED_BOOT_STACK_SIZE 0x400
#endif
-#define Stack_Size MBED_BOOT_STACK_SIZE
+/* Round up VECTORS_SIZE to 8 bytes */
+#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
-#define MBED_RAM_START 0x24000000
-#define MBED_RAM_SIZE 0x80000
-#define MBED_VECTTABLE_RAM_START 0x20000000
-#define MBED_VECTTABLE_RAM_SIZE 0x298
-#define MBED_RAM0_START (MBED_RAM_START)
-#define MBED_RAM0_SIZE (MBED_RAM_SIZE)
+LR_IROM1 MBED_APP_START MBED_APP_SIZE {
-LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
-
- ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
+ ER_IROM1 MBED_APP_START MBED_APP_SIZE {
+ *.o (RESET, +First)
+ *(InRoot$$Sections)
+ .ANY (+RO)
}
- RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
- .ANY (+RW +ZI)
+ RW_IRAM1 (MBED_RAM_START) { ; RW data
+ .ANY (+RW +ZI)
}
- ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
+ ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
+ }
+
+ ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
}
RW_DMARxDscrTab 0x30040000 0x60 {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/cmsis_nvic.h
similarity index 60%
rename from targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/cmsis_nvic.h
rename to targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/cmsis_nvic.h
index 0e4e24b3d1..54f04ba4e7 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H745xI/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I_CM7/cmsis_nvic.h
@@ -16,15 +16,24 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297
-// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
-#define NVIC_NUM_VECTORS 166
-
-#ifdef CORE_CM7
-#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
-#else
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of D2 RAM (CM4)
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
#endif
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x24000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x80000 // 512 KB
+#endif
+
+
+#define NVIC_NUM_VECTORS 166
+#define NVIC_RAM_VECTOR_ADDRESS 0x20000000
+
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/cmsis_nvic.h
deleted file mode 100644
index 0e4e24b3d1..0000000000
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/cmsis_nvic.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- ******************************************************************************
- * @attention
- *
- * © Copyright (c) 2018-2019 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
-*/
-
-#ifndef MBED_CMSIS_NVIC_H
-#define MBED_CMSIS_NVIC_H
-
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 150 vectors = 600 bytes from 0x40 to 0x297
-// Total: 166 vectors = 664 bytes (0x298) to be reserved in RAM
-#define NVIC_NUM_VECTORS 166
-
-#ifdef CORE_CM7
-#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of DTCM RAM
-#else
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of D2 RAM (CM4)
-#endif
-
-#endif