No Ports reduced to 1

Licensing headers replaced with mbed Apache.
SPI/SPIS pin configuration is done via PIN_CNF

libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/TOOLCHAIN_ARM_STD/startup_nRF51822.s

@@ -1,15 +1,14 @@
-; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
+; mbed Microcontroller Library
-;
+; Copyright (c) 2006-2013 ARM Limited
-; The information contained herein is property of Nordic Semiconductor ASA.
+;Licensed under the Apache License, Version 2.0 (the "License");
-; Terms and conditions of usage are described in detail in NORDIC
+;you may not use this file except in compliance with the License.
-; SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+;You may obtain a copy of the License at
-;
+;http://www.apache.org/licenses/LICENSE-2.0
-; Licensees are granted free, non-transferable use of the information. NO
+;Unless required by applicable law or agreed to in writing, software
-; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+;distributed under the License is distributed on an "AS IS" BASIS,
-; the file.
+;WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- 
+;See the License for the specific language governing permissions and
-; NOTE: Template files (including this one) are application specific and therefore 
+;limitations under the License.
-; expected to be copied into the application project folder prior to its use!
 
 ; Description message
 

libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/nrf51.h

@@ -1,28 +1,19 @@
+/* mbed Microcontroller Library
 
-/****************************************************************************************************//**
+ * Copyright (c) 2006-2013 ARM Limited
- * @file     nRF51.h
  *
- * @brief    CMSIS Cortex-M0 Peripheral Access Layer Header File for
+ * Licensed under the Apache License, Version 2.0 (the "License");
- *           nRF51 from Nordic Semiconductor.
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
  *
- * @version  V2.4C
+ *     http://www.apache.org/licenses/LICENSE-2.0
- * @date     31. October 2013
  *
- * @note     Generated with SVDConv V2.77p 
+ * Unless required by applicable law or agreed to in writing, software
- *           from CMSIS SVD File 'nRF51.xml' Version 2.4C,
+ * distributed under the License is distributed on an "AS IS" BASIS,
- *
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * @par      Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved. 
+ * See the License for the specific language governing permissions and
- *           
+ * limitations under the License.
- *           The information contained herein is property of Nordic Semiconductor ASA. 
+ */
- *           Terms and conditions of usage are described in detail in NORDIC 
- *           SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 
- *           
- *           Licensees are granted free, non-transferable use of the information. NO 
- *           WARRANTY of ANY KIND is provided. This heading must NOT be removed from 
- *           the file. 
- *           
- *
- *******************************************************************************************************/
 
 
 

libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/nrf51822.h

@@ -1,13 +1,18 @@
-/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
+/* mbed Microcontroller Library
+
+ * Copyright (c) 2006-2013 ARM Limited
  *
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * Licensed under the Apache License, Version 2.0 (the "License");
- * Terms and conditions of usage are described in detail in NORDIC
+ * you may not use this file except in compliance with the License.
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ * You may obtain a copy of the License at
  *
- * Licensees are granted free, non-transferable use of the information. NO
+ *     http://www.apache.org/licenses/LICENSE-2.0
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
  *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  */
 
 

libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/system_nrf51822.c

@@ -1,13 +1,18 @@
-/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
+/* mbed Microcontroller Library
+
+ * Copyright (c) 2006-2013 ARM Limited
  *
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * Licensed under the Apache License, Version 2.0 (the "License");
- * Terms and conditions of usage are described in detail in NORDIC
+ * you may not use this file except in compliance with the License.
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ * You may obtain a copy of the License at
  *
- * Licensees are granted free, non-transferable use of the information. NO
+ *     http://www.apache.org/licenses/LICENSE-2.0
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
  *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  */
 
 
@@ -88,8 +93,7 @@ void SystemInit(void)
     NRF_CLOCK->TASKS_HFCLKSTART     = 1;
 
     // Wait for the external oscillator to start up.
-    while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) 
+    while (NRF_CLOCK->EVENTS_HFCLKSTARTED == 0) {
-    {
         // Do nothing.
     }
 }

libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_NRF51822/system_nrf51822.h

@@ -1,13 +1,18 @@
-/* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
+/* mbed Microcontroller Library
+
+ * Copyright (c) 2006-2013 ARM Limited
  *
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * Licensed under the Apache License, Version 2.0 (the "License");
- * Terms and conditions of usage are described in detail in NORDIC
+ * you may not use this file except in compliance with the License.
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ * You may obtain a copy of the License at
  *
- * Licensees are granted free, non-transferable use of the information. NO
+ *     http://www.apache.org/licenses/LICENSE-2.0
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
  *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
  */
 
 
@@ -34,16 +39,6 @@ extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
  */
 extern void SystemInit (void);
 
-/**
- * Enable Soft Device
- *
- * @param  none
- * @return none
- *
- * @brief  Initializes softdevice with NRF_CLOCK_LFCLKSRC_XTAL_20_PPM
- */
-extern void EnableSoftDevice (void);
-
 
 /**
  * Update SystemCoreClock variable

libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_NRF51822/PinNames.h

@@ -72,50 +72,46 @@ typedef enum {
     P0_6  = p6,
     P0_7  = p7,
     
-    P1_0 = p8,
+    P0_8  = p8,
-    P1_1 = p9,
+    P0_9  = p9,
-    P1_2 = p10,
+    P0_10 = p10,
-    P1_3 = p11,
+    P0_11 = p11,
-    P1_4 = p12,
+    P0_12 = p12,
-    P1_5 = p13,
+    P0_13 = p13,
-    P1_6 = p14,
+    P0_14 = p14,
-    P1_7 = p15,
+    P0_15 = p15,
     
-    P2_0 = p16,
+    P0_16 = p16,
-    P2_1 = p17,
+    P0_17 = p17,
-    P2_2 = p18,
+    P0_18 = p18,
-    P2_3 = p19,
+    P0_19 = p19,
-    P2_4 = p20,
+    P0_20 = p20,
-    P2_5 = p21,
+    P0_21 = p21,
-    P2_6 = p22,
+    P0_22 = p22,
-    P2_7 = p23,
+    P0_23 = p23,
     
-    P3_0 = p24,
+    P0_24 = p24,
-    P3_1 = p25,
+    P0_25 = p25,
-    P3_2 = p26,
+    P0_26 = p26,
-    P3_3 = p27,
+    P0_27 = p27,
-    P3_4 = p28,
+    P0_28 = p28,
-    P3_5 = p29,
+    P0_29 = p29,
-    P3_6 = p30,
+    P0_30 = p30,
-    //P3_7 = p31,
     
-    LED_START = p18,
+    LED1 = p18,
-    LED_STOP = p19,
+    LED2 = p19,
-    LED1 = LED_START,
+    LED3 = p18,
-    LED2 = LED_STOP,
+    LED4 = p19,
-    LED3 = LED_START,
+
-    LED4 = LED_STOP,
+    BUTTON0 = p16,
+    BUTTON1 = p17,
         
-    BUTTON_START = p16,
-    BUTTON_STOP = p17,
-    BUTTON0 = BUTTON_START,
-    BUTTON1 = BUTTON_STOP,
-    // USB Pins
     RX_PIN_NUMBER = p11,
     TX_PIN_NUMBER = p9,
     CTS_PIN_NUMBER = p10,
     RTS_PIN_NUMBER = p8,
 
+    // mBed interface Pins
     USBTX = TX_PIN_NUMBER,
     USBRX = RX_PIN_NUMBER,
         
@@ -134,6 +130,11 @@ typedef enum {
     SPIS_PSELSS = p14,    
     SPIS_PSELSCK = p15,
 
+    I2C_SDA0 = p22,
+    I2C_SCL0 = p20,
+
+    I2C_SDA1 = p13,
+    I2C_SCL1 = p15,
     // Not connected
     NC = (int)0xFFFFFFFF
 } PinName;
@@ -141,7 +142,7 @@ typedef enum {
 typedef enum {
     PullNone = 0,
     PullDown = 1,
-    PullUp = 3,
+    PullUp = 3
 } PinMode;
 
 #ifdef __cplusplus

libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_NRF51822/PortNames.h

@@ -21,10 +21,7 @@ extern "C" {
 #endif
 
 typedef enum {
-    Port0 = 0, //GPIO pins 0-7
+    Port0 = 0 //GPIO pins 0-31
-    Port1 = 1, //GPIO pins 8-15
-    Port2 = 2, //GPIO pins 16-22
-    Port3 = 3, //GPIO pins 24-31
 } PortName;
 
 #ifdef __cplusplus

libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_NRF51822/gpio_api.c

@@ -20,7 +20,7 @@ void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
     if(pin == NC) return;
 
     obj->pin = pin;
-    obj->mask = (1<<pin);
+    obj->mask = (1ul<<pin);
 
     obj->reg_set = &NRF_GPIO->OUTSET;
     obj->reg_clr = &NRF_GPIO->OUTCLR;

libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_NRF51822/port_api.c

@@ -18,7 +18,7 @@
 #include "gpio_api.h"
 
 PinName port_pin(PortName port, int pin_n) {
-    return (PinName)( (port << PORT_SHIFT) | pin_n);
+    return (PinName)(pin_n);
 }
 
 void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
@@ -35,7 +35,7 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
 void port_mode(port_t *obj, PinMode mode) {
     uint32_t i;
     // The mode is set per pin: reuse pinmap logic
-    for (i=0; i<8; i++) {
+    for (i=0; i<31; i++) {
         if (obj->mask & (1<<i)) {
             pin_mode(port_pin(obj->port, i), mode);
         }
@@ -46,9 +46,9 @@ void port_dir(port_t *obj, PinDirection dir) {
     int i;
     switch (dir) {
         case PIN_INPUT : 
-        for (i=0; i<8; i++) {
+        for (i=0; i<31; i++) {
             if (obj->mask & (1<<i)) {
-                obj->reg_cnf[port_pin(obj->port, i)] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
                                     | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
                                     | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
                                     | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
@@ -56,9 +56,9 @@ void port_dir(port_t *obj, PinDirection dir) {
         }
         break;
         case PIN_OUTPUT:
-        for (i=0; i<8; i++) {
+        for (i=0; i<31; i++) {
             if (obj->mask & (1<<i)) {
-                obj->reg_cnf[port_pin(obj->port, i)] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                obj->reg_cnf[i] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
                                     | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
                                     | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
                                     | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
@@ -70,9 +70,9 @@ void port_dir(port_t *obj, PinDirection dir) {
 }
 
 void port_write(port_t *obj, int value) {
-    *((volatile uint8_t*)(obj->reg_out)+(uint8_t)obj->port) = value;
+    *obj->reg_out = value;
 }
 
 int port_read(port_t *obj) {
-     return (*((const volatile uint8_t*)(obj->reg_in) + obj->port));
+    return (*obj->reg_in);
 }

libraries/mbed/targets/hal/TARGET_NORDIC/TARGET_NRF51822/spi_api.c

@@ -74,12 +74,30 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
     }    
       // pin out the spi pins    
     if (ssel != NC) {//slave
+        obj->spis->POWER=0;
         obj->spis->POWER=1;
 
-        NRF_GPIO->DIR &= ~(1<<mosi);
+        NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-        NRF_GPIO->DIR &= ~(1<<miso);
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-        NRF_GPIO->DIR &= ~(1<<sclk);
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-        NRF_GPIO->DIR &= ~(1<<ssel);
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        NRF_GPIO->PIN_CNF[ssel] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+        
         obj->spis->PSELMOSI = mosi;
         obj->spis->PSELMISO = miso;
         obj->spis->PSELSCK = sclk;
@@ -93,24 +111,40 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
         obj->spis->RXDPTR = (uint32_t)&m_rx_buf[0];  
         obj->spis->SHORTS = (SPIS_SHORTS_END_ACQUIRE_Enabled<<SPIS_SHORTS_END_ACQUIRE_Pos);
 
+        spi_format(obj, 8, 0, 1);  // 8 bits, mode 0, slave
     }
     else{//master
+        obj->spi->POWER=0;
         obj->spi->POWER=1;
-        NRF_GPIO->DIR |= (1<<mosi);    
-        obj->spi->PSELMOSI = mosi;
-        NRF_GPIO->DIR |= (1<<sclk);
-        obj->spi->PSELSCK = sclk;
-        NRF_GPIO->DIR &= ~(1<<miso);
-        obj->spi->PSELMISO = miso;
-        obj->spi->EVENTS_READY = 0U;        
-    }
         
-    // set default format and frequency
+        //NRF_GPIO->DIR |= (1<<mosi);    
-    if (ssel == NC) {
+        NRF_GPIO->PIN_CNF[mosi] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        obj->spi->PSELMOSI = mosi;
+        
+        NRF_GPIO->PIN_CNF[sclk] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        obj->spi->PSELSCK = sclk;
+        
+        //NRF_GPIO->DIR &= ~(1<<miso);
+        NRF_GPIO->PIN_CNF[miso] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
+                                    | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
+                                    | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
+                                    | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
+                                    | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
+
+        obj->spi->PSELMISO = miso;
+        
+        obj->spi->EVENTS_READY = 0U;  
+
         spi_format(obj, 8, 0, 0);  // 8 bits, mode 0, master
         spi_frequency(obj, 1000000);      
-    } else {
-        spi_format(obj, 8, 0, 1);  // 8 bits, mode 0, slave
     }
             
 }