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NUCLEO_F103RB: replace CLOCK_SOURCE_USB by DEVICE_USBDEVICE

pull/9768/head
jeromecoutant 2018-04-30 15:22:09 +02:00 committed by Russ Butler
parent bcfe96b83c
commit 9b16d4fb5b
2 changed files with 13 additions and 20 deletions
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28
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/system_clock.c
View File

@ -17,9 +17,9 @@
/** /**
* This file configures the system clock as follows: * This file configures the system clock as follows:
*------------------------------------------------------------------------------------------- *-------------------------------------------------------------------------------------------
* System clock source | 1- PLL_HSE_EXTC / CLOCK_SOURCE_USB=1 | 3- PLL_HSI / CLOCK_SOURCE_USB=1 * System clock source | 1- PLL_HSE_EXTC / DEVICE_USBDEVICE | 3- PLL_HSI / DEVICE_USBDEVICE
* | (external 8 MHz clock) | (internal 8 MHz) * | (external 8 MHz clock) | (internal 8 MHz)
* | 2- PLL_HSE_XTAL / CLOCK_SOURCE_USB=1 | * | 2- PLL_HSE_XTAL / DEVICE_USBDEVICE |
* | (external 8 MHz xtal) | * | (external 8 MHz xtal) |
*------------------------------------------------------------------------------------------- *-------------------------------------------------------------------------------------------
* SYSCLK(MHz) | 72 / 72 | 64 / 48 * SYSCLK(MHz) | 72 / 72 | 64 / 48
@ -30,8 +30,6 @@
*------------------------------------------------------------------------------------------- *-------------------------------------------------------------------------------------------
* APB2CLK (MHz) | 72 / 72 | 64 / 48 * APB2CLK (MHz) | 72 / 72 | 64 / 48
*------------------------------------------------------------------------------------------- *-------------------------------------------------------------------------------------------
* USB capable (48 MHz precise clock) | NO / YES | NO / YES
*-------------------------------------------------------------------------------------------
*/ */
#include "stm32f1xx.h" #include "stm32f1xx.h"
@ -164,9 +162,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{ {
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct;
#if (CLOCK_SOURCE_USB) #if (DEVICE_USBDEVICE)
RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit;
#endif /* CLOCK_SOURCE_USB */ #endif /* DEVICE_USBDEVICE */
/* Enable HSE oscillator and activate PLL with HSE as source */ /* Enable HSE oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@ -193,12 +191,12 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
return 0; // FAIL return 0; // FAIL
} }
#if (CLOCK_SOURCE_USB) #if (DEVICE_USBDEVICE)
/* USB clock selection */ /* USB clock selection */
RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit);
#endif /* CLOCK_SOURCE_USB */ #endif /* DEVICE_USBDEVICE */
/* Output clock on MCO1 pin(PA8) for debugging purpose */ /* Output clock on MCO1 pin(PA8) for debugging purpose */
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz //HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
@ -215,9 +213,9 @@ uint8_t SetSysClock_PLL_HSI(void)
{ {
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct;
#if (CLOCK_SOURCE_USB) #if (DEVICE_USBDEVICE)
RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit; RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInit;
#endif /* CLOCK_SOURCE_USB */ #endif /* DEVICE_USBDEVICE */
/* Enable HSI oscillator and activate PLL with HSI as source */ /* Enable HSI oscillator and activate PLL with HSI as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
@ -226,21 +224,21 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
#if (CLOCK_SOURCE_USB) #if (DEVICE_USBDEVICE)
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz (8 MHz/2 * 12) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12; // 48 MHz (8 MHz/2 * 12)
#else /* CLOCK_SOURCE_USB */ #else /* DEVICE_USBDEVICE */
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16) RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16; // 64 MHz (8 MHz/2 * 16)
#endif /* CLOCK_SOURCE_USB */ #endif /* DEVICE_USBDEVICE */
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL return 0; // FAIL
} }
#if (CLOCK_SOURCE_USB) #if (DEVICE_USBDEVICE)
/* USB clock selection */ /* USB clock selection */
RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB; RCC_PeriphCLKInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; RCC_PeriphCLKInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit); HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInit);
#endif /* CLOCK_SOURCE_USB */ #endif /* DEVICE_USBDEVICE */
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

5
targets/targets.json
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@ -2184,11 +2184,6 @@
"help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)", "help": "Mask value : USE_PLL_HSE_EXTC (SYSCLK=72 MHz) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI (SYSCLK=64 MHz)",
"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI", "value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
"macro_name": "CLOCK_SOURCE" "macro_name": "CLOCK_SOURCE"
},
"clock_source_usb": {
"help": "In case of HSI clock source, to get 48 Mhz USB, SYSCLK has to be reduced from 64 to 48 MHz (set 0 for the max SYSCLK value)",
"value": "0",
"macro_name": "CLOCK_SOURCE_USB"
} }
}, },
"detect_code": ["0700"], "detect_code": ["0700"],