mirror of https://github.com/ARMmbed/mbed-os.git
Atmel RF: use system wait_ns
This driver's delay_ns was used as the basis of the system wait_ns - migrate to that refined implementation.pull/10144/head
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6b84b14ab6
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9ad6b10b43
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@ -321,75 +321,10 @@ static void rf_if_ack_timer_signal(void)
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}
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}
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#endif
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#endif
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// *INDENT-OFF*
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/* Delay functions for RF Chip SPI access */
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#ifdef __CC_ARM
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__asm static void delay_loop(uint32_t count)
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{
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1
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SUBS a1, a1, #1
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BCS %BT1
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BX lr
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}
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#elif defined (__ARMCC_VERSION) /* ARMC6 */
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void delay_loop(uint32_t count)
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{
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// TODO: This needs implementation
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while(count--)
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;;
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}
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#elif defined (__ICCARM__)
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static void delay_loop(uint32_t count)
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{
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__asm volatile(
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"loop: \n"
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" SUBS %0, %0, #1 \n"
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" BCS.n loop\n"
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: "+r" (count)
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:
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: "cc"
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);
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}
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#else // GCC
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static void delay_loop(uint32_t count)
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{
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__asm__ volatile (
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"%=:\n\t"
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#if defined(__thumb__) && !defined(__thumb2__)
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"SUB %0, #1\n\t"
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#else
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"SUBS %0, %0, #1\n\t"
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#endif
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"BCS %=b\n\t"
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: "+l" (count)
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:
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: "cc"
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);
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}
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#endif
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// *INDENT-ON*
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static void delay_ns(uint32_t ns)
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{
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uint32_t cycles_per_us = SystemCoreClock / 1000000;
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// Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
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// Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
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// Cortex-M7 - who knows?
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// Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
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// Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
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// as original version of code was 300% slow on M4.
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// [Note that this very calculation, plus call overhead, will take multiple
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// cycles. Could well be 100ns on its own... So round down here, startup is
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// worth at least one loop iteration.]
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uint32_t count = (cycles_per_us * ns) / 3000;
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delay_loop(count);
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}
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// t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
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// t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
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#define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */}
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#define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */}
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// t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
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// t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
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#define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
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#define CS_RELEASE() {wait_ns(250); rf->CS = 1; wait_ns(250);}
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/*
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/*
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* \brief Read connected radio part.
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* \brief Read connected radio part.
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