diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct
index 72a119403f..c85746cb10 100644
--- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct
+++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct
@@ -39,6 +39,8 @@
 
 #define VECTOR_SIZE         NVIC_RAM_VECTOR_SIZE
 
+#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
+
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
 #  if defined(MBED_BOOT_STACK_SIZE)
 #    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
@@ -55,12 +57,12 @@ LR_CODE  MBED_ROM_START  MBED_ROM_SIZE  {
         .ANY (+RO)
     }
 
-    RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE)  {
+    RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {
         * (+RW) ; RW data that gets copied from Flash to SRAM
         * (+ZI) ; ZI data that gets initialised to zero in SRAM
     }
 
-    ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
+    ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
     }
 
     ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack