From 96016aea17eb6d3de1c371d451517a962e7e73d0 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 15 May 2020 15:52:01 +0200 Subject: [PATCH] STM32F1 baremetal support --- .../device/TOOLCHAIN_ARM/stm32f103xb.sct | 77 +++++++++---------- .../device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld | 74 ++++++++++++++---- .../device/TOOLCHAIN_IAR/stm32f103xb.icf | 68 ++++++++++------ .../TARGET_NUCLEO_F103RB/device/cmsis_nvic.h | 59 +++++++------- targets/targets.json | 3 + 5 files changed, 172 insertions(+), 109 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct index 2f1f242d6d..50f930c713 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM/stm32f103xb.sct @@ -1,56 +1,53 @@ #! armcc -E ; Scatter-Loading Description File -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Copyright (c) 2016, STMicroelectronics -; All rights reserved. ; -; Redistribution and use in source and binary forms, with or without -; modification, are permitted provided that the following conditions are met: -; -; 1. Redistributions of source code must retain the above copyright notice, -; this list of conditions and the following disclaimer. -; 2. Redistributions in binary form must reproduce the above copyright notice, -; this list of conditions and the following disclaimer in the documentation -; and/or other materials provided with the distribution. -; 3. Neither the name of STMicroelectronics nor the names of its contributors -; may be used to endorse or promote products derived from this software -; without specific prior written permission. -; -; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; SPDX-License-Identifier: BSD-3-Clause +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2016-2020 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#include "../cmsis_nvic.h" + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START #endif -#define Stack_Size MBED_BOOT_STACK_SIZE +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif -LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) +#if !defined(MBED_BOOT_STACK_SIZE) +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ER_IROM1 0x08000000 0x20000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) } - ; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0 - RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0-Stack_Size) { ; RW data - .ANY (+RW +ZI) + RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data + .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up } - ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down } } - diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld index c5f242eb21..214dccf361 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_GCC_ARM/STM32F103XB.ld @@ -1,23 +1,51 @@ /* Linker script to configure memory regions. */ -/* 0xEC reserved for vectors; 8-byte aligned = 0xF0 */ +/* + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ -#if !defined(MBED_BOOT_STACK_SIZE) - #define MBED_BOOT_STACK_SIZE 0x400 +#include "../cmsis_nvic.h" + + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START #endif -STACK_SIZE = MBED_BOOT_STACK_SIZE; +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_BOOT_STACK_SIZE) + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K - RAM (rwx) : ORIGIN = 0x200000F0, LENGTH = 20K - (0xEC+0x4) +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE } /* Linker script to place sections and symbol values. Should be used together * with other linker script that defines memory regions FLASH and RAM. * It references following symbols, which must be defined in code: * Reset_Handler : Entry of reset handler - * + * * It defines following symbols, which code can use without definition: * __exidx_start * __exidx_end @@ -48,6 +76,7 @@ SECTIONS { KEEP(*(.isr_vector)) *(.text*) + KEEP(*(.init)) KEEP(*(.fini)) @@ -70,7 +99,7 @@ SECTIONS KEEP(*(.eh_frame*)) } > FLASH - .ARM.extab : + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > FLASH @@ -84,7 +113,7 @@ SECTIONS __etext = .; _sidata = .; - + .data : AT (__etext) { __data_start__ = .; @@ -105,7 +134,6 @@ SECTIONS KEEP(*(.init_array)) PROVIDE_HIDDEN (__init_array_end = .); - . = ALIGN(8); /* finit data */ PROVIDE_HIDDEN (__fini_array_start = .); @@ -121,6 +149,19 @@ SECTIONS } > RAM + /* Uninitialized data section + * This region is not initialized by the C/C++ library and can be used to + * store state across soft reboots. */ + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; + } > RAM + .bss : { . = ALIGN(8); @@ -132,13 +173,13 @@ SECTIONS __bss_end__ = .; _ebss = .; } > RAM - + .heap (COPY): { __end__ = .; - end = __end__; + PROVIDE(end = .); *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE; + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE; __HeapLimit = .; } > RAM @@ -154,10 +195,9 @@ SECTIONS * size of stack_dummy section */ __StackTop = ORIGIN(RAM) + LENGTH(RAM); _estack = __StackTop; - __StackLimit = __StackTop - STACK_SIZE; + __StackLimit = __StackTop - MBED_BOOT_STACK_SIZE; PROVIDE(__stack = __StackTop); - + /* Check if data + heap + stack exceeds RAM limit */ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") } - diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf index b7ff305bf2..7f9fd6b1da 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf @@ -1,35 +1,59 @@ -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ -/*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x08000000; -/*-Memory Regions-*/ -define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; -define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; -define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000; -define symbol __ICFEDIT_region_NVIC_end__ = 0x200000F0 - 0x1; -define symbol __ICFEDIT_region_RAM_start__ = 0x200000F0; /* 8-byte aligned (0xEC) = 0xF0 */ -define symbol __ICFEDIT_region_RAM_end__ = 0x20004FFF; -/*-Sizes-*/ +/* Linker script to configure memory regions. + * + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ +/* Device specific values */ + +/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */ + +define symbol VECTORS = 59; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */ +define symbol HEAP_SIZE = 0x1000; + +/* Common - Do not change */ + +if (!isdefinedsymbol(MBED_APP_START)) { + define symbol MBED_APP_START = MBED_ROM_START; +} + +if (!isdefinedsymbol(MBED_APP_SIZE)) { + define symbol MBED_APP_SIZE = MBED_ROM_SIZE; +} + if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_BOOT_STACK_SIZE = 0x400; } -define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; -define symbol __ICFEDIT_size_heap__ = 0x1400; -/**** End of ICF editor section. ###ICF###*/ + +/* Round up VECTORS_SIZE to 8 bytes */ +define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7; +define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE; +define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE; define memory mem with size = 4G; -define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; -define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; +define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { }; +define block HEAP with alignment = 8, size = HEAP_SIZE { }; initialize by copy { readwrite }; do not initialize { section .noinit }; -place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; +place at address mem: MBED_APP_START { readonly section .intvec }; place in ROM_region { readonly }; place in RAM_region { readwrite, - block HEAP, block CSTACK }; \ No newline at end of file + block CSTACK, block HEAP }; diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h index f1334d99ec..cbf944f856 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/cmsis_nvic.h @@ -1,40 +1,39 @@ /* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2016, STMicroelectronics - * All rights reserved. + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: + *

© Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved.

* - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - */ + ****************************************************************************** +*/ #ifndef MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H -// CORE: 16 vectors (= 64 bytes from 0x00 to 0x3F) -// MCU Peripherals: 43 vectors (= 172 bytes from 0x40 to 0xEB) -// Total: 236 bytes to be reserved in RAM (see scatter file) -#define NVIC_NUM_VECTORS (16 + 43) -#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM +#if !defined(MBED_ROM_START) +#define MBED_ROM_START 0x8000000 +#endif + +#if !defined(MBED_ROM_SIZE) +#define MBED_ROM_SIZE 0x20000 // 128 KB +#endif + +#if !defined(MBED_RAM_START) +#define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) +#define MBED_RAM_SIZE 0x5000 // 20 KB +#endif + +#define NVIC_NUM_VECTORS 59 +#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START #endif diff --git a/targets/targets.json b/targets/targets.json index 78b5074bc7..15b65686cb 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1358,6 +1358,9 @@ "macro_name": "CLOCK_SOURCE" } }, + "overrides": { + "tickless-from-us-ticker": true + }, "detect_code": [ "0700" ],