diff --git a/targets/TARGET_STM/TARGET_STM32L4/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/PeripheralNames.h
new file mode 100644
index 0000000000..0b4fbc3de6
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32L4/PeripheralNames.h
@@ -0,0 +1,149 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2016-2020 STMicroelectronics
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALNAMES_H
+#define MBED_PERIPHERALNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+ ADC_1 = (int)ADC1_BASE,
+#if defined ADC2_BASE
+ ADC_2 = (int)ADC2_BASE,
+#endif
+#if defined ADC3_BASE
+ ADC_3 = (int)ADC3_BASE,
+#endif
+} ADCName;
+
+#if defined DAC_BASE
+typedef enum {
+ DAC_1 = (int)DAC_BASE,
+} DACName;
+#endif
+
+typedef enum {
+ UART_1 = (int)USART1_BASE,
+ UART_2 = (int)USART2_BASE,
+#if defined USART3_BASE
+ UART_3 = (int)USART3_BASE,
+#endif
+#if defined UART4_BASE
+ UART_4 = (int)UART4_BASE,
+#endif
+#if defined UART5_BASE
+ UART_5 = (int)UART5_BASE,
+#endif
+ LPUART_1 = (int)LPUART1_BASE,
+} UARTName;
+
+#define DEVICE_SPI_COUNT 3
+typedef enum {
+ SPI_1 = (int)SPI1_BASE,
+#if defined SPI2_BASE
+ SPI_2 = (int)SPI2_BASE,
+#endif
+#if defined SPI3_BASE
+ SPI_3 = (int)SPI3_BASE,
+#endif
+} SPIName;
+
+typedef enum {
+ I2C_1 = (int)I2C1_BASE,
+#if defined I2C2_BASE
+ I2C_2 = (int)I2C2_BASE,
+#endif
+ I2C_3 = (int)I2C3_BASE,
+#if defined I2C4_BASE
+ I2C_4 = (int)I2C4_BASE,
+#endif
+} I2CName;
+
+typedef enum {
+ PWM_1 = (int)TIM1_BASE,
+ PWM_2 = (int)TIM2_BASE,
+#if defined TIM3_BASE
+ PWM_3 = (int)TIM3_BASE,
+#endif
+#if defined TIM4_BASE
+ PWM_4 = (int)TIM4_BASE,
+#endif
+#if defined TIM5_BASE
+ PWM_5 = (int)TIM5_BASE,
+#endif
+#if defined TIM8_BASE
+ PWM_8 = (int)TIM8_BASE,
+#endif
+ PWM_15 = (int)TIM15_BASE,
+ PWM_16 = (int)TIM16_BASE,
+#if defined TIM17_BASE
+ PWM_17 = (int)TIM17_BASE,
+#endif
+} PWMName;
+
+#if defined CAN1_BASE
+typedef enum {
+ CAN_1 = (int)CAN1_BASE,
+#if defined CAN2_BASE
+ CAN_2 = (int)CAN2_BASE,
+#endif
+} CANName;
+#endif
+
+#if defined QSPI_R_BASE || defined OCTOSPI1_R_BASE
+typedef enum {
+#if defined QSPI_R_BASE
+ QSPI_1 = (int)QSPI_R_BASE,
+#endif
+#if defined OCTOSPI1_R_BASE
+ QSPI_1 = (int)OCTOSPI1_R_BASE,
+#endif
+#if defined OCTOSPI2_R_BASE
+ QSPI_2 = (int)OCTOSPI2_R_BASE,
+#endif
+} QSPIName;
+#endif
+
+#if defined OCTOSPI1_R_BASE
+typedef enum {
+ OSPI_1 = (int)OCTOSPI1_R_BASE,
+#if defined OCTOSPI2_R_BASE
+ OSPI_2 = (int)OCTOSPI2_R_BASE,
+#endif
+} OSPIName;
+#endif
+
+#if defined USB_OTG_FS_PERIPH_BASE || defined USB_BASE
+typedef enum {
+#if defined USB_OTG_FS_PERIPH_BASE
+ USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
+#endif
+#if defined USB_BASE
+ USB_FS = (int)USB_BASE,
+#endif
+} USBName;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/PeripheralNames.h
deleted file mode 100644
index 6c9faa044f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/PeripheralNames.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 2
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE,
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/system_clock.c
index b4e6e820aa..1be745bd94 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/system_clock.c
@@ -46,13 +46,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -123,7 +116,7 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/us_ticker_data.h
deleted file mode 100644
index 773ae5d6bc..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM2
-#define TIM_MST_IRQ TIM2_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM2()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/PeripheralNames.h
deleted file mode 100644
index 7a6fc107bb..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/PeripheralNames.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_6 = (int)TIM6_BASE,
- PWM_7 = (int)TIM7_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE,
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/system_clock.c
index b4e6e820aa..1be745bd94 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/system_clock.c
@@ -46,13 +46,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -123,7 +116,7 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/PeripheralNames.h
deleted file mode 100644
index fbb643a470..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/PeripheralNames.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_6 = (int)TIM6_BASE,
- PWM_7 = (int)TIM7_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/cmsis_nvic.h
index 14a510bf42..b2290b8738 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 83 vectors = 332 bytes from 0x40 to 0x18B
-// Total: 99 vectors = 396 bytes (0x18C) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x40000 // 256 KB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0xc000 // 48 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x4000 // 16 KB
+#endif
+
#define NVIC_NUM_VECTORS 99
-#define NVIC_RAM_VECTOR_ADDRESS SRAM2_BASE // Vectors positioned at start of SRAM1
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/system_clock.c
index 94946fb792..370d838335 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/system_clock.c
@@ -46,13 +46,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -123,7 +116,7 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/us_ticker_data.h
deleted file mode 100644
index 773ae5d6bc..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L443xC/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM2
-#define TIM_MST_IRQ TIM2_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM2()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/PeripheralNames.h
deleted file mode 100644
index bcd9512356..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/PeripheralNames.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE,
- I2C_4 = (int)I2C4_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE, // TIM2 used by usticker
- PWM_3 = (int)TIM3_BASE,
- PWM_6 = (int)TIM6_BASE,
-// PWM_7 = (int)TIM7_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE,
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/system_clock.c
index b4e6e820aa..6eb9dfb5da 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/system_clock.c
@@ -26,7 +26,7 @@
*
* This file configures the system clock as follows:
*=============================================================================
- * System clock source | 1- PLL_HSE_EXTC | 3- PLL_HSI
+ * System clock source s | 1- PLL_HSE_EXTC | 3- PLL_HSI
* | (external 8 MHz clock) | (internal 16 MHz)
* | 2- PLL_HSE_XTAL | or PLL_MSI
* | (external 8 MHz xtal) | (internal 4 MHz)
@@ -46,13 +46,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -123,30 +116,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -184,12 +166,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
if (bypass == 0) {
@@ -213,14 +189,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -259,12 +229,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/us_ticker_data.h
deleted file mode 100644
index 773ae5d6bc..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L452xE/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM2
-#define TIM_MST_IRQ TIM2_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM2()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/PeripheralNames.h
deleted file mode 100644
index 14c683afd7..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/PeripheralNames.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define STDIO_UART_TX PB_6
-#define STDIO_UART_RX PB_7
-#define STDIO_UART UART_1
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/PinNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/PinNames.h
index e03192cf7a..85c0bb0fe8 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/PinNames.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/PinNames.h
@@ -217,6 +217,8 @@ typedef enum {
// 40 pin USB debug port
USBTX = PB_6,
USBRX = PB_7,
+ STDIO_UART_TX = PB_6,
+ STDIO_UART_RX = PB_7,
//UARTS
UART3_TX = PD_2,
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/us_ticker_data.h
deleted file mode 100644
index 57366ffb1b..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/TARGET_MTS_DRAGONFLY_L471QG/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-#define HAL_TICK_DELAY (1000) // 1 ms
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/cmsis_nvic.h
index abb7956a00..32c9cfee9a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/cmsis_nvic.h
@@ -1,40 +1,47 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ * @attention
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * © Copyright (c) 2016-2020 STMicroelectronics.
+ * All rights reserved.
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ * opensource.org/licenses/BSD-3-Clause
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
+ ******************************************************************************
+*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
-// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
-// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to 0x187
-// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
+#if !defined(MBED_ROM_START)
+#define MBED_ROM_START 0x8000000
+#endif
+
+#if !defined(MBED_ROM_SIZE)
+#define MBED_ROM_SIZE 0x100000 // 1.0 MB
+#endif
+
+#if !defined(MBED_RAM_START)
+#define MBED_RAM_START 0x20000000
+#endif
+
+#if !defined(MBED_RAM_SIZE)
+#define MBED_RAM_SIZE 0x18000 // 96 KB
+#endif
+
+#if !defined(MBED_RAM1_START)
+#define MBED_RAM1_START 0x10000000
+#endif
+
+#if !defined(MBED_RAM1_SIZE)
+#define MBED_RAM1_SIZE 0x8000 // 32 KB
+#endif
+
#define NVIC_NUM_VECTORS 98
-#define NVIC_RAM_VECTOR_ADDRESS 0x10000000 // Vectors positioned at start of SRAM2
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM1_START
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/system_clock.c
index b35d48cff6..035cf15207 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L471xG/system_clock.c
@@ -32,14 +32,7 @@
**/
#include "stm32l4xx.h"
-#include "mbed_assert.h"
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
+#include "mbed_error.h"
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
@@ -85,7 +78,7 @@ void SetSysClock(void)
{
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/* 3- If fail start with HSI clock */
- if (SetSysClock_PLL_HSI()==0)
+ if (SetSysClock_PLL_HSI() == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_MSI)
@@ -93,8 +86,8 @@ void SetSysClock(void)
if (SetSysClock_PLL_MSI() == 0)
#endif
{
- while(1) {
- MBED_ASSERT(1);
+ {
+ error("SetSysClock failed\n");
}
}
}
@@ -111,30 +104,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -157,6 +139,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
return 0; // FAIL
}
+#if DEVICE_USBDEVICE
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
@@ -169,19 +152,15 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
-
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#endif /* DEVICE_USBDEVICE */
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
- if (bypass == 0)
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
- else
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
+ if (bypass == 0) {
+ HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
+ } else {
+ HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
+ }
#endif
return 1; // OK
@@ -198,14 +177,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -229,6 +202,7 @@ uint8_t SetSysClock_PLL_HSI(void)
return 0; // FAIL
}
+#if DEVICE_USBDEVICE
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
@@ -241,12 +215,7 @@ uint8_t SetSysClock_PLL_HSI(void)
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
-
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#endif /* DEVICE_USBDEVICE */
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
@@ -267,15 +236,19 @@ uint8_t SetSysClock_PLL_MSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+#if MBED_CONF_TARGET_LSE_AVAILABLE
// Enable LSE Oscillator to automatically calibrate the MSI clock
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
- RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ return 0; // FAIL
}
+ /* Enable the CSS interrupt in case LSE signal is corrupted or not present */
HAL_RCCEx_DisableLSECSS();
+#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
+
/* Enable MSI Oscillator and activate PLL with MSI as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -294,8 +267,18 @@ uint8_t SetSysClock_PLL_MSI(void)
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
+
+#if MBED_CONF_TARGET_LSE_AVAILABLE
/* Enable MSI Auto-calibration through LSE */
HAL_RCCEx_EnableMSIPLLMode();
+#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
+
+#if DEVICE_USBDEVICE
+ /* Select MSI output as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+#endif /* DEVICE_USBDEVICE */
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/PeripheralNames.h
deleted file mode 100644
index d1d9b09184..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/PeripheralNames.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2017, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE,
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h
deleted file mode 100644
index e68c4eb619..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2017, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/system_clock.c
index 64ac661654..035cf15207 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/system_clock.c
@@ -34,13 +34,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -111,30 +104,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -172,12 +154,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
if (bypass == 0) {
@@ -201,14 +177,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -247,12 +217,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/us_ticker_data.h
deleted file mode 100644
index 710c33242b..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/PeripheralNames.h
deleted file mode 100644
index 12530f94a3..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/PeripheralNames.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c
deleted file mode 100644
index 789d00cd82..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_clock.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/* mbed Microcontroller Library
-* Copyright (c) 2006-2017 ARM Limited
-* SPDX-License-Identifier: Apache-2.0
-*
-* Licensed under the Apache License, Version 2.0 (the "License");
-* you may not use this file except in compliance with the License.
-* You may obtain a copy of the License at
-*
-* http://www.apache.org/licenses/LICENSE-2.0
-*
-* Unless required by applicable law or agreed to in writing, software
-* distributed under the License is distributed on an "AS IS" BASIS,
-* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-* See the License for the specific language governing permissions and
-* limitations under the License.
-*/
-
-/**
- * This file configures the system clock as follows:
- *-----------------------------------------------------------------------------
- * System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
- * | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
- * | 3- USE_PLL_HSI (internal 16 MHz)
- * | 4- USE_PLL_MSI (internal 100kHz to 48 MHz)
- *-----------------------------------------------------------------------------
- * SYSCLK(MHz) | 80
- * AHBCLK (MHz) | 80
- * APB1CLK (MHz) | 80
- * APB2CLK (MHz) | 80
- * USB capable | YES
- *-----------------------------------------------------------------------------
-**/
-
-#include "stm32l4xx.h"
-#include "mbed_error.h"
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
-// clock source is selected with CLOCK_SOURCE in json config
-#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
-#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
-#define USE_PLL_HSI 0x2 // Use HSI internal clock
-#define USE_PLL_MSI 0x1 // Use MSI internal clock
-
-#define DEBUG_MCO (0) // Output the MCO on PA8 for debugging (0=OFF, 1=SYSCLK, 2=HSE, 3=HSI, 4=MSI)
-
-#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
-#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
-
-#if ((CLOCK_SOURCE) & USE_PLL_HSI)
-uint8_t SetSysClock_PLL_HSI(void);
-#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
-
-#if ((CLOCK_SOURCE) & USE_PLL_MSI)
-uint8_t SetSysClock_PLL_MSI(void);
-#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
-
-
-/**
- * @brief Configures the System clock source, PLL Multiplier and Divider factors,
- * AHB/APBx prescalers and Flash settings
- * @note This function should be called only once the RCC clock configuration
- * is reset to the default reset state (done in SystemInit() function).
- * @param None
- * @retval None
- */
-
-void SetSysClock(void)
-{
-#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
- /* 1- Try to start with HSE and external clock */
- if (SetSysClock_PLL_HSE(1) == 0)
-#endif
- {
-#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
- /* 2- If fail try to start with HSE and external xtal */
- if (SetSysClock_PLL_HSE(0) == 0)
-#endif
- {
-#if ((CLOCK_SOURCE) & USE_PLL_HSI)
- /* 3- If fail start with HSI clock */
- if (SetSysClock_PLL_HSI() == 0)
-#endif
- {
-#if ((CLOCK_SOURCE) & USE_PLL_MSI)
- /* 4- If fail start with MSI clock */
- if (SetSysClock_PLL_MSI() == 0)
-#endif
- {
- {
- error("SetSysClock failed\n");
- }
- }
- }
- }
- }
-
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 1
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
-#endif
-}
-
-#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
-/******************************************************************************/
-/* PLL (clocked by HSE) used as System clock source */
-/******************************************************************************/
-MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
-
- // Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- if (bypass == 0) {
- RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
- } else {
- RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
- }
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
- RCC_OscInitStruct.PLL.PLLN = 20; // VCO output clock = 160 MHz (8 MHz * 20)
- RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 22 MHz (160 MHz / 7)
- RCC_OscInitStruct.PLL.PLLQ = 2;
- RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 80 MHz (160 MHz / 2)
-
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
-
- // Select PLL clock as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz or 48 MHz
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz or 48 MHz
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz or 48 MHz
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz or 48 MHz
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
- return 0; // FAIL
- }
-
-#if DEVICE_USBDEVICE
- RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
- RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1N = 12;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
- if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
- return 0; // FAIL
- }
-#endif /* DEVICE_USBDEVICE */
-
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 2
- if (bypass == 0) {
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz
- } else {
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz
- }
-#endif
-
- return 1; // OK
-}
-#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
-
-#if ((CLOCK_SOURCE) & USE_PLL_HSI)
-/******************************************************************************/
-/* PLL (clocked by HSI) used as System clock source */
-/******************************************************************************/
-uint8_t SetSysClock_PLL_HSI(void)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
-
- // Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
- RCC_OscInitStruct.HSIState = RCC_HSI_ON;
- RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // 16 MHz
- RCC_OscInitStruct.PLL.PLLM = 2; // VCO input clock = 8 MHz (16 MHz / 2)
- RCC_OscInitStruct.PLL.PLLN = 20; // VCO output clock = 160 MHz (8 MHz * 20)
- RCC_OscInitStruct.PLL.PLLP = 7; // PLLSAI3 clock = 22 MHz (160 MHz / 7)
- RCC_OscInitStruct.PLL.PLLQ = 2;
- RCC_OscInitStruct.PLL.PLLR = 2; // PLL clock = 80 MHz (160 MHz / 2)
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
-
- // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
- return 0; // FAIL
- }
-
-#if DEVICE_USBDEVICE
- RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
- RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1M = 2;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1N = 12;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
- RCC_PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK;
- if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
- return 0; // FAIL
- }
-#endif /* DEVICE_USBDEVICE */
-
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 3
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
-#endif
-
- return 1; // OK
-}
-#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
-
-#if ((CLOCK_SOURCE) & USE_PLL_MSI)
-/******************************************************************************/
-/* PLL (clocked by MSI) used as System clock source */
-/******************************************************************************/
-uint8_t SetSysClock_PLL_MSI(void)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
-#if MBED_CONF_TARGET_LSE_AVAILABLE
- // Enable LSE Oscillator to automatically calibrate the MSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
-
- /* Enable the CSS interrupt in case LSE signal is corrupted or not present */
- HAL_RCCEx_DisableLSECSS();
-#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
-
- /* Enable MSI Oscillator and activate PLL with MSI as source */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.MSIState = RCC_MSI_ON;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
-
- RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; /* 48 MHz */
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
- RCC_OscInitStruct.PLL.PLLM = 6; /* 8 MHz */
- RCC_OscInitStruct.PLL.PLLN = 40; /* 320 MHz */
- RCC_OscInitStruct.PLL.PLLP = 7; /* 45 MHz */
- RCC_OscInitStruct.PLL.PLLQ = 4; /* 80 MHz */
- RCC_OscInitStruct.PLL.PLLR = 4; /* 80 MHz */
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
-
-#if MBED_CONF_TARGET_LSE_AVAILABLE
- /* Enable MSI Auto-calibration through LSE */
- HAL_RCCEx_EnableMSIPLLMode();
-#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
-
-#if DEVICE_USBDEVICE
- /* Select MSI output as USB clock source */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
- HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-#endif /* DEVICE_USBDEVICE */
-
- // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* 80 MHz */
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* 80 MHz */
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; /* 80 MHz */
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
- return 0; // FAIL
- }
-
- // Output clock on MCO1 pin(PA8) for debugging purpose
-#if DEBUG_MCO == 4
- HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_2); // 2 MHz
-#endif
-
- return 1; // OK
-}
-#endif /* ((CLOCK_SOURCE) & USE_PLL_MSI) */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/system_clock.c
index 64ac661654..035cf15207 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/system_clock.c
@@ -34,13 +34,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -111,30 +104,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -172,12 +154,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
if (bypass == 0) {
@@ -201,14 +177,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -247,12 +217,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/us_ticker_data.h
deleted file mode 100644
index 710c33242b..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/PeripheralNames.h
deleted file mode 100644
index 08e8595d82..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/PeripheralNames.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/system_clock.c
index 8ce0444ea3..6e9d7cb5cc 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_ADV_WISE_1570/system_clock.c
@@ -34,13 +34,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -111,32 +104,20 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- //RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -159,7 +140,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
return 0; // FAIL
}
-#if 0
+#if DEVICE_USBDEVICE
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
@@ -172,7 +153,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
-#endif
+#endif /* DEVICE_USBDEVICE */
// Select LSE output as LPUART1 clock source
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC | RCC_PERIPHCLK_LPUART1;
@@ -182,12 +163,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
return 0; // FAIL
}
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
if (bypass == 0) {
@@ -211,14 +186,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -242,6 +211,7 @@ uint8_t SetSysClock_PLL_HSI(void)
return 0; // FAIL
}
+#if DEVICE_USBDEVICE
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
@@ -254,12 +224,7 @@ uint8_t SetSysClock_PLL_HSI(void)
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
-
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#endif /* DEVICE_USBDEVICE */
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
@@ -317,10 +282,13 @@ uint8_t SetSysClock_PLL_MSI(void)
HAL_RCCEx_EnableMSIPLLMode();
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
+#if DEVICE_USBDEVICE
/* Select MSI output as USB clock source */
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+#endif /* DEVICE_USBDEVICE */
+
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h
deleted file mode 100644
index 12530f94a3..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/PeripheralNames.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c
index 64ac661654..035cf15207 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/TARGET_NUCLEO_L486RG/system_clock.c
@@ -34,13 +34,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -111,30 +104,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -172,12 +154,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 2
if (bypass == 0) {
@@ -201,14 +177,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -247,12 +217,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
// Output clock on MCO1 pin(PA8) for debugging purpose
#if DEBUG_MCO == 3
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/us_ticker_data.h
deleted file mode 100644
index 710c33242b..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/us_ticker_data.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/PeripheralNames.h
deleted file mode 100644
index 3a39137a25..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/PeripheralNames.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2017, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE,
- ADC_2 = (int)ADC2_BASE,
- ADC_3 = (int)ADC3_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE,
- I2C_4 = (int)I2C4_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE,
- CAN_2 = (int)CAN2_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)QSPI_R_BASE
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/objects.h
deleted file mode 100644
index ece5f1679f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/system_clock.c
index 7a3e731fdd..8a2da99f04 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/system_clock.c
@@ -34,13 +34,6 @@
#include "stm32l4xx.h"
#include "mbed_error.h"
-/*!< Uncomment the following line if you need to relocate your vector Table in
- Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
- This value must be a multiple of 0x200. */
-
-
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
@@ -111,30 +104,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -151,7 +133,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 80 MHz
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 80 MHz
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* 80 MHz */
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 80 MHz
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 80 MHz
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
@@ -172,12 +154,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
/* Select HSI as clock source for LPUART1 */
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
@@ -208,14 +184,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -254,12 +224,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
/* Select HSI as clock source for LPUART1 */
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
RCC_PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_HSI;
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/us_ticker_data.h
deleted file mode 100644
index 8facf2388f..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/us_ticker_data.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
-
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/PeripheralNames.h
deleted file mode 100644
index 65e8740592..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/PeripheralNames.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2018, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE,
- I2C_4 = (int)I2C4_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)OCTOSPI1_R_BASE,
- QSPI_2 = (int)OCTOSPI2_R_BASE
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/objects.h
deleted file mode 100644
index 73fa8c7405..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/objects.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/system_clock.c
index 238182fd63..50067f2db6 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/system_clock.c
@@ -33,7 +33,7 @@
**/
#include "stm32l4xx.h"
-#include "mbed_assert.h"
+#include "mbed_error.h"
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
@@ -84,8 +84,8 @@ void SetSysClock(void)
if (SetSysClock_PLL_MSI() == 0)
#endif
{
- while (1) {
- MBED_ASSERT(1);
+ {
+ error("SetSysClock failed\n");
}
}
}
@@ -97,30 +97,19 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
- }
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -158,12 +147,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -178,14 +161,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -224,12 +201,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
@@ -244,15 +215,19 @@ uint8_t SetSysClock_PLL_MSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+#if MBED_CONF_TARGET_LSE_AVAILABLE
// Enable LSE Oscillator to automatically calibrate the MSI clock
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
- RCC->CR |= RCC_CR_MSIPLLEN; // Enable MSI PLL-mode
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ return 0; // FAIL
}
+ /* Enable the CSS interrupt in case LSE signal is corrupted or not present */
HAL_RCCEx_DisableLSECSS();
+#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
+
/* Enable MSI Oscillator and activate PLL with MSI as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
@@ -270,8 +245,11 @@ uint8_t SetSysClock_PLL_MSI(void)
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
+
+#if MBED_CONF_TARGET_LSE_AVAILABLE
/* Enable MSI Auto-calibration through LSE */
HAL_RCCEx_EnableMSIPLLMode();
+#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
#if DEVICE_USBDEVICE
/* Select MSI output as USB clock source */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/us_ticker_data.h
deleted file mode 100644
index 05da9db174..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/us_ticker_data.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/PeripheralNames.h
deleted file mode 100644
index 3cd14c5c9a..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/PeripheralNames.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2018, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE,
- I2C_4 = (int)I2C4_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)OCTOSPI1_R_BASE,
- QSPI_2 = (int)OCTOSPI2_R_BASE
-} QSPIName;
-
-typedef enum {
- OSPI_1 = (int)OCTOSPI1_R_BASE,
- OSPI_2 = (int)OCTOSPI2_R_BASE
-} OSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/objects.h
deleted file mode 100644
index 69fe798e2d..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/objects.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2019, STMicroelectronics
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
- */
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/system_clock.c
index a75942ba5f..1e5d827243 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/system_clock.c
@@ -33,7 +33,7 @@
**/
#include "stm32l4xx.h"
-#include "mbed_assert.h"
+#include "mbed_error.h"
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
@@ -84,8 +84,8 @@ void SetSysClock(void)
if (SetSysClock_PLL_MSI() == 0)
#endif
{
- while (1) {
- MBED_ASSERT(1);
+ {
+ error("SetSysClock failed\n");
}
}
}
@@ -97,24 +97,23 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) {
return 0; // FAIL
}
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 16 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 16 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
#if DEVICE_USBDEVICE
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
#else
@@ -133,9 +132,9 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#if DEVICE_USBDEVICE
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkIniRCC_PeriphClkInittStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
+ if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
#endif /* DEVICE_USBDEVICE */
@@ -162,18 +161,10 @@ uint8_t SetSysClock_PLL_HSI(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
- return 0; // FAIL
- }
+ RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
#if DEVICE_USBDEVICE
@@ -193,9 +184,9 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#if DEVICE_USBDEVICE
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; /* 48 MHz */
+ if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
return 0; // FAIL
}
#endif /* DEVICE_USBDEVICE */
@@ -210,14 +201,6 @@ uint8_t SetSysClock_PLL_HSI(void)
return 0; // FAIL
}
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- return 0; // FAIL
- }
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/us_ticker_data.h
deleted file mode 100644
index 05da9db174..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R9xI/us_ticker_data.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/PeripheralNames.h
deleted file mode 100644
index fabbf827a4..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/PeripheralNames.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* mbed Microcontroller Library
- * SPDX-License-Identifier: BSD-3-Clause
- ******************************************************************************
- *
- * Copyright (c) 2016-2020 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- *
- *
- */
-#ifndef MBED_PERIPHERALNAMES_H
-#define MBED_PERIPHERALNAMES_H
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef enum {
- ADC_1 = (int)ADC1_BASE
-} ADCName;
-
-typedef enum {
- DAC_1 = (int)DAC_BASE
-} DACName;
-
-typedef enum {
- UART_1 = (int)USART1_BASE,
- UART_2 = (int)USART2_BASE,
- UART_3 = (int)USART3_BASE,
- UART_4 = (int)UART4_BASE,
- UART_5 = (int)UART5_BASE,
- LPUART_1 = (int)LPUART1_BASE
-} UARTName;
-
-#define DEVICE_SPI_COUNT 3
-typedef enum {
- SPI_1 = (int)SPI1_BASE,
- SPI_2 = (int)SPI2_BASE,
- SPI_3 = (int)SPI3_BASE
-} SPIName;
-
-typedef enum {
- I2C_1 = (int)I2C1_BASE,
- I2C_2 = (int)I2C2_BASE,
- I2C_3 = (int)I2C3_BASE,
- I2C_4 = (int)I2C4_BASE
-} I2CName;
-
-typedef enum {
- PWM_1 = (int)TIM1_BASE,
- PWM_2 = (int)TIM2_BASE,
- PWM_3 = (int)TIM3_BASE,
- PWM_4 = (int)TIM4_BASE,
- PWM_5 = (int)TIM5_BASE,
- PWM_8 = (int)TIM8_BASE,
- PWM_15 = (int)TIM15_BASE,
- PWM_16 = (int)TIM16_BASE,
- PWM_17 = (int)TIM17_BASE
-} PWMName;
-
-typedef enum {
- CAN_1 = (int)CAN1_BASE
-} CANName;
-
-typedef enum {
- QSPI_1 = (int)OCTOSPI1_R_BASE,
- QSPI_2 = (int)OCTOSPI2_R_BASE
-} QSPIName;
-
-typedef enum {
- USB_FS = (int)USB_OTG_FS_PERIPH_BASE,
-} USBName;
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/objects.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/objects.h
deleted file mode 100644
index 6236744d1a..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/objects.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* mbed Microcontroller Library
- * SPDX-License-Identifier: BSD-3-Clause
- ******************************************************************************
- *
- * Copyright (c) 2016-2020 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-#ifndef MBED_OBJECTS_H
-#define MBED_OBJECTS_H
-
-#include "cmsis.h"
-#include "PortNames.h"
-#include "PeripheralNames.h"
-#include "PinNames.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-struct gpio_irq_s {
- IRQn_Type irq_n;
- uint32_t irq_index;
- uint32_t event;
- PinName pin;
-};
-
-struct port_s {
- PortName port;
- uint32_t mask;
- PinDirection direction;
- __IO uint32_t *reg_in;
- __IO uint32_t *reg_out;
-};
-
-struct trng_s {
- RNG_HandleTypeDef handle;
-};
-
-#include "common_objects.h"
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/system_clock.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/system_clock.c
index 9ae7682d43..0e4a33b47a 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/system_clock.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/system_clock.c
@@ -31,7 +31,7 @@
**/
#include "stm32l4xx.h"
-#include "mbed_assert.h"
+#include "mbed_error.h"
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO - not enabled by default)
@@ -82,8 +82,8 @@ void SetSysClock(void)
if (SetSysClock_PLL_MSI() == 0)
#endif
{
- while (1) {
- MBED_ASSERT(1);
+ {
+ error("SetSysClock failed\n");
}
}
}
@@ -95,30 +95,23 @@ void SetSysClock(void)
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
-uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
+MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Used to gain time after DeepSleep in case HSI is used
- if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) {
- return 0;
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) {
+ return 0; // FAIL
}
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSE oscillator and activate PLL with HSE as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
}
- RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; // 8 MHz
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLM = 1; // VCO input clock = 8 MHz (8 MHz / 1)
@@ -156,12 +149,6 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
@@ -176,14 +163,8 @@ uint8_t SetSysClock_PLL_HSI(void)
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit = {0};
- // Select MSI as system clock source to allow modification of the PLL configuration
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
// Enable HSI oscillator and activate PLL with HSI as source
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -222,12 +203,6 @@ uint8_t SetSysClock_PLL_HSI(void)
}
#endif /* DEVICE_USBDEVICE */
- // Disable MSI Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_OFF;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // No PLL update
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/us_ticker_data.h
deleted file mode 100644
index cf5c31ec31..0000000000
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4S5xI/us_ticker_data.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* mbed Microcontroller Library
- * SPDX-License-Identifier: BSD-3-Clause
- ******************************************************************************
- *
- * Copyright (c) 2017-2020 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-#ifndef __US_TICKER_DATA_H
-#define __US_TICKER_DATA_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "stm32l4xx.h"
-#include "stm32l4xx_ll_tim.h"
-#include "cmsis_nvic.h"
-
-#define TIM_MST TIM5
-#define TIM_MST_IRQ TIM5_IRQn
-#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
-#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
-
-#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
-#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
-
-#define TIM_MST_BIT_WIDTH 32 // 16 or 32
-
-#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // __US_TICKER_DATA_H
diff --git a/targets/TARGET_STM/TARGET_STM32L4/common_objects.h b/targets/TARGET_STM/TARGET_STM32L4/objects.h
similarity index 62%
rename from targets/TARGET_STM/TARGET_STM32L4/common_objects.h
rename to targets/TARGET_STM/TARGET_STM32L4/objects.h
index f5e3f7d7df..b2c3ca7d02 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/common_objects.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/objects.h
@@ -1,39 +1,29 @@
/* mbed Microcontroller Library
- *******************************************************************************
- * Copyright (c) 2016, STMicroelectronics
- * All rights reserved.
+ * Copyright (c) 2016-2020 STMicroelectronics
+ * SPDX-License-Identifier: Apache-2.0
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
*
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
*/
-#ifndef MBED_COMMON_OBJECTS_H
-#define MBED_COMMON_OBJECTS_H
+
+#ifndef MBED_OBJECTS_H
+#define MBED_OBJECTS_H
#include "cmsis.h"
#include "PortNames.h"
#include "PeripheralNames.h"
#include "PinNames.h"
+#include "gpio_object.h"
+
#include "stm32l4xx_ll_usart.h"
#include "stm32l4xx_ll_lpuart.h"
#include "stm32l4xx_ll_tim.h"
@@ -44,6 +34,14 @@
extern "C" {
#endif
+#if DEVICE_ANALOGOUT
+struct dac_s {
+ DACName dac;
+ PinName pin;
+ uint32_t channel;
+ DAC_HandleTypeDef handle;
+};
+#endif
struct pwmout_s {
PWMName pwm;
@@ -130,18 +128,24 @@ struct analogin_s {
uint8_t channel;
};
-#include "gpio_object.h"
-
-struct dac_s {
- DACName dac;
+struct gpio_irq_s {
+ IRQn_Type irq_n;
+ uint32_t irq_index;
+ uint32_t event;
PinName pin;
- uint32_t channel;
- DAC_HandleTypeDef handle;
};
-#ifdef __cplusplus
-}
-#endif
+struct port_s {
+ PortName port;
+ uint32_t mask;
+ PinDirection direction;
+ __IO uint32_t *reg_in;
+ __IO uint32_t *reg_out;
+};
+
+struct trng_s {
+ RNG_HandleTypeDef handle;
+};
#if DEVICE_CAN
struct can_s {
@@ -188,4 +192,8 @@ struct ospi_s {
#define HAL_CRC_IS_SUPPORTED(polynomial, width) ((width) == 7 || (width) == 8 || (width) == 16 || (width) == 32)
+#ifdef __cplusplus
+}
+#endif
+
#endif
diff --git a/targets/TARGET_STM/TARGET_STM32L4/spi_api.c b/targets/TARGET_STM/TARGET_STM32L4/spi_api.c
index 8e5259e9ac..562c7ede93 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/spi_api.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/spi_api.c
@@ -60,11 +60,16 @@ int spi_get_clock_freq(spi_t *obj)
break;
#if defined(SPI2_BASE)
case SPI_2:
+ /* SPI_2, SPI_3. Source CLK is PCKL1 */
+ spi_hz = HAL_RCC_GetPCLK1Freq();
+ break;
#endif
+#if defined(SPI3_BASE)
case SPI_3:
/* SPI_2, SPI_3. Source CLK is PCKL1 */
spi_hz = HAL_RCC_GetPCLK1Freq();
break;
+#endif
default:
error("CLK: SPI instance not set");
break;
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/us_ticker_data.h b/targets/TARGET_STM/TARGET_STM32L4/us_ticker_data.h
similarity index 77%
rename from targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/us_ticker_data.h
rename to targets/TARGET_STM/TARGET_STM32L4/us_ticker_data.h
index 773ae5d6bc..42d9bad21e 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/us_ticker_data.h
+++ b/targets/TARGET_STM/TARGET_STM32L4/us_ticker_data.h
@@ -1,5 +1,5 @@
/* mbed Microcontroller Library
- * Copyright (c) 2006-2018 ARM Limited
+ * Copyright (c) 2016-2020 STMicroelectronics
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +14,7 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
+
#ifndef __US_TICKER_DATA_H
#define __US_TICKER_DATA_H
@@ -25,6 +26,18 @@
#include "stm32l4xx_ll_tim.h"
#include "cmsis_nvic.h"
+#if defined TIM5_BASE
+
+#define TIM_MST TIM5
+#define TIM_MST_IRQ TIM5_IRQn
+#define TIM_MST_RCC __HAL_RCC_TIM5_CLK_ENABLE()
+#define TIM_MST_DBGMCU_FREEZE __HAL_DBGMCU_FREEZE_TIM5()
+
+#define TIM_MST_RESET_ON __HAL_RCC_TIM5_FORCE_RESET()
+#define TIM_MST_RESET_OFF __HAL_RCC_TIM5_RELEASE_RESET()
+
+#else
+
#define TIM_MST TIM2
#define TIM_MST_IRQ TIM2_IRQn
#define TIM_MST_RCC __HAL_RCC_TIM2_CLK_ENABLE()
@@ -33,6 +46,8 @@
#define TIM_MST_RESET_ON __HAL_RCC_TIM2_FORCE_RESET()
#define TIM_MST_RESET_OFF __HAL_RCC_TIM2_RELEASE_RESET()
+#endif
+
#define TIM_MST_BIT_WIDTH 32 // 16 or 32
#define TIM_MST_PCLK 1 // Select the peripheral clock number (1 or 2)