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[NUCLEO_L152RE] Update std periph driver to V1.3.0

pull/154/head
bcostm 2014-01-30 09:53:14 +01:00
parent 6f06f6ecd2
commit 955223fd2c
53 changed files with 597 additions and 244 deletions
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6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/misc.c
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@ -2,14 +2,14 @@
******************************************************************************
* @file misc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides all the miscellaneous firmware functions (add-on
* to CMSIS functions).
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/misc.h
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@ -2,14 +2,14 @@
******************************************************************************
* @file misc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the miscellaneous
* firmware library functions (add-on to CMSIS functions).
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

366
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx.h
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@ -2,12 +2,12 @@
******************************************************************************
* @file stm32l1xx.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File.
* This file contains all the peripheral register's definitions, bits
* definitions and memory mapping for STM32L1xx High-density, Medium-density
* and Medium-density Plus devices.
* definitions and memory mapping for STM32L1xx High-density, Medium-density,
* Medium-density and XL-density Plus devices.
*
* The file is the unique include file that the application programmer
* is using in the C source code, usually in main.c. This file contains:
@ -26,7 +26,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -66,23 +66,27 @@
application
*/
#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD)
#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD) && !defined (STM32L1XX_XL)
/* #define STM32L1XX_MD */ /*!< - Ultra Low Power Medium-density devices: STM32L151x6xx, STM32L151x8xx,
STM32L151xBxx, STM32L152x6xx, STM32L152x8xx and STM32L152xBxx.
STM32L151xBxx, STM32L152x6xx, STM32L152x8xx, STM32L152xBxx,
STM32L151x6xxA, STM32L151x8xxA, STM32L151xBxxA, STM32L152x6xxA,
STM32L152x8xxA and STM32L152xBxxA.
- Ultra Low Power Medium-density Value Line devices: STM32L100x6xx,
STM32L100x8xx and STM32L100xBxx. */
//#define STM32L1XX_MDP /*!< - Ultra Low Power Medium-density Plus devices: STM32L151xCxx, STM32L152xCxx and STM32L162xCxx
// - Ultra Low Power Medium-density Plus Value Line devices: STM32L100xCxx */
/* #define STM32L1XX_MDP */ /*!< - Ultra Low Power Medium-density Plus devices: STM32L151xCxx, STM32L152xCxx and STM32L162xCxx
- Ultra Low Power Medium-density Plus Value Line devices: STM32L100xCxx */
#define STM32L1XX_HD /*!< Ultra Low Power High-density devices: STM32L151xDxx, STM32L152xDxx and STM32L162xDxx */
/* #define STM32L1XX_HD */ /*!< Ultra Low Power High-density devices: STM32L151xDxx, STM32L152xDxx and STM32L162xDxx */
#define STM32L1XX_XL /*!< Ultra Low Power XL-density devices: STM32L151xExx, STM32L152xExx and STM32L162xExx */
#endif
/* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor.
*/
#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD)
#if !defined (STM32L1XX_MD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_HD) && !defined (STM32L1XX_XL)
#error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)"
#endif
@ -111,7 +115,7 @@
Timeout value
*/
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */
#define HSE_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSE start up */
#endif
/**
@ -119,7 +123,7 @@
Timeout value
*/
#if !defined (HSI_STARTUP_TIMEOUT)
#define HSI_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSI start up */
#define HSI_STARTUP_TIMEOUT ((uint16_t)0x5000) /*!< Time out for HSI start up */
#endif
#if !defined (HSI_VALUE)
@ -139,10 +143,10 @@
#endif
/**
* @brief STM32L1xx Standard Peripheral Library version number V1.2.0
* @brief STM32L1xx Standard Peripheral Library version number V1.3.0
*/
#define __STM32L1XX_STDPERIPH_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32L1XX_STDPERIPH_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32L1XX_STDPERIPH_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
#define __STM32L1XX_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
#define __STM32L1XX_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L1XX_STDPERIPH_VERSION ( (__STM32L1XX_STDPERIPH_VERSION_MAIN << 24)\
@ -225,6 +229,7 @@ typedef enum IRQn
RTC_Alarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USB_FS_WKUP_IRQn = 42, /*!< USB FS WakeUp from suspend through EXTI Line Interrupt */
TIM6_IRQn = 43, /*!< TIM6 global Interrupt */
#ifdef STM32L1XX_MD
TIM7_IRQn = 44 /*!< TIM7 global Interrupt */
#endif /* STM32L1XX_MD */
@ -257,6 +262,21 @@ typedef enum IRQn
AES_IRQn = 55, /*!< AES global Interrupt */
COMP_ACQ_IRQn = 56 /*!< Comparator Channel Acquisition global Interrupt */
#endif /* STM32L1XX_HD */
#ifdef STM32L1XX_XL
TIM7_IRQn = 44, /*!< TIM7 global Interrupt */
TIM5_IRQn = 46, /*!< TIM5 global Interrupt */
SPI3_IRQn = 47, /*!< SPI3 global Interrupt */
UART4_IRQn = 48, /*!< UART4 global Interrupt */
UART5_IRQn = 49, /*!< UART5 global Interrupt */
DMA2_Channel1_IRQn = 50, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 51, /*!< DMA2 Channel 2 global Interrupt */
DMA2_Channel3_IRQn = 52, /*!< DMA2 Channel 3 global Interrupt */
DMA2_Channel4_IRQn = 53, /*!< DMA2 Channel 4 global Interrupt */
DMA2_Channel5_IRQn = 54, /*!< DMA2 Channel 5 global Interrupt */
AES_IRQn = 55, /*!< AES global Interrupt */
COMP_ACQ_IRQn = 56 /*!< Comparator Channel Acquisition global Interrupt */
#endif /* STM32L1XX_XL */
} IRQn_Type;
/**
@ -557,8 +577,10 @@ typedef struct
__IO uint16_t BSRRH; /*!< GPIO port bit set/reset high registerBSRR, Address offset: 0x1A */
__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
__IO uint32_t AFR[2]; /*!< GPIO alternate function low register, Address offset: 0x20-0x24 */
#if defined (STM32L1XX_HD) || defined (STM32L1XX_XL)
__IO uint16_t BRR; /*!< GPIO bit reset register, Address offset: 0x28 */
uint16_t RESERVED3; /*!< Reserved, 0x2A */
#endif
} GPIO_TypeDef;
/**
@ -663,13 +685,28 @@ typedef struct
typedef struct
{
__IO uint32_t ICR; /*!< RI input capture register, Address offset: 0x00 */
__IO uint32_t ASCR1; /*!< RI analog switches control register, Address offset: 0x04 */
__IO uint32_t ASCR2; /*!< RI analog switch control register 2, Address offset: 0x08 */
__IO uint32_t HYSCR1; /*!< RI hysteresis control register, Address offset: 0x0C */
__IO uint32_t HYSCR2; /*!< RI Hysteresis control register, Address offset: 0x10 */
__IO uint32_t HYSCR3; /*!< RI Hysteresis control register, Address offset: 0x14 */
__IO uint32_t HYSCR4; /*!< RI Hysteresis control register, Address offset: 0x18 */
__IO uint32_t ICR; /*!< RI input capture register, Address offset: 0x04 */
__IO uint32_t ASCR1; /*!< RI analog switches control register, Address offset: 0x08 */
__IO uint32_t ASCR2; /*!< RI analog switch control register 2, Address offset: 0x0C */
__IO uint32_t HYSCR1; /*!< RI hysteresis control register 1, Address offset: 0x10 */
__IO uint32_t HYSCR2; /*!< RI Hysteresis control register 2, Address offset: 0x14 */
__IO uint32_t HYSCR3; /*!< RI Hysteresis control register 3, Address offset: 0x18 */
__IO uint32_t HYSCR4; /*!< RI Hysteresis control register 4, Address offset: 0x1C */
__IO uint32_t ASMR1; /*!< RI Analog switch mode register 1, Address offset: 0x20 */
__IO uint32_t CMR1; /*!< RI Channel mask register 1, Address offset: 0x24 */
__IO uint32_t CICR1; /*!< RI Channel identification for capture register 1, Address offset: 0x28 */
__IO uint32_t ASMR2; /*!< RI Analog switch mode register 2, Address offset: 0x2C */
__IO uint32_t CMR2; /*!< RI Channel mask register 2, Address offset: 0x30 */
__IO uint32_t CICR2; /*!< RI Channel identification for capture register 2, Address offset: 0x34 */
__IO uint32_t ASMR3; /*!< RI Analog switch mode register 3, Address offset: 0x38 */
__IO uint32_t CMR3; /*!< RI Channel mask register 3, Address offset: 0x3C */
__IO uint32_t CICR3; /*!< RI Channel identification for capture register3 , Address offset: 0x40 */
__IO uint32_t ASMR4; /*!< RI Analog switch mode register 4, Address offset: 0x44 */
__IO uint32_t CMR4; /*!< RI Channel mask register 4, Address offset: 0x48 */
__IO uint32_t CICR4; /*!< RI Channel identification for capture register 4, Address offset: 0x4C */
__IO uint32_t ASMR5; /*!< RI Analog switch mode register 5, Address offset: 0x50 */
__IO uint32_t CMR5; /*!< RI Channel mask register 5, Address offset: 0x54 */
__IO uint32_t CICR5; /*!< RI Channel identification for capture register 5, Address offset: 0x58 */
} RI_TypeDef;
/**
@ -4885,6 +4922,291 @@ typedef struct
#define RI_HYSCR4_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_HYSCR4_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_ASMR1 register ********************/
#define RI_ASMR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A analog switch mode selection */
#define RI_ASMR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_ASMR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_ASMR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_ASMR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_ASMR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_ASMR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_ASMR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_ASMR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_ASMR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_ASMR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_ASMR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_ASMR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_ASMR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_ASMR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_ASMR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_ASMR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CMR1 register ********************/
#define RI_CMR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A channel masking */
#define RI_CMR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CMR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CMR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CMR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CMR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CMR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CMR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CMR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CMR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CMR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CMR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CMR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CMR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CMR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CMR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CMR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CICR1 register ********************/
#define RI_CICR1_PA ((uint32_t)0x0000FFFF) /*!< PA[15:0] Port A channel identification for capture */
#define RI_CICR1_PA_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CICR1_PA_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CICR1_PA_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CICR1_PA_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CICR1_PA_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CICR1_PA_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CICR1_PA_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CICR1_PA_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CICR1_PA_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CICR1_PA_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CICR1_PA_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CICR1_PA_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CICR1_PA_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CICR1_PA_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CICR1_PA_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CICR1_PA_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_ASMR2 register ********************/
#define RI_ASMR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B analog switch mode selection */
#define RI_ASMR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_ASMR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_ASMR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_ASMR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_ASMR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_ASMR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_ASMR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_ASMR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_ASMR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_ASMR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_ASMR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_ASMR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_ASMR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_ASMR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_ASMR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_ASMR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CMR2 register ********************/
#define RI_CMR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B channel masking */
#define RI_CMR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CMR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CMR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CMR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CMR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CMR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CMR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CMR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CMR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CMR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CMR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CMR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CMR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CMR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CMR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CMR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CICR2 register ********************/
#define RI_CICR2_PB ((uint32_t)0x0000FFFF) /*!< PB[15:0] Port B channel identification for capture */
#define RI_CICR2_PB_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CICR2_PB_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CICR2_PB_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CICR2_PB_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CICR2_PB_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CICR2_PB_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CICR2_PB_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CICR2_PB_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CICR2_PB_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CICR2_PB_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CICR2_PB_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CICR2_PB_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CICR2_PB_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CICR2_PB_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CICR2_PB_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CICR2_PB_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_ASMR3 register ********************/
#define RI_ASMR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C analog switch mode selection */
#define RI_ASMR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_ASMR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_ASMR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_ASMR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_ASMR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_ASMR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_ASMR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_ASMR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_ASMR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_ASMR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_ASMR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_ASMR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_ASMR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_ASMR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_ASMR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_ASMR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CMR3 register ********************/
#define RI_CMR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C channel masking */
#define RI_CMR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CMR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CMR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CMR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CMR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CMR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CMR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CMR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CMR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CMR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CMR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CMR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CMR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CMR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CMR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CMR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CICR3 register ********************/
#define RI_CICR3_PC ((uint32_t)0x0000FFFF) /*!< PC[15:0] Port C channel identification for capture */
#define RI_CICR3_PC_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CICR3_PC_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CICR3_PC_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CICR3_PC_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CICR3_PC_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CICR3_PC_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CICR3_PC_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CICR3_PC_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CICR3_PC_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CICR3_PC_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CICR3_PC_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CICR3_PC_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CICR3_PC_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CICR3_PC_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CICR3_PC_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CICR3_PC_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_ASMR4 register ********************/
#define RI_ASMR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F analog switch mode selection */
#define RI_ASMR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_ASMR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_ASMR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_ASMR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_ASMR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_ASMR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_ASMR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_ASMR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_ASMR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_ASMR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_ASMR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_ASMR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_ASMR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_ASMR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_ASMR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_ASMR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CMR4 register ********************/
#define RI_CMR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F channel masking */
#define RI_CMR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CMR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CMR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CMR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CMR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CMR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CMR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CMR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CMR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CMR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CMR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CMR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CMR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CMR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CMR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CMR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CICR4 register ********************/
#define RI_CICR4_PF ((uint32_t)0x0000FFFF) /*!< PF[15:0] Port F channel identification for capture */
#define RI_CICR4_PF_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CICR4_PF_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CICR4_PF_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CICR4_PF_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CICR4_PF_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CICR4_PF_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CICR4_PF_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CICR4_PF_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CICR4_PF_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CICR4_PF_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CICR4_PF_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CICR4_PF_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CICR4_PF_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CICR4_PF_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CICR4_PF_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CICR4_PF_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_ASMR5 register ********************/
#define RI_ASMR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G analog switch mode selection */
#define RI_ASMR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_ASMR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_ASMR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_ASMR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_ASMR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_ASMR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_ASMR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_ASMR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_ASMR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_ASMR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_ASMR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_ASMR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_ASMR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_ASMR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_ASMR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_ASMR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CMR5 register ********************/
#define RI_CMR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G channel masking */
#define RI_CMR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CMR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CMR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CMR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CMR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CMR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CMR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CMR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CMR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CMR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CMR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CMR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CMR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CMR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CMR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CMR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************** Bit definition for RI_CICR5 register ********************/
#define RI_CICR5_PG ((uint32_t)0x0000FFFF) /*!< PG[15:0] Port G channel identification for capture */
#define RI_CICR5_PG_0 ((uint32_t)0x00000001) /*!< Bit 0 */
#define RI_CICR5_PG_1 ((uint32_t)0x00000002) /*!< Bit 1 */
#define RI_CICR5_PG_2 ((uint32_t)0x00000004) /*!< Bit 2 */
#define RI_CICR5_PG_3 ((uint32_t)0x00000008) /*!< Bit 3 */
#define RI_CICR5_PG_4 ((uint32_t)0x00000010) /*!< Bit 4 */
#define RI_CICR5_PG_5 ((uint32_t)0x00000020) /*!< Bit 5 */
#define RI_CICR5_PG_6 ((uint32_t)0x00000040) /*!< Bit 6 */
#define RI_CICR5_PG_7 ((uint32_t)0x00000080) /*!< Bit 7 */
#define RI_CICR5_PG_8 ((uint32_t)0x00000100) /*!< Bit 8 */
#define RI_CICR5_PG_9 ((uint32_t)0x00000200) /*!< Bit 9 */
#define RI_CICR5_PG_10 ((uint32_t)0x00000400) /*!< Bit 10 */
#define RI_CICR5_PG_11 ((uint32_t)0x00000800) /*!< Bit 11 */
#define RI_CICR5_PG_12 ((uint32_t)0x00001000) /*!< Bit 12 */
#define RI_CICR5_PG_13 ((uint32_t)0x00002000) /*!< Bit 13 */
#define RI_CICR5_PG_14 ((uint32_t)0x00004000) /*!< Bit 14 */
#define RI_CICR5_PG_15 ((uint32_t)0x00008000) /*!< Bit 15 */
/******************************************************************************/
/* */
/* Timers (TIM) */

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_adc.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_adc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Analog to Digital Convertor (ADC) peripheral:
* + Initialization and Configuration
@ -65,7 +65,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_adc.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_adc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the ADC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_aes.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_aes.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the AES peripheral:
* + Configuration
@ -52,7 +52,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_aes.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_aes.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the AES firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_aes_util.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_aes_util.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides high level functions to encrypt and decrypt an
* input message using AES in ECB/CBC/CTR modes.
*
@ -30,7 +30,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_comp.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_comp.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the comparators (COMP1 and COMP2) peripheral:
* + Comparators configuration
@ -56,7 +56,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_comp.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_comp.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the COMP firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_crc.c
View File

@ -2,13 +2,13 @@
******************************************************************************
* @file stm32l1xx_crc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides all the CRC firmware functions.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_crc.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_crc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the CRC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dac.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_dac.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Digital-to-Analog Converter (DAC) peripheral:
* + DAC channels configuration: trigger, output buffer, data format
@ -83,7 +83,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dac.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_dac.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the DAC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dbgmcu.c
View File

@ -2,13 +2,13 @@
******************************************************************************
* @file stm32l1xx_dbgmcu.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides all the DBGMCU firmware functions.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dbgmcu.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_dbgmcu.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the DBGMCU
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dma.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_dma.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Direct Memory Access controller (DMA):
* + Initialization and Configuration
@ -52,7 +52,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_dma.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_dma.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the DMA firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_exti.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_exti.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the EXTI peripheral:
* + Initialization and Configuration
@ -45,7 +45,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_exti.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_exti.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the EXTI firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

70
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_flash.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_flash.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides all the Flash firmware functions. These functions
* can be executed from Internal FLASH or Internal SRAM memories.
* The functions that should be called from SRAM are defined inside
@ -75,7 +75,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -497,11 +497,11 @@ void DATA_EEPROM_FixedTimeProgramCmd(FunctionalState NewState)
/**
* @brief Erase a byte in data memory.
* @param Address: specifies the address to be erased.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
* density devices.
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
* STM32L1XX_XL devices.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @retval FLASH Status: The returned value can be:
@ -530,11 +530,11 @@ FLASH_Status DATA_EEPROM_EraseByte(uint32_t Address)
/**
* @brief Erase a halfword in data memory.
* @param Address: specifies the address to be erased.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
* density devices.
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
* STM32L1XX_XL devices.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @retval FLASH Status: The returned value can be:
@ -567,7 +567,7 @@ FLASH_Status DATA_EEPROM_EraseHalfWord(uint32_t Address)
* if the address to load is the start address of a word (multiple of a word).
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @retval FLASH Status: The returned value can be:
@ -597,7 +597,7 @@ FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address)
* @brief Write a Byte at a specified address in data memory.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @param Address: specifies the address to be written.
@ -609,7 +609,7 @@ FLASH_Status DATA_EEPROM_EraseWord(uint32_t Address)
FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
{
FLASH_Status status = FLASH_COMPLETE;
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
uint32_t tmp = 0, tmpaddr = 0;
#endif
@ -624,7 +624,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
/* Clear the FTDW bit */
FLASH->PECR &= (uint32_t)(~((uint32_t)FLASH_PECR_FTDW));
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
if(Data != (uint8_t)0x00)
{
/* If the previous operation is completed, proceed to write the new Data */
@ -642,7 +642,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
status = DATA_EEPROM_EraseWord(Address & 0xFFFFFFFC);
status = DATA_EEPROM_FastProgramWord((Address & 0xFFFFFFFC), tmp);
}
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
/* If the previous operation is completed, proceed to write the new Data */
*(__IO uint8_t *)Address = Data;
@ -658,7 +658,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
* @brief Writes a half word at a specified address in data memory.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @param Address: specifies the address to be written.
@ -670,7 +670,7 @@ FLASH_Status DATA_EEPROM_FastProgramByte(uint32_t Address, uint8_t Data)
FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
{
FLASH_Status status = FLASH_COMPLETE;
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
uint32_t tmp = 0, tmpaddr = 0;
#endif
@ -685,7 +685,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
/* Clear the FTDW bit */
FLASH->PECR &= (uint32_t)(~((uint32_t)FLASH_PECR_FTDW));
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
if(Data != (uint16_t)0x0000)
{
/* If the previous operation is completed, proceed to write the new data */
@ -711,7 +711,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
DATA_EEPROM_FastProgramByte(Address + 1, 0x00);
}
}
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
/* If the previous operation is completed, proceed to write the new data */
*(__IO uint16_t *)Address = Data;
@ -727,7 +727,7 @@ FLASH_Status DATA_EEPROM_FastProgramHalfWord(uint32_t Address, uint16_t Data)
* @brief Programs a word at a specified address in data memory.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to the data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @param Address: specifies the address to be written.
@ -765,7 +765,7 @@ FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data)
* @brief Write a Byte at a specified address in data memory without erase.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
@ -778,7 +778,7 @@ FLASH_Status DATA_EEPROM_FastProgramWord(uint32_t Address, uint32_t Data)
FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
{
FLASH_Status status = FLASH_COMPLETE;
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
uint32_t tmp = 0, tmpaddr = 0;
#endif
@ -790,7 +790,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
if(status == FLASH_COMPLETE)
{
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
if(Data != (uint8_t) 0x00)
{
*(__IO uint8_t *)Address = Data;
@ -808,7 +808,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
status = DATA_EEPROM_EraseWord(Address & 0xFFFFFFFC);
status = DATA_EEPROM_FastProgramWord((Address & 0xFFFFFFFC), tmp);
}
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
*(__IO uint8_t *)Address = Data;
/* Wait for last operation to be completed */
@ -823,7 +823,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
* @brief Writes a half word at a specified address in data memory without erase.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
@ -836,7 +836,7 @@ FLASH_Status DATA_EEPROM_ProgramByte(uint32_t Address, uint8_t Data)
FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
{
FLASH_Status status = FLASH_COMPLETE;
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
uint32_t tmp = 0, tmpaddr = 0;
#endif
@ -848,7 +848,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
if(status == FLASH_COMPLETE)
{
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP)
#if !defined (STM32L1XX_HD) && !defined (STM32L1XX_MDP) && !defined (STM32L1XX_XL)
if(Data != (uint16_t)0x0000)
{
*(__IO uint16_t *)Address = Data;
@ -873,7 +873,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
DATA_EEPROM_FastProgramByte(Address + 1, 0x00);
}
}
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP)
#elif defined (STM32L1XX_HD) || defined (STM32L1XX_MDP) || defined (STM32L1XX_XL)
*(__IO uint16_t *)Address = Data;
/* Wait for last operation to be completed */
@ -888,7 +888,7 @@ FLASH_Status DATA_EEPROM_ProgramHalfWord(uint32_t Address, uint16_t Data)
* @brief Programs a word at a specified address in data memory without erase.
* @note To correctly run this function, the DATA_EEPROM_Unlock() function
* must be called before.
* Call the DATA_EEPROM_Lock() to he data EEPROM access
* Call the DATA_EEPROM_Lock() to disable the data EEPROM access
* and Flash program erase control register access(recommended to protect
* the DATA_EEPROM against possible unwanted operation).
* @note The function DATA_EEPROM_FixedTimeProgramCmd() can be called before
@ -1087,8 +1087,8 @@ FLASH_Status FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
/**
* @brief Write protects the desired pages of the second 128KB of the Flash.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
* density devices.
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
* STM32L1XX_XL devices.
* @param OB_WRP1: specifies the address of the pages to be write protected.
* This parameter can be:
* @arg value between OB_WRP_Pages512to527 and OB_WRP_Pages1008to1023
@ -1146,7 +1146,7 @@ FLASH_Status FLASH_OB_WRP1Config(uint32_t OB_WRP1, FunctionalState NewState)
/**
* @brief Write protects the desired pages of the third 128KB of the Flash.
* @note This function can be used only for STM32L1XX_HD density devices.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
* @param OB_WRP2: specifies the address of the pages to be write protected.
* This parameter can be:
* @arg value between OB_WRP_Pages1024to1039 and OB_WRP_Pages1520to1535
@ -1509,7 +1509,7 @@ FLASH_Status FLASH_OB_BORConfig(uint8_t OB_BOR)
/**
* @brief Configures to boot from Bank1 or Bank2.
* @note This function can be used only for STM32L1XX_HD density devices.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
* @param OB_BOOT: select the FLASH Bank to boot from.
* This parameter can be one of the following values:
* @arg OB_BOOT_BANK2: At startup, if boot pins are set in boot from user Flash
@ -1580,8 +1580,8 @@ uint32_t FLASH_OB_GetWRP(void)
/**
* @brief Returns the FLASH Write Protection Option Bytes value.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_MDP
* density devices.
* @note This function can be used only for STM32L1XX_HD, STM32L1XX_MDP and
* STM32L1XX_XL devices.
* @param None
* @retval The FLASH Write Protection Option Bytes value.
*/
@ -1593,7 +1593,7 @@ uint32_t FLASH_OB_GetWRP1(void)
/**
* @brief Returns the FLASH Write Protection Option Bytes value.
* @note This function can be used only for STM32L1XX_HD density devices.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
* @param None
* @retval The FLASH Write Protection Option Bytes value.
*/

10
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_flash.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_flash.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the FLASH
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -92,8 +92,8 @@ typedef enum
* @{
*/
#define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08082FFF))
#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0805FFFF))
#define IS_FLASH_DATA_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08080000) && ((ADDRESS) <= 0x08083FFF))
#define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF))
/**
* @}

28
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_flash_ramfunc.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_flash_ramfunc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides all the Flash firmware functions which should be
* executed from the internal SRAM. This file should be placed in
* internal SRAM.
@ -39,7 +39,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -140,17 +140,19 @@ __RAM_FUNC FLASH_RUNPowerDownCmd(FunctionalState NewState)
/**
* @brief Erases a specified 2 page in program memory in parallel.
* @note This function can be used only for STM32L1XX_HD density devices.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
* To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access
* (recommended to protect the FLASH memory against possible unwanted operation).
* @param Page_Address1: The page address in program memory to be erased in
* the first Bank (BANK1). This parameter should be between 0x08000000
* and 0x0802FF00.
* the first Bank (BANK1). This parameter should be:
* - between 0x08000000 and 0x0802FF00 for STM32L1XX_HD devices
* - between 0x08000000 and 0x0803FF00 for STM32L1XX_XL devices
* @param Page_Address2: The page address in program memory to be erased in
* the second Bank (BANK2). This parameter should be between 0x08030000
* and 0x0805FF00.
* the second Bank (BANK2). This parameter should be:
* - between 0x08030000 and 0x0805FF00 for STM32L1XX_HD devices
* - between 0x08040000 and 0x0807FF00 for STM32L1XX_XL devices
* @note A Page is erased in the Program memory only if the address to load
* is the start address of a page (multiple of 256 bytes).
* @retval FLASH Status: The returned value can be:
@ -262,14 +264,18 @@ __RAM_FUNC FLASH_ProgramHalfPage(uint32_t Address, uint32_t* pBuffer)
/**
* @brief Programs 2 half page in program memory in parallel.
* @param Address1: specifies the first address to be written in the first bank
* (BANK1). This parameter should be between 0x08000000 and 0x0802FF80.
* (BANK1).This parameter should be:
* - between 0x08000000 and 0x0802FF80 for STM32L1XX_HD devices
* - between 0x08000000 and 0x0803FF80 for STM32L1XX_XL devices
* @param pBuffer1: pointer to the buffer containing the data to be written
* to the first half page in the first bank.
* @param Address2: specifies the second address to be written in the second bank
* (BANK2). This parameter should be between 0x08030000 and 0x0805FF80.
* (BANK2). This parameter should be:
* - between 0x08030000 and 0x0805FF80 for STM32L1XX_HD devices
* - between 0x08040000 and 0x0807FF80 for STM32L1XX_XL devices
* @param pBuffer2: pointer to the buffer containing the data to be written
* to the second half page in the second bank.
* @note This function can be used only for STM32L1XX_HD density devices.
* @note This function can be used only for STM32L1XX_HD and STM32L1XX_XL devices.
* @note To correctly run this function, the FLASH_Unlock() function
* must be called before.
* Call the FLASH_Lock() to disable the flash memory access

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_fsmc.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_fsmc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the FSMC peripheral:
* + Initialization
@ -12,7 +12,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_fsmc.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_fsmc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the FSMC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

43
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_gpio.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_gpio.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the GPIO peripheral:
* + Initialization and Configuration
@ -55,7 +55,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -179,6 +179,7 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx)
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
{
uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
uint32_t tmpreg = 0x00;
/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
@ -197,30 +198,42 @@ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
if (currentpin == pos)
{
GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
/* Use temporary variable to update MODER register configuration, to avoid
unexpected transition in the GPIO pin configuration. */
tmpreg = GPIOx->MODER;
tmpreg &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
tmpreg |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
GPIOx->MODER = tmpreg;
if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
{
/* Check Speed mode parameters */
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
/* Speed mode configuration */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
/* Use temporary variable to update OSPEEDR register configuration, to avoid
unexpected transition in the GPIO pin configuration. */
tmpreg = GPIOx->OSPEEDR;
tmpreg &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
tmpreg |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
GPIOx->OSPEEDR = tmpreg;
/*Check Output mode parameters */
assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
/* Output mode configuration */
GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ;
GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
/* Use temporary variable to update OTYPER register configuration, to avoid
unexpected transition in the GPIO pin configuration. */
tmpreg = GPIOx->OTYPER;
tmpreg &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos));
tmpreg |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
GPIOx->OTYPER = tmpreg;
}
/* Pull-up Pull down resistor configuration */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
/* Use temporary variable to update PUPDR register configuration, to avoid
unexpected transition in the GPIO pin configuration. */
tmpreg = GPIOx->PUPDR;
tmpreg &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
tmpreg |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
GPIOx->PUPDR = tmpreg;
}
}
}

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_gpio.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_gpio.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the GPIO
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_i2c.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_i2c.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Inter-integrated circuit (I2C)
* + Initialization and Configuration
@ -57,7 +57,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_i2c.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_i2c.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the I2C firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_iwdg.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_iwdg.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Independent watchdog (IWDG) peripheral:
* + Prescaler and Counter configuration
@ -64,7 +64,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_iwdg.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_iwdg.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the IWDG
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

17
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_lcd.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_lcd.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the LCD controller (LCD) peripheral:
* + Initialization and configuration
@ -61,7 +61,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -129,6 +129,8 @@
#define BLINK_MASK ((uint32_t)0xFFFC1FFF) /* LCD BLINK Mask */
#define CONTRAST_MASK ((uint32_t)0xFFFFE3FF) /* LCD CONTRAST Mask */
#define SYNCHRO_TIMEOUT ((uint32_t) 0x00008000)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
@ -236,10 +238,15 @@ void LCD_Cmd(FunctionalState NewState)
*/
void LCD_WaitForSynchro(void)
{
uint32_t synchrocounter = 0;
uint32_t synchrostatus = 0x00;
/* Loop until FCRSF flag is set */
while ((LCD->SR & LCD_FLAG_FCRSF) == (uint32_t)RESET)
do
{
}
synchrostatus = LCD->SR & LCD_FLAG_FCRSF;
synchrocounter++;
} while((synchrocounter != SYNCHRO_TIMEOUT) && (synchrostatus == 0x00));
}
/**

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_lcd.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_lcd.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the LCD firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

10
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_opamp.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_opamp.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the operational amplifiers (opamp) peripheral:
* + Initialization and configuration
@ -44,7 +44,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -276,10 +276,10 @@ void OPAMP_OffsetTrimmingModeSelect(uint32_t OPAMP_Trimming)
assert_param(IS_OPAMP_TRIMMING(OPAMP_Trimming));
/* Reset the OPAMP_OTR range bit */
OPAMP->CSR &= (~(uint32_t) (OPAMP_OTR_OT_USER));
OPAMP->OTR &= (~(uint32_t) (OPAMP_OTR_OT_USER));
/* Select the OPAMP offset trimming */
OPAMP->CSR |= OPAMP_Trimming;
OPAMP->OTR |= OPAMP_Trimming;
}

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_opamp.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_opamp.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the operational
* amplifiers (opamp) firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_pwr.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_pwr.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Power Controller (PWR) peripheral:
* + RTC Domain Access
@ -17,7 +17,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_pwr.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_pwr.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the PWR firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_rcc.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_rcc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Reset and clock control (RCC) peripheral:
* + Internal/external clocks, PLL, CSS and MCO configuration
@ -38,7 +38,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

8
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_rcc.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_rcc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the RCC
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -404,7 +404,7 @@ typedef struct
((FLAG) == RCC_FLAG_PINRST) || ((FLAG) == RCC_FLAG_PORRST) || \
((FLAG) == RCC_FLAG_SFTRST) || ((FLAG) == RCC_FLAG_IWDGRST)|| \
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LPWRRST)|| \
((FLAG) == RCC_FLAG_WWDGRST)|| ((FLAG) == RCC_FLAG_LSECSS))
((FLAG) == RCC_FLAG_OBLRST)|| ((FLAG) == RCC_FLAG_LSECSS))
#define IS_RCC_HSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F)
#define IS_RCC_MSI_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x3F)

8
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_rtc.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_rtc.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Real-Time Clock (RTC) peripheral:
* + Initialization
@ -204,7 +204,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -851,8 +851,6 @@ void RTC_GetTime(uint32_t RTC_Format, RTC_TimeTypeDef* RTC_TimeStruct)
/**
* @brief Gets the RTC current Calendar Subseconds value.
* @note This function freeze the Time and Date registers after reading the
* SSR register.
* @param None
* @retval RTC current Calendar Subseconds value.
*/

10
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_rtc.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_rtc.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the RTC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -744,8 +744,8 @@ typedef struct
((FLAG) == RTC_FLAG_RSF) || ((FLAG) == RTC_FLAG_WUTWF) || \
((FLAG) == RTC_FLAG_ALRBWF) || ((FLAG) == RTC_FLAG_ALRAWF) || \
((FLAG) == RTC_FLAG_TAMP1F) || ((FLAG) == RTC_FLAG_TAMP2F) || \
((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
((FLAG) == RTC_FLAG_SHPF))
((FLAG) == RTC_FLAG_TAMP3F) || ((FLAG) == RTC_FLAG_RECALPF) || \
((FLAG) == RTC_FLAG_SHPF)|| ((FLAG) == RTC_FLAG_INITS))
#define IS_RTC_CLEAR_FLAG(FLAG) (((FLAG) != (uint32_t)RESET) && (((FLAG) & 0xFFFF00DF) == (uint32_t)RESET))
/**

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_sdio.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_sdio.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the SDIO peripheral:
* + Initialization
@ -109,7 +109,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_sdio.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_sdio.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the SDIO firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_spi.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_spi.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Serial peripheral interface (SPI):
* + Initialization and Configuration
@ -75,7 +75,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_spi.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_spi.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the SPI
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_syscfg.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_syscfg.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the SYSCFG and RI peripherals:
* + SYSCFG Initialization and Configuration
@ -49,7 +49,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_syscfg.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_syscfg.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the SYSCFG
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

12
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_tim.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_tim.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the TIM peripheral:
* + TimeBase management
@ -89,7 +89,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -2540,7 +2540,9 @@ void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM
/**
* @brief Configures the TIMx Encoder Interface.
* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
* @note TIM9 is supporting Encoder Interface only in STM32L1XX_MDP, STM32L1XX_HD
* and STM32L1XX_XL devices.
* @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
* This parameter can be one of the following values:
* @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
@ -2565,7 +2567,7 @@ void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
uint16_t tmpccer = 0;
/* Check the parameters */
assert_param(IS_TIM_LIST3_PERIPH(TIMx));
assert_param(IS_TIM_LIST7_PERIPH(TIMx));
assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));

13
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_tim.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_tim.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the TIM firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -175,7 +175,12 @@ typedef struct
((PERIPH) == TIM10) || \
((PERIPH) == TIM11))
/* LIST3: TIM2, TIM3, TIM4, TIM5 and TIM9 */
#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM2) || \
((PERIPH) == TIM3) || \
((PERIPH) == TIM4) || \
((PERIPH) == TIM5) || \
((PERIPH) == TIM9))
/** @defgroup TIM_Output_Compare_and_PWM_modes
* @{

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_usart.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_usart.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Universal synchronous asynchronous receiver
* transmitter (USART):
@ -58,7 +58,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_usart.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_usart.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the USART
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_wwdg.c
View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32l1xx_wwdg.c
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file provides firmware functions to manage the following
* functionalities of the Window watchdog (WWDG) peripheral:
* + Prescaler, Refresh window and Counter configuration
@ -65,7 +65,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_wwdg.h
View File

@ -2,14 +2,14 @@
******************************************************************************
* @file stm32l1xx_wwdg.h
* @author MCD Application Team
* @version V1.2.0
* @date 22-February-2013
* @version V1.3.0
* @date 31-January-2014
* @brief This file contains all the functions prototypes for the WWDG
* firmware library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.