diff --git a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim.c
index 459f3624e4..fecb780c29 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim.c
@@ -390,11 +390,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0))
     {
@@ -784,11 +784,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1294,11 +1294,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1777,11 +1777,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U))
     {
@@ -2592,11 +2592,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
     {
@@ -3386,11 +3386,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U))
     {
@@ -3656,11 +3656,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.c
index 9bf2c75d28..9b1377fe7f 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.c
@@ -388,11 +388,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
 
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -693,11 +693,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1109,11 +1109,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c
index 6e4c54dd8f..8fb28d6cbb 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc.c
@@ -1765,7 +1765,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
       {
         SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
         
-        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
+        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
         {
           /* Delay for temperature sensor stabilization time */
           /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c
index 7ab6aa80fe..2489977a51 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_adc_ex.c
@@ -1225,7 +1225,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
       {
         SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
         
-        if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
+        if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
         {
           /* Delay for temperature sensor stabilization time */
           /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c
index db203f8f95..e44229fffe 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim.c
@@ -389,11 +389,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U) && (Length > 0U))
     {
@@ -781,11 +781,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -1289,11 +1289,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -1770,11 +1770,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U) && (Length > 0U))
     {
@@ -2593,11 +2593,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U))
     {
@@ -3340,11 +3340,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U) && (BurstLength > 0U))
     {
@@ -3563,11 +3563,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U) && (BurstLength > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c
index f67ee6d859..4321ef6669 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_tim_ex.c
@@ -393,11 +393,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
 
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -683,11 +683,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -1056,11 +1056,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c
index f7ff93a2a5..edc05ac0f2 100644
--- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c
+++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_usart.c
@@ -2282,7 +2282,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
   CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
 
   /*-------------------------- USART BRR Configuration -----------------------*/
-  if((husart->Instance == USART1))
+  if(husart->Instance == USART1)
   {
     husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
   }
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
index 970ba315d2..1d8db6d6a4 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_adc.c
@@ -1347,7 +1347,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
     /* Enable the TSVREFE channel*/
     ADC->CCR |= ADC_CCR_TSVREFE;
     
-    if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
+    if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
     {
       /* Delay for temperature sensor stabilization time */
       /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
index 8ee57a424a..dcac1b0a74 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.c
@@ -668,11 +668,11 @@ static uint8_t FLASH_OB_GetRDP(void)
 {
   uint8_t readstatus = OB_RDP_LEVEL_0;
 
-  if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
+  if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
   {
     readstatus = OB_RDP_LEVEL_2;
   }
-  else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
+  else if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
   {
     readstatus = OB_RDP_LEVEL_1;
   }
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
index aeaf896ab0..11dd8ee8f5 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_hcd.c
@@ -338,8 +338,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
                                            uint16_t length,
                                            uint8_t do_ping) 
 {
-  if ((hhcd->hc[ch_num].ep_is_in != direction)) {
-    if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
+  if (hhcd->hc[ch_num].ep_is_in != direction) {
+    if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
       /*  reconfigure the endpoint !!! from tx -> rx, and rx ->tx  */
       USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
       if (direction)
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
index b985ec2b48..5316a02284 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim.c
@@ -399,11 +399,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0)) 
     {
@@ -799,11 +799,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1315,11 +1315,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1804,11 +1804,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0)) 
     {
@@ -2640,11 +2640,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0)) 
     {
@@ -3393,11 +3393,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
@@ -3618,11 +3618,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
index 961286e1a7..a7471ad61e 100644
--- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c
@@ -389,11 +389,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
   
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -696,11 +696,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
@@ -1114,11 +1114,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim.c
index 0c51e84921..7db1b1d7dd 100644
--- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim.c
@@ -387,11 +387,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U)) 
     {
@@ -781,11 +781,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U)) 
     {
@@ -1291,11 +1291,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U)) 
     {
@@ -1774,11 +1774,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U)) 
     {
@@ -2589,11 +2589,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U)) 
     {
@@ -3396,11 +3396,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
@@ -3666,11 +3666,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim_ex.c
index aca99ccace..29514ff3cc 100644
--- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_tim_ex.c
@@ -417,11 +417,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_HALL_INTERFACE_INSTANCE(htim->Instance));
   
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U)) 
     {
@@ -722,11 +722,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U)) 
     {
@@ -1138,11 +1138,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c
index d67cff8e59..5cffa256b0 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c
@@ -1369,7 +1369,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
     /* Enable the TSVREFE channel*/
     tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
     
-    if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
+    if(sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
     {
       /* Delay for temperature sensor stabilization time */
       /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c
index 7b5eff6949..629f0562f3 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_flash_ex.c
@@ -1290,11 +1290,11 @@ static uint8_t FLASH_OB_GetRDP(void)
 {
   uint8_t readstatus = OB_RDP_LEVEL_0;
 
-  if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
+  if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2)
   {
     readstatus = OB_RDP_LEVEL_2;
   }
-  else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
+  else if(*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1)
   {
     readstatus = OB_RDP_LEVEL_1;
   }
diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_hcd.c
index d28654ea6a..9b4958f523 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_hcd.c
@@ -344,7 +344,7 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
 {
 /* MBED */
   if ((hhcd->hc[ch_num].ep_is_in != direction)) {
-    if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
+    if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
       /*  reconfigure the endpoint !!! from tx -> rx, and rx ->tx  */
       USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
       if (direction)
diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim.c
index 89db4b6165..c43d24a1ab 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim.c
@@ -396,11 +396,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U) && (Length > 0)) 
     {
@@ -795,11 +795,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0)) 
     {
@@ -1310,11 +1310,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0)) 
     {
@@ -1798,11 +1798,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U) && (Length > 0)) 
     {
@@ -2630,11 +2630,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0)) 
     {
@@ -3383,11 +3383,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U) && (BurstLength > 0U)) 
     {
@@ -3608,11 +3608,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U) && (BurstLength > 0U)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.c
index a77b21ded0..781e5a7fcf 100644
--- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_tim_ex.c
@@ -386,11 +386,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
   
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0)) 
     {
@@ -688,11 +688,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0)) 
     {
@@ -1100,11 +1100,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U) && (Length > 0)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
index 3a23e4be58..284257ec11 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_hcd.c
@@ -340,8 +340,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
                                             uint8_t do_ping)
 {
   // MBED: added
-  if ((hhcd->hc[ch_num].ep_is_in != direction)) {
-    if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
+  if (hhcd->hc[ch_num].ep_is_in != direction) {
+    if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
       /*  reconfigure the endpoint !!! from tx -> rx, and rx ->tx  */
       USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
       if (direction)
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
index 5e9e291208..a767722bbf 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c
@@ -334,7 +334,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
   USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
   uint32_t i = 0, ep_intr = 0, epint = 0, epnum = 0;
   uint32_t fifoemptymsk = 0, temp = 0;
-  USB_OTG_EPTypeDef *ep = NULL;
+  // USB_OTG_EPTypeDef *ep = NULL;
   uint32_t hclk = 200000000;
 
   /* ensure that we are in device mode */
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
index 9d69d22626..b310d8a961 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim.c
@@ -471,11 +471,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0)) 
     {
@@ -895,11 +895,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0)) 
     {
@@ -1435,11 +1435,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0)) 
     {
@@ -1949,11 +1949,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0)) 
     {
@@ -2834,11 +2834,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0)) 
     {
@@ -3656,11 +3656,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0)) 
     {
@@ -3881,11 +3881,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
index 4fdcc9ee6a..8b67763c67 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_tim_ex.c
@@ -423,11 +423,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
   
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0)) 
     {
@@ -729,11 +729,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0)) 
     {
@@ -1145,11 +1145,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0)) 
     {
diff --git a/targets/TARGET_STM/TARGET_STM32F7/flash_api.c b/targets/TARGET_STM/TARGET_STM32F7/flash_api.c
index de705096ef..19c0f38b4c 100644
--- a/targets/TARGET_STM/TARGET_STM32F7/flash_api.c
+++ b/targets/TARGET_STM/TARGET_STM32F7/flash_api.c
@@ -281,7 +281,7 @@ static uint32_t GetSectorSize(uint32_t Sector)
   */
 static uint32_t GetSectorBase(uint32_t SectorId)
 {
-    int i = 0;
+    uint32_t i = 0;
     uint32_t address_sector = FLASH_BASE;
 
     for (i = 0; i < SectorId; i++) {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_hrtim.c b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_hrtim.c
index 27d49bc0dd..2d17c161ad 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_hrtim.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_hrtim.c
@@ -1601,11 +1601,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim,
   /* Check the parameters */
   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel));
 
-  if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
+  if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  if((hhrtim->State == HAL_HRTIM_STATE_READY))
+  if(hhrtim->State == HAL_HRTIM_STATE_READY)
   {
     if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
     {
@@ -2215,11 +2215,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim,
   /* Check the parameters */
   assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel));
 
-  if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
+  if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  if((hhrtim->State == HAL_HRTIM_STATE_READY))
+  if(hhrtim->State == HAL_HRTIM_STATE_READY)
   {
     if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U))
     {
@@ -5296,7 +5296,7 @@ HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef * hhrtim,
   /* Check the parameters */
   assert_param(IS_HRTIM_TIMERID(Timers));
 
-  if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
+  if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
@@ -5731,11 +5731,11 @@ HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim,
   /* Check the parameters */
   assert_param(IS_HRTIM_TIMERINDEX(TimerIdx));
 
-  if((hhrtim->State == HAL_HRTIM_STATE_BUSY))
+  if(hhrtim->State == HAL_HRTIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  if((hhrtim->State == HAL_HRTIM_STATE_READY))
+  if(hhrtim->State == HAL_HRTIM_STATE_READY)
   {
     if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim.c
index a5a9f8d0c9..59a09f8466 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim.c
@@ -490,11 +490,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -942,11 +942,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -1521,11 +1521,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -2069,11 +2069,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -2980,11 +2980,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
     {
@@ -3959,11 +3959,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((BurstBuffer == NULL) && (BurstLength > 0U))
     {
@@ -4287,11 +4287,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((BurstBuffer == NULL) && (BurstLength > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim_ex.c
index 19d9a19e0d..d3e5698026 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32H7/device/stm32h7xx_hal_tim_ex.c
@@ -397,11 +397,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -709,11 +709,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -1117,11 +1117,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
index a431331ded..bf38663fc9 100644
--- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tim.c
@@ -394,11 +394,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U))
     {
@@ -765,11 +765,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1243,11 +1243,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0U ) && (Length > 0U))
     {
@@ -1714,11 +1714,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0U ) && (Length > 0U))
     {
@@ -2505,11 +2505,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0U) || (pData2 == 0U) )) && (Length > 0U)) 
     {
@@ -3227,11 +3227,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U)) 
     {
@@ -3429,11 +3429,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
   
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0U ) && (BurstLength > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc.c
index 1128626f6e..24bee6de0a 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc.c
@@ -1736,7 +1736,7 @@ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConf
       {
         SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
         
-        if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
+        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
         {
           /* Delay for temperature sensor stabilization time */
           /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c
index bcf881db0b..320a774b5a 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_adc_ex.c
@@ -845,7 +845,7 @@ HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_I
   {
     SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
     
-    if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
+    if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
     {
       /* Delay for temperature sensor stabilization time */
       /* Compute number of CPU cycles to wait for */
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.c
index 8268848235..fdaf9e659d 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_rtc_ex.c
@@ -1087,7 +1087,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef
   hrtc->State = HAL_RTC_STATE_BUSY;
 
 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)   
-  if((sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE))
+  if(sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)
   {
     /* Configure the RTC_TAFCR register */
     sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE;
@@ -1150,7 +1150,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType
 
 #if defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) || defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)   
   /* Configure the tamper trigger */
-  if((sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE))
+  if(sTamper->Trigger == RTC_TAMPERTRIGGER_RISINGEDGE)
   {
     sTamper->Trigger = RTC_TAMPERTRIGGER_RISINGEDGE;
   }
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_tim.c
index e1c4490280..864371e9c4 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_tim.c
@@ -393,11 +393,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0))
     {
@@ -767,11 +767,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -1246,11 +1246,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -1721,11 +1721,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0))
     {
@@ -2512,11 +2512,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
     {
@@ -3240,11 +3240,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0))
     {
@@ -3448,11 +3448,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.c
index 65a039cac1..62c390d12e 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.c
@@ -1904,7 +1904,7 @@ static void UART_SetConfig(UART_HandleTypeDef *huart)
   if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
   {
     /*------- UART-associated USART registers setting : BRR Configuration ------*/
-    if((huart->Instance == USART1))
+    if(huart->Instance == USART1)
     {
       huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
     }
@@ -1916,7 +1916,7 @@ static void UART_SetConfig(UART_HandleTypeDef *huart)
   else
   {
     /*------- UART-associated USART registers setting : BRR Configuration ------*/
-    if((huart->Instance == USART1))
+    if(huart->Instance == USART1)
     {
       huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
     }
diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.c
index 068d2b46db..116e7f0608 100644
--- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.c
+++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.c
@@ -1873,7 +1873,7 @@ static void USART_SetConfig(USART_HandleTypeDef *husart)
   CLEAR_BIT(husart->Instance->CR3, (uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
 
   /*-------------------------- USART BRR Configuration -----------------------*/
-  if((husart->Instance == USART1))
+  if(husart->Instance == USART1)
   {
     husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
   }
diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_hcd.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_hcd.c
index 8409955e3b..daed433956 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_hcd.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_hcd.c
@@ -349,8 +349,8 @@ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
                                             uint8_t do_ping) 
 {
   // Added for MBED PR #3432
-  if ((hhcd->hc[ch_num].ep_is_in != direction)) {
-    if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL)){
+  if (hhcd->hc[ch_num].ep_is_in != direction) {
+    if (hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL){
       /*  reconfigure the endpoint !!! from tx -> rx, and rx ->tx  */
       USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
       if (direction)
diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.c
index 61be4bcf83..1215aae48c 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_pcd.c
@@ -343,7 +343,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
   USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
   uint32_t index = 0U, ep_intr = 0U, epint = 0U, epnum = 0U;
   uint32_t fifoemptymsk = 0U, temp = 0U;
-  USB_OTG_EPTypeDef *ep = NULL;
+  // USB_OTG_EPTypeDef *ep = NULL;
   uint32_t hclk = 80000000;
   
   /* ensure that we are in device mode */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim.c
index f60505f99c..2aecea52dd 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim.c
@@ -387,11 +387,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0))
     {
@@ -795,11 +795,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -1315,11 +1315,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -1802,11 +1802,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((pData == 0 ) && (Length > 0))
     {
@@ -2643,11 +2643,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0))
     {
@@ -3473,11 +3473,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0))
     {
@@ -3696,11 +3696,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if((BurstBuffer == 0 ) && (BurstLength > 0))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.c
index 754c1a7116..bf656a16fd 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_tim_ex.c
@@ -385,11 +385,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
 
-   if((htim->State == HAL_TIM_STATE_BUSY))
+   if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -685,11 +685,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
@@ -1096,11 +1096,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if((htim->State == HAL_TIM_STATE_BUSY))
+  if(htim->State == HAL_TIM_STATE_BUSY)
   {
      return HAL_BUSY;
   }
-  else if((htim->State == HAL_TIM_STATE_READY))
+  else if(htim->State == HAL_TIM_STATE_READY)
   {
     if(((uint32_t)pData == 0 ) && (Length > 0))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim.c b/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim.c
index 5a0b98ebb2..b611f17d84 100644
--- a/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim.c
+++ b/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim.c
@@ -490,11 +490,11 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat
   /* Check the parameters */
   assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -942,11 +942,11 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -1521,11 +1521,11 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe
   /* Check the parameters */
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -2069,11 +2069,11 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel
   assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((pData == NULL) && (Length > 0U))
     {
@@ -2979,11 +2979,11 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch
   /* Check the parameters */
   assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((((pData1 == NULL) || (pData2 == NULL))) && (Length > 0U))
     {
@@ -3901,11 +3901,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((BurstBuffer == NULL) && (BurstLength > 0U))
     {
@@ -4166,11 +4166,11 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t B
   assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
   assert_param(IS_TIM_DMA_LENGTH(BurstLength));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if ((BurstBuffer == NULL) && (BurstLength > 0U))
     {
diff --git a/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim_ex.c b/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim_ex.c
index c2c9801fb0..41a73b2b21 100644
--- a/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim_ex.c
+++ b/targets/TARGET_STM/TARGET_STM32WB/device/stm32wbxx_hal_tim_ex.c
@@ -409,11 +409,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
   /* Check the parameters */
   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -721,11 +721,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
@@ -1129,11 +1129,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
   /* Check the parameters */
   assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
 
-  if ((htim->State == HAL_TIM_STATE_BUSY))
+  if (htim->State == HAL_TIM_STATE_BUSY)
   {
     return HAL_BUSY;
   }
-  else if ((htim->State == HAL_TIM_STATE_READY))
+  else if (htim->State == HAL_TIM_STATE_READY)
   {
     if (((uint32_t)pData == 0U) && (Length > 0U))
     {
diff --git a/targets/TARGET_STM/can_api.c b/targets/TARGET_STM/can_api.c
index 0595ae3a27..7ab05cb9cf 100644
--- a/targets/TARGET_STM/can_api.c
+++ b/targets/TARGET_STM/can_api.c
@@ -513,6 +513,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
 #include "can_device.h" // Specific to STM32 serie
 #include <math.h>
 #include <string.h>
+#include <inttypes.h>
 
 static uint32_t can_irq_ids[CAN_NUM] = {0};
 static can_irq_handler irq_handler;
@@ -743,7 +744,7 @@ int can_frequency(can_t *obj, int f)
                 }
             }
             if (status == 0) {
-                error("can ESR  0x%04x.%04x + timeout status %d", (can->ESR & 0xFFFF0000) >> 16, (can->ESR & 0xFFFF), status);
+                error("can ESR  0x%04" PRIx32 ".%04" PRIx32 " + timeout status %d", (can->ESR & 0xFFFF0000) >> 16, (can->ESR & 0xFFFF), status);
             }
         } else {
             error("can init request timeout\n");
diff --git a/targets/TARGET_STM/gpio_irq_api.c b/targets/TARGET_STM/gpio_irq_api.c
index 5fb1ed8957..f5f100834e 100644
--- a/targets/TARGET_STM/gpio_irq_api.c
+++ b/targets/TARGET_STM/gpio_irq_api.c
@@ -31,6 +31,7 @@
 #if DEVICE_INTERRUPTIN
 
 #include <stdbool.h>
+#include <inttypes.h>
 #include "cmsis.h"
 #include "gpio_irq_api.h"
 #include "pinmap.h"
@@ -125,7 +126,7 @@ static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
             }
         }
     }
-    error("Unexpected Spurious interrupt, index %ld\r\n", irq_index);
+    error("Unexpected Spurious interrupt index %" PRIu32 "\n", irq_index);
 }
 
 
diff --git a/targets/TARGET_STM/i2c_api.c b/targets/TARGET_STM/i2c_api.c
index 121981e11e..142e01b52a 100644
--- a/targets/TARGET_STM/i2c_api.c
+++ b/targets/TARGET_STM/i2c_api.c
@@ -35,6 +35,7 @@
 
 #if DEVICE_I2C
 
+#include <string.h>
 #include "cmsis.h"
 #include "pinmap.h"
 #include "PeripheralPins.h"