From a1b9e560e23cf6e700471d153d089918995f75eb Mon Sep 17 00:00:00 2001 From: svastm Date: Thu, 9 Jun 2016 17:57:27 +0200 Subject: [PATCH 01/16] [STM32L4XX] Fix heap size for uARM --- .../TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s | 4 ++-- .../TOOLCHAIN_ARM_MICRO/stm32l476xx.sct | 7 +++---- .../TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s | 2 +- 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s index 10b68e9feb..34373f1357 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s @@ -42,13 +42,13 @@ AREA STACK, NOINIT, READWRITE, ALIGN=3 EXPORT __initial_sp -__initial_sp EQU 0x10008000 ; Top of RAM, L4-ECC-SRAM2 retained in standby +__initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby ; Heap Configuration ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Heap_Size EQU 0x18000 ; 96KB +Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) AREA HEAP, NOINIT, READWRITE, ALIGN=3 EXPORT __heap_base diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct index 59fe0fc151..39fbb380c4 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct @@ -36,12 +36,11 @@ LR_IROM1 0x08000000 0x100000 { ; load region size_region .ANY (+RO) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby + RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 .ANY (+RW +ZI) } - - RW_IRAM2 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 + ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM + RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby .ANY (+RW +ZI) } diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s index d825e46f89..d444518bc9 100644 --- a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s +++ b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s @@ -48,7 +48,7 @@ __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standb ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Heap_Size EQU 0x18000 ; 96KB +Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) AREA HEAP, NOINIT, READWRITE, ALIGN=3 EXPORT __heap_base From fe2871b8bd71163f13a6c7f8ab80d2ab624dc547 Mon Sep 17 00:00:00 2001 From: svastm Date: Fri, 10 Jun 2016 09:26:31 +0200 Subject: [PATCH 02/16] [STM32L4XX] rename startup file to .S --- .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 .../{startup_stm32l476xx.s => startup_stm32l476xx.S} | 0 8 files changed, 0 insertions(+), 0 deletions(-) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_STD/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) rename hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/{startup_stm32l476xx.s => startup_stm32l476xx.S} (100%) diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_ARM_STD/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/startup_stm32l476xx.S diff --git a/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/startup_stm32l476xx.s b/hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/startup_stm32l476xx.S similarity index 100% rename from hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/startup_stm32l476xx.s rename to hal/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/startup_stm32l476xx.S From 3c2229a2b11ac99b48d13d6e9b4512151c33cd03 Mon Sep 17 00:00:00 2001 From: Yoshihiro TSUBOI Date: Sat, 11 Jun 2016 08:06:06 +0900 Subject: [PATCH 03/16] [HRM1017] Update exporting template changed merging softdevice from s110 to s130 --- tools/export/gcc_arm_hrm1017.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/export/gcc_arm_hrm1017.tmpl b/tools/export/gcc_arm_hrm1017.tmpl index 0c6a037291..3f4dabc938 100644 --- a/tools/export/gcc_arm_hrm1017.tmpl +++ b/tools/export/gcc_arm_hrm1017.tmpl @@ -1,7 +1,7 @@ {% extends "gcc_arm_common.tmpl" %} {% block additional_variables %} -SOFTDEVICE = mbed/TARGET_HRM1017/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex +SOFTDEVICE = mbed/TARGET_HRM1017/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex {% endblock %} {% block additional_executables %} From e3b9def8cf0001395345a7a00da9a694a7e95e92 Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Tue, 7 Jun 2016 14:28:12 -0500 Subject: [PATCH 04/16] Refactors all toolchains to have flags api --- tools/toolchains/__init__.py | 2 ++ tools/toolchains/arm.py | 1 - tools/toolchains/gcc.py | 44 ++++++++++++++++++++----------- tools/toolchains/iar.py | 51 +++++++++++++++++++++--------------- 4 files changed, 60 insertions(+), 38 deletions(-) diff --git a/tools/toolchains/__init__.py b/tools/toolchains/__init__.py index 8f55af6800..777a2cd174 100644 --- a/tools/toolchains/__init__.py +++ b/tools/toolchains/__init__.py @@ -24,6 +24,7 @@ from types import ListType from shutil import copyfile from os.path import join, splitext, exists, relpath, dirname, basename, split, abspath from inspect import getmro +from copy import deepcopy from multiprocessing import Pool, cpu_count from tools.utils import run_cmd, mkdir, rel_path, ToolException, NotSupportedException, split_path @@ -242,6 +243,7 @@ class mbedToolchain: if 'UVISOR_PRESENT=1' in self.macros: self.target.core = re.sub(r"F$", '', self.target.core) + self.flags = deepcopy(self.DEFAULT_FLAGS) def get_output(self): return self.output diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index 11b6564dfa..c50289dc3f 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -56,7 +56,6 @@ class ARM(mbedToolchain): main_cc = join(ARM_BIN, "armcc") - self.flags = copy.deepcopy(self.DEFAULT_FLAGS) self.flags['common'] += ["--cpu=%s" % cpu] if "save-asm" in self.options: self.flags['common'].extend(["--asm", "--interleave"]) diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index d60409043a..e9a89cf424 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -29,6 +29,20 @@ class GCC(mbedToolchain): STD_LIB_NAME = "lib%s.a" DIAGNOSTIC_PATTERN = re.compile('((?P[^:]+):(?P\d+):)(\d+:)? (?Pwarning|error): (?P.+)') + DEFAULT_FLAGS = { + 'common': ["-c", "-Wall", "-Wextra", + "-Wno-unused-parameter", "-Wno-missing-field-initializers", + "-fmessage-length=0", "-fno-exceptions", "-fno-builtin", + "-ffunction-sections", "-fdata-sections", + "-MMD", "-fno-delete-null-pointer-checks", "-fomit-frame-pointer" + ], + 'asm': ["-x", "assembler-with-cpp"], + 'c': ["-std=gnu99"], + 'cxx': ["-std=gnu++98", "-fno-rtti"], + 'ld': ["-Wl,--gc-sections", "-Wl,--wrap,main", + "-Wl,--wrap,_malloc_r", "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r"], + } + def __init__(self, target, options=None, notify=None, macros=None, silent=False, tool_path="", extra_verbose=False): mbedToolchain.__init__(self, target, options, notify, macros, silent, extra_verbose=extra_verbose) @@ -63,33 +77,31 @@ class GCC(mbedToolchain): # Note: We are using "-O2" instead of "-Os" to avoid this known GCC bug: # http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46762 - common_flags = ["-c", "-Wall", "-Wextra", - "-Wno-unused-parameter", "-Wno-missing-field-initializers", - "-fmessage-length=0", "-fno-exceptions", "-fno-builtin", - "-ffunction-sections", "-fdata-sections", - "-fno-delete-null-pointer-checks", "-fomit-frame-pointer" - ] + self.cpu + self.flags["common"] += self.cpu if "save-asm" in self.options: - common_flags.append("-save-temps") + self.flags["common"].append("-save-temps") if "debug-info" in self.options: - common_flags.append("-g") - common_flags.append("-O0") + self.flags["common"].append("-g") + self.flags["common"].append("-O0") else: - common_flags.append("-O2") + self.flags["common"].append("-O2") main_cc = join(tool_path, "arm-none-eabi-gcc") main_cppc = join(tool_path, "arm-none-eabi-g++") - self.asm = [main_cc, "-x", "assembler-with-cpp"] + common_flags + self.asm = [main_cc] + self.flags['asm'] + self.flags["common"] if not "analyze" in self.options: - self.cc = [main_cc, "-std=gnu99"] + common_flags - self.cppc =[main_cppc, "-std=gnu++98", "-fno-rtti"] + common_flags + self.cc = [main_cc] + self.cppc =[main_cppc] else: - self.cc = [join(GOANNA_PATH, "goannacc"), "--with-cc=" + main_cc.replace('\\', '/'), "-std=gnu99", "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + common_flags - self.cppc= [join(GOANNA_PATH, "goannac++"), "--with-cxx=" + main_cppc.replace('\\', '/'), "-std=gnu++98", "-fno-rtti", "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + common_flags + self.cc = [join(GOANNA_PATH, "goannacc"), "--with-cc=" + main_cc.replace('\\', '/'), "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + self.cppc= [join(GOANNA_PATH, "goannac++"), "--with-cxx=" + main_cppc.replace('\\', '/'), "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + self.cc += self.flags['c'] + self.flags['common'] + self.cppc += self.flags['cxx'] + self.flags['common'] - self.ld = [join(tool_path, "arm-none-eabi-gcc"), "-Wl,--gc-sections", "-Wl,--wrap,main", "-Wl,--wrap,_malloc_r", "-Wl,--wrap,_free_r", "-Wl,--wrap,_realloc_r"] + self.cpu + self.flags['ld'] += self.cpu + self.ld = [join(tool_path, "arm-none-eabi-gcc")] + self.flags['ld'] self.sys_libs = ["stdc++", "supc++", "m", "c", "gcc"] self.ar = join(tool_path, "arm-none-eabi-ar") diff --git a/tools/toolchains/iar.py b/tools/toolchains/iar.py index c3aa4a098a..0862547f8d 100644 --- a/tools/toolchains/iar.py +++ b/tools/toolchains/iar.py @@ -30,47 +30,56 @@ class IAR(mbedToolchain): DIAGNOSTIC_PATTERN = re.compile('"(?P[^"]+)",(?P[\d]+)\s+(?PWarning|Error)(?P.+)') + DEFAULT_FLAGS = { + 'common': [ + "--no_wrap_diagnostics", + # Pa050: No need to be notified about "non-native end of line sequence" + # Pa084: Pointless integer comparison -> checks for the values of an enum, but we use values outside of the enum to notify errors (ie: NC). + # Pa093: Implicit conversion from float to integer (ie: wait_ms(85.4) -> wait_ms(85)) + # Pa082: Operation involving two values from two registers (ie: (float)(*obj->MR)/(float)(LPC_PWM1->MR0)) + "-e", # Enable IAR language extension + "--diag_suppress=Pa050,Pa084,Pa093,Pa082"], + 'asm': [], + 'c': [], + 'cxx': ["--c++", "--no_rtti", "--no_exceptions", "--guard_calls"], + 'ld': [], + } + def __init__(self, target, options=None, notify=None, macros=None, silent=False, extra_verbose=False): mbedToolchain.__init__(self, target, options, notify, macros, silent, extra_verbose=extra_verbose) if target.core == "Cortex-M7F": cpuchoice = "Cortex-M7" else: cpuchoice = target.core - c_flags = [ + self.flags["common"] += [ "--cpu=%s" % cpuchoice, "--thumb", "--dlib_config", join(IAR_PATH, "inc", "c", "DLib_Config_Full.h"), - "-e", # Enable IAR language extension - "--no_wrap_diagnostics", - # Pa050: No need to be notified about "non-native end of line sequence" - # Pa084: Pointless integer comparison -> checks for the values of an enum, but we use values outside of the enum to notify errors (ie: NC). - # Pa093: Implicit conversion from float to integer (ie: wait_ms(85.4) -> wait_ms(85)) - # Pa082: Operation involving two values from two registers (ie: (float)(*obj->MR)/(float)(LPC_PWM1->MR0)) - "--diag_suppress=Pa050,Pa084,Pa093,Pa082", ] if target.core == "Cortex-M7F": - c_flags.append("--fpu=VFPv5_sp") - + self.flags["common"].append("--fpu=VFPv5_sp") if "debug-info" in self.options: - c_flags.append("-r") - c_flags.append("-On") + self.flags["common"].append("-r") + self.flags["common"].append("-On") else: - c_flags.append("-Oh") + self.flags["common"].append("-Oh") IAR_BIN = join(IAR_PATH, "bin") main_cc = join(IAR_BIN, "iccarm") - + + self.flags["asm"] += ["--cpu", cpuchoice] if target.core == "Cortex-M7F": - self.asm = [join(IAR_BIN, "iasmarm")] + ["--cpu", cpuchoice] + ["--fpu", "VFPv5_sp"] - else: - self.asm = [join(IAR_BIN, "iasmarm")] + ["--cpu", cpuchoice] + self.flags["asm"] += ["--fpu", "VFPv5_sp"] + self.asm = [join(IAR_BIN, "iasmarm")] + self.flags["asm"] if not "analyze" in self.options: - self.cc = [main_cc, "--vla"] + c_flags - self.cppc = [main_cc, "--c++", "--no_rtti", "--no_exceptions"] + c_flags + self.cc = [main_cc] + self.cppc = [main_cc] else: - self.cc = [join(GOANNA_PATH, "goannacc"), '--with-cc="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT, "--vla"] + c_flags - self.cppc = [join(GOANNA_PATH, "goannac++"), '--with-cxx="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT] + ["--c++", "--no_rtti", "--no_exceptions"] + c_flags + self.cc = [join(GOANNA_PATH, "goannacc"), '--with-cc="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT] + self.cppc = [join(GOANNA_PATH, "goannac++"), '--with-cxx="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT] + self.cc += self.flags["common"] + self.flags["c"] + self.cppc += self.flags["common"] + self.flags["cxx"] self.ld = join(IAR_BIN, "ilinkarm") self.ar = join(IAR_BIN, "iarchive") self.elf2bin = join(IAR_BIN, "ielftool") From c6fc70e461d118204dfe67dfe041d82d8fdfd2d0 Mon Sep 17 00:00:00 2001 From: Jimmy Brisson Date: Tue, 7 Jun 2016 15:15:35 -0500 Subject: [PATCH 05/16] Updates exportes to use flags from toolchains Affects the following exporters: - amtelstudio - codered - emblocks - gcc_arm - iar - simplicityv3 --- tools/export/atmelstudio.py | 1 + tools/export/atmelstudio6_2.cppproj.tmpl | 14 +++++++------- tools/export/codered.py | 1 + tools/export/codered_cproject_common.tmpl | 12 ++++++------ tools/export/emblocks.py | 6 +++--- tools/export/exporters.py | 10 ++++++++++ tools/export/gcc_arm_common.tmpl | 22 +++++++++------------- tools/export/gccarm.py | 1 + tools/export/iar.py | 2 ++ tools/export/simplicityv3.py | 1 + tools/export/simplicityv3_slsproj.tmpl | 16 ++++++++-------- 11 files changed, 49 insertions(+), 37 deletions(-) diff --git a/tools/export/atmelstudio.py b/tools/export/atmelstudio.py index 7b69d20118..96e713a9ce 100644 --- a/tools/export/atmelstudio.py +++ b/tools/export/atmelstudio.py @@ -71,6 +71,7 @@ class AtmelStudio(Exporter): 'solution_uuid': solution_uuid.upper(), 'project_uuid': project_uuid.upper() } + ctx.update(self.progen_flags) target = self.target.lower() self.gen_file('atmelstudio6_2.atsln.tmpl', ctx, '%s.atsln' % self.program_name) self.gen_file('atmelstudio6_2.cppproj.tmpl', ctx, '%s.cppproj' % self.program_name) diff --git a/tools/export/atmelstudio6_2.cppproj.tmpl b/tools/export/atmelstudio6_2.cppproj.tmpl index 98696b30b5..8af3212993 100644 --- a/tools/export/atmelstudio6_2.cppproj.tmpl +++ b/tools/export/atmelstudio6_2.cppproj.tmpl @@ -60,7 +60,7 @@ Optimize for size (-Os) True True - -std=gnu99 -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer -MMD -MP + {{c_flags|join(" ")}} {{common_flags|join(" ")}} -MMD -MP NDEBUG @@ -77,7 +77,7 @@ Optimize for size (-Os) True True - -std=gnu++98 -fno-rtti -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer -MMD -MP + {{cxx_flags|join(" ")}} {{common_flags|join(" ")}} -MMD -MP libm @@ -88,7 +88,7 @@ True - {% for p in library_paths %}-L../{{p}} {% endfor %} {% for f in object_files %}../{{f}} {% endfor %} {% for lib in libraries %}-l{{lib}} {% endfor %} -T../{{linker_script}} -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main -Wl,--cref -lstdc++ -lsupc++ -lm -lgcc -Wl,--start-group -lc -lc -lnosys -Wl,--end-group + {% for p in library_paths %}-L../{{p}} {% endfor %} {% for f in object_files %}../{{f}} {% endfor %} {% for lib in libraries %}-l{{lib}} {% endfor %} -T../{{linker_script}} {{ld_flags|join(" ")}} {{common_flags|join(" ")}} {% for i in include_paths %}../{{i}} @@ -123,7 +123,7 @@ True Maximum (-g3) True - -std=gnu99 -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer -MMD -MP + {{c_flags|join(" ")}} {{common_flags|join(" ")}} -MMD -MP DEBUG @@ -141,7 +141,7 @@ True Maximum (-g3) True - -std=gnu++98 -fno-rtti -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections -fomit-frame-pointer -MMD -MP + {{cxx_flags|join(" ")}} {{common_flags|join(" ")}} -MMD -MP libm @@ -152,7 +152,7 @@ True - {% for p in library_paths %}-L../{{p}} {% endfor %} {% for f in object_files %}../{{f}} {% endfor %} {% for lib in libraries %}-l{{lib}} {% endfor %} -T../{{linker_script}} -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float -Wl,--wrap,main -Wl,--cref -lstdc++ -lsupc++ -lm -lgcc -Wl,--start-group -lc -lc -lnosys -Wl,--end-group + {% for p in library_paths %}-L../{{p}} {% endfor %} {% for f in object_files %}../{{f}} {% endfor %} {% for lib in libraries %}-l{{lib}} {% endfor %} -T../{{linker_script}} {{ld_flags|join(" ")}} {{common_flags|join(" ")}} Default (-g) @@ -173,4 +173,4 @@ {% endfor %} - \ No newline at end of file + diff --git a/tools/export/codered.py b/tools/export/codered.py index c502096fe3..6685dadc60 100644 --- a/tools/export/codered.py +++ b/tools/export/codered.py @@ -53,5 +53,6 @@ class CodeRed(Exporter): 'libraries': libraries, 'symbols': self.get_symbols() } + ctx.update(self.progen_flags) self.gen_file('codered_%s_project.tmpl' % self.target.lower(), ctx, '.project') self.gen_file('codered_%s_cproject.tmpl' % self.target.lower(), ctx, '.cproject') diff --git a/tools/export/codered_cproject_common.tmpl b/tools/export/codered_cproject_common.tmpl index b71f131556..344782ff34 100644 --- a/tools/export/codered_cproject_common.tmpl +++ b/tools/export/codered_cproject_common.tmpl @@ -34,7 +34,7 @@ {% endfor %} - - - -