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Merge branch 'master' of https://github.com/mbedmicro/mbed

pull/852/head
bcostm 2015-01-20 13:14:59 +01:00
parent 5e57cd3d29 0ab8d2e6b3
commit 8fe645ecd1
109 changed files with 25542 additions and 404 deletions
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757
libraries/USBDevice/USBDevice/USBHAL_RZ_A1H.cpp
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@ -1,19 +1,26 @@
/* Copyright (c) 2010-2011 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
* KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
* PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#if defined(TARGET_RZ_A1H)
@ -59,8 +66,9 @@ const struct PIPECFGREC {
USB_FUNCTION_DIR_P_OUT |
USB_FUNCTION_EP1,
( ( ( 64) / 64 - 1 ) << 10 ) | 0x04u,
64,
DEVDRV_USBF_OFF | 0,
MAX_PACKET_SIZE_EP1,
DEVDRV_USBF_OFF |
( 3 << USB_PIPEPERI_IITV_SHIFT ),
},
{
EP1IN, /*EP1: Host <- Func, INT*/
@ -73,8 +81,9 @@ const struct PIPECFGREC {
USB_FUNCTION_DIR_P_IN |
USB_FUNCTION_EP1,
( ( ( 64) / 64 - 1 ) << 10 ) | 0x05u,
64,
DEVDRV_USBF_OFF | 0,
MAX_PACKET_SIZE_EP1,
DEVDRV_USBF_OFF |
( 3 << USB_PIPEPERI_IITV_SHIFT ),
},
{
EP2OUT, /*EP2: Host -> Func, BULK*/
@ -87,8 +96,9 @@ const struct PIPECFGREC {
USB_FUNCTION_DIR_P_OUT |
USB_FUNCTION_EP2,
( ( (2048) / 64 - 1 ) << 10 ) | 0x30u,
512,
DEVDRV_USBF_OFF | 0,
MAX_PACKET_SIZE_EP2,
DEVDRV_USBF_OFF |
( 0 << USB_PIPEPERI_IITV_SHIFT ),
},
{
EP2IN, /*EP2: Host <- Func, BULK*/
@ -101,8 +111,9 @@ const struct PIPECFGREC {
USB_FUNCTION_DIR_P_IN |
USB_FUNCTION_EP2,
( ( (2048) / 64 - 1 ) << 10 ) | 0x50u,
512,
DEVDRV_USBF_OFF | 0,
MAX_PACKET_SIZE_EP2,
DEVDRV_USBF_OFF |
( 0 << USB_PIPEPERI_IITV_SHIFT ),
},
{
EP3OUT, /*EP3: Host -> Func, ISO*/
@ -110,13 +121,14 @@ const struct PIPECFGREC {
USB_FUNCTION_ISO |
USB_FUNCTION_BFREOFF |
USB_FUNCTION_DBLBON |
USB_FUNCTION_CNTMDON |
USB_FUNCTION_CNTMDOFF |
USB_FUNCTION_SHTNAKON |
USB_FUNCTION_DIR_P_OUT |
USB_FUNCTION_EP3,
( ( (1024) / 64 - 1 ) << 10 ) | 0x10u,
192,
DEVDRV_USBF_OFF | 1,
( ( ( 512) / 64 - 1 ) << 10 ) | 0x10u,
MAX_PACKET_SIZE_EP3,
DEVDRV_USBF_OFF |
( 0 << USB_PIPEPERI_IITV_SHIFT ),
},
{
EP3IN, /*EP3: Host <- Func, ISO*/
@ -124,13 +136,14 @@ const struct PIPECFGREC {
USB_FUNCTION_ISO |
USB_FUNCTION_BFREOFF |
USB_FUNCTION_DBLBON |
USB_FUNCTION_CNTMDON |
USB_FUNCTION_CNTMDOFF |
USB_FUNCTION_SHTNAKOFF |
USB_FUNCTION_DIR_P_IN |
USB_FUNCTION_EP3,
( ( (1024) / 64 - 1 ) << 10 ) | 0x20u,
192,
DEVDRV_USBF_OFF | 1,
( ( ( 512) / 64 - 1 ) << 10 ) | 0x20u,
MAX_PACKET_SIZE_EP3,
DEVDRV_USBF_OFF |
( 0 << USB_PIPEPERI_IITV_SHIFT ),
},
{ /*terminator*/
0, 0, 0, 0, 0,
@ -142,13 +155,12 @@ const struct PIPECFGREC {
/* workareas */
USBHAL * USBHAL::instance;
static IRQn_Type int_id; /* interrupt ID */
static uint16_t int_level; /* initerrupt level */
static uint16_t clock_mode; /* input clock selector */
static uint16_t mode; /* USB speed (HIGH/FULL) */
static DigitalOut *usb0_en;
//static DigitalOut *usb0_en;
static uint16_t EP0_read_status;
static uint16_t EPx_read_status;
@ -160,17 +172,28 @@ static uint8_t recv_buffer[MAX_PACKET_SIZE_EPBULK];
volatile static uint16_t recv_error;
/*************************************************************************/
/* prototypes for C */
extern "C" {
void usb0_function_BRDYInterruptPIPE0 (uint16_t status, uint16_t intenb,
USBHAL *object, void (USBHAL::*EP0func)(void));
void usb0_function_BRDYInterrupt (uint16_t status, uint16_t intenb,
USBHAL *object, bool (USBHAL::*epCallback[])(void));
void usb0_function_NRDYInterruptPIPE0(uint16_t status, uint16_t intenb,
USBHAL *object, void (USBHAL::*EP0func)(void));
void usb0_function_NRDYInterrupt (uint16_t status, uint16_t intenb,
USBHAL *object, bool (USBHAL::*epCallback[])(void));
void usb0_function_BEMPInterruptPIPE0(uint16_t status, uint16_t intenb,
USBHAL *object, void (USBHAL::*EP0func)(void));
void usb0_function_BEMPInterrupt (uint16_t status, uint16_t intenb,
USBHAL *object, bool (USBHAL::*epCallback[])(void));
}
/* This C++ functions changed to macro functions.
static uint32_t EP2PIPE(uint8_t endpoint);
static void usb0_function_save_request(void);
void usb0_function_BRDYInterrupt(uint16_t status, uint16_t intenb);
void usb0_function_NRDYInterrupt (uint16_t status, uint16_t intenb);
void usb0_function_BEMPInterrupt (uint16_t status, uint16_t intenb);
*/
/*************************************************************************/
/* macros */
@ -182,66 +205,72 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; BRDYENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_BRDYInterruptPIPE0(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
uint16_t read_status; \
\
USB200.BRDYSTS = \
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
RZA_IO_RegWrite_16( \
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0, \
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE); \
\
g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] = \
g_usb0_function_data_count[USB_FUNCTION_PIPE0]; \
\
read_status = usb0_function_read_buffer_c(USB_FUNCTION_PIPE0); \
\
g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] -= \
g_usb0_function_data_count[USB_FUNCTION_PIPE0]; \
\
switch (read_status) { \
case USB_FUNCTION_READING: /* Continue of data read */ \
case USB_FUNCTION_READEND: /* End of data read */ \
/* PID = BUF */ \
usb0_function_set_pid_buf(USB_FUNCTION_PIPE0); \
\
/*callback*/ \
EP0out(); \
break; \
\
case USB_FUNCTION_READSHRT: /* End of data read */ \
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
/* PID = BUF */ \
usb0_function_set_pid_buf(USB_FUNCTION_PIPE0); \
\
/*callback*/ \
EP0out(); \
break; \
\
case USB_FUNCTION_READOVER: /* FIFO access error */ \
/* Buffer Clear */ \
USB200.CFIFOCTR = USB_FUNCTION_BITBCLR; \
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
/* Req Error */ \
usb0_function_set_pid_stall(USB_FUNCTION_PIPE0); \
\
/*callback*/ \
EP0out(); \
break; \
\
case DEVDRV_USBF_FIFOERROR: /* FIFO access error */ \
default: \
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0); \
/* Req Error */ \
usb0_function_set_pid_stall(USB_FUNCTION_PIPE0); \
break; \
} \
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.BRDYSTS; \
}
extern "C" {
void usb0_function_BRDYInterruptPIPE0 (
uint16_t status,
uint16_t intenb,
USBHAL *object,
void (USBHAL::*EP0func)(void)
)
{
volatile uint16_t dumy_sts;
uint16_t read_status;
USB200.BRDYSTS =
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
RZA_IO_RegWrite_16(
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0,
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE);
g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] =
g_usb0_function_data_count[USB_FUNCTION_PIPE0];
read_status = usb0_function_read_buffer_c(USB_FUNCTION_PIPE0);
g_usb0_function_PipeDataSize[USB_FUNCTION_PIPE0] -=
g_usb0_function_data_count[USB_FUNCTION_PIPE0];
switch (read_status) {
case USB_FUNCTION_READING: /* Continue of data read */
case USB_FUNCTION_READEND: /* End of data read */
/* PID = BUF */
usb0_function_set_pid_buf(USB_FUNCTION_PIPE0);
/*callback*/
(object->*EP0func)();
break;
case USB_FUNCTION_READSHRT: /* End of data read */
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
/* PID = BUF */
usb0_function_set_pid_buf(USB_FUNCTION_PIPE0);
/*callback*/
(object->*EP0func)();
break;
case USB_FUNCTION_READOVER: /* FIFO access error */
/* Buffer Clear */
USB200.CFIFOCTR = USB_FUNCTION_BITBCLR;
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
/* Req Error */
usb0_function_set_pid_stall(USB_FUNCTION_PIPE0);
/*callback*/
(object->*EP0func)();
break;
case DEVDRV_USBF_FIFOERROR: /* FIFO access error */
default:
usb0_function_disable_brdy_int(USB_FUNCTION_PIPE0);
/* Req Error */
usb0_function_set_pid_stall(USB_FUNCTION_PIPE0);
break;
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BRDYSTS;
}
}
/******************************************************************************
@ -251,85 +280,100 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; BRDYENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_BRDYInterrupt(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
\
/************************************************************** \
* Function Name: usb0_function_brdy_int \
* Description : Executes BRDY interrupt(USB_FUNCTION_PIPE1-9). \
* : According to the pipe that interrupt is generated in, \
* : reads/writes buffer allocated in the pipe. \
* : This function is executed in the BRDY \
* : interrupt handler. This function \
* : clears BRDY interrupt status and BEMP \
* : interrupt status. \
* Arguments : uint16_t Status ; BRDYSTS Register Value \
* : uint16_t Int_enbl ; BRDYENB Register Value \
* Return Value : none \
*************************************************************/ \
/* copied from usb0_function_intrn.c */ \
uint32_t int_sense = 0; \
uint16_t pipe; \
uint16_t pipebit; \
uint16_t ep; \
\
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) { \
pipebit = g_usb0_function_bit_set[pipe]; \
\
if ((status & pipebit) && (intenb & pipebit)) { \
USB200.BRDYSTS = (uint16_t)~pipebit; \
USB200.BEMPSTS = (uint16_t)~pipebit; \
\
switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) { \
case USB_FUNCTION_D0FIFO_DMA: \
if (g_usb0_function_DmaStatus[USB_FUNCTION_D0FIFO] != USB_FUNCTION_DMA_READY) { \
/*now, DMA is not supported*/ \
usb0_function_dma_interrupt_d0fifo(int_sense); \
} \
\
if (RZA_IO_RegRead_16( \
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) { \
/*now, DMA is not supported*/ \
usb0_function_read_dma(pipe); \
usb0_function_disable_brdy_int(pipe); \
} else { \
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR; \
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE; \
} \
break; \
\
case USB_FUNCTION_D1FIFO_DMA: \
if (g_usb0_function_DmaStatus[USB_FUNCTION_D1FIFO] != USB_FUNCTION_DMA_READY) { \
/*now, DMA is not supported*/ \
usb0_function_dma_interrupt_d1fifo(int_sense); \
} \
\
if (RZA_IO_RegRead_16( \
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) { \
/*now, DMA is not supported*/ \
usb0_function_read_dma(pipe); \
usb0_function_disable_brdy_int(pipe); \
} else { \
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR; \
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE; \
} \
break; \
\
default: \
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT; \
ep <<= 1; \
ep += (RZA_IO_RegRead_16(&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)? \
(0): (1); \
EPx_read_status = DEVDRV_USBF_PIPE_WAIT; \
(instance->*(epCallback[ep - 2])) (); \
EPx_read_status = DEVDRV_USBF_PIPE_DONE; \
} \
} \
} \
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.BRDYSTS; \
extern "C" {
void usb0_function_BRDYInterrupt(
uint16_t status,
uint16_t intenb,
USBHAL *object,
bool (USBHAL::*epCallback[])(void)
)
{
volatile uint16_t dumy_sts;
/**************************************************************
* Function Name: usb0_function_brdy_int
* Description : Executes BRDY interrupt(USB_FUNCTION_PIPE1-9).
* : According to the pipe that interrupt is generated in,
* : reads/writes buffer allocated in the pipe.
* : This function is executed in the BRDY
* : interrupt handler. This function
* : clears BRDY interrupt status and BEMP
* : interrupt status.
* Arguments : uint16_t Status ; BRDYSTS Register Value
* : uint16_t Int_enbl ; BRDYENB Register Value
* Return Value : none
*************************************************************/
/* copied from usb0_function_intrn.c */
uint32_t int_sense = 0;
uint16_t pipe;
uint16_t pipebit;
uint16_t ep;
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
pipebit = g_usb0_function_bit_set[pipe];
if ((status & pipebit) && (intenb & pipebit)) {
USB200.BRDYSTS = (uint16_t)~pipebit;
USB200.BEMPSTS = (uint16_t)~pipebit;
switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) {
case USB_FUNCTION_D0FIFO_DMA:
if (g_usb0_function_DmaStatus[USB_FUNCTION_D0FIFO] != USB_FUNCTION_DMA_READY) {
/*now, DMA is not supported*/
usb0_function_dma_interrupt_d0fifo(int_sense);
}
if (RZA_IO_RegRead_16(
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) {
/*now, DMA is not supported*/
usb0_function_read_dma(pipe);
usb0_function_disable_brdy_int(pipe);
} else {
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR;
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
}
break;
case USB_FUNCTION_D1FIFO_DMA:
if (g_usb0_function_DmaStatus[USB_FUNCTION_D1FIFO] != USB_FUNCTION_DMA_READY) {
/*now, DMA is not supported*/
usb0_function_dma_interrupt_d1fifo(int_sense);
}
if (RZA_IO_RegRead_16(
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0) {
/*now, DMA is not supported*/
usb0_function_read_dma(pipe);
usb0_function_disable_brdy_int(pipe);
} else {
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR;
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
}
break;
default:
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
ep <<= 1;
if (RZA_IO_RegRead_16(
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
/* read */
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
(object->*(epCallback[ep - 2])) ();
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
} else {
/* write */
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
(object->*(epCallback[ep - 2 + 1])) ();
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
usb0_function_write_buffer(pipe);
}
}
}
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BRDYSTS;
}
}
/******************************************************************************
@ -339,16 +383,24 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; NRDYENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_NRDYInterruptPIPE0(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
\
USB200.NRDYSTS = \
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
\
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.NRDYSTS; \
extern "C" {
void usb0_function_NRDYInterruptPIPE0(
uint16_t status,
uint16_t intenb,
USBHAL *object,
void (USBHAL::*EP0func)(void)
)
{
volatile uint16_t dumy_sts;
USB200.NRDYSTS =
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.NRDYSTS;
}
}
/******************************************************************************
* Function Name: usb0_function_NRDYInterrupt
@ -357,16 +409,124 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; NRDYENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_NRDYInterrupt(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
\
usb0_function_nrdy_int(status, intenb); \
\
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.NRDYSTS; \
}
extern "C" {
void usb0_function_NRDYInterrupt(
uint16_t status,
uint16_t intenb,
USBHAL *object,
bool (USBHAL::*epCallback[])(void)
)
{
volatile uint16_t dumy_sts;
/**************************************************************
* Function Name: usb0_function_nrdy_int
* Description : Executes NRDY interrupt(USB_FUNCTION_PIPE1-9).
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
* : regards the pipe state as STALL and ends the processing.
* : Then the cause is not STALL, increments the error count to
* : communicate again. When the error count is 3, determines
* : the pipe state as DEVDRV_USBF_PIPE_NORES and ends the processing.
* : This function is executed in the NRDY interrupt handler.
* : This function clears NRDY interrupt status.
* Arguments : uint16_t status ; NRDYSTS Register Value
* : uint16_t int_enb ; NRDYENB Register Value
* Return Value : none
*************************************************************/
/* copied from usb0_function_intrn.c */
#if 0
uint16_t usefifo;
#endif
uint16_t pid;
uint16_t pipe;
uint16_t bitcheck;
#if 0
uint16_t mbw;
uint32_t size;
#endif
uint16_t ep;
bitcheck = (uint16_t)(status & intenb);
USB200.NRDYSTS = (uint16_t)~status;
if (RZA_IO_RegRead_16(&USB200.SYSCFG0, USB_SYSCFG_DCFM_SHIFT, USB_SYSCFG_DCFM) == 1) {
/* USB HOST */
/* not support */
} else {
/* USB Function */
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
if ((bitcheck&g_usb0_function_bit_set[pipe]) != g_usb0_function_bit_set[pipe]) {
continue;
}
if (g_usb0_function_pipe_status[pipe] != DEVDRV_USBF_PIPE_WAIT) {
continue;
}
#if 0
usb0_function_set_pid_nak(pipe);
size = (uint32_t)g_usb0_function_data_count[pipe];
mbw = usb0_function_get_mbw(
size, (uint32_t)g_usb0_function_data_pointer[pipe]);
usefifo = (uint16_t)(g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE);
switch (usefifo) {
case USB_FUNCTION_D0FIFO_USE:
usb0_function_set_curpipe(
pipe, USB_FUNCTION_D0USE, DEVDRV_USBF_NO, mbw);
USB200.D0FIFOCTR = USB_FUNCTION_BITBCLR;
break;
case USB_FUNCTION_D1FIFO_USE:
usb0_function_set_curpipe(
pipe, USB_FUNCTION_D1USE, DEVDRV_USBF_NO, mbw);
USB200.D1FIFOCTR = USB_FUNCTION_BITBCLR;
break;
default:
usb0_function_set_curpipe(
pipe, USB_FUNCTION_CUSE, USB_FUNCTION_CFIFO_READ, mbw);
USB200.CFIFOCTR = USB_FUNCTION_BITBCLR;
break;
}
usb0_function_aclrm(pipe);
usb0_function_enable_nrdy_int(pipe);
usb0_function_enable_brdy_int(pipe);
usb0_function_set_pid_buf(pipe);
#endif
pid = usb0_function_get_pid(pipe);
if ((pid == DEVDRV_USBF_PID_STALL) || (pid == DEVDRV_USBF_PID_STALL2)) {
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
} else {
usb0_function_set_pid_buf(pipe);
}
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
ep <<= 1;
if (RZA_IO_RegRead_16(
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
/* read */
__nop();
} else {
/* write */
__nop();
}
}
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.NRDYSTS;
}
}
/******************************************************************************
* Function Name: usb0_function_BEMPInterruptPIPE0
@ -375,22 +535,29 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; BEMPENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_BEMPInterruptPIPE0(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
\
USB200.BEMPSTS = \
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0]; \
RZA_IO_RegWrite_16( \
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0, \
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE); \
\
/*usb0_function_write_buffer_c(USB_FUNCTION_PIPE0);*/ \
EP0in(); \
\
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.BEMPSTS; \
extern "C" {
void usb0_function_BEMPInterruptPIPE0(
uint16_t status,
uint16_t intenb,
USBHAL *object,
void (USBHAL::*EP0func)(void)
)
{
volatile uint16_t dumy_sts;
USB200.BEMPSTS =
(uint16_t)~g_usb0_function_bit_set[USB_FUNCTION_PIPE0];
RZA_IO_RegWrite_16(
&USB200.CFIFOSEL, USB_FUNCTION_PIPE0,
USB_CFIFOSEL_CURPIPE_SHIFT, USB_CFIFOSEL_CURPIPE);
/*usb0_function_write_buffer_c(USB_FUNCTION_PIPE0);*/
(object->*EP0func)();
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BEMPSTS;
}
}
/******************************************************************************
@ -400,16 +567,84 @@ volatile static uint16_t recv_error;
* : uint16_t intenb ; BEMPENB Register Value
* Return Value : none
*****************************************************************************/
#define usb0_function_BEMPInterrupt(status, intenb) \
{ \
volatile uint16_t dumy_sts; \
\
usb0_function_bemp_int(status, intenb); \
\
/* Three dummy reads for clearing interrupt requests */ \
dumy_sts = USB200.BEMPSTS; \
}
extern "C" {
void usb0_function_BEMPInterrupt(
uint16_t status,
uint16_t intenb,
USBHAL *object,
bool (USBHAL::*epCallback[])(void)
)
{
volatile uint16_t dumy_sts;
/**************************************************************
* Function Name: usb0_function_bemp_int
* Description : Executes BEMP interrupt(USB_FUNCTION_PIPE1-9).
* Arguments : uint16_t status ; BEMPSTS Register Value
* : uint16_t intenb ; BEMPENB Register Value
* Return Value : none
*************************************************************/
/* copied from usb0_function_intrn.c */
uint16_t pid;
uint16_t pipe;
uint16_t bitcheck;
uint16_t inbuf;
uint16_t ep;
bitcheck = (uint16_t)(status & intenb);
USB200.BEMPSTS = (uint16_t)~status;
for (pipe = USB_FUNCTION_PIPE1; pipe <= USB_FUNCTION_MAX_PIPE_NO; pipe++) {
if ((bitcheck&g_usb0_function_bit_set[pipe]) != g_usb0_function_bit_set[pipe]) {
continue;
}
pid = usb0_function_get_pid(pipe);
if ((pid == DEVDRV_USBF_PID_STALL) ||
(pid == DEVDRV_USBF_PID_STALL2)) {
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_STALL;
} else {
inbuf = usb0_function_get_inbuf(pipe);
if (inbuf == 0) {
usb0_function_disable_bemp_int(pipe);
usb0_function_set_pid_nak(pipe);
g_usb0_function_pipe_status[pipe] = DEVDRV_USBF_PIPE_DONE;
switch (g_usb0_function_PipeTbl[pipe] & USB_FUNCTION_FIFO_USE) {
case USB_FUNCTION_D0FIFO_DMA:
/*now, DMA is not supported*/
break;
case USB_FUNCTION_D1FIFO_DMA:
/*now, DMA is not supported*/
break;
default:
ep = (g_usb0_function_pipecfg[pipe] & USB_PIPECFG_EPNUM) >> USB_PIPECFG_EPNUM_SHIFT;
ep <<= 1;
if (RZA_IO_RegRead_16(
&g_usb0_function_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0) {
/* read */
__nop();
} else {
/* write */
EPx_read_status = DEVDRV_USBF_PIPE_WAIT;
(object->*(epCallback[ep - 2 + 1])) ();
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
}
}
}
}
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BEMPSTS;
}
}
/******************************************************************************
* Function Name: EP2PIPE
@ -440,7 +675,7 @@ volatile static uint16_t recv_error;
*bufO++ = USB200.USBINDX; \
/*data[6] data[6] <= wIndex*/ \
*bufO++ = USB200.USBLENG; \
}
}
/*************************************************************************/
@ -452,13 +687,17 @@ volatile static uint16_t recv_error;
USBHAL::USBHAL(void)
{
/* ---- P4_1 : P4_1 (USB0_EN for GR-PEACH) ---- */
usb0_en = new DigitalOut(P4_1, 1);
//usb0_en = new DigitalOut(P4_1, 1);
/* some constants */
int_id = USBI0_IRQn;
int_level = ( 2 << 3 );
clock_mode = USBFCLOCK_X1_48MHZ;
#if 1
mode = USB_FUNCTION_HIGH_SPEED;
#else
mode = USB_FUNCTION_FULL_SPEED;
#endif
EP0_read_status = DEVDRV_USBF_WRITEEND;
EPx_read_status = DEVDRV_USBF_PIPE_DONE;
@ -572,7 +811,7 @@ USBHAL::~USBHAL(void)
/* Unregisters interrupt function and priority */
InterruptHandlerRegister( int_id, (uint32_t)NULL );
usb0_en = NULL;
//usb0_en = NULL;
instance = NULL;
}
@ -580,7 +819,7 @@ USBHAL::~USBHAL(void)
void USBHAL::connect(void)
{
/* Activates USB0_EN */
(*usb0_en) = 0;
//(*usb0_en) = 0;
}
@ -588,7 +827,7 @@ void USBHAL::connect(void)
void USBHAL::disconnect(void)
{
/* Deactivates USB0_EN */
(*usb0_en) = 1;
//(*usb0_en) = 1;
}
@ -790,15 +1029,19 @@ EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t max_size)
EP_STATUS status = EP_COMPLETED;
pipe_status = usb0_api_function_check_pipe_status(pipe, &pipe_size);
pipe_size = (max_size < pipe_size)? (max_size): (pipe_size);
if (pipe_status == DEVDRV_USBF_PIPE_IDLE) {
usb0_api_function_set_pid_nak(pipe);
usb0_api_function_clear_pipe_status(pipe);
switch (pipe_status) {
case DEVDRV_USBF_PIPE_IDLE:
case DEVDRV_USBF_PIPE_WAIT:
usb0_api_function_set_pid_nak(pipe);
usb0_api_function_clear_pipe_status(pipe);
usb0_api_function_start_receive_transfer(pipe, pipe_size, recv_buffer);
} else {
status = EP_PENDING;
usb0_api_function_start_receive_transfer(pipe, max_size, recv_buffer);
break;
default:
status = EP_PENDING;
break;
}
return status;
@ -819,14 +1062,18 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t
}
pipe_status = usb0_api_function_check_pipe_status(pipe, bytes_read);
if (pipe_status == DEVDRV_USBF_PIPE_IDLE) {
return EP_COMPLETED;
}
if (pipe_status == DEVDRV_USBF_PIPE_DONE) {
return EP_COMPLETED;
}
if (pipe_status != DEVDRV_USBF_PIPE_WAIT) {
return status;
switch (pipe_status) {
case DEVDRV_USBF_PIPE_IDLE:
return EP_COMPLETED;
case DEVDRV_USBF_PIPE_DONE:
return EP_COMPLETED;
case DEVDRV_USBF_PIPE_WAIT:
break;
default:
return status;
}
/* sets the output buffer and size */
@ -835,10 +1082,30 @@ EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t *buffer, uint32_t
/* receives data from pipe */
err = usb0_function_read_buffer(pipe);
recv_error = err;
switch (err) {
case USB_FUNCTION_READEND:
case USB_FUNCTION_READSHRT:
case USB_FUNCTION_READOVER:
*bytes_read = g_usb0_function_PipeDataSize[pipe];
break;
case USB_FUNCTION_READING:
case DEVDRV_USBF_FIFOERROR:
break;
}
pipe_status = usb0_api_function_check_pipe_status(pipe, bytes_read);
if (pipe_status == DEVDRV_USBF_PIPE_DONE) {
status = EP_COMPLETED;
switch (pipe_status) {
case DEVDRV_USBF_PIPE_DONE:
status = EP_COMPLETED;
break;
case DEVDRV_USBF_PIPE_IDLE:
case DEVDRV_USBF_PIPE_NORES:
case DEVDRV_USBF_PIPE_STALL:
case DEVDRV_USBF_FIFOERROR:
default:
break;
}
return status;
@ -1112,19 +1379,19 @@ void USBHAL::usbisr(void)
(int_enb0 & USB_FUNCTION_BITBEMP) &&
((int_sts3 & int_enb4) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
/* ==== BEMP PIPE0 ==== */
usb0_function_BEMPInterruptPIPE0(int_sts3, int_enb4);
usb0_function_BEMPInterruptPIPE0(int_sts3, int_enb4, this, &USBHAL::EP0in);
} else if (
(int_sts0 & USB_FUNCTION_BITBRDY) &&
(int_enb0 & USB_FUNCTION_BITBRDY) &&
((int_sts1 & int_enb2) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
/* ==== BRDY PIPE0 ==== */
usb0_function_BRDYInterruptPIPE0(int_sts1, int_enb2);
usb0_function_BRDYInterruptPIPE0(int_sts1, int_enb2, this, &USBHAL::EP0out);
} else if (
(int_sts0 & USB_FUNCTION_BITNRDY) &&
(int_enb0 & USB_FUNCTION_BITNRDY) &&
((int_sts2 & int_enb3) & g_usb0_function_bit_set[USB_FUNCTION_PIPE0])) {
/* ==== NRDY PIPE0 ==== */
usb0_function_NRDYInterruptPIPE0(int_sts2, int_enb3);
usb0_function_NRDYInterruptPIPE0(int_sts2, int_enb3, this, NULL);
} else if (
(int_sts0 & USB_FUNCTION_BITCTRT) && (int_enb0 & USB_FUNCTION_BITCTRE)) {
int_sts0 = USB200.INTSTS0;
@ -1198,19 +1465,19 @@ void USBHAL::usbisr(void)
(int_enb0 & USB_FUNCTION_BITBEMP) &&
(int_sts3 & int_enb4) ) {
/* ==== BEMP PIPEx ==== */
usb0_function_BEMPInterrupt(int_sts3, int_enb4);
usb0_function_BEMPInterrupt(int_sts3, int_enb4, this, epCallback);
} else if (
(int_sts0 & USB_FUNCTION_BITBRDY) &&
(int_enb0 & USB_FUNCTION_BITBRDY) &&
(int_sts1 & int_enb2) ) {
/* ==== BRDY PIPEx ==== */
usb0_function_BRDYInterrupt(int_sts1, int_enb2);
usb0_function_BRDYInterrupt(int_sts1, int_enb2, this, epCallback);
} else if (
(int_sts0 & USB_FUNCTION_BITNRDY) &&
(int_enb0 & USB_FUNCTION_BITNRDY) &&
(int_sts2 & int_enb3)) {
/* ==== NRDY PIPEx ==== */
usb0_function_NRDYInterrupt(int_sts2, int_enb3);
usb0_function_NRDYInterrupt(int_sts2, int_enb3, this, epCallback);
} else {
/* Do Nothing */
}

332
libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/inc/devdrv_usb_host_api.h Normal file
View File

@ -0,0 +1,332 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : devdrv_usb_host_api.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#ifndef USB_HOST_API_H
#define USB_HOST_API_H
#include "r_typedefs.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
#define USB_HOST_PORTNUM (2)
#define USB_HOST_ELT_INTERRUPT_LEVEL (9)
#define USBHCLOCK_X1_48MHZ (0x0000u) /* USB_X1_48MHz */
#define USBHCLOCK_EXTAL_12MHZ (0x0004u) /* EXTAL_12MHz */
#define USB_HOST_MAX_DEVICE (10)
#define USB_HOST_ON (1)
#define USB_HOST_OFF (0)
#define USB_HOST_YES (1)
#define USB_HOST_NO (0)
#define USB_HOST_NON_SPEED (0)
#define USB_HOST_LOW_SPEED (1)
#define USB_HOST_FULL_SPEED (2)
#define USB_HOST_HIGH_SPEED (3)
/* DEVDRV_SUCCESS(0) & DEVDRV_ERROR(-1) is dev_drv.h */
#define DEVDRV_USBH_STALL (-2)
#define DEVDRV_USBH_TIMEOUT (-3)
#define DEVDRV_USBH_NAK_TIMEOUT (-4)
#define DEVDRV_USBH_DETACH_ERR (-5)
#define DEVDRV_USBH_SETUP_ERR (-6)
#define DEVDRV_USBH_CTRL_COM_ERR (-7)
#define DEVDRV_USBH_COM_ERR (-8)
#define DEVDRV_USBH_DEV_ADDR_ERR (-9)
#define USB_HOST_ATTACH (1)
#define USB_HOST_DETACH (0)
#define USB_HOST_MAX_PIPE_NO (9u)
#define USB_HOST_PIPE0 (0)
#define USB_HOST_PIPE1 (1)
#define USB_HOST_PIPE2 (2)
#define USB_HOST_PIPE3 (3)
#define USB_HOST_PIPE4 (4)
#define USB_HOST_PIPE5 (5)
#define USB_HOST_PIPE6 (6)
#define USB_HOST_PIPE7 (7)
#define USB_HOST_PIPE8 (8)
#define USB_HOST_PIPE9 (9)
#define USB_HOST_ISO (0xc000u)
#define USB_HOST_INTERRUPT (0x8000u)
#define USB_HOST_BULK (0x4000u)
#define USB_HOST_PIPE_IDLE (0x00)
#define USB_HOST_PIPE_WAIT (0x01)
#define USB_HOST_PIPE_DONE (0x02)
#define USB_HOST_PIPE_NORES (0x03)
#define USB_HOST_PIPE_STALL (0x04)
#define USB_HOST_PIPE_ERROR (0x05)
#define USB_HOST_NONE (0x0000u)
#define USB_HOST_BFREFIELD (0x0400u)
#define USB_HOST_BFREON (0x0400u)
#define USB_HOST_BFREOFF (0x0000u)
#define USB_HOST_DBLBFIELD (0x0200u)
#define USB_HOST_DBLBON (0x0200u)
#define USB_HOST_DBLBOFF (0x0000u)
#define USB_HOST_CNTMDFIELD (0x0100u)
#define USB_HOST_CNTMDON (0x0100u)
#define USB_HOST_CNTMDOFF (0x0000u)
#define USB_HOST_SHTNAKON (0x0080u)
#define USB_HOST_SHTNAKOFF (0x0000u)
#define USB_HOST_DIRFIELD (0x0010u)
#define USB_HOST_DIR_H_OUT (0x0010u)
#define USB_HOST_DIR_H_IN (0x0000u)
#define USB_HOST_EPNUMFIELD (0x000fu)
#define USB_HOST_CUSE (0)
#define USB_HOST_D0USE (1)
#define USB_HOST_D0DMA (2)
#define USB_HOST_D1USE (3)
#define USB_HOST_D1DMA (4)
#define USB_HOST_CFIFO_USE (0x0000)
#define USB_HOST_D0FIFO_USE (0x1000)
#define USB_HOST_D1FIFO_USE (0x2000)
#define USB_HOST_D0FIFO_DMA (0x5000)
#define USB_HOST_D1FIFO_DMA (0x6000)
#define USB_HOST_BUF2FIFO (0)
#define USB_HOST_FIFO2BUF (1)
#define USB_HOST_DRV_DETACHED (0x0000)
#define USB_HOST_DRV_ATTACHED (0x0001)
#define USB_HOST_DRV_GET_DEVICE_DESC_64 (0x0002)
#define USB_HOST_DRV_POWERED (0x0003)
#define USB_HOST_DRV_DEFAULT (0x0004)
#define USB_HOST_DRV_SET_ADDRESS (0x0005)
#define USB_HOST_DRV_ADDRESSED (0x0006)
#define USB_HOST_DRV_GET_DEVICE_DESC_18 (0x0007)
#define USB_HOST_DRV_GET_CONGIG_DESC_9 (0x0008)
#define USB_HOST_DRV_GET_CONGIG_DESC (0x0009)
#define USB_HOST_DRV_SET_CONFIG (0x000a)
#define USB_HOST_DRV_CONFIGURED (0x000b)
#define USB_HOST_DRV_SUSPEND (0x1000)
#define USB_HOST_DRV_NORES (0x0100)
#define USB_HOST_DRV_STALL (0x0200)
#define USB_HOST_TESTMODE_FORCE (0x000du)
#define USB_HOST_TESTMODE_TESTPACKET (0x000cu)
#define USB_HOST_TESTMODE_SE0_NAK (0x000bu)
#define USB_HOST_TESTMODE_K (0x000au)
#define USB_HOST_TESTMODE_J (0x0009u)
#define USB_HOST_TESTMODE_NORMAL (0x0000u)
#define USB_HOST_DT_DEVICE (0x01)
#define USB_HOST_DT_CONFIGURATION (0x02)
#define USB_HOST_DT_STRING (0x03)
#define USB_HOST_DT_INTERFACE (0x04)
#define USB_HOST_DT_ENDPOINT (0x05)
#define USB_HOST_DT_DEVICE_QUALIFIER (0x06)
#define USB_HOST_DT_OTHER_SPEED_CONFIGURATION (0x07)
#define USB_HOST_DT_INTERFACE_POWER (0x08)
#define USB_HOST_IF_CLS_NOT (0x00)
#define USB_HOST_IF_CLS_AUDIO (0x01)
#define USB_HOST_IF_CLS_CDC_CTRL (0x02)
#define USB_HOST_IF_CLS_HID (0x03)
#define USB_HOST_IF_CLS_PHYSICAL (0x05)
#define USB_HOST_IF_CLS_IMAGE (0x06)
#define USB_HOST_IF_CLS_PRINTER (0x07)
#define USB_HOST_IF_CLS_MASS (0x08)
#define USB_HOST_IF_CLS_HUB (0x09)
#define USB_HOST_IF_CLS_CDC_DATA (0x0a)
#define USB_HOST_IF_CLS_CRAD (0x0b)
#define USB_HOST_IF_CLS_CONTENT (0x0d)
#define USB_HOST_IF_CLS_VIDEO (0x0e)
#define USB_HOST_IF_CLS_DIAG (0xdc)
#define USB_HOST_IF_CLS_WIRELESS (0xe0)
#define USB_HOST_IF_CLS_APL (0xfe)
#define USB_HOST_IF_CLS_VENDOR (0xff)
#define USB_HOST_IF_CLS_HELE (0xaa)
#define USB_HOST_EP_DIR_MASK (0x80)
#define USB_HOST_EP_OUT (0x00)
#define USB_HOST_EP_IN (0x80)
#define USB_HOST_EP_TYPE (0x03)
#define USB_HOST_EP_CNTRL (0x00)
#define USB_HOST_EP_ISO (0x01)
#define USB_HOST_EP_BULK (0x02)
#define USB_HOST_EP_INT (0x03)
#define USB_HOST_EP_NUM_MASK (0x0f)
#define USB_HOST_PIPE_IN (0)
#define USB_HOST_PIPE_OUT (1)
#define USB_END_POINT_ERROR (0xffff)
#define USB_HOST_REQ_GET_STATUS (0x0000)
#define USB_HOST_REQ_CLEAR_FEATURE (0x0100)
#define USB_HOST_REQ_RESERVED2 (0x0200)
#define USB_HOST_REQ_SET_FEATURE (0x0300)
#define USB_HOST_REQ_RESERVED4 (0x0400)
#define USB_HOST_REQ_SET_ADDRESS (0x0500)
#define USB_HOST_REQ_GET_DESCRIPTOR (0x0600)
#define USB_HOST_REQ_SET_DESCRIPTOR (0x0700)
#define USB_HOST_REQ_GET_CONFIGURATION (0x0800)
#define USB_HOST_REQ_SET_CONFIGURATION (0x0900)
#define USB_HOST_REQ_GET_INTERFACE (0x0a00)
#define USB_HOST_REQ_SET_INTERFACE (0x0b00)
#define USB_HOST_REQ_SYNCH_FRAME (0x0c00)
#define USB_HOST_REQTYPE_HOST_TO_DEVICE (0x0000)
#define USB_HOST_REQTYPE_DEVICE_TO_HOST (0x0080)
#define USB_HOST_REQTYPE_STANDARD (0x0020)
#define USB_HOST_REQTYPE_CLASS (0x0040)
#define USB_HOST_REQTYPE_VENDOR (0x0060)
#define USB_HOST_REQTYPE_DEVICE (0x0000)
#define USB_HOST_REQTYPE_INTERFACE (0x0001)
#define USB_HOST_REQTYPE_ENDPOINT (0x0002)
#define USB_HOST_REQTYPE_OTHER (0x0003)
#define USB_HOST_DESCTYPE_DEVICE (0x0100)
#define USB_HOST_DESCTYPE_CONFIGURATION (0x0200)
#define USB_HOST_DESCTYPE_STRING (0x0300)
#define USB_HOST_DESCTYPE_INTERFACE (0x0400)
#define USB_HOST_DESCTYPE_ENDPOINT (0x0500)
#define USB_HOST_DESCTYPE_DEVICE_QUALIFIER (0x0600)
#define USB_HOST_DESCTYPE_OTHER_SPEED_CONFIGURATION (0x0700)
#define USB_HOST_DESCTYPE_INTERFACE_POWER (0x0800)
/*******************************************************************************
Variable Externs
*******************************************************************************/
typedef struct
{
uint16_t pipe_number;
uint16_t pipe_cfg;
uint16_t pipe_buf;
uint16_t pipe_max_pktsize;
uint16_t pipe_cycle;
uint16_t fifo_port;
} USB_HOST_CFG_PIPETBL_t;
typedef struct
{
uint32_t fifo;
uint32_t buffer;
uint32_t bytes;
uint32_t dir;
uint32_t size;
} USB_HOST_DMA_t;
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
uint16_t R_USB_api_host_init(uint16_t root, uint8_t int_level, uint16_t mode, uint16_t clockmode);
int32_t R_USB_api_host_enumeration(uint16_t root, uint16_t devadr);
int32_t R_USB_api_host_detach(uint16_t root);
int32_t R_USB_api_host_data_in(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
int32_t R_USB_api_host_data_in2(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf, uint32_t *bytes);
int32_t R_USB_api_host_data_out(uint16_t root, uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
int32_t R_USB_api_host_control_transfer(uint16_t root, uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
int32_t R_USB_api_host_set_endpoint(uint16_t root, uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor);
int32_t R_USB_api_host_clear_endpoint(uint16_t root, USB_HOST_CFG_PIPETBL_t *user_table);
int32_t R_USB_api_host_clear_endpoint_pipe(uint16_t root, uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table);
uint16_t R_USB_api_host_SetEndpointTable(uint16_t root, uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table);
int32_t R_USB_api_host_GetDeviceDescriptor(uint16_t root, uint16_t devadr, uint16_t size, uint8_t *buf);
int32_t R_USB_api_host_GetConfigDescriptor(uint16_t root, uint16_t devadr, uint16_t size, uint8_t *buf);
int32_t R_USB_api_host_SetConfig(uint16_t root, uint16_t devadr, uint16_t confignum);
int32_t R_USB_api_host_SetInterface(uint16_t root, uint16_t devadr, uint16_t interface_alt, uint16_t interface_index);
int32_t R_USB_api_host_ClearStall(uint16_t root, uint16_t devadr, uint16_t ep_dir);
uint16_t R_USB_api_host_GetUsbDeviceState(uint16_t root);
void R_USB_api_host_elt_clocksel(uint16_t clockmode);
void R_USB_api_host_elt_4_4(uint16_t root);
void R_USB_api_host_elt_4_5(uint16_t root);
void R_USB_api_host_elt_4_6(uint16_t root);
void R_USB_api_host_elt_4_7(uint16_t root);
void R_USB_api_host_elt_4_8(uint16_t root);
void R_USB_api_host_elt_4_9(uint16_t root);
void R_USB_api_host_elt_get_desc(uint16_t root);
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host_api.h"
#if(1) /* ohci_wrapp */
#else
#include "usb1_host_api.h"
#endif
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
#ifdef USB0_HOST_API_H
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void);
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void);
void Userdef_USB_usb0_host_attach(void);
void Userdef_USB_usb0_host_detach(void);
void Userdef_USB_usb0_host_delay_1ms(void);
void Userdef_USB_usb0_host_delay_xms(uint32_t msec);
void Userdef_USB_usb0_host_delay_10us(uint32_t usec);
void Userdef_USB_usb0_host_delay_500ns(void);
void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t * dma, uint16_t dfacc);
uint32_t Userdef_USB_usb0_host_stop_dma0(void);
uint32_t Userdef_USB_usb0_host_stop_dma1(void);
void Userdef_USB_usb0_host_notice(const char * format);
void Userdef_USB_usb0_host_user_rdy(const char * format, uint16_t data);
#endif
#ifdef USB1_HOST_API_H
uint16_t Userdef_USB_usb1_host_d0fifo_dmaintid(void);
uint16_t Userdef_USB_usb1_host_d1fifo_dmaintid(void);
void Userdef_USB_usb1_host_attach(void);
void Userdef_USB_usb1_host_detach(void);
void Userdef_USB_usb1_host_delay_1ms(void);
void Userdef_USB_usb1_host_delay_xms(uint32_t msec);
void Userdef_USB_usb1_host_delay_10us(uint32_t usec);
void Userdef_USB_usb1_host_delay_500ns(void);
void Userdef_USB_usb1_host_start_dma(USB_HOST_DMA_t * dma, uint16_t dfacc);
uint32_t Userdef_USB_usb1_host_stop_dma0(void);
uint32_t Userdef_USB_usb1_host_stop_dma1(void);
void Userdef_USB_usb1_host_notice(const char * format);
void Userdef_USB_usb1_host_user_rdy(const char * format, uint16_t data);
#endif
#endif /* USB_HOST_API_H */
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#ifndef USB0_HOST_H
#define USB0_HOST_H
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "devdrv_usb_host_api.h"
#include "usb_host.h"
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
extern const uint16_t g_usb0_host_bit_set[];
extern uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
extern uint8_t *g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
extern uint16_t g_usb0_host_PipeIgnore[];
extern uint16_t g_usb0_host_PipeTbl[];
extern uint16_t g_usb0_host_pipe_status[];
extern uint32_t g_usb0_host_PipeDataSize[];
extern USB_HOST_DMA_t g_usb0_host_DmaInfo[];
extern uint16_t g_usb0_host_DmaPipe[];
extern uint16_t g_usb0_host_DmaBval[];
extern uint16_t g_usb0_host_DmaStatus[];
extern uint16_t g_usb0_host_driver_state;
extern uint16_t g_usb0_host_ConfigNum;
extern uint16_t g_usb0_host_CmdStage;
extern uint16_t g_usb0_host_bchg_flag;
extern uint16_t g_usb0_host_detach_flag;
extern uint16_t g_usb0_host_attach_flag;
extern uint16_t g_usb0_host_UsbAddress;
extern uint16_t g_usb0_host_setUsbAddress;
extern uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
extern uint16_t g_usb0_host_UsbDeviceSpeed;
extern uint16_t g_usb0_host_SupportUsbDeviceSpeed;
extern uint16_t g_usb0_host_SavReq;
extern uint16_t g_usb0_host_SavVal;
extern uint16_t g_usb0_host_SavIndx;
extern uint16_t g_usb0_host_SavLen;
extern uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
extern uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
extern uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
extern uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
/*******************************************************************************
Functions Prototypes
*******************************************************************************/
/* ==== common ==== */
void usb0_host_dma_stop_d0(uint16_t pipe, uint32_t remain);
void usb0_host_dma_stop_d1(uint16_t pipe, uint32_t remain);
uint16_t usb0_host_is_hispeed(void);
uint16_t usb0_host_is_hispeed_enable(void);
uint16_t usb0_host_start_send_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
uint16_t usb0_host_write_buffer(uint16_t pipe);
uint16_t usb0_host_write_buffer_c(uint16_t pipe);
uint16_t usb0_host_write_buffer_d0(uint16_t pipe);
uint16_t usb0_host_write_buffer_d1(uint16_t pipe);
void usb0_host_start_receive_transfer(uint16_t pipe, uint32_t size, uint8_t *data);
uint16_t usb0_host_read_buffer(uint16_t pipe);
uint16_t usb0_host_read_buffer_c(uint16_t pipe);
uint16_t usb0_host_read_buffer_d0(uint16_t pipe);
uint16_t usb0_host_read_buffer_d1(uint16_t pipe);
uint16_t usb0_host_change_fifo_port(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
void usb0_host_set_curpipe(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw);
void usb0_host_set_curpipe2(uint16_t pipe, uint16_t fifosel, uint16_t isel, uint16_t mbw, uint16_t dfacc);
uint16_t usb0_host_get_mbw(uint32_t trncount, uint32_t dtptr);
uint16_t usb0_host_read_dma(uint16_t pipe);
void usb0_host_stop_transfer(uint16_t pipe);
void usb0_host_brdy_int(uint16_t status, uint16_t int_enb);
void usb0_host_nrdy_int(uint16_t status, uint16_t int_enb);
void usb0_host_bemp_int(uint16_t status, uint16_t int_enb);
void usb0_host_setting_interrupt(uint8_t level);
void usb0_host_reset_module(uint16_t clockmode);
uint16_t usb0_host_get_buf_size(uint16_t pipe);
uint16_t usb0_host_get_mxps(uint16_t pipe);
void usb0_host_enable_brdy_int(uint16_t pipe);
void usb0_host_disable_brdy_int(uint16_t pipe);
void usb0_host_clear_brdy_sts(uint16_t pipe);
void usb0_host_enable_bemp_int(uint16_t pipe);
void usb0_host_disable_bemp_int(uint16_t pipe);
void usb0_host_clear_bemp_sts(uint16_t pipe);
void usb0_host_enable_nrdy_int(uint16_t pipe);
void usb0_host_disable_nrdy_int(uint16_t pipe);
void usb0_host_clear_nrdy_sts(uint16_t pipe);
void usb0_host_set_pid_buf(uint16_t pipe);
void usb0_host_set_pid_nak(uint16_t pipe);
void usb0_host_set_pid_stall(uint16_t pipe);
void usb0_host_clear_pid_stall(uint16_t pipe);
uint16_t usb0_host_get_pid(uint16_t pipe);
void usb0_host_set_sqclr(uint16_t pipe);
void usb0_host_set_sqset(uint16_t pipe);
void usb0_host_set_csclr(uint16_t pipe);
void usb0_host_aclrm(uint16_t pipe);
void usb0_host_set_aclrm(uint16_t pipe);
void usb0_host_clr_aclrm(uint16_t pipe);
uint16_t usb0_host_get_sqmon(uint16_t pipe);
uint16_t usb0_host_get_inbuf(uint16_t pipe);
/* ==== host ==== */
void usb0_host_init_pipe_status(void);
int32_t usb0_host_CtrlTransStart(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
void usb0_host_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
void usb0_host_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
uint16_t usb0_host_CtrlWriteStart(uint32_t Bsize, uint8_t *Table);
void usb0_host_StatusStage(void);
void usb0_host_get_devadd(uint16_t addr, uint16_t *devadd);
void usb0_host_set_devadd(uint16_t addr, uint16_t *devadd);
void usb0_host_InitModule(void);
uint16_t usb0_host_CheckAttach(void);
void usb0_host_UsbDetach(void);
void usb0_host_UsbDetach2(void);
void usb0_host_UsbAttach(void);
uint16_t usb0_host_UsbBusReset(void);
int32_t usb0_host_UsbResume(void);
int32_t usb0_host_UsbSuspend(void);
void usb0_host_Enable_DetachINT(void);
void usb0_host_Disable_DetachINT(void);
void usb0_host_UsbStateManager(void);
#endif /* USB0_HOST_H */
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_api.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#ifndef USB0_HOST_API_H
#define USB0_HOST_API_H
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Variable Externs
*******************************************************************************/
/*******************************************************************************
Functions Prototypes
*******************************************************************************/
void usb0_host_interrupt(uint32_t int_sense);
void usb0_host_dma_interrupt_d0fifo(uint32_t int_sense);
void usb0_host_dma_interrupt_d1fifo(uint32_t int_sense);
uint16_t usb0_api_host_init(uint8_t int_level, uint16_t mode, uint16_t clockmode);
int32_t usb0_api_host_enumeration(uint16_t devadr);
int32_t usb0_api_host_detach(void);
int32_t usb0_api_host_data_in(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
int32_t usb0_api_host_data_out(uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t *data_buf);
int32_t usb0_api_host_control_transfer(uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len, uint8_t *Buf);
int32_t usb0_api_host_set_endpoint(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t *configdescriptor);
int32_t usb0_api_host_clear_endpoint(USB_HOST_CFG_PIPETBL_t *user_table);
int32_t usb0_api_host_clear_endpoint_pipe(uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t *user_table);
uint16_t usb0_api_host_SetEndpointTable(uint16_t devadr, USB_HOST_CFG_PIPETBL_t *user_table, uint8_t* Table);
int32_t usb0_api_host_data_count(uint16_t pipe, uint32_t *data_count);
int32_t usb0_api_host_GetDeviceDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
int32_t usb0_api_host_GetConfigDescriptor(uint16_t devadr, uint16_t size, uint8_t *buf);
int32_t usb0_api_host_SetConfig(uint16_t devadr, uint16_t confignum);
int32_t usb0_api_host_SetInterface(uint16_t devadr, uint16_t interface_alt, uint16_t interface_index);
int32_t usb0_api_host_ClearStall(uint16_t devadr, uint16_t ep_dir);
uint16_t usb0_api_host_GetUsbDeviceState(void);
void usb0_api_host_elt_4_4(void);
void usb0_api_host_elt_4_5(void);
void usb0_api_host_elt_4_6(void);
void usb0_api_host_elt_4_7(void);
void usb0_api_host_elt_4_8(void);
void usb0_api_host_elt_4_9(void);
void usb0_api_host_elt_get_desc(void);
void usb0_host_EL_ModeInit(void);
void usb0_host_EL_SetUACT(void);
void usb0_host_EL_ClearUACT(void);
void usb0_host_EL_SetTESTMODE(uint16_t mode);
void usb0_host_EL_ClearNRDYSTS(uint16_t pipe);
uint16_t usb0_host_EL_GetINTSTS1(void);
void usb0_host_EL_UsbBusReset(void);
void usb0_host_EL_UsbAttach(void);
void usb0_host_EL_SetupStage(uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len);
void usb0_host_EL_StatusStage(void);
void usb0_host_EL_CtrlReadStart(uint32_t Bsize, uint8_t *Table);
int32_t usb0_host_EL_UsbSuspend(void);
int32_t usb0_host_EL_UsbResume(void);
#if 0 /* prototype in devdrv_usb_host_api.h */
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid(void);
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid(void);
void Userdef_USB_usb0_host_attach(void);
void Userdef_USB_usb0_host_detach(void);
void Userdef_USB_usb0_host_delay_1ms(void);
void Userdef_USB_usb0_host_delay_xms(uint32_t msec);
void Userdef_USB_usb0_host_delay_10us(uint32_t usec);
void Userdef_USB_usb0_host_delay_500ns(void);
void Userdef_USB_usb0_host_start_dma(USB_HOST_DMA_t *dma, uint16_t dfacc);
uint32_t Userdef_USB_usb0_host_stop_dma0(void);
uint32_t Userdef_USB_usb0_host_stop_dma1(void);
#endif
#endif /* USB0_HOST_API_H */
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_dmacdrv.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#ifndef USB0_HOST_DMACDRV_H
#define USB0_HOST_DMACDRV_H
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
/*******************************************************************************
Typedef definitions
*******************************************************************************/
typedef struct dmac_transinfo
{
uint32_t src_addr; /* Transfer source address */
uint32_t dst_addr; /* Transfer destination address */
uint32_t count; /* Transfer byte count */
uint32_t src_size; /* Transfer source data size */
uint32_t dst_size; /* Transfer destination data size */
uint32_t saddr_dir; /* Transfer source address direction */
uint32_t daddr_dir; /* Transfer destination address direction */
} dmac_transinfo_t;
/*******************************************************************************
Macro definitions
*******************************************************************************/
/* ==== Transfer specification of the sample program ==== */
#define DMAC_SAMPLE_SINGLE (0) /* Single transfer */
#define DMAC_SAMPLE_CONTINUATION (1) /* Continuous transfer (use REN bit) */
/* ==== DMA modes ==== */
#define DMAC_MODE_REGISTER (0) /* Register mode */
#define DMAC_MODE_LINK (1) /* Link mode */
/* ==== Transfer requests ==== */
#define DMAC_REQ_MODE_EXT (0) /* External request */
#define DMAC_REQ_MODE_PERI (1) /* On-chip peripheral module request */
#define DMAC_REQ_MODE_SOFT (2) /* Auto-request (request by software) */
/* ==== DMAC transfer sizes ==== */
#define DMAC_TRANS_SIZE_8 (0) /* 8 bits */
#define DMAC_TRANS_SIZE_16 (1) /* 16 bits */
#define DMAC_TRANS_SIZE_32 (2) /* 32 bits */
#define DMAC_TRANS_SIZE_64 (3) /* 64 bits */
#define DMAC_TRANS_SIZE_128 (4) /* 128 bits */
#define DMAC_TRANS_SIZE_256 (5) /* 256 bits */
#define DMAC_TRANS_SIZE_512 (6) /* 512 bits */
#define DMAC_TRANS_SIZE_1024 (7) /* 1024 bits */
/* ==== Address increment for transferring ==== */
#define DMAC_TRANS_ADR_NO_INC (1) /* Not increment */
#define DMAC_TRANS_ADR_INC (0) /* Increment */
/* ==== Method for detecting DMA request ==== */
#define DMAC_REQ_DET_FALL (0) /* Falling edge detection */
#define DMAC_REQ_DET_RISE (1) /* Rising edge detection */
#define DMAC_REQ_DET_LOW (2) /* Low level detection */
#define DMAC_REQ_DET_HIGH (3) /* High level detection */
/* ==== Request Direction ==== */
#define DMAC_REQ_DIR_SRC (0) /* DMAREQ is the source/ DMAACK is active when reading */
#define DMAC_REQ_DIR_DST (1) /* DMAREQ is the destination/ DMAACK is active when writing */
/* ==== Descriptors ==== */
#define DMAC_DESC_HEADER (0) /* Header */
#define DMAC_DESC_SRC_ADDR (1) /* Source Address */
#define DMAC_DESC_DST_ADDR (2) /* Destination Address */
#define DMAC_DESC_COUNT (3) /* Transaction Byte */
#define DMAC_DESC_CHCFG (4) /* Channel Confg */
#define DMAC_DESC_CHITVL (5) /* Channel Interval */
#define DMAC_DESC_CHEXT (6) /* Channel Extension */
#define DMAC_DESC_LINK_ADDR (7) /* Link Address */
/* ==== On-chip peripheral module requests ===== */
typedef enum dmac_request_factor
{
DMAC_REQ_USB0_DMA0_TX, /* USB_0 channel 0 transmit FIFO empty */
DMAC_REQ_USB0_DMA0_RX, /* USB_0 channel 0 receive FIFO full */
DMAC_REQ_USB0_DMA1_TX, /* USB_0 channel 1 transmit FIFO empty */
DMAC_REQ_USB0_DMA1_RX, /* USB_0 channel 1 receive FIFO full */
DMAC_REQ_USB1_DMA0_TX, /* USB_1 channel 0 transmit FIFO empty */
DMAC_REQ_USB1_DMA0_RX, /* USB_1 channel 0 receive FIFO full */
DMAC_REQ_USB1_DMA1_TX, /* USB_1 channel 1 transmit FIFO empty */
DMAC_REQ_USB1_DMA1_RX, /* USB_1 channel 1 receive FIFO full */
} dmac_request_factor_t;
/*******************************************************************************
Variable Externs
*******************************************************************************/
/*******************************************************************************
Functions Prototypes
*******************************************************************************/
void usb0_host_DMAC1_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
uint32_t request_factor, uint32_t req_direction);
int32_t usb0_host_DMAC1_Open(uint32_t req);
void usb0_host_DMAC1_Close(uint32_t * remain);
void usb0_host_DMAC1_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
void usb0_host_DMAC2_PeriReqInit(const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
uint32_t request_factor, uint32_t req_direction);
int32_t usb0_host_DMAC2_Open(uint32_t req);
void usb0_host_DMAC2_Close(uint32_t * remain);
void usb0_host_DMAC2_Load_Set(uint32_t src_addr, uint32_t dst_addr, uint32_t count);
#endif /* USB0_HOST_DMACDRV_H */
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb_host.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#ifndef USB_HOST_H
#define USB_HOST_H
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "r_typedefs.h"
#include "iodefine.h"
#include "rza_io_regrw.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
#define USB_HOST_DEVICE_0 (0u)
#define USB_HOST_DEVICE_1 (1u)
#define USB_HOST_DEVICE_2 (2u)
#define USB_HOST_DEVICE_3 (3u)
#define USB_HOST_DEVICE_4 (4u)
#define USB_HOST_DEVICE_5 (5u)
#define USB_HOST_DEVICE_6 (6u)
#define USB_HOST_DEVICE_7 (7u)
#define USB_HOST_DEVICE_8 (8u)
#define USB_HOST_DEVICE_9 (9u)
#define USB_HOST_DEVICE_10 (10u)
#define USB_HOST_ENDPOINT_DESC (0x05)
#define USB_HOST_BITUPLLE (0x0002u)
#define USB_HOST_BITUCKSEL (0x0004u)
#define USB_HOST_BITBWAIT (0x003fu)
#define USB_HOST_BUSWAIT_02 (0x0000u)
#define USB_HOST_BUSWAIT_03 (0x0001u)
#define USB_HOST_BUSWAIT_04 (0x0002u)
#define USB_HOST_BUSWAIT_05 (0x0003u)
#define USB_HOST_BUSWAIT_06 (0x0004u)
#define USB_HOST_BUSWAIT_07 (0x0005u)
#define USB_HOST_BUSWAIT_08 (0x0006u)
#define USB_HOST_BUSWAIT_09 (0x0007u)
#define USB_HOST_BUSWAIT_10 (0x0008u)
#define USB_HOST_BUSWAIT_11 (0x0009u)
#define USB_HOST_BUSWAIT_12 (0x000au)
#define USB_HOST_BUSWAIT_13 (0x000bu)
#define USB_HOST_BUSWAIT_14 (0x000cu)
#define USB_HOST_BUSWAIT_15 (0x000du)
#define USB_HOST_BUSWAIT_16 (0x000eu)
#define USB_HOST_BUSWAIT_17 (0x000fu)
#define USB_HOST_FS_JSTS (0x0001u)
#define USB_HOST_LS_JSTS (0x0002u)
#define USB_HOST_BITRST (0x0040u)
#define USB_HOST_BITRESUME (0x0020u)
#define USB_HOST_BITUACT (0x0010u)
#define USB_HOST_HSPROC (0x0004u)
#define USB_HOST_HSMODE (0x0003u)
#define USB_HOST_FSMODE (0x0002u)
#define USB_HOST_LSMODE (0x0001u)
#define USB_HOST_UNDECID (0x0000u)
#define USB_HOST_BITRCNT (0x8000u)
#define USB_HOST_BITDREQE (0x1000u)
#define USB_HOST_BITMBW (0x0c00u)
#define USB_HOST_BITMBW_8 (0x0000u)
#define USB_HOST_BITMBW_16 (0x0400u)
#define USB_HOST_BITMBW_32 (0x0800u)
#define USB_HOST_BITBYTE_LITTLE (0x0000u)
#define USB_HOST_BITBYTE_BIG (0x0100u)
#define USB_HOST_BITISEL (0x0020u)
#define USB_HOST_BITCURPIPE (0x000fu)
#define USB_HOST_CFIFO_READ (0x0000u)
#define USB_HOST_CFIFO_WRITE (0x0020u)
#define USB_HOST_BITBVAL (0x8000u)
#define USB_HOST_BITBCLR (0x4000u)
#define USB_HOST_BITFRDY (0x2000u)
#define USB_HOST_BITDTLN (0x0fffu)
#define USB_HOST_BITBEMPE (0x0400u)
#define USB_HOST_BITNRDYE (0x0200u)
#define USB_HOST_BITBRDYE (0x0100u)
#define USB_HOST_BITBEMP (0x0400u)
#define USB_HOST_BITNRDY (0x0200u)
#define USB_HOST_BITBRDY (0x0100u)
#define USB_HOST_BITBCHGE (0x4000u)
#define USB_HOST_BITDTCHE (0x1000u)
#define USB_HOST_BITATTCHE (0x0800u)
#define USB_HOST_BITEOFERRE (0x0040u)
#define USB_HOST_BITBCHG (0x4000u)
#define USB_HOST_BITDTCH (0x1000u)
#define USB_HOST_BITATTCH (0x0800u)
#define USB_HOST_BITEOFERR (0x0040u)
#define USB_HOST_BITSIGNE (0x0020u)
#define USB_HOST_BITSACKE (0x0010u)
#define USB_HOST_BITSIGN (0x0020u)
#define USB_HOST_BITSACK (0x0010u)
#define USB_HOST_BITSUREQ (0x4000u)
#define USB_HOST_BITSQSET (0x0080u)
#define USB_HOST_PID_STALL2 (0x0003u)
#define USB_HOST_PID_STALL (0x0002u)
#define USB_HOST_PID_BUF (0x0001u)
#define USB_HOST_PID_NAK (0x0000u)
#define USB_HOST_PIPExBUF (64u)
#define USB_HOST_D0FIFO (0)
#define USB_HOST_D1FIFO (1)
#define USB_HOST_DMA_READY (0)
#define USB_HOST_DMA_BUSY (1)
#define USB_HOST_DMA_BUSYEND (2)
#define USB_HOST_FIFO_USE (0x7000)
#define USB_HOST_FIFOERROR (0xffff)
#define USB_HOST_WRITEEND (0)
#define USB_HOST_WRITESHRT (1)
#define USB_HOST_WRITING (2)
#define USB_HOST_WRITEDMA (3)
#define USB_HOST_READEND (0)
#define USB_HOST_READSHRT (1)
#define USB_HOST_READING (2)
#define USB_HOST_READOVER (3)
#define USB_HOST_READZERO (4)
#define USB_HOST_CMD_IDLE (0x0000)
#define USB_HOST_CMD_DOING (0x0001)
#define USB_HOST_CMD_DONE (0x0002)
#define USB_HOST_CMD_NORES (0x0003)
#define USB_HOST_CMD_STALL (0x0004)
#define USB_HOST_CMD_FIELD (0x000f)
#if 0
#define USB_HOST_CHG_CMDFIELD( r, v ) do { r &= ( ~USB_HOST_CMD_FIELD ); \
r |= v; } while(0)
#endif
#define USB_HOST_MODE_WRITE (0x0100)
#define USB_HOST_MODE_READ (0x0200)
#define USB_HOST_MODE_NO_DATA (0x0300)
#define USB_HOST_MODE_FIELD (0x0f00)
#define USB_HOST_STAGE_SETUP (0x0010)
#define USB_HOST_STAGE_DATA (0x0020)
#define USB_HOST_STAGE_STATUS (0x0030)
#define USB_HOST_STAGE_FIELD (0x00f0)
#if 0
#define USB_HOST_CHG_STAGEFIELD( r, v ) do { r &= ( ~USB_HOST_STAGE_FIELD ); \
r |= v; } while(0)
#endif
#define USB_HOST_DEVADD_MASK (0x7fc0)
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
extern uint16_t g_usb_host_elt_clockmode;
#endif /* USB_HOST_H */
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb_host_version.h
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Description : RZ/A1H R7S72100 USB Sample Program
*******************************************************************************/
#define USB_HOST_LOCAL_Rev "VER080_140709"
/* End of File */

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/* Copyright (c) 2010-2011 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef OHCI_WRAPP_RZ_A1_H
#define OHCI_WRAPP_RZ_A1_H
#ifdef __cplusplus
extern "C" {
#endif
#define OHCI_REG_REVISION (0x00)
#define OHCI_REG_CONTROL (0x04)
#define OHCI_REG_COMMANDSTATUS (0x08)
#define OHCI_REG_INTERRUPTSTATUS (0x0C)
#define OHCI_REG_INTERRUPTENABLE (0x10)
#define OHCI_REG_INTERRUPTDISABLE (0x14)
#define OHCI_REG_HCCA (0x18)
#define OHCI_REG_PERIODCURRENTED (0x1C)
#define OHCI_REG_CONTROLHEADED (0x20)
#define OHCI_REG_CONTROLCURRENTED (0x24)
#define OHCI_REG_BULKHEADED (0x28)
#define OHCI_REG_BULKCURRENTED (0x2C)
#define OHCI_REG_DONEHEADED (0x30)
#define OHCI_REG_FMINTERVAL (0x34)
#define OHCI_REG_FMREMAINING (0x38)
#define OHCI_REG_FMNUMBER (0x3C)
#define OHCI_REG_PERIODICSTART (0x40)
#define OHCI_REG_LSTHRESHOLD (0x44)
#define OHCI_REG_RHDESCRIPTORA (0x48)
#define OHCI_REG_RHDESCRIPTORB (0x4C)
#define OHCI_REG_RHSTATUS (0x50)
#define OHCI_REG_RHPORTSTATUS1 (0x54)
typedef void (usbisr_fnc_t)(void);
extern void ohciwrapp_init(usbisr_fnc_t *p_usbisr_fnc, uint32_t hi_speed);
extern uint32_t ohciwrapp_reg_r(uint32_t reg_ofs);
extern void ohciwrapp_reg_w(uint32_t reg_ofs, uint32_t set_data);
extern void ohciwrapp_interrupt(uint32_t int_sense);
#ifdef __cplusplus
}
#endif
#endif /* OHCI_WRAPP_RZ_A1_H */

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/* Copyright (c) 2010-2011 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef OHCI_WRAPP_RZ_A1_LOCAL_H
#define OHCI_WRAPP_RZ_A1_LOCAL_H
#ifdef __cplusplus
extern "C" {
#endif
/* ConditionCode */
#define TD_CC_NOERROR (0)
#define TD_CC_CRC (1)
#define TD_CC_BITSTUFFING (2)
#define TD_CC_DATATOGGLEMISMATCH (3)
#define TD_CC_STALL (4)
#define TD_CC_DEVICENOTRESPONDING (5)
#define TD_CC_PIDCHECKFAILURE (6)
#define TD_CC_UNEXPECTEDPID (7)
#define TD_CC_DATAOVERRUN (8)
#define TD_CC_DATAUNDERRUN (9)
#define TD_CC_BUFFEROVERRUN (12)
#define TD_CC_BUFFERUNDERRUN (13)
#define TD_CC_NOT_ACCESSED_1 (14)
#define TD_CC_NOT_ACCESSED_2 (15)
extern void ohciwrapp_loc_Connect(uint32_t type);
extern void ohciwrapp_loc_TransEnd(uint32_t pipe, uint32_t ConditionCode);
#ifdef __cplusplus
}
#endif
#endif /* OHCI_WRAPP_RZ_A1_LOCAL_H */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_dma.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
/* #include "usb0_host_dmacdrv.h" */
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
static void usb0_host_dmaint(uint16_t fifo);
static void usb0_host_dmaint_buf2fifo(uint16_t pipe);
static void usb0_host_dmaint_fifo2buf(uint16_t pipe);
/*******************************************************************************
* Function Name: usb0_host_dma_stop_d0
* Description : D0FIFO DMA stop
* Arguments : uint16_t pipe : pipe number
* : uint32_t remain : transfer byte
* Return Value : none
*******************************************************************************/
void usb0_host_dma_stop_d0 (uint16_t pipe, uint32_t remain)
{
uint16_t dtln;
uint16_t dfacc;
uint16_t buffer;
uint16_t sds_b = 1;
dfacc = RZA_IO_RegRead_16(&USB200.D0FBCFG,
USB_DnFBCFG_DFACC_SHIFT,
USB_DnFBCFG_DFACC);
if (dfacc == 2)
{
sds_b = 32;
}
else if (dfacc == 1)
{
sds_b = 16;
}
else
{
if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 2)
{
sds_b = 4;
}
else if (g_usb0_host_DmaInfo[USB_HOST_D0FIFO].size == 1)
{
sds_b = 2;
}
else
{
sds_b = 1;
}
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
{
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
{
buffer = USB200.D0FIFOCTR;
dtln = (buffer & USB_HOST_BITDTLN);
if ((dtln % sds_b) != 0)
{
remain += (sds_b - (dtln % sds_b));
}
g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
g_usb0_host_data_count[pipe] = remain;
}
}
RZA_IO_RegWrite_16(&USB200.D0FIFOSEL,
0,
USB_DnFIFOSEL_DREQE_SHIFT,
USB_DnFIFOSEL_DREQE);
}
/*******************************************************************************
* Function Name: usb0_host_dma_stop_d1
* Description : D1FIFO DMA stop
* Arguments : uint16_t pipe : pipe number
* : uint32_t remain : transfer byte
* Return Value : none
*******************************************************************************/
void usb0_host_dma_stop_d1 (uint16_t pipe, uint32_t remain)
{
uint16_t dtln;
uint16_t dfacc;
uint16_t buffer;
uint16_t sds_b = 1;
dfacc = RZA_IO_RegRead_16(&USB200.D1FBCFG,
USB_DnFBCFG_DFACC_SHIFT,
USB_DnFBCFG_DFACC);
if (dfacc == 2)
{
sds_b = 32;
}
else if (dfacc == 1)
{
sds_b = 16;
}
else
{
if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 2)
{
sds_b = 4;
}
else if (g_usb0_host_DmaInfo[USB_HOST_D1FIFO].size == 1)
{
sds_b = 2;
}
else
{
sds_b = 1;
}
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 1)
{
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
{
buffer = USB200.D1FIFOCTR;
dtln = (buffer & USB_HOST_BITDTLN);
if ((dtln % sds_b) != 0)
{
remain += (sds_b - (dtln % sds_b));
}
g_usb0_host_PipeDataSize[pipe] = (g_usb0_host_data_count[pipe] - remain);
g_usb0_host_data_count[pipe] = remain;
}
}
RZA_IO_RegWrite_16(&USB200.D1FIFOSEL,
0,
USB_DnFIFOSEL_DREQE_SHIFT,
USB_DnFIFOSEL_DREQE);
}
/*******************************************************************************
* Function Name: usb0_host_dma_interrupt_d0fifo
* Description : This function is DMA interrupt handler entry.
* : Execute usb1_host_dmaint() after disabling DMA interrupt in this function.
* : Disable DMA interrupt to DMAC executed when USB_HOST_D0FIFO_DMA is
* : specified by dma->fifo.
* : Register this function as DMA complete interrupt.
* Arguments : uint32_t int_sense ; Interrupts detection mode
* : ; INTC_LEVEL_SENSITIVE : Level sense
* : ; INTC_EDGE_TRIGGER : Edge trigger
* Return Value : none
*******************************************************************************/
void usb0_host_dma_interrupt_d0fifo (uint32_t int_sense)
{
usb0_host_dmaint(USB_HOST_D0FIFO);
g_usb0_host_DmaStatus[USB_HOST_D0FIFO] = USB_HOST_DMA_READY;
}
/*******************************************************************************
* Function Name: usb0_host_dma_interrupt_d1fifo
* Description : This function is DMA interrupt handler entry.
* : Execute usb0_host_dmaint() after disabling DMA interrupt in this function.
* : Disable DMA interrupt to DMAC executed when USB_HOST_D1FIFO_DMA is
* : specified by dma->fifo.
* : Register this function as DMA complete interrupt.
* Arguments : uint32_t int_sense ; Interrupts detection mode
* : ; INTC_LEVEL_SENSITIVE : Level sense
* : ; INTC_EDGE_TRIGGER : Edge trigger
* Return Value : none
*******************************************************************************/
void usb0_host_dma_interrupt_d1fifo (uint32_t int_sense)
{
usb0_host_dmaint(USB_HOST_D1FIFO);
g_usb0_host_DmaStatus[USB_HOST_D1FIFO] = USB_HOST_DMA_READY;
}
/*******************************************************************************
* Function Name: usb0_host_dmaint
* Description : This function is DMA transfer end interrupt
* Arguments : uint16_t fifo ; fifo number
* : ; USB_HOST_D0FIFO
* : ; USB_HOST_D1FIFO
* Return Value : none
*******************************************************************************/
static void usb0_host_dmaint (uint16_t fifo)
{
uint16_t pipe;
pipe = g_usb0_host_DmaPipe[fifo];
if (g_usb0_host_DmaInfo[fifo].dir == USB_HOST_BUF2FIFO)
{
usb0_host_dmaint_buf2fifo(pipe);
}
else
{
usb0_host_dmaint_fifo2buf(pipe);
}
}
/*******************************************************************************
* Function Name: usb0_host_dmaint_fifo2buf
* Description : Executes read completion from FIFO by DMAC.
* Arguments : uint16_t pipe : pipe number
* Return Value : none
*******************************************************************************/
static void usb0_host_dmaint_fifo2buf (uint16_t pipe)
{
uint32_t remain;
uint16_t useport;
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_DONE)
{
useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
if (useport == USB_HOST_D0FIFO_DMA)
{
remain = Userdef_USB_usb0_host_stop_dma0();
usb0_host_dma_stop_d0(pipe, remain);
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
{
if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] == USB_HOST_DMA_BUSYEND)
{
USB200.D0FIFOCTR = USB_HOST_BITBCLR;
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
}
else
{
usb0_host_enable_brdy_int(pipe);
}
}
}
else
{
remain = Userdef_USB_usb0_host_stop_dma1();
usb0_host_dma_stop_d1(pipe, remain);
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
{
if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] == USB_HOST_DMA_BUSYEND)
{
USB200.D1FIFOCTR = USB_HOST_BITBCLR;
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
}
else
{
usb0_host_enable_brdy_int(pipe);
}
}
}
}
}
/*******************************************************************************
* Function Name: usb0_host_dmaint_buf2fifo
* Description : Executes write completion in FIFO by DMAC.
* Arguments : uint16_t pipe : pipe number
* Return Value : none
*******************************************************************************/
static void usb0_host_dmaint_buf2fifo (uint16_t pipe)
{
uint16_t useport;
uint32_t remain;
useport = (uint16_t)(g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE);
if (useport == USB_HOST_D0FIFO_DMA)
{
remain = Userdef_USB_usb0_host_stop_dma0();
usb0_host_dma_stop_d0(pipe, remain);
if (g_usb0_host_DmaBval[USB_HOST_D0FIFO] != 0)
{
RZA_IO_RegWrite_16(&USB200.D0FIFOCTR,
1,
USB_DnFIFOCTR_BVAL_SHIFT,
USB_DnFIFOCTR_BVAL);
}
}
else
{
remain = Userdef_USB_usb0_host_stop_dma1();
usb0_host_dma_stop_d1(pipe, remain);
if (g_usb0_host_DmaBval[USB_HOST_D1FIFO] != 0)
{
RZA_IO_RegWrite_16(&USB200.D1FIFOCTR,
1,
USB_DnFIFOCTR_BVAL_SHIFT,
USB_DnFIFOCTR_BVAL);
}
}
usb0_host_enable_bemp_int(pipe);
}
/* End of File */

285
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@ -0,0 +1,285 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_intrn.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
#if(1) /* ohci_wrapp */
#include "ohci_wrapp_RZ_A1_local.h"
#endif
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_host_brdy_int
* Description : Executes BRDY interrupt(USB_HOST_PIPE1-9).
* : According to the pipe that interrupt is generated in,
* : reads/writes buffer allocated in the pipe.
* : This function is executed in the BRDY interrupt handler.
* : This function clears BRDY interrupt status and BEMP interrupt
* : status.
* Arguments : uint16_t status ; BRDYSTS Register Value
* : uint16_t int_enb ; BRDYENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_brdy_int (uint16_t status, uint16_t int_enb)
{
uint32_t int_sense = 0;
uint16_t pipe;
uint16_t pipebit;
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
{
pipebit = g_usb0_host_bit_set[pipe];
if ((status & pipebit) && (int_enb & pipebit))
{
USB200.BRDYSTS = (uint16_t)~pipebit;
USB200.BEMPSTS = (uint16_t)~pipebit;
if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D0FIFO_DMA)
{
if (g_usb0_host_DmaStatus[USB_HOST_D0FIFO] != USB_HOST_DMA_READY)
{
usb0_host_dma_interrupt_d0fifo(int_sense);
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
{
usb0_host_read_dma(pipe);
usb0_host_disable_brdy_int(pipe);
}
else
{
USB200.D0FIFOCTR = USB_HOST_BITBCLR;
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
}
}
else if ((g_usb0_host_PipeTbl[pipe] & USB_HOST_FIFO_USE) == USB_HOST_D1FIFO_DMA)
{
if (g_usb0_host_DmaStatus[USB_HOST_D1FIFO] != USB_HOST_DMA_READY)
{
usb0_host_dma_interrupt_d1fifo(int_sense);
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_BFRE_SHIFT, USB_PIPECFG_BFRE) == 0)
{
usb0_host_read_dma(pipe);
usb0_host_disable_brdy_int(pipe);
}
else
{
USB200.D1FIFOCTR = USB_HOST_BITBCLR;
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
}
}
else
{
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
{
usb0_host_read_buffer(pipe);
}
else
{
usb0_host_write_buffer(pipe);
}
}
#if(1) /* ohci_wrapp */
switch (g_usb0_host_pipe_status[pipe])
{
case USB_HOST_PIPE_DONE:
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
break;
case USB_HOST_PIPE_NORES:
case USB_HOST_PIPE_STALL:
case USB_HOST_PIPE_ERROR:
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
break;
default:
/* Do Nothing */
break;
}
#endif
}
}
}
/*******************************************************************************
* Function Name: usb0_host_nrdy_int
* Description : Executes NRDY interrupt(USB_HOST_PIPE1-9).
* : Checks NRDY interrupt cause by PID. When the cause if STALL,
* : regards the pipe state as STALL and ends the processing.
* : Then the cause is not STALL, increments the error count to
* : communicate again. When the error count is 3, determines
* : the pipe state as USB_HOST_PIPE_NORES and ends the processing.
* : This function is executed in the NRDY interrupt handler.
* : This function clears NRDY interrupt status.
* Arguments : uint16_t status ; NRDYSTS Register Value
* : uint16_t int_enb ; NRDYENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_nrdy_int (uint16_t status, uint16_t int_enb)
{
uint16_t pid;
uint16_t pipe;
uint16_t bitcheck;
bitcheck = (uint16_t)(status & int_enb);
USB200.NRDYSTS = (uint16_t)~status;
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
{
if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
{
if (RZA_IO_RegRead_16(&USB200.SYSCFG0,
USB_SYSCFG_DCFM_SHIFT,
USB_SYSCFG_DCFM) == 1)
{
if (g_usb0_host_pipe_status[pipe] == USB_HOST_PIPE_WAIT)
{
pid = usb0_host_get_pid(pipe);
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
{
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
#if(1) /* ohci_wrapp */
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
#endif
}
else
{
#if(1) /* ohci_wrapp */
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
#else
g_usb0_host_PipeIgnore[pipe]++;
if (g_usb0_host_PipeIgnore[pipe] == 3)
{
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_NORES;
}
else
{
usb0_host_set_pid_buf(pipe);
}
#endif
}
}
}
else
{
/* USB Function */
}
}
}
}
/*******************************************************************************
* Function Name: usb0_host_bemp_int
* Description : Executes BEMP interrupt(USB_HOST_PIPE1-9).
* Arguments : uint16_t status ; BEMPSTS Register Value
* : uint16_t int_enb ; BEMPENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_bemp_int (uint16_t status, uint16_t int_enb)
{
uint16_t pid;
uint16_t pipe;
uint16_t bitcheck;
uint16_t inbuf;
bitcheck = (uint16_t)(status & int_enb);
USB200.BEMPSTS = (uint16_t)~status;
for (pipe = USB_HOST_PIPE1; pipe <= USB_HOST_MAX_PIPE_NO; pipe++)
{
if ((bitcheck&g_usb0_host_bit_set[pipe]) == g_usb0_host_bit_set[pipe])
{
pid = usb0_host_get_pid(pipe);
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
{
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_STALL;
#if(1) /* ohci_wrapp */
ohciwrapp_loc_TransEnd(pipe, TD_CC_STALL);
#endif
}
else
{
inbuf = usb0_host_get_inbuf(pipe);
if (inbuf == 0)
{
usb0_host_disable_bemp_int(pipe);
usb0_host_set_pid_nak(pipe);
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_DONE;
#if(1) /* ohci_wrapp */
ohciwrapp_loc_TransEnd(pipe, TD_CC_NOERROR);
#endif
}
}
}
}
}
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_controlrw.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
#include "dev_drv.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_host_CtrlTransStart
* Description : Executes USB control transfer.
* Arguments : uint16_t devadr ; device address
* : uint16_t Req ; bmRequestType & bRequest
* : uint16_t Val ; wValue
* : uint16_t Indx ; wIndex
* : uint16_t Len ; wLength
* : uint8_t *Buf ; Data buffer
* Return Value : DEVDRV_SUCCESS ; SUCCESS
* : DEVDRV_ERROR ; ERROR
*******************************************************************************/
int32_t usb0_host_CtrlTransStart (uint16_t devadr, uint16_t Req, uint16_t Val,
uint16_t Indx, uint16_t Len, uint8_t * Buf)
{
if (g_usb0_host_UsbDeviceSpeed == USB_HOST_LOW_SPEED)
{
RZA_IO_RegWrite_16(&USB200.SOFCFG,
1,
USB_SOFCFG_TRNENSEL_SHIFT,
USB_SOFCFG_TRNENSEL);
}
else
{
RZA_IO_RegWrite_16(&USB200.SOFCFG,
0,
USB_SOFCFG_TRNENSEL_SHIFT,
USB_SOFCFG_TRNENSEL);
}
USB200.DCPMAXP = (uint16_t)((uint16_t)(devadr << 12) + g_usb0_host_default_max_packet[devadr]);
if (g_usb0_host_pipe_status[USB_HOST_PIPE0] == USB_HOST_PIPE_IDLE)
{
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_WAIT;
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
g_usb0_host_CmdStage = (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE);
if (Len == 0)
{
g_usb0_host_CmdStage |= USB_HOST_MODE_NO_DATA; /* No-data Control */
}
else
{
if ((Req & 0x0080) != 0)
{
g_usb0_host_CmdStage |= USB_HOST_MODE_READ; /* Control Read */
}
else
{
g_usb0_host_CmdStage |= USB_HOST_MODE_WRITE; /* Control Write */
}
}
g_usb0_host_SavReq = Req; /* save request */
g_usb0_host_SavVal = Val;
g_usb0_host_SavIndx = Indx;
g_usb0_host_SavLen = Len;
}
else
{
if ((g_usb0_host_SavReq != Req) || (g_usb0_host_SavVal != Val)
|| (g_usb0_host_SavIndx != Indx) || (g_usb0_host_SavLen != Len))
{
return DEVDRV_ERROR;
}
}
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
{
/* --------------- SETUP STAGE --------------- */
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_IDLE):
usb0_host_SetupStage(Req, Val, Indx, Len);
break;
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DOING):
/* do nothing */
break;
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_DONE): /* goto next stage */
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
{
case USB_HOST_MODE_WRITE:
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
break;
case USB_HOST_MODE_READ:
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_DATA;
break;
case USB_HOST_MODE_NO_DATA:
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
break;
default:
break;
}
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
break;
case (USB_HOST_STAGE_SETUP | USB_HOST_CMD_NORES):
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
{
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
}
else
{
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
}
break;
/* --------------- DATA STAGE --------------- */
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_IDLE):
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
{
case USB_HOST_MODE_WRITE:
usb0_host_CtrlWriteStart((uint32_t)Len, Buf);
break;
case USB_HOST_MODE_READ:
usb0_host_CtrlReadStart((uint32_t)Len, Buf);
break;
default:
break;
}
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
/* do nothing */
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DONE): /* goto next stage */
g_usb0_host_PipeIgnore[USB_HOST_PIPE0] = 0; /* Ignore count clear */
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_NORES):
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
{
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
}
else
{
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
usb0_host_set_pid_buf(USB_HOST_PIPE0);
}
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_STALL):
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
break;
/* --------------- STATUS STAGE --------------- */
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_IDLE):
usb0_host_StatusStage();
break;
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
/* do nothing */
break;
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DONE): /* end of Control transfer */
usb0_host_set_pid_nak(USB_HOST_PIPE0);
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_DONE; /* exit DONE */
break;
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_NORES):
if (g_usb0_host_PipeIgnore[USB_HOST_PIPE0] == 3)
{
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
}
else
{
g_usb0_host_PipeIgnore[USB_HOST_PIPE0]++; /* Ignore count */
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
usb0_host_set_pid_buf(USB_HOST_PIPE0);
}
break;
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_STALL):
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
break;
default:
break;
}
if (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT)
{
RZA_IO_RegWrite_16(&USB200.SOFCFG,
0,
USB_SOFCFG_TRNENSEL_SHIFT,
USB_SOFCFG_TRNENSEL);
}
return DEVDRV_SUCCESS;
}
/*******************************************************************************
* Function Name: usb0_host_SetupStage
* Description : Executes USB control transfer/set up stage.
* Arguments : uint16_t Req ; bmRequestType & bRequest
* : uint16_t Val ; wValue
* : uint16_t Indx ; wIndex
* : uint16_t Len ; wLength
* Return Value : none
*******************************************************************************/
void usb0_host_SetupStage (uint16_t Req, uint16_t Val, uint16_t Indx, uint16_t Len)
{
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
USB200.INTSTS1 = (uint16_t)~(USB_HOST_BITSACK | USB_HOST_BITSIGN); /* Status Clear */
USB200.USBREQ = Req;
USB200.USBVAL = Val;
USB200.USBINDX = Indx;
USB200.USBLENG = Len;
USB200.DCPCTR = USB_HOST_BITSUREQ; /* PID=NAK & Send Setup */
}
/*******************************************************************************
* Function Name: usb0_host_StatusStage
* Description : Executes USB control transfer/status stage.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_StatusStage (void)
{
uint8_t Buf1[16];
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD)))
{
case USB_HOST_MODE_READ:
usb0_host_CtrlWriteStart((uint32_t)0, (uint8_t *)&Buf1);
break;
case USB_HOST_MODE_WRITE:
usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
break;
case USB_HOST_MODE_NO_DATA:
usb0_host_CtrlReadStart((uint32_t)0, (uint8_t *)&Buf1);
break;
default:
break;
}
}
/*******************************************************************************
* Function Name: usb0_host_CtrlWriteStart
* Description : Executes USB control transfer/data stage(write).
* Arguments : uint32_t Bsize ; Data Size
* : uint8_t *Table ; Data Table Address
* Return Value : USB_HOST_WRITESHRT ; End of data write
* : USB_HOST_WRITEEND ; End of data write (not null)
* : USB_HOST_WRITING ; Continue of data write
* : USB_HOST_FIFOERROR ; FIFO access error
*******************************************************************************/
uint16_t usb0_host_CtrlWriteStart (uint32_t Bsize, uint8_t * Table)
{
uint16_t EndFlag_K;
uint16_t mbw;
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
#if(1) /* ohci_wrapp */
Userdef_USB_usb0_host_delay_10us(3);
#endif
RZA_IO_RegWrite_16(&USB200.DCPCFG,
1,
USB_DCPCFG_DIR_SHIFT,
USB_DCPCFG_DIR);
mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_BITISEL, mbw);
USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
EndFlag_K = usb0_host_write_buffer_c(USB_HOST_PIPE0);
/* Host Control sequence */
switch (EndFlag_K)
{
case USB_HOST_WRITESHRT: /* End of data write */
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
break;
case USB_HOST_WRITEEND: /* End of data write (not null) */
case USB_HOST_WRITING: /* Continue of data write */
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
usb0_host_enable_bemp_int(USB_HOST_PIPE0); /* Enable Empty Interrupt */
break;
case USB_HOST_FIFOERROR: /* FIFO access error */
break;
default:
break;
}
usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
return (EndFlag_K); /* End or Err or Continue */
}
/*******************************************************************************
* Function Name: usb0_host_CtrlReadStart
* Description : Executes USB control transfer/data stage(read).
* Arguments : uint32_t Bsize ; Data Size
* : uint8_t *Table ; Data Table Address
* Return Value : none
*******************************************************************************/
void usb0_host_CtrlReadStart (uint32_t Bsize, uint8_t * Table)
{
uint16_t mbw;
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DOING;
usb0_host_set_pid_nak(USB_HOST_PIPE0); /* Set NAK */
g_usb0_host_data_count[USB_HOST_PIPE0] = Bsize; /* Transfer size set */
g_usb0_host_data_pointer[USB_HOST_PIPE0] = Table; /* Transfer address set */
USB200.DCPCTR = USB_HOST_BITSQSET; /* SQSET=1, PID=NAK */
#if(1) /* ohci_wrapp */
Userdef_USB_usb0_host_delay_10us(3);
#endif
RZA_IO_RegWrite_16(&USB200.DCPCFG,
0,
USB_DCPCFG_DIR_SHIFT,
USB_DCPCFG_DIR);
mbw = usb0_host_get_mbw(g_usb0_host_data_count[USB_HOST_PIPE0], (uint32_t)g_usb0_host_data_pointer[USB_HOST_PIPE0]);
usb0_host_set_curpipe(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, mbw);
USB200.CFIFOCTR = USB_HOST_BITBCLR; /* Buffer Clear */
usb0_host_enable_nrdy_int(USB_HOST_PIPE0); /* Error (NORES or STALL) */
usb0_host_enable_brdy_int(USB_HOST_PIPE0); /* Ok */
usb0_host_clear_pid_stall(USB_HOST_PIPE0);
usb0_host_set_pid_buf(USB_HOST_PIPE0); /* Set BUF */
}
/* End of File */

889
libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_drv_api.c Normal file
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@ -0,0 +1,889 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_drv_api.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
#include "dev_drv.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
static void usb0_host_resetEP(USB_HOST_CFG_PIPETBL_t *tbl);
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_api_host_init
* Description : Initializes USB module in the USB host mode.
* : USB connection is executed when executing this function in
* : the states that USB device isconnected to the USB port.
* Arguments : uint8_t int_level : USB Module interrupt level
* : USBU16 mode : USB_HOST_HIGH_SPEED
* : USB_HOST_FULL_SPEED
* : uint16_t clockmode : USB Clock mode
* Return Value : USB detach or attach
* : USB_HOST_ATTACH
* : USB_HOST_DETACH
*******************************************************************************/
uint16_t usb0_api_host_init (uint8_t int_level, uint16_t mode, uint16_t clockmode)
{
uint16_t connect;
volatile uint8_t dummy_buf;
CPG.STBCR7 &= 0xfd; /*The clock of USB0 modules is permitted */
dummy_buf = CPG.STBCR7; /* (Dummy read) */
g_usb0_host_SupportUsbDeviceSpeed = mode;
usb0_host_setting_interrupt(int_level);
usb0_host_reset_module(clockmode);
g_usb0_host_bchg_flag = USB_HOST_NO;
g_usb0_host_detach_flag = USB_HOST_NO;
g_usb0_host_attach_flag = USB_HOST_NO;
g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
usb0_host_InitModule();
connect = usb0_host_CheckAttach();
if (connect == USB_HOST_ATTACH)
{
g_usb0_host_attach_flag = USB_HOST_YES;
}
else
{
usb0_host_UsbDetach2();
}
return connect;
}
#if(1) /* ohci_wrapp */
#else
/*******************************************************************************
* Function Name: usb0_api_host_enumeration
* Description : Initializes USB module in the USB host mode.
* : USB connection is executed when executing this function in
* : the states that USB device isconnected to the USB port.
* Arguments : uint16_t devadr : device address
* Return Value : DEVDRV_USBH_DETACH_ERR : device detach
* : DEVDRV_SUCCESS : device enumeration success
* : DEVDRV_ERROR : device enumeration error
*******************************************************************************/
int32_t usb0_api_host_enumeration (uint16_t devadr)
{
int32_t ret;
uint16_t driver_sts;
g_usb0_host_setUsbAddress = devadr;
while (1)
{
driver_sts = usb0_api_host_GetUsbDeviceState();
if (driver_sts == USB_HOST_DRV_DETACHED)
{
ret = DEVDRV_USBH_DETACH_ERR;
break;
}
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
{
ret = DEVDRV_SUCCESS;
break;
}
else if (driver_sts == USB_HOST_DRV_STALL)
{
ret = DEVDRV_ERROR;
break;
}
else if (driver_sts == USB_HOST_DRV_NORES)
{
ret = DEVDRV_ERROR;
break;
}
else
{
/* Do Nothing */
}
}
if (driver_sts == USB_HOST_DRV_NORES)
{
while (1)
{
driver_sts = usb0_api_host_GetUsbDeviceState();
if (driver_sts == USB_HOST_DRV_DETACHED)
{
break;
}
}
}
return ret;
}
/*******************************************************************************
* Function Name: usb0_api_host_detach
* Description : USB detach routine
* Arguments : none
* Return Value : USB_HOST_DETACH : USB detach
* : USB_HOST_ATTACH : USB attach
* : DEVDRV_ERROR : error
*******************************************************************************/
int32_t usb0_api_host_detach (void)
{
int32_t ret;
uint16_t driver_sts;
while (1)
{
driver_sts = usb0_api_host_GetUsbDeviceState();
if (driver_sts == USB_HOST_DRV_DETACHED)
{
ret = USB_HOST_DETACH;
break;
}
else if (driver_sts == USB_HOST_DRV_CONFIGURED)
{
ret = USB_HOST_ATTACH;
break;
}
else if (driver_sts == USB_HOST_DRV_STALL)
{
ret = DEVDRV_ERROR;
break;
}
else if (driver_sts == USB_HOST_DRV_NORES)
{
ret = DEVDRV_ERROR;
break;
}
else
{
/* Do Nothing */
}
}
if (driver_sts == USB_HOST_DRV_NORES)
{
while (1)
{
driver_sts = usb0_api_host_GetUsbDeviceState();
if (driver_sts == USB_HOST_DRV_DETACHED)
{
break;
}
}
}
return ret;
}
/*******************************************************************************
* Function Name: usb0_api_host_data_in
* Description : Executes USB transfer as data-in in the argument specified pipe.
* Arguments : uint16_t devadr ; device address
* : uint16_t Pipe ; Pipe Number
* : uint32_t Size ; Data Size
* : uint8_t *data_buf ; Data data_buf Address
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_data_in (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
{
int32_t ret;
if (Pipe == USB_HOST_PIPE0)
{
return DEVDRV_ERROR;
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
{
return DEVDRV_ERROR;
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 1)
{
return DEVDRV_ERROR;
}
if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
{
usb0_host_start_receive_transfer(Pipe, Size, data_buf);
}
else
{
return DEVDRV_ERROR; /* Now pipe is busy */
}
/* waiting for completing routine */
do
{
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
break;
}
if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
{
break;
}
} while (1);
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
return DEVDRV_USBH_DETACH_ERR;
}
switch (g_usb0_host_pipe_status[Pipe])
{
case USB_HOST_PIPE_DONE:
ret = DEVDRV_SUCCESS;
break;
case USB_HOST_PIPE_STALL:
ret = DEVDRV_USBH_STALL;
break;
case USB_HOST_PIPE_NORES:
ret = DEVDRV_USBH_COM_ERR;
break;
default:
ret = DEVDRV_ERROR;
break;
}
usb0_host_stop_transfer(Pipe);
g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
return ret;
}
/*******************************************************************************
* Function Name: usb0_api_host_data_out
* Description : Executes USB transfer as data-out in the argument specified pipe.
* Arguments : uint16_t devadr ; device address
* : uint16_t Pipe ; Pipe Number
* : uint32_t Size ; Data Size
* : uint8_t *data_buf ; Data data_buf Address
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_data_out (uint16_t devadr, uint16_t Pipe, uint32_t Size, uint8_t * data_buf)
{
int32_t ret;
if (Pipe == USB_HOST_PIPE0)
{
return DEVDRV_ERROR;
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[Pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL) != devadr)
{
return DEVDRV_ERROR;
}
if (RZA_IO_RegRead_16(&g_usb0_host_pipecfg[Pipe], USB_PIPECFG_DIR_SHIFT, USB_PIPECFG_DIR) == 0)
{
return DEVDRV_ERROR;
}
if (g_usb0_host_pipe_status[Pipe] == USB_HOST_PIPE_IDLE)
{
usb0_host_start_send_transfer(Pipe, Size, data_buf);
}
else
{
return DEVDRV_ERROR; /* Now pipe is busy */
}
/* waiting for completing routine */
do
{
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
break;
}
if ((g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_IDLE) && (g_usb0_host_pipe_status[Pipe] != USB_HOST_PIPE_WAIT))
{
break;
}
} while (1);
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
return DEVDRV_USBH_DETACH_ERR;
}
switch (g_usb0_host_pipe_status[Pipe])
{
case USB_HOST_PIPE_DONE:
ret = DEVDRV_SUCCESS;
break;
case USB_HOST_PIPE_STALL:
ret = DEVDRV_USBH_STALL;
break;
case USB_HOST_PIPE_NORES:
ret = DEVDRV_USBH_COM_ERR;
break;
default:
ret = DEVDRV_ERROR;
break;
}
usb0_host_stop_transfer(Pipe);
g_usb0_host_pipe_status[Pipe] = USB_HOST_PIPE_IDLE;
return ret;
}
/*******************************************************************************
* Function Name: usb0_api_host_control_transfer
* Description : Executes USB control transfer.
* Arguments : uint16_t devadr ; device address
* : uint16_t Req ; bmRequestType & bRequest
* : uint16_t Val ; wValue
* : uint16_t Indx ; wIndex
* : uint16_t Len ; wLength
* : uint8_t *buf ; Buffer
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_USBH_DETACH_ERR ; device detach
* : DEVDRV_USBH_CTRL_COM_ERR ; device no response
* : DEVDRV_USBH_STALL ; STALL
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_control_transfer (uint16_t devadr, uint16_t Req, uint16_t Val, uint16_t Indx,
uint16_t Len, uint8_t * Buf)
{
int32_t ret;
do
{
ret = usb0_host_CtrlTransStart(devadr, Req, Val, Indx, Len, Buf);
if (ret == DEVDRV_SUCCESS)
{
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
break;
}
if ((g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_IDLE)
&& (g_usb0_host_pipe_status[USB_HOST_PIPE0] != USB_HOST_PIPE_WAIT))
{
break;
}
}
else
{
return DEVDRV_ERROR;
}
} while (1);
if (g_usb0_host_detach_flag == USB_HOST_YES)
{
return DEVDRV_USBH_DETACH_ERR;
}
switch (g_usb0_host_pipe_status[USB_HOST_PIPE0])
{
case USB_HOST_PIPE_DONE:
ret = DEVDRV_SUCCESS;
break;
case USB_HOST_PIPE_STALL:
ret = DEVDRV_USBH_STALL;
break;
case USB_HOST_PIPE_NORES:
ret = DEVDRV_USBH_CTRL_COM_ERR;
break;
default:
ret = DEVDRV_ERROR;
break;
}
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_IDLE;
return ret;
}
/*******************************************************************************
* Function Name: usb0_api_host_set_endpoint
* Description : Sets end point on the information specified in the argument.
* Arguments : uint16_t devadr ; device address
* : uint8_t *configdescriptor ; device configration descriptor
* : USB_HOST_CFG_PIPETBL_t *user_table ; pipe table
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_set_endpoint (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * configdescriptor)
{
uint16_t ret;
uint32_t end_point;
uint32_t offset;
uint32_t totalLength;
USB_HOST_CFG_PIPETBL_t * pipe_table;
/* End Point Search */
end_point = 0;
offset = configdescriptor[0];
totalLength = (uint16_t)(configdescriptor[2] + ((uint16_t)configdescriptor[3] << 8));
do
{
if (configdescriptor[offset + 1] == USB_HOST_ENDPOINT_DESC)
{
pipe_table = &user_table[end_point];
if (pipe_table->pipe_number == 0xffff)
{
break;
}
ret = usb0_api_host_SetEndpointTable(devadr, pipe_table, (uint8_t *)&configdescriptor[offset]);
if ((ret != USB_HOST_PIPE_IN) && (ret != USB_HOST_PIPE_OUT))
{
return DEVDRV_ERROR;
}
++end_point;
}
/* Next End Point Search */
offset += configdescriptor[offset];
} while (offset < totalLength);
return DEVDRV_SUCCESS;
}
/*******************************************************************************
* Function Name: usb0_api_host_clear_endpoint
* Description : Clears the pipe definition table specified in the argument.
* Arguments : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_clear_endpoint (USB_HOST_CFG_PIPETBL_t * user_table)
{
uint16_t pipe;
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
{
if (user_table->pipe_number == 0xffff)
{
break;
}
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
user_table->pipe_max_pktsize = 0;
user_table->pipe_cycle = 0;
user_table++;
}
return DEVDRV_SUCCESS;
}
/*******************************************************************************
* Function Name: usb0_api_host_clear_endpoint_pipe
* Description : Clears the pipe definition table specified in the argument.
* Arguments : uint16_t pipe_sel : Pipe Number
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_clear_endpoint_pipe (uint16_t pipe_sel, USB_HOST_CFG_PIPETBL_t * user_table)
{
uint16_t pipe;
for (pipe = USB_HOST_PIPE0; pipe <= USB_HOST_MAX_PIPE_NO; ++pipe)
{
if (user_table->pipe_number == 0xffff)
{
break;
}
if (user_table->pipe_number == pipe_sel)
{
user_table->pipe_cfg &= (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD);
user_table->pipe_max_pktsize = 0;
user_table->pipe_cycle = 0;
break;
}
user_table++;
}
return DEVDRV_SUCCESS;
}
#endif
/*******************************************************************************
* Function Name: usb0_api_host_SetEndpointTable
* Description : Sets the end point on the information specified by the argument.
* Arguments : uint16_t devadr : device address
* : USB_HOST_CFG_PIPETBL_t *user_table : pipe table
* : uint8_t *Table : Endpoint descriptor
* Return Value : USB_HOST_DIR_H_IN ; IN endpoint
* : USB_HOST_DIR_H_OUT ; OUT endpoint
* : USB_END_POINT_ERROR ; error
*******************************************************************************/
uint16_t usb0_api_host_SetEndpointTable (uint16_t devadr, USB_HOST_CFG_PIPETBL_t * user_table, uint8_t * Table)
{
uint16_t PipeCfg;
uint16_t PipeMaxp;
uint16_t pipe_number;
uint16_t ret;
uint16_t ret_flag = 0; // avoid warning.
pipe_number = user_table->pipe_number;
if (Table[1] != USB_HOST_ENDPOINT_DESC)
{
return USB_END_POINT_ERROR;
}
switch (Table[3] & USB_HOST_EP_TYPE)
{
case USB_HOST_EP_CNTRL:
ret_flag = USB_END_POINT_ERROR;
break;
case USB_HOST_EP_ISO:
if ((pipe_number != USB_HOST_PIPE1) && (pipe_number != USB_HOST_PIPE2))
{
return USB_END_POINT_ERROR;
}
PipeCfg = USB_HOST_ISO;
break;
case USB_HOST_EP_BULK:
if ((pipe_number < USB_HOST_PIPE1) || (pipe_number > USB_HOST_PIPE5))
{
return USB_END_POINT_ERROR;
}
PipeCfg = USB_HOST_BULK;
break;
case USB_HOST_EP_INT:
if ((pipe_number < USB_HOST_PIPE6) || (pipe_number > USB_HOST_PIPE9))
{
return USB_END_POINT_ERROR;
}
PipeCfg = USB_HOST_INTERRUPT;
break;
default:
ret_flag = USB_END_POINT_ERROR;
break;
}
if (ret_flag == USB_END_POINT_ERROR)
{
return ret_flag;
}
/* Set pipe configuration table */
if ((Table[2] & USB_HOST_EP_DIR_MASK) == USB_HOST_EP_IN) /* IN(receive) */
{
if (PipeCfg == USB_HOST_ISO)
{
/* Transfer Type is ISO*/
PipeCfg |= USB_HOST_DIR_H_IN;
switch (user_table->fifo_port)
{
case USB_HOST_CUSE:
case USB_HOST_D0USE:
case USB_HOST_D1USE:
case USB_HOST_D0DMA:
case USB_HOST_D1DMA:
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
break;
default:
ret_flag = USB_END_POINT_ERROR;
break;
}
if (ret_flag == USB_END_POINT_ERROR)
{
return ret_flag;
}
}
else
{
/* Transfer Type is BULK or INT */
PipeCfg |= (USB_HOST_SHTNAKON | USB_HOST_DIR_H_IN); /* Compulsory SHTNAK */
switch (user_table->fifo_port)
{
case USB_HOST_CUSE:
case USB_HOST_D0USE:
case USB_HOST_D1USE:
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
break;
case USB_HOST_D0DMA:
case USB_HOST_D1DMA:
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
#ifdef __USB_DMA_BFRE_ENABLE__
/* this routine cannnot be perfomred if read operation is executed in buffer size */
PipeCfg |= USB_HOST_BFREON;
#endif
break;
default:
ret_flag = USB_END_POINT_ERROR;
break;
}
if (ret_flag == USB_END_POINT_ERROR)
{
return ret_flag;
}
}
ret = USB_HOST_PIPE_IN;
}
else /* OUT(send) */
{
if (PipeCfg == USB_HOST_ISO)
{
/* Transfer Type is ISO*/
PipeCfg |= (uint16_t)(user_table->pipe_cfg & USB_HOST_DBLBFIELD);
}
else
{
/* Transfer Type is BULK or INT */
PipeCfg |= (uint16_t)(user_table->pipe_cfg & (USB_HOST_DBLBFIELD | USB_HOST_CNTMDFIELD));
}
PipeCfg |= USB_HOST_DIR_H_OUT;
ret = USB_HOST_PIPE_OUT;
}
switch (user_table->fifo_port)
{
case USB_HOST_CUSE:
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_CFIFO_USE;
break;
case USB_HOST_D0USE:
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_USE;
break;
case USB_HOST_D1USE:
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_USE;
break;
case USB_HOST_D0DMA:
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D0FIFO_DMA;
break;
case USB_HOST_D1DMA:
g_usb0_host_PipeTbl[pipe_number] = (uint16_t)USB_HOST_D1FIFO_DMA;
break;
default:
ret_flag = USB_END_POINT_ERROR;
break;
}
if (ret_flag == USB_END_POINT_ERROR)
{
return ret_flag;
}
/* Endpoint number set */
PipeCfg |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
g_usb0_host_PipeTbl[pipe_number] |= (uint16_t)(Table[2] & USB_HOST_EP_NUM_MASK);
/* Max packet size set */
PipeMaxp = (uint16_t)((uint16_t)Table[4] | (uint16_t)((uint16_t)Table[5] << 8));
if (PipeMaxp == 0u)
{
return USB_END_POINT_ERROR;
}
/* Set device address */
PipeMaxp |= (uint16_t)(devadr << 12);
user_table->pipe_cfg = PipeCfg;
user_table->pipe_max_pktsize = PipeMaxp;
usb0_host_resetEP(user_table);
return ret;
}
/*******************************************************************************
* Function Name: usb0_host_resetEP
* Description : Sets the end point on the information specified by the argument.
* Arguments : USB_HOST_CFG_PIPETBL_t *tbl : pipe table
* Return Value : none
*******************************************************************************/
static void usb0_host_resetEP (USB_HOST_CFG_PIPETBL_t * tbl)
{
uint16_t pipe;
/* Host pipe */
/* The pipe number of pipe definition table is obtained */
pipe = (uint16_t)(tbl->pipe_number & USB_HOST_BITCURPIPE); /* Pipe Number */
/* FIFO port access pipe is set to initial value */
/* The connection with FIFO should be cut before setting the pipe */
if (RZA_IO_RegRead_16(&USB200.CFIFOSEL,
USB_CFIFOSEL_CURPIPE_SHIFT,
USB_CFIFOSEL_CURPIPE) == pipe)
{
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_CUSE, USB_HOST_NO, USB_HOST_BITMBW_16);
}
if (RZA_IO_RegRead_16(&USB200.D0FIFOSEL,
USB_DnFIFOSEL_CURPIPE_SHIFT,
USB_DnFIFOSEL_CURPIPE) == pipe)
{
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D0USE, USB_HOST_NO, USB_HOST_BITMBW_16);
}
if (RZA_IO_RegRead_16(&USB200.D1FIFOSEL,
USB_DnFIFOSEL_CURPIPE_SHIFT,
USB_DnFIFOSEL_CURPIPE) == pipe)
{
usb0_host_change_fifo_port(USB_HOST_PIPE0, USB_HOST_D1USE, USB_HOST_NO, USB_HOST_BITMBW_16);
}
/* Interrupt of pipe set is disabled */
usb0_host_disable_brdy_int(pipe);
usb0_host_disable_nrdy_int(pipe);
usb0_host_disable_bemp_int(pipe);
/* Pipe to set is set to NAK */
usb0_host_set_pid_nak(pipe);
/* Pipe is set */
USB200.PIPESEL = pipe;
USB200.PIPECFG = tbl->pipe_cfg;
USB200.PIPEBUF = tbl->pipe_buf;
USB200.PIPEMAXP = tbl->pipe_max_pktsize;
USB200.PIPEPERI = tbl->pipe_cycle;
g_usb0_host_pipecfg[pipe] = tbl->pipe_cfg;
g_usb0_host_pipebuf[pipe] = tbl->pipe_buf;
g_usb0_host_pipemaxp[pipe] = tbl->pipe_max_pktsize;
g_usb0_host_pipeperi[pipe] = tbl->pipe_cycle;
/* Sequence bit clear */
usb0_host_set_sqclr(pipe);
usb0_host_aclrm(pipe);
usb0_host_set_csclr(pipe);
/* Pipe window selection is set to unused */
USB200.PIPESEL = USB_HOST_PIPE0;
}
#if(1) /* ohci_wrapp */
#else
/*******************************************************************************
* Function Name: usb0_api_host_data_count
* Description : Get g_usb0_host_data_count[pipe]
* Arguments : uint16_t pipe ; Pipe Number
* : uint32_t *data_count ; return g_usb0_data_count[pipe]
* Return Value : DEVDRV_SUCCESS ; success
* : DEVDRV_ERROR ; error
*******************************************************************************/
int32_t usb0_api_host_data_count (uint16_t pipe, uint32_t * data_count)
{
if (pipe > USB_HOST_MAX_PIPE_NO)
{
return DEVDRV_ERROR;
}
*data_count = g_usb0_host_PipeDataSize[pipe];
return DEVDRV_SUCCESS;
}
#endif
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_global.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
const uint16_t g_usb0_host_bit_set[16] =
{
0x0001, 0x0002, 0x0004, 0x0008,
0x0010, 0x0020, 0x0040, 0x0080,
0x0100, 0x0200, 0x0400, 0x0800,
0x1000, 0x2000, 0x4000, 0x8000
};
uint32_t g_usb0_host_data_count[USB_HOST_MAX_PIPE_NO + 1];
uint8_t * g_usb0_host_data_pointer[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_PipeIgnore[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_PipeTbl[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_pipe_status[USB_HOST_MAX_PIPE_NO + 1];
uint32_t g_usb0_host_PipeDataSize[USB_HOST_MAX_PIPE_NO + 1];
USB_HOST_DMA_t g_usb0_host_DmaInfo[2];
uint16_t g_usb0_host_DmaPipe[2];
uint16_t g_usb0_host_DmaBval[2];
uint16_t g_usb0_host_DmaStatus[2];
uint16_t g_usb0_host_driver_state;
uint16_t g_usb0_host_ConfigNum;
uint16_t g_usb0_host_CmdStage;
uint16_t g_usb0_host_bchg_flag;
uint16_t g_usb0_host_detach_flag;
uint16_t g_usb0_host_attach_flag;
uint16_t g_usb0_host_UsbAddress;
uint16_t g_usb0_host_setUsbAddress;
uint16_t g_usb0_host_default_max_packet[USB_HOST_MAX_DEVICE + 1];
uint16_t g_usb0_host_UsbDeviceSpeed;
uint16_t g_usb0_host_SupportUsbDeviceSpeed;
uint16_t g_usb0_host_SavReq;
uint16_t g_usb0_host_SavVal;
uint16_t g_usb0_host_SavIndx;
uint16_t g_usb0_host_SavLen;
uint16_t g_usb0_host_pipecfg[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_pipebuf[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_pipemaxp[USB_HOST_MAX_PIPE_NO + 1];
uint16_t g_usb0_host_pipeperi[USB_HOST_MAX_PIPE_NO + 1];
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_host_init_pipe_status
* Description : Initialize pipe status.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_init_pipe_status (void)
{
uint16_t loop;
g_usb0_host_ConfigNum = 0;
for (loop = 0; loop < (USB_HOST_MAX_PIPE_NO + 1); ++loop)
{
g_usb0_host_pipe_status[loop] = USB_HOST_PIPE_IDLE;
g_usb0_host_PipeDataSize[loop] = 0;
/* pipe configuration in usb0_host_resetEP() */
g_usb0_host_pipecfg[loop] = 0;
g_usb0_host_pipebuf[loop] = 0;
g_usb0_host_pipemaxp[loop] = 0;
g_usb0_host_pipeperi[loop] = 0;
}
}
/* End of File */

496
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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_usbint.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
#if(1) /* ohci_wrapp */
#include "ohci_wrapp_RZ_A1_local.h"
#endif
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
static void usb0_host_interrupt1(void);
static void usb0_host_BRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
static void usb0_host_NRDYInterrupt(uint16_t Status, uint16_t Int_enbl);
static void usb0_host_BEMPInterrupt(uint16_t Status, uint16_t Int_enbl);
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_host_interrupt
* Description : Executes USB interrupt.
* : Register this function in the USB interrupt handler.
* : Set CFIF0 in the pipe set before the interrupt after executing
* : this function.
* Arguments : uint32_t int_sense ; Interrupts detection mode
* : ; INTC_LEVEL_SENSITIVE : Level sense
* : ; INTC_EDGE_TRIGGER : Edge trigger
* Return Value : none
*******************************************************************************/
void usb0_host_interrupt (uint32_t int_sense)
{
uint16_t savepipe1;
uint16_t savepipe2;
uint16_t buffer;
savepipe1 = USB200.CFIFOSEL;
savepipe2 = USB200.PIPESEL;
usb0_host_interrupt1();
/* Control transmission changes ISEL within interruption processing. */
/* For this reason, write return of ISEL cannot be performed. */
buffer = USB200.CFIFOSEL;
buffer &= (uint16_t)~(USB_HOST_BITCURPIPE);
buffer |= (uint16_t)(savepipe1 & USB_HOST_BITCURPIPE);
USB200.CFIFOSEL = buffer;
USB200.PIPESEL = savepipe2;
}
/*******************************************************************************
* Function Name: usb0_host_interrupt1
* Description : Execue the USB interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_interrupt1 (void)
{
uint16_t intsts0;
uint16_t intsts1;
uint16_t intenb0;
uint16_t intenb1;
uint16_t brdysts;
uint16_t nrdysts;
uint16_t bempsts;
uint16_t brdyenb;
uint16_t nrdyenb;
uint16_t bempenb;
volatile uint16_t dumy_sts;
intsts0 = USB200.INTSTS0;
intsts1 = USB200.INTSTS1;
intenb0 = USB200.INTENB0;
intenb1 = USB200.INTENB1;
if ((intsts1 & USB_HOST_BITBCHG) && (intenb1 & USB_HOST_BITBCHGE))
{
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITBCHG;
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_BCHGE_SHIFT,
USB_INTENB1_BCHGE);
g_usb0_host_bchg_flag = USB_HOST_YES;
}
else if ((intsts1 & USB_HOST_BITSACK) && (intenb1 & USB_HOST_BITSACKE))
{
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSACK;
#if(1) /* ohci_wrapp */
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
#else
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
#endif
}
else if ((intsts1 & USB_HOST_BITSIGN) && (intenb1 & USB_HOST_BITSIGNE))
{
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITSIGN;
#if(1) /* ohci_wrapp */
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES; /* exit NORES */
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
#else
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
#endif
}
else if (((intsts1 & USB_HOST_BITDTCH) == USB_HOST_BITDTCH)
&& ((intenb1 & USB_HOST_BITDTCHE) == USB_HOST_BITDTCHE))
{
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITDTCH;
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_DTCHE_SHIFT,
USB_INTENB1_DTCHE);
g_usb0_host_detach_flag = USB_HOST_YES;
Userdef_USB_usb0_host_detach();
usb0_host_UsbDetach2();
}
else if (((intsts1 & USB_HOST_BITATTCH) == USB_HOST_BITATTCH)
&& ((intenb1 & USB_HOST_BITATTCHE) == USB_HOST_BITATTCHE))
{
USB200.INTSTS1 = (uint16_t)~USB_HOST_BITATTCH;
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_ATTCHE_SHIFT,
USB_INTENB1_ATTCHE);
g_usb0_host_attach_flag = USB_HOST_YES;
Userdef_USB_usb0_host_attach();
usb0_host_UsbAttach();
}
else if ((intsts0 & intenb0 & (USB_HOST_BITBEMP | USB_HOST_BITNRDY | USB_HOST_BITBRDY)))
{
brdysts = USB200.BRDYSTS;
nrdysts = USB200.NRDYSTS;
bempsts = USB200.BEMPSTS;
brdyenb = USB200.BRDYENB;
nrdyenb = USB200.NRDYENB;
bempenb = USB200.BEMPENB;
if ((intsts0 & USB_HOST_BITBRDY) && (intenb0 & USB_HOST_BITBRDYE) && (brdysts & brdyenb))
{
usb0_host_BRDYInterrupt(brdysts, brdyenb);
}
else if ((intsts0 & USB_HOST_BITBEMP) && (intenb0 & USB_HOST_BITBEMPE) && (bempsts & bempenb))
{
usb0_host_BEMPInterrupt(bempsts, bempenb);
}
else if ((intsts0 & USB_HOST_BITNRDY) && (intenb0 & USB_HOST_BITNRDYE) && (nrdysts & nrdyenb))
{
usb0_host_NRDYInterrupt(nrdysts, nrdyenb);
}
else
{
/* Do Nothing */
}
}
else
{
/* Do Nothing */
}
/* Three dummy read for clearing interrupt requests */
dumy_sts = USB200.INTSTS0;
dumy_sts = USB200.INTSTS1;
}
/*******************************************************************************
* Function Name: usb0_host_BRDYInterrupt
* Description : Executes USB BRDY interrupt.
* Arguments : uint16_t Status ; BRDYSTS Register Value
* : uint16_t Int_enbl ; BRDYENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_BRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
{
uint16_t buffer;
volatile uint16_t dumy_sts;
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
{
USB200.BRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
#if(1) /* ohci_wrapp */
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
{
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
switch (buffer)
{
case USB_HOST_READING: /* Continue of data read */
break;
case USB_HOST_READEND: /* End of data read */
case USB_HOST_READSHRT: /* End of data read */
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
break;
case USB_HOST_READOVER: /* buffer over */
USB200.CFIFOCTR = USB_HOST_BITBCLR;
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
break;
case USB_HOST_FIFOERROR: /* FIFO access error */
default:
break;
}
break;
default:
break;
}
#else
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
{
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
case (USB_HOST_MODE_NO_DATA | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
break;
case (USB_HOST_MODE_READ | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
buffer = usb0_host_read_buffer_c(USB_HOST_PIPE0);
switch (buffer)
{
case USB_HOST_READING: /* Continue of data read */
break;
case USB_HOST_READEND: /* End of data read */
case USB_HOST_READSHRT: /* End of data read */
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
break;
case USB_HOST_READOVER: /* buffer over */
USB200.CFIFOCTR = USB_HOST_BITBCLR;
usb0_host_disable_brdy_int(USB_HOST_PIPE0);
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
break;
case USB_HOST_FIFOERROR: /* FIFO access error */
default:
break;
}
break;
default:
break;
}
#endif
}
else
{
usb0_host_brdy_int(Status, Int_enbl);
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BRDYSTS;
}
/*******************************************************************************
* Function Name: usb0_host_NRDYInterrupt
* Description : Executes USB NRDY interrupt.
* Arguments : uint16_t Status ; NRDYSTS Register Value
* : uint16_t Int_enbl ; NRDYENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_NRDYInterrupt (uint16_t Status, uint16_t Int_enbl)
{
uint16_t pid;
volatile uint16_t dumy_sts;
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
{
USB200.NRDYSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
pid = usb0_host_get_pid(USB_HOST_PIPE0);
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
{
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
#if(1) /* ohci_wrapp */
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
#endif
}
else if (pid == USB_HOST_PID_NAK)
{
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_NORES;
#if(1) /* ohci_wrapp */
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_NORES;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
#endif
}
else
{
/* Do Nothing */
}
}
else
{
usb0_host_nrdy_int(Status, Int_enbl);
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.NRDYSTS;
}
/*******************************************************************************
* Function Name: usb0_host_BEMPInterrupt
* Description : Executes USB BEMP interrupt.
* Arguments : uint16_t Status ; BEMPSTS Register Value
* : uint16_t Int_enbl ; BEMPENB Register Value
* Return Value : none
*******************************************************************************/
void usb0_host_BEMPInterrupt (uint16_t Status, uint16_t Int_enbl)
{
uint16_t buffer;
uint16_t pid;
volatile uint16_t dumy_sts;
if ((Status & g_usb0_host_bit_set[USB_HOST_PIPE0]) && (Int_enbl & g_usb0_host_bit_set[USB_HOST_PIPE0]))
{
USB200.BEMPSTS = (uint16_t)~g_usb0_host_bit_set[USB_HOST_PIPE0];
pid = usb0_host_get_pid(USB_HOST_PIPE0);
if ((pid == USB_HOST_PID_STALL) || (pid == USB_HOST_PID_STALL2))
{
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_STALL;
#if(1) /* ohci_wrapp */
g_usb0_host_pipe_status[USB_HOST_PIPE0] = USB_HOST_PIPE_STALL; /* exit STALL */
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_STALL);
#endif
}
else
{
#if(1) /* ohci_wrapp */
switch ((g_usb0_host_CmdStage & (USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
{
case (USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
break;
case (USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
switch (buffer)
{
case USB_HOST_WRITING: /* Continue of data write */
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
break;
case USB_HOST_WRITESHRT: /* End of data write */
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
ohciwrapp_loc_TransEnd(USB_HOST_PIPE0, TD_CC_NOERROR);
break;
case USB_HOST_FIFOERROR: /* FIFO access error */
default:
break;
}
break;
default:
/* do nothing */
break;
}
#else
switch ((g_usb0_host_CmdStage & (USB_HOST_MODE_FIELD | USB_HOST_STAGE_FIELD | USB_HOST_CMD_FIELD)))
{
case (USB_HOST_MODE_READ | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_DONE;
break;
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_DATA | USB_HOST_CMD_DOING):
buffer = usb0_host_write_buffer(USB_HOST_PIPE0);
switch (buffer)
{
case USB_HOST_WRITING: /* Continue of data write */
case USB_HOST_WRITEEND: /* End of data write (zero-length) */
break;
case USB_HOST_WRITESHRT: /* End of data write */
g_usb0_host_CmdStage &= (~USB_HOST_STAGE_FIELD);
g_usb0_host_CmdStage |= USB_HOST_STAGE_STATUS;
break;
case USB_HOST_FIFOERROR: /* FIFO access error */
default:
break;
}
break;
case (USB_HOST_MODE_WRITE | USB_HOST_STAGE_STATUS | USB_HOST_CMD_DOING):
g_usb0_host_CmdStage &= (~USB_HOST_CMD_FIELD);
g_usb0_host_CmdStage |= USB_HOST_CMD_IDLE;
break;
default:
/* do nothing */
break;
}
#endif
}
}
else
{
usb0_host_bemp_int(Status, Int_enbl);
}
/* Three dummy reads for clearing interrupt requests */
dumy_sts = USB200.BEMPSTS;
}
/* End of File */

637
libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/host/usb0_host_usbsig.c Normal file
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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_usbsig.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "usb0_host.h"
#include "dev_drv.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
static void usb0_host_EnableINT_Module(void);
static void usb0_host_Enable_AttachINT(void);
static void usb0_host_Disable_AttachINT(void);
static void usb0_host_Disable_BchgINT(void);
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: usb0_host_InitModule
* Description : Initializes the USB module in USB host module.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_InitModule (void)
{
uint16_t buf1;
uint16_t buf2;
uint16_t buf3;
usb0_host_init_pipe_status();
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
1,
USB_SYSCFG_DCFM_SHIFT,
USB_SYSCFG_DCFM); /* HOST mode */
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
1,
USB_SYSCFG_DRPD_SHIFT,
USB_SYSCFG_DRPD); /* PORT0 D+, D- setting */
do
{
buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
Userdef_USB_usb0_host_delay_xms(50);
buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
Userdef_USB_usb0_host_delay_xms(50);
buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
} while ((buf1 != buf2) || (buf1 != buf3));
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
1,
USB_SYSCFG_USBE_SHIFT,
USB_SYSCFG_USBE);
USB200.CFIFOSEL = (uint16_t)(USB_HOST_BITRCNT | USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
USB200.D0FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
USB200.D1FIFOSEL = (uint16_t)( USB_HOST_BITMBW_8 | USB_HOST_BITBYTE_LITTLE);
}
/*******************************************************************************
* Function Name: usb0_host_CheckAttach
* Description : Returns the USB device connection state.
* Arguments : none
* Return Value : uint16_t ; USB_HOST_ATTACH : Attached
* : ; USB_HOST_DETACH : not Attached
*******************************************************************************/
uint16_t usb0_host_CheckAttach (void)
{
uint16_t buf1;
uint16_t buf2;
uint16_t buf3;
uint16_t rhst;
do
{
buf1 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
Userdef_USB_usb0_host_delay_xms(50);
buf2 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
Userdef_USB_usb0_host_delay_xms(50);
buf3 = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
} while ((buf1 != buf2) || (buf1 != buf3));
rhst = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
USB_DVSTCTR0_RHST_SHIFT,
USB_DVSTCTR0_RHST);
if (rhst == USB_HOST_UNDECID)
{
if (buf1 == USB_HOST_FS_JSTS)
{
if (g_usb0_host_SupportUsbDeviceSpeed == USB_HOST_HIGH_SPEED)
{
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
1,
USB_SYSCFG_HSE_SHIFT,
USB_SYSCFG_HSE);
}
else
{
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
0,
USB_SYSCFG_HSE_SHIFT,
USB_SYSCFG_HSE);
}
return USB_HOST_ATTACH;
}
else if (buf1 == USB_HOST_LS_JSTS)
{
/* Low Speed Device */
RZA_IO_RegWrite_16(&USB200.SYSCFG0,
0,
USB_SYSCFG_HSE_SHIFT,
USB_SYSCFG_HSE);
return USB_HOST_ATTACH;
}
else
{
/* Do Nothing */
}
}
else if ((rhst == USB_HOST_HSMODE) || (rhst == USB_HOST_FSMODE))
{
return USB_HOST_ATTACH;
}
else if (rhst == USB_HOST_LSMODE)
{
return USB_HOST_ATTACH;
}
else
{
/* Do Nothing */
}
return USB_HOST_DETACH;
}
/*******************************************************************************
* Function Name: usb0_host_UsbAttach
* Description : Connects the USB device.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_UsbAttach (void)
{
usb0_host_EnableINT_Module();
usb0_host_Disable_BchgINT();
usb0_host_Disable_AttachINT();
usb0_host_Enable_DetachINT();
}
/*******************************************************************************
* Function Name: usb0_host_UsbDetach
* Description : Disconnects the USB device.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_UsbDetach (void)
{
uint16_t pipe;
uint16_t devadr;
g_usb0_host_driver_state = USB_HOST_DRV_DETACHED;
/* Terminate all the pipes in which communications on port */
/* are currently carried out */
for (pipe = 0; pipe < (USB_HOST_MAX_PIPE_NO + 1); ++pipe)
{
if (g_usb0_host_pipe_status[pipe] != USB_HOST_PIPE_IDLE)
{
if (pipe == USB_HOST_PIPE0)
{
devadr = RZA_IO_RegRead_16(&USB200.DCPMAXP,
USB_DCPMAXP_DEVSEL_SHIFT,
USB_DCPMAXP_DEVSEL);
}
else
{
devadr = RZA_IO_RegRead_16(&g_usb0_host_pipemaxp[pipe], USB_PIPEMAXP_DEVSEL_SHIFT, USB_PIPEMAXP_DEVSEL);
}
if (devadr == g_usb0_host_UsbAddress)
{
usb0_host_stop_transfer(pipe);
}
g_usb0_host_pipe_status[pipe] = USB_HOST_PIPE_IDLE;
}
}
g_usb0_host_ConfigNum = 0;
g_usb0_host_UsbAddress = 0;
g_usb0_host_default_max_packet[USB_HOST_DEVICE_0] = 64;
usb0_host_UsbDetach2();
}
/*******************************************************************************
* Function Name: usb0_host_UsbDetach2
* Description : Disconnects the USB device.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_UsbDetach2 (void)
{
usb0_host_Disable_DetachINT();
usb0_host_Disable_BchgINT();
usb0_host_Enable_AttachINT();
}
/*******************************************************************************
* Function Name: usb0_host_UsbBusReset
* Description : Issues the USB bus reset signal.
* Arguments : none
* Return Value : uint16_t ; RHST
*******************************************************************************/
uint16_t usb0_host_UsbBusReset (void)
{
uint16_t buffer;
uint16_t loop;
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
1,
USB_DVSTCTR0_USBRST_SHIFT,
USB_DVSTCTR0_USBRST);
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
0,
USB_DVSTCTR0_UACT_SHIFT,
USB_DVSTCTR0_UACT);
Userdef_USB_usb0_host_delay_xms(50);
buffer = USB200.DVSTCTR0;
buffer &= (uint16_t)(~(USB_HOST_BITRST));
buffer |= USB_HOST_BITUACT;
USB200.DVSTCTR0 = buffer;
Userdef_USB_usb0_host_delay_xms(20);
for (loop = 0, buffer = USB_HOST_HSPROC; loop < 3; ++loop)
{
buffer = RZA_IO_RegRead_16(&USB200.DVSTCTR0,
USB_DVSTCTR0_RHST_SHIFT,
USB_DVSTCTR0_RHST);
if (buffer == USB_HOST_HSPROC)
{
Userdef_USB_usb0_host_delay_xms(10);
}
else
{
break;
}
}
return buffer;
}
/*******************************************************************************
* Function Name: usb0_host_UsbResume
* Description : Issues the USB resume signal.
* Arguments : none
* Return Value : int32_t ; DEVDRV_SUCCESS
* : ; DEVDRV_ERROR
*******************************************************************************/
int32_t usb0_host_UsbResume (void)
{
uint16_t buf;
if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) == 0)
{
/* not SUSPEND */
return DEVDRV_ERROR;
}
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_BCHGE_SHIFT,
USB_INTENB1_BCHGE);
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
1,
USB_DVSTCTR0_RESUME_SHIFT,
USB_DVSTCTR0_RESUME);
Userdef_USB_usb0_host_delay_xms(20);
buf = USB200.DVSTCTR0;
buf &= (uint16_t)(~(USB_HOST_BITRESUME));
buf |= USB_HOST_BITUACT;
USB200.DVSTCTR0 = buf;
g_usb0_host_driver_state &= (uint16_t)~USB_HOST_DRV_SUSPEND;
return DEVDRV_SUCCESS;
}
/*******************************************************************************
* Function Name: usb0_host_UsbSuspend
* Description : Issues the USB suspend signal.
* Arguments : none
* Return Value : int32_t ; DEVDRV_SUCCESS :not SUSPEND
* : ; DEVDRV_ERROR :SUSPEND
*******************************************************************************/
int32_t usb0_host_UsbSuspend (void)
{
uint16_t buf;
if ((g_usb0_host_driver_state & USB_HOST_DRV_SUSPEND) != 0)
{
/* SUSPEND */
return DEVDRV_ERROR;
}
RZA_IO_RegWrite_16(&USB200.DVSTCTR0,
0,
USB_DVSTCTR0_UACT_SHIFT,
USB_DVSTCTR0_UACT);
Userdef_USB_usb0_host_delay_xms(5);
buf = RZA_IO_RegRead_16(&USB200.SYSSTS0,
USB_SYSSTS0_LNST_SHIFT,
USB_SYSSTS0_LNST);
if ((buf != USB_HOST_FS_JSTS) && (buf != USB_HOST_LS_JSTS))
{
usb0_host_UsbDetach();
}
else
{
g_usb0_host_driver_state |= USB_HOST_DRV_SUSPEND;
}
return DEVDRV_SUCCESS;
}
/*******************************************************************************
* Function Name: usb0_host_Enable_DetachINT
* Description : Enables the USB disconnection interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_Enable_DetachINT (void)
{
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
RZA_IO_RegWrite_16(&USB200.INTENB1,
1,
USB_INTENB1_DTCHE_SHIFT,
USB_INTENB1_DTCHE);
}
/*******************************************************************************
* Function Name: usb0_host_Disable_DetachINT
* Description : Disables the USB disconnection interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_Disable_DetachINT (void)
{
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITDTCH));
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_DTCHE_SHIFT,
USB_INTENB1_DTCHE);
}
/*******************************************************************************
* Function Name: usb0_host_Enable_AttachINT
* Description : Enables the USB connection detection interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_Enable_AttachINT (void)
{
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
RZA_IO_RegWrite_16(&USB200.INTENB1,
1,
USB_INTENB1_ATTCHE_SHIFT,
USB_INTENB1_ATTCHE);
}
/*******************************************************************************
* Function Name: usb0_host_Disable_AttachINT
* Description : Disables the USB connection detection interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_Disable_AttachINT (void)
{
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITATTCH));
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_ATTCHE_SHIFT,
USB_INTENB1_ATTCHE);
}
/*******************************************************************************
* Function Name: usb0_host_Disable_BchgINT
* Description : Disables the USB bus change detection interrupt.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_Disable_BchgINT (void)
{
USB200.INTSTS1 = (uint16_t)(~(USB_HOST_BITBCHG));
RZA_IO_RegWrite_16(&USB200.INTENB1,
0,
USB_INTENB1_BCHGE_SHIFT,
USB_INTENB1_BCHGE);
}
/*******************************************************************************
* Function Name: usb0_host_set_devadd
* Description : DEVADDn register is set by specified value
* Arguments : uint16_t addr : Device address
* : uint16_t *devadd : Set value
* Return Value : none
*******************************************************************************/
void usb0_host_set_devadd (uint16_t addr, uint16_t * devadd)
{
uint16_t * ptr;
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
switch (addr)
{
case USB_HOST_DEVICE_0:
ptr = (uint16_t *)&USB200.DEVADD0;
break;
case USB_HOST_DEVICE_1:
ptr = (uint16_t *)&USB200.DEVADD1;
break;
case USB_HOST_DEVICE_2:
ptr = (uint16_t *)&USB200.DEVADD2;
break;
case USB_HOST_DEVICE_3:
ptr = (uint16_t *)&USB200.DEVADD3;
break;
case USB_HOST_DEVICE_4:
ptr = (uint16_t *)&USB200.DEVADD4;
break;
case USB_HOST_DEVICE_5:
ptr = (uint16_t *)&USB200.DEVADD5;
break;
case USB_HOST_DEVICE_6:
ptr = (uint16_t *)&USB200.DEVADD6;
break;
case USB_HOST_DEVICE_7:
ptr = (uint16_t *)&USB200.DEVADD7;
break;
case USB_HOST_DEVICE_8:
ptr = (uint16_t *)&USB200.DEVADD8;
break;
case USB_HOST_DEVICE_9:
ptr = (uint16_t *)&USB200.DEVADD9;
break;
case USB_HOST_DEVICE_10:
ptr = (uint16_t *)&USB200.DEVADDA;
break;
default:
ret_flag = DEVDRV_FLAG_OFF;
break;
}
if (ret_flag == DEVDRV_FLAG_ON)
{
*ptr = (uint16_t)(*devadd & USB_HOST_DEVADD_MASK);
}
}
/*******************************************************************************
* Function Name: usb0_host_get_devadd
* Description : DEVADDn register is obtained
* Arguments : uint16_t addr : Device address
* : uint16_t *devadd : USB_HOST_DEVADD register value
* Return Value : none
*******************************************************************************/
void usb0_host_get_devadd (uint16_t addr, uint16_t * devadd)
{
uint16_t * ptr;
uint16_t ret_flag = DEVDRV_FLAG_ON; // avoid warning.
switch (addr)
{
case USB_HOST_DEVICE_0:
ptr = (uint16_t *)&USB200.DEVADD0;
break;
case USB_HOST_DEVICE_1:
ptr = (uint16_t *)&USB200.DEVADD1;
break;
case USB_HOST_DEVICE_2:
ptr = (uint16_t *)&USB200.DEVADD2;
break;
case USB_HOST_DEVICE_3:
ptr = (uint16_t *)&USB200.DEVADD3;
break;
case USB_HOST_DEVICE_4:
ptr = (uint16_t *)&USB200.DEVADD4;
break;
case USB_HOST_DEVICE_5:
ptr = (uint16_t *)&USB200.DEVADD5;
break;
case USB_HOST_DEVICE_6:
ptr = (uint16_t *)&USB200.DEVADD6;
break;
case USB_HOST_DEVICE_7:
ptr = (uint16_t *)&USB200.DEVADD7;
break;
case USB_HOST_DEVICE_8:
ptr = (uint16_t *)&USB200.DEVADD8;
break;
case USB_HOST_DEVICE_9:
ptr = (uint16_t *)&USB200.DEVADD9;
break;
case USB_HOST_DEVICE_10:
ptr = (uint16_t *)&USB200.DEVADDA;
break;
default:
ret_flag = DEVDRV_FLAG_OFF;
break;
}
if (ret_flag == DEVDRV_FLAG_ON)
{
*devadd = *ptr;
}
}
/*******************************************************************************
* Function Name: usb0_host_EnableINT_Module
* Description : Enables BEMP/NRDY/BRDY interrupt and SIGN/SACK interrupt.
* : Enables NRDY/BEMP interrupt in the pipe0.
* Arguments : none
* Return Value : none
*******************************************************************************/
void usb0_host_EnableINT_Module (void)
{
uint16_t buf;
buf = USB200.INTENB0;
buf |= (USB_HOST_BITBEMPE | USB_HOST_BITNRDYE | USB_HOST_BITBRDYE);
USB200.INTENB0 = buf;
buf = USB200.INTENB1;
buf |= (USB_HOST_BITSIGNE | USB_HOST_BITSACKE);
USB200.INTENB1 = buf;
usb0_host_enable_nrdy_int(USB_HOST_PIPE0);
usb0_host_enable_bemp_int(USB_HOST_PIPE0);
}
/* End of File */

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/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_dmacdrv.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "r_typedefs.h"
#include "iodefine.h"
#include "rza_io_regrw.h"
#include "usb0_host_dmacdrv.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
#define DMAC_INDEFINE (255) /* Macro definition when REQD bit is not used */
/* ==== Request setting information for on-chip peripheral module ==== */
typedef enum dmac_peri_req_reg_type
{
DMAC_REQ_MID,
DMAC_REQ_RID,
DMAC_REQ_AM,
DMAC_REQ_LVL,
DMAC_REQ_REQD
} dmac_peri_req_reg_type_t;
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/* ==== Prototype declaration ==== */
/* ==== Global variable ==== */
/* On-chip peripheral module request setting table */
static const uint8_t usb0_host_dmac_peri_req_init_table[8][5] =
{
/* MID,RID, AM,LVL,REQD */
{ 32, 3, 2, 1, 1}, /* USB_0 channel 0 transmit FIFO empty */
{ 32, 3, 2, 1, 0}, /* USB_0 channel 0 receive FIFO full */
{ 33, 3, 2, 1, 1}, /* USB_0 channel 1 transmit FIFO empty */
{ 33, 3, 2, 1, 0}, /* USB_0 channel 1 receive FIFO full */
{ 34, 3, 2, 1, 1}, /* USB_1 channel 0 transmit FIFO empty */
{ 34, 3, 2, 1, 0}, /* USB_1 channel 0 receive FIFO full */
{ 35, 3, 2, 1, 1}, /* USB_1 channel 1 transmit FIFO empty */
{ 35, 3, 2, 1, 0}, /* USB_1 channel 1 receive FIFO full */
};
/*******************************************************************************
* Function Name: usb0_host_DMAC1_PeriReqInit
* Description : Sets the register mode for DMA mode and the on-chip peripheral
* : module request for transfer request for DMAC channel 1.
* : Executes DMAC initial setting using the DMA information
* : specified by the argument *trans_info and the enabled/disabled
* : continuous transfer specified by the argument continuation.
* : Registers DMAC channel 1 interrupt handler function and sets
* : the interrupt priority level. Then enables transfer completion
* : interrupt.
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
* : : register
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
* : uint32_t continuation : Set continuous transfer to be valid
* : : after DMA transfer has been completed
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
* : : transfer
* : uint32_t request_factor : Factor for on-chip peripheral module
* : : request
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
* : :
* : uint32_t req_direction : Setting value of CHCFG_n register
* : : REQD bit
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC1_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
uint32_t request_factor, uint32_t req_direction)
{
/* ==== Register mode ==== */
if (DMAC_MODE_REGISTER == dmamode)
{
/* ==== Next0 register set ==== */
DMAC1.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
DMAC1.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
DMAC1.N0TB_n = trans_info->count; /* Total transfer byte count */
/* DAD : Transfer destination address counting direction */
/* SAD : Transfer source address counting direction */
/* DDS : Transfer destination transfer size */
/* SDS : Transfer source transfer size */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
trans_info->daddr_dir,
DMAC1_CHCFG_n_DAD_SHIFT,
DMAC1_CHCFG_n_DAD);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
trans_info->saddr_dir,
DMAC1_CHCFG_n_SAD_SHIFT,
DMAC1_CHCFG_n_SAD);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
trans_info->dst_size,
DMAC1_CHCFG_n_DDS_SHIFT,
DMAC1_CHCFG_n_DDS);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
trans_info->src_size,
DMAC1_CHCFG_n_SDS_SHIFT,
DMAC1_CHCFG_n_SDS);
/* DMS : Register mode */
/* RSEL : Select Next0 register set */
/* SBE : No discharge of buffer data when aborted */
/* DEM : No DMA interrupt mask */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_DMS_SHIFT,
DMAC1_CHCFG_n_DMS);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_RSEL_SHIFT,
DMAC1_CHCFG_n_RSEL);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_SBE_SHIFT,
DMAC1_CHCFG_n_SBE);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_DEM_SHIFT,
DMAC1_CHCFG_n_DEM);
/* ---- Continuous transfer ---- */
if (DMAC_SAMPLE_CONTINUATION == continuation)
{
/* REN : Execute continuous transfer */
/* RSW : Change register set when DMA transfer is completed. */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
1,
DMAC1_CHCFG_n_REN_SHIFT,
DMAC1_CHCFG_n_REN);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
1,
DMAC1_CHCFG_n_RSW_SHIFT,
DMAC1_CHCFG_n_RSW);
}
/* ---- Single transfer ---- */
else
{
/* REN : Do not execute continuous transfer */
/* RSW : Do not change register set when DMA transfer is completed. */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_REN_SHIFT,
DMAC1_CHCFG_n_REN);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_RSW_SHIFT,
DMAC1_CHCFG_n_RSW);
}
/* TM : Single transfer */
/* SEL : Channel setting */
/* HIEN, LOEN : On-chip peripheral module request */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_TM_SHIFT,
DMAC1_CHCFG_n_TM);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
1,
DMAC1_CHCFG_n_SEL_SHIFT,
DMAC1_CHCFG_n_SEL);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
1,
DMAC1_CHCFG_n_HIEN_SHIFT,
DMAC1_CHCFG_n_HIEN);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
0,
DMAC1_CHCFG_n_LOEN_SHIFT,
DMAC1_CHCFG_n_LOEN);
/* ---- Set factor by specified on-chip peripheral module request ---- */
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
DMAC1_CHCFG_n_AM_SHIFT,
DMAC1_CHCFG_n_AM);
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
DMAC1_CHCFG_n_LVL_SHIFT,
DMAC1_CHCFG_n_LVL);
if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
{
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
DMAC1_CHCFG_n_REQD_SHIFT,
DMAC1_CHCFG_n_REQD);
}
else
{
RZA_IO_RegWrite_32(&DMAC1.CHCFG_n,
req_direction,
DMAC1_CHCFG_n_REQD_SHIFT,
DMAC1_CHCFG_n_REQD);
}
RZA_IO_RegWrite_32(&DMAC01.DMARS,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
DMAC01_DMARS_CH1_RID_SHIFT,
DMAC01_DMARS_CH1_RID);
RZA_IO_RegWrite_32(&DMAC01.DMARS,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
DMAC01_DMARS_CH1_MID_SHIFT,
DMAC01_DMARS_CH1_MID);
/* PR : Round robin mode */
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
1,
DMAC07_DCTRL_0_7_PR_SHIFT,
DMAC07_DCTRL_0_7_PR);
}
}
/*******************************************************************************
* Function Name: usb0_host_DMAC1_Open
* Description : Enables DMAC channel 1 transfer.
* Arguments : uint32_t req : DMAC request mode
* Return Value : 0 : Succeeded in enabling DMA transfer
* : -1 : Failed to enable DMA transfer (due to DMA operation)
*******************************************************************************/
int32_t usb0_host_DMAC1_Open (uint32_t req)
{
int32_t ret;
volatile uint8_t dummy;
/* Transferable? */
if ((0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
DMAC1_CHSTAT_n_EN_SHIFT,
DMAC1_CHSTAT_n_EN)) &&
(0 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
DMAC1_CHSTAT_n_TACT_SHIFT,
DMAC1_CHSTAT_n_TACT)))
{
/* Clear Channel Status Register */
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
1,
DMAC1_CHCTRL_n_SWRST_SHIFT,
DMAC1_CHCTRL_n_SWRST);
dummy = RZA_IO_RegRead_32(&DMAC1.CHCTRL_n,
DMAC1_CHCTRL_n_SWRST_SHIFT,
DMAC1_CHCTRL_n_SWRST);
/* Enable DMA transfer */
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
1,
DMAC1_CHCTRL_n_SETEN_SHIFT,
DMAC1_CHCTRL_n_SETEN);
/* ---- Request by software ---- */
if (DMAC_REQ_MODE_SOFT == req)
{
/* DMA transfer Request by software */
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
1,
DMAC1_CHCTRL_n_STG_SHIFT,
DMAC1_CHCTRL_n_STG);
}
ret = 0;
}
else
{
ret = -1;
}
return ret;
}
/*******************************************************************************
* Function Name: usb0_host_DMAC1_Close
* Description : Aborts DMAC channel 1 transfer. Returns the remaining transfer
* : byte count at the time of DMA transfer abort to the argument
* : *remain.
* Arguments : uint32_t * remain : Remaining transfer byte count when
* : : DMA transfer is aborted
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC1_Close (uint32_t * remain)
{
/* ==== Abort transfer ==== */
RZA_IO_RegWrite_32(&DMAC1.CHCTRL_n,
1,
DMAC1_CHCTRL_n_CLREN_SHIFT,
DMAC1_CHCTRL_n_CLREN);
while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
DMAC1_CHSTAT_n_TACT_SHIFT,
DMAC1_CHSTAT_n_TACT))
{
/* Loop until transfer is aborted */
}
while (1 == RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
DMAC1_CHSTAT_n_EN_SHIFT,
DMAC1_CHSTAT_n_EN))
{
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
}
/* ==== Obtain remaining transfer byte count ==== */
*remain = DMAC1.CRTB_n;
}
/*******************************************************************************
* Function Name: usb0_host_DMAC1_Load_Set
* Description : Sets the transfer source address, transfer destination
* : address, and total transfer byte count respectively
* : specified by the argument src_addr, dst_addr, and count to
* : DMAC channel 1 as DMA transfer information.
* : Sets the register set selected by the CHCFG_n register
* : RSEL bit from the Next0 or Next1 register set.
* : This function should be called when DMA transfer of DMAC
* : channel 1 is aboted.
* Arguments : uint32_t src_addr : Transfer source address
* : uint32_t dst_addr : Transfer destination address
* : uint32_t count : Total transfer byte count
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC1_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
{
uint8_t reg_set;
/* Obtain register set in use */
reg_set = RZA_IO_RegRead_32(&DMAC1.CHSTAT_n,
DMAC1_CHSTAT_n_SR_SHIFT,
DMAC1_CHSTAT_n_SR);
/* ==== Load ==== */
if (0 == reg_set)
{
/* ---- Next0 Register Set ---- */
DMAC1.N0SA_n = src_addr; /* Start address of transfer source */
DMAC1.N0DA_n = dst_addr; /* Start address of transfer destination */
DMAC1.N0TB_n = count; /* Total transfer byte count */
}
else
{
/* ---- Next1 Register Set ---- */
DMAC1.N1SA_n = src_addr; /* Start address of transfer source */
DMAC1.N1DA_n = dst_addr; /* Start address of transfer destination */
DMAC1.N1TB_n = count; /* Total transfer byte count */
}
}
/*******************************************************************************
* Function Name: usb0_host_DMAC2_PeriReqInit
* Description : Sets the register mode for DMA mode and the on-chip peripheral
* : module request for transfer request for DMAC channel 2.
* : Executes DMAC initial setting using the DMA information
* : specified by the argument *trans_info and the enabled/disabled
* : continuous transfer specified by the argument continuation.
* : Registers DMAC channel 2 interrupt handler function and sets
* : the interrupt priority level. Then enables transfer completion
* : interrupt.
* Arguments : dmac_transinfo_t * trans_info : Setting information to DMAC
* : : register
* : uint32_t dmamode : DMA mode (only for DMAC_MODE_REGISTER)
* : uint32_t continuation : Set continuous transfer to be valid
* : : after DMA transfer has been completed
* : DMAC_SAMPLE_CONTINUATION : Execute continuous transfer
* : DMAC_SAMPLE_SINGLE : Do not execute continuous
* : : transfer
* : uint32_t request_factor : Factor for on-chip peripheral module
* : : request
* : DMAC_REQ_OSTM0TINT : OSTM_0 compare match
* : DMAC_REQ_OSTM1TINT : OSTM_1 compare match
* : DMAC_REQ_TGI0A : MTU2_0 input capture/compare match
* : :
* : uint32_t req_direction : Setting value of CHCFG_n register
* : : REQD bit
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC2_PeriReqInit (const dmac_transinfo_t * trans_info, uint32_t dmamode, uint32_t continuation,
uint32_t request_factor, uint32_t req_direction)
{
/* ==== Register mode ==== */
if (DMAC_MODE_REGISTER == dmamode)
{
/* ==== Next0 register set ==== */
DMAC2.N0SA_n = trans_info->src_addr; /* Start address of transfer source */
DMAC2.N0DA_n = trans_info->dst_addr; /* Start address of transfer destination */
DMAC2.N0TB_n = trans_info->count; /* Total transfer byte count */
/* DAD : Transfer destination address counting direction */
/* SAD : Transfer source address counting direction */
/* DDS : Transfer destination transfer size */
/* SDS : Transfer source transfer size */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
trans_info->daddr_dir,
DMAC2_CHCFG_n_DAD_SHIFT,
DMAC2_CHCFG_n_DAD);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
trans_info->saddr_dir,
DMAC2_CHCFG_n_SAD_SHIFT,
DMAC2_CHCFG_n_SAD);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
trans_info->dst_size,
DMAC2_CHCFG_n_DDS_SHIFT,
DMAC2_CHCFG_n_DDS);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
trans_info->src_size,
DMAC2_CHCFG_n_SDS_SHIFT,
DMAC2_CHCFG_n_SDS);
/* DMS : Register mode */
/* RSEL : Select Next0 register set */
/* SBE : No discharge of buffer data when aborted */
/* DEM : No DMA interrupt mask */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_DMS_SHIFT,
DMAC2_CHCFG_n_DMS);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_RSEL_SHIFT,
DMAC2_CHCFG_n_RSEL);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_SBE_SHIFT,
DMAC2_CHCFG_n_SBE);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_DEM_SHIFT,
DMAC2_CHCFG_n_DEM);
/* ---- Continuous transfer ---- */
if (DMAC_SAMPLE_CONTINUATION == continuation)
{
/* REN : Execute continuous transfer */
/* RSW : Change register set when DMA transfer is completed. */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
1,
DMAC2_CHCFG_n_REN_SHIFT,
DMAC2_CHCFG_n_REN);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
1,
DMAC2_CHCFG_n_RSW_SHIFT,
DMAC2_CHCFG_n_RSW);
}
/* ---- Single transfer ---- */
else
{
/* REN : Do not execute continuous transfer */
/* RSW : Do not change register set when DMA transfer is completed. */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_REN_SHIFT,
DMAC2_CHCFG_n_REN);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_RSW_SHIFT,
DMAC2_CHCFG_n_RSW);
}
/* TM : Single transfer */
/* SEL : Channel setting */
/* HIEN, LOEN : On-chip peripheral module request */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_TM_SHIFT,
DMAC2_CHCFG_n_TM);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
2,
DMAC2_CHCFG_n_SEL_SHIFT,
DMAC2_CHCFG_n_SEL);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
1,
DMAC2_CHCFG_n_HIEN_SHIFT,
DMAC2_CHCFG_n_HIEN);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
0,
DMAC2_CHCFG_n_LOEN_SHIFT,
DMAC2_CHCFG_n_LOEN);
/* ---- Set factor by specified on-chip peripheral module request ---- */
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_AM],
DMAC2_CHCFG_n_AM_SHIFT,
DMAC2_CHCFG_n_AM);
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_LVL],
DMAC2_CHCFG_n_LVL_SHIFT,
DMAC2_CHCFG_n_LVL);
if (usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD] != DMAC_INDEFINE)
{
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_REQD],
DMAC2_CHCFG_n_REQD_SHIFT,
DMAC2_CHCFG_n_REQD);
}
else
{
RZA_IO_RegWrite_32(&DMAC2.CHCFG_n,
req_direction,
DMAC2_CHCFG_n_REQD_SHIFT,
DMAC2_CHCFG_n_REQD);
}
RZA_IO_RegWrite_32(&DMAC23.DMARS,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_RID],
DMAC23_DMARS_CH2_RID_SHIFT,
DMAC23_DMARS_CH2_RID);
RZA_IO_RegWrite_32(&DMAC23.DMARS,
usb0_host_dmac_peri_req_init_table[request_factor][DMAC_REQ_MID],
DMAC23_DMARS_CH2_MID_SHIFT,
DMAC23_DMARS_CH2_MID);
/* PR : Round robin mode */
RZA_IO_RegWrite_32(&DMAC07.DCTRL_0_7,
1,
DMAC07_DCTRL_0_7_PR_SHIFT,
DMAC07_DCTRL_0_7_PR);
}
}
/*******************************************************************************
* Function Name: usb0_host_DMAC2_Open
* Description : Enables DMAC channel 2 transfer.
* Arguments : uint32_t req : DMAC request mode
* Return Value : 0 : Succeeded in enabling DMA transfer
* : -1 : Failed to enable DMA transfer (due to DMA operation)
*******************************************************************************/
int32_t usb0_host_DMAC2_Open (uint32_t req)
{
int32_t ret;
volatile uint8_t dummy;
/* Transferable? */
if ((0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
DMAC2_CHSTAT_n_EN_SHIFT,
DMAC2_CHSTAT_n_EN)) &&
(0 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
DMAC2_CHSTAT_n_TACT_SHIFT,
DMAC2_CHSTAT_n_TACT)))
{
/* Clear Channel Status Register */
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
1,
DMAC2_CHCTRL_n_SWRST_SHIFT,
DMAC2_CHCTRL_n_SWRST);
dummy = RZA_IO_RegRead_32(&DMAC2.CHCTRL_n,
DMAC2_CHCTRL_n_SWRST_SHIFT,
DMAC2_CHCTRL_n_SWRST);
/* Enable DMA transfer */
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
1,
DMAC2_CHCTRL_n_SETEN_SHIFT,
DMAC2_CHCTRL_n_SETEN);
/* ---- Request by software ---- */
if (DMAC_REQ_MODE_SOFT == req)
{
/* DMA transfer Request by software */
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
1,
DMAC2_CHCTRL_n_STG_SHIFT,
DMAC2_CHCTRL_n_STG);
}
ret = 0;
}
else
{
ret = -1;
}
return ret;
}
/*******************************************************************************
* Function Name: usb0_host_DMAC2_Close
* Description : Aborts DMAC channel 2 transfer. Returns the remaining transfer
* : byte count at the time of DMA transfer abort to the argument
* : *remain.
* Arguments : uint32_t * remain : Remaining transfer byte count when
* : : DMA transfer is aborted
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC2_Close (uint32_t * remain)
{
/* ==== Abort transfer ==== */
RZA_IO_RegWrite_32(&DMAC2.CHCTRL_n,
1,
DMAC2_CHCTRL_n_CLREN_SHIFT,
DMAC2_CHCTRL_n_CLREN);
while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
DMAC2_CHSTAT_n_TACT_SHIFT,
DMAC2_CHSTAT_n_TACT))
{
/* Loop until transfer is aborted */
}
while (1 == RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
DMAC2_CHSTAT_n_EN_SHIFT,
DMAC2_CHSTAT_n_EN))
{
/* Loop until 0 is set in EN before checking the remaining transfer byte count */
}
/* ==== Obtain remaining transfer byte count ==== */
*remain = DMAC2.CRTB_n;
}
/*******************************************************************************
* Function Name: usb0_host_DMAC2_Load_Set
* Description : Sets the transfer source address, transfer destination
* : address, and total transfer byte count respectively
* : specified by the argument src_addr, dst_addr, and count to
* : DMAC channel 2 as DMA transfer information.
* : Sets the register set selected by the CHCFG_n register
* : RSEL bit from the Next0 or Next1 register set.
* : This function should be called when DMA transfer of DMAC
* : channel 2 is aboted.
* Arguments : uint32_t src_addr : Transfer source address
* : uint32_t dst_addr : Transfer destination address
* : uint32_t count : Total transfer byte count
* Return Value : none
*******************************************************************************/
void usb0_host_DMAC2_Load_Set (uint32_t src_addr, uint32_t dst_addr, uint32_t count)
{
uint8_t reg_set;
/* Obtain register set in use */
reg_set = RZA_IO_RegRead_32(&DMAC2.CHSTAT_n,
DMAC2_CHSTAT_n_SR_SHIFT,
DMAC2_CHSTAT_n_SR);
/* ==== Load ==== */
if (0 == reg_set)
{
/* ---- Next0 Register Set ---- */
DMAC2.N0SA_n = src_addr; /* Start address of transfer source */
DMAC2.N0DA_n = dst_addr; /* Start address of transfer destination */
DMAC2.N0TB_n = count; /* Total transfer byte count */
}
else
{
/* ---- Next1 Register Set ---- */
DMAC2.N1SA_n = src_addr; /* Start address of transfer source */
DMAC2.N1DA_n = dst_addr; /* Start address of transfer destination */
DMAC2.N1TB_n = count; /* Total transfer byte count */
}
}
/* End of File */

156
libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/usb0_host_ohci_wrapp_pipe.c Normal file
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@ -0,0 +1,156 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include "devdrv_usb_host_api.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
/********************************************************************************************************/
/* Endpoint Configuration Data Format */
/********************************************************************************************************/
/* LINE1: Pipe Window Select Register */
/* CPU Access PIPE : PIPE1 to PIPE9 [ ### SET ### ] */
/* LINE2: Pipe Configuration Register */
/* Transfer Type : USB_HOST_NONE [ USB_HOST_NONE ] */
/* Buffer Ready interrupt : USB_HOST_NONE [ USB_HOST_NONE ] */
/* Double Buffer Mode : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
/* Continuous Transmit: : USB_HOST_CNT_ON / USB_HOST_CNT_OFF [ ### SET ### ] */
/* Short NAK : USB_HOST_NONE [ USB_HOST_NONE ] */
/* Transfer Direction : USB_HOST_NONE [ USB_HOST_NONE ] */
/* Endpoint Number : USB_HOST_NONE [ USB_HOST_NONE ] */
/* LINE3: Pipe Buffer Configuration Register */
/* Buffer Size : (uint16_t)((uint16_t)(((x) / 64) - 1) << 10) */
/* [ ### SET ### ] */
/* Buffer Top Number : (uint16_t)(x) [ ### SET ### ] */
/* LINE4: Pipe Maxpacket Size Register */
/* Max Packet Size : USB_HOST_NONE [ USB_HOST_NONE ] */
/* LINE5: Pipe Cycle Configuration Register (0x6C) */
/* ISO Buffer Flush Mode : USB_HOST_NONE [ USB_HOST_NONE ] */
/* ISO Interval Value : USB_HOST_NONE [ USB_HOST_NONE ] */
/* LINE6: use FIFO port */
/* : USB_HOST_CUSE [ ### SET ### ] */
/* : USB_HOST_D0USE / USB_HOST_D1USE */
/* : USB_HOST_D0DMA / USB_HOST_D0DMA */
/* LINE7: use FIFO port Endian : USB_HOST_FIFO_BIG / USB_HOST_FIFO_LITTLE [ #SET# ] */
/********************************************************************************************************/
/* Device Address 1 */
USB_HOST_CFG_PIPETBL_t usb0_host_blk_ep_tbl1[ ] =
{
{
USB_HOST_PIPE1,
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
(uint16_t)((uint16_t)(((1024) / 64) - 1) << 10) | (uint16_t)(8),
USB_HOST_NONE,
USB_HOST_NONE,
USB_HOST_D0USE
},
{
/* Pipe end */
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF
}
};
USB_HOST_CFG_PIPETBL_t usb0_host_int_ep_tbl1[ ] =
{
{
USB_HOST_PIPE6,
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(40),
USB_HOST_NONE,
USB_HOST_NONE,
USB_HOST_D1USE
},
{
USB_HOST_PIPE7,
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(41),
USB_HOST_NONE,
USB_HOST_NONE,
USB_HOST_D1USE
},
{
USB_HOST_PIPE8,
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(42),
USB_HOST_NONE,
USB_HOST_NONE,
USB_HOST_D1USE
},
{
USB_HOST_PIPE9,
/* TYPE / BFRE / DBLB / CNTMD / SHTNAK / DIR / EPNUM */
USB_HOST_NONE | USB_HOST_NONE | USB_HOST_DBLBON | USB_HOST_CNTMDON | USB_HOST_NONE | USB_HOST_NONE | USB_HOST_NONE,
(uint16_t)((uint16_t)(((64) / 64) - 1) << 10) | (uint16_t)(43),
USB_HOST_NONE,
USB_HOST_NONE,
USB_HOST_D1USE
},
{
/* Pipe end */
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF,
0xFFFF
}
};
/* End of File */

770
libraries/USBHost/USBHost/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/usb0_host_userdef.c Normal file
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@ -0,0 +1,770 @@
/*******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Electronics Corporation and is only
* intended for use with Renesas products. No other uses are authorized. This
* software is owned by Renesas Electronics Corporation and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this software
* and to discontinue the availability of this software. By using this software,
* you agree to the additional terms and conditions found by accessing the
* following link:
* http://www.renesas.com/disclaimer
* Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
*******************************************************************************/
/*******************************************************************************
* File Name : usb0_host_userdef.c
* $Rev: 1116 $
* $Date:: 2014-07-09 16:29:19 +0900#$
* Device(s) : RZ/A1H
* Tool-Chain :
* OS : None
* H/W Platform :
* Description : RZ/A1H R7S72100 USB Sample Program
* Operation :
* Limitations :
*******************************************************************************/
/*******************************************************************************
Includes <System Includes> , "Project Includes"
*******************************************************************************/
#include <stdio.h>
#include "cmsis_os.h"
#include "r_typedefs.h"
#include "iodefine.h"
#include "devdrv_usb_host_api.h"
#include "usb0_host.h"
#include "MBRZA1H.h" /* INTC Driver Header */
#include "usb0_host_dmacdrv.h"
#include "ohci_wrapp_RZ_A1_local.h"
/*******************************************************************************
Typedef definitions
*******************************************************************************/
/*******************************************************************************
Macro definitions
*******************************************************************************/
#define DUMMY_ACCESS (*(volatile unsigned long *)(OSTM0CNT))
/* #define CACHE_WRITEBACK */
/*******************************************************************************
Imported global variables and functions (from other files)
*******************************************************************************/
extern int32_t io_cwb(unsigned long start, unsigned long end);
/*******************************************************************************
Exported global variables and functions (to be accessed by other files)
*******************************************************************************/
static void usb0_host_enable_dmac0(uint32_t src, uint32_t dst, uint32_t count,
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
static void usb0_host_enable_dmac1(uint32_t src, uint32_t dst, uint32_t count,
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc);
static void Userdef_USB_usb0_host_delay_10us_2(void);
/*******************************************************************************
Private global variables and functions
*******************************************************************************/
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_d0fifo_dmaintid
* Description : get D0FIFO DMA Interrupt ID
* Arguments : none
* Return Value : D0FIFO DMA Interrupt ID
*******************************************************************************/
uint16_t Userdef_USB_usb0_host_d0fifo_dmaintid (void)
{
return DMAINT1_IRQn;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_d1fifo_dmaintid
* Description : get D1FIFO DMA Interrupt ID
* Arguments : none
* Return Value : D1FIFO DMA Interrupt ID
*******************************************************************************/
uint16_t Userdef_USB_usb0_host_d1fifo_dmaintid (void)
{
return DMAINT2_IRQn;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_attach
* Description : Wait for the software of 1ms.
* : Alter this function according to the user's system.
* Arguments : none
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_attach (void)
{
// printf("\n");
// printf("channel 0 attach device\n");
// printf("\n");
ohciwrapp_loc_Connect(1);
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_detach
* Description : Wait for the software of 1ms.
* : Alter this function according to the user's system.
* Arguments : none
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_detach (void)
{
// printf("\n");
// printf("channel 0 detach device\n");
// printf("\n");
ohciwrapp_loc_Connect(0);
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_delay_1ms
* Description : Wait for the software of 1ms.
* : Alter this function according to the user's system.
* Arguments : none
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_delay_1ms (void)
{
osDelay(1);
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_delay_xms
* Description : Wait for the software in the period of time specified by the
* : argument.
* : Alter this function according to the user's system.
* Arguments : uint32_t msec ; Wait Time (msec)
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_delay_xms (uint32_t msec)
{
osDelay(msec);
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_delay_10us
* Description : Waits for software for the period specified by the argument.
* : Alter this function according to the user's system.
* Arguments : uint32_t usec ; Wait Time(x 10usec)
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_delay_10us (uint32_t usec)
{
volatile int i;
/* Wait 10us (Please change for your MCU) */
for (i = 0; i < usec; ++i)
{
Userdef_USB_usb0_host_delay_10us_2();
}
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_delay_10us_2
* Description : Waits for software for the period specified by the argument.
* : Alter this function according to the user's system.
* Arguments : none
* Return Value : none
*******************************************************************************/
static void Userdef_USB_usb0_host_delay_10us_2 (void)
{
volatile int i;
volatile unsigned long tmp;
/* Wait 1us (Please change for your MCU) */
for (i = 0; i < 14; ++i)
{
tmp = DUMMY_ACCESS;
}
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_delay_500ns
* Description : Wait for software for 500ns.
* : Alter this function according to the user's system.
* Arguments : none
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_delay_500ns (void)
{
volatile int i;
volatile unsigned long tmp;
/* Wait 500ns (Please change for your MCU) */
/* Wait 500ns I clock 266MHz */
tmp = DUMMY_ACCESS;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_start_dma
* Description : Enables DMA transfer on the information specified by the argument.
* : Set DMAC register by this function to enable DMA transfer.
* : After executing this function, USB module is set to start DMA
* : transfer. DMA transfer should not wait for DMA transfer complete.
* Arguments : USB_HOST_DMA_t *dma : DMA parameter
* : typedef struct{
* : uint32_t fifo; FIFO for using
* : uint32_t buffer; Start address of transfer source/destination
* : uint32_t bytes; Transfer size(Byte)
* : uint32_t dir; Transfer direction(0:Buffer->FIFO, 1:FIFO->Buffer)
* : uint32_t size; DMA transfer size
* : } USB_HOST_DMA_t;
* : uint16_t dfacc ; 0 : cycle steal mode
* : 1 : 16byte continuous mode
* : 2 : 32byte continuous mode
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_start_dma (USB_HOST_DMA_t * dma, uint16_t dfacc)
{
uint32_t trncount;
uint32_t src;
uint32_t dst;
uint32_t size;
uint32_t dir;
#ifdef CACHE_WRITEBACK
uint32_t ptr;
#endif
trncount = dma->bytes;
dir = dma->dir;
if (dir == USB_HOST_FIFO2BUF)
{
/* DxFIFO determination */
dst = dma->buffer;
#ifndef __USB_HOST_DF_ACC_ENABLE__
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
src = (uint32_t)(&USB200.D1FIFO.UINT32);
}
size = dma->size;
if (size == 0)
{
src += 3; /* byte access */
}
else if (size == 1)
{
src += 2; /* short access */
}
else
{
/* Do Nothing */
}
#else
size = dma->size;
if (size == 2)
{
/* 32bit access */
if (dfacc == 2)
{
/* 32byte access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFOB0);
}
else
{
src = (uint32_t)(&USB200.D1FIFOB0);
}
}
else if (dfacc == 1)
{
/* 16byte access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFOB0);
}
else
{
src = (uint32_t)(&USB200.D1FIFOB0);
}
}
else
{
/* normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
src = (uint32_t)(&USB200.D1FIFO.UINT32);
}
}
}
else if (size == 1)
{
/* 16bit access */
dfacc = 0; /* force normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
src = (uint32_t)(&USB200.D1FIFO.UINT32);
}
src += 2; /* short access */
}
else
{
/* 8bit access */
dfacc = 0; /* force normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
src = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
src = (uint32_t)(&USB200.D1FIFO.UINT32);
}
src += 3; /* byte access */
}
#endif
}
else
{
/* DxFIFO determination */
src = dma->buffer;
#ifndef __USB_HOST_DF_ACC_ENABLE__
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
}
size = dma->size;
if (size == 0)
{
dst += 3; /* byte access */
}
else if (size == 1)
{
dst += 2; /* short access */
}
else
{
/* Do Nothing */
}
#else
size = dma->size;
if (size == 2)
{
/* 32bit access */
if (dfacc == 2)
{
/* 32byte access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFOB0);
}
else
{
dst = (uint32_t)(&USB200.D1FIFOB0);
}
}
else if (dfacc == 1)
{
/* 16byte access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFOB0);
}
else
{
dst = (uint32_t)(&USB200.D1FIFOB0);
}
}
else
{
/* normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
}
}
}
else if (size == 1)
{
/* 16bit access */
dfacc = 0; /* force normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
}
dst += 2; /* short access */
}
else
{
/* 8bit access */
dfacc = 0; /* force normal access */
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
dst = (uint32_t)(&USB200.D0FIFO.UINT32);
}
else
{
dst = (uint32_t)(&USB200.D1FIFO.UINT32);
}
dst += 3; /* byte access */
}
#endif
}
#ifdef CACHE_WRITEBACK
ptr = (uint32_t)dma->buffer;
if ((ptr & 0x20000000ul) == 0)
{
io_cwb((uint32_t)ptr,(uint32_t)(ptr)+trncount);
}
#endif
if (dma->fifo == USB_HOST_D0FIFO_DMA)
{
usb0_host_enable_dmac0(src, dst, trncount, size, dir, dma->fifo, dfacc);
}
else
{
usb0_host_enable_dmac1(src, dst, trncount, size, dir, dma->fifo, dfacc);
}
}
/*******************************************************************************
* Function Name: usb0_host_enable_dmac0
* Description : Enables DMA transfer on the information specified by the argument.
* Arguments : uint32_t src : src address
* : uint32_t dst : dst address
* : uint32_t count : transfer byte
* : uint32_t size : transfer size
* : uint32_t dir : direction
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
* : uint16_t dfacc : 0 : normal access
* : : 1 : 16byte access
* : : 2 : 32byte access
* Return Value : none
*******************************************************************************/
static void usb0_host_enable_dmac0 (uint32_t src, uint32_t dst, uint32_t count,
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
{
dmac_transinfo_t trans_info;
uint32_t request_factor = 0;
int32_t ret;
/* ==== Variable setting for DMAC initialization ==== */
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
#ifndef __USB_HOST_DF_ACC_ENABLE__
if (size == 0)
{
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
}
else if (size == 1)
{
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
}
else if (size == 2)
{
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
}
else
{
// printf("size error!!\n");
}
#else
if (dfacc == 2)
{
/* 32byte access */
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
}
else if (dfacc == 1)
{
/* 16byte access */
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
}
else
{
/* normal access */
if (size == 0)
{
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
}
else if (size == 1)
{
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
}
else if (size == 2)
{
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
}
else
{
// printf("size error!!\n");
}
}
#endif
if (dir == USB_HOST_FIFO2BUF)
{
request_factor = DMAC_REQ_USB0_DMA0_RX; /* USB_0 channel 0 receive FIFO full */
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
}
else if (dir == USB_HOST_BUF2FIFO)
{
request_factor = DMAC_REQ_USB0_DMA0_TX; /* USB_0 channel 0 receive FIFO empty */
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
}
else
{
/* Do Nothing */
}
/* ==== DMAC initialization ==== */
usb0_host_DMAC1_PeriReqInit((const dmac_transinfo_t *)&trans_info,
DMAC_MODE_REGISTER,
DMAC_SAMPLE_SINGLE,
request_factor,
0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC1_PeriReqInit() */
/* ==== DMAC startup ==== */
ret = usb0_host_DMAC1_Open(DMAC_REQ_MODE_PERI);
if (ret != 0)
{
// printf("DMAC1 Open error!!\n");
}
return;
}
/*******************************************************************************
* Function Name: usb0_host_enable_dmac1
* Description : Enables DMA transfer on the information specified by the argument.
* Arguments : uint32_t src : src address
* : uint32_t dst : dst address
* : uint32_t count : transfer byte
* : uint32_t size : transfer size
* : uint32_t dir : direction
* : uint32_t fifo : FIFO(D0FIFO or D1FIFO)
* : uint16_t dfacc : 0 : normal access
* : : 1 : 16byte access
* : : 2 : 32byte access
* Return Value : none
*******************************************************************************/
static void usb0_host_enable_dmac1 (uint32_t src, uint32_t dst, uint32_t count,
uint32_t size, uint32_t dir, uint32_t fifo, uint16_t dfacc)
{
dmac_transinfo_t trans_info;
uint32_t request_factor = 0;
int32_t ret;
/* ==== Variable setting for DMAC initialization ==== */
trans_info.src_addr = (uint32_t)src; /* Start address of transfer source */
trans_info.dst_addr = (uint32_t)dst; /* Start address of transfer destination */
trans_info.count = (uint32_t)count; /* Total byte count to be transferred */
#ifndef __USB_HOST_DF_ACC_ENABLE__
if (size == 0)
{
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
}
else if (size == 1)
{
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
}
else if (size == 2)
{
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
}
else
{
// printf("size error!!\n");
}
#else
if (dfacc == 2)
{
/* 32byte access */
trans_info.src_size = DMAC_TRANS_SIZE_256; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_256; /* Transfer destination transfer size */
}
else if (dfacc == 1)
{
/* 16byte access */
trans_info.src_size = DMAC_TRANS_SIZE_128; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_128; /* Transfer destination transfer size */
}
else
{
/* normal access */
if (size == 0)
{
trans_info.src_size = DMAC_TRANS_SIZE_8; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_8; /* Transfer destination transfer size */
}
else if (size == 1)
{
trans_info.src_size = DMAC_TRANS_SIZE_16; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_16; /* Transfer destination transfer size */
}
else if (size == 2)
{
trans_info.src_size = DMAC_TRANS_SIZE_32; /* Transfer source transfer size */
trans_info.dst_size = DMAC_TRANS_SIZE_32; /* Transfer destination transfer size */
}
else
{
// printf("size error!!\n");
}
}
#endif
if (dir == USB_HOST_FIFO2BUF)
{
request_factor =DMAC_REQ_USB0_DMA1_RX; /* USB_0 channel 0 receive FIFO full */
trans_info.saddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer source address */
trans_info.daddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer destination address */
}
else if (dir == USB_HOST_BUF2FIFO)
{
request_factor =DMAC_REQ_USB0_DMA1_TX; /* USB_0 channel 0 receive FIFO empty */
trans_info.saddr_dir = DMAC_TRANS_ADR_INC; /* Count direction of transfer source address */
trans_info.daddr_dir = DMAC_TRANS_ADR_NO_INC; /* Count direction of transfer destination address */
}
else
{
/* Do Nothing */
}
/* ==== DMAC initialization ==== */
usb0_host_DMAC2_PeriReqInit((const dmac_transinfo_t *)&trans_info,
DMAC_MODE_REGISTER,
DMAC_SAMPLE_SINGLE,
request_factor,
0); /* Don't care DMAC_REQ_REQD is setting in usb0_host_DMAC2_PeriReqInit() */
/* ==== DMAC startup ==== */
ret = usb0_host_DMAC2_Open(DMAC_REQ_MODE_PERI);
if (ret != 0)
{
// printf("DMAC2 Open error!!\n");
}
return;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_stop_dma0
* Description : Disables DMA transfer.
* Arguments : none
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
* : regarding to the bus width.
* Notice : This function should be executed to DMAC executed at the time
* : of specification of D0_FIF0_DMA in dma->fifo.
*******************************************************************************/
uint32_t Userdef_USB_usb0_host_stop_dma0 (void)
{
uint32_t remain;
/* ==== DMAC release ==== */
usb0_host_DMAC1_Close(&remain);
return remain;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_stop_dma1
* Description : Disables DMA transfer.
* : This function should be executed to DMAC executed at the time
* : of specification of D1_FIF0_DMA in dma->fifo.
* Arguments : none
* Return Value : uint32_t return Transfer Counter register(DMATCRn) value
* : regarding to the bus width.
*******************************************************************************/
uint32_t Userdef_USB_usb0_host_stop_dma1 (void)
{
uint32_t remain;
/* ==== DMAC release ==== */
usb0_host_DMAC2_Close(&remain);
return remain;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_notice
* Description : Notice of USER
* Arguments : const char *format
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_notice (const char * format)
{
// printf(format);
return;
}
/*******************************************************************************
* Function Name: Userdef_USB_usb0_host_user_rdy
* Description : This function notify a user and wait for trigger
* Arguments : const char *format
* : uint16_t data
* Return Value : none
*******************************************************************************/
void Userdef_USB_usb0_host_user_rdy (const char * format, uint16_t data)
{
// printf(format, data);
getchar();
return;
}
/* End of File */

3
libraries/USBHost/USBHost/USBHALHost.cpp → libraries/USBHost/USBHost/USBHALHost_LPC17.cpp
View File

@ -14,6 +14,8 @@
* limitations under the License.
*/
#if defined(TARGET_LPC1768)
#include "mbed.h"
#include "USBHALHost.h"
#include "dbg.h"
@ -320,3 +322,4 @@ void USBHALHost::UsbIrqhandler() {
}
}
}
#endif

293
libraries/USBHost/USBHost/USBHALHost_RZ_A1.cpp Normal file
View File

@ -0,0 +1,293 @@
/* mbed USBHost Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined(TARGET_RZ_A1H)
#include "mbed.h"
#include "USBHALHost.h"
#include "dbg.h"
#include "ohci_wrapp_RZ_A1.h"
#define HCCA_SIZE sizeof(HCCA)
#define ED_SIZE sizeof(HCED)
#define TD_SIZE sizeof(HCTD)
#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
#define ALIGNE_MSK (0x0000000F)
static volatile uint8_t usb_buf[TOTAL_SIZE + ALIGNE_MSK]; //16 bytes aligned!
USBHALHost * USBHALHost::instHost;
USBHALHost::USBHALHost() {
instHost = this;
memInit();
memset((void*)usb_hcca, 0, HCCA_SIZE);
for (int i = 0; i < MAX_ENDPOINT; i++) {
edBufAlloc[i] = false;
}
for (int i = 0; i < MAX_TD; i++) {
tdBufAlloc[i] = false;
}
}
void USBHALHost::init() {
ohciwrapp_init(&_usbisr, 1);
ohciwrapp_reg_w(OHCI_REG_CONTROL, 1); // HARDWARE RESET
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, 0); // Initialize Control list head to Zero
ohciwrapp_reg_w(OHCI_REG_BULKHEADED, 0); // Initialize Bulk list head to Zero
// Wait 100 ms before apply reset
wait_ms(100);
// software reset
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_HCR);
// Write Fm Interval and Largest Data Packet Counter
ohciwrapp_reg_w(OHCI_REG_FMINTERVAL, DEFAULT_FMINTERVAL);
ohciwrapp_reg_w(OHCI_REG_PERIODICSTART, FI * 90 / 100);
// Put HC in operational state
ohciwrapp_reg_w(OHCI_REG_CONTROL, (ohciwrapp_reg_r(OHCI_REG_CONTROL) & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER);
// Set Global Power
ohciwrapp_reg_w(OHCI_REG_RHSTATUS, OR_RH_STATUS_LPSC);
ohciwrapp_reg_w(OHCI_REG_HCCA, (uint32_t)(usb_hcca));
// Clear Interrrupt Status
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS));
ohciwrapp_reg_w(OHCI_REG_INTERRUPTENABLE, OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC);
// Enable the USB Interrupt
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
// Check for any connected devices
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
//Device connected
wait_ms(150);
USB_DBG("Device connected (%08x)\n\r", ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1));
deviceConnected(0, 1, ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA);
}
}
uint32_t USBHALHost::controlHeadED() {
return ohciwrapp_reg_r(OHCI_REG_CONTROLHEADED);
}
uint32_t USBHALHost::bulkHeadED() {
return ohciwrapp_reg_r(OHCI_REG_BULKHEADED);
}
uint32_t USBHALHost::interruptHeadED() {
return usb_hcca->IntTable[0];
}
void USBHALHost::updateBulkHeadED(uint32_t addr) {
ohciwrapp_reg_w(OHCI_REG_BULKHEADED, addr);
}
void USBHALHost::updateControlHeadED(uint32_t addr) {
ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, addr);
}
void USBHALHost::updateInterruptHeadED(uint32_t addr) {
usb_hcca->IntTable[0] = addr;
}
void USBHALHost::enableList(ENDPOINT_TYPE type) {
uint32_t wk_data;
switch(type) {
case CONTROL_ENDPOINT:
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_CLF);
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_CLE);
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
break;
case ISOCHRONOUS_ENDPOINT:
break;
case BULK_ENDPOINT:
ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_BLF);
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_BLE);
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
break;
case INTERRUPT_ENDPOINT:
wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_PLE);
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
break;
}
}
bool USBHALHost::disableList(ENDPOINT_TYPE type) {
uint32_t wk_data;
switch(type) {
case CONTROL_ENDPOINT:
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
if(wk_data & OR_CONTROL_CLE) {
wk_data &= ~OR_CONTROL_CLE;
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
return true;
}
return false;
case ISOCHRONOUS_ENDPOINT:
return false;
case BULK_ENDPOINT:
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
if(wk_data & OR_CONTROL_BLE) {
wk_data &= ~OR_CONTROL_BLE;
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
return true;
}
return false;
case INTERRUPT_ENDPOINT:
wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
if(wk_data & OR_CONTROL_PLE) {
wk_data &= ~OR_CONTROL_PLE;
ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
return true;
}
return false;
}
return false;
}
void USBHALHost::memInit() {
volatile uint8_t *p_wk_buf = (uint8_t *)(((uint32_t)usb_buf + ALIGNE_MSK) & ~ALIGNE_MSK);
usb_hcca = (volatile HCCA *)p_wk_buf;
usb_edBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE);
usb_tdBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE));
}
volatile uint8_t * USBHALHost::getED() {
for (int i = 0; i < MAX_ENDPOINT; i++) {
if ( !edBufAlloc[i] ) {
edBufAlloc[i] = true;
return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
}
}
perror("Could not allocate ED\r\n");
return NULL; //Could not alloc ED
}
volatile uint8_t * USBHALHost::getTD() {
int i;
for (i = 0; i < MAX_TD; i++) {
if ( !tdBufAlloc[i] ) {
tdBufAlloc[i] = true;
return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
}
}
perror("Could not allocate TD\r\n");
return NULL; //Could not alloc TD
}
void USBHALHost::freeED(volatile uint8_t * ed) {
int i;
i = (ed - usb_edBuf) / ED_SIZE;
edBufAlloc[i] = false;
}
void USBHALHost::freeTD(volatile uint8_t * td) {
int i;
i = (td - usb_tdBuf) / TD_SIZE;
tdBufAlloc[i] = false;
}
void USBHALHost::resetRootHub() {
// Initiate port reset
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRS);
while (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRS);
// ...and clear port reset signal
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
}
void USBHALHost::_usbisr(void) {
if (instHost) {
instHost->UsbIrqhandler();
}
}
void USBHALHost::UsbIrqhandler() {
uint32_t int_status = ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS) & ohciwrapp_reg_r(OHCI_REG_INTERRUPTENABLE);
if (int_status != 0) { //Is there something to actually process?
// Root hub status change interrupt
if (int_status & OR_INTR_STATUS_RHSC) {
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CSC) {
if (ohciwrapp_reg_r(OHCI_REG_RHSTATUS) & OR_RH_STATUS_DRWE) {
// When DRWE is on, Connect Status Change
// means a remote wakeup event.
} else {
//Root device connected
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
// wait 150ms to avoid bounce
wait_ms(150);
//Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
deviceConnected(0, 1, ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA);
}
//Root device disconnected
else {
if (!(int_status & OR_INTR_STATUS_WDH)) {
usb_hcca->DoneHead = 0;
}
// wait 200ms to avoid bounce
wait_ms(200);
deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
if (int_status & OR_INTR_STATUS_WDH) {
usb_hcca->DoneHead = 0;
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
}
}
}
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
}
if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRSC) {
ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
}
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_RHSC);
}
// Writeback Done Head interrupt
if (int_status & OR_INTR_STATUS_WDH) {
transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
}
}
}
#endif

11
libraries/USBHost/USBHostHID/USBHostMouse.cpp
View File

@ -47,6 +47,7 @@ bool USBHostMouse::connected() {
}
bool USBHostMouse::connect() {
int len_listen;
if (dev_connected) {
return true;
@ -69,7 +70,11 @@ bool USBHostMouse::connect() {
host->registerDriver(dev, mouse_intf, this, &USBHostMouse::init);
int_in->attach(this, &USBHostMouse::rxHandler);
host->interruptRead(dev, int_in, report, int_in->getSize(), false);
len_listen = int_in->getSize();
if (len_listen > sizeof(report)) {
len_listen = sizeof(report);
}
host->interruptRead(dev, int_in, report, len_listen, false);
dev_connected = true;
return true;
@ -109,6 +114,10 @@ void USBHostMouse::rxHandler() {
y = report[2];
z = report[3];
if (len_listen > sizeof(report)) {
len_listen = sizeof(report);
}
if (dev)
host->interruptRead(dev, int_in, report, len_listen, false);
}

3
libraries/USBHost/USBHostHub/USBHostHub.cpp
View File

@ -222,6 +222,9 @@ void USBHostHub::portReset(uint8_t port) {
uint32_t status;
USB_DBG("reset port %d on hub: %p [this: %p]", port, dev, this)
setPortFeature(PORT_RESET_FEATURE, port);
#if defined(TARGET_RZ_A1H)
Thread::wait(50); // Reset release waiting for Hi-Speed check.
#endif
while(1) {
status = getPortStatus(port);
if (status & (PORT_ENABLE | PORT_RESET))

2
libraries/USBHost/USBHostMSD/USBHostMSD.cpp
View File

@ -303,7 +303,7 @@ int USBHostMSD::getMaxLun() {
int USBHostMSD::disk_initialize() {
USB_DBG("FILESYSTEM: init");
U16 i, timeout = 10;
uint16_t i, timeout = 10;
getMaxLun();

4
libraries/USBHost/USBHostSerial/USBHostSerial.cpp
View File

@ -71,6 +71,7 @@ bool USBHostSerial::connect() {
{
USBHostSerialPort::connect(host,d,port_intf,bulk_in, bulk_out);
dev = d;
dev_connected = true;
}
}
}
@ -171,6 +172,7 @@ bool USBHostMultiSerial::connect() {
{
ports[port]->connect(host,d,port_intf[port],bulk_in, bulk_out);
dev = d;
dev_connected = true;
}
}
}
@ -242,7 +244,7 @@ void USBHostSerialPort::connect(USBHost* _host, USBDeviceConnected * _dev,
USB_INFO("New Serial device: VID:%04x PID:%04x [dev: %p - intf: %d]", dev->getVid(), dev->getPid(), dev, serial_intf);
dev->setName("Serial", serial_intf);
host->registerDriver(dev, serial_intf, this, &USBHostSerialPort::init);
//baud(9600);
baud(9600);
size_bulk_in = bulk_in->getSize();
size_bulk_out = bulk_out->getSize();
bulk_in->attach(this, &USBHostSerialPort::rxHandler);

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/MK20D5.h → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/MK20D5.h
View File

@ -14,7 +14,7 @@
** Abstract:
** CMSIS Peripheral Access Layer for MK20D5
**
** Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
** Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com

0
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_ARM_STD/MK20D5.sct → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_ARM_STD/MK20D5.sct
View File

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_ARM_STD/startup_MK20D5.s → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_ARM_STD/startup_MK20D5.s
View File

@ -5,7 +5,7 @@
; * @version: 1.0
; * @date: 2011-12-15
; *
; * Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
; * Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
;*
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_ARM_STD/sys.cpp → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_ARM_STD/sys.cpp
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library - stackheap
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
* Copyright (C) 2009-2015 ARM Limited. All rights reserved.
*
* Setup a fixed single stack/heap memory model,
* between the top of the RW/ZI region and the stackpointer

0
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/MK20D5.ld
View File

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_MK20D5.s → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_GCC_ARM/startup_MK20D5..s
View File

@ -4,7 +4,7 @@
* Version: V1.3
* Date: 08 Feb 2012
*
* Copyright (c) 2012, ARM Limited
* Copyright (c) 2015, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without

0
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_IAR/MK20D5.icf
View File

0
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/TOOLCHAIN_IAR/startup_MK20D5.s → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/TOOLCHAIN_IAR/startup_MK20D5.s
View File

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/cmsis.h → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/cmsis.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library - CMSIS
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
* Copyright (C) 2009-2015 ARM Limited. All rights reserved.
*
* A generic CMSIS include header, pulling in LPC11U24 specifics
*/

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/cmsis_nvic.c → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/cmsis_nvic.c
View File

@ -1,7 +1,7 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* Copyright (c) 2015 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/cmsis_nvic.h → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/cmsis_nvic.h
View File

@ -1,7 +1,7 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* Copyright (c) 2015 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.c → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/system_MK20D5.c
View File

@ -16,7 +16,7 @@
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2011 Freescale Semiconductor, Inc. All Rights Reserved.
** Copyright: 2015 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com

2
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20D50M/system_MK20D5.h → libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/system_MK20D5.h
View File

@ -16,7 +16,7 @@
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2012 Freescale Semiconductor, Inc. All Rights Reserved.
** Copyright: 2015 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com

6032
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/MK20DX256.h Normal file
View File

File diff suppressed because it is too large Load Diff

13
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_ARM_STD/MK20DX256.sct Normal file
View File

@ -0,0 +1,13 @@
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(112 vect * 4 bytes) = 8_byte_aligned(0x1C0) = 0x1C0
; 0x10000 - 0x1C0 = 0xFE40
RW_IRAM1 0x1FFF81C0 0xFE40 {
.ANY (+RW +ZI)
}
}

559
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_ARM_STD/startup_MK20DX256.s Normal file
View File

@ -0,0 +1,559 @@
;/*****************************************************************************
; * @file: startup_MK20DX256.s
; * @purpose: CMSIS Cortex-M4 Core Device Startup File for the
; * MK20DX256
; * @version: 1.0
; * @date: 2011-12-15
; *
; * Copyright: 1997 - 2015 Freescale Semiconductor, Inc. All Rights Reserved.
;*
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; *****************************************************************************/
__initial_sp EQU 0x20008000 ; Top of RAM
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
EXPORT __Vectors_End
EXPORT __Vectors_Size
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
DCD DMA4_IRQHandler ; DMA channel 4 transfer complete interrupt
DCD DMA5_IRQHandler ; DMA channel 5 transfer complete interrupt
DCD DMA6_IRQHandler ; DMA channel 6 transfer complete interrupt
DCD DMA7_IRQHandler ; DMA channel 7 transfer complete interrupt
DCD DMA8_IRQHandler ; DMA channel 8 transfer complete interrupt
DCD DMA9_IRQHandler ; DMA channel 9 transfer complete interrupt
DCD DMA10_IRQHandler ; DMA channel 10 transfer complete interrupt
DCD DMA11_IRQHandler ; DMA channel 11 transfer complete interrupt
DCD DMA12_IRQHandler ; DMA channel 12 transfer complete interrupt
DCD DMA13_IRQHandler ; DMA channel 13 transfer complete interrupt
DCD DMA14_IRQHandler ; DMA channel 14 transfer complete interrupt
DCD DMA15_IRQHandler ; DMA channel 15 transfer complete interrupt
DCD DMA_Error_IRQHandler ; DMA error interrupt
DCD Reserved33_IRQHandler ; Reserved interrupt 33
DCD FTFL_IRQHandler ; FTFL interrupt
DCD Read_Collision_IRQHandler ; Read collision interrupt
DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
DCD LLW_IRQHandler ; Low Leakage Wakeup
DCD Watchdog_IRQHandler ; WDOG interrupt
DCD Reserved39_IRQHandler ; Reserved interrupt 39
DCD I2C0_IRQHandler ; I2C0 interrupt
DCD I2C1_IRQHandler ; I2C1 interrupt
DCD SPI0_IRQHandler ; SPI0 interrupt
DCD SPI1_IRQHandler ; SPI1 interrupt
DCD Reserved44_IRQHandler ; Reserved interrupt 44
DCD CAN0_ORed_Message_buffer_IRQHandler ; CAN0 OR'd message buffers interrupt
DCD CAN0_Bus_Off_IRQHandler ; CAN0 bus off interrupt
DCD CAN0_Error_IRQHandler ; CAN0 error interrupt
DCD CAN0_Tx_Warning_IRQHandler ; CAN0 Tx warning interrupt
DCD CAN0_Rx_Warning_IRQHandler ; CAN0 Rx warning interrupt
DCD CAN0_Wake_Up_IRQHandler ; CAN0 wake up interrupt
DCD I2S0_Tx_IRQHandler ; I2S0 transmit interrupt
DCD I2S0_Rx_IRQHandler ; I2S0 receive interrupt
DCD Reserved53_IRQHandler ; Reserved interrupt 53
DCD Reserved54_IRQHandler ; Reserved interrupt 54
DCD Reserved55_IRQHandler ; Reserved interrupt 55
DCD Reserved56_IRQHandler ; Reserved interrupt 56
DCD Reserved57_IRQHandler ; Reserved interrupt 57
DCD Reserved58_IRQHandler ; Reserved interrupt 58
DCD Reserved59_IRQHandler ; Reserved interrupt 59
DCD UART0_LON_IRQHandler ; UART0 LON interrupt
DCD UART0_RX_TX_IRQHandler ; UART0 receive/transmit interrupt
DCD UART0_ERR_IRQHandler ; UART0 error interrupt
DCD UART1_RX_TX_IRQHandler ; UART1 receive/transmit interrupt
DCD UART1_ERR_IRQHandler ; UART1 error interrupt
DCD UART2_RX_TX_IRQHandler ; UART2 receive/transmit interrupt
DCD UART2_ERR_IRQHandler ; UART2 error interrupt
DCD Reserved67_IRQHandler ; Reserved interrupt 67
DCD Reserved68_IRQHandler ; Reserved interrupt 68
DCD Reserved69_IRQHandler ; Reserved interrupt 69
DCD Reserved70_IRQHandler ; Reserved interrupt 70
DCD Reserved71_IRQHandler ; Reserved interrupt 71
DCD Reserved72_IRQHandler ; Reserved interrupt 72
DCD ADC0_IRQHandler ; ADC0 interrupt
DCD ADC1_IRQHandler ; ADC1 interrupt
DCD CMP0_IRQHandler ; CMP0 interrupt
DCD CMP1_IRQHandler ; CMP1 interrupt
DCD CMP2_IRQHandler ; CMP2 interrupt
DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt
DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt
DCD FTM2_IRQHandler ; FTM2 fault, overflow and channels interrupt
DCD CMT_IRQHandler ; CMT interrupt
DCD RTC_IRQHandler ; RTC interrupt
DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt
DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt
DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt
DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt
DCD PDB0_IRQHandler ; PDB0 interrupt
DCD USB0_IRQHandler ; USB0 interrupt
DCD USBDCD_IRQHandler ; USBDCD interrupt
DCD Reserved91_IRQHandler ; Reserved interrupt 91
DCD Reserved92_IRQHandler ; Reserved interrupt 92
DCD Reserved93_IRQHandler ; Reserved interrupt 93
DCD Reserved94_IRQHandler ; Reserved interrupt 94
DCD Reserved95_IRQHandler ; Reserved interrupt 95
DCD Reserved96_IRQHandler ; Reserved interrupt 96
DCD DAC0_IRQHandler ; DAC0 interrupt
DCD Reserved98_IRQHandler ; Reserved interrupt 98
DCD TSI0_IRQHandler ; TSI0 interrupt
DCD MCG_IRQHandler ; MCG interrupt
DCD LPTimer_IRQHandler ; LPTimer interrupt
DCD Reserved102_IRQHandler ; Reserved interrupt 102
DCD PORTA_IRQHandler ; Port A interrupt
DCD PORTB_IRQHandler ; Port B interrupt
DCD PORTC_IRQHandler ; Port C interrupt
DCD PORTD_IRQHandler ; Port D interrupt
DCD PORTE_IRQHandler ; Port E interrupt
DCD Reserved108_IRQHandler ; Reserved interrupt 108
DCD Reserved109_IRQHandler ; Reserved interrupt 109
DCD SWI_IRQHandler ; Software interrupt
__Vectors_End
__Vectors_Size EQU __Vectors_End - __Vectors
; <h> Flash Configuration
; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
; <i> and security information that allows the MCU to restrict acces to the FTFL module.
; <h> Backdoor Comparison Key
; <o0> Backdoor Key 0 <0x0-0xFF:2>
; <o1> Backdoor Key 1 <0x0-0xFF:2>
; <o2> Backdoor Key 2 <0x0-0xFF:2>
; <o3> Backdoor Key 3 <0x0-0xFF:2>
; <o4> Backdoor Key 4 <0x0-0xFF:2>
; <o5> Backdoor Key 5 <0x0-0xFF:2>
; <o6> Backdoor Key 6 <0x0-0xFF:2>
; <o7> Backdoor Key 7 <0x0-0xFF:2>
BackDoorK0 EQU 0xFF
BackDoorK1 EQU 0xFF
BackDoorK2 EQU 0xFF
BackDoorK3 EQU 0xFF
BackDoorK4 EQU 0xFF
BackDoorK5 EQU 0xFF
BackDoorK6 EQU 0xFF
BackDoorK7 EQU 0xFF
; </h>
; <h> Program flash protection bytes (FPROT)
; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
; <i> Each bit protects a 1/32 region of the program flash memory.
; <h> FPROT0
; <i> Program flash protection bytes
; <i> 1/32 - 8/32 region
; <o.0> FPROT0.0
; <o.1> FPROT0.1
; <o.2> FPROT0.2
; <o.3> FPROT0.3
; <o.4> FPROT0.4
; <o.5> FPROT0.5
; <o.6> FPROT0.6
; <o.7> FPROT0.7
nFPROT0 EQU 0x00
FPROT0 EQU nFPROT0:EOR:0xFF
; </h>
; <h> FPROT1
; <i> Program Flash Region Protect Register 1
; <i> 9/32 - 16/32 region
; <o.0> FPROT1.0
; <o.1> FPROT1.1
; <o.2> FPROT1.2
; <o.3> FPROT1.3
; <o.4> FPROT1.4
; <o.5> FPROT1.5
; <o.6> FPROT1.6
; <o.7> FPROT1.7
nFPROT1 EQU 0x00
FPROT1 EQU nFPROT1:EOR:0xFF
; </h>
; <h> FPROT2
; <i> Program Flash Region Protect Register 2
; <i> 17/32 - 24/32 region
; <o.0> FPROT2.0
; <o.1> FPROT2.1
; <o.2> FPROT2.2
; <o.3> FPROT2.3
; <o.4> FPROT2.4
; <o.5> FPROT2.5
; <o.6> FPROT2.6
; <o.7> FPROT2.7
nFPROT2 EQU 0x00
FPROT2 EQU nFPROT2:EOR:0xFF
; </h>
; <h> FPROT3
; <i> Program Flash Region Protect Register 3
; <i> 25/32 - 32/32 region
; <o.0> FPROT3.0
; <o.1> FPROT3.1
; <o.2> FPROT3.2
; <o.3> FPROT3.3
; <o.4> FPROT3.4
; <o.5> FPROT3.5
; <o.6> FPROT3.6
; <o.7> FPROT3.7
nFPROT3 EQU 0x00
FPROT3 EQU nFPROT3:EOR:0xFF
; </h>
; </h>
; <h> Data flash protection byte (FDPROT)
; <i> Each bit protects a 1/8 region of the data flash memory.
; <i> (Program flash only devices: Reserved)
; <o.0> FDPROT.0
; <o.1> FDPROT.1
; <o.2> FDPROT.2
; <o.3> FDPROT.3
; <o.4> FDPROT.4
; <o.5> FDPROT.5
; <o.6> FDPROT.6
; <o.7> FDPROT.7
nFDPROT EQU 0x00
FDPROT EQU nFDPROT:EOR:0xFF
; </h>
; <h> EEPROM protection byte (FEPROT)
; <i> FlexNVM devices: Each bit protects a 1/8 region of the EEPROM.
; <i> (Program flash only devices: Reserved)
; <o.0> FEPROT.0
; <o.1> FEPROT.1
; <o.2> FEPROT.2
; <o.3> FEPROT.3
; <o.4> FEPROT.4
; <o.5> FEPROT.5
; <o.6> FEPROT.6
; <o.7> FEPROT.7
nFEPROT EQU 0x00
FEPROT EQU nFEPROT:EOR:0xFF
; </h>
; <h> Flash nonvolatile option byte (FOPT)
; <i> Allows the user to customize the operation of the MCU at boot time.
; <o.0> LPBOOT
; <0=> Low-power boot
; <1=> normal boot
; <o.1> EZPORT_DIS
; <0=> EzPort operation is enabled
; <1=> EzPort operation is disabled
FOPT EQU 0xFF
; </h>
; <h> Flash security byte (FSEC)
; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
; <o.0..1> SEC
; <2=> MCU security status is unsecure
; <3=> MCU security status is secure
; <i> Flash Security
; <i> This bits define the security state of the MCU.
; <o.2..3> FSLACC
; <2=> Freescale factory access denied
; <3=> Freescale factory access granted
; <i> Freescale Failure Analysis Access Code
; <i> This bits define the security state of the MCU.
; <o.4..5> MEEN
; <2=> Mass erase is disabled
; <3=> Mass erase is enabled
; <i> Mass Erase Enable Bits
; <i> Enables and disables mass erase capability of the FTFL module
; <o.6..7> KEYEN
; <2=> Backdoor key access enabled
; <3=> Backdoor key access disabled
; <i> Backdoor key Security Enable
; <i> These bits enable and disable backdoor key access to the FTFL module.
FSEC EQU 0xFE
; </h>
; </h>
IF :LNOT::DEF:RAM_TARGET
AREA |.ARM.__at_0x400|, CODE, READONLY
DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
DCB FPROT0, FPROT1, FPROT2, FPROT3
DCB FSEC, FOPT, FEPROT, FDPROT
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
NMI_Handler PROC
EXPORT NMI_Handler [WEAK]
B .
ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Default_Handler PROC
EXPORT DMA0_IRQHandler [WEAK]
EXPORT DMA1_IRQHandler [WEAK]
EXPORT DMA2_IRQHandler [WEAK]
EXPORT DMA3_IRQHandler [WEAK]
EXPORT DMA4_IRQHandler [WEAK]
EXPORT DMA5_IRQHandler [WEAK]
EXPORT DMA6_IRQHandler [WEAK]
EXPORT DMA7_IRQHandler [WEAK]
EXPORT DMA8_IRQHandler [WEAK]
EXPORT DMA9_IRQHandler [WEAK]
EXPORT DMA10_IRQHandler [WEAK]
EXPORT DMA11_IRQHandler [WEAK]
EXPORT DMA12_IRQHandler [WEAK]
EXPORT DMA13_IRQHandler [WEAK]
EXPORT DMA14_IRQHandler [WEAK]
EXPORT DMA15_IRQHandler [WEAK]
EXPORT DMA_Error_IRQHandler [WEAK]
EXPORT Reserved33_IRQHandler [WEAK]
EXPORT FTFL_IRQHandler [WEAK]
EXPORT Read_Collision_IRQHandler [WEAK]
EXPORT LVD_LVW_IRQHandler [WEAK]
EXPORT LLW_IRQHandler [WEAK]
EXPORT Watchdog_IRQHandler [WEAK]
EXPORT Reserved39_IRQHandler [WEAK]
EXPORT I2C0_IRQHandler [WEAK]
EXPORT I2C1_IRQHandler [WEAK]
EXPORT SPI0_IRQHandler [WEAK]
EXPORT SPI1_IRQHandler [WEAK]
EXPORT Reserved44_IRQHandler [WEAK]
EXPORT CAN0_ORed_Message_buffer_IRQHandler [WEAK]
EXPORT CAN0_Bus_Off_IRQHandler [WEAK]
EXPORT CAN0_Error_IRQHandler [WEAK]
EXPORT CAN0_Tx_Warning_IRQHandler [WEAK]
EXPORT CAN0_Rx_Warning_IRQHandler [WEAK]
EXPORT CAN0_Wake_Up_IRQHandler [WEAK]
EXPORT I2S0_Tx_IRQHandler [WEAK]
EXPORT I2S0_Rx_IRQHandler [WEAK]
EXPORT Reserved53_IRQHandler [WEAK]
EXPORT Reserved54_IRQHandler [WEAK]
EXPORT Reserved55_IRQHandler [WEAK]
EXPORT Reserved56_IRQHandler [WEAK]
EXPORT Reserved57_IRQHandler [WEAK]
EXPORT Reserved58_IRQHandler [WEAK]
EXPORT Reserved59_IRQHandler [WEAK]
EXPORT UART0_LON_IRQHandler [WEAK]
EXPORT UART0_RX_TX_IRQHandler [WEAK]
EXPORT UART0_ERR_IRQHandler [WEAK]
EXPORT UART1_RX_TX_IRQHandler [WEAK]
EXPORT UART1_ERR_IRQHandler [WEAK]
EXPORT UART2_RX_TX_IRQHandler [WEAK]
EXPORT UART2_ERR_IRQHandler [WEAK]
EXPORT Reserved67_IRQHandler [WEAK]
EXPORT Reserved68_IRQHandler [WEAK]
EXPORT Reserved69_IRQHandler [WEAK]
EXPORT Reserved70_IRQHandler [WEAK]
EXPORT Reserved71_IRQHandler [WEAK]
EXPORT Reserved72_IRQHandler [WEAK]
EXPORT ADC0_IRQHandler [WEAK]
EXPORT ADC1_IRQHandler [WEAK]
EXPORT CMP0_IRQHandler [WEAK]
EXPORT CMP1_IRQHandler [WEAK]
EXPORT CMP2_IRQHandler [WEAK]
EXPORT FTM0_IRQHandler [WEAK]
EXPORT FTM1_IRQHandler [WEAK]
EXPORT FTM2_IRQHandler [WEAK]
EXPORT CMT_IRQHandler [WEAK]
EXPORT RTC_IRQHandler [WEAK]
EXPORT RTC_Seconds_IRQHandler [WEAK]
EXPORT PIT0_IRQHandler [WEAK]
EXPORT PIT1_IRQHandler [WEAK]
EXPORT PIT2_IRQHandler [WEAK]
EXPORT PIT3_IRQHandler [WEAK]
EXPORT PDB0_IRQHandler [WEAK]
EXPORT USB0_IRQHandler [WEAK]
EXPORT USBDCD_IRQHandler [WEAK]
EXPORT Reserved91_IRQHandler [WEAK]
EXPORT Reserved92_IRQHandler [WEAK]
EXPORT Reserved93_IRQHandler [WEAK]
EXPORT Reserved94_IRQHandler [WEAK]
EXPORT Reserved95_IRQHandler [WEAK]
EXPORT Reserved96_IRQHandler [WEAK]
EXPORT DAC0_IRQHandler [WEAK]
EXPORT Reserved98_IRQHandler [WEAK]
EXPORT TSI0_IRQHandler [WEAK]
EXPORT MCG_IRQHandler [WEAK]
EXPORT LPTimer_IRQHandler [WEAK]
EXPORT Reserved102_IRQHandler [WEAK]
EXPORT PORTA_IRQHandler [WEAK]
EXPORT PORTB_IRQHandler [WEAK]
EXPORT PORTC_IRQHandler [WEAK]
EXPORT PORTD_IRQHandler [WEAK]
EXPORT PORTE_IRQHandler [WEAK]
EXPORT Reserved108_IRQHandler [WEAK]
EXPORT Reserved109_IRQHandler [WEAK]
EXPORT SWI_IRQHandler [WEAK]
EXPORT DefaultISR [WEAK]
DMA0_IRQHandler
DMA1_IRQHandler
DMA2_IRQHandler
DMA3_IRQHandler
DMA4_IRQHandler
DMA5_IRQHandler
DMA6_IRQHandler
DMA7_IRQHandler
DMA8_IRQHandler
DMA9_IRQHandler
DMA10_IRQHandler
DMA11_IRQHandler
DMA12_IRQHandler
DMA13_IRQHandler
DMA14_IRQHandler
DMA15_IRQHandler
DMA_Error_IRQHandler
Reserved33_IRQHandler
FTFL_IRQHandler
Read_Collision_IRQHandler
LVD_LVW_IRQHandler
LLW_IRQHandler
Watchdog_IRQHandler
Reserved39_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
SPI0_IRQHandler
SPI1_IRQHandler
Reserved44_IRQHandler
CAN0_ORed_Message_buffer_IRQHandler
CAN0_Bus_Off_IRQHandler
CAN0_Error_IRQHandler
CAN0_Tx_Warning_IRQHandler
CAN0_Rx_Warning_IRQHandler
CAN0_Wake_Up_IRQHandler
I2S0_Tx_IRQHandler
I2S0_Rx_IRQHandler
Reserved53_IRQHandler
Reserved54_IRQHandler
Reserved55_IRQHandler
Reserved56_IRQHandler
Reserved57_IRQHandler
Reserved58_IRQHandler
Reserved59_IRQHandler
UART0_LON_IRQHandler
UART0_RX_TX_IRQHandler
UART0_ERR_IRQHandler
UART1_RX_TX_IRQHandler
UART1_ERR_IRQHandler
UART2_RX_TX_IRQHandler
UART2_ERR_IRQHandler
Reserved67_IRQHandler
Reserved68_IRQHandler
Reserved69_IRQHandler
Reserved70_IRQHandler
Reserved71_IRQHandler
Reserved72_IRQHandler
ADC0_IRQHandler
ADC1_IRQHandler
CMP0_IRQHandler
CMP1_IRQHandler
CMP2_IRQHandler
FTM0_IRQHandler
FTM1_IRQHandler
FTM2_IRQHandler
CMT_IRQHandler
RTC_IRQHandler
RTC_Seconds_IRQHandler
PIT0_IRQHandler
PIT1_IRQHandler
PIT2_IRQHandler
PIT3_IRQHandler
PDB0_IRQHandler
USB0_IRQHandler
USBDCD_IRQHandler
Reserved91_IRQHandler
Reserved92_IRQHandler
Reserved93_IRQHandler
Reserved94_IRQHandler
Reserved95_IRQHandler
Reserved96_IRQHandler
DAC0_IRQHandler
Reserved98_IRQHandler
TSI0_IRQHandler
MCG_IRQHandler
LPTimer_IRQHandler
Reserved102_IRQHandler
PORTA_IRQHandler
PORTB_IRQHandler
PORTC_IRQHandler
PORTD_IRQHandler
PORTE_IRQHandler
Reserved108_IRQHandler
Reserved109_IRQHandler
SWI_IRQHandler
DefaultISR
B .
ENDP
ALIGN
END

31
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_ARM_STD/sys.cpp Normal file
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/* mbed Microcontroller Library - stackheap
* Copyright (C) 2009-2015 ARM Limited. All rights reserved.
*
* Setup a fixed single stack/heap memory model,
* between the top of the RW/ZI region and the stackpointer
*/
#ifdef __cplusplus
extern "C" {
#endif
#include <rt_misc.h>
#include <stdint.h>
extern char Image$$RW_IRAM1$$ZI$$Limit[];
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
uint32_t sp_limit = __current_sp();
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
struct __initial_stackheap r;
r.heap_base = zi_limit;
r.heap_limit = sp_limit;
return r;
}
#ifdef __cplusplus
}
#endif

163
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/MK20DX256.ld Normal file
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/*
* K20DX256 ARM GCC linker script file
*/
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
FLASH_PROTECTION (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x00000410
RAM (rwx) : ORIGIN = 0x1FFF81C0, LENGTH = 64K - 0x1C0
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* _reset_init : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.isr_vector :
{
__vector_table = .;
KEEP(*(.vector_table))
*(.text.Reset_Handler)
*(.text.System_Init)
. = ALIGN(4);
} > VECTORS
.flash_protect :
{
KEEP(*(.kinetis_flash_config_field))
. = ALIGN(4);
} > FLASH_PROTECTION
.text :
{
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

361
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/TOOLCHAIN_GCC_ARM/startup_MK20DX256.s Normal file
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/* File: startup_MK20DX256.s
* Purpose: startup file for Cortex-M4 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V1.3
* Date: 08 Feb 2012
*
* Copyright (c) 2015, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x400
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0xC00
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long DMA0_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA1_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA2_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA3_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA4_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA5_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA6_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA7_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA8_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA9_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA10_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA11_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA12_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA13_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA14_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA15_IRQHandler // DMA channel 0 transfer complete interrupt
.long DMA_Error_IRQHandler // DMA error interrupt
.long Reserved33_IRQHandler // Reserved interrupt 33
.long FTFL_IRQHandler // FTFL interrupt
.long Read_Collision_IRQHandler // Read collision interrupt
.long LVD_LVW_IRQHandler // Low Voltage Detect, Low Voltage Warning
.long LLW_IRQHandler // Low Leakage Wakeup
.long Watchdog_IRQHandler // WDOG interrupt
.long Reserved39_IRQHandler // Reserved interrupt 39
.long I2C0_IRQHandler // I2C0 interrupt
.long I2C1_IRQHandler // I2C1 interrupt
.long SPI0_IRQHandler // SPI0 interrupt
.long SPI1_IRQHandler // SPI1 interrupt
.long Reserved44_IRQHandler // Reserved interrupt 44
.long CAN0_ORed_Message_buffer_IRQHandler // CAN0 OR'd message buffers interrupt
.long CAN0_Bus_Off_IRQHandler // CAN0 bus off interrupt
.long CAN0_Error_IRQHandler // CAN0 error interrupt
.long CAN0_Tx_Warning_IRQHandler // CAN0 Tx warning interrupt
.long CAN0_Rx_Warning_IRQHandler // CAN0 Rx warning interrupt
.long CAN0_Wake_Up_IRQHandler // CAN0 wake up interrupt
.long I2S0_Tx_IRQHandler // I2S0 transmit interrupt
.long I2S0_Rx_IRQHandler // I2S0 receive interrupt
.long Reserved53_IRQHandler // Reserved interrupt 53
.long Reserved54_IRQHandler // Reserved interrupt 54
.long Reserved55_IRQHandler // Reserved interrupt 55
.long Reserved56_IRQHandler // Reserved interrupt 56
.long Reserved57_IRQHandler // Reserved interrupt 57
.long Reserved58_IRQHandler // Reserved interrupt 58
.long Reserved59_IRQHandler // Reserved interrupt 59
.long UART0_LON_IRQHandler // UART0 LON interrupt
.long UART0_RX_TX_IRQHandler // UART0 receive/transmit interrupt
.long UART0_ERR_IRQHandler // UART0 error interrupt
.long UART1_RX_TX_IRQHandler // UART1 receive/transmit interrupt
.long UART1_ERR_IRQHandler // UART1 error interrupt
.long UART2_RX_TX_IRQHandler // UART2 receive/transmit interrupt
.long UART2_ERR_IRQHandler // UART2 error interrupt
.long Reserved67_IRQHandler // Reserved interrupt 67
.long Reserved68_IRQHandler // Reserved interrupt 68
.long Reserved69_IRQHandler // Reserved interrupt 69
.long Reserved70_IRQHandler // Reserved interrupt 70
.long Reserved71_IRQHandler // Reserved interrupt 71
.long Reserved72_IRQHandler // Reserved interrupt 72
.long ADC0_IRQHandler // ADC0 interrupt
.long ADC1_IRQHandler // ADC1 interrupt
.long CMP0_IRQHandler // CMP0 interrupt
.long CMP1_IRQHandler // CMP1 interrupt
.long CMP2_IRQHandler // CMP2 interrupt
.long FTM0_IRQHandler // FTM0 fault, overflow and channels interrupt
.long FTM1_IRQHandler // FTM1 fault, overflow and channels interrupt
.long FTM2_IRQHandler // FTM2 fault, overflow and channels interrupt
.long CMT_IRQHandler // CMT interrupt
.long RTC_IRQHandler // RTC interrupt
.long RTC_Seconds_IRQHandler // RTC seconds interrupt
.long PIT0_IRQHandler // PIT timer channel 0 interrupt
.long PIT1_IRQHandler // PIT timer channel 1 interrupt
.long PIT2_IRQHandler // PIT timer channel 2 interrupt
.long PIT3_IRQHandler // PIT timer channel 3 interrupt
.long PDB0_IRQHandler // PDB0 interrupt
.long USB0_IRQHandler // USB0 interrupt
.long USBDCD_IRQHandler // USBDCD interrupt
.long Reserved91_IRQHandler // Reserved interrupt 91
.long Reserved92_IRQHandler // Reserved interrupt 92
.long Reserved93_IRQHandler // Reserved interrupt 93
.long Reserved94_IRQHandler // Reserved interrupt 94
.long Reserved95_IRQHandler // Reserved interrupt 95
.long Reserved96_IRQHandler // Reserved interrupt 96
.long DAC0_IRQHandler // DAC0 interrupt
.long Reserved98_IRQHandler // Reserved interrupt 98
.long TSI0_IRQHandler // TSI0 interrupt
.long MCG_IRQHandler // MCG interrupt
.long LPTimer_IRQHandler // LPTimer interrupt
.long Reserved102_IRQHandler // Reserved interrupt 102
.long PORTA_IRQHandler // Port A interrupt
.long PORTB_IRQHandler // Port B interrupt
.long PORTC_IRQHandler // Port C interrupt
.long PORTD_IRQHandler // Port D interrupt
.long PORTE_IRQHandler // Port E interrupt
.long Reserved108_IRQHandler // Reserved interrupt 108
.long Reserved109_IRQHandler // Reserved interrupt 109
.long SWI_IRQHandler // Software interrupt
.size __isr_vector, . - __isr_vector
.section .text.Reset_Handler
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.Lflash_to_ram_loop:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .Lflash_to_ram_loop
.Lflash_to_ram_loop_end:
ldr r0, =SystemInit
blx r0
ldr r0, =_start
bx r0
.pool
.size Reset_Handler, . - Reset_Handler
.text
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_default_handler handler_name
.align 1
.thumb_func
.weak \handler_name
.type \handler_name, %function
\handler_name :
b .
.size \handler_name, . - \handler_name
.endm
def_default_handler NMI_Handler
def_default_handler HardFault_Handler
def_default_handler MemManage_Handler
def_default_handler BusFault_Handler
def_default_handler UsageFault_Handler
def_default_handler SVC_Handler
def_default_handler DebugMon_Handler
def_default_handler PendSV_Handler
def_default_handler SysTick_Handler
def_default_handler Default_Handler
.macro def_irq_default_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_default_handler DMA0_IRQHandler
def_irq_default_handler DMA1_IRQHandler
def_irq_default_handler DMA2_IRQHandler
def_irq_default_handler DMA3_IRQHandler
def_irq_default_handler DMA4_IRQHandler
def_irq_default_handler DMA5_IRQHandler
def_irq_default_handler DMA6_IRQHandler
def_irq_default_handler DMA7_IRQHandler
def_irq_default_handler DMA8_IRQHandler
def_irq_default_handler DMA9_IRQHandler
def_irq_default_handler DMA10_IRQHandler
def_irq_default_handler DMA11_IRQHandler
def_irq_default_handler DMA12_IRQHandler
def_irq_default_handler DMA13_IRQHandler
def_irq_default_handler DMA14_IRQHandler
def_irq_default_handler DMA15_IRQHandler
def_irq_default_handler DMA_Error_IRQHandler
def_irq_default_handler Reserved33_IRQHandler
def_irq_default_handler FTFL_IRQHandler
def_irq_default_handler Read_Collision_IRQHandler
def_irq_default_handler LVD_LVW_IRQHandler
def_irq_default_handler LLW_IRQHandler
def_irq_default_handler Watchdog_IRQHandler
def_irq_default_handler Reserved39_IRQHandler
def_irq_default_handler I2C0_IRQHandler
def_irq_default_handler I2C1_IRQHandler
def_irq_default_handler SPI0_IRQHandler
def_irq_default_handler SPI1_IRQHandler
def_irq_default_handler Reserved44_IRQHandler
def_irq_default_handler CAN0_ORed_Message_buffer_IRQHandler
def_irq_default_handler CAN0_Bus_Off_IRQHandler
def_irq_default_handler CAN0_Error_IRQHandler
def_irq_default_handler CAN0_Tx_Warning_IRQHandler
def_irq_default_handler CAN0_Rx_Warning_IRQHandler
def_irq_default_handler CAN0_Wake_Up_IRQHandler
def_irq_default_handler I2S0_Tx_IRQHandler
def_irq_default_handler I2S0_Rx_IRQHandler
def_irq_default_handler Reserved53_IRQHandler
def_irq_default_handler Reserved54_IRQHandler
def_irq_default_handler Reserved55_IRQHandler
def_irq_default_handler Reserved56_IRQHandler
def_irq_default_handler Reserved57_IRQHandler
def_irq_default_handler Reserved58_IRQHandler
def_irq_default_handler Reserved59_IRQHandler
def_irq_default_handler UART0_LON_IRQHandler
def_irq_default_handler UART0_RX_TX_IRQHandler
def_irq_default_handler UART0_ERR_IRQHandler
def_irq_default_handler UART1_RX_TX_IRQHandler
def_irq_default_handler UART1_ERR_IRQHandler
def_irq_default_handler UART2_RX_TX_IRQHandler
def_irq_default_handler UART2_ERR_IRQHandler
def_irq_default_handler Reserved67_IRQHandler
def_irq_default_handler Reserved68_IRQHandler
def_irq_default_handler Reserved69_IRQHandler
def_irq_default_handler Reserved70_IRQHandler
def_irq_default_handler Reserved71_IRQHandler
def_irq_default_handler Reserved72_IRQHandler
def_irq_default_handler ADC0_IRQHandler
def_irq_default_handler ADC1_IRQHandler
def_irq_default_handler CMP0_IRQHandler
def_irq_default_handler CMP1_IRQHandler
def_irq_default_handler CMP2_IRQHandler
def_irq_default_handler FTM0_IRQHandler
def_irq_default_handler FTM1_IRQHandler
def_irq_default_handler FTM2_IRQHandler
def_irq_default_handler CMT_IRQHandler
def_irq_default_handler RTC_IRQHandler
def_irq_default_handler RTC_Seconds_IRQHandler
def_irq_default_handler PIT0_IRQHandler
def_irq_default_handler PIT1_IRQHandler
def_irq_default_handler PIT2_IRQHandler
def_irq_default_handler PIT3_IRQHandler
def_irq_default_handler PDB0_IRQHandler
def_irq_default_handler USB0_IRQHandler
def_irq_default_handler USBDCD_IRQHandler
def_irq_default_handler Reserved91_IRQHandler
def_irq_default_handler Reserved92_IRQHandler
def_irq_default_handler Reserved93_IRQHandler
def_irq_default_handler Reserved94_IRQHandler
def_irq_default_handler Reserved95_IRQHandler
def_irq_default_handler Reserved96_IRQHandler
def_irq_default_handler DAC0_IRQHandler
def_irq_default_handler Reserved98_IRQHandler
def_irq_default_handler TSI0_IRQHandler
def_irq_default_handler MCG_IRQHandler
def_irq_default_handler LPTimer_IRQHandler
def_irq_default_handler Reserved102_IRQHandler
def_irq_default_handler PORTA_IRQHandler
def_irq_default_handler PORTB_IRQHandler
def_irq_default_handler PORTC_IRQHandler
def_irq_default_handler PORTD_IRQHandler
def_irq_default_handler PORTE_IRQHandler
def_irq_default_handler Reserved108_IRQHandler
def_irq_default_handler Reserved109_IRQHandler
def_irq_default_handler SWI_IRQHandler
def_irq_default_handler DefaultISR
/* Flash protection region, placed at 0x400 */
.text
.thumb
.align 2
.section .kinetis_flash_config_field,"a",%progbits
kinetis_flash_config:
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xfffffffe
.end

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/* mbed Microcontroller Library - CMSIS
* Copyright (C) 2009-2015 ARM Limited. All rights reserved.
*
* A generic CMSIS include header, pulling in LPC11U24 specifics
*/
#ifndef MBED_CMSIS_H
#define MBED_CMSIS_H
#include "MK20DX256.h"
#include "cmsis_nvic.h"
#endif

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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2012 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"
#define NVIC_RAM_VECTOR_ADDRESS (0x1FFF8000) // Vectors positioned at start of RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
uint32_t i;
// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + 16] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + 16];
}

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/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2015 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H
#define NVIC_NUM_VECTORS (16 + 95) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}
#endif
#endif

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/*
** ###################################################################
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
**
**
** Version: rev. 1.0, 2011-12-15
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2015 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** Revisions:
** - rev. 1.0 (2011-12-15)
** Initial version
**
** ###################################################################
*/
/**
* @file MK20DX256
* @version 1.0
* @date 2011-12-15
* @brief Device specific configuration file for MK20DX256 (implementation file)
*
* Provides a system configuration function and a global variable that contains
* the system frequency. It configures the device and initializes the oscillator
* (PLL) that is part of the microcontroller device.
*/
#include <stdint.h>
#include "MK20DX256.h"
#define DISABLE_WDOG 1
#define CLOCK_SETUP 3
/* Predefined clock setups
0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode
Reference clock source for MCG module is the slow internal clock source 32.768kHz
Core clock = 41.94MHz, BusClock = 41.94MHz
1 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
Reference clock source for MCG module is an external crystal 8MHz
Core clock = 48MHz, BusClock = 48MHz
2 ... Multipurpose Clock Generator (MCG) in Bypassed Low Power External (BLPE) mode
Core clock/Bus clock derived directly from an external crystal 8MHz with no multiplication
Core clock = 8MHz, BusClock = 8MHz
3 ... Multipurpose Clock Generator (MCG) in PLL Engaged External (PEE) mode
Reference clock source for MCG module is an external crystal 16MHz
Core clock = 72MHz, BusClock = 48MHz
This is the Teensy3.1 72Mhz set up
*/
/*----------------------------------------------------------------------------
Define clock source values
*----------------------------------------------------------------------------*/
#if (CLOCK_SETUP == 0)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 41943040u /* Default System clock value */
#elif (CLOCK_SETUP == 1)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
#elif (CLOCK_SETUP == 2)
#define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 8000000u /* Default System clock value */
#elif (CLOCK_SETUP == 3)
#define CPU_XTAL_CLK_HZ 16000000u /* Value of the external crystal or oscillator clock frequency in Hz */
#define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
#define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
#define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
#define DEFAULT_SYSTEM_CLOCK 72000000u /* Default System clock value */
#endif /* (CLOCK_SETUP == 2) */
/* ----------------------------------------------------------------------------
-- Core clock
---------------------------------------------------------------------------- */
uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
/* ----------------------------------------------------------------------------
-- SystemInit()
---------------------------------------------------------------------------- */
void SystemInit (void) {
#if (DISABLE_WDOG)
/* Disable the WDOG module */
/* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */
WDOG->UNLOCK = (uint16_t)0xC520u; /* Key 1 */
/* WDOG_UNLOCK : WDOGUNLOCK=0xD928 */
WDOG->UNLOCK = (uint16_t)0xD928u; /* Key 2 */
/* WDOG_STCTRLH: ??=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,STNDBYEN=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKSRC=1,WDOGEN=0 */
WDOG->STCTRLH = (uint16_t)0x01D2u;
#endif /* (DISABLE_WDOG) */
#if (CLOCK_SETUP == 0)
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
/* Switch to FEI Mode */
/* MCG->C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x06u;
/* MCG->C2: ??=0,??=0,RANGE0=0,HGO=0,EREFS=0,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x00u;
/* MCG_C4: DMX32=0,DRST_DRS=1 */
MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0u) | (uint8_t)0x20u);
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */
MCG->C5 = (uint8_t)0x00u;
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_IREFST_MASK) == 0u) { /* Check that the source of the FLL reference clock is the internal reference clock. */
}
while((MCG->S & 0x0Cu) != 0x00u) { /* Wait until output of the FLL is selected */
}
#elif (CLOCK_SETUP == 1)
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
/* Switch to FBE Mode */
/* OSC0->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x00u;
/* MCG->C7: OSCSEL=0 */
MCG->C7 = (uint8_t)0x00u;
/* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9Au;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
MCG->C5 = (uint8_t)0x03u;
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */
}
#if 0 /* ARM: THIS CHECK IS REMOVED DUE TO BUG WITH SLOW IRC IN REV. 1.0 */
while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */
}
#endif
while((MCG->S & 0x0Cu) != 0x08u) { /* Wait until external reference clock is selected as MCG output */
}
/* Switch to PBE Mode */
/* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
MCG->C5 = (uint8_t)0x03u;
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x40u;
while((MCG->S & MCG_S_PLLST_MASK) == 0u) { /* Wait until the source of the PLLS clock has switched to the PLL */
}
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */
}
/* Switch to PEE Mode */
/* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x1Au;
while((MCG->S & 0x0Cu) != 0x0Cu) { /* Wait until output of the PLL is selected */
}
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */
}
#elif (CLOCK_SETUP == 2)
/* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
/* Switch to FBE Mode */
/* OSC0->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x00u;
/* MCG->C7: OSCSEL=0 */
MCG->C7 = (uint8_t)0x00u;
/* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9Au;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=0 */
MCG->C5 = (uint8_t)0x00u;
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */
}
#if 0 /* ARM: THIS CHECK IS REMOVED DUE TO BUG WITH SLOW IRC IN REV. 1.0 */
while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */
}
#endif
while((MCG->S & 0x0CU) != 0x08u) { /* Wait until external reference clock is selected as MCG output */
}
/* Switch to BLPE Mode */
/* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24u;
#elif (CLOCK_SETUP == 3)
/* SIM->CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM->CLKDIV1 = (uint32_t)0x00110000u; /* Update system prescalers */
/* Switch to FBE Mode */
/* OSC0->CR: ERCLKEN=0,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0->CR = (uint8_t)0x0Au; // this is required if there are no external capacitors fitted to the Xtal
/* MCG->C7: OSCSEL=0 */
MCG->C7 = (uint8_t)0x00u;
/* MCG->C2: ??=0,??=0,RANGE0=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
MCG->C2 = (uint8_t)0x24u;
/* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x9Au;
/* MCG->C4: DMX32=0,DRST_DRS=0 */
MCG->C4 &= (uint8_t)~(uint8_t)0xE0u;
/* MCG->C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
MCG->C5 = (uint8_t)0x07u;
/* MCG->C6: LOLIE=0,PLLS=0,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x00u;
while((MCG->S & MCG_S_OSCINIT0_MASK) == 0u) { /* Check that the oscillator is running */
}
#if 0 /* ARM: THIS CHECK IS REMOVED DUE TO BUG WITH SLOW IRC IN REV. 1.0 */
while((MCG->S & MCG_S_IREFST_MASK) != 0u) { /* Check that the source of the FLL reference clock is the external reference clock. */
}
#endif
while((MCG->S & 0x0Cu) != 0x08u) { /* Wait until external reference clock is selected as MCG output */
}
/* Switch to PBE Mode */
/* MCG_C5: ??=0,PLLCLKEN=0,PLLSTEN=0,PRDIV0=3 */
MCG->C5 = (uint8_t)0x05u;
/* MCG->C6: LOLIE=0,PLLS=1,CME=0,VDIV0=0 */
MCG->C6 = (uint8_t)0x43u;
while((MCG->S & MCG_S_PLLST_MASK) == 0u) { /* Wait until the source of the PLLS clock has switched to the PLL */
}
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */
}
/* Switch to PEE Mode */
/* MCG->C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
MCG->C1 = (uint8_t)0x22u;
while((MCG->S & 0x0Cu) != 0x0Cu) { /* Wait until output of the PLL is selected */
}
while((MCG->S & MCG_S_LOCK0_MASK) == 0u) { /* Wait until locked */
}
#endif /* (CLOCK_SETUP == 3) */
}
/* ----------------------------------------------------------------------------
-- SystemCoreClockUpdate()
---------------------------------------------------------------------------- */
void SystemCoreClockUpdate (void) {
uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */
uint8_t Divider;
if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x0u) {
/* Output of FLL or PLL is selected */
if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) {
/* FLL is selected */
if ((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u) {
/* External reference clock is selected */
if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) {
MCGOUTClock = CPU_XTAL_CLK_HZ; /* System oscillator drives MCG clock */
} else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */
MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */
} /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */
Divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
MCGOUTClock = (MCGOUTClock / Divider); /* Calculate the divided FLL reference clock */
if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) {
MCGOUTClock /= 32u; /* If high range is enabled, additional 32 divider is active */
} /* ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u) */
} else { /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */
MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* The slow internal reference clock is selected */
} /* (!((MCG->C1 & MCG_C1_IREFS_MASK) == 0x0u)) */
/* Select correct multiplier to calculate the MCG output clock */
switch (MCG->C4 & (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS_MASK)) {
case 0x0u:
MCGOUTClock *= 640u;
break;
case 0x20u:
MCGOUTClock *= 1280u;
break;
case 0x40u:
MCGOUTClock *= 1920u;
break;
case 0x60u:
MCGOUTClock *= 2560u;
break;
case 0x80u:
MCGOUTClock *= 732u;
break;
case 0xA0u:
MCGOUTClock *= 1464u;
break;
case 0xC0u:
MCGOUTClock *= 2197u;
break;
case 0xE0u:
MCGOUTClock *= 2929u;
break;
default:
break;
}
} else { /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */
/* PLL is selected */
Divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
MCGOUTClock = (uint32_t)(CPU_XTAL_CLK_HZ / Divider); /* Calculate the PLL reference clock */
Divider = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
MCGOUTClock *= Divider; /* Calculate the MCG output clock */
} /* (!((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u)) */
} else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x40u) {
/* Internal reference clock is selected */
if ((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u) {
MCGOUTClock = CPU_INT_SLOW_CLK_HZ; /* Slow internal reference clock selected */
} else { /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */
MCGOUTClock = CPU_INT_FAST_CLK_HZ / (1 << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT)); /* Fast internal reference clock selected */
} /* (!((MCG->C2 & MCG_C2_IRCS_MASK) == 0x0u)) */
} else if ((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u) {
/* External reference clock is selected */
if ((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u) {
MCGOUTClock = CPU_XTAL_CLK_HZ; /* System oscillator drives MCG clock */
} else { /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */
MCGOUTClock = CPU_XTAL32k_CLK_HZ; /* RTC 32 kHz oscillator drives MCG clock */
} /* (!((MCG->C7 & MCG_C7_OSCSEL_MASK) == 0x0u)) */
} else { /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */
/* Reserved value */
return;
} /* (!((MCG->C1 & MCG_C1_CLKS_MASK) == 0x80u)) */
SystemCoreClock = (MCGOUTClock / (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
}

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/*
** ###################################################################
** Compilers: ARM Compiler
** Freescale C/C++ for Embedded ARM
** GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
**
**
**
** Version: rev. 2.0, 2012-03-19
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright: 2015 Freescale Semiconductor, Inc. All Rights Reserved.
**
** http: www.freescale.com
** mail: support@freescale.com
**
** Revisions:
** - rev. 1.0 (2011-12-15)
** Initial version
** - rev. 2.0 (2012-03-19)
** PDB Peripheral register structure updated.
** DMA Registers and bits for unsupported DMA channels removed.
**
** ###################################################################
*/
/**
* @file MK20DX256
* @version 2.0
* @date 2012-03-19
* @brief Device specific configuration file for MK20DX256 (header file)
*
* Provides a system configuration function and a global variable that contains
* the system frequency. It configures the device and initializes the oscillator
* (PLL) that is part of the microcontroller device.
*/
#ifndef SYSTEM_MK20DX256_H_
#define SYSTEM_MK20DX256_H_ /**< Symbol preventing repeated inclusion */
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
/**
* @brief System clock frequency (core clock)
*
* The system clock frequency supplied to the SysTick timer and the processor
* core clock. This variable can be used by the user application to setup the
* SysTick timer or configure other parameters. It may also be used by debugger to
* query the frequency of the debug timer or configure the trace clock speed
* SystemCoreClock is initialized with a correct predefined value.
*/
extern uint32_t SystemCoreClock;
/**
* @brief Setup the microcontroller system.
*
* Typically this function configures the oscillator (PLL) that is part of the
* microcontroller device. For systems with variable clock speed it also updates
* the variable SystemCoreClock. SystemInit is called from startup_device file.
*/
void SystemInit (void);
/**
* @brief Updates the SystemCoreClock variable.
*
* It must be called whenever the core clock is changed during program
* execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
* the current core clock.
*/
void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* #if !defined(SYSTEM_MK20DX256_H_) */

20
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct Normal file
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LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K)
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
.ANY (IOHANDLER_RAM)
}
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

325
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/startup_LPC11xx.s Normal file
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;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
EXPORT __heap_base
EXPORT __heap_limit
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

20
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/LPC11U37.sct Normal file
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LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K)
ER_IROM1 0x00000000 0x10000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
; 8KB - 0xC0 = 0x1F40
RW_IRAM1 0x100000C0 0x1F40 {
.ANY (+RW +ZI)
}
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
.ANY (IOHANDLER_RAM)
}
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
.ANY (USBRAM)
}
}

308
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_ARM_STD/TARGET_LPC11U37H_401/startup_LPC11xx.s Normal file
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;/*****************************************************************************
; * @file: startup_LPC11xx.s
; * @purpose: CMSIS Cortex-M0 Core Device Startup File
; * for the NXP LPC11xx Device Series
; * @version: V1.0
; * @date: 25. Nov. 2008
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
; *
; * Copyright (C) 2008 ARM Limited. All rights reserved.
; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
; * processor based microcontrollers. This file can be freely distributed
; * within development tools that are supporting such ARM based processors.
; *
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
; *
; *****************************************************************************/
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x
PRESERVE8
THUMB
; Vector Table Mapped to Address 0 at Reset
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler ; Reset Handler
DCD NMI_Handler ; NMI Handler
DCD HardFault_Handler ; Hard Fault Handler
DCD MemManage_Handler ; MPU Fault Handler
DCD BusFault_Handler ; Bus Fault Handler
DCD UsageFault_Handler ; Usage Fault Handler
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVC_Handler ; SVCall Handler
DCD DebugMon_Handler ; Debug Monitor Handler
DCD 0 ; Reserved
DCD PendSV_Handler ; PendSV Handler
DCD SysTick_Handler ; SysTick Handler
; External Interrupts
; for LPC11Uxx (With USB)
DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
DCD FLEX_INT1_IRQHandler
DCD FLEX_INT2_IRQHandler
DCD FLEX_INT3_IRQHandler
DCD FLEX_INT4_IRQHandler
DCD FLEX_INT5_IRQHandler
DCD FLEX_INT6_IRQHandler
DCD FLEX_INT7_IRQHandler
DCD GINT0_IRQHandler
DCD GINT1_IRQHandler ; PIO0 (0:7)
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD Reserved_IRQHandler
DCD SSP1_IRQHandler ; SSP1
DCD I2C_IRQHandler ; I2C
DCD TIMER16_0_IRQHandler ; 16-bit Timer0
DCD TIMER16_1_IRQHandler ; 16-bit Timer1
DCD TIMER32_0_IRQHandler ; 32-bit Timer0
DCD TIMER32_1_IRQHandler ; 32-bit Timer1
DCD SSP0_IRQHandler ; SSP0
DCD UART_IRQHandler ; UART
DCD USB_IRQHandler ; USB IRQ
DCD USB_FIQHandler ; USB FIQ
DCD ADC_IRQHandler ; A/D Converter
DCD WDT_IRQHandler ; Watchdog timer
DCD BOD_IRQHandler ; Brown Out Detect
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
DCD Reserved_IRQHandler ; Reserved
DCD Reserved_IRQHandler ; Reserved
DCD USBWakeup_IRQHandler ; USB wake up
DCD Reserved_IRQHandler ; Reserved
;; 48 vector entries. We pad to 128 to fill the 0x0 - 0x1FF REMAP address space
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
DCD 0xFFFFFFFF ; Datafill
IF :LNOT::DEF:NO_CRP
AREA |.ARM.__at_0x02FC|, CODE, READONLY
CRP_Key DCD 0xFFFFFFFF
ENDIF
AREA |.text|, CODE, READONLY
; Reset Handler
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
; Dummy Exception Handlers (infinite loops which can be modified)
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
; for particular peripheral.
;NMI_Handler PROC
; EXPORT NMI_Handler [WEAK]
; B .
; ENDP
HardFault_Handler\
PROC
EXPORT HardFault_Handler [WEAK]
B .
ENDP
MemManage_Handler\
PROC
EXPORT MemManage_Handler [WEAK]
B .
ENDP
BusFault_Handler\
PROC
EXPORT BusFault_Handler [WEAK]
B .
ENDP
UsageFault_Handler\
PROC
EXPORT UsageFault_Handler [WEAK]
B .
ENDP
SVC_Handler PROC
EXPORT SVC_Handler [WEAK]
B .
ENDP
DebugMon_Handler\
PROC
EXPORT DebugMon_Handler [WEAK]
B .
ENDP
PendSV_Handler PROC
EXPORT PendSV_Handler [WEAK]
B .
ENDP
SysTick_Handler PROC
EXPORT SysTick_Handler [WEAK]
B .
ENDP
Reserved_IRQHandler PROC
EXPORT Reserved_IRQHandler [WEAK]
B .
ENDP
Default_Handler PROC
; for LPC11Uxx (With USB)
EXPORT NMI_Handler [WEAK]
EXPORT FLEX_INT0_IRQHandler [WEAK]
EXPORT FLEX_INT1_IRQHandler [WEAK]
EXPORT FLEX_INT2_IRQHandler [WEAK]
EXPORT FLEX_INT3_IRQHandler [WEAK]
EXPORT FLEX_INT4_IRQHandler [WEAK]
EXPORT FLEX_INT5_IRQHandler [WEAK]
EXPORT FLEX_INT6_IRQHandler [WEAK]
EXPORT FLEX_INT7_IRQHandler [WEAK]
EXPORT GINT0_IRQHandler [WEAK]
EXPORT GINT1_IRQHandler [WEAK]
EXPORT SSP1_IRQHandler [WEAK]
EXPORT I2C_IRQHandler [WEAK]
EXPORT TIMER16_0_IRQHandler [WEAK]
EXPORT TIMER16_1_IRQHandler [WEAK]
EXPORT TIMER32_0_IRQHandler [WEAK]
EXPORT TIMER32_1_IRQHandler [WEAK]
EXPORT SSP0_IRQHandler [WEAK]
EXPORT UART_IRQHandler [WEAK]
EXPORT USB_IRQHandler [WEAK]
EXPORT USB_FIQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT BOD_IRQHandler [WEAK]
EXPORT FMC_IRQHandler [WEAK]
EXPORT USBWakeup_IRQHandler [WEAK]
NMI_Handler
FLEX_INT0_IRQHandler
FLEX_INT1_IRQHandler
FLEX_INT2_IRQHandler
FLEX_INT3_IRQHandler
FLEX_INT4_IRQHandler
FLEX_INT5_IRQHandler
FLEX_INT6_IRQHandler
FLEX_INT7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
SSP1_IRQHandler
I2C_IRQHandler
TIMER16_0_IRQHandler
TIMER16_1_IRQHandler
TIMER32_0_IRQHandler
TIMER32_1_IRQHandler
SSP0_IRQHandler
UART_IRQHandler
USB_IRQHandler
USB_FIQHandler
ADC_IRQHandler
WDT_IRQHandler
BOD_IRQHandler
FMC_IRQHandler
USBWakeup_IRQHandler
B .
ENDP
ALIGN
END

152
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11U37H_401/LPC11U37.ld Normal file
View File

@ -0,0 +1,152 @@
/* Linker script to configure memory regions. */
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
RAM (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40
RAMIO (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800
USB_RAM (rwx): ORIGIN = 0x20004000, LENGTH = 0x800
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text.Reset_Handler)
/* Only vectors and code running at reset are safe to be in first 512
bytes since RAM can be mapped into this area for RAM based interrupt
vectors. */
. = 0x00000200;
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

157
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11UXX/TOOLCHAIN_GCC_CR/TARGET_LPC11U37H_401/LPC11U37.ld Normal file
View File

@ -0,0 +1,157 @@
/* mbed - LPC11U35 linker script
* Based linker script generated by Code Red Technologies Red Suite 4.1
*/
GROUP(libgcc.a libc_s.a libstdc++_s.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
MEMORY
{
/* Define each memory region */
MFlash32 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128k */
RamLoc8 (rwx) : ORIGIN = 0x100000C0, LENGTH = 0x1F40 /* 8k */
RamIo1 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2k */
RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2k */
}
/* Define a symbol for the top of each memory region */
__top_MFlash32 = 0x0 + 0x10000;
__top_RamLoc8 = 0x10000000 + 0x1F40;
__top_RamIo1 = 0x20000000 + 0x800;
__top_RamUsb2 = 0x20004000 + 0x800;
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
KEEP(*(.isr_vector))
*(.text.ResetISR)
. = 0x200;
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data)) ;
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2)) ;
LONG( SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.*)
. = ALIGN(4);
/* C++ constructors etc */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
KEEP(*(.fini));
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(0x4);
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
/* End C++ */
} > MFlash32
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash32
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash32
__exidx_end = .;
_etext = .;
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
*(.data.$RAM2*)
*(.data.$RamUsb2*)
. = ALIGN(4) ;
} > RamUsb2 AT>MFlash32
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
} > RamLoc8
.data : ALIGN(4)
{
FILL(0xff)
_data = .;
*(vtable)
*(.data*)
. = ALIGN(4) ;
_edata = .;
} > RamLoc8 AT>MFlash32
.bss_RAM2 : ALIGN(4)
{
*(.bss.$RAM2*)
*(.bss.$RamUsb2*)
. = ALIGN(4) ;
} > RamUsb2
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
__end__ = .;
} > RamLoc8
PROVIDE(_pvHeapStart = .);
PROVIDE(_vStackTop = __top_RamLoc8 - 0);
}

4
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC43XX/system_LPC43xx.c
View File

@ -150,11 +150,9 @@ void SystemInit(void)
SCB->VTOR = (unsigned int) &g_pfnVectors;
#endif
#if !defined(TOOLCHAIN_GCC)
#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
/* Initialize floating point */
fpuInit();
#endif
#endif
SystemSetupPins(pre_clock_mux, COUNT_OF(pre_clock_mux)); /* Configure pins */
@ -367,7 +365,7 @@ void fpuInit(void)
static void WaitUs(uint32_t us)
{
uint32_t cyc = us * CPU_NANOSEC(1000) / 4;
volatile uint32_t cyc = us * CPU_NANOSEC(1000) / 4;
while (cyc--)
;
}

0
libraries/USBDevice/USBDevice/TARGET_RENESAS/TARGET_RZ_A1H/src/userdef/rza_io_regrw.c → libraries/mbed/targets/cmsis/TARGET_RENESAS/TARGET_RZ_A1H/rza_io_regrw.c
View File

46
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/PeripheralPins.h Normal file
View File

@ -0,0 +1,46 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALPINS_H
#define MBED_PERIPHERALPINS_H
#include "pinmap.h"
#include "PeripheralNames.h"
/************ADC***************/
extern const PinMap PinMap_ADC[];
/************DAC***************/
extern const PinMap PinMap_DAC[];
/************I2C***************/
extern const PinMap PinMap_I2C_SDA[];
extern const PinMap PinMap_I2C_SCL[];
/************UART***************/
extern const PinMap PinMap_UART_TX[];
extern const PinMap PinMap_UART_RX[];
/************SPI***************/
extern const PinMap PinMap_SPI_SCLK[];
extern const PinMap PinMap_SPI_MOSI[];
extern const PinMap PinMap_SPI_MISO[];
extern const PinMap PinMap_SPI_SSEL[];
/************PWM***************/
extern const PinMap PinMap_PWM[];
#endif

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/PortNames.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/PortNames.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

7
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/PeripheralNames.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/PeripheralNames.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -62,11 +62,6 @@ typedef enum {
ADC0_SE15 = 15
} ADCName;
typedef enum {
DAC_0 = 0
} DACName;
typedef enum {
SPI_0 = (int)SPI0_BASE,
} SPIName;

120
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/PeripheralPins.c Normal file
View File

@ -0,0 +1,120 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{PTC2, ADC0_SE4b, 0},
{PTD1, ADC0_SE5b, 0},
{PTD5, ADC0_SE6b, 0},
{PTD6, ADC0_SE7b, 0},
{PTB0, ADC0_SE8, 0},
{PTB1, ADC0_SE9, 0},
{PTB2, ADC0_SE12, 0},
{PTB3, ADC0_SE13, 0},
{PTC0, ADC0_SE14, 0},
{PTC1, ADC0_SE15, 0},
{NC, NC, 0}
};
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{PTB1, I2C_0, 2},
{PTB3, I2C_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_I2C_SCL[] = {
{PTB0, I2C_0, 2},
{PTB2, I2C_0, 2},
{NC , NC, 0}
};
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{PTB17, UART_0, 3},
{PTC4 , UART_1, 3},
{PTD3 , UART_2, 3},
{PTD7 , UART_0, 3},
{PTE0 , UART_1, 3},
{NC , NC , 0}
};
const PinMap PinMap_UART_RX[] = {
{PTB16, UART_0, 3},
{PTC3 , UART_1, 3},
{PTD2 , UART_2, 3},
{PTD6 , UART_0, 3},
{PTE1 , UART_1, 3},
{NC , NC , 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = {
{PTC5, SPI_0, 2},
{PTD1, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{PTD2, SPI_0, 2},
{PTC6, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = {
{PTD3, SPI_0, 2},
{PTC7, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = {
{PTD0, SPI_0, 2},
{PTC4, SPI_0, 2},
{NC , NC , 0}
};
/************PWM***************/
const PinMap PinMap_PWM[] = {
// LEDs
{LED_RED , PWM_3 , 4}, // PTC3, FTM0 CH2
{LED_GREEN, PWM_5, 4}, // PTD4, FTM0 CH4
{LED_BLUE , PWM_8 , 3}, // PTA2, FTM0 CH7
// Arduino digital pinout
{D3, PWM_5 , 4}, // PTD4, FTM0 CH4
{D5, PWM_7 , 3}, // PTA1, FTM0 CH6
{D6, PWM_3 , 4}, // PTC3, FTM0 CH2
{D9, PWM_6 , 4}, // PTD5, FTM0 CH6
{D10, PWM_2 , 4}, // PTC2, FTM0 CH1
{PTA0, PWM_6 , 3}, // PTA0, FTM0 CH5
{PTA3, PWM_1 , 3}, // PTA3, FTM0 CH0
{PTA4, PWM_2 , 3}, // PTA4, FTM0 CH1
{PTA5, PWM_3 , 3}, // PTA5, FTM0 CH2
{PTA12, PWM_9 , 3}, // PTA12, FTM1 CH0
{PTA13, PWM_10, 3}, // PTA13, FTM1 CH1
{PTB0, PWM_9 , 3}, // PTB0, FTM1 CH0
{PTB1, PWM_10, 3}, // PTB1, FTM1 CH1
{PTC1, PWM_1 , 4}, // PTC1, FTM0 CH0
{PTD4, PWM_4 , 4}, // PTD4, FTM0 CH3
{PTD6, PWM_7 , 4}, // PTD6, FTM0 CH6
{PTD7, PWM_8 , 4}, // PTD7, FTM0 CH7
{NC , NC , 0}
};

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/PinNames.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/PinNames.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/device.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

86
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/PeripheralNames.h Normal file
View File

@ -0,0 +1,86 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)UART0_BASE,
UART_1 = (int)UART1_BASE,
UART_2 = (int)UART2_BASE
} UARTName;
#define STDIO_UART_TX USBTX
#define STDIO_UART_RX USBRX
#define STDIO_UART UART_0
typedef enum {
I2C_0 = (int)I2C0_BASE,
I2C_1 = (int)I2C1_BASE,
} I2CName;
#define TPM_SHIFT 8
typedef enum {
PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
} PWMName;
typedef enum {
ADC0_SE4b = 4,
ADC0_SE5b = 5,
ADC0_SE6b = 6,
ADC0_SE7b = 7,
ADC0_SE8 = 8,
ADC0_SE9 = 9,
ADC0_SE12 = 12,
ADC0_SE13 = 13,
ADC0_SE14 = 14,
ADC0_SE15 = 15,
ADC1_SE4b = 16,
ADC1_SE5b = 17,
ADC1_SE6b = 18,
ADC1_SE7b = 19,
} ADCName;
typedef enum {
DAC_0 = 0
} DACName;
typedef enum {
SPI_0 = (int)SPI0_BASE,
SPI_1 = (int)SPI0_BASE,
SPI_2 = (int)SPI0_BASE,
SPI_3 = (int)SPI0_BASE,
SPI_4 = (int)SPI0_BASE,
} SPIName;
#ifdef __cplusplus
}
#endif
#endif

137
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/PeripheralPins.c Normal file
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@ -0,0 +1,137 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{PTC2, ADC0_SE4b, 0},
{PTD1, ADC0_SE5b, 0},
{PTD5, ADC0_SE6b, 0},
{PTD6, ADC0_SE7b, 0},
{PTB0, ADC0_SE8, 0},
{PTB1, ADC0_SE9, 0},
{PTB2, ADC0_SE12, 0},
{PTB3, ADC0_SE13, 0},
{PTC0, ADC0_SE14, 0},
{PTC1, ADC0_SE15, 0},
{PTC8, ADC1_SE4b, 0},
{PTC9, ADC1_SE5b, 0},
{PTC10,ADC1_SE6b, 0},
{PTC11,ADC1_SE7b, 0},
{NC, NC, 0}
};
/************DAC***************/
const PinMap PinMap_DAC[] = {
{DAC0_OUT, DAC_0, 0},
{NC , NC , 0}
};
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{PTB1, I2C_0, 2},
{PTB3, I2C_0, 2},
{PTE0, I2C_1, 2},
{PTC11, I2C_1, 2},
{NC , NC , 0}
};
const PinMap PinMap_I2C_SCL[] = {
{PTB0, I2C_0, 2},
{PTB2, I2C_0, 2},
{PTE1, I2C_1, 2},
{PTC10, I2C_1, 2},
{NC , NC, 0}
};
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{PTB17, UART_0, 3},
{PTC4 , UART_1, 3},
{PTD3 , UART_2, 3},
{PTD7 , UART_0, 3},
{PTE0 , UART_1, 3},
{NC , NC , 0}
};
const PinMap PinMap_UART_RX[] = {
{PTB16, UART_0, 3},
{PTC3 , UART_1, 3},
{PTD2 , UART_2, 3},
{PTD6 , UART_0, 3},
{PTE1 , UART_1, 3},
{NC , NC , 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = { // SCK
{PTC5, SPI_0, 2},
{PTD1, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = { // DOUT
{PTD2, SPI_0, 2},
{PTC6, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = { // DIN
{PTD3, SPI_0, 2},
{PTC7, SPI_0, 2},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = { // CS
{PTD0, SPI_0, 2},
{PTC4, SPI_0, 2},
{PTD4, SPI_0, 2},
{PTC3, SPI_0, 2},
{PTC2, SPI_0, 2},
{PTD5, SPI_0, 2},
{PTD6, SPI_0, 2},
{PTC1, SPI_0, 2},
{PTC0, SPI_0, 2}
};
/************PWM***************/
const PinMap PinMap_PWM[] = {
// LEDs
{LED_RED , PWM_3 , 4}, // PTC3, FTM0 CH2
{LED_GREEN, PWM_5, 4}, // PTD4, FTM0 CH4
{LED_BLUE , PWM_8 , 3}, // PTA2, FTM0 CH7
{PTA0, PWM_6 , 3}, // PTA0, FTM0 CH5
{PTA1, PWM_7 , 3}, // PTA1, FTM0 CH6
{PTA3, PWM_1 , 3}, // PTA3, FTM0 CH0
{PTA4, PWM_2 , 3}, // PTA4, FTM0 CH1
{PTA5, PWM_3 , 3}, // PTA5, FTM0 CH2
{PTA12, PWM_9 , 3}, // PTA12, FTM1 CH0
{PTA13, PWM_10, 3}, // PTA13, FTM1 CH1
{PTB0, PWM_9 , 3}, // PTB0, FTM1 CH0
{PTB1, PWM_10, 3}, // PTB1, FTM1 CH1
{PTC1, PWM_1 , 4}, // PTC1, FTM0 CH0
{PTC2, PWM_2 , 4}, // PTC2, FTM0 CH1
{PTC3, PWM_3 , 4}, // PTC3, FTM0 CH2
{PTD4, PWM_4 , 4}, // PTD4, FTM0 CH3
{PTD5, PWM_6 , 4}, // PTD5, FTM0 CH6
{PTD6, PWM_7 , 4}, // PTD6, FTM0 CH6
{PTD7, PWM_8 , 4}, // PTD7, FTM0 CH7
{NC , NC , 0}
};

293
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/PinNames.h Normal file
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@ -0,0 +1,293 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
/* PCR - 0x1000 */
#define PORT_SHIFT 12
typedef enum {
PTA0 = 0x0,
PTA1 = 0x4,
PTA2 = 0x8,
PTA3 = 0xc,
PTA4 = 0x10,
PTA5 = 0x14,
PTA6 = 0x18,
PTA7 = 0x1c,
PTA8 = 0x20,
PTA9 = 0x24,
PTA10 = 0x28,
PTA11 = 0x2c,
PTA12 = 0x30,
PTA13 = 0x34,
PTA14 = 0x38,
PTA15 = 0x3c,
PTA16 = 0x40,
PTA17 = 0x44,
PTA18 = 0x48,
PTA19 = 0x4c,
PTA20 = 0x50,
PTA21 = 0x54,
PTA22 = 0x58,
PTA23 = 0x5c,
PTA24 = 0x60,
PTA25 = 0x64,
PTA26 = 0x68,
PTA27 = 0x6c,
PTA28 = 0x70,
PTA29 = 0x74,
PTA30 = 0x78,
PTA31 = 0x7c,
PTB0 = 0x1000,
PTB1 = 0x1004,
PTB2 = 0x1008,
PTB3 = 0x100c,
PTB4 = 0x1010,
PTB5 = 0x1014,
PTB6 = 0x1018,
PTB7 = 0x101c,
PTB8 = 0x1020,
PTB9 = 0x1024,
PTB10 = 0x1028,
PTB11 = 0x102c,
PTB12 = 0x1030,
PTB13 = 0x1034,
PTB14 = 0x1038,
PTB15 = 0x103c,
PTB16 = 0x1040,
PTB17 = 0x1044,
PTB18 = 0x1048,
PTB19 = 0x104c,
PTB20 = 0x1050,
PTB21 = 0x1054,
PTB22 = 0x1058,
PTB23 = 0x105c,
PTB24 = 0x1060,
PTB25 = 0x1064,
PTB26 = 0x1068,
PTB27 = 0x106c,
PTB28 = 0x1070,
PTB29 = 0x1074,
PTB30 = 0x1078,
PTB31 = 0x107c,
PTC0 = 0x2000,
PTC1 = 0x2004,
PTC2 = 0x2008,
PTC3 = 0x200c,
PTC4 = 0x2010,
PTC5 = 0x2014,
PTC6 = 0x2018,
PTC7 = 0x201c,
PTC8 = 0x2020,
PTC9 = 0x2024,
PTC10 = 0x2028,
PTC11 = 0x202c,
PTC12 = 0x2030,
PTC13 = 0x2034,
PTC14 = 0x2038,
PTC15 = 0x203c,
PTC16 = 0x2040,
PTC17 = 0x2044,
PTC18 = 0x2048,
PTC19 = 0x204c,
PTC20 = 0x2050,
PTC21 = 0x2054,
PTC22 = 0x2058,
PTC23 = 0x205c,
PTC24 = 0x2060,
PTC25 = 0x2064,
PTC26 = 0x2068,
PTC27 = 0x206c,
PTC28 = 0x2070,
PTC29 = 0x2074,
PTC30 = 0x2078,
PTC31 = 0x207c,
PTD0 = 0x3000,
PTD1 = 0x3004,
PTD2 = 0x3008,
PTD3 = 0x300c,
PTD4 = 0x3010,
PTD5 = 0x3014,
PTD6 = 0x3018,
PTD7 = 0x301c,
PTD8 = 0x3020,
PTD9 = 0x3024,
PTD10 = 0x3028,
PTD11 = 0x302c,
PTD12 = 0x3030,
PTD13 = 0x3034,
PTD14 = 0x3038,
PTD15 = 0x303c,
PTD16 = 0x3040,
PTD17 = 0x3044,
PTD18 = 0x3048,
PTD19 = 0x304c,
PTD20 = 0x3050,
PTD21 = 0x3054,
PTD22 = 0x3058,
PTD23 = 0x305c,
PTD24 = 0x3060,
PTD25 = 0x3064,
PTD26 = 0x3068,
PTD27 = 0x306c,
PTD28 = 0x3070,
PTD29 = 0x3074,
PTD30 = 0x3078,
PTD31 = 0x307c,
PTE0 = 0x4000,
PTE1 = 0x4004,
PTE2 = 0x4008,
PTE3 = 0x400c,
PTE4 = 0x4010,
PTE5 = 0x4014,
PTE6 = 0x4018,
PTE7 = 0x401c,
PTE8 = 0x4020,
PTE9 = 0x4024,
PTE10 = 0x4028,
PTE11 = 0x402c,
PTE12 = 0x4030,
PTE13 = 0x4034,
PTE14 = 0x4038,
PTE15 = 0x403c,
PTE16 = 0x4040,
PTE17 = 0x4044,
PTE18 = 0x4048,
PTE19 = 0x404c,
PTE20 = 0x4050,
PTE21 = 0x4054,
PTE22 = 0x4058,
PTE23 = 0x405c,
PTE24 = 0x4060,
PTE25 = 0x4064,
PTE26 = 0x4068,
PTE27 = 0x406c,
PTE28 = 0x4070,
PTE29 = 0x4074,
PTE30 = 0x4078,
PTE31 = 0x407c,
LED_RED = PTC5, // set these to the only led on board
LED_GREEN = PTC5, //
LED_BLUE = PTC5, //
// mbed original LED naming
LED1 = LED_RED,
LED2 = LED_GREEN,
LED3 = LED_BLUE,
LED4 = LED_BLUE,
// USB Pins
USBTX = PTB17,
USBRX = PTB16,
// DAC Pins
DAC0_OUT = 0xFEFE, /* DAC does not have Pin Name in RM */
// Teensy3.1 Headers
p0 = PTB16,
p1 = PTB17,
p2 = PTD0,
p3 = PTA12,
p4 = PTA13,
p5 = PTD7,
p6 = PTD4,
p7 = PTD2,
p8 = PTD3,
p9 = PTC3,
p10 = PTC4,
p11 = PTC6,
p12 = PTC7,
p13 = PTC5,
p14 = PTD1,
p15 = PTC0,
p16 = PTB0,
p17 = PTB1,
p18 = PTB3,
p19 = PTB2,
p20 = PTD5,
p21 = PTD6,
p22 = PTC1,
p23 = PTC2,
p24 = PTA5,
p25 = PTD19,
p26 = PTE1,
p27 = PTC9,
p28 = PTC8,
p29 = PTC10,
p30 = PTC11,
p31 = PTE0,
p32 = PTB18,
p33 = PTA4,
A0 = PTD1,
A1 = PTC0,
A2 = PTB0,
A3 = PTB1,
A4 = PTB3,
A5 = PTB2,
A6 = PTD5,
A7 = PTD6,
A8 = PTC1,
A9 = PTC2,
I2C_SCL = PTB3,
I2C_SDA = PTB2,
SPI_SCK = PTC5, // sclk
SPI_DOUT = PTC6, // mosi
SPI_DIN = PTC7, // miso
SPI_CS = PTC4, // ssel
SERIAL_TX = PTB17,
SERIAL_RX = PTB16,
PWM = PTD7,
DAC = DAC0_OUT,
TSI_ELEC0 = PTC1,
TSI_ELEC1 = PTC2,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullDown = 2,
PullUp = 3,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

58
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/TARGET_TEENSY3_1/device.h Normal file
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@ -0,0 +1,58 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 1
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 1
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 1
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 1
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 24
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 1
#define DEVICE_ERROR_RED 1
#include "objects.h"
#endif

18
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/analogin_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/analogin_api.c
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@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -19,23 +19,10 @@
#include "cmsis.h"
#include "pinmap.h"
#include "clk_freqs.h"
#include "PeripheralPins.h"
#define MAX_FADC 6000000
static const PinMap PinMap_ADC[] = {
{PTC2, ADC0_SE4b, 0},
{PTD1, ADC0_SE5b, 0},
{PTD5, ADC0_SE6b, 0},
{PTD6, ADC0_SE7b, 0},
{PTB0, ADC0_SE8, 0},
{PTB1, ADC0_SE9, 0},
{PTB2, ADC0_SE12, 0},
{PTB3, ADC0_SE13, 0},
{PTC0, ADC0_SE14, 0},
{PTC1, ADC0_SE15, 0},
{NC, NC, 0}
};
void analogin_init(analogin_t *obj, PinName pin) {
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
MBED_ASSERT(obj->adc != (ADCName)NC);
@ -90,4 +77,3 @@ float analogin_read(analogin_t *obj) {
uint16_t value = analogin_read_u16(obj);
return (float)value * (1.0f / (float)0xFFFF);
}

84
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/analogout_api.c Normal file
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@ -0,0 +1,84 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "analogout_api.h"
#if DEVICE_ANALOGOUT
#include "cmsis.h"
#include "pinmap.h"
#include "PeripheralPins.h"
#define RANGE_12BIT 0xFFF
void analogout_init(dac_t *obj, PinName pin) {
obj->dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
MBED_ASSERT(obj->dac != (DACName)NC);
SIM->SCGC2 |= SIM_SCGC2_DAC0_MASK;
uint32_t port = (uint32_t)pin >> PORT_SHIFT;
SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
DAC0->DAT[obj->dac].DATH = 0;
DAC0->DAT[obj->dac].DATL = 0;
DAC0->C1 = DAC_C1_DACBFMD_MASK; // One-Time Scan Mode
DAC0->C0 = DAC_C0_DACEN_MASK // Enable
| DAC_C0_DACSWTRG_MASK // Software Trigger
| DAC_C0_DACRFS_MASK; // VDDA selected
analogout_write_u16(obj, 0);
}
void analogout_free(dac_t *obj) {}
static inline void dac_write(dac_t *obj, int value) {
DAC0->DAT[obj->dac].DATL = (uint8_t)( value & 0xFF);
DAC0->DAT[obj->dac].DATH = (uint8_t)((value >> 8) & 0xFF);
}
static inline int dac_read(dac_t *obj) {
return ((DAC0->DAT[obj->dac].DATH << 8) | DAC0->DAT[obj->dac].DATL);
}
void analogout_write(dac_t *obj, float value) {
if (value < 0.0) {
dac_write(obj, 0);
} else if (value > 1.0) {
dac_write(obj, RANGE_12BIT);
} else {
dac_write(obj, value * (float)RANGE_12BIT);
}
}
void analogout_write_u16(dac_t *obj, uint16_t value) {
dac_write(obj, value >> 4); // 12-bit
}
float analogout_read(dac_t *obj) {
uint32_t value = dac_read(obj);
return (float)value * (1.0f / (float)RANGE_12BIT);
}
uint16_t analogout_read_u16(dac_t *obj) {
uint32_t value = dac_read(obj); // 12-bit
return (value << 4) | ((value >> 8) & 0x003F);
}
#endif

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/clk_freqs.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/clk_freqs.h
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@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/gpio_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/gpio_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/gpio_irq_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/gpio_irq_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

3
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/gpio_object.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/gpio_object.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -25,7 +25,6 @@ extern "C" {
typedef struct {
PinName pin;
uint32_t mask;
__IO uint32_t *reg_dir;
__IO uint32_t *reg_set;
__IO uint32_t *reg_clr;

30
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/i2c_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/i2c_api.c
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@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -19,18 +19,7 @@
#include "cmsis.h"
#include "pinmap.h"
#include "clk_freqs.h"
static const PinMap PinMap_I2C_SDA[] = {
{PTB1, I2C_0, 2},
{PTB3, I2C_0, 2},
{NC , NC , 0}
};
static const PinMap PinMap_I2C_SCL[] = {
{PTB0, I2C_0, 2},
{PTB2, I2C_0, 2},
{NC , NC, 0}
};
#include "PeripheralPins.h"
static const uint16_t ICR[0x40] = {
20, 22, 24, 26, 28,
@ -54,10 +43,16 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
MBED_ASSERT((int)obj->i2c != NC);
SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK;
MBED_ASSERT((int)obj->i2c != NC);
#if defined(TARGET_K20DX256)
switch ((int)obj->i2c) {
case I2C_0: SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
case I2C_1: SIM->SCGC4 |= SIM_SCGC4_I2C1_MASK;
}
#else
SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
#endif
// set default frequency at 100k
i2c_frequency(obj, 100000);
@ -381,4 +376,3 @@ void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
obj->i2c->A1 = address & 0xfe;
}
#endif

8
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/objects.h → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/objects.h
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -54,6 +54,12 @@ struct analogin_s {
ADCName adc;
};
#if DEVICE_ANALOGOUT
struct dac_s {
DACName dac;
};
#endif
struct i2c_s {
I2C_Type *i2c;
};

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/pinmap.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/pinmap.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/port_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/port_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

32
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/pwmout_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/pwmout_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -18,35 +18,7 @@
#include "cmsis.h"
#include "pinmap.h"
static const PinMap PinMap_PWM[] = {
// LEDs
{LED_RED , PWM_3 , 4}, // PTC3, FTM0 CH2
{LED_GREEN, PWM_5, 4}, // PTD4, FTM0 CH4
{LED_BLUE , PWM_8 , 3}, // PTA2, FTM0 CH7
// Arduino digital pinout
{D3, PWM_5 , 4}, // PTD4, FTM0 CH4
{D5, PWM_7 , 3}, // PTA1, FTM0 CH6
{D6, PWM_3 , 4}, // PTC3, FTM0 CH2
{D9, PWM_6 , 4}, // PTD5, FTM0 CH6
{D10, PWM_2 , 4}, // PTC2, FTM0 CH1
{PTA0, PWM_6 , 3}, // PTA0, FTM0 CH5
{PTA3, PWM_1 , 3}, // PTA3, FTM0 CH0
{PTA4, PWM_2 , 3}, // PTA4, FTM0 CH1
{PTA5, PWM_3 , 3}, // PTA5, FTM0 CH2
{PTA12, PWM_9 , 3}, // PTA12, FTM1 CH0
{PTA13, PWM_10, 3}, // PTA13, FTM1 CH1
{PTB0, PWM_9 , 3}, // PTB0, FTM1 CH0
{PTB1, PWM_10, 3}, // PTB1, FTM1 CH1
{PTC1, PWM_1 , 4}, // PTC1, FTM0 CH0
{PTD4, PWM_4 , 4}, // PTD4, FTM0 CH3
{PTD6, PWM_7 , 4}, // PTD6, FTM0 CH6
{PTD7, PWM_8 , 4}, // PTD7, FTM0 CH7
{NC , NC , 0}
};
#include "PeripheralPins.h"
static float pwm_clock = 0;

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/rtc_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/rtc.api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

22
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/serial_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/serial_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -21,24 +21,7 @@
#include "cmsis.h"
#include "pinmap.h"
#include "clk_freqs.h"
static const PinMap PinMap_UART_TX[] = {
{PTB17, UART_0, 3},
{PTC4 , UART_1, 3},
{PTD3 , UART_2, 3},
{PTD7 , UART_0, 3},
{PTE0 , UART_1, 3},
{NC , NC , 0}
};
static const PinMap PinMap_UART_RX[] = {
{PTB16, UART_0, 3},
{PTC3 , UART_1, 3},
{PTD2 , UART_2, 3},
{PTD6 , UART_0, 3},
{PTE1 , UART_1, 3},
{NC , NC , 0}
};
#include "PeripheralPins.h"
#define UART_NUM 3
@ -316,4 +299,3 @@ void serial_break_set(serial_t *obj) {
void serial_break_clear(serial_t *obj) {
obj->uart->C2 &= ~UART_C2_SBK_MASK;
}

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/sleep.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/sleep.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

27
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/spi_api.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/spi_api.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 ARM Limited
* Copyright (c) 2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@ -21,30 +21,7 @@
#include "cmsis.h"
#include "pinmap.h"
#include "clk_freqs.h"
static const PinMap PinMap_SPI_SCLK[] = {
{PTC5, SPI_0, 2},
{PTD1, SPI_0, 2},
{NC , NC , 0}
};
static const PinMap PinMap_SPI_MOSI[] = {
{PTD2, SPI_0, 2},
{PTC6, SPI_0, 2},
{NC , NC , 0}
};
static const PinMap PinMap_SPI_MISO[] = {
{PTD3, SPI_0, 2},
{PTC7, SPI_0, 2},
{NC , NC , 0}
};
static const PinMap PinMap_SPI_SSEL[] = {
{PTD0, SPI_0, 2},
{PTC4, SPI_0, 2},
{NC , NC , 0}
};
#include "PeripheralPins.h"
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
// determine the SPI to use

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D50M/us_ticker.c → libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20XX/us_ticker.c
View File

@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2015 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.

71
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U37H_401/PeripheralNames.h Normal file
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@ -0,0 +1,71 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)LPC_USART_BASE
} UARTName;
typedef enum {
I2C_0 = (int)LPC_I2C_BASE
} I2CName;
typedef enum {
ADC0_0 = 0,
ADC0_1,
ADC0_2,
ADC0_3,
ADC0_4,
ADC0_5,
ADC0_6,
ADC0_7
} ADCName;
typedef enum {
SPI_0 = (int)LPC_SSP0_BASE,
SPI_1 = (int)LPC_SSP1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2,
PWM_3,
PWM_4,
PWM_5,
PWM_6,
PWM_7,
PWM_8,
PWM_9,
PWM_10,
PWM_11
} PWMName;
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART UART_0
#ifdef __cplusplus
}
#endif
#endif

117
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U37H_401/PeripheralPins.c Normal file
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@ -0,0 +1,117 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{P0_11, ADC0_0, 0x02},
{P0_12, ADC0_1, 0x02},
{P0_13, ADC0_2, 0x02},
{P0_14, ADC0_3, 0x02},
{P0_15, ADC0_4, 0x02},
{P0_16, ADC0_5, 0x01},
{P0_22, ADC0_6, 0x01},
{P0_23, ADC0_7, 0x01},
{NC , NC , 0 }
};
/************I2C***************/
const PinMap PinMap_I2C_SDA[] = {
{P0_5, I2C_0, 1},
{NC , NC , 0}
};
const PinMap PinMap_I2C_SCL[] = {
{P0_4, I2C_0, 1},
{NC , NC, 0}
};
/************UART***************/
const PinMap PinMap_UART_TX[] = {
{P0_19, UART_0, 1},
{P1_13, UART_0, 3},
{P1_27, UART_0, 2},
{ NC , NC , 0}
};
const PinMap PinMap_UART_RX[] = {
{P0_18, UART_0, 1},
{P1_14, UART_0, 3},
{P1_26, UART_0, 2},
{NC , NC , 0}
};
/************SPI***************/
const PinMap PinMap_SPI_SCLK[] = {
{P0_6 , SPI_0, 0x02},
{P0_10, SPI_0, 0x02},
{P1_29, SPI_0, 0x01},
{P1_15, SPI_1, 0x03},
{P1_20, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MOSI[] = {
{P0_9 , SPI_0, 0x01},
{P0_21, SPI_1, 0x02},
{P1_22, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_MISO[] = {
{P0_8 , SPI_0, 0x01},
{P0_22, SPI_1, 0x03},
{P1_21, SPI_1, 0x02},
{NC , NC , 0}
};
const PinMap PinMap_SPI_SSEL[] = {
{P0_2 , SPI_0, 0x01},
{P1_19, SPI_1, 0x02},
{P1_23, SPI_1, 0x02},
{NC , NC , 0}
};
/************PWM***************/
/* To have a PWM where we can change both the period and the duty cycle,
* we need an entire timer. With the following conventions:
* * MR3 is used for the PWM period
* * MR0, MR1, MR2 are used for the duty cycle
*/
const PinMap PinMap_PWM[] = {
/* CT16B0 */
{P0_8 , PWM_1, 2}, {P1_13, PWM_1, 2}, /* MR0 */
{P0_9 , PWM_2, 2}, {P1_14, PWM_2, 2}, /* MR1 */
{P0_10, PWM_3, 3}, {P1_15, PWM_3, 2}, /* MR2 */
/* CT16B1 */
{P0_21, PWM_4, 1}, /* MR0 */
{P0_22, PWM_5, 2}, {P1_23, PWM_5, 1}, /* MR1 */
/* CT32B0 */
{P0_18, PWM_6, 2}, {P1_24, PWM_6, 1}, /* MR0 */
{P0_19, PWM_7, 2}, {P1_25, PWM_7, 1}, /* MR1 */
{P0_1 , PWM_8, 2}, {P1_26, PWM_8, 1}, /* MR2 */
/* CT32B1 */
{P0_13, PWM_9 , 3}, {P1_0, PWM_9 , 1}, /* MR0 */
{P0_14, PWM_10, 3}, {P1_1, PWM_10, 1}, /* MR1 */
{P0_15, PWM_11, 3}, {P1_2, PWM_11, 1}, /* MR2 */
{NC, NC, 0}
};

170
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U37H_401/PinNames.h Normal file
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@ -0,0 +1,170 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 5
typedef enum {
// LPC11U Pin Names
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P1_0 = 32,
P1_1 = 33,
P1_2 = 34,
P1_3 = 35,
P1_4 = 36,
P1_5 = 37,
P1_6 = 38,
P1_7 = 39,
P1_8 = 40,
P1_9 = 41,
P1_10 = 42,
P1_11 = 43,
P1_12 = 44,
P1_13 = 45,
P1_14 = 46,
P1_15 = 47,
P1_16 = 48,
P1_17 = 49,
P1_18 = 50,
P1_19 = 51,
P1_20 = 52,
P1_21 = 53,
P1_22 = 54,
P1_23 = 55,
P1_24 = 56,
P1_25 = 57,
P1_26 = 58,
P1_27 = 59,
P1_28 = 60,
P1_29 = 61,
P1_31 = 63,
// LED Names
LED1 = P1_24,
LED2 = P1_25,
LED3 = P1_26,
LED4 = P0_0,
LED5 = P1_3,
LED6 = P1_2,
LED7 = P1_1,
LED8 = P1_0,
// BTN Names
BTN1 = P0_16,
BTN2 = P0_1,
// UART
UART_TX = P0_19,
UART_RX = P0_18,
// Arduino Shield Receptacles Names
D0 = P0_18,
D1 = P0_19,
D2 = P1_17,
D3 = P1_24,
D4 = P1_5,
D5 = P0_1,
D6 = P1_27,
D7 = P0_7,
D8 = P0_2,
D9 = P1_25,
D10= P1_23,
D11= P0_21,
D12= P0_22,
D13= P1_15,
D14= P0_5,
D15= P0_4,
A0 = P0_11,
A1 = P0_12,
A2 = P0_13,
A3 = P0_16,
A4 = P0_5, // same port as SDA
A5 = P0_4, // same port as SCL
SDA= P0_5, // same port as A4
SCL= P0_4, // same port as A5
// Not connected
NC = (int)0xFFFFFFFF,
} PinName;
typedef enum {
CHANNEL0 = FLEX_INT0_IRQn,
CHANNEL1 = FLEX_INT1_IRQn,
CHANNEL2 = FLEX_INT2_IRQn,
CHANNEL3 = FLEX_INT3_IRQn,
CHANNEL4 = FLEX_INT4_IRQn,
CHANNEL5 = FLEX_INT5_IRQn,
CHANNEL6 = FLEX_INT6_IRQn,
CHANNEL7 = FLEX_INT7_IRQn
} Channel;
typedef enum {
PullUp = 2,
PullDown = 1,
PullNone = 0,
Repeater = 3,
OpenDrain = 4,
PullDefault = PullDown
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

59
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U37H_401/device.h Normal file
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@ -0,0 +1,59 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 1
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_CAN 0
#define DEVICE_RTC 0
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 32
#define DEVICE_MAC_OFFSET 20
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 1
#include "objects.h"
#endif

8
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PinNames.h
View File

@ -78,7 +78,7 @@ typedef enum {
P3_5 = (3 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x48,
// mbed DIP Pin Names (CQ board)
p4 = P0_0,
// p4 = P0_0,
p5 = P0_9,
p6 = P0_8,
p7 = P0_6,
@ -114,7 +114,7 @@ typedef enum {
USBRX = P1_6,
// mbed DIP Pin Names (LPCXpresso LPC1114)
xp4 = P0_0,
// xp4 = P0_0,
xp5 = P0_9,
xp6 = P0_8,
xp7 = P2_11,
@ -173,7 +173,7 @@ typedef enum {
dp16 = P1_7,
dp17 = P1_8,
dp18 = P1_9,
dp23 = P0_0,
// dp23 = P0_0,
dp24 = P0_1,
dp25 = P0_2,
dp26 = P0_3,
@ -194,7 +194,7 @@ typedef enum {
dip16 = P1_7,
dip17 = P1_8,
dip18 = P1_9,
dip23 = P0_0,
// dip23 = P0_0,
dip24 = P0_1,
dip25 = P0_2,
dip26 = P0_3,

2
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/PeripheralNames.h
View File

@ -30,7 +30,7 @@ extern "C" {
#define MBED_UART0 P0_7, P0_18
#define MBED_UARTUSB USBTX, USBRX
#define MBED_I2C0 P0_10, P0_11
#define MBED_I2C0 P0_11, P0_10
typedef enum {
ADC_0 = 0,

8
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/PinNames.h
View File

@ -102,10 +102,10 @@ typedef enum {
USBRX = P0_18,
// I2C pins
SDA = P0_10,
SCL = P0_11,
I2C_SDA = P0_10,
I2C_SCL = P0_11,
SCL = P0_10,
SDA = P0_11,
I2C_SCL = P0_10,
I2C_SDA = P0_11,
// Not connected
NC = (int)0xFFFFFFFF,

2
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/PeripheralNames.h
View File

@ -30,7 +30,7 @@ extern "C" {
#define MBED_UART0 P0_7, P0_18
#define MBED_UARTUSB USBTX, USBRX
#define MBED_I2C0 P0_10, P0_11
#define MBED_I2C0 P0_11, P0_10
typedef enum {
ADC_0 = 0,

8
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/PinNames.h
View File

@ -102,10 +102,10 @@ typedef enum {
USBRX = P0_18,
// I2C pins
SDA = P0_10,
SCL = P0_11,
I2C_SDA = P0_10,
I2C_SCL = P0_11,
SCL = P0_10,
SDA = P0_11,
I2C_SCL = P0_10,
I2C_SDA = P0_11,
// Not connected
NC = (int)0xFFFFFFFF,

1
workspace_tools/build_release.py
View File

@ -52,6 +52,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('K64F', ('ARM', 'GCC_ARM', 'IAR')),
('K22F', ('ARM', 'GCC_ARM', 'IAR')),
('K20D50M', ('ARM', 'GCC_ARM' , 'IAR')),
('TEENSY3_1', ('ARM', 'GCC_ARM')),
('NUCLEO_F030R8', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),
('NUCLEO_F070RB', ('ARM', 'uARM', 'IAR', 'GCC_ARM')),

1
workspace_tools/build_travis.py
View File

@ -63,6 +63,7 @@ build_list = (
{ "target": "KL43Z", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
{ "target": "KL46Z", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
{ "target": "K20D50M", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
{ "target": "TEENSY3_1", "toolchains": "GCC_ARM", "libs": ["dsp", "fat"] },
{ "target": "K64F", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
{ "target": "LPC4088", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb", "fat"] },
{ "target": "ARCH_PRO", "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "fat"] },

2
workspace_tools/export/__init__.py Normal file → Executable file
View File

@ -84,6 +84,8 @@ def export(project_path, project_name, ide, target, destination='/tmp/',
zip_path = None
if report['success']:
# add readme file to every offline export.
open(tempdir+"\\README.html",'w').write('<meta http-equiv="refresh" content="0; url=http://developer.mbed.org/handbook/ExportToOfflineToolchain#%s#%s"/>'% (target,ide))
zip_path = zip_working_directory_and_clean_up(tempdir, destination, project_name, clean)
return zip_path, report

1
workspace_tools/export/codered.py
View File

@ -35,6 +35,7 @@ class CodeRed(Exporter):
'LPC11U68',
'LPCCAPPUCCINO',
'LPC824',
'LPC11U37H_401',
]
def generate(self):

1901
workspace_tools/export/codered_lpc11u37h_401_cproject.tmpl Normal file
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