diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/PDL_Version.txt b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/PDL_Version.txt new file mode 100644 index 0000000000..9cac515901 --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/PDL_Version.txt @@ -0,0 +1,2 @@ +version 3.0.1 + diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/README.md b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/README.md new file mode 100644 index 0000000000..c1a197bfb5 --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/README.md @@ -0,0 +1,5 @@ +README for Cypress Peripheral Driver Library +============================================ + +This folder tree contains parts (binary-only libraries and M0/M4 core specific files) of Cypress Peripheral Driver Library (PDL) necessary to support PSoC 6 MCUs. Library names have been changed (vs. standard PDL version) by prepending a "lib" prefix to fit Mbed OS build system conventions. +See [Cypress PDL page](http://www.cypress.com/documentation/software-and-drivers/peripheral-driver-library-pdl) for details. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct index c8f7b9ce39..603c453ebd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm0plus.sct @@ -27,9 +27,7 @@ ;******************************************************************************* ;* \copyright ;* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -;* You may use this file only in accordance with the license, terms, conditions, -;* disclaimers, and limitations in the end user license agreement accompanying -;* the software package with which this file was provided. +;* SPDX-License-Identifier: Apache-2.0 ;******************************************************************************/ ; The defines below describe the location and size of blocks of memory in the target. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_ipc_cm0p.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_ipc_cm0p.a deleted file mode 100644 index b0c8897b2f..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_ipc_cm0p.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_uart_cm0p.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_uart_cm0p.a deleted file mode 100644 index e3cd51295d..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_controller_uart_cm0p.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_radio_max_cm0p.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_radio_max_cm0p.a deleted file mode 100644 index e81e485fa2..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_ble_stack_mdk_radio_max_cm0p.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_client_mdk.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_client_mdk.a deleted file mode 100644 index fcddb074cd..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_client_mdk.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_base.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_base.a deleted file mode 100644 index 84ba700e4c..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_base.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_extra.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_extra.a deleted file mode 100644 index efa12e0d30..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/libcy_crypto_server_mdk_extra.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm0plus.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm0plus.s rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm0plus.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld index 2148edf235..d7a54e4af2 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld @@ -20,9 +20,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_client_gcc.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_client_gcc.a deleted file mode 100644 index 26c4932cab..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_client_gcc.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_base.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_base.a deleted file mode 100644 index 67d15827cc..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_base.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_extra.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_extra.a deleted file mode 100644 index 90564cb875..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_GCC_ARM/libcy_crypto_server_gcc_extra.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf index 36c45e1a77..f37c1d9718 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf @@ -20,9 +20,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /*###ICF### Section handled by ICF editor, don't touch! ****/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_client_mdk.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_client_mdk.a deleted file mode 100644 index fcddb074cd..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_client_mdk.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_base.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_base.a deleted file mode 100644 index 84ba700e4c..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_base.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_extra.a b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_extra.a deleted file mode 100644 index efa12e0d30..0000000000 Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/libcy_crypto_server_mdk_extra.a and /dev/null differ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/startup_psoc63_cm0plus.s b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/startup_psoc63_cm0plus.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/startup_psoc63_cm0plus.s rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/startup_psoc63_cm0plus.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/system_psoc63_cm0plus.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/system_psoc63_cm0plus.c index 83827354d4..ee1d0b227f 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/system_psoc63_cm0plus.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/system_psoc63_cm0plus.c @@ -7,13 +7,9 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Future Electronics +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ -/* - * Copyright (c) 20017-2018 Future Electronics - */ #include #include diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/PDL_Version.txt b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/PDL_Version.txt new file mode 100644 index 0000000000..9cac515901 --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/PDL_Version.txt @@ -0,0 +1,2 @@ +version 3.0.1 + diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/README.md b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/README.md new file mode 100644 index 0000000000..c1a197bfb5 --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/README.md @@ -0,0 +1,5 @@ +README for Cypress Peripheral Driver Library +============================================ + +This folder tree contains parts (binary-only libraries and M0/M4 core specific files) of Cypress Peripheral Driver Library (PDL) necessary to support PSoC 6 MCUs. Library names have been changed (vs. standard PDL version) by prepending a "lib" prefix to fit Mbed OS build system conventions. +See [Cypress PDL page](http://www.cypress.com/documentation/software-and-drivers/peripheral-driver-library-pdl) for details. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct index ee145fb075..5316a1df7e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/cy8c6xx7_cm4_dual.sct @@ -27,9 +27,7 @@ ;******************************************************************************* ;* \copyright ;* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -;* You may use this file only in accordance with the license, terms, conditions, -;* disclaimers, and limitations in the end user license agreement accompanying -;* the software package with which this file was provided. +;* SPDX-License-Identifier: Apache-2.0 ;******************************************************************************/ ; The defines below describe the location and size of blocks of memory in the target. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm4.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm4.s rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_ARM_STD/startup_psoc63_cm4.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld index 1934071efc..0ecc9d77ce 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld @@ -20,9 +20,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf index 2e5cc5f697..02c7e76ee0 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf @@ -20,9 +20,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /*###ICF### Section handled by ICF editor, don't touch! ****/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/startup_psoc63_cm4.s b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/startup_psoc63_cm4.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/startup_psoc63_cm4.s rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/startup_psoc63_cm4.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/LICENSE.txt b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/LICENSE.txt similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/LICENSE.txt rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/LICENSE.txt diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/README.md b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/README.md similarity index 99% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/README.md rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/README.md index d80040cb33..abd8627062 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/README.md +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/README.md @@ -2,6 +2,7 @@ README for pre-compiled PSoC 6 Cortex M0+ core images ===================================================== This folder contains precompiled program images for the CM0+ core of the PSoC 6(63xx) MCU suitable for use with MBed OS applications running on CM4 core. Two images are available: + * `psoc63_m0_default_1.01.hex` This image contains basic code, that brings up the chip, starts CM4 core and puts CM0+ core into a deep sleep. It is suitable for use with all Mbed applications except those intendif to use BLE feature. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/psoc63_m0_ble_controller_1.01.hex b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/psoc63_m0_ble_controller_1.01.hex similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/psoc63_m0_ble_controller_1.01.hex rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/psoc63_m0_ble_controller_1.01.hex diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/psoc63_m0_default_1.01.hex b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/psoc63_m0_default_1.01.hex similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/hex/psoc63_m0_default_1.01.hex rename to targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/hex/psoc63_m0_default_1.01.hex diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/system_psoc63_cm4.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/system_psoc63_cm4.c index a8eee164b9..384c287f5a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/system_psoc63_cm4.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/system_psoc63_cm4.c @@ -7,13 +7,9 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Future Electronics +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ -/* - * Copyright (c) 20017-2018 Future Electronics - */ #include #include diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cmsis.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cmsis.h index 6973d9a1a1..6a55fa317e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cmsis.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cmsis.h @@ -1,32 +1,18 @@ /* mbed Microcontroller Library * A generic CMSIS include header - ******************************************************************************* - * Copyright (c) XXX - * All rights reserved. + * Copyright (c) 2017-2018 Future Electronics * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of ARM nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. + * http://www.apache.org/licenses/LICENSE-2.0 * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. */ #ifndef MBED_CMSIS_H diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy8c6347bzi_bld53.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy8c6347bzi_bld53.h index cb6e526f1d..13745170e8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy8c6347bzi_bld53.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy8c6347bzi_bld53.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CY8C6347BZI_BLD53_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_device_headers.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_device_headers.h index 985411da79..7225333329 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_device_headers.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_device_headers.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CY_DEVICE_HEADERS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.c index 6d7bca1687..1394c20dbe 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.c @@ -9,9 +9,7 @@ * ******************************************************************************** * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "ipc/cy_ipc_drv.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.h index 67edd79ae1..0dc321858a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cy_ipc_config.h @@ -8,10 +8,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef CY_IPC_CONFIG_H diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cymetadata.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cymetadata.c index 9d1538e803..ca605b521a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cymetadata.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/cymetadata.c @@ -8,10 +8,8 @@ * This file is automatically generated by PSoC Creator. * ******************************************************************************** -* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2007-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 ********************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/gpio_psoc63_116_bga_ble.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/gpio_psoc63_116_bga_ble.h index f6afee5360..296018caf2 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/gpio_psoc63_116_bga_ble.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/gpio_psoc63_116_bga_ble.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _GPIO_PSOC63_116_BGA_BLE_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/psoc63_config.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/psoc63_config.h index c860dfc139..f166c7e62d 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/psoc63_config.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/psoc63_config.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _PSOC63_CONFIG_H_ @@ -84,10 +82,10 @@ typedef enum } en_clk_dst_t; /* Trigger Group */ -/* This section contains the enums related to the Trigger multiplexer (TrigMux) driver. +/* This section contains the enums related to the Trigger multiplexer (TrigMux) driver. * The constants are divided into four types because each signal of the TrigMux driver has a path -* through two multiplexers: the reduction multiplexer and the distribution multiplexer. This -* requires two calls for Cy_TrigMux_Connect() function. The first call - for the reduction +* through two multiplexers: the reduction multiplexer and the distribution multiplexer. This +* requires two calls for Cy_TrigMux_Connect() function. The first call - for the reduction * multiplexer, the second call - for the distribution multiplexer. * * The four types of inputs/output parameters: @@ -96,7 +94,7 @@ typedef enum * 3) Parameters for distribution multiplexer's inputs (intermediate signals); * 4) Parameters for distribution multiplexer's outputs (output signals of TrigMux). * -* The Cy_TrigMux_Connect() inTrig parameter can have 1) and 3) types parameters. The outTrig +* The Cy_TrigMux_Connect() inTrig parameter can have 1) and 3) types parameters. The outTrig * parameter can have 2) and 4) types parameters. * The names of the constants for these parameters have the following format: * @@ -108,7 +106,7 @@ typedef enum * * Example: * TRIG11_IN_TCPWM0_TR_OVERFLOW3 - the TCPWM0 tr_overflow[3] input of reduction multiplexer#11. -* +* * 2) For reduction multiplexer's outputs: * TRIG_OUT_TR_GROUP_INPUT * - the reduction multiplexer number; @@ -116,7 +114,7 @@ typedef enum * - the input number of the distribution multiplexer. * * Example: -* TRIG11_OUT_TR_GROUP0_INPUT23 - Input#23 of the distribution multiplexer#0 is the destination +* TRIG11_OUT_TR_GROUP0_INPUT23 - Input#23 of the distribution multiplexer#0 is the destination * of the reduction multiplexer#11. * * 3) For distribution multiplexer's inputs: @@ -126,9 +124,9 @@ typedef enum * - the output number of the reduction multiplexer; * * Example: -* TRIG0_IN_TR_GROUP11_OUTPUT15 - Output#15 of the reduction multiplexer#11 is the source of the +* TRIG0_IN_TR_GROUP11_OUTPUT15 - Output#15 of the reduction multiplexer#11 is the source of the * distribution multiplexer#0. -* +* * 4) For distribution multiplexer's outputs: * TRIG_OUT_ * - the distribution multiplexer number; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/system_psoc63.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/system_psoc63.h index 42fa1534a0..98b31f45ba 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/system_psoc63.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8C63XX/device/system_psoc63.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_FUTURE_SEQUANA/TARGET_FUTURE_SEQUANA_M0/board_config.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_FUTURE_SEQUANA/TARGET_FUTURE_SEQUANA_M0/board_config.c index 9fe122ed6c..6570356cfb 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_FUTURE_SEQUANA/TARGET_FUTURE_SEQUANA_M0/board_config.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_FUTURE_SEQUANA/TARGET_FUTURE_SEQUANA_M0/board_config.c @@ -1,6 +1,6 @@ /******************************************************************************* -* File Name: cyfitter_cfg.c +* File Name: board_config.c (formerly cyfitter_cfg.c) * * PSoC Creator 4.2 * @@ -10,14 +10,10 @@ * This file is automatically generated by PSoC Creator. * ******************************************************************************** -* Copyright (c) 2007-2017 Cypress Semiconductor. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2007-2018, Cypress Semiconductor Corporation. All rights reserved. +* Copyright 2017-2018, Future Electronics +* SPDX-License-Identifier: Apache-2.0 ********************************************************************************/ -/* - * Copyright (c) 20017-2018 Future Electronics - */ #include #include "device.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/PDL_Version.txt b/targets/TARGET_Cypress/TARGET_PSOC6/device/PDL_Version.txt new file mode 100644 index 0000000000..9cac515901 --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/PDL_Version.txt @@ -0,0 +1,2 @@ +version 3.0.1 + diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/README.md b/targets/TARGET_Cypress/TARGET_PSOC6/device/README.md new file mode 100644 index 0000000000..9d2b3a0bdc --- /dev/null +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/README.md @@ -0,0 +1,4 @@ +README for Cypress Peripheral Driver Library +============================================ + +This folder tree contains parts of Cypress Peripheral Driver Library (PDL) necessary to support PSoC 6 MCUs. See [Cypress PDL page](http://www.cypress.com/documentation/software-and-drivers/peripheral-driver-library-pdl) for details. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto.h deleted file mode 100644 index cd67ac7ff6..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto.h +++ /dev/null @@ -1,1705 +0,0 @@ -/***************************************************************************//** -* \file cy_crypto.h -* \version 2.0 -* -* \brief -* This file provides the public interface for the Crypto driver. -* -******************************************************************************** -* \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -/** -* \defgroup group_crypto Cryptography (Crypto) -* \{ -* The Crypto driver provides a public API to perform cryptographic and hash -* operations, as well as generate both true and pseudo random numbers -* (TRNG, PRNG). It uses a hardware IP block to accelerate operations. The driver -* supports these standards: DES, TDES, AES (128, 192, 256 bits), CMAC-AES, SHA, -* HMAC, PRNG, TRNG, CRC, and RSA. -* -* This document contains the following topics: -* - \ref group_crypto_overview -* - \ref group_crypto_configuration_considerations -* - \ref group_crypto_server_init -* - \ref group_crypto_client_init -* - \ref group_crypto_irq_implements -* - \ref group_crypto_rsa_considerations -* - \ref group_crypto_definitions -* - \ref group_crypto_more_information -* -* \section group_crypto_overview Overview -* The Crypto driver uses a client-server architecture. -* -* Firmware initializes and starts the Crypto server. The server can run on -* either core and works with the Crypto hardware. The Crypto server is -* implemented as a secure block. It performs all cryptographic operations for -* the client. Access to the server is through the Inter Process Communication -* (IPC) driver. Direct access is not allowed. -* -* The Crypto client can run on either core too. Firmware initializes and starts -* the client. The firmware then provides the configuration data required for the -* desired cryptographic technique, and requests that the server run the -* cryptographic operation. -* -* \image html crypto_architecture.png -* -* Firmware sets up a cryptographic operation using configuration structures, or -* by passing in required data as parameters in function calls. -* -* Most Crypto functions require one or more contexts. A context is a data -* structure that the driver uses for its operations. Firmware declares the -* context (allocates memory) but does not write or read the values in the -* context. In effect the context is a scratch pad you provide to the driver. -* The driver uses the context to store and manipulate data during cryptographic -* operations. -* -* There is a common context shared by all cryptographic methods. Several methods -* require an additional context unique to the particular cryptographic technique. -* The Crypto driver header files declare all the required structures for both -* configuration and context. -* -* IPC communication between the client and server is completely transparent. -* Default PDL source files configure the IPC channel. Using IPC for communication -* provides a simple synchronization mechanism to handle concurrent requests from -* different cores. -* -* The Crypto driver (both client and server) is provided as compiled binary -* libraries, not as source code. Header files define the API and required data -* structures. -* -* The Crypto driver uses: -* - One IPC channel for data exchange between client and server -* - Three interrupts: an IPC notify interrupt, an IPC release interrupt, -* and an interrupt for error handling -* -* The \ref group_crypto_definitions section provides more information on cryptographic terms of -* art, and the particular supported encryption standards. -* -* \section group_crypto_configuration_considerations Configuration Considerations -* -* IPC communication for the Crypto driver is handled transparently. The -* cy_crytpo_config files set up the IPC channel, and configure the required -* notify, release, and error interrupts. -* -* Initialization routines \ref Cy_Crypto_Server_Start (server) and -* \ref Cy_Crypto_Init (client) use separate instances of the same -* cy_stc_crypto_config_t configuration structure. Some fields should be the same, -* and some are set specifically by either the server or client. See the -* cy_crypto_config files for the default implementation. The table lists each -* field in the config structure, which initialization routine sets the value, -* and the default MACRO that defines the value. -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -*
FieldWhichMACRO / FunctionNotes
\link cy_stc_crypto_config_t::ipcChannel ipcChannel\endlinkServer and ClientCY_IPC_CHAN_CRYPTOIPC Channel, same for both
\link cy_stc_crypto_config_t::acquireNotifierChannel acquireNotifierChannel\endlinkServer and ClientCY_CRYPTO_IPC_INTR_NOTIFY_NUMNotify interrupt number, same for both
\link cy_stc_crypto_config_t::releaseNotifierChannel releaseNotifierChannel\endlinkServer and ClientCY_CRYPTO_IPC_INTR_RELEASE_NUMRelease interrupt number, same for both
\link cy_stc_crypto_config_t::userCompleteCallback userCompleteCallback\endlinkClientUser-defined callback for the Release interrupt handler; can be NULLSee Implementing Crypto Interrupts
\link cy_stc_crypto_config_t::releaseNotifierConfig releaseNotifierConfig \endlinkClientSource: CY_CRYPTO_IPC_INTR_RELEASE_NUM; Priority: \ref CY_CRYPTO_RELEASE_INTR_PRconfiguration for the interrupt
\link cy_stc_crypto_config_t::userGetDataHandler userGetDataHandler\endlinkServerUser-defined function to override default interrupt handler; NULL = use defaultISR for the Notify interrupt
\link cy_stc_crypto_config_t::acquireNotifierConfig acquireNotifierConfig\endlinkServerSource: \ref CY_CRYPTO_CM0_NOTIFY_INTR_NR; Priority: \ref CY_CRYPTO_NOTIFY_INTR_PRconfiguration for the interrupt
\link cy_stc_crypto_config_t::userErrorHandler userErrorHandler\endlinkServerUser-defined function to override default interrupt handler; NULL = use defaultISR for a server error
\link cy_stc_crypto_config_t::cryptoErrorIntrConfig cryptoErrorIntrConfig\endlinkServerSource: \ref CY_CRYPTO_CM0_ERROR_INTR_NR; Priority: \ref CY_CRYPTO_ERROR_INTR_PRconfiguration for the interrupt
-* -* On the CM0+, the notify, release and error interrupts are assigned to -* NVIC IRQn 2, 30, 31 respectively. Do not modify these values. -* See System Interrupt (SysInt) for background on CM0+ interrupts. -* -* \section group_crypto_server_init Server Initialization -* -* Use \ref Cy_Crypto_Server_Start. -* Provide the configuration parameters (cy_stc_crypto_config_t) and a pointer -* to the server context (cy_stc_crypto_server_context_t). -* Do not fill in the values for the context structure. -* -* Because the two cores operate asynchronously, ensure that server -* initialization is complete before initializing the client. -* There are several ways to do this: -* -* - Use \ref Cy_Crypto_Sync as a blocking call, before initializing the client. -* - Enable the CM4 core (\ref Cy_SysEnableCM4) after -* \ref Cy_Crypto_Server_Start executes successfully. -* - Check the return status from calls to \ref Cy_Crypto_Init or -* \ref Cy_Crypto_Enable to ensure \ref CY_CRYPTO_SUCCESS. -* -* All crypto operations are asynchronous. To ensure that any crypto operation -* is complete and the result is valid, use \ref Cy_Crypto_Sync. -* Use the \ref CY_CRYPTO_SYNC_NON_BLOCKING parameter to check status. -* Use \ref CY_CRYPTO_SYNC_BLOCKING to wait for the operation to complete. -* -* \section group_crypto_client_init Client initialization -* -* Use \ref Cy_Crypto_Init to initialize the Crypto client with the configuration -* parameters (cy_stc_crypto_config_t) and a pointer to the context -* (cy_stc_crypto_context_t). Do not fill in the values for the context structure. -* -* Then call \ref Cy_Crypto_Enable to enable the Crypto hardware IP block. -* After this, the Crypto driver is ready to execute crypto functions. -* These calls must be made on the client side. -* Firmware can implement the client on either core. -* -* Some encryption techniques require additional initialization specific to the -* technique. If there is an Init function, you must call it before using any -* other function for that technique, and reinitialize after you use a different -* encryption technique. -* -* For example, use \ref Cy_Crypto_Aes_Init to configure an AES encryption -* operation with the encryption key, and key length. -* Provide pointers to two context structures. You can then call AES Run functions. -* If later on you use DES, you must re-initialize AES encryption before using -* it again. -* -* See the documentation for details about each Cy_Crypto_XXX_Init function. -* -* \section group_crypto_irq_implements Implementing Crypto Interrupts -* -* The Crypto driver uses three interrupts: -* - A notify interrupt when data is ready for a cryptographic operation -* - A release interrupt when a cryptographic operation is complete -* - An error interrupt if the server encounters a hardware error -* -* You can modify default behavior for each interrupt. -* -* Notify Interrupt: the Crypto server has a default ISR to handle this -* interrupt, \ref Cy_Crypto_Server_GetDataHandler. The default ISR clears the -* interrupt, retrieves the data from the IPC channel, and dispatches control to -* the desired cryptographic operation. -* -* To use the default handler, set the \link -* cy_stc_crypto_config_t::userGetDataHandler userGetDataHandler \endlink field -* of the cy_stc_crypto_config_t structure to NULL. To override, populate this -* field with your ISR. Then call \ref Cy_Crypto_Server_Start. -* Your ISR can perform additional tasks required by your application logic, -* but must also call \ref Cy_Crypto_Server_GetDataHandler to dispatch the data -* to the correct cryptographic operation. -* -* Release Interrupt: The Crypto driver includes a handler for this -* interrupt. The interrupt handler clears the interrupt and calls a user-provided -* callback routine. You cannot override this interrupt handler. -* By default the interrupt is disabled. -* -* To use default behavior (interrupt disabled), set the \link -* cy_stc_crypto_config_t::userCompleteCallback userCompleteCallback \endlink -* field of the cy_stc_crypto_config_t structure to NULL. -* To enable the interrupt, populate this field with your callback function. -* Then call \ref Cy_Crypto_Init. If the callback function is not NULL, the Init -* function enables the interrupt, and default behavior calls your routine. -* -* When performing cryptographic operations, firmware must ensure the operation -* is complete before acting on the results. If the release interrupt is disabled, -* typically calls to \ref Cy_Crypto_Sync should be blocking. If the interrupt is -* enabled, your callback function is called when the operation is complete. -* This lets you avoid blocking calls to \ref Cy_Crypto_Sync. -* -* Error Interrupt: The Crypto server has a default ISR to handle this -* interrupt. It clears the interrupt and sets an internal flag that an error -* has occurred. -* -* To use the default handler, set the userErrorHandler field of the -* cy_stc_crypto_config_t structure to NULL. To override, populate this field -* with your ISR. Then call \ref Cy_Crypto_Server_Start. -* -* Your ISR must call \ref Cy_Crypto_Server_ErrorHandler, and can perform any -* additional tasks required by your application logic. -* -* \section group_crypto_rsa_considerations RSA Usage Considerations -* -* General RSA encryption and decryption is supported. -* \ref Cy_Crypto_Rsa_Proc encrypts or decrypts data based on the parameters -* passed to the function. If you pass in plain text and a public key, the output -* is encrypted (cipher text). If you pass in cipher text and a private key, the -* output is decrypted (plain text). -* -* One parameter for this function call is a structure that defines the key: -* cy_stc_crypto_rsa_pub_key_t. The four modulus and exponent fields are -* mandatory, and represent the data for either the public or private key as -* appropriate. -* -* \note The modulus and exponent values in the -* \ref cy_stc_crypto_rsa_pub_key_t must be in little-endian order.
-* Use the \ref Cy_Crypto_Rsa_InvertEndianness function to convert to or from -* little-endian order. -* -* The remaining fields represent three pre-calculated coefficients that can -* reduce execution time by up to 5x. The fields are: coefficient for Barrett -* reduction, binary inverse of the modulus, and the result of -* (2^moduloLength mod modulo). These fields are optional, and can be set to NULL. -* -* Calculate these coefficients with \ref Cy_Crypto_Rsa_CalcCoefs. -* Pass in the address of the key structure with the modulus and exponent values -* for the key. The function returns the coefficients for the key in the key -* structure, replacing any previous values. -* -* The RSA functionality also implements functions to decrypt a signature using -* a public key. This signature must follow the RSASSA-PKCS-v1_5 standard. -* The signature must contain a SHA digest (hash). -* MD2, MD4, and MD5 message digests are not supported. -* -* An encrypted signature is stored as big-endian data. It must be inverted for -* RSA processing. To use the provided signature decryption, firmware must -* -# Calculate the SHA digest of the data to be verified with -* \ref Cy_Crypto_Sha_Run. -* -# Ensure that the RSA signature is in little-endian format. -* Use \ref Cy_Crypto_Rsa_InvertEndianness. -* -# Decrypt the RSA signature with a public key, by calling -* \ref Cy_Crypto_Rsa_Proc. -* -# Invert the byte order of the output, to return to big-endian format. -* Use \ref Cy_Crypto_Rsa_InvertEndianness. -* -# Call \ref Cy_Crypto_Rsa_Verify (which requires data in big-endian format). -* -* \section group_crypto_definitions Definitions -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -*
TermDefinition
PlaintextAn unencrypted message
CiphertextAn encrypted message
Block CipherAn encryption function for fixed-size blocks of data. -* This function takes a fixed-size key and a block of plaintext data from -* the message and encrypts it to generate ciphertext. Block ciphers are -* reversible. The function performed on a block of encrypted data will -* decrypt it.
Block Cipher ModeA mode of encrypting a message using block ciphers for messages of -* arbitrary length. The message is padded so that its length is an integer -* multiple of the block size. ECB (Electronic Code Book), CBC (Cipher Block -* Chaining), and CFB (Cipher Feedback) are all modes of using block ciphers -* to create an encrypted message of arbitrary length.
Data Encryption Standard (DES)Is a symmetric-key algorithm for the encryption of electronic data. -* It uses a 56-bit key and a 64-bit message block size.
Triple DES (3DES or TDES)Is a symmetric-key block cipher, which applies the Data Encryption -* Standard (DES) cipher algorithm three times to each data block. -* It uses three 56-bit keys. The block size is 64-bits.
Advanced Encryption Standard (AES)The standard specifies the Rijndael algorithm, a symmetric block -* cipher that can process data blocks of 128 bits, using cipher keys with -* lengths of 128, 192, and 256 bits. Rijndael was designed to handle -* additional block sizes and key lengths, however they are not adopted in -* this standard. AES is also used for message authentication.
Cipher-based Message Authentication Code (CMAC)This is a block cipher-based message authentication code algorithm. -* It computes the MAC value using the AES block cipher algorithm.
Secure Hash Algorithm (SHA)Is a cryptographic hash function. -* This function takes a message of the arbitrary length and reduces it to a -* fixed-length residue or message digest after performing a series of -* mathematically defined operations that practically guarantee that any -* change in the message will change the hash value. It is used for message -* authentication by transmitting a message with a hash value appended to it -* and recalculating the message hash value using the same algorithm at the -* recipient's end. If the hashes differ, then the message is corrupted.
Message Authentication Code (MAC)MACs are used to verify that a received message has not been altered. -* This is done by first computing a MAC value at the sender's end and -* appending it to the transmitted message. When the message is received, -* the MAC is computed again and checked against the MAC value transmitted -* with the message. If they do not match, the message has been altered. -* Either a Hash algorithm (such as SHA) or a block cipher (such as AES) can -* be used to produce the MAC value. Keyed MAC schemes use a Secret Key -* along with the message, thus the Key value must be known to be able to -* compute the MAC value.
Hash Message Authentication Code (HMAC)Is a specific type of message authentication code (MAC) involving a -* cryptographic hash function and a secret cryptographic key. -* It computes the MAC value using a Hash algorithm.
Pseudo Random Number Generator (PRNG)Is a Linear Feedback Shift Registers-based algorithm for generating a -* sequence of numbers starting from a non-zero seed.
True Random Number Generator (TRNG)A block that generates a number that is statistically random and based -* on some physical random variation. The number cannot be duplicated by -* running the process again.
Symmetric Key CryptographyUses a common, known key to encrypt and decrypt messages (a shared -* secret between sender and receiver). An efficient method used for -* encrypting and decrypting messages after the authenticity of the other -* party has been established. DES (now obsolete), 3DES, and AES (currently -* used) are well-known symmetric cryptography methods.
Asymmetric Key CryptographyAlso referred to as Public Key encryption. Someone who wishes to -* receive a message, publishes a very large public key (up to 4096 bits -* currently), which is one of two prime factors of a very large number. The -* other prime factor is the private key of the recipient and a secret. -* Someone wishing to send a message to the publisher of the public key -* encrypts the message with the public key. This message can now be -* decrypted only with the private key (the other prime factor held secret by -* the recipient). The message is now sent over any channel to the recipient -* who can decrypt it with the private, secret, key. The same process is used -* to send messages to the sender of the original message. The asymmetric -* cryptography relies on the mathematical impracticality (usually related to -* the processing power available at any given time) of factoring the keys. -* Common, computationally intensive, asymmetric algorithms are RSA and ECC. -* The public key is described by the pair (n, e) where n is a product of two -* randomly chosen primes p and q. The exponent e is a random integer -* 1 < e < Q where Q = (p-1) (q-1). The private key d is uniquely defined -* by the integer 1 < d < Q such that ed congruent to 1 (mod Q ).
-* -* \section group_crypto_more_information More Information -* -* RSASSA-PKCS1-v1_5 described here, page 31: -* http://www.emc.com/collateral/white-papers/h11300-pkcs-1v2-2-rsa-cryptography-standard-wp.pdf* -* -* See the Cryptographic Function Block chapter of the Technical Reference Manual. -* -* \section group_crypto_MISRA MISRA-C Compliance -* This driver does not contains any driver-specific MISRA violations. -* -* \section group_crypto_changelog Changelog -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -*
VersionChangesReason for Change
2.0Clarified what parameters must be 4-byte aligned for the functions: -* \ref Cy_Crypto_Aes_Cmac_Run, \ref Cy_Crypto_Sha_Run, -* \ref Cy_Crypto_Hmac_Run, \ref Cy_Crypto_Str_MemCmp, -* \ref Cy_Crypto_Trng_Generate, \ref Cy_Crypto_Des_Run, -* \ref Cy_Crypto_Tdes_Run, \ref Cy_Crypto_Rsa_Proc -* Documentation update and clarification
-* Changed crypto IP power control
-* Enhanced Vector Unit functionality for RSA crypto algorithm
-* Added support of the single-core devices -* 		New device support
1.0Initial version
-* -* -* \defgroup group_crypto_common Configuration -* \{ -* \defgroup group_crypto_config_macros Macros -* \defgroup group_crypto_config_structure Data Structures -* \} -* -* \defgroup group_crypto_client Crypto Client -* \{ -* \defgroup group_crypto_macros Macros -* \defgroup group_crypto_cli_functions Functions -* \defgroup group_crypto_cli_data_structures Data Structures -* \defgroup group_crypto_enums Enumerated Types -* \} -* -* \defgroup group_crypto_server Crypto Server -* \{ -* \defgroup group_crypto_srv_functions Functions -* \defgroup group_crypto_srv_data_structures Data Structures -* \} -*/ - -#if !defined(CY_CRYPTO_H) -#define CY_CRYPTO_H - - -#include -#include -#include "cy_device_headers.h" -#include "crypto/cy_crypto_common.h" - -#if (CPUSS_CRYPTO_PRESENT == 1) - - -#if defined(__cplusplus) -extern "C" { -#endif - - -/** \cond INTERNAL */ - -cy_en_crypto_status_t Cy_Crypto_GetLibraryInfo(cy_en_crypto_lib_info_t *cryptoInfo); - -/** \endcond */ - -/** -* \addtogroup group_crypto_cli_functions -* \{ -*/ - -/******************************************************************************* -* Function Name: Cy_Crypto_Init -****************************************************************************//** -* -* This function initializes the Crypto context buffer and -* configures the Crypto driver. Must be called at first. -* -* To start working with Crypto methods after Crypto_Init(), -* call Crypto_Enable() to turn-on the Crypto Hardware. -* -* \param config -* The pointer to the Crypto configuration structure. -* Could be used with default values from cy_crypto_config.h -* -* \param context -* The pointer to the \ref cy_stc_crypto_context_t instance of structure -* that stores the Crypto driver common context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Init(cy_stc_crypto_config_t const *config, cy_stc_crypto_context_t *context); - -/******************************************************************************* -* Function Name: Cy_Crypto_DeInit -****************************************************************************//** -* -* This function de-initializes the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_DeInit(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Enable -****************************************************************************//** -* -* This function enables (turns on) the Crypto hardware. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Enable(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Disable -****************************************************************************//** -* -* This function disables (turns off) the Crypto hardware. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Disable(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Sync -****************************************************************************//** -* -* This function waits or just checks (depending on the parameter) -* for the Crypto operation to complete. -* -* \param isBlocking -* Set whether Crypto_Sync is blocking: -* True - is blocking. -* False - is not blocking. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Sync(bool isBlocking); - -/******************************************************************************* -* Function Name: Cy_Crypto_GetErrorStatus -****************************************************************************//** -* -* This function returns a cause of a Crypto hardware error. -* It is independent of the Crypto previous state. -* -* \param hwErrorCause -* \ref cy_stc_crypto_hw_error_t. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_GetErrorStatus(cy_stc_crypto_hw_error_t *hwErrorCause); - -#if (CPUSS_CRYPTO_PR == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Prng_Init -****************************************************************************//** -* -* This function initializes parameters of the PRNG. -* -* Call to initialize this encryption technique before using any associated -* functions. You must initialize this technique again after using any other -* encryption technique. -* Invoking this function resets the pseudo random sequence. -* -* \param lfsr32InitState -* A non-zero seed value for the first LFSR. - -* \param lfsr31InitState -* A non-zero seed value for the second LFSR. - -* \param lfsr29InitState -* A non-zero seed value for the third LFSR. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_prng_t structure that stores -* the Crypto function context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Prng_Init(uint32_t lfsr32InitState, - uint32_t lfsr31InitState, - uint32_t lfsr29InitState, - cy_stc_crypto_context_prng_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Prng_Generate -****************************************************************************//** -* -* This function generates 32-bit the Pseudo Random Number. -* It depends on Cy_Crypto_Prng_Init that should be called before. -* -* \param max -* The maximum value of a random number. -* -* \param randomNum -* The pointer to a variable to store the generated pseudo random number. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_prng_t structure that stores -* the Crypto function context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Prng_Generate(uint32_t max, - uint32_t *randomNum, - cy_stc_crypto_context_prng_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_PR == 1) */ - -#if (CPUSS_CRYPTO_AES == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Init -****************************************************************************//** -* -* This function initializes the AES operation by setting key and key length. -* -* Call to initialize this encryption technique before using any associated -* functions. You must initialize this technique again after using any other -* encryption technique. -* -* \param key -* The pointer to the encryption/decryption key. -* -* \param keyLength -* \ref cy_en_crypto_aes_key_length_t -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t structure that stores all internal variables -* the Crypto driver requires. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Init(uint32_t *key, - cy_en_crypto_aes_key_length_t keyLength, - cy_stc_crypto_context_aes_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Ecb_Run -****************************************************************************//** -* -* This function performs AES operation on one block. -* The key must be set before by invoking Cy_Crypto_Aes_Init(). -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t). -* -* \param srcBlock -* The pointer to a source block. -* -* \param dstBlock -* The pointer to a destination cipher block. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t instance of structure -* that stores all AES internal variables. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Ecb_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t *dstBlock, - uint32_t *srcBlock, - cy_stc_crypto_context_aes_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Cbc_Run -****************************************************************************//** -* -* This function performs AES operation on a plain text with Cipher Block Chaining (CBC). -* The key must be set before by invoking Cy_Crypto_Aes_Init(). -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t) -* -* \param srcSize -* The size of the source plain text. -* -* \param ivPtr -* The pointer to the initial vector. -* -* \param dst -* The pointer to a destination cipher text. -* -* \param src -* The pointer to a source plain text. Must be 4-Byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t structure that stores all internal variables -* the Crypto driver requires. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Cbc_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t srcSize, - uint32_t *ivPtr, - uint32_t *dst, - uint32_t *src, - cy_stc_crypto_context_aes_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Cfb_Run -****************************************************************************//** -* -* This function performs AES operation on a plain text with Cipher Feedback mode (CFB). -* The key must be set before by invoking Cy_Crypto_Aes_Init(). -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t) -* -* \param srcSize -* The size of the source plain text. -* -* \param ivPtr -* The pointer to the initial vector. -* -* \param dst -* The pointer to a destination cipher text. -* -* \param src -* The pointer to a source plain text. Must be 4-Byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t structure that stores all internal variables -* the Crypto driver requires. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Cfb_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t srcSize, - uint32_t *ivPtr, - uint32_t *dst, - uint32_t *src, - cy_stc_crypto_context_aes_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Ctr_Run -****************************************************************************//** -* -* This function performs AES operation on a plain text with Cipher Block Counter mode (CTR). -* NOTE: preparation of the unique nonceCounter for each block is -* the user's responsibility. This function is dependent on -* the key being set before invoking \ref Cy_Crypto_Aes_Init(). -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t) -* -* \param srcSize -* The size of a source plain text. -* -* \param srcOffset -* The size of an offset within the current block stream for resuming within the current cipher stream. -* -* \param nonceCounter -* The 128-bit nonce and counter. -* -* \param streamBlock -* The saved stream-block for resuming. Is over-written by the function. -* -* \param dst -* The pointer to a destination cipher text. -* -* \param src -* The pointer to a source plain text. Must be 4-Byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t structure that stores all internal variables -* the Crypto driver requires. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Ctr_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t srcSize, - uint32_t *srcOffset, - uint32_t nonceCounter[CY_CRYPTO_AES_BLOCK_SIZE / 8u], - uint32_t streamBlock[CY_CRYPTO_AES_BLOCK_SIZE / 8u], - uint32_t *dst, - uint32_t *src, - cy_stc_crypto_context_aes_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Aes_Cmac_Run -****************************************************************************//** -* -* This function performs the cipher-block chaining-message authentication-code. -* -* There is no Init function. Provide the required parameters and the pointer to -* the context structure when making this function call. -* -* \param src -* The pointer to a source plain text. Must be 4-byte aligned. -* -* \param srcSize -* The size of a source plain text. -* -* \param key -* The pointer to the encryption key. Must be 4-byte aligned. -* -* \param keyLength -* \ref cy_en_crypto_aes_key_length_t -* -* \param cmacPtr -* The pointer to the calculated CMAC. Must be 4-byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_aes_t structure that stores all -* internal variables the Crypto driver requires. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Aes_Cmac_Run(uint32_t *src, - uint32_t srcSize, - uint32_t *key, - cy_en_crypto_aes_key_length_t keyLength, - uint32_t *cmacPtr, - cy_stc_crypto_context_aes_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_AES == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Sha_Run -****************************************************************************//** -* -* This function performs the SHA Hash function. -* There is no Init function. Provide the required parameters and the pointer -* to the context structure when making this function call. -* It is independent of the previous Crypto state because it already contains -* preparation, calculation, and finalization steps. -* -* \param mode -* \ref cy_en_crypto_sha_mode_t -* -* \param message -* The pointer to a message whose hash value is being computed. -* Must be 4-byte aligned. -* -* \param messageSize -* The size of a message. -* -* \param digest -* The pointer to the hash digest. Must be 4-byte aligned. -* -* \param cfContext -* the pointer to the \ref cy_stc_crypto_context_sha_t structure that stores all -* internal variables for Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Sha_Run(uint32_t *message, - uint32_t messageSize, - uint32_t *digest, - cy_en_crypto_sha_mode_t mode, - cy_stc_crypto_context_sha_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Hmac_Run -****************************************************************************//** -* -* This function performs HMAC calculation. -* There is no Init function. Provide the required parameters and the pointer -* to the context structure when making this function call. -* It is independent of the previous Crypto state because it already contains -* preparation, calculation, and finalization steps. -* -* \param hmac -* The pointer to the calculated HMAC. Must be 4-byte aligned. -* -* \param message -* The pointer to a message whose hash value is being computed. -* Must be 4-byte aligned. -* -* \param messageSize -* The size of a message. -* -* \param key -* The pointer to the key. Must be 4-byte aligned. -* -* \param keyLength -* The length of the key. -* -* \param mode -* \ref cy_en_crypto_sha_mode_t -* -* \param cfContext -* the pointer to the \ref cy_stc_crypto_context_sha_t structure that stores all internal variables -* for the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Hmac_Run(uint32_t *hmac, - uint32_t *message, - uint32_t messageSize, - uint32_t *key, - uint32_t keyLength, - cy_en_crypto_sha_mode_t mode, - cy_stc_crypto_context_sha_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -#if (CPUSS_CRYPTO_STR == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Str_MemCpy -****************************************************************************//** -* -* This function copies a memory block. It operates on data in the user SRAM and doesn't -* use Crypto internal SRAM. -* -* \note Memory blocks should not overlap. -* -* There is no alignment restriction. -* This function is independent of the previous Crypto state. -* -* \param dst -* The pointer to the destination of MemCpy. -* -* \param src -* The pointer to the source of MemCpy. -* -* \param size -* The size in bytes of the copy operation. Maximum size is 65535 Bytes. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_str_t structure that stores all internal variables -* for the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Str_MemCpy(void *dst, - void const *src, - uint16_t size, - cy_stc_crypto_context_str_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Str_MemSet -****************************************************************************//** -* -* This function sets the memory block. It operates on data in the user SRAM and -* doesn't use Crypto internal SRAM. -* -* There is no alignment restriction. -* This function is independent from the previous Crypto state. -* -* \param dst -* The pointer to the destination of MemSet. -* -* \param data -* The value to be set. -* -* \param size -* The size in bytes of the set operation. Maximum size is 65535 Bytes. -* -* \param cfContext -* the pointer to the \ref cy_stc_crypto_context_str_t structure that stores all internal variables -* for the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Str_MemSet(void *dst, - uint8_t data, - uint16_t size, - cy_stc_crypto_context_str_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Str_MemCmp -****************************************************************************//** -* -* This function compares memory blocks. It operates on data in the user SRAM and -* doesn't use Crypto internal SRAM. -* -* There is no alignment restriction. -* This function is independent from the previous Crypto state. -* -* \param src0 -* The pointer to the first source of MemCmp. -* -* \param src1 -* The pointer to the second source of MemCmp. -* -* \param size -* The size in bytes of the compare operation. Maximum size is 65535 Bytes. -* -* \param resultPtr -* The pointer to the result of compare (must be 4-byte aligned): -* - 0 - if Source 1 equal Source 2 -* - 1 - if Source 1 not equal Source 2 -* -* \param cfContext -* the pointer to the \ref cy_stc_crypto_context_str_t structure that stores all internal variables -* for the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Str_MemCmp(void const *src0, - void const *src1, - uint16_t size, - uint32_t *resultPtr, - cy_stc_crypto_context_str_t *cfContext); - -/******************************************************************************* -* Function Name: Crypto_Str_MemXor -****************************************************************************//** -* -* This function calculates the XOR of two memory blocks. It operates on data in the user -* SRAM and doesn't use Crypto internal SRAM. -* -* \note Memory structures should not overlap. -* -* There is no alignment restriction. -* This function is independent from the previous Crypto state. -* -* \param src0 -* The pointer to the first source of MemXor. - -* \param src1 -* The pointer to the second source of MemXor. - -* \param dst -* The pointer to the destination of MemXor. -* -* \param size -* The size in bytes of the compare operation. Maximum size is 65535 Bytes. -* -* \param cfContext -* the pointer to the \ref cy_stc_crypto_context_str_t structure that stores all internal variables -* for the Crypto driver. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Str_MemXor(void const *src0, - void const *src1, - void *dst, - uint16_t size, - cy_stc_crypto_context_str_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_STR == 1) */ - -#if (CPUSS_CRYPTO_CRC == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Crc_Init -****************************************************************************//** -* -* This function performs CRC initialization. -* -* Call to initialize this encryption technique before using any associated -* functions. You must initialize this technique again after using any other -* encryption technique. -* -* One peculiar of the CRC hardware block is that for some polynomials -* calculated, CRC is MSB aligned and others are LSB aligned. -* Below is the table with known polynomials and their -* calculated CRCs from the string "123456789". -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -* -*
CRC modes and parameters
NameWidthPolyInitData RevData XORRem RevRem XORExpected CRCOutput of the CRC block
CRC-3 / ROHC30x30x71010x00x60x00000006
CRC-4 / ITU40x30x01010x00x70x00000007
CRC-5 / EPC50x90x90000x00x00x00000000
CRC-5 / ITU50x150x01010x00x70x00000007
CRC-5 / USB50x50x1F1010x1F0x190x00000019
CRC-6 / CDMA2000-A60x270x3F0000x00xD0xD0000000
CRC-6 / CDMA2000-B60x70x3F0000x00x3B0x3B000000
CRC-6 / DARC60x190x01010x00x260x00000026
CRC-6 / ITU60x30x01010x00x60x00000006
CRC-770x90x00000x00x750x75000000
CRC-7 / ROHC70x4F0x7F1010x00x530x00000053
CRC-880x70x00000x00xF40xF4000000
CRC-8 / CDMA200080x9B0xFF0000x00xDA0xDA000000
CRC-8 / DARC80x390x01010x00x150x00000015
CRC-8 / DVB-S280xD50x00000x00xBC0xBC000000
CRC-8 / EBU80x1D0xFF1010x00x970x00000097
CRC-8 / I-CODE80x1D0xFD0000x00x7E0x7E000000
CRC-8 / ITU80x70x00000x550xA10xA1000000
CRC-8 / MAXIM80x310x01010x00xA10x000000A1
CRC-8 / ROHC80x70xFF1010x00xD00x000000D0
CRC-8 / WCDMA80x9B0x01010x00x250x00000025
CRC-10100x2330x00000x00x1990x19900000
CRC-10 / CDMA2000100x3D90x3FF0000x00x2330x23300000
CRC-11110x3850x1A0000x00x5A30x5A300000
CRC-12 / 3GPP120x80F0x00010x00xDAF0x00000DAF
CRC-12 / CDMA2000120xF130xFFF0000x00xD4D0xD4D00000
CRC-12 / DECT120x80F0x00000x00xF5B0xF5B00000
CRC-13 / BBC130x1CF50x00000x00x4FA0x4FA00000
CRC-14 / DARC140x8050x01010x00x82D0x0000082D
CRC-15150x45990x00000x00x59E0x59E00000
CRC-15 / MPT1327150x68150x00000x10x25660x25660000
CRC-24240x0864CFB0x00B704CE0000x00x21CF020x21CF0200
CRC-24 / FLEXRAY-A240x05D6DCB0x00FEDCBA0000x00x7979BD0x7979BD00
CRC-24 / FLEXRAY-B240x05D6DCB0x00ABCDEF0000x00x1F23B80x1F23B800
CRC-31 / PHILIPS310x4C11DB70x7FFFFFFF0000x7FFFFFFF0xCE9E46C0xCE9E46C0
CRC-16 / ARC160x80050x00001010x00000xBB3D0x0000BB3D
CRC-16 / AUG-CCITT160x10210x1D0F0000x00000xE5CC0xE5CC0000
CRC-16 / BUYPASS160x80050x00000000x00000xFEE80xFEE80000
CRC-16 / CCITT-0160x10210xFFFF0000x00000x29B10x29B10000
CRC-16 / CDMA2000160xC8670xFFFF0000x00000x4C060x4C060000
CRC-16 / DDS-110160x80050x800D0000x00000x9ECF0x9ECF0000
CRC-16 / DECT-R160x05890x00000000x00010x007E0x007E0000
CRC-16 / DECT-X160x05890x00000000x00000x007F0x007F0000
CRC-16 / DNP160x3D650x00001010xFFFF0xEA820x0000EA82
CRC-16 / EN-13757160x3D650x00000000xFFFF0xC2B70xC2B70000
CRC-16 / GENIBUS160x10210xFFFF0000xFFFF0xD64E0xD64E0000
CRC-16 / MAXIM160x80050x00001010xFFFF0x44C20x000044C2
CRC-16 / MCRF4XX160x10210xFFFF1010x00000x6F910x00006F91
CRC-16 / RIELLO160x10210xB2AA1010x00000x63D00x000063D0
CRC-16 / T10-DIF160x8BB70x00000000x00000xD0DB0xD0DB0000
CRC-16 / TELEDISK160xA0970x00000000x00000x0FB30x0FB30000
CRC-16 / TMS37157160x10210x89EC1010x00000x26B10x000026B1
CRC-16 / USB160x80050xFFFF1010xFFFF0xB4C80x0000B4C8
CRC-A160x10210xC6C61010x00000xBF050x0000BF05
CRC-16 / KERMIT160x10210x00001010x00000x21890x00002189
CRC-16 / MODBUS160x80050xFFFF1010x00000x4B370x00004B37
CRC-16 / X-25160x10210xFFFF1010xFFFF0x906E0x0000906E
CRC-16 / XMODEM160x10210x00000000x00000x31C30x31C30000
CRC-32320x04C11DB70xFFFFFFFF1010xFFFFFFFF0xCBF439260xCBF43926
CRC-32 / BZIP2320x04C11DB70xFFFFFFFF0000xFFFFFFFF0xFC8919180xFC891918
CRC-32C320x1EDC6F410xFFFFFFFF1010xFFFFFFFF0xE30692830xE3069283
CRC-32D320xA833982B0xFFFFFFFF1010xFFFFFFFF0x873155760x87315576
CRC-32 / MPEG-2320x04C11DB70xFFFFFFFF0000x000000000x0376E6E70x0376E6E7
CRC-32 / POSIX320x04C11DB70x000000000000xFFFFFFFF0x765E76800x765E7680
CRC-32Q320x814141AB0x000000000000x000000000x3010BF7F0x3010BF7F
CRC-32 / JAMCRC320x04C11DB70xFFFFFFFF1010x000000000x340BC6D90x340BC6D9
CRC-32 / XFER320x000000AF0x000000000000x000000000xBD0BE3380xBD0BE338
-* -* -* \param polynomial -* The polynomial (specified using 32 bits) used in the computing CRC. -* -* \param dataReverse -* The order in which data bytes are processed. 0 - MSB first; 1- LSB first. -* -* \param dataXor -* The byte mask for XORing data -* -* \param remReverse -* A reminder reverse: 0 means the remainder is not reversed. 1 means reversed. -* -* \param remXor -* Specifies a mask with which the LFSR32 register is XORed to produce a remainder. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_crc_t structure that stores -* the Crypto driver context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Crc_Init(uint32_t polynomial, - uint8_t dataReverse, - uint8_t dataXor, - uint8_t remReverse, - uint32_t remXor, - cy_stc_crypto_context_crc_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Crc_Run -****************************************************************************//** -* -* This function performs CRC calculation on a message. -* It depends on \ref Cy_Crypto_Crc_Init(), -* which should be called before. -* -* \param data -* The pointer to the message whose CRC is being computed. -* -* \param dataSize -* The size of a message in bytes. -* -* \param crc -* The pointer to a computed CRC value. Must be 4-byte aligned. -* -* \param lfsrInitState -* The initial state of the LFSR. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_crc_t structure that stores -* the Crypto driver context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Crc_Run(void *data, - uint16_t dataSize, - uint32_t *crc, - uint32_t lfsrInitState, - cy_stc_crypto_context_crc_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_CRC == 1) */ - -#if (CPUSS_CRYPTO_TR == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Trng_Generate -****************************************************************************//** -* -* This function generates a 32-bit True Random Number. -* -* \param GAROPol; -* The polynomial for the programmable Galois ring oscillator. -* -* \param FIROPol; -* The polynomial for the programmable Fibonacci ring oscillator. -* -* \param max -* The maximum length of a random number, in the range [0, 32] bits. -* -* \param randomNum -* The pointer to a generated true random number. Must be 4-byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_trng_t structure that stores -* the Crypto driver context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Trng_Generate(uint32_t GAROPol, - uint32_t FIROPol, - uint32_t max, - uint32_t *randomNum, - cy_stc_crypto_context_trng_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_TR == 1) */ - -#if (CPUSS_CRYPTO_DES == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Des_Run -****************************************************************************//** -* -* This function performs DES operation on a Single Block. All addresses must be -* 4-Byte aligned. -* Ciphertext (dstBlock) may overlap with plaintext (srcBlock) -* There is no Init function. Provide the required parameters and the pointer -* to the context structure when making this function call. -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t) -* -* \param key -* The pointer to the encryption/decryption key. Must be 4-byte aligned. -* -* \param srcBlock -* The pointer to a source block. Must be 4-byte aligned. Must be 4-byte aligned. -* -* \param dstBlock -* The pointer to a destination cipher block. Must be 4-byte aligned. -* -* \param cfContext -* The pointer to the cy_stc_crypto_context_des_t structure that stores -* the Crypto driver context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Des_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t *key, - uint32_t *dstBlock, - uint32_t *srcBlock, - cy_stc_crypto_context_des_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Tdes_Run -****************************************************************************//** -* -* This function performs the TDES operation on a single block. All addresses -* must be 4-byte aligned. -* Ciphertext (dstBlock) may overlap with plaintext (srcBlock). -* There is no Init function. Provide the required parameters and the pointer -* to the context structure when making this function call. -* -* \param dirMode -* Can be CRYPTO_ENCRYPT or CRYPTO_DECRYPT (\ref cy_en_crypto_dir_mode_t) -* -* \param key -* The pointer to the encryption/decryption key. Must be 4-byte aligned. -* -* \param srcBlock -* The pointer to a source block. Must be 4-vyte aligned. Must be 4-byte aligned. -* -* \param dstBlock -* The pointer to a destination cipher block. Must be 4-byte aligned. -* -* \param cfContext -* The pointer to the cy_stc_crypto_context_des_t structure that stores -* the Crypto driver context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Tdes_Run(cy_en_crypto_dir_mode_t dirMode, - uint32_t *key, - uint32_t *dstBlock, - uint32_t *srcBlock, - cy_stc_crypto_context_des_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_DES == 1) */ - -#if (CPUSS_CRYPTO_VU == 1) -/******************************************************************************* -* Function Name: Cy_Crypto_Rsa_Proc -****************************************************************************//** -* -* This function calculates (m^e mod modulo) where m is Message (Signature), e - public exponent -* using a public key in the next representation, it contains: -* modulo, -* public exponent, -* coefficient for Barrett reduction, -* binary inverse of the modulo, and -* result of (2^moduloLength mod modulo). -* -* Not all fields in a key must be given. Modulo and public exponents are mandatory; -* Barrett coefficient, inverse modulo, and r-bar are optional. -* If they don't exist, their according pointers should be NULL. These coefficients -* could be calculated by \ref Cy_Crypto_Rsa_CalcCoefs. -* Their presence accelerates performance by five times. -* Approximate performance for 1024-bit modulo is 41.6 ms; for 2048-bit modulo is 142 ms -* when using a 25 MHz clock for Crypto HW. These numbers just for reference. -* They depend on many factors (compiler, optimization level, etc.). -* -* Returns the processed value and a success value. -* -* \note Incoming message and result processed message must be in -* little-endian order.
-* The modulus and exponent values in the \ref cy_stc_crypto_rsa_pub_key_t -* must also be in little-endian order.
-* Use \ref Cy_Crypto_Rsa_InvertEndianness function to convert to or from -* little-endian order. -* -* \param pubKey -* The pointer to the \ref cy_stc_crypto_rsa_pub_key_t structure that stores -* public key. -* -* \param message -* The pointer to the message to be processed. -* -* \param messageSize -* The length of the message to be processed. -* -* \param processedMessage -* The pointer to processed message. Must be 4-byte aligned. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_rsa_t structure that stores -* the RSA context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Rsa_Proc(cy_stc_crypto_rsa_pub_key_t const *pubKey, - uint32_t const *message, - uint32_t messageSize, - uint32_t *processedMessage, - cy_stc_crypto_context_rsa_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Rsa_CalcCoefs -****************************************************************************//** -* -* This function calculates constant coefficients (which is dependent only on modulo -* and independent on message). With this pre-calculated coefficients calculations -* speed-up by five times. -* -* These coefficients are: -* coefficient for Barrett reduction, -* binary inverse of the modulo, -* result of (2^moduloLength mod modulo) -* -* Calculated coefficients will be placed by addresses provided in the -* pubKey structure for according coefficients. -* Function overwrites previous values. -* Approximate performance for 1024-bit modulo is 33.2 ms; for 2048-bit modulo is 113 ms -* when using a 25 MHz clock for Crypto HW. These numbers are just for reference. -* They depend on many factors (compiler, optimization level, etc.). -* -* \param pubKey -* The pointer to the \ref cy_stc_crypto_rsa_pub_key_t structure that stores a -* public key. -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_rsa_t structure that stores -* the RSA context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Rsa_CalcCoefs(cy_stc_crypto_rsa_pub_key_t const *pubKey, - cy_stc_crypto_context_rsa_t *cfContext); -#endif /* #if (CPUSS_CRYPTO_VU == 1) */ - -/******************************************************************************* -* Function Name: Cy_Crypto_Rsa_Verify -****************************************************************************//** -* -* This function does an RSA verification with checks for content, paddings, and -* signature format. -* The SHA digest of the message and decrypted message should be calculated first. -* Supports only PKCS1-v1_5 format. Inside of this format supported padding -* using only SHA. Cases with MD2 and MD5 are not supported. -* -* PKCS1-v1_5 described here, page 31: -* http://www.emc.com/collateral/white-papers/h11300-pkcs-1v2-2-rsa-cryptography-standard-wp.pdf -* -* Returns the verification result \ref cy_en_crypto_rsa_ver_result_t. -* -* \param verResult -* The pointer to the verification result \ref cy_en_crypto_rsa_ver_result_t. -* -* \param digestType -* SHA mode used for hash calculation \ref cy_en_crypto_sha_mode_t. -* -* \param digest -* The pointer to the hash of the message whose signature is to be verified. -* -* \param decryptedSignature -* The pointer to the decrypted signature to be verified. -* -* \param decryptedSignatureLength -* The length of the decrypted signature to be verified (in bytes) -* -* \param cfContext -* The pointer to the \ref cy_stc_crypto_context_rsa_ver_t structure that stores -* the RSA context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Rsa_Verify(cy_en_crypto_rsa_ver_result_t *verResult, - cy_en_crypto_sha_mode_t digestType, - uint32_t const *digest, - uint32_t const *decryptedSignature, - uint32_t decryptedSignatureLength, - cy_stc_crypto_context_rsa_ver_t *cfContext); - -/******************************************************************************* -* Function Name: Cy_Crypto_Rsa_InvertEndianness -****************************************************************************//** -* -* This function reverts byte-array memory block, like:
-* inArr[0] <---> inArr[n]
-* inArr[1] <---> inArr[n-1]
-* inArr[2] <---> inArr[n-2]
-* ........................
-* inArr[n/2] <---> inArr[n/2-1]
-* -* Odd or even byteSize are acceptable. -* -* \param inArrPtr -* The pointer to the memory whose endianness is to be inverted. -* -* \param byteSize -* The length of the memory array whose endianness is to be inverted (in bytes) -* -*******************************************************************************/ -void Cy_Crypto_Rsa_InvertEndianness(void *inArrPtr, uint32_t byteSize); - - -/** \} group_crypto_cli_functions */ - - -#if defined(__cplusplus) -} -#endif - -#endif /* #if (CPUSS_CRYPTO_PRESENT == 1) */ - -#endif /* (CY_CRYPTO_H) */ - -/** \} group_crypto */ - - -/* [] END OF FILE */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_common.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_common.h deleted file mode 100644 index 3870340c32..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_common.h +++ /dev/null @@ -1,733 +0,0 @@ -/***************************************************************************//** -* \file cy_crypto_common.h -* \version 2.0 -* -* \brief -* This file provides common constants and parameters -* for the Crypto driver. -* -******************************************************************************** -* \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - - -#if !defined(CY_CRYPTO_COMMON_H) -#define CY_CRYPTO_COMMON_H - -#include -#include -#include "cy_device_headers.h" -#include "sysint/cy_sysint.h" -#include "syslib/cy_syslib.h" - -#ifndef CY_IP_MXCRYPTO - #error "The CRYPTO driver is not supported on this device" -#endif - -#if (CPUSS_CRYPTO_PRESENT == 1) - -#define CY_CRYPTO_CORE_ENABLE (1) - -/** Driver major version */ -#define CY_CRYPTO_DRV_VERSION_MAJOR 2 - -/** Driver minor version */ -#define CY_CRYPTO_DRV_VERSION_MINOR 0 - -/** Defines the Crypto notify interrupt number */ -#define CY_CRYPTO_IPC_INTR_NOTIFY_NUM CY_IPC_INTR_CRYPTO_SRV - -/** Defines the Crypto release interrupt number */ -#define CY_CRYPTO_IPC_INTR_RELEASE_NUM CY_IPC_INTR_CRYPTO_CLI - -/** -* \addtogroup group_crypto_macros -* \{ -*/ - -/** Defines Crypto_Sync blocking execution type parameter */ -#define CY_CRYPTO_SYNC_BLOCKING (true) - -/** Defines Crypto_Sync non-blocking execution type parameter */ -#define CY_CRYPTO_SYNC_NON_BLOCKING (false) - -/** Defines the Crypto DES key size (in bytes) */ -#define CY_CRYPTO_DES_KEY_SIZE (8u) - -/** Defines the Crypto TDES key size (in bytes) */ -#define CY_CRYPTO_TDES_KEY_SIZE (24u) - -/** Defines the Crypto AES block size (in bytes) */ -#define CY_CRYPTO_AES_BLOCK_SIZE (16u) - -/** Defines the Crypto AES_128 key maximum size (in bytes) */ -#define CY_CRYPTO_AES_128_KEY_SIZE (16u) - -/** Defines the Crypto AES_192 key maximum size (in bytes) */ -#define CY_CRYPTO_AES_192_KEY_SIZE (24u) - -/** Defines the Crypto AES_256 key maximum size (in bytes) */ -#define CY_CRYPTO_AES_256_KEY_SIZE (32u) - -/** Defines size of the AES block, in four-byte words */ -#define CY_CRYPTO_AES_BLOCK_SIZE_U32 (uint32_t)(CY_CRYPTO_AES_BLOCK_SIZE / 4ul) - -#if (CPUSS_CRYPTO_SHA == 1) - -/** Hash size for the SHA1 mode (in bytes) */ -#define CY_CRYPTO_SHA1_DIGEST_SIZE (20u) -/** Hash size for the SHA224 mode (in bytes) */ -#define CY_CRYPTO_SHA224_DIGEST_SIZE (28u) -/** Hash size for the SHA256 mode (in bytes) */ -#define CY_CRYPTO_SHA256_DIGEST_SIZE (32u) -/** Hash size for the SHA384 mode (in bytes) */ -#define CY_CRYPTO_SHA384_DIGEST_SIZE (48u) -/** Hash size for the SHA512 mode (in bytes) */ -#define CY_CRYPTO_SHA512_DIGEST_SIZE (64u) -/** Hash size for the SHA512_224 mode (in bytes) */ -#define CY_CRYPTO_SHA512_224_DIGEST_SIZE (28u) -/** Hash size for the SHA512_256 mode (in bytes) */ -#define CY_CRYPTO_SHA512_256_DIGEST_SIZE (32u) - -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - - -#if (CPUSS_CRYPTO_VU == 1) - -/** Processed message size for the RSA 1024Bit mode (in bytes) */ -#define CY_CRYPTO_RSA1024_MESSAGE_SIZE (128) -/** Processed message size for the RSA 1536Bit mode (in bytes) */ -#define CY_CRYPTO_RSA1536_MESSAGE_SIZE (192) -/** Processed message size for the RSA 2048Bit mode (in bytes) */ -#define CY_CRYPTO_RSA2048_MESSAGE_SIZE (256) - -#endif /* #if (CPUSS_CRYPTO_VU == 1) */ - - -/** Crypto Driver PDL ID */ -#define CY_CRYPTO_ID CY_PDL_DRV_ID(0x0Cu) - -/** \} group_crypto_macros */ - -/** -* \addtogroup group_crypto_config_structure -* \{ -*/ - -/** The Crypto user callback function type. - Callback is called at the end of Crypto calculation. */ -typedef void (*cy_crypto_callback_ptr_t)(void); - -/** The Crypto configuration structure. */ -typedef struct -{ - /** Defines the IPC channel used for client-server data exchange */ - uint32_t ipcChannel; - - /** Specifies the IPC notifier channel (IPC interrupt structure number) - to notify server that data for the operation is prepared */ - uint32_t acquireNotifierChannel; - - /** Specifies the IPC notifier channel (IPC interrupt structure number) - to notify client that operation is complete and data is valid */ - uint32_t releaseNotifierChannel; - - /** Specifies the release notifier interrupt configuration. It used for - internal purposes and user doesn't fill it. */ - cy_stc_sysint_t releaseNotifierConfig; - - /** User callback function. - If this field is NOT NULL, it called when Crypto operation - is complete. */ - cy_crypto_callback_ptr_t userCompleteCallback; - -#if (CY_CRYPTO_CORE_ENABLE) - /** Server-side user IRQ handler function, called when data for the - operation is prepared to process. - - If this field is NULL, server will use own interrupt handler - to get data. - - If this field is not NULL, server will call this interrupt handler. - This interrupt handler must call the - \ref Cy_Crypto_Server_GetDataHandler to get data to process. - - Note: In the second case user should process data separately and - clear interrupt by calling \ref Cy_Crypto_Server_Process. - This model is used in the - multitasking environment. */ - cy_israddress userGetDataHandler; - - /** Server-side user IRQ handler function, called when a Crypto hardware - error occurs (interrupt was raised). - - If this field is NULL - server will use own interrupt handler - for error processing. - - If this field is not NULL - server will call this interrupt handler. - This interrupt handler must call the - \ref Cy_Crypto_Server_ErrorHandler to clear the interrupt. */ - cy_israddress userErrorHandler; - - /** Specifies the prepared data notifier interrupt configuration. It used - for internal purposes and user doesn't fill it. */ - cy_stc_sysint_t acquireNotifierConfig; - - /** Specifies the hardware error processing interrupt configuration. It used - for internal purposes and user doesn't fill it. */ - cy_stc_sysint_t cryptoErrorIntrConfig; -#endif /* (CY_CRYPTO_CORE_ENABLE) */ - -} cy_stc_crypto_config_t; - -/** \} group_crypto_config_structure */ - -/** -* \addtogroup group_crypto_cli_data_structures -* \{ -*/ - -#if (CPUSS_CRYPTO_VU == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the RSA public key and - * additional coefficients to accelerate RSA calculation. - * - * RSA key contained from two fields: - * - n - modulus part of the key - * - e - exponent part of the key. - * - * Other fields are accelerating coefficients and can be calculated by - * \ref Cy_Crypto_Rsa_CalcCoefs. - * - * \note The modulus and exponent values in the - * \ref cy_stc_crypto_rsa_pub_key_t must also be in little-endian order.
- * Use \ref Cy_Crypto_Rsa_InvertEndianness function to convert to or from - * little-endian order. - * -*/ -typedef struct -{ - /** The pointer to the modulus part of public key. */ - uint8_t *moduloPtr; - /** The modulus length, in bits, maximum supported size is 2048Bit */ - uint32_t moduloLength; - - /** The pointer to the exponent part of public key */ - uint8_t *pubExpPtr; - /** The exponent length, in bits, maximum supported size is 256Bit */ - uint32_t pubExpLength; - - /** The pointer to the Barrett coefficient. Memory for it should be - allocated by user with size moduloLength + 1. */ - uint8_t *barretCoefPtr; - - /** The pointer to the binary inverse of the modulo. Memory for it - should be allocated by user with size moduloLength. */ - uint8_t *inverseModuloPtr; - - /** The pointer to the (2^moduloLength mod modulo). Memory for it should - be allocated by user with size moduloLength */ - uint8_t *rBarPtr; -} cy_stc_crypto_rsa_pub_key_t; - -#endif /* #if (CPUSS_CRYPTO_VU == 1) */ - -/** Structure for storing a description of a Crypto hardware error */ -typedef struct -{ - /** - Captures error description information: - for INSTR_OPC_ERROR: - violating the instruction. - for INSTR_CC_ERROR : - violating the instruction condition code. - for BUS_ERROR : - violating the transfer address. */ - uint32_t errorStatus0; - - /** - [31] - Specifies if ERROR_STATUS0 and ERROR_STATUS1 capture valid - error-information. - [26..24] - The error source: - "0": INSTR_OPC_ERROR - an instruction decoder error. - "1": INSTR_CC_ERROR - an instruction condition code-error. - "2": BUS_ERROR - a bus master interface AHB-Lite bus-error. - "3": TR_AP_DETECT_ERROR. - [23..0] - Captures error description information. - For BUS_ERROR: - - violating the transfer, read the attribute (DATA23[0]). - - violating the transfer, the size attribute (DATA23[5:4]). - "0": an 8-bit transfer; - "1": 16 bits transfer; - "2": 32-bit transfer. */ - uint32_t errorStatus1; -} cy_stc_crypto_hw_error_t; - -/** \} group_crypto_cli_data_structures */ - - -/** The Crypto library functionality level. */ -typedef enum -{ - CY_CRYPTO_NO_LIBRARY = 0x00u, - CY_CRYPTO_BASE_LIBRARY = 0x01u, - CY_CRYPTO_EXTRA_LIBRARY = 0x02u, - CY_CRYPTO_FULL_LIBRARY = 0x03u, -} cy_en_crypto_lib_info_t; - - -/** -* \addtogroup group_crypto_enums -* \{ -*/ - -#if (CPUSS_CRYPTO_AES == 1) -/** The key length options for the AES method. */ -typedef enum -{ - CY_CRYPTO_KEY_AES_128 = 0x00u, /**< The AES key size is 128 bits */ - CY_CRYPTO_KEY_AES_192 = 0x01u, /**< The AES key size is 192 bits */ - CY_CRYPTO_KEY_AES_256 = 0x02u /**< The AES key size is 256 bits */ -} cy_en_crypto_aes_key_length_t; -#endif /* #if (CPUSS_CRYPTO_AES == 1) */ - -/** Defines the direction of the Crypto methods */ -typedef enum -{ - /** The forward mode, plain text will be encrypted into cipher text */ - CY_CRYPTO_ENCRYPT = 0x00u, - /** The reverse mode, cipher text will be decrypted into plain text */ - CY_CRYPTO_DECRYPT = 0x01u -} cy_en_crypto_dir_mode_t; - -#if (CPUSS_CRYPTO_SHA == 1) -/** Defines modes of SHA method */ -typedef enum -{ -#if (CPUSS_CRYPTO_SHA1 == 1) - CY_CRYPTO_MODE_SHA1 = 0x00u, /**< Sets the SHA1 mode */ -#endif /* #if (CPUSS_CRYPTO_SHA1 == 1) */ - -#if (CPUSS_CRYPTO_SHA256 == 1) - CY_CRYPTO_MODE_SHA224 = 0x11u, /**< Sets the SHA224 mode */ - CY_CRYPTO_MODE_SHA256 = 0x01u, /**< Sets the SHA256 mode */ -#endif /* #if (CPUSS_CRYPTO_SHA256 == 1) */ - -#if (CPUSS_CRYPTO_SHA512 == 1) - CY_CRYPTO_MODE_SHA384 = 0x12u, /**< Sets the SHA384 mode */ - CY_CRYPTO_MODE_SHA512 = 0x02u, /**< Sets the SHA512 mode */ - CY_CRYPTO_MODE_SHA512_256 = 0x22u, /**< Sets the SHA512/256 mode */ - CY_CRYPTO_MODE_SHA512_224 = 0x32u /**< Sets the SHA512/224 mode */ -#endif /* #if (CPUSS_CRYPTO_SHA512 == 1) */ -} cy_en_crypto_sha_mode_t; -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -/** Signature verification status */ -typedef enum -{ - CY_CRYPTO_RSA_VERIFY_SUCCESS = 0x00u, /**< PKCS1-v1.5 verify SUCCESS */ - CY_CRYPTO_RSA_VERIFY_FAIL = 0x01u /**< PKCS1-v1.5 verify FAILED */ -} cy_en_crypto_rsa_ver_result_t; - -/** Errors of the Crypto block */ -typedef enum -{ - /** Operation completed successfully. */ - CY_CRYPTO_SUCCESS = 0x00u, - - /** A hardware error occurred, detailed information is in stc_crypto_hw_error_t. */ - CY_CRYPTO_HW_ERROR = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x01u, - - /** The size of input data is not multiple of 16. */ - CY_CRYPTO_SIZE_NOT_X16 = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x02u, - - /** The key for the DES method is weak. */ - CY_CRYPTO_DES_WEAK_KEY = CY_CRYPTO_ID | CY_PDL_STATUS_WARNING | 0x03u, - - /** Communication between the client and server via IPC is broken. */ - CY_CRYPTO_COMM_FAIL = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x04u, - - /** The Crypto server is not started. */ - CY_CRYPTO_SERVER_NOT_STARTED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x06u, - - /** The Crypto server in process state. */ - CY_CRYPTO_SERVER_BUSY = CY_CRYPTO_ID | CY_PDL_STATUS_INFO | 0x07u, - - /** The Crypto driver is not initialized. */ - CY_CRYPTO_NOT_INITIALIZED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x08u, - - /** The Crypto hardware is not enabled. */ - CY_CRYPTO_HW_NOT_ENABLED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x09u, - - /** The Crypto operation is not supported. */ - CY_CRYPTO_NOT_SUPPORTED = CY_CRYPTO_ID | CY_PDL_STATUS_ERROR | 0x0Au - -} cy_en_crypto_status_t; - -/** \} group_crypto_enums */ - -/** \cond INTERNAL */ - -/** Instruction to communicate between Client and Server */ -typedef enum -{ - CY_CRYPTO_INSTR_UNKNOWN = 0x00u, - CY_CRYPTO_INSTR_ENABLE = 0x01u, - CY_CRYPTO_INSTR_DISABLE = 0x02u, - -#if (CPUSS_CRYPTO_PR == 1) - CY_CRYPTO_INSTR_PRNG_INIT = 0x03u, - CY_CRYPTO_INSTR_PRNG = 0x04u, -#endif /* #if (CPUSS_CRYPTO_PR == 1) */ - -#if (CPUSS_CRYPTO_TR == 1) - CY_CRYPTO_INSTR_TRNG_INIT = 0x05u, - CY_CRYPTO_INSTR_TRNG = 0x06u, -#endif /* #if (CPUSS_CRYPTO_PR == 1) */ - -#if (CPUSS_CRYPTO_AES == 1) - CY_CRYPTO_INSTR_AES_INIT = 0x07u, - CY_CRYPTO_INSTR_AES_ECB = 0x08u, - CY_CRYPTO_INSTR_AES_CBC = 0x09u, - CY_CRYPTO_INSTR_AES_CFB = 0x0Au, - CY_CRYPTO_INSTR_AES_CTR = 0x0Bu, - CY_CRYPTO_INSTR_CMAC = 0x0Cu, -#endif /* #if (CPUSS_CRYPTO_AES == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) - CY_CRYPTO_INSTR_SHA = 0x0Du, -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) - CY_CRYPTO_INSTR_HMAC = 0x0Eu, -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -#if (CPUSS_CRYPTO_STR == 1) - CY_CRYPTO_INSTR_MEM_CPY = 0x0Fu, - CY_CRYPTO_INSTR_MEM_SET = 0x10u, - CY_CRYPTO_INSTR_MEM_CMP = 0x11u, - CY_CRYPTO_INSTR_MEM_XOR = 0x12u, -#endif /* #if (CPUSS_CRYPTO_STR == 1) */ - -#if (CPUSS_CRYPTO_CRC == 1) - CY_CRYPTO_INSTR_CRC_INIT = 0x13u, - CY_CRYPTO_INSTR_CRC = 0x14u, -#endif /* #if (CPUSS_CRYPTO_CRC == 1) */ - -#if (CPUSS_CRYPTO_DES == 1) - CY_CRYPTO_INSTR_DES = 0x15u, - CY_CRYPTO_INSTR_3DES = 0x16u, -#endif /* #if (CPUSS_CRYPTO_DES == 1) */ - -#if (CPUSS_CRYPTO_VU == 1) - CY_CRYPTO_INSTR_RSA_PROC = 0x17u, - CY_CRYPTO_INSTR_RSA_COEF = 0x18u, -#endif /* #if (CPUSS_CRYPTO_VU == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) - CY_CRYPTO_INSTR_RSA_VER = 0x19u, -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - - CY_CRYPTO_INSTR_SRV_INFO = 0x55u -} cy_en_crypto_comm_instr_t; - -/** \endcond */ - -/** -* \addtogroup group_crypto_cli_data_structures -* \{ -*/ - -#if (CPUSS_CRYPTO_AES == 1) -/** Structure for storing the AES state */ -typedef struct -{ - /** Pointer to AES key */ - uint32_t *key; - /** Pointer to AES inversed key */ - uint32_t *invKey; - /** AES key length */ - cy_en_crypto_aes_key_length_t keyLength; - /** AES processed block index (for CMAC, SHA operations) */ - uint32_t blockIdx; -} cy_stc_crypto_aes_state_t; -#endif /* #if (CPUSS_CRYPTO_AES == 1) */ - -/** \} group_crypto_cli_data_structures */ - -/************************************************************* -* Structures used for communication between Client and Server -***************************************************************/ - -/** -* \addtogroup group_crypto_srv_data_structures -* \{ -*/ - -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the server - * context. - */ -typedef struct -{ - /** IPC communication channel number */ - uint32_t ipcChannel; - /** IPC acquire interrupt channel number */ - uint32_t acquireNotifierChannel; - /** IPC release interrupt channel number */ - cy_israddress getDataHandlerPtr; - /** Crypto hardware errors interrupt handler */ - cy_israddress errorHandlerPtr; - /** Acquire notifier interrupt configuration */ - cy_stc_sysint_t acquireNotifierConfig; - /** Crypto hardware errors interrupt configuration */ - cy_stc_sysint_t cryptoErrorIntrConfig; - /** Hardware error occurrence flag */ - bool isHwErrorOccured; -} cy_stc_crypto_server_context_t; - -/** \} group_crypto_srv_data_structures */ - -/** -* \addtogroup group_crypto_cli_data_structures -* \{ -*/ - -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the global - * context. - */ -typedef struct -{ - /** Operation instruction code */ - cy_en_crypto_comm_instr_t instr; - /** Response from executed crypto function */ - cy_en_crypto_status_t resp; - /** Hardware processing errors */ - cy_stc_crypto_hw_error_t hwErrorStatus; - /** IPC communication channel number */ - uint32_t ipcChannel; - /** IPC acquire interrupt channel number */ - uint32_t acquireNotifierChannel; - /** IPC release interrupt channel number */ - uint32_t releaseNotifierChannel; - /** User callback for Crypto HW calculation complete event */ - cy_crypto_callback_ptr_t userCompleteCallback; - /** Release notifier interrupt configuration */ - cy_stc_sysint_t releaseNotifierConfig; - /** Pointer to the crypto function specific context data */ - void *xdata; -} cy_stc_crypto_context_t; - - -#if (CPUSS_CRYPTO_DES == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the DES operational - * context. - */ -typedef struct -{ - /** Operation direction (Encrypt / Decrypt) */ - cy_en_crypto_dir_mode_t dirMode; - /** Pointer to key data */ - uint32_t *key; - /** Pointer to data destination block */ - uint32_t *dst; - /** Pointer to data source block */ - uint32_t *src; -} cy_stc_crypto_context_des_t; -#endif /* #if (CPUSS_CRYPTO_DES == 1) */ - -#if (CPUSS_CRYPTO_AES == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the AES operational - * context. - */ -typedef struct -{ - /** AES state data */ - cy_stc_crypto_aes_state_t aesState; - /** Operation direction (Encrypt / Decrypt) */ - cy_en_crypto_dir_mode_t dirMode; - /** Operation data size */ - uint32_t srcSize; - /** Size of the last non-complete block (for CTR mode only) */ - uint32_t *srcOffset; - /** Initialization vector, in the CTR mode is used as nonceCounter */ - uint32_t *ivPtr; - /** AES processed block pointer (for CTR mode only) */ - uint32_t *streamBlock; - /** Pointer to data destination block */ - uint32_t *dst; - /** Pointer to data source block */ - uint32_t *src; -} cy_stc_crypto_context_aes_t; -#endif /* #if (CPUSS_CRYPTO_AES == 1) */ - -#if (CPUSS_CRYPTO_SHA == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the SHA operational - * context. - */ -typedef struct -{ - /** Pointer to data source block */ - uint32_t *message; - /** Operation data size */ - uint32_t messageSize; - /** Pointer to data destination block */ - uint32_t *dst; - /** SHA mode */ - cy_en_crypto_sha_mode_t mode; - /** Pointer to key data (for HMAC only) */ - uint32_t *key; - /** Key data length (for HMAC only) */ - uint32_t keyLength; -} cy_stc_crypto_context_sha_t; -#endif /* #if (CPUSS_CRYPTO_SHA == 1) */ - -#if (CPUSS_CRYPTO_PR == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the PRNG operational - * context. - */ -typedef struct -{ - uint32_t lfsr32InitState; /**< lfsr32 initialization data */ - uint32_t lfsr31InitState; /**< lfsr31 initialization data */ - uint32_t lfsr29InitState; /**< lfsr29 initialization data */ - uint32_t max; /**< Maximum of the generated value */ - uint32_t *prngNum; /**< Pointer to generated value */ -} cy_stc_crypto_context_prng_t; -#endif /* #if (CPUSS_CRYPTO_PR == 1) */ - -#if (CPUSS_CRYPTO_TR == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the TRNG operational - * context. - */ -typedef struct -{ - /** - The polynomial for the programmable Galois ring oscillator (TR_GARO_CTL). - The polynomial is represented WITHOUT the high order bit (this bit is - always assumed '1'). - The polynomial should be aligned so that more significant bits - (bit 30 and down) contain the polynomial and less significant bits - (bit 0 and up) contain padding '0's. */ - uint32_t GAROPol; - - /** - The polynomial for the programmable Fibonacci ring oscillator(TR_FIRO_CTL). - The polynomial is represented WITHOUT the high order bit (this bit is - always assumed '1'). - The polynomial should be aligned so that more significant bits - (bit 30 and down) contain the polynomial and less significant bits - (bit 0 and up) contain padding '0's. */ - uint32_t FIROPol; - /** Maximum of the generated value */ - uint32_t max; - /** Pointer to generated value */ - uint32_t *trngNum; -} cy_stc_crypto_context_trng_t; -#endif /* #if (CPUSS_CRYPTO_TR == 1) */ - -#if (CPUSS_CRYPTO_STR == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the STR operational - * context. - */ -typedef struct -{ - void const *src0; /**< Pointer to 1-st string source */ - void const *src1; /**< Pointer to 2-nd string source */ - void *dst; /**< Pointer to string destination */ - uint32_t dataSize; /**< Operation data size */ - uint32_t data; /**< Operation data value (for memory setting) */ -} cy_stc_crypto_context_str_t; -#endif /* #if (CPUSS_CRYPTO_STR == 1) */ - -#if (CPUSS_CRYPTO_CRC == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the CRC operational - * context. - */ -typedef struct -{ - void* srcData; /**< Pointer to data source block */ - uint32_t dataSize; /**< Operation data size */ - uint32_t *crc; /**< Pointer to CRC destination variable */ - uint32_t polynomial; /**< Polynomial for CRC calculate */ - uint32_t lfsrInitState; /**< CRC calculation initial value */ - uint32_t dataReverse; /**< Input data reverse flag */ - uint32_t dataXor; /**< Input data XOR flag */ - uint32_t remReverse; /**< Output data reverse flag */ - uint32_t remXor; /**< Output data XOR flag */ -} cy_stc_crypto_context_crc_t; -#endif /* #if (CPUSS_CRYPTO_CRC == 1) */ - -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the RSA verifying - * context. - */ -typedef struct -{ - /** Pointer to verification result /ref cy_en_crypto_rsa_ver_result_t */ - cy_en_crypto_rsa_ver_result_t *verResult; - /** SHA digest type, used with SHA calculation of the message */ - cy_en_crypto_sha_mode_t digestType; - /** SHA digest of the message, calculated with digestType */ - uint32_t const *hash; - /** Previously decrypted RSA signature */ - uint32_t const *decryptedSignature; - /** Length of the decrypted RSA signature */ - uint32_t decryptedSignatureLength; -} cy_stc_crypto_context_rsa_ver_t; - -#if (CPUSS_CRYPTO_VU == 1) -/** - * Firmware allocates memory and provides a pointer to this structure in - * function calls. Firmware does not write or read values in this structure. - * The driver uses this structure to store and manipulate the RSA operational - * context. - */ -typedef struct -{ - /** Pointer to key data */ - cy_stc_crypto_rsa_pub_key_t const *key; - /** Pointer to data source block */ - uint32_t const *message; - /** Operation data size */ - uint32_t messageSize; - /** Pointer to data destination block */ - uint32_t *result; -} cy_stc_crypto_context_rsa_t; -#endif /* #if (CPUSS_CRYPTO_VU == 1) */ - -/** \} group_crypto_cli_data_structures */ - -#endif /* (CPUSS_CRYPTO_PRESENT == 1) */ - -#endif /* #if !defined(CY_CRYPTO_COMMON_H) */ - - -/* [] END OF FILE */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.c deleted file mode 100644 index b5b9440ebd..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.c +++ /dev/null @@ -1,69 +0,0 @@ -/***************************************************************************//** -* \file -* \version 2.0 -* -* Description: -* This C file is not intended to be part of the Crypto driver. It is the code -* required to configure the crypto driver by user. -* -******************************************************************************** -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#include "cy_crypto_config.h" - -#include "ipc/cy_ipc_drv.h" -#include "sysint/cy_sysint.h" - - -/** The Crypto configuration structure. */ -const cy_stc_crypto_config_t cryptoConfig = -{ - /* .ipcChannel */ CY_IPC_CHAN_CRYPTO, - /* .acquireNotifierChannel */ CY_CRYPTO_IPC_INTR_NOTIFY_NUM, - /* .releaseNotifierChannel */ CY_CRYPTO_IPC_INTR_RELEASE_NUM, - - /* .releaseNotifierConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_RELEASE_INTR_NR, - /* .cm0pSrc */ (cy_en_intr_t)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_RELEASE_NUM), -#else - /* .intrSrc */ (IRQn_Type)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_RELEASE_NUM), -#endif - /* .intrPriority */ CY_CRYPTO_RELEASE_INTR_PR, - }, - /* .userCompleteCallback */ NULL - -#if (CY_CRYPTO_CORE_ENABLE) - , - /* .userGetDataHandler */ NULL, - /* .userErrorHandler */ NULL, - - /* .acquireNotifierConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_NOTIFY_INTR_NR, - /* .cm0pSrc */ (cy_en_intr_t)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_NOTIFY_NUM), -#else - /* .intrSrc */ (IRQn_Type)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_NOTIFY_NUM), -#endif - /* .intrPriority */ CY_CRYPTO_NOTIFY_INTR_PR, - }, - /* .cryptoErrorIntrConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_ERROR_INTR_NR, - /* .cm0pSrc */ cpuss_interrupt_crypto_IRQn, -#else - /* .intrSrc */ cpuss_interrupt_crypto_IRQn, -#endif - /* .intrPriority */ CY_CRYPTO_ERROR_INTR_PR, - } -#endif - -}; - - -/* [] END OF FILE */ - diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.h deleted file mode 100644 index 289ee2f951..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_config.h +++ /dev/null @@ -1,57 +0,0 @@ -/***************************************************************************//** -* \file cy_crypto_config.h -* \version 2.0 -* -* \brief -* This file provides user parameters for the Crypto driver. -* -******************************************************************************** -* \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -#if !defined(CY_CRYPTO_CONFIG_H) -#define CY_CRYPTO_CONFIG_H - -#include "cy_device_headers.h" -#include "crypto/cy_crypto_common.h" - -/* Defines to configure Crypto driver */ -extern const cy_stc_crypto_config_t cryptoConfig; - -/** -* \addtogroup group_crypto_config_macros -* \{ -* -* These constants defines an interrupts settings for IPC channel used for the -* client-server communications. -* -* On the CM4 core crypto driver uses IPC hardware depended interrupt sources. -* -* For CM0+ core user must define the multiplexed interrupt sources by yourself. -*/ - -/** Number of Crypto Notify interrupt mapped to CM0+ */ -#define CY_CRYPTO_CM0_NOTIFY_INTR_NR (NvicMux2_IRQn) -/** Priority of Crypto Notify interrupt, equal to CM0+ and CM4 cores */ -#define CY_CRYPTO_NOTIFY_INTR_PR (2u) - -/** Number of Crypto Release interrupt mapped to CM0+ */ -#define CY_CRYPTO_CM0_RELEASE_INTR_NR (NvicMux30_IRQn) -/** Priority of Crypto Release interrupt, equal to CM0+ and CM4 cores */ -#define CY_CRYPTO_RELEASE_INTR_PR (2u) - -/** Number of Crypto Error interrupt mapped to CM0+ */ -#define CY_CRYPTO_CM0_ERROR_INTR_NR (NvicMux31_IRQn) -/** Priority of Crypto Error interrupt mapped to CM0+ */ -#define CY_CRYPTO_ERROR_INTR_PR (2u) - -/** \} group_crypto_config_macros */ - -#endif /* #if !defined(CY_CRYPTO_CONFIG_H) */ - - -/* [] END OF FILE */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_server.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_server.h deleted file mode 100644 index 51a1298a38..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/crypto/cy_crypto_server.h +++ /dev/null @@ -1,125 +0,0 @@ -/***************************************************************************//** -* \file cy_crypto_server.h -* \version 2.0 -* -* \brief -* This file provides the prototypes for common API -* in the Crypto driver. -* -******************************************************************************** -* \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - - -#if !defined(CY_CRYPTO_SERVER_H) -#define CY_CRYPTO_SERVER_H - -#include "crypto/cy_crypto_common.h" -#include "syslib/cy_syslib.h" - -#if (CY_CRYPTO_CORE_ENABLE) - -#if (CPUSS_CRYPTO_PRESENT == 1) - -#if defined(__cplusplus) -extern "C" { -#endif - -/** -* \addtogroup group_crypto_srv_functions -* \{ -*/ - -/******************************************************************************* -* Function Name: Cy_Crypto_Server_Start -****************************************************************************//** -* -* This function starts the Crypto server on the CM0+ core, sets up an interrupt -* for the IPC Crypto channel on the CM0+ core, sets up an interrupt -* to catch Crypto HW errors. Should be invoked only on CM0. -* -* This function available for CM0+ core only. -* -* \param config -* The Crypto configuration structure. -* -* \param context -* The pointer to the \ref cy_stc_crypto_server_context_t structure that stores -* the Crypto server context. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Server_Start(cy_stc_crypto_config_t const *config, - cy_stc_crypto_server_context_t *context); - -/******************************************************************************* -* Function Name: Cy_Crypto_Server_Stop -****************************************************************************//** -* -* This function stops the Crypto server by disabling the IPC notify interrupt -* and Crypto error interrupt. Should be invoked only on CM0. -* -* This function available for CM0+ core only. -* -* \return -* A Crypto status \ref cy_en_crypto_status_t. -* -*******************************************************************************/ -cy_en_crypto_status_t Cy_Crypto_Server_Stop(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Server_Process -****************************************************************************//** -* -* This function parses input data received from the Crypto Client, -* runs the appropriate Crypto function and releases the Crypto IPC channel. -* -* This function available for CM0+ core only. -* -*******************************************************************************/ -void Cy_Crypto_Server_Process(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Server_GetDataHandler -****************************************************************************//** -* -* This function is a IPC Crypto channel notify interrupt-routine. -* It receives information from the Crypto client, -* runs the process if user not setup own handler. -* -* This function available for CM0+ core only. -* -*******************************************************************************/ -void Cy_Crypto_Server_GetDataHandler(void); - -/******************************************************************************* -* Function Name: Cy_Crypto_Server_ErrorHandler -****************************************************************************//** -* -* This function is a routine to handle an interrupt caused by the Crypto hardware error. -* -* This function available for CM0+ core only. -* -*******************************************************************************/ -void Cy_Crypto_Server_ErrorHandler(void); - -/** \} group_crypto_srv_functions */ - -#if defined(__cplusplus) -} -#endif - -#endif /* #if (CPUSS_CRYPTO_PRESENT == 1) */ - -#endif /* #if (CY_CRYPTO_CORE_ENABLE) */ - -#endif /* #if !defined(CY_CRYPTO_SERVER_H) */ - - -/* [] END OF FILE */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.c index 835f0c58b0..ba0d725b21 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "ctb/cy_ctb.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.h index 2554ac076a..cceedf093b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctb/cy_ctb.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.c index cc77ee2df8..7ec4d5838d 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "ctdac/cy_ctdac.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.h index 9b32c4e500..ddfb6b9922 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ctdac/cy_ctdac.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.c index ec638423de..5f9bd8164b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_dma.h" @@ -54,7 +52,7 @@ cy_en_dma_status_t Cy_DMA_Descriptor_Init(cy_stc_dma_descriptor_t * descriptor, CY_ASSERT_L3(CY_DMA_IS_CHANNEL_STATE_VALID(config->channelState)); CY_ASSERT_L3(CY_DMA_IS_DATA_SIZE_VALID(config->dataSize)); CY_ASSERT_L3(CY_DMA_IS_TYPE_VALID(config->descriptorType)); - + descriptor->ctl = _VAL2FLD(CY_DMA_CTL_RETRIG, config->retrigger) | _VAL2FLD(CY_DMA_CTL_INTR_TYPE, config->interruptType) | @@ -82,37 +80,37 @@ cy_en_dma_status_t Cy_DMA_Descriptor_Init(cy_stc_dma_descriptor_t * descriptor, CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->srcXincrement)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->dstXincrement)); CY_ASSERT_L2(CY_DMA_IS_COUNT_VALID(config->xCount)); - + descriptor->xCtl = _VAL2FLD(CY_DMA_CTL_SRC_INCR, config->srcXincrement) | _VAL2FLD(CY_DMA_CTL_DST_INCR, config->dstXincrement) | /* Convert the data count from the user's range (1-256) into the machine range (0-255). */ _VAL2FLD(CY_DMA_CTL_COUNT, config->xCount - 1UL); - + descriptor->yCtl = (uint32_t)config->nextDescriptor; break; } case CY_DMA_2D_TRANSFER: - { + { CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->srcXincrement)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->dstXincrement)); CY_ASSERT_L2(CY_DMA_IS_COUNT_VALID(config->xCount)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->srcYincrement)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(config->dstYincrement)); CY_ASSERT_L2(CY_DMA_IS_COUNT_VALID(config->yCount)); - + descriptor->xCtl = _VAL2FLD(CY_DMA_CTL_SRC_INCR, config->srcXincrement) | _VAL2FLD(CY_DMA_CTL_DST_INCR, config->dstXincrement) | /* Convert the data count from the user's range (1-256) into the machine range (0-255). */ _VAL2FLD(CY_DMA_CTL_COUNT, config->xCount - 1UL); - + descriptor->yCtl = _VAL2FLD(CY_DMA_CTL_SRC_INCR, config->srcYincrement) | _VAL2FLD(CY_DMA_CTL_DST_INCR, config->dstYincrement) | /* Convert the data count from the user's range (1-256) into the machine range (0-255). */ _VAL2FLD(CY_DMA_CTL_COUNT, config->yCount - 1UL); - + descriptor->nextPtr = (uint32_t)config->nextDescriptor; break; } @@ -178,7 +176,7 @@ cy_en_dma_status_t Cy_DMA_Channel_Init(DW_Type * base, uint32_t channel, cy_stc_ if (((CY_DMA_IS_DW_CH_NR_VALID(base, channel)) && (NULL != channelConfig) && (NULL != channelConfig->descriptor))) { CY_ASSERT_L2(CY_DMA_IS_PRIORITY_VALID(channelConfig->priority)); - + /* Set the current descriptor */ base->CH_STRUCT[channel].CH_CURR_PTR = (uint32_t)channelConfig->descriptor; @@ -210,7 +208,7 @@ cy_en_dma_status_t Cy_DMA_Channel_Init(DW_Type * base, uint32_t channel, cy_stc_ void Cy_DMA_Channel_DeInit(DW_Type * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + base->CH_STRUCT[channel].CH_CTL = 0UL; base->CH_STRUCT[channel].CH_IDX = 0UL; base->CH_STRUCT[channel].CH_CURR_PTR = 0UL; @@ -226,8 +224,8 @@ void Cy_DMA_Channel_DeInit(DW_Type * base, uint32_t channel) * * Based on the descriptor type, the offset of the address for the next descriptor may * vary. For the single-transfer descriptor type, this register is at offset 0x0c. -* For the 1D-transfer descriptor type, this register is at offset 0x10. -* For the 2D-transfer descriptor type, this register is at offset 0x14. +* For the 1D-transfer descriptor type, this register is at offset 0x10. +* For the 2D-transfer descriptor type, this register is at offset 0x14. * * \param descriptor * The descriptor structure instance declared by the user/component. @@ -239,21 +237,21 @@ void Cy_DMA_Channel_DeInit(DW_Type * base, uint32_t channel) void Cy_DMA_Descriptor_SetNextDescriptor(cy_stc_dma_descriptor_t * descriptor, cy_stc_dma_descriptor_t const * nextDescriptor) { CY_ASSERT_L1(NULL != descriptor); - + switch((cy_en_dma_descriptor_type_t) _FLD2VAL(CY_DMA_CTL_TYPE, descriptor->ctl)) { case CY_DMA_SINGLE_TRANSFER: descriptor->xCtl = (uint32_t)nextDescriptor; break; - + case CY_DMA_1D_TRANSFER: descriptor->yCtl = (uint32_t)nextDescriptor; break; - + case CY_DMA_2D_TRANSFER: descriptor->nextPtr = (uint32_t)nextDescriptor; break; - + default: /* Unsupported type of descriptor */ break; @@ -269,8 +267,8 @@ void Cy_DMA_Descriptor_SetNextDescriptor(cy_stc_dma_descriptor_t * descriptor, c * * Based on the descriptor type, the offset of the address for the next descriptor may * vary. For a single-transfer descriptor type, this register is at offset 0x0c. -* For the 1D-transfer descriptor type, this register is at offset 0x10. -* For the 2D-transfer descriptor type, this register is at offset 0x14. +* For the 1D-transfer descriptor type, this register is at offset 0x10. +* For the 2D-transfer descriptor type, this register is at offset 0x14. * * \param descriptor * The descriptor structure instance declared by the user/component. @@ -282,28 +280,28 @@ void Cy_DMA_Descriptor_SetNextDescriptor(cy_stc_dma_descriptor_t * descriptor, c cy_stc_dma_descriptor_t * Cy_DMA_Descriptor_GetNextDescriptor(cy_stc_dma_descriptor_t const * descriptor) { cy_stc_dma_descriptor_t * retVal = NULL; - + CY_ASSERT_L1(NULL != descriptor); - + switch((cy_en_dma_descriptor_type_t) _FLD2VAL(CY_DMA_CTL_TYPE, descriptor->ctl)) { case CY_DMA_SINGLE_TRANSFER: retVal = (cy_stc_dma_descriptor_t*) descriptor->xCtl; break; - + case CY_DMA_1D_TRANSFER: retVal = (cy_stc_dma_descriptor_t*) descriptor->yCtl; break; - + case CY_DMA_2D_TRANSFER: retVal = (cy_stc_dma_descriptor_t*) descriptor->nextPtr; break; - + default: /* An unsupported type of the descriptor */ break; } - + return (retVal); } @@ -315,19 +313,19 @@ cy_stc_dma_descriptor_t * Cy_DMA_Descriptor_GetNextDescriptor(cy_stc_dma_descrip * Sets the descriptor's type for the specified descriptor. * Moves the next descriptor register value into the proper place in accordance * to the actual descriptor type. -* During the descriptor's type changing, the Xloop and Yloop settings, such as -* data count and source/destination increment (i.e. the content of the -* xCtl and yCtl descriptor registers) might be lost (overriden by the +* During the descriptor's type changing, the Xloop and Yloop settings, such as +* data count and source/destination increment (i.e. the content of the +* xCtl and yCtl descriptor registers) might be lost (overriden by the * next descriptor value) because of the different descriptor registers structures * for different descriptor types. Set up carefully the Xloop * (and Yloop, if used) data count and source/destination increment if the -* descriptor type is changed from a simpler to a more complicated type +* descriptor type is changed from a simpler to a more complicated type * ("single transfer" -> "1D", "1D" -> "2D", etc.). -* +* * \param descriptor * The descriptor structure instance declared by the user/component. * -* \param descriptorType +* \param descriptorType * The descriptor type \ref cy_en_dma_descriptor_type_t. * *******************************************************************************/ @@ -335,7 +333,7 @@ void Cy_DMA_Descriptor_SetDescriptorType(cy_stc_dma_descriptor_t * descriptor, c { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_TYPE_VALID(descriptorType)); - + if (descriptorType != Cy_DMA_Descriptor_GetDescriptorType(descriptor)) /* Don't perform if the type is not changed */ { /* Store the current nextDescriptor pointer. */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.h index acb7051ec9..85b1857aaa 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/dma/cy_dma.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -21,11 +19,11 @@ * The DMA channel can be used in any project to transfer data * without CPU intervention basing on a hardware trigger signal from another component. * -* A device may support more than one DMA hardware block. Each block has a set of -* registers, a base hardware address, and supports multiple channels. -* Many API functions for the DMA driver require a base hardware address and +* A device may support more than one DMA hardware block. Each block has a set of +* registers, a base hardware address, and supports multiple channels. +* Many API functions for the DMA driver require a base hardware address and * channel number. Ensure that you use the correct hardware address for the DMA block in use. -* +* * Features: * * Devices support up to two DMA hardware blocks * * Each DMA block supports up to 16 DMA channels @@ -38,14 +36,14 @@ * * To set up a DMA driver, initialize a descriptor, * intialize and enable a channel, and enable the DMA block. -* -* To set up a descriptor, provide the configuration parameters for the -* descriptor in the \ref cy_stc_dma_descriptor_config_t structure. Then call the -* \ref Cy_DMA_Descriptor_Init function to initialize the descriptor in SRAM. You can -* modify the source and destination addresses dynamically by calling +* +* To set up a descriptor, provide the configuration parameters for the +* descriptor in the \ref cy_stc_dma_descriptor_config_t structure. Then call the +* \ref Cy_DMA_Descriptor_Init function to initialize the descriptor in SRAM. You can +* modify the source and destination addresses dynamically by calling * \ref Cy_DMA_Descriptor_SetSrcAddress and \ref Cy_DMA_Descriptor_SetDstAddress. -* -* To set up a DMA channel, provide a filled \ref cy_stc_dma_channel_config_t +* +* To set up a DMA channel, provide a filled \ref cy_stc_dma_channel_config_t * structure. Call the \ref Cy_DMA_Channel_Init function, specifying the channel * number. Use \ref Cy_DMA_Channel_Enable to enable the configured DMA channel. * @@ -60,15 +58,15 @@ * in a typical user application: * \image html dma.png * -* NOTE: Even if a DMA channel is enabled, it is not operational until +* NOTE: Even if a DMA channel is enabled, it is not operational until * the DMA block is enabled using function \ref Cy_DMA_Enable.\n -* NOTE: if the DMA descriptor is configured to generate an interrupt, -* the interrupt must be enabled using the \ref Cy_DMA_Channel_SetInterruptMask +* NOTE: if the DMA descriptor is configured to generate an interrupt, +* the interrupt must be enabled using the \ref Cy_DMA_Channel_SetInterruptMask * function for each DMA channel. * * For example: * \snippet dma/dma_v2_0_sut_00.cydsn/main_cm4.c Cy_DMA_Snippet -* +* * \section group_dma_more_information More Information. * See: the DMA chapter of the device technical reference manual (TRM); * the DMA Component datasheet; @@ -120,10 +118,10 @@ * The \ref Cy_DMA_Descriptor_Init function sets a full bunch of descriptor * settings, and the rest of the descriptor API is a get/set interface * to each of the descriptor settings. -* * There is a group of macros to support the backward compatibility with most +* * There is a group of macros to support the backward compatibility with most * of the driver version 1.0 API. But, it is strongly recommended to use * the new v2.0 interface in new designs (do not just copy-paste from old -* projects). To enable the backward compatibility support, the CY_DMA_BWC +* projects). To enable the backward compatibility support, the CY_DMA_BWC * definition should be changed to "1". * * @@ -180,11 +178,11 @@ extern "C" { /** The DMA driver identifier */ #define CY_DMA_ID (CY_PDL_DRV_ID(0x13U)) - + /** The DMA channel interrupt mask */ #define CY_DMA_INTR_MASK (0x01UL) -/** The backward compatibility flag. Enables a group of macros which provide +/** The backward compatibility flag. Enables a group of macros which provide * the backward compatibility with most of the DMA driver version 1.0 interface. */ #ifndef CY_DMA_BWC #define CY_DMA_BWC (0U) @@ -261,7 +259,7 @@ typedef enum } cy_en_dma_channel_state_t; /** This enum has the return values of the DMA driver */ -typedef enum +typedef enum { CY_DMA_SUCCESS = 0x00UL, /**< Success. */ CY_DMA_BAD_PARAM = CY_DMA_ID | CY_PDL_STATUS_ERROR | 0x01UL /**< The input parameters passed to the DMA API are not valid. */ @@ -281,26 +279,26 @@ typedef enum (CY_DMA_RETRIG_4CYC == (retrigger)) || \ (CY_DMA_RETRIG_16CYC == (retrigger)) || \ (CY_DMA_WAIT_FOR_REACT == (retrigger))) - + #define CY_DMA_IS_TRIG_TYPE_VALID(trigType) ((CY_DMA_1ELEMENT == (trigType)) || \ (CY_DMA_X_LOOP == (trigType)) || \ (CY_DMA_DESCR == (trigType)) || \ (CY_DMA_DESCR_CHAIN == (trigType))) - + #define CY_DMA_IS_XFER_SIZE_VALID(xferSize) ((CY_DMA_TRANSFER_SIZE_DATA == (xferSize)) || \ (CY_DMA_TRANSFER_SIZE_WORD == (xferSize))) - + #define CY_DMA_IS_CHANNEL_STATE_VALID(state) ((CY_DMA_CHANNEL_ENABLED == (state)) || \ (CY_DMA_CHANNEL_DISABLED == (state))) - + #define CY_DMA_IS_DATA_SIZE_VALID(dataSize) ((CY_DMA_BYTE == (dataSize)) || \ (CY_DMA_HALFWORD == (dataSize)) || \ (CY_DMA_WORD == (dataSize))) - + #define CY_DMA_IS_TYPE_VALID(descrType) ((CY_DMA_SINGLE_TRANSFER == (descrType)) || \ (CY_DMA_1D_TRANSFER == (descrType)) || \ (CY_DMA_2D_TRANSFER == (descrType))) - + #define CY_DMA_IS_DW_CH_NR_VALID(dwNr, chNr) (((0U != CPUSS_DW0_PRESENT) && (DW0 == (dwNr)) && ((chNr) < CPUSS_DW0_CH_NR)) || \ ((0U != CPUSS_DW1_PRESENT) && (DW1 == (dwNr)) && ((chNr) < CPUSS_DW1_CH_NR))) @@ -339,14 +337,14 @@ typedef enum * \{ */ -/** -* DMA descriptor structure type. It is a user/component-declared structure +/** +* DMA descriptor structure type. It is a user/component-declared structure * allocated in RAM. The DMA HW requires a pointer to this structure to work with it. * * For advanced users: the descriptor can be allocated even in Flash, then the user -* manually predefines all the structure items with constants, +* manually predefines all the structure items with constants, * bacause most of the driver's API (especially functions modifying -* descriptors, including \ref Cy_DMA_Descriptor_Init()) can't work with +* descriptors, including \ref Cy_DMA_Descriptor_Init()) can't work with * read-only descriptors. */ typedef struct @@ -422,7 +420,7 @@ __STATIC_INLINE void * Cy_DMA_GetActiveDstAddress(DW_Type const * base); cy_en_dma_status_t Cy_DMA_Descriptor_Init (cy_stc_dma_descriptor_t * descriptor, cy_stc_dma_descriptor_config_t const * config); void Cy_DMA_Descriptor_DeInit(cy_stc_dma_descriptor_t * descriptor); - + void Cy_DMA_Descriptor_SetNextDescriptor (cy_stc_dma_descriptor_t * descriptor, cy_stc_dma_descriptor_t const * nextDescriptor); void Cy_DMA_Descriptor_SetDescriptorType (cy_stc_dma_descriptor_t * descriptor, cy_en_dma_descriptor_type_t descriptorType); __STATIC_INLINE void Cy_DMA_Descriptor_SetSrcAddress (cy_stc_dma_descriptor_t * descriptor, void const * srcAddress); @@ -623,7 +621,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetSrcAddress(cy_stc_dma_descriptor_t * d ****************************************************************************//** * * Returns the source address parameter of the specified descriptor. -* +* * \param descriptor * The descriptor structure instance declared by the user/component. * @@ -661,7 +659,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetDstAddress(cy_stc_dma_descriptor_t * d ****************************************************************************//** * * Returns the destination address parameter of the specified descriptor. -* +* * \param descriptor * The descriptor structure instance declared by the user/component. * @@ -692,7 +690,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetInterruptType(cy_stc_dma_descriptor_t { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_TRIG_TYPE_VALID(interruptType)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_INTR_TYPE, interruptType); } @@ -708,12 +706,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetInterruptType(cy_stc_dma_descriptor_t * * \return * The Interrupt-Type \ref cy_en_dma_trigger_type_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_trigger_type_t Cy_DMA_Descriptor_GetInterruptType(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_INTR_TYPE, descriptor->ctl)); } @@ -735,7 +733,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetTriggerInType(cy_stc_dma_descriptor_t { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_TRIG_TYPE_VALID(triggerInType)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_TR_IN_TYPE, triggerInType); } @@ -751,12 +749,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetTriggerInType(cy_stc_dma_descriptor_t * * \return * The Trigger-In-Type \ref cy_en_dma_trigger_type_t -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_trigger_type_t Cy_DMA_Descriptor_GetTriggerInType(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_TR_IN_TYPE, descriptor->ctl)); } @@ -778,7 +776,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetTriggerOutType(cy_stc_dma_descriptor_t { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_TRIG_TYPE_VALID(triggerOutType)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_TR_OUT_TYPE, triggerOutType); } @@ -794,12 +792,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetTriggerOutType(cy_stc_dma_descriptor_t * * \return * The Trigger-Out-Type parameter \ref cy_en_dma_trigger_type_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_trigger_type_t Cy_DMA_Descriptor_GetTriggerOutType(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_trigger_type_t) _FLD2VAL(CY_DMA_CTL_TR_OUT_TYPE, descriptor->ctl)); } @@ -815,13 +813,13 @@ __STATIC_INLINE cy_en_dma_trigger_type_t Cy_DMA_Descriptor_GetTriggerOutType(cy_ * * \param dataSize * The Data Element Size \ref cy_en_dma_data_size_t -* +* *******************************************************************************/ __STATIC_INLINE void Cy_DMA_Descriptor_SetDataSize(cy_stc_dma_descriptor_t * descriptor, cy_en_dma_data_size_t dataSize) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_DATA_SIZE_VALID(dataSize)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_DATA_SIZE, dataSize); } @@ -837,12 +835,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetDataSize(cy_stc_dma_descriptor_t * des * * \return * The Data Element Size \ref cy_en_dma_data_size_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_data_size_t Cy_DMA_Descriptor_GetDataSize(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_data_size_t) _FLD2VAL(CY_DMA_CTL_DATA_SIZE, descriptor->ctl)); } @@ -880,12 +878,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetSrcTransferSize(cy_stc_dma_descriptor_ * * \return * The Source Transfer Size \ref cy_en_dma_transfer_size_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_transfer_size_t Cy_DMA_Descriptor_GetSrcTransferSize(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_transfer_size_t) _FLD2VAL(CY_DMA_CTL_SRC_SIZE, descriptor->ctl)); } @@ -907,7 +905,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetDstTransferSize(cy_stc_dma_descriptor_ { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_XFER_SIZE_VALID(dstTransferSize)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_DST_SIZE, dstTransferSize); } @@ -923,12 +921,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetDstTransferSize(cy_stc_dma_descriptor_ * * \return * The Destination Transfer Size \ref cy_en_dma_transfer_size_t -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_transfer_size_t Cy_DMA_Descriptor_GetDstTransferSize(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_transfer_size_t) _FLD2VAL(CY_DMA_CTL_DST_SIZE, descriptor->ctl)); } @@ -937,13 +935,13 @@ __STATIC_INLINE cy_en_dma_transfer_size_t Cy_DMA_Descriptor_GetDstTransferSize(c * Function Name: Cy_DMA_Descriptor_SetRetrigger ****************************************************************************//** * -* Sets the retrigger value which specifies whether the controller should +* Sets the retrigger value which specifies whether the controller should * wait for the input trigger to be deactivated. * * \param descriptor * The descriptor structure instance declared by the user/component. * -* \param retrigger +* \param retrigger * The \ref cy_en_dma_retrigger_t parameter specifies whether the controller * should wait for the input trigger to be deactivated. * @@ -952,7 +950,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetRetrigger(cy_stc_dma_descriptor_t * de { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_RETRIGGER_VALID(retrigger)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_RETRIG, retrigger); } @@ -961,7 +959,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetRetrigger(cy_stc_dma_descriptor_t * de * Function Name: Cy_DMA_Descriptor_GetRetrigger ****************************************************************************//** * -* Returns a value which specifies whether the controller should +* Returns a value which specifies whether the controller should * wait for the input trigger to be deactivated. * * \param descriptor @@ -969,12 +967,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetRetrigger(cy_stc_dma_descriptor_t * de * * \return * The Retrigger setting \ref cy_en_dma_retrigger_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_retrigger_t Cy_DMA_Descriptor_GetRetrigger(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_retrigger_t) _FLD2VAL(CY_DMA_CTL_RETRIG, descriptor->ctl)); } @@ -990,12 +988,12 @@ __STATIC_INLINE cy_en_dma_retrigger_t Cy_DMA_Descriptor_GetRetrigger(cy_stc_dma_ * * \return * The descriptor type \ref cy_en_dma_descriptor_type_t -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_descriptor_type_t Cy_DMA_Descriptor_GetDescriptorType(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_descriptor_type_t) _FLD2VAL(CY_DMA_CTL_TYPE, descriptor->ctl)); } @@ -1009,7 +1007,7 @@ __STATIC_INLINE cy_en_dma_descriptor_type_t Cy_DMA_Descriptor_GetDescriptorType( * \param descriptor * The descriptor structure instance declared by the user/component. * -* \param channelState +* \param channelState * The channel state \ref cy_en_dma_channel_state_t. * *******************************************************************************/ @@ -1017,7 +1015,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetChannelState(cy_stc_dma_descriptor_t * { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L3(CY_DMA_IS_CHANNEL_STATE_VALID(channelState)); - + descriptor->ctl = _CLR_SET_FLD32U(descriptor->ctl, CY_DMA_CTL_CH_DISABLE, channelState); } @@ -1033,12 +1031,12 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetChannelState(cy_stc_dma_descriptor_t * * * \return * The Channel State setting \ref cy_en_dma_channel_state_t -* +* *******************************************************************************/ __STATIC_INLINE cy_en_dma_channel_state_t Cy_DMA_Descriptor_GetChannelState(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); - + return((cy_en_dma_channel_state_t) _FLD2VAL(CY_DMA_CTL_CH_DISABLE, descriptor->ctl)); } @@ -1055,7 +1053,7 @@ __STATIC_INLINE cy_en_dma_channel_state_t Cy_DMA_Descriptor_GetChannelState(cy_s * * \param xCount * The number of data elements to transfer in the X loop. -* +* *******************************************************************************/ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopDataCount(cy_stc_dma_descriptor_t * descriptor, uint32_t xCount) { @@ -1079,7 +1077,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopDataCount(cy_stc_dma_descriptor_t * * \return * The number of data elements to transfer in the X loop. -* +* *******************************************************************************/ __STATIC_INLINE uint32_t Cy_DMA_Descriptor_GetXloopDataCount(cy_stc_dma_descriptor_t const * descriptor) { @@ -1109,7 +1107,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopSrcIncrement(cy_stc_dma_descripto CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(srcXincrement)); - + descriptor->xCtl = _CLR_SET_FLD32U(descriptor->xCtl, CY_DMA_CTL_SRC_INCR, srcXincrement); } @@ -1126,13 +1124,13 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopSrcIncrement(cy_stc_dma_descripto * * \return * The value of the source increment. -* +* *******************************************************************************/ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetXloopSrcIncrement(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor)); - + return ((int32_t) _FLD2VAL(CY_DMA_CTL_SRC_INCR, descriptor->xCtl)); } @@ -1149,14 +1147,14 @@ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetXloopSrcIncrement(cy_stc_dma_descri * * \param dstXincrement * The value of the destination increment. The valid range is -2048 ... 2047. -* +* *******************************************************************************/ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopDstIncrement(cy_stc_dma_descriptor_t * descriptor, int32_t dstXincrement) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(dstXincrement)); - + descriptor->xCtl = _CLR_SET_FLD32U(descriptor->xCtl, CY_DMA_CTL_DST_INCR, dstXincrement); } @@ -1173,13 +1171,13 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetXloopDstIncrement(cy_stc_dma_descripto * * \return * The value of the destination increment. -* +* *******************************************************************************/ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetXloopDstIncrement(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_SINGLE_TRANSFER != Cy_DMA_Descriptor_GetDescriptorType(descriptor)); - + return ((int32_t) _FLD2VAL(CY_DMA_CTL_DST_INCR, descriptor->xCtl)); } @@ -1196,7 +1194,7 @@ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetXloopDstIncrement(cy_stc_dma_descri * * \param yCount * The number of X loops to execute in the Y loop. -* +* *******************************************************************************/ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopDataCount(cy_stc_dma_descriptor_t * descriptor, uint32_t yCount) { @@ -1220,7 +1218,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopDataCount(cy_stc_dma_descriptor_t * * \return * The number of X loops to execute in the Y loop. -* +* *******************************************************************************/ __STATIC_INLINE uint32_t Cy_DMA_Descriptor_GetYloopDataCount(cy_stc_dma_descriptor_t const * descriptor) { @@ -1243,14 +1241,14 @@ __STATIC_INLINE uint32_t Cy_DMA_Descriptor_GetYloopDataCount(cy_stc_dma_descript * * \param srcYincrement * The value of the source increment. The valid range is -2048 ... 2047. -* +* *******************************************************************************/ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopSrcIncrement(cy_stc_dma_descriptor_t * descriptor, int32_t srcYincrement) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(srcYincrement)); - + descriptor->yCtl = _CLR_SET_FLD32U(descriptor->yCtl, CY_DMA_CTL_SRC_INCR, srcYincrement); } @@ -1267,13 +1265,13 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopSrcIncrement(cy_stc_dma_descripto * * \return * The value of source increment. -* +* *******************************************************************************/ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetYloopSrcIncrement(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor)); - + return ((int32_t) _FLD2VAL(CY_DMA_CTL_SRC_INCR, descriptor->yCtl)); } @@ -1297,7 +1295,7 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopDstIncrement(cy_stc_dma_descripto CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor)); CY_ASSERT_L2(CY_DMA_IS_INCR_VALID(dstYincrement)); - + descriptor->yCtl = _CLR_SET_FLD32U(descriptor->yCtl, CY_DMA_CTL_DST_INCR, dstYincrement); } @@ -1307,20 +1305,20 @@ __STATIC_INLINE void Cy_DMA_Descriptor_SetYloopDstIncrement(cy_stc_dma_descripto ****************************************************************************//** * * Returns the destination increment parameter for the Y loop of the specified -* descriptor (for 2D descriptors only). +* descriptor (for 2D descriptors only). * * \param descriptor * The descriptor structure instance declared by the user/component. * * \return * The value of the destination increment. -* +* *******************************************************************************/ __STATIC_INLINE int32_t Cy_DMA_Descriptor_GetYloopDstIncrement(cy_stc_dma_descriptor_t const * descriptor) { CY_ASSERT_L1(NULL != descriptor); CY_ASSERT_L1(CY_DMA_2D_TRANSFER == Cy_DMA_Descriptor_GetDescriptorType(descriptor)); - + return ((int32_t) _FLD2VAL(CY_DMA_CTL_DST_INCR, descriptor->yCtl)); } @@ -1354,7 +1352,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetDescriptor(DW_Type * base, uint32_t chann { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); CY_ASSERT_L1(NULL != descriptor); - + base->CH_STRUCT[channel].CH_CURR_PTR = (uint32_t)descriptor; base->CH_STRUCT[channel].CH_IDX &= (uint32_t) ~(DW_CH_STRUCT_CH_IDX_X_IDX_Msk | DW_CH_STRUCT_CH_IDX_Y_IDX_Msk); } @@ -1376,7 +1374,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetDescriptor(DW_Type * base, uint32_t chann __STATIC_INLINE void Cy_DMA_Channel_Enable(DW_Type * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + base->CH_STRUCT[channel].CH_CTL |= DW_CH_STRUCT_CH_CTL_ENABLED_Msk; } @@ -1397,7 +1395,7 @@ __STATIC_INLINE void Cy_DMA_Channel_Enable(DW_Type * base, uint32_t channel) __STATIC_INLINE void Cy_DMA_Channel_Disable(DW_Type * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + base->CH_STRUCT[channel].CH_CTL &= (uint32_t) ~DW_CH_STRUCT_CH_CTL_ENABLED_Msk; } @@ -1422,7 +1420,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetPriority(DW_Type * base, uint32_t channel { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); CY_ASSERT_L2(CY_DMA_IS_PRIORITY_VALID(priority)); - + base->CH_STRUCT[channel].CH_CTL = _CLR_SET_FLD32U(base->CH_STRUCT[channel].CH_CTL, DW_CH_STRUCT_CH_CTL_PRIO, priority); } @@ -1446,7 +1444,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetPriority(DW_Type * base, uint32_t channel __STATIC_INLINE uint32_t Cy_DMA_Channel_GetPriority(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return ((uint32_t) _FLD2VAL(DW_CH_STRUCT_CH_CTL_PRIO, base->CH_STRUCT[channel].CH_CTL)); } @@ -1470,7 +1468,7 @@ __STATIC_INLINE uint32_t Cy_DMA_Channel_GetPriority(DW_Type const * base, uint32 __STATIC_INLINE cy_stc_dma_descriptor_t * Cy_DMA_Channel_GetCurrentDescriptor(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return ((cy_stc_dma_descriptor_t*)(base->CH_STRUCT[channel].CH_CURR_PTR)); } @@ -1495,7 +1493,7 @@ __STATIC_INLINE cy_stc_dma_descriptor_t * Cy_DMA_Channel_GetCurrentDescriptor(DW __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptStatus(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return (base->CH_STRUCT[channel].INTR); } @@ -1519,7 +1517,7 @@ __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptStatus(DW_Type const * base, __STATIC_INLINE cy_en_dma_intr_cause_t Cy_DMA_Channel_GetStatus(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return ((cy_en_dma_intr_cause_t) _FLD2VAL(DW_CH_STRUCT_CH_STATUS_INTR_CAUSE, base->CH_STRUCT[channel].CH_STATUS)); } @@ -1540,7 +1538,7 @@ __STATIC_INLINE cy_en_dma_intr_cause_t Cy_DMA_Channel_GetStatus(DW_Type const * __STATIC_INLINE void Cy_DMA_Channel_ClearInterrupt(DW_Type * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + base->CH_STRUCT[channel].INTR = CY_DMA_INTR_MASK; (void) base->CH_STRUCT[channel].INTR; } @@ -1562,7 +1560,7 @@ __STATIC_INLINE void Cy_DMA_Channel_ClearInterrupt(DW_Type * base, uint32_t chan __STATIC_INLINE void Cy_DMA_Channel_SetInterrupt(DW_Type * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + base->CH_STRUCT[channel].INTR_SET = CY_DMA_INTR_MASK; } @@ -1586,7 +1584,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetInterrupt(DW_Type * base, uint32_t channe __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptMask(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return (base->CH_STRUCT[channel].INTR_MASK); } @@ -1633,7 +1631,7 @@ __STATIC_INLINE void Cy_DMA_Channel_SetInterruptMask(DW_Type * base, uint32_t ch __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptStatusMasked(DW_Type const * base, uint32_t channel) { CY_ASSERT_L1(CY_DMA_IS_DW_CH_NR_VALID(base, channel)); - + return (base->CH_STRUCT[channel].INTR_MASKED); } @@ -1686,14 +1684,14 @@ __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptStatusMasked(DW_Type const * #define CY_DMA_TRIGOUT_X_LOOP_CMPLT (CY_DMA_X_LOOP) #define CY_DMA_TRIGOUT_DESCR_CMPLT (CY_DMA_DESCR) #define CY_DMA_TRIGOUT_DESCRCHAIN_CMPLT (CY_DMA_DESCR_CHAIN) - + #define CY_DMA_TRIGIN_1ELEMENT (CY_DMA_1ELEMENT) #define CY_DMA_TRIGIN_XLOOP (CY_DMA_X_LOOP) #define CY_DMA_TRIGIN_DESCR (CY_DMA_DESCR) #define CY_DMA_TRIGIN_DESCRCHAIN (CY_DMA_DESCR_CHAIN) #define CY_DMA_INVALID_INPUT_PARAMETERS (CY_DMA_BAD_PARAM) - + #define CY_DMA_RETDIG_IM (CY_DMA_RETRIG_IM) #define CY_DMA_RETDIG_4CYC (CY_DMA_RETRIG_4CYC) #define CY_DMA_RETDIG_16CYC (CY_DMA_RETRIG_16CYC) @@ -1705,7 +1703,7 @@ __STATIC_INLINE uint32_t Cy_DMA_Channel_GetInterruptStatusMasked(DW_Type const * #define DESCR_X_CTL xCtl #define DESCR_Y_CTL yCtl #define DESCR_NEXT_PTR nextPtr - + /* Descriptor structure bit-fields */ #define DW_DESCR_STRUCT_DESCR_CTL_WAIT_FOR_DEACT_Pos 0UL #define DW_DESCR_STRUCT_DESCR_CTL_WAIT_FOR_DEACT_Msk 0x3UL diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.c index 00fff84925..0892255e78 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_efuse.h" @@ -51,11 +49,11 @@ static cy_en_efuse_status_t ProcessOpcode(void); * * The EFUSE_EFUSE_NR macro is defined in the series-specific header file, e.g * \e \/devices/psoc6/psoc63/include/psoc63_config.\e h -* -* \param bitVal +* +* \param bitVal * The pointer to the location to store the bit value. * -* \return +* \return * \ref cy_en_efuse_status_t * * \funcusage @@ -67,16 +65,16 @@ static cy_en_efuse_status_t ProcessOpcode(void); cy_en_efuse_status_t Cy_EFUSE_GetEfuseBit(uint32_t bitNum, bool *bitVal) { cy_en_efuse_status_t result = CY_EFUSE_BAD_PARAM; - + if (bitVal != NULL) { uint32_t offset = bitNum / CY_EFUSE_BITS_PER_BYTE; uint8_t byteVal; *bitVal = false; - + /* Read the eFuse byte */ result = Cy_EFUSE_GetEfuseByte(offset, &byteVal); - + if (result == CY_EFUSE_SUCCESS) { uint32_t bitPos = bitNum % CY_EFUSE_BITS_PER_BYTE; @@ -112,7 +110,7 @@ cy_en_efuse_status_t Cy_EFUSE_GetEfuseBit(uint32_t bitNum, bool *bitVal) * \param byteVal * The pointer to the location to store eFuse data. * -* \return +* \return * \ref cy_en_efuse_status_t * * \funcusage @@ -124,20 +122,20 @@ cy_en_efuse_status_t Cy_EFUSE_GetEfuseBit(uint32_t bitNum, bool *bitVal) cy_en_efuse_status_t Cy_EFUSE_GetEfuseByte(uint32_t offset, uint8_t *byteVal) { cy_en_efuse_status_t result = CY_EFUSE_BAD_PARAM; - + if (byteVal != NULL) { /* Prepare opcode before calling the SROM API */ opcode = CY_EFUSE_OPCODE_READ_FUSE_BYTE | (offset << CY_EFUSE_OPCODE_OFFSET_Pos); - + /* Send the IPC message */ if (Cy_IPC_Drv_SendMsgPtr(CY_EFUSE_IPC_STRUCT, CY_EFUSE_IPC_NOTIFY_STRUCT0, (void*)&opcode) == CY_IPC_DRV_SUCCESS) - { + { /* Wait until the IPC structure is locked */ while(Cy_IPC_Drv_IsLockAcquired(CY_EFUSE_IPC_STRUCT) != false) { } - + /* The result of the SROM API call is returned to the opcode variable */ if ((opcode & CY_EFUSE_OPCODE_STS_Msk) == CY_EFUSE_OPCODE_SUCCESS) { @@ -187,7 +185,7 @@ uint32_t Cy_EFUSE_GetExternalStatus(void) * Function Name: ProcessOpcode ****************************************************************************//** * -* Converts System Call returns to the eFuse driver return defines. If +* Converts System Call returns to the eFuse driver return defines. If * an unknown error was returned, the error code can be accessed via the * Cy_EFUSE_GetExternalStatus() function. * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.h index 9f09c5cc00..4c8a12763a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/efuse/cy_efuse.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_EFUSE_H) @@ -18,7 +16,7 @@ /** * \defgroup group_efuse Electronic Fuses (eFuse) * \{ -* +* * Electronic Fuses (eFuses) - non-volatile memory whose * each bit is one-time programmable (OTP). One eFuse macro consists of * 256 bits (32 * 8). The PSoC devices have up to 16 eFuse macros; consult the @@ -28,7 +26,7 @@ * - eFuses are used to control the device life-cycle stage (NORMAL, SECURE, * and SECURE_WITH_DEBUG) and the protection settings; * - eFuse memory can be programmed (eFuse bit value changed from '0' to '1') -* only once; if an eFuse bit is blown, it cannot be cleared again; +* only once; if an eFuse bit is blown, it cannot be cleared again; * - programming fuses requires the associated I/O supply to be at a specific * level: the VDDIO0 (or VDDIO if only one VDDIO is present in the package) * supply of the device should be set to 2.5 V (±5%); @@ -62,7 +60,7 @@ * conditions from the PSoC 6 Programming Specification are met. * * The code below shows an example of the efuse data structure -* definition to blow SECURE bit of the life-cycle stage register. +* definition to blow SECURE bit of the life-cycle stage register. * The bits to blow are set to the EFUSE_STATE_SET value. * \snippet eFuse_v1_0_sut_00.cydsn/main_cm0p.c SNIPPET_EFUSE_DATA_STC * @@ -139,7 +137,7 @@ * \{ */ /** This enum has the return values of the eFuse driver */ -typedef enum +typedef enum { CY_EFUSE_SUCCESS = 0x00UL, /**< Success */ CY_EFUSE_INVALID_PROTECTION = CY_EFUSE_ID | CY_PDL_STATUS_ERROR | 0x01UL, /**< Invalid access in the current protection state */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.c index dedf6c0dbb..84434d6ded 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "flash/cy_flash.h" #include "sysclk/cy_sysclk.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.h index f46e32e003..cd4255a6c1 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/flash/cy_flash.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_FLASH_H) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.c index c6bbfb8159..dc394efd93 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_gpio.h" @@ -38,7 +36,7 @@ extern "C" { * \return * Initialization status * -* \note +* \note * This function modifies port registers in read-modify-write operations. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -57,8 +55,8 @@ cy_en_gpio_status_t Cy_GPIO_Pin_Init(GPIO_PRT_Type *base, uint32_t pinNum, const CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); CY_ASSERT_L2(CY_GPIO_IS_VALUE_VALID(config->outVal)); CY_ASSERT_L2(CY_GPIO_IS_DM_VALID(config->driveMode)); - CY_ASSERT_L2(CY_GPIO_IS_HSIOM_VALID(config->hsiom)); - CY_ASSERT_L2(CY_GPIO_IS_INT_EDGE_VALID(config->intEdge)); + CY_ASSERT_L2(CY_GPIO_IS_HSIOM_VALID(config->hsiom)); + CY_ASSERT_L2(CY_GPIO_IS_INT_EDGE_VALID(config->intEdge)); CY_ASSERT_L2(CY_GPIO_IS_VALUE_VALID(config->intMask)); CY_ASSERT_L2(CY_GPIO_IS_VALUE_VALID(config->vtrip)); CY_ASSERT_L2(CY_GPIO_IS_VALUE_VALID(config->slewRate)); @@ -68,7 +66,7 @@ cy_en_gpio_status_t Cy_GPIO_Pin_Init(GPIO_PRT_Type *base, uint32_t pinNum, const CY_ASSERT_L2(CY_GPIO_IS_VALUE_VALID(config->vtripSel)); CY_ASSERT_L2(CY_GPIO_IS_VREF_SEL_VALID(config->vrefSel)); CY_ASSERT_L2(CY_GPIO_IS_VOH_SEL_VALID(config->vohSel)); - + Cy_GPIO_Write(base, pinNum, config->outVal); Cy_GPIO_SetDrivemode(base, pinNum, config->driveMode); Cy_GPIO_SetHSIOM(base, pinNum, config->hsiom); @@ -78,7 +76,7 @@ cy_en_gpio_status_t Cy_GPIO_Pin_Init(GPIO_PRT_Type *base, uint32_t pinNum, const Cy_GPIO_SetVtrip(base, pinNum, config->vtrip); /* Slew rate and Driver strength */ - maskCfgOut = (CY_GPIO_CFG_OUT_SLOW_MASK << pinNum) + maskCfgOut = (CY_GPIO_CFG_OUT_SLOW_MASK << pinNum) | (CY_GPIO_CFG_OUT_DRIVE_SEL_MASK << ((uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)); tempReg = base->CFG_OUT & ~(maskCfgOut); base->CFG_OUT = tempReg | ((config->slewRate & CY_GPIO_CFG_OUT_SLOW_MASK) << pinNum) @@ -97,7 +95,7 @@ cy_en_gpio_status_t Cy_GPIO_Pin_Init(GPIO_PRT_Type *base, uint32_t pinNum, const { status = CY_GPIO_BAD_PARAM; } - + return(status); } @@ -121,9 +119,9 @@ cy_en_gpio_status_t Cy_GPIO_Pin_Init(GPIO_PRT_Type *base, uint32_t pinNum, const * \return * Initialization status * -* \note -* If using the PSoC Creator IDE, there is no need to initialize the pins when -* using the GPIO component on the schematic. Ports are configured in +* \note +* If using the PSoC Creator IDE, there is no need to initialize the pins when +* using the GPIO component on the schematic. Ports are configured in * Cy_SystemInit() before main() entry. * * \funcusage @@ -144,7 +142,7 @@ cy_en_gpio_status_t Cy_GPIO_Port_Init(GPIO_PRT_Type* base, const cy_stc_gpio_prt CY_ASSERT_L2(CY_GPIO_IS_INTR_MASK_VALID(config->intrMask)); CY_ASSERT_L2(CY_GPIO_IS_SEL_ACT_VALID(config->sel0Active)); CY_ASSERT_L2(CY_GPIO_IS_SEL_ACT_VALID(config->sel1Active)); - + portNum = ((uint32_t)(base) - GPIO_BASE) / GPIO_PRT_SECTION_SIZE; baseHSIOM = (HSIOM_PRT_Type*)(HSIOM_BASE + (HSIOM_PRT_SECTION_SIZE * portNum)); @@ -162,7 +160,7 @@ cy_en_gpio_status_t Cy_GPIO_Port_Init(GPIO_PRT_Type* base, const cy_stc_gpio_prt { status = CY_GPIO_BAD_PARAM; } - + return(status); } @@ -193,7 +191,7 @@ cy_en_gpio_status_t Cy_GPIO_Port_Init(GPIO_PRT_Type* base, const cy_stc_gpio_prt * \return * void * -* \note +* \note * This function modifies port registers in read-modify-write operations. It is * not thread safe as the resource is shared among multiple pins on a port. * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.h index 2d29840b8e..6b5d97f7e4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/gpio/cy_gpio.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -22,21 +20,21 @@ * * Initialization can be performed either at the port level or by configuring the * individual pins. For efficient use of code space, port -* configuration should be used in the field. Refer to the product device header files +* configuration should be used in the field. Refer to the product device header files * for the list of supported ports and pins. -* -* - Single pin configuration is performed by using \ref Cy_GPIO_Pin_FastInit +* +* - Single pin configuration is performed by using \ref Cy_GPIO_Pin_FastInit * (provide specific values) or \ref Cy_GPIO_Pin_Init (provide a filled * cy_stc_gpio_pin_config_t structure). -* - An entire port can be configured using \ref Cy_GPIO_Port_Init. Provide a filled -* cy_stc_gpio_prt_config_t structure. The values in the structure are +* - An entire port can be configured using \ref Cy_GPIO_Port_Init. Provide a filled +* cy_stc_gpio_prt_config_t structure. The values in the structure are * bitfields representing the desired value for each pin in the port. * - Pin configuration and management is based on the port address and pin number. * \ref Cy_GPIO_PortToAddr function can optionally be used to calculate the port * address from the port number at run-time. * -* Once the pin/port initialization is complete, each pin can be accessed by -* specifying the port (GPIO_PRT_Type) and the pin (0-7) in the provided API +* Once the pin/port initialization is complete, each pin can be accessed by +* specifying the port (GPIO_PRT_Type) and the pin (0-7) in the provided API * functions. * * \section group_gpio_configuration Configuration Considerations @@ -51,9 +49,9 @@ * called by the application. * * Multiple pins on a port can be updated using direct port register writes with an -* appropriate port mask. An example is shown below, highlighting the different ways of +* appropriate port mask. An example is shown below, highlighting the different ways of * configuring Port 1 pins using, -* +* * - Port output data register * - Port output data set register * - Port output data clear register @@ -75,7 +73,7 @@ * * 16.7 * A -* A pointer parameter in a function prototype should be declared as pointer +* A pointer parameter in a function prototype should be declared as pointer * to const if the pointer is not used to modify the addressed object. * The objects pointed to by the base addresses of the GPIO port are not always modified. * While a const qualifier can be used in select scenarios, it brings little benefit @@ -88,7 +86,7 @@ * VersionChangesReason for Change * * 1.10.1 -* Updated description for the functions: \ref Cy_GPIO_GetInterruptStatus, +* Updated description for the functions: \ref Cy_GPIO_GetInterruptStatus, * \ref Cy_GPIO_GetInterruptMask, \ref Cy_GPIO_GetInterruptStatusMasked. * Minor documentation edits. * @@ -156,7 +154,7 @@ extern "C" { /** * GPIO Driver error codes */ -typedef enum +typedef enum { CY_GPIO_SUCCESS = 0x00u, /**< Returned successful */ CY_GPIO_BAD_PARAM = CY_GPIO_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< Bad parameter was passed */ @@ -265,7 +263,7 @@ typedef struct { GPIO_PRT_INTR_CFG_EDGE4_SEL_Msk | \ GPIO_PRT_INTR_CFG_EDGE5_SEL_Msk | \ GPIO_PRT_INTR_CFG_EDGE6_SEL_Msk | \ - GPIO_PRT_INTR_CFG_EDGE7_SEL_Msk) + GPIO_PRT_INTR_CFG_EDGE7_SEL_Msk) #define CY_GPIO_PRT_INTR_CFG_RANGE_MASK (CY_GPIO_PRT_INTR_CFG_EDGE_SEL_MASK | \ GPIO_PRT_INTR_CFG_FLT_EDGE_SEL_Msk | \ GPIO_PRT_INTR_CFG_FLT_SEL_Msk) @@ -303,8 +301,8 @@ typedef struct { (CY_SIO_VOH_2_50 == (vrefSel)) || \ (CY_SIO_VOH_2_78 == (vrefSel)) || \ (CY_SIO_VOH_4_16 == (vrefSel))) - -#define CY_GPIO_IS_PIN_BIT_VALID(pinBit) (0U == ((pinBit) & (uint32_t)~CY_GPIO_PRT_PINS_MASK)) + +#define CY_GPIO_IS_PIN_BIT_VALID(pinBit) (0U == ((pinBit) & (uint32_t)~CY_GPIO_PRT_PINS_MASK)) #define CY_GPIO_IS_INTR_CFG_VALID(intrCfg) (0U == ((intrCfg) & (uint32_t)~CY_GPIO_PRT_INTR_CFG_RANGE_MASK)) #define CY_GPIO_IS_INTR_MASK_VALID(intrMask) (0U == ((intrMask) & (uint32_t)~CY_GPIO_PRT_INT_MASK_MASK)) #define CY_GPIO_IS_SEL_ACT_VALID(selActive) (0U == ((selActive) & (uint32_t)~CY_GPIO_PRT_SEL_ACTIVE_MASK)) @@ -564,7 +562,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptCause3(void); * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -622,7 +620,7 @@ __STATIC_INLINE en_hsiom_sel_t Cy_GPIO_GetHSIOM(GPIO_PRT_Type* base, uint32_t pi uint32_t returnValue; uint32_t portNum; HSIOM_PRT_Type* portAddrHSIOM; - + CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); portNum = ((uint32_t)(base) - GPIO_BASE) / GPIO_PRT_SECTION_SIZE; @@ -664,7 +662,7 @@ __STATIC_INLINE en_hsiom_sel_t Cy_GPIO_GetHSIOM(GPIO_PRT_Type* base, uint32_t pi __STATIC_INLINE GPIO_PRT_Type* Cy_GPIO_PortToAddr(uint32_t portNum) { GPIO_PRT_Type* base; - + if(portNum < (uint32_t)IOSS_GPIO_GPIO_PORT_NR) { base = (GPIO_PRT_Type *)(GPIO_BASE + (GPIO_PRT_SECTION_SIZE * portNum)); @@ -708,7 +706,7 @@ __STATIC_INLINE GPIO_PRT_Type* Cy_GPIO_PortToAddr(uint32_t portNum) __STATIC_INLINE uint32_t Cy_GPIO_Read(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + return (base->IN >> (pinNum)) & CY_GPIO_IN_MASK; } @@ -807,7 +805,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_ReadOut(GPIO_PRT_Type* base, uint32_t pinNum) __STATIC_INLINE void Cy_GPIO_Set(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + base->OUT_SET = CY_GPIO_OUT_MASK << pinNum; } @@ -837,7 +835,7 @@ __STATIC_INLINE void Cy_GPIO_Set(GPIO_PRT_Type* base, uint32_t pinNum) __STATIC_INLINE void Cy_GPIO_Clr(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + base->OUT_CLR = CY_GPIO_OUT_MASK << pinNum; } @@ -868,7 +866,7 @@ __STATIC_INLINE void Cy_GPIO_Clr(GPIO_PRT_Type* base, uint32_t pinNum) __STATIC_INLINE void Cy_GPIO_Inv(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + base->OUT_INV = CY_GPIO_OUT_MASK << pinNum; } @@ -896,7 +894,7 @@ __STATIC_INLINE void Cy_GPIO_Inv(GPIO_PRT_Type* base, uint32_t pinNum) * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -940,7 +938,7 @@ __STATIC_INLINE void Cy_GPIO_SetDrivemode(GPIO_PRT_Type* base, uint32_t pinNum, __STATIC_INLINE uint32_t Cy_GPIO_GetDrivemode(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG >> (pinNum << CY_GPIO_DRIVE_MODE_OFFSET)) & CY_GPIO_CFG_DM_MASK; } @@ -963,7 +961,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetDrivemode(GPIO_PRT_Type* base, uint32_t pinN * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1005,7 +1003,7 @@ __STATIC_INLINE void Cy_GPIO_SetVtrip(GPIO_PRT_Type* base, uint32_t pinNum, uint __STATIC_INLINE uint32_t Cy_GPIO_GetVtrip(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG_IN >> pinNum) & CY_GPIO_CFG_IN_VTRIP_SEL_MASK; } @@ -1028,7 +1026,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVtrip(GPIO_PRT_Type* base, uint32_t pinNum) * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1093,7 +1091,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetSlewRate(GPIO_PRT_Type* base, uint32_t pinNu * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1108,7 +1106,7 @@ __STATIC_INLINE void Cy_GPIO_SetDriveSel(GPIO_PRT_Type* base, uint32_t pinNum, u CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); CY_ASSERT_L2(CY_GPIO_IS_DRIVE_SEL_VALID(value)); - + pinLoc = (uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET; tempReg = base->CFG_OUT & ~(CY_GPIO_CFG_OUT_DRIVE_SEL_MASK << pinLoc); base->CFG_OUT = tempReg | ((value & CY_GPIO_CFG_OUT_DRIVE_SEL_MASK) << pinLoc); @@ -1138,7 +1136,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetDriveSel(GPIO_PRT_Type* base, uint32_t pinNu { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - return ((base->CFG_OUT >> ((uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)) + return ((base->CFG_OUT >> ((uint32_t)(pinNum << 1u) + CY_GPIO_CFG_OUT_DRIVE_OFFSET)) & CY_GPIO_CFG_OUT_DRIVE_SEL_MASK); } @@ -1169,7 +1167,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetDriveSel(GPIO_PRT_Type* base, uint32_t pinNu * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1215,7 +1213,7 @@ __STATIC_INLINE void Cy_GPIO_SetVregEn(GPIO_PRT_Type* base, uint32_t pinNum, uin __STATIC_INLINE uint32_t Cy_GPIO_GetVregEn(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG_SIO >> ((pinNum & CY_GPIO_SIO_ODD_PIN_MASK) << CY_GPIO_CFG_SIO_OFFSET)) & CY_GPIO_VREG_EN_MASK; } @@ -1240,7 +1238,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVregEn(GPIO_PRT_Type* base, uint32_t pinNum) * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1286,7 +1284,7 @@ __STATIC_INLINE void Cy_GPIO_SetIbufMode(GPIO_PRT_Type* base, uint32_t pinNum, u __STATIC_INLINE uint32_t Cy_GPIO_GetIbufMode(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG_SIO >> (((pinNum & CY_GPIO_SIO_ODD_PIN_MASK) << CY_GPIO_CFG_SIO_OFFSET) + CY_GPIO_IBUF_SHIFT)) & CY_GPIO_IBUF_MASK; } @@ -1311,7 +1309,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetIbufMode(GPIO_PRT_Type* base, uint32_t pinNu * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1382,7 +1380,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVtripSel(GPIO_PRT_Type* base, uint32_t pinNu * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1397,7 +1395,7 @@ __STATIC_INLINE void Cy_GPIO_SetVrefSel(GPIO_PRT_Type* base, uint32_t pinNum, ui CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); CY_ASSERT_L2(CY_GPIO_IS_VREF_SEL_VALID(value)); - + pinLoc = ((pinNum & CY_GPIO_SIO_ODD_PIN_MASK) << CY_GPIO_CFG_SIO_OFFSET) + CY_GPIO_VREF_SEL_SHIFT; tempReg = (base->CFG_SIO & ~(CY_GPIO_VREF_SEL_MASK << pinLoc)); base->CFG_SIO = tempReg | ((value & CY_GPIO_VREF_SEL_MASK) << pinLoc); @@ -1428,7 +1426,7 @@ __STATIC_INLINE void Cy_GPIO_SetVrefSel(GPIO_PRT_Type* base, uint32_t pinNum, ui __STATIC_INLINE uint32_t Cy_GPIO_GetVrefSel(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG_SIO >> (((pinNum & CY_GPIO_SIO_ODD_PIN_MASK) << CY_GPIO_CFG_SIO_OFFSET) + CY_GPIO_VREF_SEL_SHIFT)) & CY_GPIO_VREF_SEL_MASK; } @@ -1456,7 +1454,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVrefSel(GPIO_PRT_Type* base, uint32_t pinNum * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1502,7 +1500,7 @@ __STATIC_INLINE void Cy_GPIO_SetVohSel(GPIO_PRT_Type* base, uint32_t pinNum, uin __STATIC_INLINE uint32_t Cy_GPIO_GetVohSel(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(pinNum)); - + return (base->CFG_SIO >> (((pinNum & CY_GPIO_SIO_ODD_PIN_MASK) << CY_GPIO_CFG_SIO_OFFSET) + CY_GPIO_VOH_SEL_SHIFT)) & CY_GPIO_VOH_SEL_MASK; } @@ -1519,7 +1517,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVohSel(GPIO_PRT_Type* base, uint32_t pinNum) * * \brief Returns the current unmasked interrupt state of the pin. * -* The core processor's NVIC is triggered by the masked interrupt bits. This +* The core processor's NVIC is triggered by the masked interrupt bits. This * function allows reading the unmasked interrupt state. Whether the bit * positions actually trigger the interrupt are defined by the interrupt mask bits. * @@ -1541,7 +1539,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetVohSel(GPIO_PRT_Type* base, uint32_t pinNum) __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptStatus(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + return (base->INTR >> pinNum) & CY_GPIO_INTR_STATUS_MASK; } @@ -1569,7 +1567,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptStatus(GPIO_PRT_Type* base, uint32_ __STATIC_INLINE void Cy_GPIO_ClearInterrupt(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + /* Any INTR MMIO registers AHB clearing must be preceded with an AHB read access */ (void)base->INTR; @@ -1600,7 +1598,7 @@ __STATIC_INLINE void Cy_GPIO_ClearInterrupt(GPIO_PRT_Type* base, uint32_t pinNum * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1647,7 +1645,7 @@ __STATIC_INLINE void Cy_GPIO_SetInterruptMask(GPIO_PRT_Type* base, uint32_t pinN __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptMask(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + return (base->INTR_MASK >> pinNum) & CY_GPIO_INTR_EN_MASK; } @@ -1658,7 +1656,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptMask(GPIO_PRT_Type* base, uint32_t * * \brief Return the pin's current interrupt state after being masked. * -* The core processor's NVIC is triggered by the masked interrupt bits. This +* The core processor's NVIC is triggered by the masked interrupt bits. This * function allows reading this masked interrupt state. Note that the bits that * are not masked will not be forwarded to the NVIC. * @@ -1680,7 +1678,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptMask(GPIO_PRT_Type* base, uint32_t __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptStatusMasked(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + return (base->INTR_MASKED >> pinNum) & CY_GPIO_INTR_MASKED_MASK; } @@ -1708,7 +1706,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptStatusMasked(GPIO_PRT_Type* base, u __STATIC_INLINE void Cy_GPIO_SetSwInterrupt(GPIO_PRT_Type* base, uint32_t pinNum) { CY_ASSERT_L2(CY_GPIO_IS_FILTER_PIN_VALID(pinNum)); - + base->INTR_SET = CY_GPIO_INTR_SET_MASK << pinNum; } @@ -1732,7 +1730,7 @@ __STATIC_INLINE void Cy_GPIO_SetSwInterrupt(GPIO_PRT_Type* base, uint32_t pinNum * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1802,7 +1800,7 @@ __STATIC_INLINE uint32_t Cy_GPIO_GetInterruptEdge(GPIO_PRT_Type* base, uint32_t * \return * void * -* \note +* \note * This function modifies a port register in a read-modify-write operation. It is * not thread safe as the resource is shared among multiple pins on a port. * @@ -1819,7 +1817,7 @@ __STATIC_INLINE void Cy_GPIO_SetFilter(GPIO_PRT_Type* base, uint32_t value) uint32_t tempReg; CY_ASSERT_L2(CY_GPIO_IS_PIN_VALID(value)); - + tempReg = base->INTR_CFG & ~(CY_GPIO_INTR_FLT_EDGE_MASK << CY_GPIO_INTR_FILT_OFFSET); base->INTR_CFG = tempReg | ((value & CY_GPIO_INTR_FLT_EDGE_MASK) << CY_GPIO_INTR_FILT_OFFSET); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.c index 6f2b77e848..38d316dc09 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_i2s.h" @@ -41,16 +39,16 @@ extern "C" { cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * config) { cy_en_i2s_status_t ret = CY_I2S_BAD_PARAM; - + if((NULL != base) && (NULL != config)) { cy_en_i2s_ws_pw_t wsPulseWidth; cy_en_i2s_len_t channelLength; uint32_t channels; uint32_t clockDiv = (uint32_t)config->clkDiv - 1U; - + CY_ASSERT_L2(CY_I2S_IS_CLK_DIV_VALID(clockDiv)); - + /* The clock setting */ base->CLOCK_CTL = _VAL2FLD(I2S_CLOCK_CTL_CLOCK_DIV, clockDiv) | _BOOL2FLD(I2S_CLOCK_CTL_CLOCK_SEL, config->extClk); @@ -60,13 +58,13 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf { CY_ASSERT_L3(CY_I2S_IS_ALIGNMENT_VALID(config->txAlignment)); CY_ASSERT_L3(CY_I2S_IS_OVHDATA_VALID(config->txOverheadValue)); - + if ((CY_I2S_TDM_MODE_A == config->txAlignment) || (CY_I2S_TDM_MODE_B == config->txAlignment)) { channels = (uint32_t)config->txChannels - 1UL; wsPulseWidth = config->txWsPulseWidth; channelLength = CY_I2S_LEN32; - + CY_ASSERT_L2(CY_I2S_IS_CHANNELS_VALID(channels)); CY_ASSERT_L3(CY_I2S_IS_WSPULSE_VALID(wsPulseWidth)); CY_ASSERT_L3(CY_I2S_IS_LEN_VALID(config->txWordLength)); @@ -76,12 +74,12 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf channels = 1UL; wsPulseWidth = CY_I2S_WS_ONE_CHANNEL_LENGTH; channelLength = config->txChannelLength; - + CY_ASSERT_L3(CY_I2S_IS_CHAN_WORD_VALID(channelLength, config->txWordLength)); } - + CY_ASSERT_L2(CY_I2S_IS_TRIG_LEVEL_VALID(config->txFifoTriggerLevel, channels)); - + base->TX_WATCHDOG = config->txWatchdogValue; base->TX_CTL = _VAL2FLD(I2S_TX_CTL_I2S_MODE, config->txAlignment) | @@ -101,13 +99,13 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf if (config->rxEnabled) { CY_ASSERT_L3(CY_I2S_IS_ALIGNMENT_VALID(config->rxAlignment)); - + if ((CY_I2S_TDM_MODE_A == config->rxAlignment) || (CY_I2S_TDM_MODE_B == config->rxAlignment)) { channels = (uint32_t)config->rxChannels - 1UL; wsPulseWidth = config->rxWsPulseWidth; channelLength = CY_I2S_LEN32; - + CY_ASSERT_L2(CY_I2S_IS_CHANNELS_VALID(channels)); CY_ASSERT_L3(CY_I2S_IS_WSPULSE_VALID(wsPulseWidth)); CY_ASSERT_L3(CY_I2S_IS_LEN_VALID(config->rxWordLength)); @@ -117,10 +115,10 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf channels = 1UL; wsPulseWidth = CY_I2S_WS_ONE_CHANNEL_LENGTH; channelLength = config->rxChannelLength; - + CY_ASSERT_L3(CY_I2S_IS_CHAN_WORD_VALID(channelLength, config->rxWordLength)); } - + CY_ASSERT_L2(CY_I2S_IS_TRIG_LEVEL_VALID(config->rxFifoTriggerLevel, channels)); base->RX_WATCHDOG = config->rxWatchdogValue; @@ -163,7 +161,7 @@ cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * conf base->TR_CTL |= _BOOL2FLD(I2S_TR_CTL_RX_REQ_EN, config->rxDmaTrigger); } - + ret = CY_I2S_SUCCESS; } @@ -204,18 +202,18 @@ void Cy_I2S_DeInit(I2S_Type * base) ****************************************************************************//** * * This is a callback function to be used at the application layer to -* manage an I2S operation during the Deep-Sleep cycle. It stores the I2S state -* (Tx/Rx enabled/disabled/paused) into the context structure and stops the +* manage an I2S operation during the Deep-Sleep cycle. It stores the I2S state +* (Tx/Rx enabled/disabled/paused) into the context structure and stops the * communication before entering into Deep-Sleep power mode and restores the I2S * state after waking up. * -* \param -* callbackParams - The pointer to the callback parameters structure, +* \param +* callbackParams - The pointer to the callback parameters structure, * see \ref cy_stc_syspm_callback_params_t. * * \return the SysPm callback status \ref cy_en_syspm_status_t. * -* \note Use the \ref cy_stc_i2s_context_t data type for definition of the +* \note Use the \ref cy_stc_i2s_context_t data type for definition of the * *context element of the \ref cy_stc_syspm_callback_params_t strusture. * * \funcusage @@ -229,13 +227,13 @@ cy_en_syspm_status_t Cy_I2S_DeepSleepCallback(cy_stc_syspm_callback_params_t * c I2S_Type * locBase = (I2S_Type*) callbackParams->base; uint32_t * locInterruptMask = (uint32_t*) &(((cy_stc_i2s_context_t*)(callbackParams->context))->interruptMask); uint32_t * locState = (uint32_t*) &(((cy_stc_i2s_context_t*)(callbackParams->context))->enableState); - + switch(callbackParams->mode) { - case CY_SYSPM_CHECK_READY: + case CY_SYSPM_CHECK_READY: case CY_SYSPM_CHECK_FAIL: break; - + case CY_SYSPM_BEFORE_TRANSITION: *locInterruptMask = Cy_I2S_GetInterruptMask(locBase); /* Store I2S interrupts */ *locState = Cy_I2S_GetCurrentState(locBase); /* Store I2S state */ @@ -250,7 +248,7 @@ cy_en_syspm_status_t Cy_I2S_DeepSleepCallback(cy_stc_syspm_callback_params_t * c Cy_I2S_SetInterruptMask(locBase, 0UL); /* Disable I2S interrupts */ /* Unload FIFOs in order not to lose data (if needed) */ break; - + case CY_SYSPM_AFTER_TRANSITION: if (0UL != (*locState & I2S_CMD_RX_START_Msk)) { @@ -271,12 +269,12 @@ cy_en_syspm_status_t Cy_I2S_DeepSleepCallback(cy_stc_syspm_callback_params_t * c Cy_I2S_ClearInterrupt(locBase, *locInterruptMask); /* Clear possible pending I2S interrupts */ Cy_I2S_SetInterruptMask(locBase, *locInterruptMask); /* Restore I2S interrupts */ break; - + default: ret = CY_SYSPM_FAIL; break; } - + return(ret); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.h index b288257378..0e89d1a5c4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/i2s/cy_i2s.h @@ -1,22 +1,20 @@ /***************************************************************************//** * \file cy_i2s.h * \version 2.0.1 -* +* * The header file of the I2S driver. * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** * \defgroup group_i2s Inter-IC Sound (I2S) * \{ -* The I2S driver provides a function API to manage Inter-IC Sound. I2S is used -* to send digital audio streaming data to external I2S devices, such as audio +* The I2S driver provides a function API to manage Inter-IC Sound. I2S is used +* to send digital audio streaming data to external I2S devices, such as audio * codecs or simple DACs. It can also receive digital audio streaming data. * * Features: @@ -25,14 +23,14 @@ * * Programmable Channel/Word Lengths. * * Supports External Clock operation. * -* The I2S bus is an industry standard. The hardware interface was -* developed by Philips Semiconductors (now NXP Semiconductors). +* The I2S bus is an industry standard. The hardware interface was +* developed by Philips Semiconductors (now NXP Semiconductors). * * \section group_i2s_configuration_considerations Configuration Considerations * * To set up an I2S, provide the configuration parameters in the -* \ref cy_stc_i2s_config_t structure. -* +* \ref cy_stc_i2s_config_t structure. +* * For example, for Tx configuration, set txEnabled to true, configure * txDmaTrigger (depending on whether DMA is going to be used or not), set * extClk (if an external clock is used), provide clkDiv, txMasterMode, @@ -56,13 +54,13 @@ * * For example: * \snippet i2s/i2s_v2_0_sut_00.cydsn/main_cm4.c snippet_Cy_I2S_Init -* -* If you use a DMA, the DMA channel should be previously configured. The I2S interrupts +* +* If you use a DMA, the DMA channel should be previously configured. The I2S interrupts * (if applicable) can be enabled by calling \ref Cy_I2S_SetInterruptMask. * * For example, if the trigger interrupt is used, during operation the ISR -* should call the \ref Cy_I2S_WriteTxData as many times as required for your -* FIFO payload, but not more than the FIFO size. Then call \ref Cy_I2S_ClearInterrupt +* should call the \ref Cy_I2S_WriteTxData as many times as required for your +* FIFO payload, but not more than the FIFO size. Then call \ref Cy_I2S_ClearInterrupt * with appropriate parameters. * * The I2S/Left Justified data formats always contains two data channels. @@ -72,7 +70,7 @@ * or combined with zeroes: sample1-zero-sample2-zero (in this case only the * left channel will finally sound, for right-only case zero should go first). * The TDM frame word order in FIFOs is similar, one-by-one. -* +* * If a DMA is used and the DMA channel is properly configured - no CPU activity * (or any application code) is needed for I2S operation. * @@ -207,7 +205,7 @@ extern "C" { * \{ */ -/** Transmission is active */ +/** Transmission is active */ #define CY_I2S_TX_START (I2S_CMD_TX_START_Msk) /** Transmission is paused */ #define CY_I2S_TX_PAUSE (I2S_CMD_TX_PAUSE_Msk) @@ -227,7 +225,7 @@ extern "C" { * I2S status definitions. */ -typedef enum +typedef enum { CY_I2S_SUCCESS = 0x00UL, /**< Successful. */ CY_I2S_BAD_PARAM = CY_I2S_ID | CY_PDL_STATUS_ERROR | 0x01UL /**< One or more invalid parameters. */ @@ -306,7 +304,7 @@ typedef struct 'true': SDO bit starts at rising edge which goes before the above mentioned falling edge, i.e. the SDO signal is advanced by 0.5 SCK period (if txSckoInversion is false). - If txSckoInversion is true - the rising/falling edges just swaps + If txSckoInversion is true - the rising/falling edges just swaps in above explanations. Effective only in slave mode, must be false in master mode.*/ bool txSckoInversion; /**< TX SCKO polarity: @@ -346,7 +344,7 @@ typedef struct 'true': SDI bit starts at rising edge which goes after the above mentioned falling edge, i.e. the SDI signal is delayed by 0.5 SCK period (if rxSckoInversion is false). - If rxSckoInversion is true - the rising/falling edges just swaps + If rxSckoInversion is true - the rising/falling edges just swaps in above explanations. Effective only in master mode, must be false in slave mode. */ bool rxSckoInversion; /**< RX SCKO polarity: @@ -372,7 +370,7 @@ typedef struct cy_en_i2s_len_t rxWordLength; /**< RX word length, see #cy_en_i2s_len_t, must be less or equal to rxChannelLength. */ bool rxSignExtension; /**< RX value sign extension (when the word length is less than 32 bits), - 'false': all MSB are filled by zeroes, + 'false': all MSB are filled by zeroes, 'true': all MSB are filled by the original sign bit value. */ uint8_t rxFifoTriggerLevel; /**< RX FIFO interrupt trigger level (0, 1, ..., (255 - (number of channels))). */ @@ -476,7 +474,7 @@ typedef struct cy_en_i2s_status_t Cy_I2S_Init(I2S_Type * base, cy_stc_i2s_config_t const * config); void Cy_I2S_DeInit(I2S_Type * base); - + /** \addtogroup group_i2s_functions_syspm_callback * The driver supports SysPm callback for Deep Sleep transition. * \{ @@ -520,7 +518,7 @@ __STATIC_INLINE uint32_t Cy_I2S_GetInterruptStatusMasked(I2S_Type const * base); * Function Name: Cy_I2S_EnableTx ****************************************************************************//** * -* Starts an I2S transmission. Interrupts enabling (by the +* Starts an I2S transmission. Interrupts enabling (by the * \ref Cy_I2S_SetInterruptMask) is required after this function call, in case * if any I2S interrupts are used in the application. * @@ -578,7 +576,7 @@ __STATIC_INLINE void Cy_I2S_ResumeTx(I2S_Type * base) * Function Name: Cy_I2S_DisableTx ****************************************************************************//** * -* Stops an I2S transmission. +* Stops an I2S transmission. * * \pre TX interrupts disabling (by the \ref Cy_I2S_SetInterruptMask) is required * prior to this function call, in case if any TX I2S interrupts are used. @@ -599,7 +597,7 @@ __STATIC_INLINE void Cy_I2S_DisableTx(I2S_Type * base) * Function Name: Cy_I2S_EnableRx ****************************************************************************//** * -* Starts an I2S reception. Interrupts enabling (by the +* Starts an I2S reception. Interrupts enabling (by the * \ref Cy_I2S_SetInterruptMask) is required after this function call, in case * if any I2S interrupts are used in the application. * @@ -693,7 +691,7 @@ __STATIC_INLINE void Cy_I2S_ClearTxFifo(I2S_Type * base) * *******************************************************************************/ __STATIC_INLINE uint32_t Cy_I2S_GetNumInTxFifo(I2S_Type const * base) -{ +{ return (_FLD2VAL(I2S_TX_FIFO_STATUS_USED, base->TX_FIFO_STATUS)); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.c index 5d090519ab..c6732f2dc6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.c @@ -7,10 +7,9 @@ * the IPC hardware. * ******************************************************************************** +* \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_ipc_drv.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.h index 03e52f2053..bf8005a7af 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_drv.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef CY_IPC_DRV_H @@ -239,7 +237,7 @@ * VersionChangesReason for Change * * 1.10.1 -* Updated description of the \ref Cy_IPC_Pipe_Init, +* Updated description of the \ref Cy_IPC_Pipe_Init, * \ref Cy_IPC_Pipe_EndpointInit, \ref Cy_IPC_Sema_Set functions. * Added / updated code snippets. * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.c index 3762088267..7c8b830edc 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.c @@ -7,10 +7,9 @@ * of the IPC driver. * ******************************************************************************** +* \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_ipc_pipe.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.h index 315cc6302a..0bac9a0e16 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_pipe.h @@ -7,10 +7,9 @@ * structure definitions, pipe constants, and pipe endpoint address definitions. * ******************************************************************************** +* \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef CY_IPC_PIPE_H #define CY_IPC_PIPE_H diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.c index 7e18c2698f..1154997e23 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.c @@ -7,10 +7,9 @@ * semaphore level APIs for the IPC interface. * ******************************************************************************** +* \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "ipc/cy_ipc_drv.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.h index bca926b245..fb0179c7b4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/ipc/cy_ipc_sema.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef CY_IPC_SEMA_H diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.c index 0ea938a732..c0d13a8365 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.c @@ -9,9 +9,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_lpcomp.h" @@ -43,7 +41,7 @@ static cy_stc_lpcomp_context_t cy_lpcomp_context; cy_en_lpcomp_status_t Cy_LPComp_Init(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, const cy_stc_lpcomp_config_t* config) { cy_en_lpcomp_status_t ret = CY_LPCOMP_BAD_PARAM; - + CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); CY_ASSERT_L3(CY_LPCOMP_IS_OUT_MODE_VALID(config->outputMode)); CY_ASSERT_L3(CY_LPCOMP_IS_HYSTERESIS_VALID(config->hysteresis)); @@ -55,7 +53,7 @@ cy_en_lpcomp_status_t Cy_LPComp_Init(LPCOMP_Type* base, cy_en_lpcomp_channel_t c Cy_LPComp_GlobalEnable(base); if (CY_LPCOMP_CHANNEL_0 == channel) - { + { base->CMP0_CTRL = _VAL2FLD(LPCOMP_CMP0_CTRL_HYST0, (uint32_t)config->hysteresis) | _VAL2FLD(LPCOMP_CMP0_CTRL_DSI_BYPASS0, (uint32_t)config->outputMode) | _VAL2FLD(LPCOMP_CMP0_CTRL_DSI_LEVEL0, (uint32_t)config->outputMode >> 1u); @@ -66,16 +64,16 @@ cy_en_lpcomp_status_t Cy_LPComp_Init(LPCOMP_Type* base, cy_en_lpcomp_channel_t c _VAL2FLD(LPCOMP_CMP1_CTRL_DSI_BYPASS1, (uint32_t)config->outputMode) | _VAL2FLD(LPCOMP_CMP1_CTRL_DSI_LEVEL1, (uint32_t)config->outputMode >> 1u); } - + /* Save intType to use it in the Cy_LPComp_Enable() function */ cy_lpcomp_context.intType[(uint8_t)channel - 1u] = config->intType; - + /* Save power to use it in the Cy_LPComp_Enable() function */ cy_lpcomp_context.power[(uint8_t)channel - 1u] = config->power; - + ret = CY_LPCOMP_SUCCESS; } - + return (ret); } @@ -98,14 +96,14 @@ cy_en_lpcomp_status_t Cy_LPComp_Init(LPCOMP_Type* base, cy_en_lpcomp_channel_t c void Cy_LPComp_Enable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) { cy_en_lpcomp_pwr_t powerSpeed; - + CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); - + powerSpeed = cy_lpcomp_context.power[(uint8_t)channel - 1u]; - + /* Set power */ Cy_LPComp_SetPower(base, channel, powerSpeed); - + /* Make delay before enabling the comparator interrupt to prevent false triggering */ if (CY_LPCOMP_MODE_ULP == powerSpeed) { @@ -117,9 +115,9 @@ void Cy_LPComp_Enable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) } else { - Cy_SysLib_DelayUs(CY_LPCOMP_NORMAL_POWER_DELAY); + Cy_SysLib_DelayUs(CY_LPCOMP_NORMAL_POWER_DELAY); } - + /* Enable the comparator interrupt */ Cy_LPComp_SetInterruptTriggerMode(base, channel, cy_lpcomp_context.intType[(uint8_t)channel - 1u]); } @@ -141,12 +139,12 @@ void Cy_LPComp_Enable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) * *******************************************************************************/ void Cy_LPComp_Disable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) -{ +{ CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); /* Disable the comparator interrupt */ Cy_LPComp_SetInterruptTriggerMode(base, channel, CY_LPCOMP_INTR_DISABLE); - + /* Set power off */ Cy_LPComp_SetPower(base, channel, CY_LPCOMP_MODE_OFF); } @@ -156,9 +154,9 @@ void Cy_LPComp_Disable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) * Function Name: Cy_LPComp_SetInterruptTriggerMode ****************************************************************************//** * -* Sets the interrupt edge-detect mode. +* Sets the interrupt edge-detect mode. * This also controls the value provided on the output. -* \note Interrupts can be enabled after the block is enabled and the appropriate +* \note Interrupts can be enabled after the block is enabled and the appropriate * start-up time has elapsed: * 3 us for the normal power mode; * 6 us for the LP mode; @@ -171,17 +169,17 @@ void Cy_LPComp_Disable(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel) * The LPCOMP channel index. * * \param intType -* Interrupt edge trigger selection -* CY_LPCOMP_INTR_DISABLE (=0) - Disabled, no interrupt will be detected -* CY_LPCOMP_INTR_RISING (=1) - Rising edge -* CY_LPCOMP_INTR_FALLING (=2) - Falling edge +* Interrupt edge trigger selection +* CY_LPCOMP_INTR_DISABLE (=0) - Disabled, no interrupt will be detected +* CY_LPCOMP_INTR_RISING (=1) - Rising edge +* CY_LPCOMP_INTR_FALLING (=2) - Falling edge * CY_LPCOMP_INTR_BOTH (=3) - Both rising and falling edges. * * \return None * *******************************************************************************/ void Cy_LPComp_SetInterruptTriggerMode(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, cy_en_lpcomp_int_t intType) -{ +{ CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); CY_ASSERT_L3(CY_LPCOMP_IS_INTR_MODE_VALID(intType)); @@ -204,11 +202,11 @@ void Cy_LPComp_SetInterruptTriggerMode(LPCOMP_Type* base, cy_en_lpcomp_channel_t ****************************************************************************//** * * Sets the drive power and speeds to one of the four settings. -* \note Interrupts can be enabled after the block is enabled and the appropriate +* \note Interrupts can be enabled after the block is enabled and the appropriate * start-up time has elapsed: * 3 us for the normal power mode; * 6 us for the LP mode; -* 50 us for the ULP mode. +* 50 us for the ULP mode. * Otherwise, unexpected interrupts events can occur. * * \param *base @@ -219,9 +217,9 @@ void Cy_LPComp_SetInterruptTriggerMode(LPCOMP_Type* base, cy_en_lpcomp_channel_t * * \param power * The power setting sets an operation mode of the component: -* CY_LPCOMP_OFF_POWER (=0) - Off power -* CY_LPCOMP_MODE_ULP (=1) - Slow/ultra low power -* CY_LPCOMP_MODE_LP (=2) - Medium/low power +* CY_LPCOMP_OFF_POWER (=0) - Off power +* CY_LPCOMP_MODE_ULP (=1) - Slow/ultra low power +* CY_LPCOMP_MODE_LP (=2) - Medium/low power * CY_LPCOMP_MODE_NORMAL(=3) - Fast/normal power * * \return None @@ -256,8 +254,8 @@ void Cy_LPComp_SetPower(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, cy_en * The LPCOMP channel index. * * \param hysteresis -* Sets an operation mode of the component -* CY_LPCOMP_HYST_ENABLE (=1) - Enables HYST +* Sets an operation mode of the component +* CY_LPCOMP_HYST_ENABLE (=1) - Enables HYST * CY_LPCOMP_HYST_DISABLE(=0) - Disable HYST. * * \return None @@ -283,15 +281,15 @@ void Cy_LPComp_SetHysteresis(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, * Function Name: Cy_LPComp_SetInputs ****************************************************************************//** * -* Sets the comparator input sources. The comparator inputs can be connected -* to the dedicated GPIO pins or AMUXBUSA/AMUXBUSB. Additionally, the negative -* comparator input can be connected to the local VREF. +* Sets the comparator input sources. The comparator inputs can be connected +* to the dedicated GPIO pins or AMUXBUSA/AMUXBUSB. Additionally, the negative +* comparator input can be connected to the local VREF. * At least one unconnected input causes a comparator undefined output. * * \note Connection to AMUXBUSA/AMUXBUSB requires closing the additional -* switches which are a part of the IO system. These switches can be configured -* using the HSIOM->AMUX_SPLIT_CTL[3] register. -* Refer to the appropriate Technical Reference Manual (TRM) of a device +* switches which are a part of the IO system. These switches can be configured +* using the HSIOM->AMUX_SPLIT_CTL[3] register. +* Refer to the appropriate Technical Reference Manual (TRM) of a device * for a detailed description. * * \param *base @@ -301,16 +299,16 @@ void Cy_LPComp_SetHysteresis(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, * The LPCOMP channel index. * * \param inputP -* Positive input selection -* CY_LPCOMP_SW_GPIO (0x01u) -* CY_LPCOMP_SW_AMUXBUSA (0x02u) - Hi-Z in hibernate mode +* Positive input selection +* CY_LPCOMP_SW_GPIO (0x01u) +* CY_LPCOMP_SW_AMUXBUSA (0x02u) - Hi-Z in hibernate mode * CY_LPCOMP_SW_AMUXBUSB (0x04u) - Hi-Z in the hibernate mode. * * \param inputN -* Negative input selection -* CY_LPCOMP_SW_GPIO (0x01u) -* CY_LPCOMP_SW_AMUXBUSA (0x02u) - Hi-Z in hibernate mode -* CY_LPCOMP_SW_AMUXBUSB (0x04u) - Hi-Z in hibernate mode +* Negative input selection +* CY_LPCOMP_SW_GPIO (0x01u) +* CY_LPCOMP_SW_AMUXBUSA (0x02u) - Hi-Z in hibernate mode +* CY_LPCOMP_SW_AMUXBUSB (0x04u) - Hi-Z in hibernate mode * CY_LPCOMP_SW_LOCAL_VREF (0x08u) - the negative input only for a crude REF. * * \return None @@ -344,7 +342,7 @@ void Cy_LPComp_SetInputs(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, cy_e break; } } - + switch(inputN) { case CY_LPCOMP_SW_AMUXBUSA: @@ -397,14 +395,14 @@ void Cy_LPComp_SetInputs(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, cy_e * The LPCOMP channel index. * * \param outType -* Interrupt edge trigger selection -* CY_LPCOMP_OUT_PULSE (=0) - the DSI output with the pulse option, no bypass -* CY_LPCOMP_OUT_DIRECT (=1) - the bypass mode, the direct output of the comparator +* Interrupt edge trigger selection +* CY_LPCOMP_OUT_PULSE (=0) - the DSI output with the pulse option, no bypass +* CY_LPCOMP_OUT_DIRECT (=1) - the bypass mode, the direct output of the comparator * CY_LPCOMP_OUT_SYNC (=2) - DSI output with the level option, it is similar to the -* bypass mode but it is 1 cycle slow than the bypass. -* [DSI_LEVELx : DSI_BYPASSx] = [Bit11 : Bit10] -* 0 : 0 = 0x00 -> Pulse (PULSE) -* 1 : 0 = 0x02 -> Level (SYNC) +* bypass mode but it is 1 cycle slow than the bypass. +* [DSI_LEVELx : DSI_BYPASSx] = [Bit11 : Bit10] +* 0 : 0 = 0x00 -> Pulse (PULSE) +* 1 : 0 = 0x02 -> Level (SYNC) * x : 1 = 0x01 -> Bypass (Direct). * * \return None @@ -430,26 +428,26 @@ void Cy_LPComp_SetOutputMode(LPCOMP_Type* base, cy_en_lpcomp_channel_t channel, * Function Name: Cy_LPComp_DeepSleepCallback ****************************************************************************//** * -* This function checks the current power mode of LPComp and then disables the -* LPComp block if there is no wake-up source from LPComp in the deep-sleep mode. -* It stores the state of the LPComp enable and then disables the LPComp block +* This function checks the current power mode of LPComp and then disables the +* LPComp block if there is no wake-up source from LPComp in the deep-sleep mode. +* It stores the state of the LPComp enable and then disables the LPComp block * before going to the low power modes, and recovers the LPComp power state after * wake-up using the stored value. * * \param *callbackParams -* The \ref cy_stc_syspm_callback_params_t structure with the callback +* The \ref cy_stc_syspm_callback_params_t structure with the callback * parameters which consists of mode, base and context fields: * *base - LPComp register structure pointer; * *context - Context for the call-back function; * mode * CY_SYSPM_CHECK_READY - No action for this state. * CY_SYSPM_CHECK_FAIL - No action for this state. -* CY_SYSPM_BEFORE_TRANSITION - Checks the LPComp interrupt mask and the power -* mode, and then disables or enables the LPComp block +* CY_SYSPM_BEFORE_TRANSITION - Checks the LPComp interrupt mask and the power +* mode, and then disables or enables the LPComp block * according to the condition. * Stores the LPComp state to recover the state after * wake up. -* CY_SYSPM_AFTER_TRANSITION - Enables the LPComp block, if it was disabled +* CY_SYSPM_AFTER_TRANSITION - Enables the LPComp block, if it was disabled * before the sleep mode. * * \return @@ -471,7 +469,7 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t break; case CY_SYSPM_CHECK_FAIL: - { + { ret = CY_SYSPM_SUCCESS; } break; @@ -484,11 +482,11 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t if (0u != enabled_status) { /* Disable the LPComp block when there is no wake-up source from any channel. */ - if( !(((_FLD2VAL(LPCOMP_CMP0_CTRL_MODE0, locBase->CMP0_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && + if( !(((_FLD2VAL(LPCOMP_CMP0_CTRL_MODE0, locBase->CMP0_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && _FLD2BOOL(LPCOMP_INTR_MASK_COMP0_MASK, locBase->INTR_MASK)) || - ((_FLD2VAL(LPCOMP_CMP1_CTRL_MODE1, locBase->CMP1_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && + ((_FLD2VAL(LPCOMP_CMP1_CTRL_MODE1, locBase->CMP1_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && _FLD2BOOL(LPCOMP_INTR_MASK_COMP1_MASK, locBase->INTR_MASK))) ) - + { /* Disable the LPComp block to avoid leakage. */ Cy_LPComp_GlobalDisable(locBase); @@ -501,7 +499,7 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t } else { - /* The LPComp block was already disabled and + /* The LPComp block was already disabled and * the system is allowed to go to the low power mode. */ } @@ -512,8 +510,8 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t case CY_SYSPM_AFTER_TRANSITION: { - /* Enable LPComp to operate if it was enabled - * before entering to the low power mode. + /* Enable LPComp to operate if it was enabled + * before entering to the low power mode. */ if (0u != enabled_status) { @@ -521,7 +519,7 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t } else { - /* The LPComp block was disabled before calling this API + /* The LPComp block was disabled before calling this API * with mode = CY_SYSPM_CHECK_READY. */ } @@ -542,19 +540,19 @@ cy_en_syspm_status_t Cy_LPComp_DeepSleepCallback(cy_stc_syspm_callback_params_t * Function Name: Cy_LPComp_HibernateCallback ****************************************************************************//** * -* This function checks the current power mode of LPComp and then disable the -* LPComp block, if there is no wake-up source from LPComp in the hibernate mode. +* This function checks the current power mode of LPComp and then disable the +* LPComp block, if there is no wake-up source from LPComp in the hibernate mode. * * \param *callbackParams -* The \ref cy_stc_syspm_callback_params_t structure with the callback +* The \ref cy_stc_syspm_callback_params_t structure with the callback * parameters which consists of mode, base and context fields: * *base - LPComp register structure pointer; * *context - Context for the call-back function; * mode * CY_SYSPM_CHECK_READY - No action for this state. * CY_SYSPM_CHECK_FAIL - No action for this state. -* CY_SYSPM_BEFORE_TRANSITION - Checks the wake-up source from the hibernate mode -* of the LPComp block, and then disables or enables +* CY_SYSPM_BEFORE_TRANSITION - Checks the wake-up source from the hibernate mode +* of the LPComp block, and then disables or enables * the LPComp block according to the condition. * * \return @@ -576,7 +574,7 @@ cy_en_syspm_status_t Cy_LPComp_HibernateCallback(cy_stc_syspm_callback_params_t break; case CY_SYSPM_CHECK_FAIL: - { + { ret = CY_SYSPM_SUCCESS; } break; @@ -589,11 +587,11 @@ cy_en_syspm_status_t Cy_LPComp_HibernateCallback(cy_stc_syspm_callback_params_t if (0u != enabled_status) { /* Disable the LPComp block when there is no wake-up source from any channel. */ - if( !(((_FLD2VAL(LPCOMP_CMP0_CTRL_MODE0, locBase->CMP0_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && + if( !(((_FLD2VAL(LPCOMP_CMP0_CTRL_MODE0, locBase->CMP0_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && _FLD2BOOL(CY_LPCOMP_WAKEUP_PIN0, SRSS->PWR_HIBERNATE)) || - ((_FLD2VAL(LPCOMP_CMP1_CTRL_MODE1, locBase->CMP1_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && + ((_FLD2VAL(LPCOMP_CMP1_CTRL_MODE1, locBase->CMP1_CTRL) == (uint32_t)CY_LPCOMP_MODE_ULP) && _FLD2BOOL(CY_LPCOMP_WAKEUP_PIN1, SRSS->PWR_HIBERNATE))) ) - + { /* Disable the LPComp block to avoid leakage. */ Cy_LPComp_GlobalDisable(locBase); @@ -606,7 +604,7 @@ cy_en_syspm_status_t Cy_LPComp_HibernateCallback(cy_stc_syspm_callback_params_t } else { - /* The LPComp block was already disabled and + /* The LPComp block was already disabled and * the system is allowed to go to the low power mode. */ } @@ -618,7 +616,7 @@ cy_en_syspm_status_t Cy_LPComp_HibernateCallback(cy_stc_syspm_callback_params_t default: break; } - + return (ret); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.h index 18df43a9ac..1e57e7da0e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lpcomp/cy_lpcomp.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -18,72 +16,72 @@ * Provides access to the low-power comparators implemented using the fixed-function * LP comparator block that is present in PSoC 6. * -* These comparators can perform fast analog signal comparison of internal -* and external analog signals in all system power modes. Low-power comparator -* output can be inspected by the CPU, used as an interrupt/wakeup source to the -* CPU when in low-power mode (Sleep, Low-Power Sleep, or Deep-Sleep), used as -* a wakeup source to system resources when in Hibernate mode, or fed to DSI as +* These comparators can perform fast analog signal comparison of internal +* and external analog signals in all system power modes. Low-power comparator +* output can be inspected by the CPU, used as an interrupt/wakeup source to the +* CPU when in low-power mode (Sleep, Low-Power Sleep, or Deep-Sleep), used as +* a wakeup source to system resources when in Hibernate mode, or fed to DSI as * an asynchronous or synchronous signal (level or pulse). * * \section group_lpcomp_section_Configuration_Considerations Configuration Considerations -* To set up an LPComp, the inputs, the output, the mode, the interrupts and +* To set up an LPComp, the inputs, the output, the mode, the interrupts and * other configuration parameters should be configured. Power the LPComp to operate. * * The sequence recommended for the LPComp operation: * -* 1) To initialize the driver, call the Cy_LPComp_Init() function providing -* the filled cy_stc_lpcomp_config_t structure, the LPComp channel number, +* 1) To initialize the driver, call the Cy_LPComp_Init() function providing +* the filled cy_stc_lpcomp_config_t structure, the LPComp channel number, * and the LPCOMP registers structure pointer. * -* 2) Optionally, configure the interrupt requests if the interrupt event -* triggering is needed. Use the Cy_LPComp_SetInterruptMask() function with -* the parameter for the mask available in the configuration file. -* Additionally, enable the Global interrupts and initialize the referenced -* interrupt by setting the priority and the interrupt vector using +* 2) Optionally, configure the interrupt requests if the interrupt event +* triggering is needed. Use the Cy_LPComp_SetInterruptMask() function with +* the parameter for the mask available in the configuration file. +* Additionally, enable the Global interrupts and initialize the referenced +* interrupt by setting the priority and the interrupt vector using * the \ref Cy_SysInt_Init() function of the sysint driver. * -* 3) Configure the inputs and the output using the \ref Cy_GPIO_Pin_Init() -* functions of the GPIO driver. -* The High Impedance Analog drive mode is for the inputs and -* the Strong drive mode is for the output. -* Use the Cy_LPComp_SetInputs() function to connect the comparator inputs +* 3) Configure the inputs and the output using the \ref Cy_GPIO_Pin_Init() +* functions of the GPIO driver. +* The High Impedance Analog drive mode is for the inputs and +* the Strong drive mode is for the output. +* Use the Cy_LPComp_SetInputs() function to connect the comparator inputs * to the dedicated IO pins, AMUXBUSA/AMUXBUSB or Vref: * \image html lpcomp_inputs.png * * 4) Power on the comparator using the Cy_LPComp_Enable() function. * -* 5) The comparator output can be monitored using -* the Cy_LPComp_GetCompare() function or using the LPComp interrupt +* 5) The comparator output can be monitored using +* the Cy_LPComp_GetCompare() function or using the LPComp interrupt * (if the interrupt is enabled). * -* \note The interrupt is not cleared automatically. -* It is the user's responsibility to do that. -* The interrupt is cleared by writing a 1 in the corresponding interrupt -* register bit position. The preferred way to clear interrupt sources +* \note The interrupt is not cleared automatically. +* It is the user's responsibility to do that. +* The interrupt is cleared by writing a 1 in the corresponding interrupt +* register bit position. The preferred way to clear interrupt sources * is using the Cy_LPComp_ClearInterrupt() function. * -* \note Individual comparator interrupt outputs are ORed together -* as a single asynchronous interrupt source before it is sent out and -* used to wake up the system in the low-power mode. -* For PSoC 6 devices, the individual comparator interrupt is masked +* \note Individual comparator interrupt outputs are ORed together +* as a single asynchronous interrupt source before it is sent out and +* used to wake up the system in the low-power mode. +* For PSoC 6 devices, the individual comparator interrupt is masked * by the INTR_MASK register. The masked result is captured in * the INTR_MASKED register. -* Writing a 1 to the INTR register bit will clear the interrupt. +* Writing a 1 to the INTR register bit will clear the interrupt. * * \section group_lpcomp_lp Low Power Support -* The LPComp provides the callback functions to facilitate -* the low-power mode transition. The callback -* \ref Cy_LPComp_DeepSleepCallback must be called during execution -* of \ref Cy_SysPm_DeepSleep; \ref Cy_LPComp_HibernateCallback must be -* called during execution of \ref Cy_SysPm_Hibernate. -* To trigger the callback execution, the callback must be registered -* before calling the mode transition function. -* Refer to \ref group_syspm driver for more +* The LPComp provides the callback functions to facilitate +* the low-power mode transition. The callback +* \ref Cy_LPComp_DeepSleepCallback must be called during execution +* of \ref Cy_SysPm_DeepSleep; \ref Cy_LPComp_HibernateCallback must be +* called during execution of \ref Cy_SysPm_Hibernate. +* To trigger the callback execution, the callback must be registered +* before calling the mode transition function. +* Refer to \ref group_syspm driver for more * information about low-power mode transitions. * * \section group_lpcomp_more_information More Information * -* Refer to the appropriate device technical reference manual (TRM) for +* Refer to the appropriate device technical reference manual (TRM) for * a detailed description of the registers. * * \section group_lpcomp_MISRA MISRA-C Compliance @@ -101,12 +99,12 @@ * a different pointer to object type. * * The pointer to the buffer memory is void to allow handling different -* different data types: uint8_t (4-8 bits) or uint16_t (9-16 bits). -* The cast operation is safe because the configuration is verified +* different data types: uint8_t (4-8 bits) or uint16_t (9-16 bits). +* The cast operation is safe because the configuration is verified * before operation is performed. -* The function \ref Cy_LPComp_DeepSleepCallback is a callback of +* The function \ref Cy_LPComp_DeepSleepCallback is a callback of * the \ref cy_en_syspm_status_t type. The cast operation safety in this -* function becomes the user's responsibility because the pointers are +* function becomes the user's responsibility because the pointers are * initialized when a callback is registered in the SysPm driver. * * @@ -121,7 +119,7 @@ * * * 1.10 -* The CY_WEAK keyword is removed from Cy_LPComp_DeepSleepCallback() +* The CY_WEAK keyword is removed from Cy_LPComp_DeepSleepCallback() * and Cy_LPComp_HibernateCallback() functions
* Added input parameter validation to the API functions. * @@ -181,7 +179,7 @@ extern "C" ******************************************************************************/ /**< LPCOMP PDL ID */ -#define CY_LPCOMP_ID CY_PDL_DRV_ID(0x23u) +#define CY_LPCOMP_ID CY_PDL_DRV_ID(0x23u) /** The LPCOMP's number of channels. */ #define CY_LPCOMP_MAX_CHANNEL_NUM (2u) @@ -221,20 +219,20 @@ extern "C" #define CY_LPCOMP_CMP0_OUTPUT_CONFIG_Pos LPCOMP_CMP0_CTRL_DSI_BYPASS0_Pos #define CY_LPCOMP_CMP1_OUTPUT_CONFIG_Pos LPCOMP_CMP1_CTRL_DSI_BYPASS1_Pos - + #define CY_LPCOMP_CMP0_OUTPUT_CONFIG_Msk (LPCOMP_CMP0_CTRL_DSI_BYPASS0_Msk | \ LPCOMP_CMP0_CTRL_DSI_LEVEL0_Msk) - + #define CY_LPCOMP_CMP1_OUTPUT_CONFIG_Msk (LPCOMP_CMP1_CTRL_DSI_BYPASS1_Msk | \ LPCOMP_CMP1_CTRL_DSI_LEVEL1_Msk) #define CY_HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_SR_Pos HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_Pos - + #define CY_HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_SR_Msk (HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SL_Msk | \ - HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SR_Msk) - + HSIOM_AMUX_SPLIT_CTL_SWITCH_AA_SR_Msk) + #define CY_HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_SR_Pos HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_Pos - + #define CY_HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_SR_Msk (HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SL_Msk | \ HSIOM_AMUX_SPLIT_CTL_SWITCH_BB_SR_Msk) @@ -264,7 +262,7 @@ typedef enum { CY_LPCOMP_OUT_PULSE = 0u, /**< The LPCOMP DSI output with the pulse option, no bypass. */ CY_LPCOMP_OUT_DIRECT = 1u, /**< The LPCOMP bypass mode, the direct output of a comparator. */ - CY_LPCOMP_OUT_SYNC = 2u /**< The LPCOMP DSI output with the level option, it is similar + CY_LPCOMP_OUT_SYNC = 2u /**< The LPCOMP DSI output with the level option, it is similar to the bypass mode but it is 1 cycle slow than the bypass. */ } cy_en_lpcomp_out_t; @@ -310,7 +308,7 @@ typedef enum } cy_en_lpcomp_inputs_t; /** The LPCOMP error codes. */ -typedef enum +typedef enum { CY_LPCOMP_SUCCESS = 0x00u, /**< Successful */ CY_LPCOMP_BAD_PARAM = CY_LPCOMP_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< One or more invalid parameters */ @@ -332,7 +330,7 @@ typedef enum /** The LPCOMP configuration structure. */ typedef struct { - cy_en_lpcomp_out_t outputMode; /**< The LPCOMP's outputMode: Direct output, + cy_en_lpcomp_out_t outputMode; /**< The LPCOMP's outputMode: Direct output, Synchronized output or Pulse output */ cy_en_lpcomp_hyst_t hysteresis; /**< Enables or disables the LPCOMP's hysteresis */ cy_en_lpcomp_pwr_t power; /**< Sets the LPCOMP power mode */ @@ -380,7 +378,7 @@ typedef struct { ((input) == CY_LPCOMP_SW_AMUXBUSA) || \ ((input) == CY_LPCOMP_SW_AMUXBUSB) || \ ((input) == CY_LPCOMP_SW_LOCAL_VREF)) - + /** \endcond */ /** @@ -425,16 +423,16 @@ cy_en_syspm_status_t Cy_LPComp_HibernateCallback(cy_stc_syspm_callback_params_t * Function Name: Cy_LPComp_GlobalEnable ****************************************************************************//** * -* Activates the IP of the LPCOMP hardware block. This API should be enabled +* Activates the IP of the LPCOMP hardware block. This API should be enabled * before operating any channel of comparators. -* Note: Interrupts can be enabled after the block is enabled and the appropriate +* Note: Interrupts can be enabled after the block is enabled and the appropriate * start-up time has elapsed: * 3 us for the normal power mode; * 6 us for the LP mode; * 50 us for the ULP mode. * * \param *base -* The structure of the channel pointer. +* The structure of the channel pointer. * * \return None * @@ -449,7 +447,7 @@ __STATIC_INLINE void Cy_LPComp_GlobalEnable(LPCOMP_Type* base) * Function Name: Cy_LPComp_GlobalDisable ****************************************************************************//** * -* Deactivates the IP of the LPCOMP hardware block. +* Deactivates the IP of the LPCOMP hardware block. * (Analog in power down, open all switches, all clocks off). * * \param *base @@ -468,7 +466,7 @@ __STATIC_INLINE void Cy_LPComp_GlobalDisable(LPCOMP_Type *base) * Function Name: Cy_LPComp_UlpReferenceEnable ****************************************************************************//** * -* Enables the local reference-generator circuit. +* Enables the local reference-generator circuit. * * \param *base * The structure of the channel pointer. @@ -486,7 +484,7 @@ __STATIC_INLINE void Cy_LPComp_UlpReferenceEnable(LPCOMP_Type *base) * Function Name: Cy_LPComp_UlpReferenceDisable ****************************************************************************//** * -* Disables the local reference-generator circuit. +* Disables the local reference-generator circuit. * * \param *base * The structure of the channel pointer. @@ -504,8 +502,8 @@ __STATIC_INLINE void Cy_LPComp_UlpReferenceDisable(LPCOMP_Type *base) * Function Name: Cy_LPComp_GetCompare ****************************************************************************//** * -* This function returns a nonzero value when the voltage connected to the -* positive input is greater than the negative input voltage. +* This function returns a nonzero value when the voltage connected to the +* positive input is greater than the negative input voltage. * * \param *base * The LPComp register structure pointer. @@ -521,7 +519,7 @@ __STATIC_INLINE void Cy_LPComp_UlpReferenceDisable(LPCOMP_Type *base) __STATIC_INLINE uint32_t Cy_LPComp_GetCompare(LPCOMP_Type const * base, cy_en_lpcomp_channel_t channel) { uint32_t result; - + CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); if (CY_LPCOMP_CHANNEL_0 == channel) @@ -532,7 +530,7 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetCompare(LPCOMP_Type const * base, cy_en_lp { result = _FLD2VAL(LPCOMP_STATUS_OUT1, base->STATUS); } - + return (result); } @@ -541,15 +539,15 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetCompare(LPCOMP_Type const * base, cy_en_lp * Function Name: Cy_LPComp_SetInterruptMask ****************************************************************************//** * -* Configures which bits of the interrupt request register will trigger an +* Configures which bits of the interrupt request register will trigger an * interrupt event. * * \param *base * The LPCOMP register structure pointer. * * \param interrupt -* uint32_t interruptMask: Bit Mask of interrupts to set. -* Bit 0: COMP0 Interrupt Mask +* uint32_t interruptMask: Bit Mask of interrupts to set. +* Bit 0: COMP0 Interrupt Mask * Bit 1: COMP1 Interrupt Mask * * \return None @@ -579,7 +577,7 @@ __STATIC_INLINE void Cy_LPComp_SetInterruptMask(LPCOMP_Type* base, uint32_t inte *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptMask(LPCOMP_Type const * base) { - return (base->INTR_MASK); + return (base->INTR_MASK); } @@ -587,8 +585,8 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptMask(LPCOMP_Type const * base) * Function Name: Cy_LPComp_GetInterruptStatusMasked ****************************************************************************//** * -* Returns an interrupt request register masked by an interrupt mask. -* Returns the result of the bitwise AND operation between the corresponding +* Returns an interrupt request register masked by an interrupt mask. +* Returns the result of the bitwise AND operation between the corresponding * interrupt request and mask bits. * * \param *base @@ -601,7 +599,7 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptMask(LPCOMP_Type const * base) *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptStatusMasked(LPCOMP_Type const * base) { - return (base->INTR_MASKED); + return (base->INTR_MASKED); } @@ -614,14 +612,14 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptStatusMasked(LPCOMP_Type const * * \param *base * The LPCOMP register structure pointer. * -* \return bit mapping information -* Bit 0: COMP0 Interrupt status +* \return bit mapping information +* Bit 0: COMP0 Interrupt status * Bit 1: COMP1 Interrupt status * *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptStatus(LPCOMP_Type const * base) { - return (_FLD2VAL(CY_LPCOMP_INTR, base->INTR)); + return (_FLD2VAL(CY_LPCOMP_INTR, base->INTR)); } @@ -629,13 +627,13 @@ __STATIC_INLINE uint32_t Cy_LPComp_GetInterruptStatus(LPCOMP_Type const * base) * Function Name: Cy_LPComp_ClearInterrupt ****************************************************************************//** * -* Clears LPCOMP interrupts by setting each bit. +* Clears LPCOMP interrupts by setting each bit. * * \param *base * The LPCOMP register structure pointer. * * \param interrupt -* Bit 0: COMP0 Interrupt status +* Bit 0: COMP0 Interrupt status * Bit 1: COMP1 Interrupt status * * \return None @@ -653,16 +651,16 @@ __STATIC_INLINE void Cy_LPComp_ClearInterrupt(LPCOMP_Type* base, uint32_t interr * Function Name: Cy_LPComp_SetInterrupt ****************************************************************************//** * -* Sets a software interrupt request. +* Sets a software interrupt request. * This function is used in the case of combined interrupt signal from the global -* signal reference. This function from either component instance can be used +* signal reference. This function from either component instance can be used * to trigger either or both software interrupts. It sets the INTR_SET interrupt mask. * * \param *base * The LPCOMP register structure pointer. * * \param interrupt -* Bit 0: COMP0 Interrupt status +* Bit 0: COMP0 Interrupt status * Bit 1: COMP1 Interrupt status * * \return None @@ -693,10 +691,10 @@ __STATIC_INLINE void Cy_LPComp_SetInterrupt(LPCOMP_Type* base, uint32_t interrup __STATIC_INLINE void Cy_LPComp_ConnectULPReference(LPCOMP_Type *base, cy_en_lpcomp_channel_t channel) { CY_ASSERT_L3(CY_LPCOMP_IS_CHANNEL_VALID(channel)); - + if (CY_LPCOMP_CHANNEL_0 == channel) { - base->CMP0_SW_CLEAR = CY_LPCOMP_CMP0_SW_NEG_Msk; + base->CMP0_SW_CLEAR = CY_LPCOMP_CMP0_SW_NEG_Msk; base->CMP0_SW = _CLR_SET_FLD32U(base->CMP0_SW, LPCOMP_CMP0_SW_CMP0_VN0, CY_LPCOMP_REF_CONNECTED); } else diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.c index 6117ded8ed..3f49ae3d6e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_lvd.h" @@ -26,7 +24,7 @@ extern "C" { * When this function is registered by \ref Cy_SysPm_RegisterCallback - it * automatically enables the LVD after wake up from Deep-Sleep mode. * -* \param callbackParams The pointer to the callback parameters structure, +* \param callbackParams The pointer to the callback parameters structure, * see \ref cy_stc_syspm_callback_params_t. * * \return the SysPm callback status \ref cy_en_syspm_status_t. @@ -35,23 +33,23 @@ extern "C" { cy_en_syspm_status_t Cy_LVD_DeepSleepCallback(cy_stc_syspm_callback_params_t * callbackParams) { cy_en_syspm_status_t ret = CY_SYSPM_SUCCESS; - + switch(callbackParams->mode) { case CY_SYSPM_CHECK_READY: case CY_SYSPM_CHECK_FAIL: case CY_SYSPM_BEFORE_TRANSITION: break; - + case CY_SYSPM_AFTER_TRANSITION: Cy_LVD_Enable(); break; - + default: ret = CY_SYSPM_FAIL; break; } - + return(ret); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.h index 12bc857fdb..5c9d529006 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/lvd/cy_lvd.h @@ -1,33 +1,31 @@ /***************************************************************************//** * \file cy_lvd.h * \version 1.0.1 -* +* * The header file of the LVD driver. * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** * \addtogroup group_lvd * \{ -* The LVD driver provides an API to manage the Low Voltage Detection block. -* The LVD block provides a status of currently observed VDDD voltage +* The LVD driver provides an API to manage the Low Voltage Detection block. +* The LVD block provides a status of currently observed VDDD voltage * and triggers an interrupt when the observed voltage crosses an adjusted * threshold. * * \section group_lvd_configuration_considerations Configuration Considerations -* To set up an LVD, configure the voltage threshold by the -* \ref Cy_LVD_SetThreshold function, ensure that the LVD block itself and LVD -* interrupt are disabled (by the \ref Cy_LVD_Disable and +* To set up an LVD, configure the voltage threshold by the +* \ref Cy_LVD_SetThreshold function, ensure that the LVD block itself and LVD +* interrupt are disabled (by the \ref Cy_LVD_Disable and * \ref Cy_LVD_ClearInterruptMask functions correspondingly) before changing the -* threshold to prevent propagating a false interrupt. +* threshold to prevent propagating a false interrupt. * Then configure interrupts by the \ref Cy_LVD_SetInterruptConfig function, do -* not forget to initialise an interrupt handler (the interrupt source number +* not forget to initialise an interrupt handler (the interrupt source number * is srss_interrupt_IRQn). * Then enable LVD by the \ref Cy_LVD_Enable function, then wait for at least 20us * to get the circuit stabilized and clear the possible false interrupts by the @@ -68,14 +66,14 @@ * A * The object addressed by the pointer parameter '%s' is not modified and * so the pointer could be of type 'pointer to const'. -* The pointer parameter is not used or modified, as there is no need -* to do any actions with it. However, such parameter is -* required to be presented in the function, because the -* \ref Cy_LVD_DeepSleepCallback is a callback +* The pointer parameter is not used or modified, as there is no need +* to do any actions with it. However, such parameter is +* required to be presented in the function, because the +* \ref Cy_LVD_DeepSleepCallback is a callback * of \ref cy_en_syspm_status_t type. -* The SysPM driver callback function type requires implementing the +* The SysPM driver callback function type requires implementing the * function with the next parameters and return value:
-* cy_en_syspm_status_t (*Cy_SysPmCallback) +* cy_en_syspm_status_t (*Cy_SysPmCallback) * (cy_stc_syspm_callback_params_t *callbackParams); * * @@ -106,7 +104,7 @@ #if !defined CY_LVD_H #define CY_LVD_H - + #include "syspm/cy_syspm.h" #ifdef __cplusplus @@ -127,7 +125,7 @@ extern "C" { #define CY_LVD_ID (CY_PDL_DRV_ID(0x39U)) /** Interrupt mask for \ref Cy_LVD_GetInterruptStatus(), - \ref Cy_LVD_GetInterruptMask() and + \ref Cy_LVD_GetInterruptMask() and \ref Cy_LVD_GetInterruptStatusMasked() */ #define CY_LVD_INTR (SRSS_SRSS_INTR_HVLVD1_Msk) @@ -202,11 +200,11 @@ typedef enum ((threshold) == CY_LVD_THRESHOLD_2_9_V) || \ ((threshold) == CY_LVD_THRESHOLD_3_0_V) || \ ((threshold) == CY_LVD_THRESHOLD_3_1_V)) - + #define CY_LVD_CHECK_INTR_CFG(intrCfg) (((intrCfg) == CY_LVD_INTR_DISABLE) || \ ((intrCfg) == CY_LVD_INTR_RISING) || \ ((intrCfg) == CY_LVD_INTR_FALLING) || \ - ((intrCfg) == CY_LVD_INTR_BOTH)) + ((intrCfg) == CY_LVD_INTR_BOTH)) /** \endcond */ /** @@ -236,7 +234,7 @@ cy_en_syspm_status_t Cy_LVD_DeepSleepCallback(cy_stc_syspm_callback_params_t * c * Function Name: Cy_LVD_Enable ****************************************************************************//** * -* Enables the output of the LVD block when the VDDD voltage is +* Enables the output of the LVD block when the VDDD voltage is * at or below the threshold. * See the Configuration Considerations section for details. * @@ -265,12 +263,12 @@ __STATIC_INLINE void Cy_LVD_Disable(void) ****************************************************************************//** * * Sets a threshold for monitoring the VDDD voltage. -* To prevent propagating a false interrupt, before changing the threshold -* ensure that the LVD block itself and LVD interrupt are disabled by the -* \ref Cy_LVD_Disable and \ref Cy_LVD_ClearInterruptMask functions +* To prevent propagating a false interrupt, before changing the threshold +* ensure that the LVD block itself and LVD interrupt are disabled by the +* \ref Cy_LVD_Disable and \ref Cy_LVD_ClearInterruptMask functions * correspondingly. * -* \param threshold +* \param threshold * Threshold selection for Low Voltage Detect circuit, \ref cy_en_lvd_tripsel_t. * *******************************************************************************/ @@ -287,9 +285,9 @@ __STATIC_INLINE void Cy_LVD_SetThreshold(cy_en_lvd_tripsel_t threshold) * * Returns the status of LVD. * SRSS LVD Status Register (PWR_LVD_STATUS). -* +* * \return LVD status, \ref cy_en_lvd_status_t. -* +* *******************************************************************************/ __STATIC_INLINE cy_en_lvd_status_t Cy_LVD_GetStatus(void) { @@ -301,11 +299,11 @@ __STATIC_INLINE cy_en_lvd_status_t Cy_LVD_GetStatus(void) * Function Name: Cy_LVD_GetInterruptStatus ****************************************************************************//** * -* Returns the status of LVD interrupt. +* Returns the status of LVD interrupt. * SRSS Interrupt Register (SRSS_INTR). -* +* * \return SRSS Interrupt status, \ref CY_LVD_INTR. -* +* *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatus(void) { @@ -317,7 +315,7 @@ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatus(void) * Function Name: Cy_LVD_ClearInterrupt ****************************************************************************//** * -* Clears LVD interrupt. +* Clears LVD interrupt. * SRSS Interrupt Register (SRSS_INTR). * *******************************************************************************/ @@ -334,7 +332,7 @@ __STATIC_INLINE void Cy_LVD_ClearInterrupt(void) * * Triggers the device to generate interrupt for LVD. * SRSS Interrupt Set Register (SRSS_INTR_SET). -* +* *******************************************************************************/ __STATIC_INLINE void Cy_LVD_SetInterrupt(void) { @@ -353,7 +351,7 @@ __STATIC_INLINE void Cy_LVD_SetInterrupt(void) * *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptMask(void) -{ +{ return (SRSS->SRSS_INTR_MASK & SRSS_SRSS_INTR_MASK_HVLVD1_Msk); } @@ -362,7 +360,7 @@ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptMask(void) * Function Name: Cy_LVD_SetInterruptMask ****************************************************************************//** * -* Enables LVD interrupts. +* Enables LVD interrupts. * Sets the LVD interrupt mask in the SRSS_INTR_MASK register. * *******************************************************************************/ @@ -376,7 +374,7 @@ __STATIC_INLINE void Cy_LVD_SetInterruptMask(void) * Function Name: Cy_LVD_ClearInterruptMask ****************************************************************************//** * -* Disables LVD interrupts. +* Disables LVD interrupts. * Clears the LVD interrupt mask in the SRSS_INTR_MASK register. * *******************************************************************************/ @@ -390,12 +388,12 @@ __STATIC_INLINE void Cy_LVD_ClearInterruptMask(void) * Function Name: Cy_LVD_GetInterruptStatusMasked ****************************************************************************//** * -* Returns the masked interrupt status which is a bitwise AND between the +* Returns the masked interrupt status which is a bitwise AND between the * interrupt status and interrupt mask registers. * SRSS Interrupt Masked Register (SRSS_INTR_MASKED). -* +* * \return SRSS Interrupt Masked value, \ref CY_LVD_INTR. -* +* *******************************************************************************/ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatusMasked(void) { @@ -407,9 +405,9 @@ __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatusMasked(void) * Function Name: Cy_LVD_SetInterruptConfig ****************************************************************************//** * -* Sets a configuration for LVD interrupt. +* Sets a configuration for LVD interrupt. * SRSS Interrupt Configuration Register (SRSS_INTR_CFG). -* +* * \param lvdInterruptConfig \ref cy_en_lvd_intr_config_t. * *******************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.c index 0c913a11f4..5db96d5d2a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.c @@ -6,10 +6,9 @@ * Provides a system API for the MCWDT driver. * ******************************************************************************** -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* \copyright +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_mcwdt.h" @@ -62,10 +61,10 @@ cy_en_mcwdt_status_t Cy_MCWDT_Init(MCWDT_STRUCT_Type *base, cy_stc_mcwdt_config_ _VAL2FLD(MCWDT_STRUCT_MCWDT_CONFIG_WDT_MODE1, config->c1Mode) | (config->c0c1Cascade ? MCWDT_STRUCT_MCWDT_CONFIG_WDT_CASCADE0_1_Msk : 0UL) | _VAL2FLD(MCWDT_STRUCT_MCWDT_CONFIG_WDT_MODE0, config->c0Mode); - + ret = CY_MCWDT_SUCCESS; } - + return (ret); } @@ -109,14 +108,14 @@ void Cy_MCWDT_DeInit(MCWDT_STRUCT_Type *base) * The base pointer to a structure that describes the registers. * * \note -* The user must enable both counters, and cascade C0 to C1, -* before calling this function. C2 is not reported. +* The user must enable both counters, and cascade C0 to C1, +* before calling this function. C2 is not reported. * Instead, to get a 64-bit C2-C1-C0 cascaded value, the * user must call this function followed by * Cy_MCWDT_GetCount(base, CY_MCWDT_COUNTER2), and then combine the results. -* \note This function does not return the correct result when it is called -* after the Cy_MCWDT_Enable() or Cy_MCWDT_ResetCounters() function with -* a delay less than two lf_clk cycles. The recommended waitUs parameter +* \note This function does not return the correct result when it is called +* after the Cy_MCWDT_Enable() or Cy_MCWDT_ResetCounters() function with +* a delay less than two lf_clk cycles. The recommended waitUs parameter * value is 100 us. * *******************************************************************************/ @@ -127,15 +126,15 @@ uint32_t Cy_MCWDT_GetCountCascaded(MCWDT_STRUCT_Type const *base) uint32_t counter0 = countVal & MCWDT_STRUCT_MCWDT_CNTLOW_WDT_CTR0_Msk; uint32_t match0 = _FLD2VAL(MCWDT_STRUCT_MCWDT_MATCH_WDT_MATCH0, base->MCWDT_MATCH); uint32_t match1 = _FLD2VAL(MCWDT_STRUCT_MCWDT_MATCH_WDT_MATCH1, base->MCWDT_MATCH); - - /* - * The counter counter0 goes to zero when it reaches the match0 - * value (c0ClearOnMatch = 1) or reaches the maximum - * value (c0ClearOnMatch = 0). The counter counter1 increments on - * the next rising edge of the MCWDT clock after - * the Clear On Match event takes place. - * The software increments counter1 to eliminate the case - * when the both counter0 and counter1 counters have zeros. + + /* + * The counter counter0 goes to zero when it reaches the match0 + * value (c0ClearOnMatch = 1) or reaches the maximum + * value (c0ClearOnMatch = 0). The counter counter1 increments on + * the next rising edge of the MCWDT clock after + * the Clear On Match event takes place. + * The software increments counter1 to eliminate the case + * when the both counter0 and counter1 counters have zeros. */ if (0u == counter0) { @@ -144,19 +143,19 @@ uint32_t Cy_MCWDT_GetCountCascaded(MCWDT_STRUCT_Type const *base) /* Check if the counter0 is Free running */ if (0u == _FLD2VAL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_CLEAR0, base->MCWDT_CONFIG)) - { + { /* Save match0 value with the correction when counter0 - * goes to zero when it reaches the match0 value. + * goes to zero when it reaches the match0 value. */ countVal = match0 + 1u; - - if (0u < counter1) + + if (0u < counter1) { /* Set match to the maximum value */ - match0 = MCWDT_STRUCT_MCWDT_CNTLOW_WDT_CTR0_Msk; + match0 = MCWDT_STRUCT_MCWDT_CNTLOW_WDT_CTR0_Msk; } - - if (countVal < counter0) + + if (countVal < counter0) { /* Decrement counter1 when the counter0 is great than match0 value */ counter1--; @@ -165,7 +164,7 @@ uint32_t Cy_MCWDT_GetCountCascaded(MCWDT_STRUCT_Type const *base) /* Add the correction to counter0 */ counter0 += counter1; - + /* Set counter1 match value to 65535 when the counter1 is free running */ if (0u == _FLD2VAL(MCWDT_STRUCT_MCWDT_CONFIG_WDT_CLEAR1, base->MCWDT_CONFIG)) { diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.h index 887213a061..eff6854b1e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/mcwdt/cy_mcwdt.h @@ -7,15 +7,13 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** * \defgroup group_mcwdt Multi-Counter Watchdog (MCWDT) * \{ -* A MCWDT has two 16-bit counters and one 32-bit counter. +* A MCWDT has two 16-bit counters and one 32-bit counter. * You can use this driver to create a free-running * timer or generate periodic interrupts. The driver also * includes support for the watchdog function to recover from CPU or @@ -32,45 +30,45 @@ * * An additional use case is to implement a watchdog used for recovering from a CPU or * firmware failure. -* +* * \section group_mcwdt_configuration Configuration Considerations * -* Each MCWDT may be configured for a particular product. -* One MCWDT block can be associated with only one CPU during runtime. -* A single MCWDT is not intended to be used by multiple CPUs simultaneously. -* Each block contains three sub-counters, each of which can be configured for -* various system utility functions - free running counter, periodic interrupts, +* Each MCWDT may be configured for a particular product. +* One MCWDT block can be associated with only one CPU during runtime. +* A single MCWDT is not intended to be used by multiple CPUs simultaneously. +* Each block contains three sub-counters, each of which can be configured for +* various system utility functions - free running counter, periodic interrupts, * watchdog reset, or three interrupts followed by a watchdog reset. -* All counters are clocked by either LFCLK (nominal 32 kHz) or by a cascaded +* All counters are clocked by either LFCLK (nominal 32 kHz) or by a cascaded * counter. * A simplified diagram of the MCWDT hardware is shown below: * \image html mcwdt.png -* The frequency of the periodic interrupts can be configured using the Match -* value with combining Clear on match option, which can be set individually -* for each counter using Cy_MCWDT_SetClearOnMatch(). When the Clear on match option -* is not set, the periodic interrupts of the C0 and C1 16-bit sub-counters occur -* after 65535 counts and the match value defines the shift between interrupts -* (see the figure below). The enabled Clear on match option +* The frequency of the periodic interrupts can be configured using the Match +* value with combining Clear on match option, which can be set individually +* for each counter using Cy_MCWDT_SetClearOnMatch(). When the Clear on match option +* is not set, the periodic interrupts of the C0 and C1 16-bit sub-counters occur +* after 65535 counts and the match value defines the shift between interrupts +* (see the figure below). The enabled Clear on match option * resets the counter when the interrupt occurs. * \image html mcwdt_counters.png -* 32-bit sub-counter C2 does not have Clear on match option. -* The interrupt of counter C2 occurs when the counts equal +* 32-bit sub-counter C2 does not have Clear on match option. +* The interrupt of counter C2 occurs when the counts equal * 2Toggle bit value. * \image html mcwdt_subcounters.png -* To set up an MCWDT, provide the configuration parameters in the -* cy_stc_mcwdt_config_t structure. Then call -* Cy_MCWDT_Init() to initialize the driver. +* To set up an MCWDT, provide the configuration parameters in the +* cy_stc_mcwdt_config_t structure. Then call +* Cy_MCWDT_Init() to initialize the driver. * Call Cy_MCWDT_Enable() to enable all specified counters. * * You can also set the mode of operation for any counter. If you choose -* interrupt mode, use Cy_MCWDT_SetInterruptMask() with the -* parameter for the masks described in Macro Section. All counter interrupts +* interrupt mode, use Cy_MCWDT_SetInterruptMask() with the +* parameter for the masks described in Macro Section. All counter interrupts * are OR'd together to from a single combined MCWDT interrupt. -* Additionally, enable the Global interrupts and initialize the referenced -* interrupt by setting the priority and the interrupt vector using +* Additionally, enable the Global interrupts and initialize the referenced +* interrupt by setting the priority and the interrupt vector using * \ref Cy_SysInt_Init() of the sysint driver. -* -* The values of the MCWDT counters can be monitored using +* +* The values of the MCWDT counters can be monitored using * Cy_MCWDT_GetCount(). * * \note In addition to the MCWDTs, each device has a separate watchdog timer @@ -80,7 +78,7 @@ * * \section group_mcwdt_more_information More Information * -* For more information on the MCWDT peripheral, refer to +* For more information on the MCWDT peripheral, refer to * the technical reference manual (TRM). * * \section group_mcwdt_MISRA MISRA-C Compliance] @@ -137,19 +135,19 @@ extern "C" { /** The MCWDT component configuration structure. */ typedef struct { - uint16_t c0Match; /**< The sub-counter#0 match comparison value, for interrupt or watchdog timeout. - Range: 0 - 65535 for c0ClearOnMatch = 0 and 1 - 65535 for + uint16_t c0Match; /**< The sub-counter#0 match comparison value, for interrupt or watchdog timeout. + Range: 0 - 65535 for c0ClearOnMatch = 0 and 1 - 65535 for c0ClearOnMatch = 1. */ uint16_t c1Match; /**< The sub-counter#1 match comparison value, for interrupt or watchdog timeout. - Range: 0 - 65535 for c1ClearOnMatch = 0 and 1 - 65535 for + Range: 0 - 65535 for c1ClearOnMatch = 0 and 1 - 65535 for c1ClearOnMatch = 1. */ - uint8_t c0Mode; /**< The sub-counter#0 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE, + uint8_t c0Mode; /**< The sub-counter#0 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE, \ref CY_MCWDT_MODE_INT, \ref CY_MCWDT_MODE_RESET and \ref CY_MCWDT_MODE_INT_RESET. */ - uint8_t c1Mode; /**< The sub-counter#1 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE, + uint8_t c1Mode; /**< The sub-counter#1 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE, \ref CY_MCWDT_MODE_INT, \ref CY_MCWDT_MODE_RESET and \ref CY_MCWDT_MODE_INT_RESET. */ - uint8_t c2ToggleBit; /**< The sub-counter#2 Period / Toggle Bit value. + uint8_t c2ToggleBit; /**< The sub-counter#2 Period / Toggle Bit value. Range: 0 - 31. */ - uint8_t c2Mode; /**< The sub-counter#2 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE + uint8_t c2Mode; /**< The sub-counter#2 mode. It can have the following values: \ref CY_MCWDT_MODE_NONE and \ref CY_MCWDT_MODE_INT. */ bool c0ClearOnMatch; /**< The sub-counter#0 Clear On Match parameter enabled/disabled. */ bool c1ClearOnMatch; /**< The sub-counter#1 Clear On Match parameter enabled/disabled. */ @@ -191,28 +189,28 @@ typedef struct #define CY_MCWDT_ALL_WDT_ENABLE_Msk (MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE0_Msk | MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE1_Msk | \ MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE2_Msk) - + #define CY_MCWDT_CTR0_Pos (0u) #define CY_MCWDT_CTR1_Pos (1u) #define CY_MCWDT_CTR2_Pos (2u) #define CY_MCWDT_CTR_Pos (0UL) -#define CY_MCWDT_C2_MODE_MASK (1u) - +#define CY_MCWDT_C2_MODE_MASK (1u) + /** \endcond */ #define CY_MCWDT_ID CY_PDL_DRV_ID(0x35u) /**< MCWDT PDL ID */ -#define CY_MCWDT_CTR0 (1UL << CY_MCWDT_CTR0_Pos) /**< The sub-counter#0 mask. This macro is used with functions +#define CY_MCWDT_CTR0 (1UL << CY_MCWDT_CTR0_Pos) /**< The sub-counter#0 mask. This macro is used with functions that handle multiple counters, including Cy_MCWDT_Enable(), Cy_MCWDT_Disable(), Cy_MCWDT_ClearInterrupt() and Cy_MCWDT_ResetCounters(). */ -#define CY_MCWDT_CTR1 (1UL << CY_MCWDT_CTR1_Pos) /**< The sub-counter#1 mask. This macro is used with functions +#define CY_MCWDT_CTR1 (1UL << CY_MCWDT_CTR1_Pos) /**< The sub-counter#1 mask. This macro is used with functions that handle multiple counters, including Cy_MCWDT_Enable(), Cy_MCWDT_Disable(), Cy_MCWDT_ClearInterrupt() and Cy_MCWDT_ResetCounters(). */ -#define CY_MCWDT_CTR2 (1UL << CY_MCWDT_CTR2_Pos) /**< The sub-counter#2 mask. This macro is used with functions +#define CY_MCWDT_CTR2 (1UL << CY_MCWDT_CTR2_Pos) /**< The sub-counter#2 mask. This macro is used with functions that handle multiple counters, including Cy_MCWDT_Enable(), Cy_MCWDT_Disable(), Cy_MCWDT_ClearInterrupt() and Cy_MCWDT_ResetCounters(). */ -#define CY_MCWDT_CTR_Msk (CY_MCWDT_CTR0 | CY_MCWDT_CTR1 | CY_MCWDT_CTR2) /**< The mask for all sub-counters. This macro is used with functions +#define CY_MCWDT_CTR_Msk (CY_MCWDT_CTR0 | CY_MCWDT_CTR1 | CY_MCWDT_CTR2) /**< The mask for all sub-counters. This macro is used with functions that handle multiple counters, including Cy_MCWDT_Enable(), Cy_MCWDT_Disable(), Cy_MCWDT_ClearInterrupt() and Cy_MCWDT_ResetCounters(). */ @@ -238,7 +236,7 @@ typedef enum CY_MCWDT_MODE_NONE, /**< The No action mode. It is used for Set/GetMode functions. */ CY_MCWDT_MODE_INT, /**< The Interrupt mode. It is used for Set/GetMode functions. */ CY_MCWDT_MODE_RESET, /**< The Reset mode. It is used for Set/GetMode functions. */ - CY_MCWDT_MODE_INT_RESET /**< The Three interrupts then watchdog reset mode. It is used for + CY_MCWDT_MODE_INT_RESET /**< The Three interrupts then watchdog reset mode. It is used for Set/GetMode functions. */ } cy_en_mcwdtmode_t; @@ -246,17 +244,17 @@ typedef enum typedef enum { CY_MCWDT_CASCADE_NONE, /**< The cascading is disabled. It is used for Set/GetCascade functions. */ - CY_MCWDT_CASCADE_C0C1, /**< The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade. + CY_MCWDT_CASCADE_C0C1, /**< The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade. It is used for Set/GetCascade functions. */ CY_MCWDT_CASCADE_C1C2, /**< The sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade. It is used for Set/GetCascade functions. */ - CY_MCWDT_CASCADE_BOTH /**< The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade - and the sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade. + CY_MCWDT_CASCADE_BOTH /**< The sub-counter#1 is clocked by LFCLK or from sub-counter#0 cascade + and the sub-counter#2 is clocked by LFCLK or from sub-counter#1 cascade. It is used for Set/GetCascade functions. */ } cy_en_mcwdtcascade_t; /** The MCWDT error codes. */ -typedef enum +typedef enum { CY_MCWDT_SUCCESS = 0x00u, /**< Successful */ CY_MCWDT_BAD_PARAM = CY_MCWDT_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< One or more invalid parameters */ @@ -267,9 +265,9 @@ typedef enum /** \cond PARAM_CHECK_MACROS */ -/** Parameter check macros */ -#define CY_MCWDT_IS_CNTS_MASK_VALID(counters) (0U == ((counters) & (uint32_t)~CY_MCWDT_CTR_Msk)) - +/** Parameter check macros */ +#define CY_MCWDT_IS_CNTS_MASK_VALID(counters) (0U == ((counters) & (uint32_t)~CY_MCWDT_CTR_Msk)) + #define CY_MCWDT_IS_CNT_NUM_VALID(counter) ((CY_MCWDT_COUNTER0 == (counter)) || \ (CY_MCWDT_COUNTER1 == (counter)) || \ (CY_MCWDT_COUNTER2 == (counter))) @@ -286,12 +284,12 @@ typedef enum (CY_MCWDT_CASCADE_C0C1 == (cascade)) || \ (CY_MCWDT_CASCADE_C1C2 == (cascade)) || \ (CY_MCWDT_CASCADE_BOTH == (cascade))) - + #define CY_MCWDT_IS_MATCH_VALID(clearOnMatch, match) ((clearOnMatch) ? (1UL <= (match)) : true) -#define CY_MCWDT_IS_BIT_VALID(bit) (31UL >= (bit)) +#define CY_MCWDT_IS_BIT_VALID(bit) (31UL >= (bit)) + - /** \endcond */ @@ -346,13 +344,13 @@ uint32_t Cy_MCWDT_GetCountCascaded(MCWDT_STRUCT_Type const *base); * CY_MCWDT_CTR2 macros. * * \param waitUs -* The function waits for some delay in microseconds before returning, -* because the counter begins counting after two lf_clk cycles pass. +* The function waits for some delay in microseconds before returning, +* because the counter begins counting after two lf_clk cycles pass. * The recommended value is 93 us. * \note * Setting this parameter to a zero means No wait. In this case, it is -* the user's responsibility to check whether the selected counters were enabled -* immediately after the function call. This can be done by the +* the user's responsibility to check whether the selected counters were enabled +* immediately after the function call. This can be done by the * Cy_MCWDT_GetEnabledStatus() API. * *******************************************************************************/ @@ -361,7 +359,7 @@ __STATIC_INLINE void Cy_MCWDT_Enable(MCWDT_STRUCT_Type *base, uint32_t counters, uint32_t enableCounters; CY_ASSERT_L2(CY_MCWDT_IS_CNTS_MASK_VALID(counters)); - + /* Extract particular counters for enable */ enableCounters = ((0UL != (counters & CY_MCWDT_CTR0)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE0_Msk : 0UL) | ((0UL != (counters & CY_MCWDT_CTR1)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE1_Msk : 0UL) | @@ -387,13 +385,13 @@ __STATIC_INLINE void Cy_MCWDT_Enable(MCWDT_STRUCT_Type *base, uint32_t counters, * CY_MCWDT_CTR2 macros. * * \param waitUs -* The function waits for some delay in microseconds before returning, -* because the counter stops counting after two lf_clk cycles pass. +* The function waits for some delay in microseconds before returning, +* because the counter stops counting after two lf_clk cycles pass. * The recommended value is 93 us. * \note -* Setting this parameter to a zero means No wait. In this case, it is -* the user's responsibility to check whether the selected counters were disabled -* immediately after the function call. This can be done by the +* Setting this parameter to a zero means No wait. In this case, it is +* the user's responsibility to check whether the selected counters were disabled +* immediately after the function call. This can be done by the * Cy_MCWDT_GetEnabledStatus() API. * *******************************************************************************/ @@ -402,7 +400,7 @@ __STATIC_INLINE void Cy_MCWDT_Disable(MCWDT_STRUCT_Type *base, uint32_t counters uint32_t disableCounters; CY_ASSERT_L2(CY_MCWDT_IS_CNTS_MASK_VALID(counters)); - + /* Extract particular counters for disable */ disableCounters = ((0UL != (counters & CY_MCWDT_CTR0)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE0_Msk : 0UL) | ((0UL != (counters & CY_MCWDT_CTR1)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_ENABLE1_Msk : 0UL) | @@ -435,7 +433,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetEnabledStatus(MCWDT_STRUCT_Type const *base uint32_t status = 0u; CY_ASSERT_L3(CY_MCWDT_IS_CNT_NUM_VALID(counter)); - + switch (counter) { case CY_MCWDT_COUNTER0: @@ -540,7 +538,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetLockedStatus(MCWDT_STRUCT_Type const *base) * The mode for Counter 2 can be set only to CY_MCWDT_MODE_NONE or CY_MCWDT_MODE_INT. * * \note -* This API must not be called while the counters are running. +* This API must not be called while the counters are running. * Prior to calling this API, the counter must be disabled. * *******************************************************************************/ @@ -607,7 +605,7 @@ __STATIC_INLINE cy_en_mcwdtmode_t Cy_MCWDT_GetMode(MCWDT_STRUCT_Type const *base * Set 0 to disable; 1 to enable. * * \note -* This API must not be called while the counters are running. +* This API must not be called while the counters are running. * Prior to calling this API, the counter must be disabled. * *******************************************************************************/ @@ -678,17 +676,17 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetClearOnMatch(MCWDT_STRUCT_Type const *base, * Sets or clears each of the cascade options. * * \note -* This API must not be called when the counters are running. +* This API must not be called when the counters are running. * Prior to calling this API, the counter must be disabled. * *******************************************************************************/ __STATIC_INLINE void Cy_MCWDT_SetCascade(MCWDT_STRUCT_Type *base, cy_en_mcwdtcascade_t cascade) { CY_ASSERT_L3(CY_MCWDT_IS_CASCADE_VALID(cascade)); - + base->MCWDT_CONFIG = _CLR_SET_FLD32U(base->MCWDT_CONFIG, MCWDT_STRUCT_MCWDT_CONFIG_WDT_CASCADE0_1, (uint32_t) cascade); - base->MCWDT_CONFIG = _CLR_SET_FLD32U(base->MCWDT_CONFIG, MCWDT_STRUCT_MCWDT_CONFIG_WDT_CASCADE1_2, + base->MCWDT_CONFIG = _CLR_SET_FLD32U(base->MCWDT_CONFIG, MCWDT_STRUCT_MCWDT_CONFIG_WDT_CASCADE1_2, ((uint32_t) cascade >> 1u)); } @@ -730,20 +728,20 @@ __STATIC_INLINE cy_en_mcwdtcascade_t Cy_MCWDT_GetCascade(MCWDT_STRUCT_Type const * The number of the WDT counter. The valid range is [0-1]. * * \param match -* The value to match against the counter. -* The valid range is [0-65535] for c0ClearOnMatch (or c1ClearOnMatch) = 0 +* The value to match against the counter. +* The valid range is [0-65535] for c0ClearOnMatch (or c1ClearOnMatch) = 0 * and [1-65535] for c0ClearOnMatch (or c1ClearOnMatch) = 1. * * \note * The match value is not supported by Counter 2. * * \note -* Action on match is taken on the next increment after the counter value +* Action on match is taken on the next increment after the counter value * equal to match value. * * \param waitUs -* The function waits for some delay in microseconds before returning, -* because the match affects after two lf_clk cycles pass. The recommended +* The function waits for some delay in microseconds before returning, +* because the match affects after two lf_clk cycles pass. The recommended * value is 93 us. * \note * Setting this parameter to a zero means No wait. This must be taken @@ -753,8 +751,8 @@ __STATIC_INLINE cy_en_mcwdtcascade_t Cy_MCWDT_GetCascade(MCWDT_STRUCT_Type const __STATIC_INLINE void Cy_MCWDT_SetMatch(MCWDT_STRUCT_Type *base, cy_en_mcwdtctr_t counter, uint32_t match, uint16_t waitUs) { CY_ASSERT_L3(CY_MCWDT_IS_CNT_NUM_VALID(counter)); - CY_ASSERT_L2(CY_MCWDT_IS_MATCH_VALID((CY_MCWDT_COUNTER0 == counter) ? - ((base->MCWDT_CONFIG & MCWDT_STRUCT_MCWDT_CONFIG_WDT_CLEAR0_Msk) > 0U) : + CY_ASSERT_L2(CY_MCWDT_IS_MATCH_VALID((CY_MCWDT_COUNTER0 == counter) ? + ((base->MCWDT_CONFIG & MCWDT_STRUCT_MCWDT_CONFIG_WDT_CLEAR0_Msk) > 0U) : ((base->MCWDT_CONFIG & MCWDT_STRUCT_MCWDT_CONFIG_WDT_CLEAR1_Msk) > 0U), match)); @@ -820,7 +818,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetMatch(MCWDT_STRUCT_Type const *base, cy_en_ __STATIC_INLINE void Cy_MCWDT_SetToggleBit(MCWDT_STRUCT_Type *base, uint32_t bit) { CY_ASSERT_L2(CY_MCWDT_IS_BIT_VALID(bit)); - + base->MCWDT_CONFIG = _CLR_SET_FLD32U(base->MCWDT_CONFIG, MCWDT_STRUCT_MCWDT_CONFIG_WDT_BITS2, bit); } @@ -866,7 +864,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetCount(MCWDT_STRUCT_Type const *base, cy_en_ uint32_t countVal = 0u; CY_ASSERT_L3(CY_MCWDT_IS_CNT_NUM_VALID(counter)); - + switch (counter) { case CY_MCWDT_COUNTER0: @@ -902,17 +900,17 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetCount(MCWDT_STRUCT_Type const *base, cy_en_ * CY_MCWDT_CTR2 macros. * * \param waitUs -* The function waits for some delay in microseconds before returning, because +* The function waits for some delay in microseconds before returning, because * a reset occurs after one lf_clk cycle passes. The recommended value is 62 us. -* \note This function resets the counters two times to prevent the case when +* \note This function resets the counters two times to prevent the case when * the Counter 1 is not reset when the counters are cascaded. The delay waitUs -* must be greater than 100 us when the counters are cascaded. -* The total delay is greater than 2*waitUs because the function has +* must be greater than 100 us when the counters are cascaded. +* The total delay is greater than 2*waitUs because the function has * the delay after the first reset. * \note -* Setting this parameter to a zero means No wait. In this case, it is the -* user's responsibility to check whether the selected counters were reset -* immediately after the function call. This can be done by the +* Setting this parameter to a zero means No wait. In this case, it is the +* user's responsibility to check whether the selected counters were reset +* immediately after the function call. This can be done by the * Cy_MCWDT_GetCount() API. * *******************************************************************************/ @@ -921,18 +919,18 @@ __STATIC_INLINE void Cy_MCWDT_ResetCounters(MCWDT_STRUCT_Type *base, uint32_t co uint32_t resetCounters; CY_ASSERT_L2(CY_MCWDT_IS_CNTS_MASK_VALID(counters)); - + /* Extract particular counters for reset */ resetCounters = ((0UL != (counters & CY_MCWDT_CTR0)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_RESET0_Msk : 0UL) | ((0UL != (counters & CY_MCWDT_CTR1)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_RESET1_Msk : 0UL) | ((0UL != (counters & CY_MCWDT_CTR2)) ? MCWDT_STRUCT_MCWDT_CTL_WDT_RESET2_Msk : 0UL); base->MCWDT_CTL |= resetCounters; - + Cy_SysLib_DelayUs(waitUs); - + base->MCWDT_CTL |= resetCounters; - + Cy_SysLib_DelayUs(waitUs); } @@ -977,7 +975,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetInterruptStatus(MCWDT_STRUCT_Type const *ba __STATIC_INLINE void Cy_MCWDT_ClearInterrupt(MCWDT_STRUCT_Type *base, uint32_t counters) { CY_ASSERT_L2(CY_MCWDT_IS_CNTS_MASK_VALID(counters)); - + base->MCWDT_INTR = counters; (void) base->MCWDT_INTR; } @@ -1044,7 +1042,7 @@ __STATIC_INLINE uint32_t Cy_MCWDT_GetInterruptMask(MCWDT_STRUCT_Type const *base __STATIC_INLINE void Cy_MCWDT_SetInterruptMask(MCWDT_STRUCT_Type *base, uint32_t counters) { CY_ASSERT_L2(CY_MCWDT_IS_CNTS_MASK_VALID(counters)); - + base->MCWDT_INTR_MASK = counters; } @@ -1054,9 +1052,9 @@ __STATIC_INLINE void Cy_MCWDT_SetInterruptMask(MCWDT_STRUCT_Type *base, uint32_t ****************************************************************************//** * * Returns the MCWDT interrupt masked request register. This register contains -* the logical AND of corresponding bits from the MCWDT interrupt request and +* the logical AND of corresponding bits from the MCWDT interrupt request and * mask registers. -* In the interrupt service routine, this function identifies which of the +* In the interrupt service routine, this function identifies which of the * enabled MCWDT interrupt sources caused an interrupt event. * * \param base diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.c index 49f23d86b7..b860044ba3 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_pdm_pcm.h" @@ -61,11 +59,11 @@ cy_en_pdm_pcm_status_t Cy_PDM_PCM_Init(PDM_Type * base, cy_stc_pdm_pcm_config_t CY_ASSERT_L3(CY_PDM_PCM_IS_HPF_GAIN_VALID(config->highPassFilterGain)); CY_ASSERT_L3(CY_PDM_PCM_IS_WORD_LEN_VALID(config->wordLen)); CY_ASSERT_L3(CY_PDM_PCM_IS_TRIG_LEVEL(config->rxFifoTriggerLevel, config->chanSelect)); - + ret = CY_PDM_PCM_SUCCESS; base->CTL &= (uint32_t) ~PDM_CTL_ENABLED_Msk; /* Disable the PDM_PCM block */ - + /* The clock setting */ base->CLOCK_CTL = _VAL2FLD(PDM_CLOCK_CTL_CLK_CLOCK_DIV, config->clkDiv) | _VAL2FLD(PDM_CLOCK_CTL_MCLKQ_CLOCK_DIV, config->mclkDiv) | @@ -141,7 +139,7 @@ void Cy_PDM_PCM_SetGain(PDM_Type * base, cy_en_pdm_pcm_chan_select_t chan, cy_en { CY_ASSERT_L3(CY_PDM_PCM_IS_CHAN_VALID(chan)); CY_ASSERT_L3(CY_PDM_PCM_IS_GAIN_VALID(gain)); - + if (chan == CY_PDM_PCM_CHAN_LEFT) { base->CTL = _CLR_SET_FLD32U(base->CTL, PDM_CTL_PGA_L, ((uint32_t) gain)); @@ -171,7 +169,7 @@ void Cy_PDM_PCM_SetGain(PDM_Type * base, cy_en_pdm_pcm_chan_select_t chan, cy_en cy_en_pdm_pcm_gain_t Cy_PDM_PCM_GetGain(PDM_Type const * base, cy_en_pdm_pcm_chan_select_t chan) { cy_en_pdm_pcm_gain_t ret; - + CY_ASSERT_L3(CY_PDM_PCM_IS_CHAN_VALID(chan)); if (chan == CY_PDM_PCM_CHAN_LEFT) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.h index a527c7e4c1..7c02136cd2 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/pdm_pcm/cy_pdm_pcm.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -102,7 +100,7 @@ * VersionChangesReason for Change * * 2.10 -* The gain values in range +4.5...+10.5dB (5 items) of /ref cy_en_pdm_pcm_gain_t are corrected. +* The gain values in range +4.5...+10.5dB (5 items) of /ref cy_en_pdm_pcm_gain_t are corrected. * Added Low Power Callback section. * Incorrect setting of gain values in limited range. * Documentation update and clarification. @@ -110,7 +108,7 @@ * * 2.0 * Enumeration types for gain and soft mute cycles are added.
-* Function parameter checks are added.
+* Function parameter checks are added.
* The next functions are removed: * * Cy_PDM_PCM_EnterLowPowerCallback * * Cy_PDM_PCM_ExitLowPowerCallback @@ -345,7 +343,7 @@ typedef struct - 1: extension by sign bits */ cy_en_pdm_pcm_gain_t gainLeft; /**< Gain for left channel, see #cy_en_pdm_pcm_gain_t */ cy_en_pdm_pcm_gain_t gainRight; /**< Gain for right channel, see #cy_en_pdm_pcm_gain_t */ - uint8_t rxFifoTriggerLevel; /**< Fifo interrupt trigger level (in words), + uint8_t rxFifoTriggerLevel; /**< Fifo interrupt trigger level (in words), range: 0 - 253 for stereo and 0 - 254 for mono mode */ bool dmaTriggerEnable; /**< DMA trigger enable */ uint32_t interruptMask; /**< Interrupts enable mask */ @@ -425,7 +423,7 @@ typedef struct #define CY_PDM_PCM_IS_CHAN_VALID(chan) (((chan) == CY_PDM_PCM_CHAN_LEFT) || \ ((chan) == CY_PDM_PCM_CHAN_RIGHT)) - + #define CY_PDM_PCM_IS_S_CYCLES_VALID(sCycles) (((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_64) || \ ((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_96) || \ ((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_128) || \ @@ -434,7 +432,7 @@ typedef struct ((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_256) || \ ((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_384) || \ ((sCycles) == CY_PDM_PCM_SOFT_MUTE_CYCLES_512)) - + #define CY_PDM_PCM_IS_INTR_MASK_VALID(interrupt) (0UL == ((interrupt) & ((uint32_t) ~CY_PDM_PCM_INTR_MASK))) #define CY_PDM_PCM_IS_SINC_RATE_VALID(sincRate) ((sincRate) <= 127U) #define CY_PDM_PCM_IS_STEP_SEL_VALID(stepSel) ((stepSel) <= 1UL) @@ -604,7 +602,7 @@ __STATIC_INLINE uint32_t Cy_PDM_PCM_GetInterruptStatus(PDM_Type const * base) * Clears one or more PDM-PCM interrupt statuses (sets an INTR register's bits). * * \param base The pointer to the PDM-PCM instance address -* \param interrupt +* \param interrupt * The interrupt bit mask \ref group_pdm_pcm_macros_intrerrupt_masks. * ******************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.c index 92167f965d..abc0d0d33e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.c @@ -1,15 +1,13 @@ -/***************************************************************************//** +/***************************************************************************//** * \file cy_profile.c * \version 1.0 -* -* Provides an API declaration of the energy profiler (EP) driver. * -******************************************************************************** -* \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Provides an API declaration of the energy profiler (EP) driver. +* +******************************************************************************** +* \copyright +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_profile.h" @@ -39,7 +37,7 @@ static cy_stc_profile_ctr_t cy_ep_ctrs[PROFILE_PRFL_CNT_NR]; * the cy_ep_ctrs[] array, and (2) whether the counter has been assigned. * * \param ctrAddr The handle to (address of) the assigned counter -* +* * \return CY_PROFILE_SUCCESS, or CY_PROFILE_BAD_PARAM for invalid ctrAddr or counter not * in use. * @@ -71,12 +69,12 @@ static cy_en_profile_status_t Cy_Profile_IsPtrValid(const cy_stc_profile_ctr_ptr * EP interrupt handler: Increments the overflow member of the counter structure, * for each counter that is in use and has an overflow. * -* This handler is not configured or used automatically. You must configure the -* interrupt handler for the EP, using Cy_SysInt_Init(). Typically you configure +* This handler is not configured or used automatically. You must configure the +* interrupt handler for the EP, using Cy_SysInt_Init(). Typically you configure * the system to use \ref Cy_Profile_ISR() as the overflow interrupt handler. You * can provide a custom interrupt handler to perform additional operations if * required. Your handler can call \ref Cy_Profile_ISR() to handle counter -* overflow. +* overflow. * *******************************************************************************/ void Cy_Profile_ISR(void) @@ -139,7 +137,7 @@ void Cy_Profile_StartProfiling(void) * Function Name: Cy_Profile_ClearConfiguration ****************************************************************************//** * -* Clears all counter configurations and sets all counters and overflow counters +* Clears all counter configurations and sets all counters and overflow counters * to 0. Calls Cy_Profile_ClearCounters() to clear counter registers. * * \funcusage @@ -159,12 +157,12 @@ void Cy_Profile_ClearConfiguration(void) * * Configures and assigns a hardware profile counter to the list of used counters. * -* This function assigns an available profile counter to a slot in the internal +* This function assigns an available profile counter to a slot in the internal * software data structure and returns the handle for that slot location. The data * structure is used to keep track of the counter status and to implement a 64-bit * profile counter. If no counter slots are available, the function returns a * NULL pointer. -* +* * \param monitor The monitor source number * * \param duration Events are monitored (0), or duration is monitored (1) @@ -172,7 +170,7 @@ void Cy_Profile_ClearConfiguration(void) * \param refClk Counter reference clock * * \param weight Weighting factor for the counter value -* +* * \return A pointer to the counter data structure. NULL if no counter is * available. * @@ -199,7 +197,7 @@ cy_stc_profile_ctr_ptr_t Cy_Profile_ConfigureCounter(en_ep_mon_sel_t monitor, cy cy_ep_ctrs[i].weight = weight; /* pass back the handle to (address of) the counter data structure */ retVal = &cy_ep_ctrs[i]; - + /* Load the CTL register bitfields of the assigned counter. */ retVal->cntAddr->CTL = _VAL2FLD(PROFILE_CNT_STRUCT_CTL_CNT_DURATION, retVal->ctlRegVals.cntDuration) | @@ -222,8 +220,8 @@ cy_stc_profile_ctr_ptr_t Cy_Profile_ConfigureCounter(en_ep_mon_sel_t monitor, cy * * \param ctrAddr The handle to the assigned counter (returned by calling * \ref Cy_Profile_ConfigureCounter()). -* -* \return +* +* \return * Status of the operation. * * \note The counter is not disabled by this function. @@ -235,7 +233,7 @@ cy_stc_profile_ctr_ptr_t Cy_Profile_ConfigureCounter(en_ep_mon_sel_t monitor, cy cy_en_profile_status_t Cy_Profile_FreeCounter(cy_stc_profile_ctr_ptr_t ctrAddr) { cy_en_profile_status_t retStatus = CY_PROFILE_BAD_PARAM; - + retStatus = Cy_Profile_IsPtrValid(ctrAddr); if (retStatus == CY_PROFILE_SUCCESS) { @@ -249,15 +247,15 @@ cy_en_profile_status_t Cy_Profile_FreeCounter(cy_stc_profile_ctr_ptr_t ctrAddr) * Function Name: Cy_Profile_EnableCounter ****************************************************************************//** * -* Enables an assigned counter. +* Enables an assigned counter. * * \ref Cy_Profile_ConfigureCounter() must have been called for this counter * before calling this function. * * \param ctrAddr The handle to the assigned counter, (returned by calling * \ref Cy_Profile_ConfigureCounter()). -* -* \return +* +* \return * Status of the operation. * * \funcusage @@ -267,7 +265,7 @@ cy_en_profile_status_t Cy_Profile_FreeCounter(cy_stc_profile_ctr_ptr_t ctrAddr) cy_en_profile_status_t Cy_Profile_EnableCounter(cy_stc_profile_ctr_ptr_t ctrAddr) { cy_en_profile_status_t retStatus = CY_PROFILE_BAD_PARAM; - + retStatus = Cy_Profile_IsPtrValid(ctrAddr); if (retStatus == CY_PROFILE_SUCCESS) { @@ -291,8 +289,8 @@ cy_en_profile_status_t Cy_Profile_EnableCounter(cy_stc_profile_ctr_ptr_t ctrAddr * * \param ctrAddr The handle to the assigned counter, (returned by calling * \ref Cy_Profile_ConfigureCounter()). -* -* \return +* +* \return * Status of the operation. * * \funcusage @@ -326,8 +324,8 @@ cy_en_profile_status_t Cy_Profile_DisableCounter(cy_stc_profile_ctr_ptr_t ctrAdd * \ref Cy_Profile_ConfigureCounter()). * * \param result Output parameter used to write in the result. -* -* \return +* +* \return * Status of the operation. * * \funcusage @@ -360,8 +358,8 @@ cy_en_profile_status_t Cy_Profile_GetRawCount(cy_stc_profile_ctr_ptr_t ctrAddr, * \ref Cy_Profile_ConfigureCounter()). * * \param result Output parameter used to write in the result. -* -* \return +* +* \return * Status of the operation. * * \funcusage @@ -416,7 +414,7 @@ uint64_t Cy_Profile_GetSumWeightedCounts(cy_stc_profile_ctr_ptr_t ptrsArray[], daSum += num; } } - + return (daSum); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.h index 19a85e0ada..adbfec9604 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/profile/cy_profile.h @@ -6,17 +6,15 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** * \defgroup group_energy_profiler Energy Profiler (Profile) * \{ -* -* The energy profiler driver is an API for configuring and using the profile +* +* The energy profiler driver is an API for configuring and using the profile * hardware block. The profile block enables measurement of the signal activity * of select peripherals and monitor sources during a measurement window. Using * these measurements, it is possible to construct a profile of the energy consumed @@ -30,17 +28,17 @@ * \subsection group_profile_hardware Profile Hardware * * The profile hardware consists of a number of profile counters that accept specific -* triggers for incrementing the count value. This allows the events of the source +* triggers for incrementing the count value. This allows the events of the source * (such as the number of SCB0 bus accesses or the duration of time the BLE RX radio -* is active) to be counted during the measurement window. The available monitor -* sources in the device can be found in the en_ep_mon_sel_t enum in the device +* is active) to be counted during the measurement window. The available monitor +* sources in the device can be found in the en_ep_mon_sel_t enum in the device * configuration file (e.g. psoc62_config.h). These can be sourced to any of the * profile counters as triggers. There are two methods of using the monitor sources * in a profile counter. * * - Event: The count value is incremented when a pulse event signal is seen by the -* counter. This type of monitoring is suitable when the monitoring source of -* interest needs to count the discrete events (such as the number of Flash read +* counter. This type of monitoring is suitable when the monitoring source of +* interest needs to count the discrete events (such as the number of Flash read * accesses) happening in the measurement window. * * - Duration: The count value is incremented at every clock edge while the monitor @@ -49,7 +47,7 @@ * duration needs to be expressed as number of clock cycles in the measurement window. * * Many of the available monitor sources are suitable for event type monitoring. -* Using a duration type on these signals may not give valuable information. Review +* Using a duration type on these signals may not give valuable information. Review * the device TRM for more information on the monitor sources and details on how they * should be used. * @@ -66,20 +64,20 @@ * toggled. When the measurement window ends, the energy contribution caused by the * GPIO toggle can be incorporated into the final calculation. * -* - Event measurement: Monitored events happening in a measurement window can be +* - Event measurement: Monitored events happening in a measurement window can be * used to increment a profile counter. This gives the activity numbers, which can * then be multiplied by the instantaneous power numbers associated with the source -* to give the average energy consumption (Energy = Power x time). For example, the +* to give the average energy consumption (Energy = Power x time). For example, the * energy consumped by an Operating System (OS) task can be estimated by monitoring * the processor's active cycle count (E.g. CPUSS_MONITOR_CM4) and the Flash read -* accesses (CPUSS_MONITOR_FLASH). Note that these activity numbers can also be +* accesses (CPUSS_MONITOR_FLASH). Note that these activity numbers can also be * timestamped using the continuous measurement method to differentiate between the * different task switches. The activity numbers are then multiplied by the associated * processor and flash access power numbers to give the average energy consumed by * that task. * -* - Duration measurement: A peripheral event such as the SMIF select signal can be -* used by a profile counter to measure the time spent on XIP communication through the +* - Duration measurement: A peripheral event such as the SMIF select signal can be +* used by a profile counter to measure the time spent on XIP communication through the * SPI interface. This activity number can then be multiplied by the power associated * with that activity to give the average energy consumed by that block during the * measurement window. This type of monitoring should only be performed for signals @@ -88,16 +86,16 @@ * monitoring model. However tracking the activity of signals such the BLE radio * should be done using the duration measurement method. * -* - Low power measurement: The profile counters do not support measurement during chip +* - Low power measurement: The profile counters do not support measurement during chip * deep-sleep, hibernate and off states. i.e. the profile counters are meant for active * run-time measurements only. In order to measure the time spent in low power modes (LPM), -* a real-time clock (RTC) should be used. Take a timestamp before LPM entry and a +* a real-time clock (RTC) should be used. Take a timestamp before LPM entry and a * timestamp upon LPM exit in a continuous measurement model. Then multiply the difference * by the appropriate LPM power numbers. * * \subsection group_profile_usage Driver Usage * -* At the highest level, the energy profiler must perform the following steps to +* At the highest level, the energy profiler must perform the following steps to * obtain a measurement: * * 1. Initialize the profile hardware block. @@ -117,15 +115,15 @@ * Configuration Considerations for more information. * * \section group_profile_configuration Configuration Considerations -* -* Each counter is a 32-bit register that counts either a number of clock cycles, +* +* Each counter is a 32-bit register that counts either a number of clock cycles, * or a number of events. It is possible to overflow the 32-bit register. To address * this issue, the driver implements a 32-bit overflow counter. Combined with the 32-bit -* register, this gives a 64-bit counter for each monitored source. +* register, this gives a 64-bit counter for each monitored source. * -* When an overflow occurs, the profile hardware generates an interrupt. The interrupt is +* When an overflow occurs, the profile hardware generates an interrupt. The interrupt is * configured using the SysInt driver, where the sample interrupt handler Cy_Profile_ISR() -* can be used as the ISR. The ISR increments the overflow counter for each profiling counter +* can be used as the ISR. The ISR increments the overflow counter for each profiling counter * and clears the interrupt. * * \section group_profile_more_information More Information @@ -205,10 +203,10 @@ extern "C" { #define CY_PROFILE_ID CY_PDL_DRV_ID(0x1EU) /** Start profiling command for the CMD register */ -#define CY_PROFILE_START_TR 1UL +#define CY_PROFILE_START_TR 1UL /** Stop profiling command for the CMD register */ -#define CY_PROFILE_STOP_TR 2UL +#define CY_PROFILE_STOP_TR 2UL /** Command to clear all counter registers to 0 */ #define CY_PROFILE_CLR_ALL_CNT 0x100UL @@ -223,7 +221,7 @@ extern "C" { /** * Profile counter reference clock source. Used when duration monitoring. */ -typedef enum +typedef enum { CY_PROFILE_CLK_TIMER = 0, /**< Timer clock (TimerClk) */ CY_PROFILE_CLK_IMO = 1, /**< Internal main oscillator (IMO) */ @@ -236,14 +234,14 @@ typedef enum /** * Monitor method type. */ -typedef enum +typedef enum { CY_PROFILE_EVENT = 0, /**< Count (edge-detected) module events */ CY_PROFILE_DURATION = 1, /**< Count (level) duration in clock cycles */ } cy_en_profile_duration_t; /** Profiler status codes */ -typedef enum +typedef enum { CY_PROFILE_SUCCESS = 0x00U, /**< Operation completed successfully */ CY_PROFILE_BAD_PARAM = CY_PROFILE_ID | CY_PDL_STATUS_ERROR | 1UL /**< Invalid input parameters */ @@ -265,14 +263,14 @@ typedef struct cy_en_profile_duration_t cntDuration; /**< 0 = event; 1 = duration */ cy_en_profile_ref_clk_t refClkSel; /**< The reference clock used by the counter */ en_ep_mon_sel_t monSel; /**< The monitor signal to be observed by the counter */ -} cy_stc_profile_ctr_ctl_t; +} cy_stc_profile_ctr_ctl_t; /** * Software structure for holding a profile counter status and configuration information. */ typedef struct { - uint8_t ctrNum; /**< Profile counter number */ + uint8_t ctrNum; /**< Profile counter number */ uint8_t used; /**< 0 = available; 1 = used */ cy_stc_profile_ctr_ctl_t ctlRegVals; /**< Initial counter CTL register settings */ PROFILE_CNT_STRUCT_Type * cntAddr; /**< Base address of the counter instance registers */ @@ -322,12 +320,12 @@ __STATIC_INLINE uint32_t Cy_Profile_IsProfiling(void); * Function Name: Cy_Profile_Init ****************************************************************************//** * -* Initializes and enables the profile hardware. +* Initializes and enables the profile hardware. * -* This function must be called once when energy profiling is desired. The +* This function must be called once when energy profiling is desired. The * operation does not start a profiling session. * -* \note The profile interrupt must also be configured. \ref Cy_Profile_ISR() +* \note The profile interrupt must also be configured. \ref Cy_Profile_ISR() * can be used as its handler. * * \funcusage @@ -336,7 +334,7 @@ __STATIC_INLINE uint32_t Cy_Profile_IsProfiling(void); *******************************************************************************/ __STATIC_INLINE void Cy_Profile_Init(void) { - PROFILE->CTL = _VAL2FLD(PROFILE_CTL_ENABLED, 1UL/*enabled */) | + PROFILE->CTL = _VAL2FLD(PROFILE_CTL_ENABLED, 1UL/*enabled */) | _VAL2FLD(PROFILE_CTL_WIN_MODE, 0UL/*start/stop mode*/); PROFILE->INTR_MASK = 0UL; /* clear all counter interrupt mask bits */ } @@ -346,7 +344,7 @@ __STATIC_INLINE void Cy_Profile_Init(void) * Function Name: Cy_Profile_DeInit ****************************************************************************//** * -* Clears the interrupt mask and disables the profile hardware. +* Clears the interrupt mask and disables the profile hardware. * * This function should be called when energy profiling is no longer desired. * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.c index 42b74aa7f9..d7591bf5ec 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_prot.h" @@ -25,25 +23,25 @@ extern "C" { ****************************************************************************//** * * \brief Configures the allowed protection contexts, security (secure/non-secure) -* and privilege level of the bus transaction created by the specified master. +* and privilege level of the bus transaction created by the specified master. * * \param busMaster * Indicates which master needs to be configured. Refer to the CPUSS_MS_ID_X * defines. -* +* * \param privileged * Boolean to define the privilege level of all subsequent bus transfers. * True - privileged, False - not privileged. -* Note that this is an inherited value. If not inherited, then this bit will +* Note that this is an inherited value. If not inherited, then this bit will * be used. * * \param secure * Security setting for the master. True - Secure, False - Not secure. -* +* * \param pcMask * This is a 16 bit value of the allowed contexts, it is an OR'ed (|) field of the * provided defines in cy_prot.h. For example: (PROT_PC1 | PROT_PC3 | PROT_PC4) -* +* * \return * Status of the function call. * @@ -64,9 +62,9 @@ cy_en_prot_status_t Cy_Prot_ConfigBusMaster(en_prot_master_t busMaster, bool pri uint32_t * addrMsCtl; CY_ASSERT_L1(CY_PROT_IS_BUS_MASTER_VALID(busMaster)); - + addrMsCtl = (uint32_t *)(PROT_BASE + (uint32_t)((uint32_t)busMaster << CY_PROT_MSX_CTL_SHIFT)); - + /* Check if PC mask is in supported range */ switch (busMaster) { @@ -104,8 +102,8 @@ cy_en_prot_status_t Cy_Prot_ConfigBusMaster(en_prot_master_t busMaster, bool pri status = CY_PROT_BAD_PARAM; break; } - - if(status != CY_PROT_BAD_PARAM) + + if(status != CY_PROT_BAD_PARAM) { regVal = _VAL2FLD(PROT_SMPU_MS0_CTL_NS, !secure) | _VAL2FLD(PROT_SMPU_MS0_CTL_P, privileged) @@ -113,7 +111,7 @@ cy_en_prot_status_t Cy_Prot_ConfigBusMaster(en_prot_master_t busMaster, bool pri *addrMsCtl = regVal; status = (*addrMsCtl != regVal) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } - + return status; } @@ -123,16 +121,16 @@ cy_en_prot_status_t Cy_Prot_ConfigBusMaster(en_prot_master_t busMaster, bool pri ****************************************************************************//** * * \brief Sets the current/active protection context of the specified bus master. -* -* Allowed PC values are 1-15. If this value is not inherited from another bus +* +* Allowed PC values are 1-15. If this value is not inherited from another bus * master, the value set through this function is used. * * \param busMaster * The bus master to configure. Refer to the CPUSS_MS_ID_X defines. -* +* * \param pc -* Active protection context of the specified master. Note that only those -* protection contexts allowed by the pcMask will take effect. +* Active protection context of the specified master. Note that only those +* protection contexts allowed by the pcMask will take effect. * * \return * Status of the function call. @@ -151,11 +149,11 @@ cy_en_prot_status_t Cy_Prot_SetActivePC(en_prot_master_t busMaster, uint32_t pc) { cy_en_prot_status_t status; PROT_MPU_Type* addrMpu; - + CY_ASSERT_L1(CY_PROT_IS_BUS_MASTER_VALID(busMaster)); - - addrMpu = (PROT_MPU_Type*)(&PROT->CYMPU[busMaster]); - + + addrMpu = (PROT_MPU_Type*)(&PROT->CYMPU[busMaster]); + /* Check if PC value is in supported range */ switch (busMaster) { @@ -193,13 +191,13 @@ cy_en_prot_status_t Cy_Prot_SetActivePC(en_prot_master_t busMaster, uint32_t pc) status = CY_PROT_BAD_PARAM; break; } - - if(status != CY_PROT_BAD_PARAM) + + if(status != CY_PROT_BAD_PARAM) { addrMpu->MS_CTL = _VAL2FLD(PROT_MPU_MS_CTL_PC, pc) | _VAL2FLD(PROT_MPU_MS_CTL_PC_SAVED, pc); status = (_FLD2VAL(PROT_MPU_MS_CTL_PC, addrMpu->MS_CTL) != pc) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } - + return status; } @@ -208,12 +206,12 @@ cy_en_prot_status_t Cy_Prot_SetActivePC(en_prot_master_t busMaster, uint32_t pc) * Function Name: Cy_Prot_GetActivePC ****************************************************************************//** * -* \brief Returns the active protection context of a master. +* \brief Returns the active protection context of a master. * * \param busMaster -* The bus master, whose protection context is being read. Refer to the +* The bus master, whose protection context is being read. Refer to the * CPUSS_MS_ID_X defines. -* +* * \return * Active protection context of the master * @@ -224,11 +222,11 @@ cy_en_prot_status_t Cy_Prot_SetActivePC(en_prot_master_t busMaster, uint32_t pc) uint32_t Cy_Prot_GetActivePC(en_prot_master_t busMaster) { PROT_MPU_Type* addrMpu; - + CY_ASSERT_L1(CY_PROT_IS_BUS_MASTER_VALID(busMaster)); - + addrMpu = (PROT_MPU_Type*)(&PROT->CYMPU[busMaster]); - + return ((uint32_t)_FLD2VAL(PROT_MPU_MS_CTL_PC, addrMpu->MS_CTL)); } @@ -237,18 +235,18 @@ uint32_t Cy_Prot_GetActivePC(en_prot_master_t busMaster) * Function Name: Cy_Prot_ConfigMpuStruct ****************************************************************************//** * -* \brief This function configures a memory protection unit (MPU) struct with its -* protection attributes. +* \brief This function configures a memory protection unit (MPU) struct with its +* protection attributes. * * The protection structs act like the gatekeepers for a master's accesses to * memory, allowing only the permitted transactions to go through. * * \param base -* The base address for the MPU struct being configured. -* +* The base address for the MPU struct being configured. +* * \param config * Initialization structure containing all the protection attributes. -* +* * \return * Status of the function call. * @@ -281,7 +279,7 @@ cy_en_prot_status_t Cy_Prot_ConfigMpuStruct(PROT_MPU_MPU_STRUCT_Type* base, cons base->ATT = attReg; base->ADDR = addrReg; status = ((base->ADDR != addrReg) || (base->ATT != attReg)) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -290,11 +288,11 @@ cy_en_prot_status_t Cy_Prot_ConfigMpuStruct(PROT_MPU_MPU_STRUCT_Type* base, cons * Function Name: Cy_Prot_EnableMpuStruct ****************************************************************************//** * -* \brief Enables the MPU struct, which allows the MPU protection attributes to -* take effect. +* \brief Enables the MPU struct, which allows the MPU protection attributes to +* take effect. * * \param base -* The base address of the MPU struct being configured. +* The base address of the MPU struct being configured. * * \return * Status of the function call. @@ -315,7 +313,7 @@ cy_en_prot_status_t Cy_Prot_EnableMpuStruct(PROT_MPU_MPU_STRUCT_Type* base) base->ATT |= _VAL2FLD(PROT_MPU_MPU_STRUCT_ATT_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_MPU_MPU_STRUCT_ATT_ENABLED, base->ATT) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -328,7 +326,7 @@ cy_en_prot_status_t Cy_Prot_EnableMpuStruct(PROT_MPU_MPU_STRUCT_Type* base) * from taking effect. * * \param base -* The base address of the MPU struct being configured. +* The base address of the MPU struct being configured. * * \return * Status of the function call. @@ -345,11 +343,11 @@ cy_en_prot_status_t Cy_Prot_EnableMpuStruct(PROT_MPU_MPU_STRUCT_Type* base) cy_en_prot_status_t Cy_Prot_DisableMpuStruct(PROT_MPU_MPU_STRUCT_Type* base) { cy_en_prot_status_t status; - + base->ATT &= ~_VAL2FLD(PROT_MPU_MPU_STRUCT_ATT_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_MPU_MPU_STRUCT_ATT_ENABLED, base->ATT) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -358,23 +356,23 @@ cy_en_prot_status_t Cy_Prot_DisableMpuStruct(PROT_MPU_MPU_STRUCT_Type* base) * Function Name: Cy_Prot_ConfigSmpuMasterStruct ****************************************************************************//** * -* \brief Configures a Shared Memory Protection Unit (SMPU) master protection -* struct with its protection attributes. +* \brief Configures a Shared Memory Protection Unit (SMPU) master protection +* struct with its protection attributes. * * This function configures the master struct governing the corresponding slave * struct pair. It is a mechanism to protect the slave SMPU struct. Since the * memory location of the slave struct is known, the address, regionSize and * subregions of the configuration struct are not applicable. * -* Note that only the user/privileged write permissions are configurable. The +* Note that only the user/privileged write permissions are configurable. The * read and execute permissions are read-only and cannot be configured. * * \param base * The register base address of the protection struct being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -392,12 +390,12 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* b { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_SMPU_MS_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_SMPU_MS_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_SMPU_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_SMPU_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -422,7 +420,7 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* b status = ((base->ATT1 & CY_PROT_SMPU_ATT1_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -430,18 +428,18 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* b * Function Name: Cy_Prot_ConfigSmpuSlaveStruct ****************************************************************************//** * -* \brief Configures a Shared Memory Protection Unit (SMPU) slave protection -* struct with its protection attributes. -* +* \brief Configures a Shared Memory Protection Unit (SMPU) slave protection +* struct with its protection attributes. +* * This function configures the slave struct of an SMPU pair, which can protect * any memory region in a device from invalid bus master accesses. * * \param base * The register base address of the protection structure being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -460,13 +458,13 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba cy_en_prot_status_t status; uint32_t addrReg; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_SMPU_SL_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_SMPU_SL_PERM_VALID(config->privPermission)); CY_ASSERT_L3(CY_PROT_IS_REGION_SIZE_VALID(config->regionSize)); - if(((uint32_t)config->pcMask & CY_PROT_SMPU_PC_LIMIT_MASK) != 0UL) + if(((uint32_t)config->pcMask & CY_PROT_SMPU_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -486,7 +484,7 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba status = ((base->ADDR0 != addrReg) || ((base->ATT0 & CY_PROT_SMPU_ATT0_MASK) != attReg)) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } - + return status; } @@ -501,7 +499,7 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba * will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -518,11 +516,11 @@ cy_en_prot_status_t Cy_Prot_ConfigSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba cy_en_prot_status_t Cy_Prot_EnableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* base) { cy_en_prot_status_t status; - + base->ATT1 |= _VAL2FLD(PROT_SMPU_SMPU_STRUCT_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_SMPU_SMPU_STRUCT_ATT1_ENABLED, base->ATT1) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -537,7 +535,7 @@ cy_en_prot_status_t Cy_Prot_EnableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* b * will seize to take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -554,11 +552,11 @@ cy_en_prot_status_t Cy_Prot_EnableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* b cy_en_prot_status_t Cy_Prot_DisableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* base) { cy_en_prot_status_t status; - + base->ATT1 &= ~_VAL2FLD(PROT_SMPU_SMPU_STRUCT_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_SMPU_SMPU_STRUCT_ATT1_ENABLED, base->ATT1) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -573,7 +571,7 @@ cy_en_prot_status_t Cy_Prot_DisableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* * will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -588,13 +586,13 @@ cy_en_prot_status_t Cy_Prot_DisableSmpuMasterStruct(PROT_SMPU_SMPU_STRUCT_Type* * *******************************************************************************/ cy_en_prot_status_t Cy_Prot_EnableSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* base) -{ +{ cy_en_prot_status_t status; - + base->ATT0 |= _VAL2FLD(PROT_SMPU_SMPU_STRUCT_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_SMPU_SMPU_STRUCT_ATT0_ENABLED, base->ATT0) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -609,7 +607,7 @@ cy_en_prot_status_t Cy_Prot_EnableSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba * will seize to take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -626,11 +624,11 @@ cy_en_prot_status_t Cy_Prot_EnableSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* ba cy_en_prot_status_t Cy_Prot_DisableSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* base) { cy_en_prot_status_t status; - + base->ATT0 &= ~_VAL2FLD(PROT_SMPU_SMPU_STRUCT_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PROT_SMPU_SMPU_STRUCT_ATT0_ENABLED, base->ATT0) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -639,23 +637,23 @@ cy_en_prot_status_t Cy_Prot_DisableSmpuSlaveStruct(PROT_SMPU_SMPU_STRUCT_Type* b * Function Name: Cy_Prot_ConfigPpuProgMasterStruct ****************************************************************************//** * -* \brief Configures a Programmable Peripheral Protection Unit (PPU PROG) master -* protection struct with its protection attributes. +* \brief Configures a Programmable Peripheral Protection Unit (PPU PROG) master +* protection struct with its protection attributes. * * This function configures the master struct governing the corresponding slave * struct pair. It is a mechanism to protect the slave PPU PROG struct. Since * the memory location of the slave struct is known, the address, regionSize and * subregions of the configuration struct are not applicable. * -* Note that only the user/privileged write permissions are configurable. The +* Note that only the user/privileged write permissions are configurable. The * read and execute permissions are read-only and cannot be configured. * * \param base * The register base address of the protection struct being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -673,12 +671,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgMasterStruct(PERI_PPU_PR_Type* base, co { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_PROG_MS_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_PROG_MS_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_PROG_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_PROG_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -712,21 +710,21 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgMasterStruct(PERI_PPU_PR_Type* base, co ****************************************************************************//** * * \brief Configures a Programmable Peripheral Protection Unit (PPU PROG) slave -* protection struct with its protection attributes. -* -* This function configures the slave struct of a PPU PROG pair, which can -* protect any peripheral memory region in a device from invalid bus master +* protection struct with its protection attributes. +* +* This function configures the slave struct of a PPU PROG pair, which can +* protect any peripheral memory region in a device from invalid bus master * accesses. * -* Note that the user/privileged execute accesses are read-only and are always -* enabled. +* Note that the user/privileged execute accesses are read-only and are always +* enabled. * * \param base * The register base address of the protection structure being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -745,13 +743,13 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgSlaveStruct(PERI_PPU_PR_Type* base, con cy_en_prot_status_t status; uint32_t addrReg; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_PROG_SL_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_PROG_SL_PERM_VALID(config->privPermission)); CY_ASSERT_L3(CY_PROT_IS_REGION_SIZE_VALID(config->regionSize)); - if(((uint32_t)config->pcMask & CY_PROT_PPU_PROG_PC_LIMIT_MASK) != 0UL) + if(((uint32_t)config->pcMask & CY_PROT_PPU_PROG_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -779,7 +777,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgSlaveStruct(PERI_PPU_PR_Type* base, con ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -790,11 +788,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgSlaveStruct(PERI_PPU_PR_Type* base, con * * \brief Enables the Master PPU PROG structure. * -* This is a PPU PROG master struct enable function. The PPU PROG protection +* This is a PPU PROG master struct enable function. The PPU PROG protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -811,11 +809,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuProgSlaveStruct(PERI_PPU_PR_Type* base, con cy_en_prot_status_t Cy_Prot_EnablePpuProgMasterStruct(PERI_PPU_PR_Type* base) { cy_en_prot_status_t status; - + base->ATT1 |= _VAL2FLD(PERI_PPU_PR_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_PR_ATT1_ENABLED, base->ATT1) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -826,12 +824,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuProgMasterStruct(PERI_PPU_PR_Type* base) * * \brief Disables the Master PPU PROG structure. * -* This is a PPU PROG master struct disable function. The PPU PROG protection -* settings will seize to take effect after successful completion of this +* This is a PPU PROG master struct disable function. The PPU PROG protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -848,11 +846,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuProgMasterStruct(PERI_PPU_PR_Type* base) cy_en_prot_status_t Cy_Prot_DisablePpuProgMasterStruct(PERI_PPU_PR_Type* base) { cy_en_prot_status_t status; - + base->ATT1 &= ~_VAL2FLD(PERI_PPU_PR_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_PR_ATT1_ENABLED, base->ATT1) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -863,11 +861,11 @@ cy_en_prot_status_t Cy_Prot_DisablePpuProgMasterStruct(PERI_PPU_PR_Type* base) * * \brief Enables the Slave PPU PROG structure. * -* This is a PPU PROG slave struct enable function. The PPU PROG protection +* This is a PPU PROG slave struct enable function. The PPU PROG protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -882,13 +880,13 @@ cy_en_prot_status_t Cy_Prot_DisablePpuProgMasterStruct(PERI_PPU_PR_Type* base) * *******************************************************************************/ cy_en_prot_status_t Cy_Prot_EnablePpuProgSlaveStruct(PERI_PPU_PR_Type* base) -{ +{ cy_en_prot_status_t status; - + base->ATT0 |= _VAL2FLD(PERI_PPU_PR_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_PR_ATT0_ENABLED, base->ATT0) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -899,12 +897,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuProgSlaveStruct(PERI_PPU_PR_Type* base) * * \brief Disables the Slave PPU PROG structure. * -* This is a PPU PROG slave struct disable function. The PPU PROG protection -* settings will seize to take effect after successful completion of this +* This is a PPU PROG slave struct disable function. The PPU PROG protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -921,11 +919,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuProgSlaveStruct(PERI_PPU_PR_Type* base) cy_en_prot_status_t Cy_Prot_DisablePpuProgSlaveStruct(PERI_PPU_PR_Type* base) { cy_en_prot_status_t status; - + base->ATT0 &= ~_VAL2FLD(PERI_PPU_PR_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_PR_ATT0_ENABLED, base->ATT0) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -934,23 +932,23 @@ cy_en_prot_status_t Cy_Prot_DisablePpuProgSlaveStruct(PERI_PPU_PR_Type* base) * Function Name: Cy_Prot_ConfigPpuFixedGrMasterStruct ****************************************************************************//** * -* \brief Configures a Fixed Peripheral Group Protection Unit (PPU GR) master -* protection struct with its protection attributes. +* \brief Configures a Fixed Peripheral Group Protection Unit (PPU GR) master +* protection struct with its protection attributes. * * This function configures the master struct governing the corresponding slave * struct pair. It is a mechanism to protect the slave PPU GR struct. Since * the memory location of the slave struct is known, the address, regionSize and * subregions of the configuration struct are not applicable. * -* Note that only the user/privileged write permissions are configurable. The +* Note that only the user/privileged write permissions are configurable. The * read and execute permissions are read-only and cannot be configured. * * \param base * The register base address of the protection struct being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -968,12 +966,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrMasterStruct(PERI_PPU_GR_Type* base, { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -998,7 +996,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrMasterStruct(PERI_PPU_GR_Type* base, status = ((base->ATT1 & CY_PROT_PPU_GR_ATT1_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -1008,25 +1006,25 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrMasterStruct(PERI_PPU_GR_Type* base, ****************************************************************************//** * * \brief Configures a Fixed Peripheral Group Protection Unit (PPU GR) slave -* protection struct with its protection attributes. -* -* This function configures the slave struct of a PPU GR pair, which can +* protection struct with its protection attributes. +* +* This function configures the slave struct of a PPU GR pair, which can * protect an entire peripheral MMIO group from invalid bus master accesses. * Refer to the device Technical Reference manual for details on peripheral * MMIO grouping and which peripherals belong to which groups. * -* Each fixed PPU GR is devoted to a defined MMIO group. Hence the address, +* Each fixed PPU GR is devoted to a defined MMIO group. Hence the address, * regionSize and subregions of the configuration struct are not applicable. * -* Note that the user/privileged execute accesses are read-only and are always -* enabled. +* Note that the user/privileged execute accesses are read-only and are always +* enabled. * * \param base * The register base address of the protection structure being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -1044,12 +1042,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base, { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -1073,7 +1071,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base, base->ATT0 = attReg; status = ((base->ATT0 & CY_PROT_PPU_GR_ATT0_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } - } + } return status; } @@ -1084,11 +1082,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base, * * \brief Enables the Master PPU GR structure. * -* This is a PPU GR master struct enable function. The PPU GR protection +* This is a PPU GR master struct enable function. The PPU GR protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1105,11 +1103,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base, cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base) { cy_en_prot_status_t status; - + base->ATT1 |= _VAL2FLD(PERI_PPU_GR_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_GR_ATT1_ENABLED, base->ATT1) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1120,12 +1118,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base) * * \brief Disables the Master PPU GR structure. * -* This is a PPU GR master struct disable function. The PPU GR protection -* settings will seize to take effect after successful completion of this +* This is a PPU GR master struct disable function. The PPU GR protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1142,11 +1140,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base) cy_en_prot_status_t Cy_Prot_DisablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base) { cy_en_prot_status_t status; - + base->ATT1 &= ~_VAL2FLD(PERI_PPU_GR_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_GR_ATT1_ENABLED, base->ATT1) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1157,11 +1155,11 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base * * \brief Enables the Slave PPU GR structure. * -* This is a PPU GR slave struct enable function. The PPU GR protection +* This is a PPU GR slave struct enable function. The PPU GR protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1176,13 +1174,13 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedGrMasterStruct(PERI_PPU_GR_Type* base * *******************************************************************************/ cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base) -{ +{ cy_en_prot_status_t status; - + base->ATT0 |= _VAL2FLD(PERI_PPU_GR_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_GR_ATT0_ENABLED, base->ATT0) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1193,12 +1191,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base) * * \brief Disables the Slave PPU GR structure. * -* This is a PPU GR slave struct disable function. The PPU GR protection -* settings will seize to take effect after successful completion of this +* This is a PPU GR slave struct disable function. The PPU GR protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1215,11 +1213,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base) cy_en_prot_status_t Cy_Prot_DisablePpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base) { cy_en_prot_status_t status; - + base->ATT0 &= ~_VAL2FLD(PERI_PPU_GR_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_PPU_GR_ATT0_ENABLED, base->ATT0) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1228,23 +1226,23 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedGrSlaveStruct(PERI_PPU_GR_Type* base) * Function Name: Cy_Prot_ConfigPpuFixedSlMasterStruct ****************************************************************************//** * -* \brief Configures a Fixed Peripheral Slave Protection Unit (PPU SL) master -* protection struct with its protection attributes. +* \brief Configures a Fixed Peripheral Slave Protection Unit (PPU SL) master +* protection struct with its protection attributes. * * This function configures the master struct governing the corresponding slave * struct pair. It is a mechanism to protect the slave PPU SL struct. Since * the memory location of the slave struct is known, the address, regionSize and * subregions of the configuration struct are not applicable. * -* Note that only the user/privileged write permissions are configurable. The +* Note that only the user/privileged write permissions are configurable. The * read and execute permissions are read-only and cannot be configured. * * \param base * The register base address of the protection struct being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -1262,12 +1260,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* ba { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -1292,7 +1290,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* ba status = ((base->ATT1 & CY_PROT_PPU_SL_ATT1_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -1302,24 +1300,24 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* ba ****************************************************************************//** * * \brief Configures a Fixed Peripheral Slave Protection Unit (PPU SL) slave -* protection struct with its protection attributes. -* -* This function configures the slave struct of a PPU SL pair, which can +* protection struct with its protection attributes. +* +* This function configures the slave struct of a PPU SL pair, which can * protect an entire peripheral slave instance from invalid bus master accesses. * For example, TCPWM0, TCPWM1, SCB0 and SCB1 etc. * -* Each fixed PPU SL is devoted to a defined peripheral slave. Hence the address, +* Each fixed PPU SL is devoted to a defined peripheral slave. Hence the address, * regionSize and subregions of the configuration struct are not applicable. * -* Note that the user/privileged execute accesses are read-only and are always -* enabled. +* Note that the user/privileged execute accesses are read-only and are always +* enabled. * * \param base * The register base address of the protection structure being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -1337,12 +1335,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -1367,7 +1365,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas status = ((base->ATT0 & CY_PROT_PPU_SL_ATT0_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -1378,11 +1376,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas * * \brief Enables the Master PPU SL structure. * -* This is a PPU SL master struct enable function. The PPU SL protection +* This is a PPU SL master struct enable function. The PPU SL protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1399,11 +1397,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* base) { cy_en_prot_status_t status; - + base->ATT1 |= _VAL2FLD(PERI_GR_PPU_SL_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_SL_ATT1_ENABLED, base->ATT1) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1414,12 +1412,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* ba * * \brief Disables the Master PPU SL structure. * -* This is a PPU SL master struct disable function. The PPU SL protection -* settings will seize to take effect after successful completion of this +* This is a PPU SL master struct disable function. The PPU SL protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1436,11 +1434,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* ba cy_en_prot_status_t Cy_Prot_DisablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* base) { cy_en_prot_status_t status; - + base->ATT1 &= ~_VAL2FLD(PERI_GR_PPU_SL_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_SL_ATT1_ENABLED, base->ATT1) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1451,11 +1449,11 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* b * * \brief Enables the Slave PPU SL structure. * -* This is a PPU SL slave struct enable function. The PPU SL protection +* This is a PPU SL slave struct enable function. The PPU SL protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1470,13 +1468,13 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedSlMasterStruct(PERI_GR_PPU_SL_Type* b * *******************************************************************************/ cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* base) -{ +{ cy_en_prot_status_t status; - + base->ATT0 |= _VAL2FLD(PERI_GR_PPU_SL_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_SL_ATT0_ENABLED, base->ATT0) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1487,12 +1485,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas * * \brief Disables the Slave PPU SL structure. * -* This is a PPU SL slave struct disable function. The PPU SL protection -* settings will seize to take effect after successful completion of this +* This is a PPU SL slave struct disable function. The PPU SL protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1509,11 +1507,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* bas cy_en_prot_status_t Cy_Prot_DisablePpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* base) { cy_en_prot_status_t status; - + base->ATT0 &= ~_VAL2FLD(PERI_GR_PPU_SL_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_SL_ATT0_ENABLED, base->ATT0) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1522,23 +1520,23 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedSlSlaveStruct(PERI_GR_PPU_SL_Type* ba * Function Name: Cy_Prot_ConfigPpuFixedRgMasterStruct ****************************************************************************//** * -* \brief Configures a Fixed Peripheral Region Protection Unit (PPU RG) master -* protection struct with its protection attributes. +* \brief Configures a Fixed Peripheral Region Protection Unit (PPU RG) master +* protection struct with its protection attributes. * * This function configures the master struct governing the corresponding slave * struct pair. It is a mechanism to protect the slave PPU RG struct. Since * the memory location of the slave struct is known, the address, regionSize and * subregions of the configuration struct are not applicable. * -* Note that only the user/privileged write permissions are configurable. The +* Note that only the user/privileged write permissions are configurable. The * read and execute permissions are read-only and cannot be configured. * * \param base * The register base address of the protection struct being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -1556,12 +1554,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_MS_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -1586,7 +1584,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba status = ((base->ATT1 & CY_PROT_PPU_RG_ATT1_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -1596,24 +1594,24 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba ****************************************************************************//** * * \brief Configures a Fixed Peripheral Region Protection Unit (PPU RG) slave -* protection struct with its protection attributes. -* -* This function configures the slave struct of a PPU RG pair, which can +* protection struct with its protection attributes. +* +* This function configures the slave struct of a PPU RG pair, which can * protect specified regions of peripheral instances. For example, individual * DW channel structs, SMPU structs, and IPC structs etc. * -* Each fixed PPU RG is devoted to a defined peripheral region. Hence the address, +* Each fixed PPU RG is devoted to a defined peripheral region. Hence the address, * regionSize and subregions of the configuration struct are not applicable. * -* Note that the user/privileged execute accesses are read-only and are always -* enabled. +* Note that the user/privileged execute accesses are read-only and are always +* enabled. * * \param base * The register base address of the protection structure being configured. -* +* * \param config * Initialization structure with all the protection attributes. -* +* * \return * Status of the function call. * @@ -1631,12 +1629,12 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* bas { cy_en_prot_status_t status; uint32_t attReg; - + CY_ASSERT_L1(NULL != base); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->userPermission)); CY_ASSERT_L3(CY_PROT_IS_FIXED_SL_PERM_VALID(config->privPermission)); - - if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) + + if(((uint32_t)config->pcMask & CY_PROT_PPU_FIXED_PC_LIMIT_MASK) != 0UL) { /* PC mask out of range - not supported in device */ status = CY_PROT_BAD_PARAM; @@ -1661,7 +1659,7 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* bas status = ((base->ATT0 & CY_PROT_PPU_RG_ATT0_MASK) != attReg) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; } } - + return status; } @@ -1672,11 +1670,11 @@ cy_en_prot_status_t Cy_Prot_ConfigPpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* bas * * \brief Enables the Master PPU RG structure. * -* This is a PPU RG master struct enable function. The PPU RG protection +* This is a PPU RG master struct enable function. The PPU RG protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1697,7 +1695,7 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba base->ATT1 |= _VAL2FLD(PERI_GR_PPU_RG_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_RG_ATT1_ENABLED, base->ATT1) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1708,12 +1706,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba * * \brief Disables the Master PPU RG structure. * -* This is a PPU RG master struct disable function. The PPU RG protection -* settings will seize to take effect after successful completion of this +* This is a PPU RG master struct disable function. The PPU RG protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1730,11 +1728,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* ba cy_en_prot_status_t Cy_Prot_DisablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* base) { cy_en_prot_status_t status; - + base->ATT1 &= ~_VAL2FLD(PERI_GR_PPU_RG_ATT1_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_RG_ATT1_ENABLED, base->ATT1) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1745,11 +1743,11 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* b * * \brief Enables the Slave PPU RG structure. * -* This is a PPU RG slave struct enable function. The PPU RG protection +* This is a PPU RG slave struct enable function. The PPU RG protection * settings will take effect after successful completion of this function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1764,13 +1762,13 @@ cy_en_prot_status_t Cy_Prot_DisablePpuFixedRgMasterStruct(PERI_GR_PPU_RG_Type* b * *******************************************************************************/ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* base) -{ +{ cy_en_prot_status_t status; - + base->ATT0 |= _VAL2FLD(PERI_GR_PPU_RG_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_RG_ATT0_ENABLED, base->ATT0) != CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } @@ -1781,12 +1779,12 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* bas * * \brief Disables the Slave PPU RG structure. * -* This is a PPU RG slave struct disable function. The PPU RG protection -* settings will seize to take effect after successful completion of this +* This is a PPU RG slave struct disable function. The PPU RG protection +* settings will seize to take effect after successful completion of this * function call. * * \param base -* The base address for the protection unit structure being configured. +* The base address for the protection unit structure being configured. * * \return * Status of the function call. @@ -1803,11 +1801,11 @@ cy_en_prot_status_t Cy_Prot_EnablePpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* bas cy_en_prot_status_t Cy_Prot_DisablePpuFixedRgSlaveStruct(PERI_GR_PPU_RG_Type* base) { cy_en_prot_status_t status; - + base->ATT0 &= ~_VAL2FLD(PERI_GR_PPU_RG_ATT0_ENABLED, CY_PROT_STRUCT_ENABLE); status = (_FLD2VAL(PERI_GR_PPU_RG_ATT0_ENABLED, base->ATT0) == CY_PROT_STRUCT_ENABLE) ? CY_PROT_FAILURE : CY_PROT_SUCCESS; - + return status; } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.h index a47ed56060..c5f2235e07 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/prot/cy_prot.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -20,18 +18,18 @@ * The Protection Unit driver provides an API to configure the Memory Protection * Units (MPU), Shared Memory Protection Units (SMPU), and Peripheral Protection * Units (PPU). These are separate from the ARM Core MPUs and provide additional -* mechanisms for securing resource accesses. The Protection units address the +* mechanisms for securing resource accesses. The Protection units address the * following concerns in an embedded design: * - Security requirements: This includes the prevention of malicious attacks * to access secure memory or peripherals. * - Safety requirements: This includes detection of accidental (non-malicious) * SW errors and random HW errors. It is important to enable failure analysis * to investigate the root cause of a safety violation. -* +* * \section group_prot_protection_type Protection Types * -* Protection units are hardware configuration structures that control bus accesses -* to the resources that they protect. By combining these individual configuration +* Protection units are hardware configuration structures that control bus accesses +* to the resources that they protect. By combining these individual configuration * structures, a system is built to allow strict restrictions on the capabilities * of individual bus masters (e.g. CM0+, CM4, Crypt) and their operating modes. * This architecture can then be integrated into the overall security system @@ -40,16 +38,16 @@ * it must pass the evaluation performed for each category. These access evaluations * are prioritized, where MPU has the highest priority, followed by SMPU, followed * by PPU. i.e. if an SMPU and a PPU protect the same resource and if access is -* denied by the SMPU, then the PPU access evaluation is skipped. This can lead to a +* denied by the SMPU, then the PPU access evaluation is skipped. This can lead to a * denial-of-service scenario and the application should pay special attention in * taking ownership of the protection unit configurations. * * \subsection group_prot_memory_protection Memory Protection * * Memory access control for a bus master is controlled using an MPU. These are -* most often used to distinguish user and privileged accesses from a single bus -* master such as task switching in an OS/kernel. For ARM cores (CM0+, CM4), the -* core MPUs are used to perform this task. For other non-ARM bus masters such +* most often used to distinguish user and privileged accesses from a single bus +* master such as task switching in an OS/kernel. For ARM cores (CM0+, CM4), the +* core MPUs are used to perform this task. For other non-ARM bus masters such * as Crypto, MPU structs are available, which can be used in a similar manner * as the ARM core MPUs. These MPUs however must be configured by the ARM cores. * Other bus masters that do not have an MPU, such as DMA (DW), inherit the access @@ -67,10 +65,10 @@ * This protection effectively allows only those with correct bus master access * settings to read/write/execute the memory region. This type of protection * is used in general memory such as Flash and SRAM. Peripheral registers are -* best configured using the peripheral protection units instead. SMPU structs -* have a descending priority, where larger index struct has higher priority +* best configured using the peripheral protection units instead. SMPU structs +* have a descending priority, where larger index struct has higher priority * access evaluation over lower index structs. E.g. SMPU_STRUCT15 has higher priority -* than SMPU_STRUCT14 and its access will be evaluated before SMPU_STRUCT14. +* than SMPU_STRUCT14 and its access will be evaluated before SMPU_STRUCT14. * If both target the same memory, then the higher index (MPU_STRUCT15) will be * used, and the lower index (SMPU_STRUCT14) will be ignored. * @@ -80,7 +78,7 @@ * register accesses by bus masters. Four types of PPUs are available. * - Fixed Group (GR) PPUs are used to protect an entire peripheral MMIO group * from invalid bus master accesses. The MMIO grouping information and which -* resource belongs to which group is device specific and can be obtained +* resource belongs to which group is device specific and can be obtained * from the device technical reference manual (TRM). Group PPUs have the highest * priority in the PPU category. Therefore their access evaluations take precedence * over the other types of PPUs. @@ -89,17 +87,17 @@ * type of peripheral protection unit. Programmable PPUs have the second highest * priority and take precedence over Region PPUs and Slave PPUs. Similar to SMPUs, * higher index PROG PPUs have higher priority than lower indexes PROG PPUs. -* - Fixed Region (RG) PPUs are used to protect an entire peripheral slave -* instance from invalid bus master accesses. For example, TCPWM0, TCPWM1, +* - Fixed Region (RG) PPUs are used to protect an entire peripheral slave +* instance from invalid bus master accesses. For example, TCPWM0, TCPWM1, * SCB0, and SCB1, etc. Region PPUs have the third highest priority and take precedence * over Slave PPUs. * - Fixed Slave (SL) PPUs are used to protect specified regions of peripheral -* instances. For example, individual DW channel structs, SMPU structs, and +* instances. For example, individual DW channel structs, SMPU structs, and * IPC structs, etc. Slave PPUs have the lowest priority in the PPU category and * therefore are evaluated last. * * \section group_prot_protection_context Protection Context -* +* * Protection context (PC) attribute is present in all bus masters and is evaluated * when accessing memory protected by an SMPU or a PPU. There are no limitations * to how the PC values are allocated to the bus masters and this makes it @@ -138,12 +136,12 @@ * user and privileged modes is handled by updating its Control register or * by exception entries. Other bus masters such as Crypto have their own * user/privileged settings bit in the bus master control register. This is -* then controlled by the ARM cores. Bus masters that do not have +* then controlled by the ARM cores. Bus masters that do not have * user/privileged access controls, such as DMA, inherit their attributes * from the bus master that configured it. The user/privileged distinction * is used mainly in the MPUs for single bus master accesses but they can * also be used in all other protection units. -* - Secure/Non-secure access: The secure/non-secure attribute is another +* - Secure/Non-secure access: The secure/non-secure attribute is another * identifier to distinguish between two separate modes of operations. Much * like the user/privileged access, the secure/non-secure mode flag is present * in the bus master control register. The ARM core does not have this @@ -155,10 +153,10 @@ * both secure and non-secure regions, whereas a bus master with non-secure * attribute can only access non-secure regions. * - Protection Context access: Protection Context is an attribute -* that serves two purposes; To enter the hardware controlled secure PC=0 +* that serves two purposes; To enter the hardware controlled secure PC=0 * mode of operation from non-secure modes and to provide finer granularity * to the bus master access definitions. It is used in SMPU and PPU configuration -* to control which bus master protection context can access the resources +* to control which bus master protection context can access the resources * that they protect. * * \section group_prot_protection_structure Protection Structure @@ -167,7 +165,7 @@ * The exception to this rule is MPU structs, which only have the slave struct * equivalent. The protection units apply their access evaluations in a decreasing * index order. For example, if SMPU1 and SMPU2 both protect a specific memory region, -* the the higher index (SMPU2) will be evaluated first. In a secure system, the +* the the higher index (SMPU2) will be evaluated first. In a secure system, the * higher index protection structs would then provide the high level of security * and the lower indexes would provide the lower level of security. Refer to the * \ref group_prot_protection_type section for more information. @@ -182,41 +180,41 @@ * \subsubsection group_prot_slave_addr Slave Struct Address Definition * * - Address: For MPU, SMPU and PROG PPU, the address field is used to define -* the base memory region to apply the protection. This field has a dependency +* the base memory region to apply the protection. This field has a dependency * on the region size, which dictates the alignment of the protection unit. E.g. * if the region size is 64KB, the address field is aligned to 64KB. Hence -* the lowest bits [15:0] are ignored. For instance, if the address is defined +* the lowest bits [15:0] are ignored. For instance, if the address is defined * at 0x0800FFFF, the protection unit would apply its protection settings from -* 0x08000000. Thus alignment must be checked before defining the protection -* address. The address field for other PPUs are not used, as they are bound -* to their respective peripheral memory locations. +* 0x08000000. Thus alignment must be checked before defining the protection +* address. The address field for other PPUs are not used, as they are bound +* to their respective peripheral memory locations. * - Region Size: For MPU, SMPU and PROG PPU, the region size is used to define * the memory block size to apply the protection settings, starting from the * defined base address. It is also used to define the 8 sub-regions for the * chosen memory block. E.g. If the region size is 64KB, each subregion would * be 8KB. This information can then be used to disable the protection -* settings for select subregions, which gives finer granularity to the -* memory regions. PPUs do not have region size definitions as they are bound -* to their respective peripheral memory locations. +* settings for select subregions, which gives finer granularity to the +* memory regions. PPUs do not have region size definitions as they are bound +* to their respective peripheral memory locations. * - Subregions: The memory block defined by the address and region size fields * is divided into 8 (0 to 7) equally spaced subregions. The protection settings -* of the protection unit can be disabled for these subregions. E.g. for a -* given 64KB of memory block starting from address 0x08000000, disabling +* of the protection unit can be disabled for these subregions. E.g. for a +* given 64KB of memory block starting from address 0x08000000, disabling * subregion 0 would result in the protection settings not affecting the memory -* located between 0x08000000 to 0x08001FFF. PPUs do not have subregion -* definitions as they are bound to their respective peripheral memory locations. +* located between 0x08000000 to 0x08001FFF. PPUs do not have subregion +* definitions as they are bound to their respective peripheral memory locations. * * \subsubsection group_prot_slave_attr Slave Struct Attribute Definition * * - User Permission: Protection units can control the access restrictions -* of the read (R), write (W) and execute (X) (subject to their availability -* depending on the type of protection unit) operations on the memory block +* of the read (R), write (W) and execute (X) (subject to their availability +* depending on the type of protection unit) operations on the memory block * when the bus master is operating in user mode. PPU structs do not provide * execute attributes. * - Privileged Permission: Similar to the user permission, protection units can -* control the access restrictions of the read (R), write (W) and execute (X) -* (subject to their availability depending on the type of protection unit) -* operations on the memory block when the bus master is operating in +* control the access restrictions of the read (R), write (W) and execute (X) +* (subject to their availability depending on the type of protection unit) +* operations on the memory block when the bus master is operating in * privileged mode. PPU structs do not provide execute attributes. * - Secure/Non-secure: Applies the secure/non-secure protection settings to * the defined memory region. Secure protection allows only bus masters that @@ -240,7 +238,7 @@ * protection context values allowed by the protection unit. E.g. If SMPU1 is * configured to allow only PC=1 and PC=5, a bus master (such as CM4) must * be operating at PC=1 or PC=5 when accessing the protected memory region. -* +* * \subsection group_prot_master_struct Master Struct * * The master struct protects its slave struct in the protection unit. This @@ -258,10 +256,10 @@ * * \subsubsection group_prot_master_attr Master Struct Attribute Definition * -* - User Permission: Only the write (W) access attribute is allowed for +* - User Permission: Only the write (W) access attribute is allowed for * master structs, which controls whether a bus master operating in user * mode has the write access. -* - Privileged Permission: Only the write (W) access attribute is allowed for +* - Privileged Permission: Only the write (W) access attribute is allowed for * master structs, which controls whether a bus master operating in privileged * mode has the write access. * - Secure/Non-Secure: Same behavior as slave struct. @@ -286,15 +284,15 @@ * the protected memory. * * For example, by configuring the CM0+ bus master configuration to allow -* only protection contexts 2 and 3, the bus master will be able to -* set its protection context only to 2 or 3. During runtime, the CM0+ core -* can set its protection context to 2 by calling Cy_Prot_SetActivePC() +* only protection contexts 2 and 3, the bus master will be able to +* set its protection context only to 2 or 3. During runtime, the CM0+ core +* can set its protection context to 2 by calling Cy_Prot_SetActivePC() * and access all regions of protected memory that allow PC=2. A fault will * be triggered if a resource is protected with different protection settings. * -* Note that each protection unit is distinguished by its type (e.g. +* Note that each protection unit is distinguished by its type (e.g. * PROT_MPU_MPU_STRUCT_Type). The list of supported protection units can be -* obtained from the device definition header file. Choose a protection unit +* obtained from the device definition header file. Choose a protection unit * of interest, and call its corresponding Cy_Prot_ConfigStruct() function * with its software protection unit configuration structure populated. Then * enable the protection unit by calling the Cy_Prot_EnableStruct() function. @@ -307,17 +305,17 @@ * When a resource (memory/register) is accessed, it must pass evaluation of * all three protection unit categories in the following order: MPU->SMPU->PPU. * The application should ensure that a denial-of-service attack cannot be -* made on the PPU by the SMPU. For this reason, it is recommended that the +* made on the PPU by the SMPU. For this reason, it is recommended that the * application's security policy limit the ability for the non-secure client * from configuring the SMPUs. -* +* * Within each category, the priority hierarchy must be carefully considered * to ensure that a higher priority protection unit cannot be configured to * override the security configuration of a lower index protection unit. * Therefore if a lower index protection unit is configured, relevant higher -* priority indexes should be configured (or protected from unwanted +* priority indexes should be configured (or protected from unwanted * reconfiguration). E.g. If a PPU_SL is configured, PPU_RG and PPU_GR that -* overlaps with the protected registers should also be configured. SImilar +* overlaps with the protected registers should also be configured. SImilar * to SMPUs, it is recommended that the configuration of PPU_PROG be limited. * Otherwise they can be used to override the protection settings of PPU_RG * and PPU_SL structs. @@ -329,8 +327,8 @@ * exception entry in the CPUSS.CM0_PC0_HANDLER register. * * - SMPU 15 and 14 are configured and enabled to only allow PC=0 accesses at -* device boot. -* - PROG PPU 15, 14, 13 and 12 are configured to only allow PC=0 accesses at +* device boot. +* - PROG PPU 15, 14, 13 and 12 are configured to only allow PC=0 accesses at * device boot. * - GR PPU 0 and 2 are configured to only allow PC=0 accesses at device boot. * @@ -347,7 +345,7 @@ * * 1.10 * Added input parameter validation to the API functions.
-* cy_en_prot_pcmask_t, cy_en_prot_subreg_t and cy_en_prot_pc_t +* cy_en_prot_pcmask_t, cy_en_prot_subreg_t and cy_en_prot_pc_t * types are set to typedef enum * Improved debugging capability * @@ -412,7 +410,7 @@ extern "C" { /** * Prot Driver error codes */ -typedef enum +typedef enum { CY_PROT_SUCCESS = 0x00u, /**< Returned successful */ CY_PROT_BAD_PARAM = CY_PROT_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< Bad parameter was passed */ @@ -422,7 +420,7 @@ typedef enum /** * User/Privileged permission */ -typedef enum +typedef enum { CY_PROT_PERM_DISABLED = 0x00u, /**< Read, Write and Execute disabled */ CY_PROT_PERM_R = 0x01u, /**< Read enabled */ @@ -437,7 +435,7 @@ typedef enum /** * Memory region size */ -typedef enum +typedef enum { CY_PROT_SIZE_256B = 7u, /**< 256 bytes */ CY_PROT_SIZE_512B = 8u, /**< 512 bytes */ @@ -504,7 +502,7 @@ enum cy_en_prot_subreg_t }; /** -* Protection context mask (PC_MASK) +* Protection context mask (PC_MASK) */ enum cy_en_prot_pcmask_t { @@ -715,7 +713,7 @@ enum cy_en_prot_pcmask_t */ /** Configuration structure for MPU Struct initialization */ -typedef struct +typedef struct { uint32_t* address; /**< Base address of the memory region */ cy_en_prot_size_t regionSize; /**< Size of the memory region */ @@ -726,7 +724,7 @@ typedef struct } cy_stc_mpu_cfg_t; /** Configuration structure for SMPU struct initialization */ -typedef struct +typedef struct { uint32_t* address; /**< Base address of the memory region (Only applicable to slave) */ cy_en_prot_size_t regionSize; /**< Size of the memory region (Only applicable to slave) */ @@ -739,7 +737,7 @@ typedef struct } cy_stc_smpu_cfg_t; /** Configuration structure for Programmable (PROG) PPU (PPU_PR) struct initialization */ -typedef struct +typedef struct { uint32_t* address; /**< Base address of the memory region (Only applicable to slave) */ cy_en_prot_size_t regionSize; /**< Size of the memory region (Only applicable to slave) */ @@ -752,7 +750,7 @@ typedef struct } cy_stc_ppu_prog_cfg_t; /** Configuration structure for Fixed Group (GR) PPU (PPU_GR) struct initialization */ -typedef struct +typedef struct { cy_en_prot_perm_t userPermission; /**< User permissions for the region */ cy_en_prot_perm_t privPermission; /**< Privileged permissions for the region */ @@ -762,7 +760,7 @@ typedef struct } cy_stc_ppu_gr_cfg_t; /** Configuration structure for Fixed Slave (SL) PPU (PPU_SL) struct initialization */ -typedef struct +typedef struct { cy_en_prot_perm_t userPermission; /**< User permissions for the region */ cy_en_prot_perm_t privPermission; /**< Privileged permissions for the region */ @@ -772,7 +770,7 @@ typedef struct } cy_stc_ppu_sl_cfg_t; /** Configuration structure for Fixed Region (RG) PPU (PPU_RG) struct initialization */ -typedef struct +typedef struct { cy_en_prot_perm_t userPermission; /**< User permissions for the region */ cy_en_prot_perm_t privPermission; /**< Privileged permissions for the region */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.c index 2c92da4226..6802b6b13e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.c @@ -2,14 +2,13 @@ * \file cy_rtc.c * \version 2.10 * -* This file provides constants and parameter values for the APIs for the +* This file provides constants and parameter values for the APIs for the * Real-Time Clock (RTC). * ******************************************************************************** +* \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_rtc.h" @@ -49,7 +48,7 @@ static uint32_t RelativeToFixed(cy_stc_rtc_dst_format_t const *convertDst); * The pointer to the RTC configuration structure, see \ref cy_stc_rtc_config_t. * * \return -* cy_en_rtc_status_t *config checking result. If the pointer is NULL, +* cy_en_rtc_status_t *config checking result. If the pointer is NULL, * returns an error. * *******************************************************************************/ @@ -69,7 +68,7 @@ cy_en_rtc_status_t Cy_RTC_Init(cy_stc_rtc_config_t const *config) * The pointer to the RTC configuration structure, see \ref cy_stc_rtc_config_t. * * \return -* cy_en_rtc_status_t A validation check result of date and month. Returns an +* cy_en_rtc_status_t A validation check result of date and month. Returns an * error, if the date range is invalid. * *******************************************************************************/ @@ -108,7 +107,7 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTime(cy_stc_rtc_config_t const *dateTime) { BACKUP->RTC_TIME = tmpTime; BACKUP->RTC_DATE = tmpDate; - + /* Clear the RTC Write bit to finish RTC register update */ retVal = Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED); } @@ -123,7 +122,7 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTime(cy_stc_rtc_config_t const *dateTime) * Function Name: Cy_RTC_GetDateAndTime ****************************************************************************//** * -* Gets the current RTC time and date. The AHB RTC Time and Date register values +* Gets the current RTC time and date. The AHB RTC Time and Date register values * are stored into the *dateTime structure. * * \param dateTime @@ -140,7 +139,7 @@ void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t* dateTime) /* Read the current RTC time and date to validate the input parameters */ Cy_RTC_SyncFromRtc(); - /* Write the AHB RTC registers date and time into the local variables and + /* Write the AHB RTC registers date and time into the local variables and * updating the dateTime structure elements */ tmpTime = BACKUP->RTC_TIME; @@ -151,14 +150,14 @@ void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t* dateTime) dateTime->hrFormat = ((_FLD2BOOL(BACKUP_RTC_TIME_CTRL_12HR, tmpTime)) ? CY_RTC_12_HOURS : CY_RTC_24_HOURS); /* Read the current hour mode to know how many hour bits should be converted - * In the 24-hour mode, the hour value is presented in [21:16] bits in the + * In the 24-hour mode, the hour value is presented in [21:16] bits in the * BCD format. * In the 12-hour mode the hour value is presented in [20:16] bits in the BCD - * format and bit [21] is present: 0 - AM; 1 - PM. + * format and bit [21] is present: 0 - AM; 1 - PM. */ if (dateTime->hrFormat != CY_RTC_24_HOURS) { - dateTime->hour = + dateTime->hour = Cy_RTC_ConvertBcdToDec((tmpTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) >> BACKUP_RTC_TIME_RTC_HOUR_Pos); dateTime->amPm = ((0U != (tmpTime & CY_RTC_BACKUP_RTC_TIME_RTC_PM)) ? CY_RTC_PM : CY_RTC_AM); @@ -168,7 +167,7 @@ void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t* dateTime) dateTime->hour = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, tmpTime)); } dateTime->dayOfWeek = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_TIME_RTC_DAY, tmpTime)); - + dateTime->date = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_DATE_RTC_DATE, tmpDate)); dateTime->month = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_DATE_RTC_MON, tmpDate)); dateTime->year = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, tmpDate)); @@ -225,7 +224,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTime(cy_stc_rtc_alarm_t const *alarmDat /* Read the current RTC year to validate alarmDateTime->date */ Cy_RTC_SyncFromRtc(); - tmpYear = + tmpYear = CY_RTC_TWO_THOUSAND_YEARS + Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, BACKUP->RTC_DATE)); tmpDaysInMonth = Cy_RTC_DaysInMonth(alarmDateTime->month, tmpYear); @@ -235,9 +234,9 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTime(cy_stc_rtc_alarm_t const *alarmDat uint32_t interruptState; uint32_t tmpAlarmTime; uint32_t tmpAlarmDate; - + ConstructAlarmTimeDate(alarmDateTime, &tmpAlarmTime, &tmpAlarmDate); - + /* The RTC AHB registers can be updated only under condition that the * Write bit is set and the RTC busy bit is cleared (RTC_BUSY = 0). */ @@ -271,7 +270,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTime(cy_stc_rtc_alarm_t const *alarmDat * Function Name: Cy_RTC_GetAlarmDateAndTime ****************************************************************************//** * -* Returns the current alarm time and date values from the ALMx_TIME and +* Returns the current alarm time and date values from the ALMx_TIME and * ALMx_DATE registers. * * \param alarmDateTime @@ -304,37 +303,37 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a tmpAlarmDate = BACKUP->ALM1_DATE; alarmDateTime->sec = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_TIME_ALM_SEC, tmpAlarmTime)); - alarmDateTime->secEn = + alarmDateTime->secEn = ((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_SEC_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); alarmDateTime->min = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_TIME_ALM_MIN, tmpAlarmTime)); - alarmDateTime->minEn = + alarmDateTime->minEn = ((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_MIN_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); /* Read the current hour mode to know how many hour bits to convert. - * In the 24-hour mode, the hour value is presented in [21:16] bits in + * In the 24-hour mode, the hour value is presented in [21:16] bits in * the BCD format. - * In the 12-hour mode, the hour value is presented in [20:16] bits in + * In the 12-hour mode, the hour value is presented in [20:16] bits in * the BCD format and bit [21] is present: 0 - AM; 1 - PM. */ if (curHoursFormat != CY_RTC_24_HOURS) { - alarmDateTime->hour = - Cy_RTC_ConvertBcdToDec((tmpAlarmTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) + alarmDateTime->hour = + Cy_RTC_ConvertBcdToDec((tmpAlarmTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) >> BACKUP_ALM1_TIME_ALM_HOUR_Pos); - /* In the structure, the hour value should be presented in the 24-hour mode. In - * that condition the firmware checks the AM/PM status and adds 12 hours to + /* In the structure, the hour value should be presented in the 24-hour mode. In + * that condition the firmware checks the AM/PM status and adds 12 hours to * the converted hour value if the PM bit is set. */ - if ((alarmDateTime->hour < CY_RTC_HOURS_PER_HALF_DAY) && + if ((alarmDateTime->hour < CY_RTC_HOURS_PER_HALF_DAY) && (0U != (BACKUP->ALM1_TIME & CY_RTC_BACKUP_RTC_TIME_RTC_PM))) { alarmDateTime->hour += CY_RTC_HOURS_PER_HALF_DAY; } /* Set zero hour, as the 12 A hour is zero hour in 24-hour format */ - if ((alarmDateTime->hour == CY_RTC_HOURS_PER_HALF_DAY) && + if ((alarmDateTime->hour == CY_RTC_HOURS_PER_HALF_DAY) && (0U == (BACKUP->ALM1_TIME & CY_RTC_BACKUP_RTC_TIME_RTC_PM))) { alarmDateTime->hour = 0U; @@ -345,22 +344,22 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a { alarmDateTime->hour = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_TIME_ALM_HOUR, tmpAlarmTime)); } - alarmDateTime->hourEn = + alarmDateTime->hourEn = ((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_HOUR_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - + alarmDateTime->dayOfWeek = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_TIME_ALM_DAY, tmpAlarmTime)); alarmDateTime->dayOfWeekEn = ((_FLD2BOOL(BACKUP_ALM1_TIME_ALM_DAY_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); alarmDateTime->date = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_DATE_ALM_DATE, tmpAlarmDate)); - alarmDateTime->dateEn = + alarmDateTime->dateEn = ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_DATE_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->month = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_DATE_ALM_MON, tmpAlarmDate)); - alarmDateTime->monthEn = + alarmDateTime->month = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM1_DATE_ALM_MON, tmpAlarmDate)); + alarmDateTime->monthEn = ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_MON_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->almEn = + alarmDateTime->almEn = ((_FLD2BOOL(BACKUP_ALM1_DATE_ALM_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); } else @@ -369,17 +368,17 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a tmpAlarmDate = BACKUP->ALM2_DATE; alarmDateTime->sec = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_TIME_ALM_SEC, tmpAlarmTime)); - alarmDateTime->secEn = + alarmDateTime->secEn = ((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_SEC_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); alarmDateTime->min = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_TIME_ALM_MIN, tmpAlarmTime)); - alarmDateTime->minEn = + alarmDateTime->minEn = ((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_MIN_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); /* Read the current hour mode to know how many hour bits to convert. - * In the 24-hour mode, the hour value is presented in [21:16] bits in + * In the 24-hour mode, the hour value is presented in [21:16] bits in * the BCD format. - * In the 12-hour mode the hour value is presented in [20:16] bits in + * In the 12-hour mode the hour value is presented in [20:16] bits in * the BCD format and bit [21] is present: 0 - AM; 1 - PM. */ if (curHoursFormat != CY_RTC_24_HOURS) @@ -387,17 +386,17 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a alarmDateTime->hour = Cy_RTC_ConvertBcdToDec((tmpAlarmTime & CY_RTC_BACKUP_RTC_TIME_RTC_12HOUR) >> BACKUP_ALM2_TIME_ALM_HOUR_Pos); - /* In the structure, the hour value should be presented in the 24-hour mode. In - * that condition the firmware checks the AM/PM status and adds 12 hours to + /* In the structure, the hour value should be presented in the 24-hour mode. In + * that condition the firmware checks the AM/PM status and adds 12 hours to * the converted hour value if the PM bit is set. */ - if ((alarmDateTime->hour < CY_RTC_HOURS_PER_HALF_DAY) && + if ((alarmDateTime->hour < CY_RTC_HOURS_PER_HALF_DAY) && (0U != (BACKUP->ALM2_TIME & CY_RTC_BACKUP_RTC_TIME_RTC_PM))) { alarmDateTime->hour += CY_RTC_HOURS_PER_HALF_DAY; } /* Set zero hour, as the 12 am hour is zero hour in 24-hour format */ - else if ((alarmDateTime->hour == CY_RTC_HOURS_PER_HALF_DAY) && + else if ((alarmDateTime->hour == CY_RTC_HOURS_PER_HALF_DAY) && (0U == (BACKUP->ALM2_TIME & CY_RTC_BACKUP_RTC_TIME_RTC_PM))) { alarmDateTime->hour = 0U; @@ -411,22 +410,22 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a { alarmDateTime->hour = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_TIME_ALM_HOUR, tmpAlarmTime)); } - alarmDateTime->hourEn = + alarmDateTime->hourEn = ((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_HOUR_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - + alarmDateTime->dayOfWeek = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_TIME_ALM_DAY, tmpAlarmTime)); alarmDateTime->dayOfWeekEn = ((_FLD2BOOL(BACKUP_ALM2_TIME_ALM_DAY_EN, tmpAlarmTime)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); alarmDateTime->date = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_DATE_ALM_DATE, tmpAlarmDate)); - alarmDateTime->dateEn = + alarmDateTime->dateEn = ((_FLD2BOOL(BACKUP_ALM2_DATE_ALM_DATE_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->month = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_DATE_ALM_MON, tmpAlarmDate)); - alarmDateTime->monthEn = + alarmDateTime->month = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_ALM2_DATE_ALM_MON, tmpAlarmDate)); + alarmDateTime->monthEn = ((_FLD2BOOL(BACKUP_ALM2_DATE_ALM_MON_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); - alarmDateTime->almEn = + alarmDateTime->almEn = ((_FLD2BOOL(BACKUP_ALM2_DATE_ALM_EN, tmpAlarmDate)) ? CY_RTC_ALARM_ENABLE : CY_RTC_ALARM_DISABLE); } } @@ -436,7 +435,7 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a * Function Name: Cy_RTC_SetDateAndTimeDirect ****************************************************************************//** * -* Sets the time and date values into the RTC_TIME and RTC_DATE registers using +* Sets the time and date values into the RTC_TIME and RTC_DATE registers using * direct time parameters. * * \param sec The second valid range is [0-59]. @@ -444,14 +443,14 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a * \param min The minute valid range is [0-59]. * * \param hour -* The hour valid range is [0-23]. This parameter should be presented in the +* The hour valid range is [0-23]. This parameter should be presented in the * 24-hour format. * * The function reads the current 12/24-hour mode, then converts the hour value * properly as the mode. * * \param date -* The date valid range is [1-31], if the month of February is +* The date valid range is [1-31], if the month of February is * selected as the Month parameter, then the valid range is [0-29]. * * \param month The month valid range is [1-12]. @@ -459,12 +458,12 @@ void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_a * \param year The year valid range is [0-99]. * * \return -* cy_en_rtc_status_t A validation check result of date and month. Returns an -* error, if the date range is invalid or the RTC time and date set was +* cy_en_rtc_status_t A validation check result of date and month. Returns an +* error, if the date range is invalid or the RTC time and date set was * cancelled: the RTC Write bit was not set, the RTC was synchronizing. * *******************************************************************************/ -cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, +cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, uint32_t date, uint32_t month, uint32_t year) { uint32_t tmpDaysInMonth; @@ -485,14 +484,14 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint3 uint32_t tmpTime; uint32_t tmpDate; uint32_t interruptState; - + /* Fill the date and time structure */ curTimeAndDate.sec = sec; curTimeAndDate.min = min; - + /* Read the current hour mode */ Cy_RTC_SyncFromRtc(); - + if (CY_RTC_12_HOURS != Cy_RTC_GetHoursFormat()) { curTimeAndDate.hrFormat = CY_RTC_24_HOURS; @@ -505,18 +504,18 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint3 /* Convert the 24-hour format input value into the 12-hour format */ if (hour >= CY_RTC_HOURS_PER_HALF_DAY) { - /* The current hour is more than 12 or equal 12, in the 24-hour - * format. Set the PM bit and convert the hour: hour = hour - 12, + /* The current hour is more than 12 or equal 12, in the 24-hour + * format. Set the PM bit and convert the hour: hour = hour - 12, * except that the hour is 12. */ - curTimeAndDate.hour = + curTimeAndDate.hour = (hour > CY_RTC_HOURS_PER_HALF_DAY) ? ((uint32_t) hour - CY_RTC_HOURS_PER_HALF_DAY) : hour; curTimeAndDate.amPm = CY_RTC_PM; } else { - /* The current hour is less than 12 AM. The zero hour is equal + /* The current hour is less than 12 AM. The zero hour is equal * to 12:00 AM */ curTimeAndDate.hour = ((hour == 0U) ? CY_RTC_HOURS_PER_HALF_DAY : hour); @@ -554,8 +553,8 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint3 * Function Name: Cy_RTC_SetAlarmDateAndTimeDirect ****************************************************************************//** * -* Sets alarm time and date values into the ALMx_TIME and ALMx_DATE -* registers using direct time parameters. ALM_DAY_EN is default 0 (=ignore) for +* Sets alarm time and date values into the ALMx_TIME and ALMx_DATE +* registers using direct time parameters. ALM_DAY_EN is default 0 (=ignore) for * this function. * * \param sec The alarm second valid range is [0-59]. @@ -564,7 +563,7 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint3 * * \param hour * The valid range is [0-23]. -* This parameter type is always in the 24-hour type. This function reads the +* This parameter type is always in the 24-hour type. This function reads the * current 12/24-hour mode, then converts the hour value properly as the mode. * * \param date @@ -577,11 +576,11 @@ cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint3 * The alarm index to be configured, see \ref cy_en_rtc_alarm_t. * * \return -* cy_en_rtc_status_t A validation check result of date and month. Returns an +* cy_en_rtc_status_t A validation check result of date and month. Returns an * error, if the date range is invalid. * *******************************************************************************/ -cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, +cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, uint32_t date, uint32_t month, cy_en_rtc_alarm_t alarmIndex) { uint32_t tmpDaysInMonth; @@ -593,7 +592,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, CY_ASSERT_L3(CY_RTC_IS_HOUR_VALID(hour)); CY_ASSERT_L3(CY_RTC_IS_MONTH_VALID(month)); CY_ASSERT_L3(CY_RTC_IS_ALARM_IDX_VALID(alarmIndex)); - + /* Read the current time to validate the input parameters */ Cy_RTC_SyncFromRtc(); @@ -609,7 +608,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t tmpAlarmDate; uint32_t interruptState; cy_stc_rtc_alarm_t alarmDateTime; - + /* Fill the alarm structure */ alarmDateTime.sec = sec; alarmDateTime.secEn = CY_RTC_ALARM_ENABLE; @@ -662,7 +661,7 @@ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, * * Sets the 12/24-hour mode. * -* \param hoursFormat +* \param hoursFormat * The current hour format, see \ref cy_en_rtc_hours_format_t. * * \return cy_en_rtc_status_t A validation check result of RTC register update. @@ -674,12 +673,12 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) cy_en_rtc_status_t retVal = CY_RTC_BAD_PARAM; CY_ASSERT_L3(CY_RTC_IS_HRS_FORMAT_VALID(hoursFormat)); - + /* Read the current time to validate the input parameters */ Cy_RTC_SyncFromRtc(); curTime = BACKUP->RTC_TIME; - /* Hour format can be changed in condition that current hour format is not + /* Hour format can be changed in condition that current hour format is not * the same as requested in function argument */ if (hoursFormat != Cy_RTC_GetHoursFormat()) @@ -692,7 +691,7 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) hourValue = Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, curTime)); if (hourValue >= CY_RTC_HOURS_PER_HALF_DAY) { - /* The current hour is more than 12 or equal 12 in the 24-hour + /* The current hour is more than 12 or equal 12 in the 24-hour * mode. Set the PM bit and convert the hour: hour = hour - 12. */ hourValue = (uint32_t) (hourValue - CY_RTC_HOURS_PER_HALF_DAY); @@ -703,11 +702,11 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) } else if (hourValue < 1U) { - /* The current hour in the 24-hour mode is 0 which is equal + /* The current hour in the 24-hour mode is 0 which is equal * to 12:00 AM */ curTime = - (_CLR_SET_FLD32U(curTime, BACKUP_RTC_TIME_RTC_HOUR, + (_CLR_SET_FLD32U(curTime, BACKUP_RTC_TIME_RTC_HOUR, Cy_RTC_ConvertDecToBcd(CY_RTC_HOURS_PER_HALF_DAY))); /* Set the AM bit */ @@ -726,8 +725,8 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) else { /* Mask the AM/PM bit as the hour value is in [20:16] bits */ - hourValue = - Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, + hourValue = + Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_TIME_RTC_HOUR, (curTime & (uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM))); /* Add 12 hours in condition that current time is in PM period */ @@ -746,8 +745,8 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) curTime &= (uint32_t) ~BACKUP_RTC_TIME_CTRL_12HR_Msk; } - /* Writing corrected hour value and hour format bit into the RTC AHB - * register. The RTC AHB register can be updated only under condition + /* Writing corrected hour value and hour format bit into the RTC AHB + * register. The RTC AHB register can be updated only under condition * that the Write bit is set and the RTC busy bit is cleared * (CY_RTC_BUSY = 0). */ @@ -755,7 +754,7 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) if (retVal == CY_RTC_SUCCESS) { uint32_t interruptState; - + interruptState = Cy_SysLib_EnterCriticalSection(); BACKUP->RTC_TIME = curTime; Cy_SysLib_ExitCriticalSection(interruptState); @@ -772,31 +771,31 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) * Function Name: Cy_RTC_SelectFrequencyPrescaler() ****************************************************************************//** * -* Selects the RTC pre-scaler value and changes its clock frequency. +* Selects the RTC pre-scaler value and changes its clock frequency. * If the external 32.768 kHz WCO is absent on the board, the RTC can -* be driven by a 32.768kHz square clock source or an external 50-Hz or 60-Hz +* be driven by a 32.768kHz square clock source or an external 50-Hz or 60-Hz * sine-wave clock source, for example the wall AC frequency. * * \param clkSel clock frequency, see \ref cy_en_rtc_clock_freq_t. * * In addition to generating the 32.768 kHz clock from external crystals, the WCO -* can be sourced by an external clock source (50 Hz or 60Hz), even the wall AC +* can be sourced by an external clock source (50 Hz or 60Hz), even the wall AC * frequency as a timebase. The API helps select between the RTC sources: * * A 32.768 kHz digital clock source
* * An external 50-Hz or 60-Hz sine-wave clock source * -* If you want to use an external 50-Hz or 60-Hz sine-wave clock source to +* If you want to use an external 50-Hz or 60-Hz sine-wave clock source to * drive the RTC, the next procedure is required:
* 1) Disable the WCO
* 2) Bypass the WCO using the Cy_SysClk_WcoBypass() function
-* 3) Configure both wco_out and wco_in pins. Note that only one of the wco pins -* should be driven and the other wco pin should be floating, which depends on +* 3) Configure both wco_out and wco_in pins. Note that only one of the wco pins +* should be driven and the other wco pin should be floating, which depends on * the source that drives the RTC (*1)
-* 4) Call Cy_RTC_SelectFrequencyPrescaler(CY_RTC_FREQ_60_HZ), if you want to +* 4) Call Cy_RTC_SelectFrequencyPrescaler(CY_RTC_FREQ_60_HZ), if you want to * drive the WCO, for example, with a 60 Hz source
* 5) Enable the WCO
* -* If you want to use the WCO after using an external 50-Hz or 60-Hz sine-wave +* If you want to use the WCO after using an external 50-Hz or 60-Hz sine-wave * clock source:
* 1) Disable the WCO
* 2) Switch-off the WCO bypass using the Cy_SysClk_WcoBypass() function
@@ -804,14 +803,14 @@ cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat) * 4) Call Cy_RTC_SelectFrequencyPrescaler(CY_RTC_FREQ_WCO_32768_HZ)
* 5) Enable the WCO
* -* (1) - Refer to the device TRM to know how to configure the wco pins properly +* (1) - Refer to the device TRM to know how to configure the wco pins properly * and which wco pin should be driven/floating. * -* \warning -* There is a limitation to the external clock source frequencies. Only two +* \warning +* There is a limitation to the external clock source frequencies. Only two * frequencies are allowed - 50 Hz or 60 Hz. Note that this limitation is related -* to the RTC pre-scaling feature presented in this function. This -* limitation is not related to WCO external clock sources which can drive the +* to the RTC pre-scaling feature presented in this function. This +* limitation is not related to WCO external clock sources which can drive the * WCO in Bypass mode. * *******************************************************************************/ @@ -826,18 +825,18 @@ void Cy_RTC_SelectFrequencyPrescaler(cy_en_rtc_clock_freq_t clkSel) /******************************************************************************* * Function Name: Cy_RTC_EnableDstTime ****************************************************************************//** -* -* The function sets the DST time and configures the ALARM2 interrupt register -* with the appropriate DST time. This function sets the DST stop time if the -* current time is already in the DST period. The DST period is a period of time -* between the DST start time and DST stop time. The DST start time and DST stop -* time is presented in the DST configuration structure, +* +* The function sets the DST time and configures the ALARM2 interrupt register +* with the appropriate DST time. This function sets the DST stop time if the +* current time is already in the DST period. The DST period is a period of time +* between the DST start time and DST stop time. The DST start time and DST stop +* time is presented in the DST configuration structure, * see \ref cy_stc_rtc_dst_t. * * \param dstTime The DST configuration structure, see \ref cy_stc_rtc_dst_t. * * \param timeDate -* The time and date structure. The the appropriate DST time is +* The time and date structure. The the appropriate DST time is * set based on this time and date, see \ref cy_stc_rtc_config_t. * * \return @@ -872,13 +871,13 @@ cy_en_rtc_status_t Cy_RTC_EnableDstTime(cy_stc_rtc_dst_t const *dstTime, cy_stc_ * * Set the next time of the DST. This function sets the time to ALARM2 for a next * DST event. If Cy_RTC_GetDSTStatus() is true(=1), the next DST event should be -* the DST stop, then this function should be called with the DST stop time. +* the DST stop, then this function should be called with the DST stop time. * -* If the time format(.format) is relative option(=0), the -* RelativeToFixed() is called to convert to a fixed date. +* If the time format(.format) is relative option(=0), the +* RelativeToFixed() is called to convert to a fixed date. * -* \param nextDst -* The structure with time at which a next DST event should occur +* \param nextDst +* The structure with time at which a next DST event should occur * (ALARM2 interrupt should occur). See \ref cy_stc_rtc_config_t. * * \return @@ -898,7 +897,7 @@ cy_en_rtc_status_t Cy_RTC_SetNextDstTime(cy_stc_rtc_dst_format_t const *nextDst) /* Configure an alarm structure based on the DST structure */ dstAlarmTimeAndDate.sec = 0U; - dstAlarmTimeAndDate.secEn = CY_RTC_ALARM_ENABLE; + dstAlarmTimeAndDate.secEn = CY_RTC_ALARM_ENABLE; dstAlarmTimeAndDate.min = 0U; dstAlarmTimeAndDate.minEn = CY_RTC_ALARM_ENABLE; dstAlarmTimeAndDate.hour = nextDst->hour; @@ -924,7 +923,7 @@ cy_en_rtc_status_t Cy_RTC_SetNextDstTime(cy_stc_rtc_dst_format_t const *nextDst) { retVal = Cy_RTC_SetAlarmDateAndTime(&dstAlarmTimeAndDate, CY_RTC_ALARM_2); --tryesToSetup; - + /* Delay after try to set the DST */ Cy_SysLib_DelayUs(CY_RTC_DELAY_AFTER_DST_US); } @@ -943,14 +942,14 @@ cy_en_rtc_status_t Cy_RTC_SetNextDstTime(cy_stc_rtc_dst_format_t const *nextDst) * Function Name: Cy_RTC_GetDstStatus ****************************************************************************//** * -* Returns the current DST status using given time information. This function -* is used in the initial state of a system. If the DST is enabled, the system +* Returns the current DST status using given time information. This function +* is used in the initial state of a system. If the DST is enabled, the system * sets the DST start or stop as a result of this function. * * \param dstTime The DST configuration structure, see \ref cy_stc_rtc_dst_t. * * \param timeDate -* The time and date structure. The the appropriate DST time is +* The time and date structure. The the appropriate DST time is * set based on this time and date, see \ref cy_stc_rtc_config_t. * * \return @@ -962,13 +961,13 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co { uint32_t dstStartTime; uint32_t currentTime; - uint32_t dstStopTime; + uint32_t dstStopTime; uint32_t dstStartDayOfMonth; uint32_t dstStopDayOfMonth; CY_ASSERT_L1(NULL != dstTime); CY_ASSERT_L1(NULL != timeDate); - + /* Calculate a day-of-month value for the relative DST start structure */ if(CY_RTC_DST_RELATIVE != dstTime->startDst.format) { @@ -989,9 +988,9 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co dstStopDayOfMonth = RelativeToFixed(&dstTime->stopDst); } - /* The function forms the date and time values for the DST start time, - * the DST Stop Time and for the Current Time. The function that compares - * the three formed values returns "true" under condition that: + /* The function forms the date and time values for the DST start time, + * the DST Stop Time and for the Current Time. The function that compares + * the three formed values returns "true" under condition that: * dstStartTime < currentTime < dstStopTime. * The date and time value are formed this way: * [13-10] - Month @@ -1003,7 +1002,7 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co currentTime = ((uint32_t) (timeDate->month << CY_RTC_DST_MONTH_POSITION) | (timeDate->date << CY_RTC_DST_DAY_OF_MONTH_POSITION) | (timeDate->hour)); - + dstStopTime = ((uint32_t) (dstTime->stopDst.month << CY_RTC_DST_MONTH_POSITION) | (dstStopDayOfMonth << CY_RTC_DST_DAY_OF_MONTH_POSITION) | (dstTime->stopDst.hour)); @@ -1015,14 +1014,14 @@ bool Cy_RTC_GetDstStatus(cy_stc_rtc_dst_t const *dstTime, cy_stc_rtc_config_t co * Function Name: Cy_RTC_Alarm1Interrupt ****************************************************************************//** * -* A blank weak interrupt handler function which indicates assert of the RTC +* A blank weak interrupt handler function which indicates assert of the RTC * alarm 1 interrupt. -* -* Function implementation should be defined in user source code in condition -* that such event handler is required. If such event is not required user +* +* Function implementation should be defined in user source code in condition +* that such event handler is required. If such event is not required user * should not do any actions. * -* This function is called in the general RTC interrupt handler +* This function is called in the general RTC interrupt handler * `$INSTANCE_NAME`_Interrupt() function. * *******************************************************************************/ @@ -1036,16 +1035,16 @@ __WEAK void Cy_RTC_Alarm1Interrupt(void) * Function Name: Cy_RTC_Alarm2Interrupt ****************************************************************************//** * -* A blank weak interrupt handler function which indicates assert of the RTC +* A blank weak interrupt handler function which indicates assert of the RTC * alarm 2 interrupt. -* -* Function implementation should be defined in user source code in condition -* that such event handler is required. If such event is not required user +* +* Function implementation should be defined in user source code in condition +* that such event handler is required. If such event is not required user * should not do any actions. * -* This function is called in the general RTC interrupt handler -* `$INSTANCE_NAME`_Interrupt() function. Cy_RTC_Alarm2Interrupt() function is -* ignored in `$INSTANCE_NAME`_Interrupt() function if DST is enabled. Refer to +* This function is called in the general RTC interrupt handler +* `$INSTANCE_NAME`_Interrupt() function. Cy_RTC_Alarm2Interrupt() function is +* ignored in `$INSTANCE_NAME`_Interrupt() function if DST is enabled. Refer to * `$INSTANCE_NAME`_Interrupt() description. * *******************************************************************************/ @@ -1058,11 +1057,11 @@ __WEAK void Cy_RTC_Alarm2Interrupt(void) /******************************************************************************* * Function Name: Cy_RTC_DstInterrupt ****************************************************************************//** -* -* This is a processing handler against the DST event. It adjusts the current +* +* This is a processing handler against the DST event. It adjusts the current * time using the DST start/stop parameters and registers the next DST event time * into the ALARM2 interrupt. -* +* * \param dstTime The DST configuration structure, see \ref cy_stc_rtc_dst_t. * *******************************************************************************/ @@ -1074,40 +1073,40 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) if (Cy_RTC_GetDstStatus(dstTime, &curDateTime)) { - /* Under condition that the DST start time was selected as 23:00, and - * the time adjusting occurs, the other time and date values should be + /* Under condition that the DST start time was selected as 23:00, and + * the time adjusting occurs, the other time and date values should be * corrected (day of the week, date, month and year). */ if(curDateTime.hour > CY_RTC_MAX_HOURS_24H) { - /* Incrementing day of the week value as hour adjusted next day of - * the week and date. Correcting hour value as its incrementation + /* Incrementing day of the week value as hour adjusted next day of + * the week and date. Correcting hour value as its incrementation * adjusted it out of valid range [0-23]. */ curDateTime.dayOfWeek++; curDateTime.hour = 0U; - /* Correct a day of the week if its incrementation adjusted it out + /* Correct a day of the week if its incrementation adjusted it out * of valid range [1-7]. */ if(curDateTime.dayOfWeek > CY_RTC_SATURDAY) { curDateTime.dayOfWeek = CY_RTC_SUNDAY; } - + curDateTime.date++; /* Correct a day of a month if its incrementation adjusted it out of * the valid range [1-31]. Increment month value. */ - if(curDateTime.date > Cy_RTC_DaysInMonth(curDateTime.month, + if(curDateTime.date > Cy_RTC_DaysInMonth(curDateTime.month, (curDateTime.year + CY_RTC_TWO_THOUSAND_YEARS))) { curDateTime.date = CY_RTC_FIRST_DAY_OF_MONTH; curDateTime.month++; } - /* Correct a month if its incrementation adjusted it out of the + /* Correct a month if its incrementation adjusted it out of the * valid range [1-12]. Increment year value. */ if(curDateTime.month > CY_RTC_MONTHS_PER_YEAR) @@ -1120,7 +1119,7 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) { curDateTime.hour++; } - + (void) Cy_RTC_SetDateAndTime(&curDateTime); (void) Cy_RTC_SetNextDstTime(&dstTime->stopDst); } @@ -1128,14 +1127,14 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) { if(curDateTime.hour < 1U) { - /* Decrementing day of the week time and date values as hour - * adjusted next day of the week and date. Correct hour value as - * its incrementation adjusted it out of valid range [0-23]. + /* Decrementing day of the week time and date values as hour + * adjusted next day of the week and date. Correct hour value as + * its incrementation adjusted it out of valid range [0-23]. */ curDateTime.hour = CY_RTC_MAX_HOURS_24H; curDateTime.dayOfWeek--; - /* Correct a day of the week if its incrementation adjusted it out + /* Correct a day of the week if its incrementation adjusted it out * of the valid range [1-7]. */ if(curDateTime.dayOfWeek < CY_RTC_SUNDAY) @@ -1150,12 +1149,12 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) */ if(curDateTime.date < CY_RTC_FIRST_DAY_OF_MONTH) { - curDateTime.date = + curDateTime.date = Cy_RTC_DaysInMonth(curDateTime.month, (curDateTime.year + CY_RTC_TWO_THOUSAND_YEARS)); curDateTime.month--; } - /* Correct a month if its increment pushed it out of the valid + /* Correct a month if its increment pushed it out of the valid * range [1-12]. Decrement year value. */ if(curDateTime.month < CY_RTC_JANUARY) @@ -1168,7 +1167,7 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) { curDateTime.hour--; } - + (void) Cy_RTC_SetDateAndTime(&curDateTime); (void) Cy_RTC_SetNextDstTime(&dstTime->startDst); } @@ -1181,11 +1180,11 @@ void Cy_RTC_DstInterrupt(cy_stc_rtc_dst_t const *dstTime) * * This is a weak function and it should be redefined in user source code * in condition that such event handler is required. -* By calling this function, it indicates the year reached 2100. It +* By calling this function, it indicates the year reached 2100. It * should add an adjustment to avoid the Y2K problem. * -* Function implementation should be defined in user source code in condition -* that such event handler is required. If such event is not required user +* Function implementation should be defined in user source code in condition +* that such event handler is required. If such event is not required user * should not do any actions. * *******************************************************************************/ @@ -1215,8 +1214,8 @@ uint32_t Cy_RTC_GetInterruptStatus(void) * Function Name: Cy_RTC_GetInterruptStatusMasked ****************************************************************************//** * -* Returns an interrupt request register masked by the interrupt mask. Returns a -* result of the bitwise AND operation between the corresponding interrupt +* Returns an interrupt request register masked by the interrupt mask. Returns a +* result of the bitwise AND operation between the corresponding interrupt * request and mask bits. * * \return @@ -1266,7 +1265,7 @@ void Cy_RTC_SetInterrupt(uint32_t interruptMask) * Function Name: Cy_RTC_ClearInterrupt ****************************************************************************//** * -* Clears RTC interrupts by setting each bit. +* Clears RTC interrupts by setting each bit. * * \param * interruptMask The bit mask of interrupts to set, @@ -1287,7 +1286,7 @@ void Cy_RTC_ClearInterrupt(uint32_t interruptMask) * Function Name: Cy_RTC_SetInterruptMask ****************************************************************************//** * -* Configures which bits of the interrupt request register that triggers an +* Configures which bits of the interrupt request register that triggers an * interrupt event. * * \param interruptMask @@ -1309,18 +1308,18 @@ void Cy_RTC_SetInterruptMask(uint32_t interruptMask) * The interrupt handler function which should be called in user provided * RTC interrupt function. * -* This is the handler of the RTC interrupt in CPU NVIC. The handler checks -* which RTC interrupt was asserted and calls the respective RTC interrupt -* handler functions: Cy_RTC_Alarm1Interrupt(), Cy_RTC_Alarm2Interrupt() or +* This is the handler of the RTC interrupt in CPU NVIC. The handler checks +* which RTC interrupt was asserted and calls the respective RTC interrupt +* handler functions: Cy_RTC_Alarm1Interrupt(), Cy_RTC_Alarm2Interrupt() or * Cy_RTC_DstInterrupt(), and Cy_RTC_CenturyInterrupt(). -* -* The order of the RTC handler functions execution is incremental. +* +* The order of the RTC handler functions execution is incremental. * Cy_RTC_Alarm1Interrupt() is run as the first one and Cy_RTC_CenturyInterrupt() * is called as the last one. * * This function clears the RTC interrupt every time when it is called. * -* Cy_RTC_DstInterrupt() function is called instead of Cy_RTC_Alarm2Interrupt() +* Cy_RTC_DstInterrupt() function is called instead of Cy_RTC_Alarm2Interrupt() * in condition that the mode parameter is true. * * \param dstTime @@ -1366,22 +1365,22 @@ void Cy_RTC_Interrupt(cy_stc_rtc_dst_t const *dstTime, bool mode) * Function Name: Cy_RTC_DeepSleepCallback ****************************************************************************//** * -* This function checks the RTC_BUSY bit to avoid data corruption before +* This function checks the RTC_BUSY bit to avoid data corruption before * enters the deep sleep mode. * * \param callbackParams -* structure with the syspm callback parameters, +* structure with the syspm callback parameters, * see \ref cy_stc_syspm_callback_params_t * * \return * syspm return status, see \ref cy_en_syspm_status_t * -* \note The *base and *context elements are required to be present in -* the parameter structure because this function uses the SysPm driver +* \note The *base and *context elements are required to be present in +* the parameter structure because this function uses the SysPm driver * callback type. -* The SysPm driver callback function type requires implementing the function +* The SysPm driver callback function type requires implementing the function * with next parameters and return value:
-* cy_en_syspm_status_t (*Cy_SysPmCallback) +* cy_en_syspm_status_t (*Cy_SysPmCallback) * (cy_stc_syspm_callback_params_t *callbackParams); * *******************************************************************************/ @@ -1430,22 +1429,22 @@ cy_en_syspm_status_t Cy_RTC_DeepSleepCallback(cy_stc_syspm_callback_params_t *ca * Function Name: Cy_RTC_HibernateCallback ****************************************************************************//** * -* This function checks the RTC_BUSY bit to avoid data corruption before +* This function checks the RTC_BUSY bit to avoid data corruption before * enters the hibernate mode. * * \param callbackParams -* structure with the syspm callback parameters, +* structure with the syspm callback parameters, * see \ref cy_stc_syspm_callback_params_t. * * \return * syspm return status, see \ref cy_en_syspm_status_t * -* \note The *base and *context elements are required to be present in -* the parameter structure because this function uses the SysPm driver +* \note The *base and *context elements are required to be present in +* the parameter structure because this function uses the SysPm driver * callback type. -* The SysPm driver callback function type requires implementing the function +* The SysPm driver callback function type requires implementing the function * with next parameters and return value:
-* cy_en_syspm_status_t (*Cy_SysPmCallback) +* cy_en_syspm_status_t (*Cy_SysPmCallback) * (cy_stc_syspm_callback_params_t *callbackParams); * *******************************************************************************/ @@ -1459,16 +1458,16 @@ cy_en_syspm_status_t Cy_RTC_HibernateCallback(cy_stc_syspm_callback_params_t *ca * Function Name: ConstructTimeDate ****************************************************************************//** * -* Returns BCD time and BCD date in the format used in APIs from individual +* Returns BCD time and BCD date in the format used in APIs from individual * elements passed. -* Converted BCD time(*timeBcd) and BCD date(*dateBcd) are matched with RTC_TIME +* Converted BCD time(*timeBcd) and BCD date(*dateBcd) are matched with RTC_TIME * and RTC_DATE bit fields format. * -* \param timeDate +* \param timeDate * The structure of time and date, see \ref cy_stc_rtc_config_t. * * \param timeBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * RTC_TIME register:
* [0:6] - Calendar seconds in BCD, the range 0-59.
* [14:8] - Calendar minutes in BCD, the range 0-59.
@@ -1479,7 +1478,7 @@ cy_en_syspm_status_t Cy_RTC_HibernateCallback(cy_stc_syspm_callback_params_t *ca * [26:24] - A calendar day of the week, the range 1 - 7, where 1 - Sunday.
* * \param dateBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * RTC_DATE register:
* [5:0] - A calendar day of a month in BCD, the range 1-31.
* [12:8] - A calendar month in BCD, the range 1-12.
@@ -1496,9 +1495,9 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim tmpTime |= (_VAL2FLD(BACKUP_RTC_TIME_RTC_MIN, Cy_RTC_ConvertDecToBcd(timeDate->min))); /* Read the current hour mode to know how many hour bits to convert. - * In the 24-hour mode, the hour value is presented in [21:16] bits in the + * In the 24-hour mode, the hour value is presented in [21:16] bits in the * BCD format. - * In the 12-hour mode, the hour value is presented in [20:16] bits in the + * In the 12-hour mode, the hour value is presented in [20:16] bits in the * BCD format and * bit [21] is present: 0 - AM; 1 - PM. */ @@ -1512,11 +1511,11 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim else { /* Set the AM bit */ - tmpTime &= ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM); + tmpTime &= ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM); } tmpTime |= BACKUP_RTC_TIME_CTRL_12HR_Msk; - tmpTime |= - (_VAL2FLD(BACKUP_RTC_TIME_RTC_HOUR, + tmpTime |= + (_VAL2FLD(BACKUP_RTC_TIME_RTC_HOUR, (Cy_RTC_ConvertDecToBcd(timeDate->hour) & ((uint32_t) ~CY_RTC_12HRS_PM_BIT)))); } else @@ -1541,22 +1540,22 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim * Function Name: ConstructAlarmTimeDate ****************************************************************************//** * -* Returns the BCD time and BCD date in the format used in APIs from individual +* Returns the BCD time and BCD date in the format used in APIs from individual * elements passed for alarm. -* Converted BCD time(*alarmTimeBcd) and BCD date(*alarmDateBcd) should be +* Converted BCD time(*alarmTimeBcd) and BCD date(*alarmDateBcd) should be * matched with the ALMx_TIME and ALMx_DATE bit fields format. * * \param timeDate * The structure of time and date, see \ref cy_stc_rtc_alarm_t. * * \param alarmTimeBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * ALMx_TIME register time fields:
* [0:6] - Alarm seconds in BCD, the range 0-59.
* [7] - Alarm seconds Enable: 0 - ignore, 1 - match.
* [14:8] - Alarm minutes in BCD, the range 0-59.
* [15] - Alarm minutes Enable: 0 - ignore, 1 - match.
-* [21:16] - Alarm hours in BCD, value depending on the 12/24-hour mode +* [21:16] - Alarm hours in BCD, value depending on the 12/24-hour mode * (RTC_CTRL_12HR)
* 12HR: [21]:0 = AM, 1 = PM, [20:16] = 1 - 12;
* 24HR: [21:16] = the range 0-23.
@@ -1565,7 +1564,7 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim * [31] - An alarm day of the week Enable: 0 - ignore, 1 - match.
* * \param alarmDateBcd -* The BCD-formatted date variable which has the same bit masks as the +* The BCD-formatted date variable which has the same bit masks as the * ALMx_DATE register date fields:
* [5:0] - An alarm day of a month in BCD, the range 1-31.
* [7] - An alarm day of a month Enable: 0 - ignore, 1 - match.
@@ -1574,9 +1573,9 @@ static void ConstructTimeDate(cy_stc_rtc_config_t const *timeDate, uint32_t *tim * [31] - The Enable alarm: 0 - Alarm is disabled, 1 - Alarm is enabled.
* * This function reads current AHB register RTC_TIME value to know hour mode. -* It is recommended to call Cy_RTC_SyncFromRtc() function before calling the +* It is recommended to call Cy_RTC_SyncFromRtc() function before calling the * ConstructAlarmTimeDate() functions. -* +* * Construction is based on RTC_ALARM1 register bit fields. * *******************************************************************************/ @@ -1594,9 +1593,9 @@ static void ConstructAlarmTimeDate(cy_stc_rtc_alarm_t const *alarmDateTime, uint tmpAlarmTime |= (_VAL2FLD(BACKUP_ALM1_TIME_ALM_MIN_EN, alarmDateTime->minEn)); /* Read the current hour mode to know how many hour bits to convert. - * In the 24-hour mode, the hour value is presented in [21:16] bits in the + * In the 24-hour mode, the hour value is presented in [21:16] bits in the * BCD format. - * In the 12-hour mode, the hour value is presented in [20:16] bits in the + * In the 12-hour mode, the hour value is presented in [20:16] bits in the * BCD format and bit [21] is present: 0 - AM; 1 - PM */ Cy_RTC_SyncFromRtc(); @@ -1605,18 +1604,18 @@ static void ConstructAlarmTimeDate(cy_stc_rtc_alarm_t const *alarmDateTime, uint /* Convert the hour from the 24-hour mode into the 12-hour mode */ if(alarmDateTime->hour >= CY_RTC_HOURS_PER_HALF_DAY) { - /* The current hour is more than 12 in the 24-hour mode. Set the PM + /* The current hour is more than 12 in the 24-hour mode. Set the PM * bit and converting hour: hour = hour - 12 */ hourValue = (uint32_t) alarmDateTime->hour - CY_RTC_HOURS_PER_HALF_DAY; hourValue = ((0U != hourValue) ? hourValue : CY_RTC_HOURS_PER_HALF_DAY); - tmpAlarmTime |= + tmpAlarmTime |= CY_RTC_BACKUP_RTC_TIME_RTC_PM | (_VAL2FLD(BACKUP_ALM1_TIME_ALM_HOUR, Cy_RTC_ConvertDecToBcd(hourValue))); } else if(alarmDateTime->hour < 1U) { /* The current hour in the 24-hour mode is 0 which is equal to 12:00 AM */ - tmpAlarmTime = (tmpAlarmTime & ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM)) | + tmpAlarmTime = (tmpAlarmTime & ((uint32_t) ~CY_RTC_BACKUP_RTC_TIME_RTC_PM)) | (_VAL2FLD(BACKUP_ALM1_TIME_ALM_HOUR, CY_RTC_HOURS_PER_HALF_DAY)); } else @@ -1673,7 +1672,7 @@ static uint32_t RelativeToFixed(cy_stc_rtc_dst_format_t const *convertDst) /* Read the current year */ Cy_RTC_SyncFromRtc(); - currentYear = + currentYear = CY_RTC_TWO_THOUSAND_YEARS + Cy_RTC_ConvertBcdToDec(_FLD2VAL(BACKUP_RTC_DATE_RTC_YEAR, BACKUP->RTC_DATE)); currentDay = CY_RTC_FIRST_DAY_OF_MONTH; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.h index b136214e09..5f3153cd71 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/rtc/cy_rtc.h @@ -2,15 +2,13 @@ * \file cy_rtc.h * \version 2.10 * -* This file provides constants and parameter values for the APIs for the +* This file provides constants and parameter values for the APIs for the * Real-Time Clock (RTC). * ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 * *******************************************************************************/ @@ -18,13 +16,13 @@ * \defgroup group_rtc Real-Time Clock (RTC) * \{ * -* The Real-time Clock (RTC) driver provides an application interface +* The Real-time Clock (RTC) driver provides an application interface * for keeping track of time and date. * -* Use the RTC driver when the system requires the current time or date. You -* can also use the RTC when you do not need the current time and date but you +* Use the RTC driver when the system requires the current time or date. You +* can also use the RTC when you do not need the current time and date but you * do need accurate timing of events with one-second resolution. -* +* * The RTC driver provides these features:
* * Different hour format support
* * Multiple alarm function (two-alarms)
@@ -32,122 +30,122 @@ * * Automatic leap year compensation
* * Option to drive the RTC by an external 50 Hz or 60 Hz clock source * -* The RTC driver provides access to the HW real-time clock. The HW RTC is -* located in the Backup domain. You need to choose the clock source for the -* Backup domain using the Cy_SysClk_ClkBakSetSource() function. If the clock -* for the Backup domain is set and enabled, the RTC automatically +* The RTC driver provides access to the HW real-time clock. The HW RTC is +* located in the Backup domain. You need to choose the clock source for the +* Backup domain using the Cy_SysClk_ClkBakSetSource() function. If the clock +* for the Backup domain is set and enabled, the RTC automatically * starts counting. * -* The RTC driver keeps track of second, minute, hour, day of the week, day of +* The RTC driver keeps track of second, minute, hour, day of the week, day of * the month, month, and year. * -* DST may be enabled and supports any start and end date. The start and end -* dates can be a fixed date (like 24 March) or a relative date (like the +* DST may be enabled and supports any start and end date. The start and end +* dates can be a fixed date (like 24 March) or a relative date (like the * second Sunday in March). * -* The RTC has two alarms that you can configure to generate an interrupt. +* The RTC has two alarms that you can configure to generate an interrupt. * You specify the match value for the time when you want the alarm to occur. -* Your interrupt handler then handles the response. The alarm flexibility -* supports periodic alarms (such as every minute), or a single alarm +* Your interrupt handler then handles the response. The alarm flexibility +* supports periodic alarms (such as every minute), or a single alarm * (13:45 on 28 September, 2043). * * Clock Source
* The Backup domain can be driven by:
* * Watch-crystal oscillator (WCO). This is a high-accuracy oscillator that is -* suitable for RTC applications and requires a 32.768 kHz external crystal -* populated on the application board. The WCO can be supplied by vddbak and +* suitable for RTC applications and requires a 32.768 kHz external crystal +* populated on the application board. The WCO can be supplied by vddbak and * therefore can run without vddd/vccd present. This can be used to wake the chip * from Hibernate mode. * -* * The Internal Low-speed Oscillator (ILO) routed from Clk_LF or directly -* (as alternate backup domain clock source). Depending on the device power -* mode the alternate backup domain clock source is set. For example, for +* * The Internal Low-speed Oscillator (ILO) routed from Clk_LF or directly +* (as alternate backup domain clock source). Depending on the device power +* mode the alternate backup domain clock source is set. For example, for * DeepSleep mode the ILO is routed through Clk_LF. But for Hibernate * power mode the ILO is set directly. Note that, the ILO should be configured to * work in the Hibernate mode. For more info refer to the \ref group_sysclk * driver. The ILO is a low-accuracy RC-oscillator that does not require -* any external elements on the board. Its poor accuracy (+/- 30%) means it is +* any external elements on the board. Its poor accuracy (+/- 30%) means it is * less useful for the RTC. However, current can be supplied by an internal * power supply (Vback) and therefore it can run without Vddd/Vccd present. -* This also can be used to wake the chip from Hibernate mode using RTC alarm +* This also can be used to wake the chip from Hibernate mode using RTC alarm * interrupt. For more details refer to Power Modes (syspm) driver description. * -* * The Precision Internal Low-speed Oscillator (PILO), routed from Clk_LF +* * The Precision Internal Low-speed Oscillator (PILO), routed from Clk_LF * (alternate backup domain clock source). This is an RC-oscillator (ILO) that -* can achieve accuracy of +/- 2% with periodic calibration. It is not expected -* to be accurate enough for good RTC capability. The PILO requires -* Vddd/Vccd present. It can be used in modes down to DeepSleep, but ceases to +* can achieve accuracy of +/- 2% with periodic calibration. It is not expected +* to be accurate enough for good RTC capability. The PILO requires +* Vddd/Vccd present. It can be used in modes down to DeepSleep, but ceases to * function in Hibernate mode. * -* * External 50 Hz or 60 Hz sine-wave clock source or 32.768kHz square clock +* * External 50 Hz or 60 Hz sine-wave clock source or 32.768kHz square clock * source. -* For example, the wall AC frequency can be the clock source. Such a clock +* For example, the wall AC frequency can be the clock source. Such a clock * source can be used if the external 32.768 kHz WCO is absent from the board. -* For more details, refer to the Cy_RTC_SelectFrequencyPrescaler() function +* For more details, refer to the Cy_RTC_SelectFrequencyPrescaler() function * description. * -* The WCO is the recommended clock source for the RTC, if it is present -* in design. For setting the Backup domain clock source, refer to the +* The WCO is the recommended clock source for the RTC, if it is present +* in design. For setting the Backup domain clock source, refer to the * \ref group_sysclk driver. * -* \note If the WCO is enabled, it should source the Backup domain directly. -* Do not route the WCO through the Clk_LF. This is because Clk_LF is not +* \note If the WCO is enabled, it should source the Backup domain directly. +* Do not route the WCO through the Clk_LF. This is because Clk_LF is not * available in all low-power modes. * * \section group_rtc_section_configuration Configuration Considerations * -* Before RTC set up, ensure that the Backup domain is clocked with the desired +* Before RTC set up, ensure that the Backup domain is clocked with the desired * clock source. * -* To set up an RTC, provide the configuration parameters in the -* cy_stc_rtc_config_t structure. Then call Cy_RTC_Init(). You can also set the -* date and time at runtime. Call Cy_RTC_SetDateAndTime() using the filled -* cy_stc_rtc_config_t structure, or call Cy_RTC_SetDateAndTimeDirect() with -* valid time and date values. +* To set up an RTC, provide the configuration parameters in the +* cy_stc_rtc_config_t structure. Then call Cy_RTC_Init(). You can also set the +* date and time at runtime. Call Cy_RTC_SetDateAndTime() using the filled +* cy_stc_rtc_config_t structure, or call Cy_RTC_SetDateAndTimeDirect() with +* valid time and date values. * * RTC Interrupt Handling
-* The RTC driver provides three interrupt handler functions: -* Cy_RTC_Alarm1Interrupt(), Cy_RTC_Alarm2Interrupt(), and -* Cy_RTC_CenturyInterrupt(). All three functions are blank functions with +* The RTC driver provides three interrupt handler functions: +* Cy_RTC_Alarm1Interrupt(), Cy_RTC_Alarm2Interrupt(), and +* Cy_RTC_CenturyInterrupt(). All three functions are blank functions with * the WEAK attribute. For any interrupt you use, redefine the interrupt handler * in your source code. * -* When an interrupt occurs, call the Cy_RTC_Interrupt() function. The RTC -* hardware provides a single interrupt line to the NVIC for the three RTC -* interrupts. This function checks the interrupt register to determine which -* interrupt (out of the three) was generated. It then calls the +* When an interrupt occurs, call the Cy_RTC_Interrupt() function. The RTC +* hardware provides a single interrupt line to the NVIC for the three RTC +* interrupts. This function checks the interrupt register to determine which +* interrupt (out of the three) was generated. It then calls the * appropriate handler. * -* \warning The Cy_RTC_Alarm2Interrupt() is not called if the DST feature is -* enabled. If DST is enabled, the Cy_RTC_Interrupt() function redirects that +* \warning The Cy_RTC_Alarm2Interrupt() is not called if the DST feature is +* enabled. If DST is enabled, the Cy_RTC_Interrupt() function redirects that * interrupt to manage daylight savings time using Cy_RTC_DstInterrupt(). -* In general, the RTC interrupt handler function the Cy_RTC_DstInterrupt() +* In general, the RTC interrupt handler function the Cy_RTC_DstInterrupt() * function is called instead of Cy_RTC_Alarm2Interrupt(). * * For RTC interrupt handling, the user should:
-* 1) Implement strong interrupt handling function(s) for the required events -* (see above). If DST is enabled, then Alarm2 is not available. The DST handler +* 1) Implement strong interrupt handling function(s) for the required events +* (see above). If DST is enabled, then Alarm2 is not available. The DST handler * is built into the PDL.
-* 2) Implement an RTC interrupt handler and call Cy_RTC_Interrupt() +* 2) Implement an RTC interrupt handler and call Cy_RTC_Interrupt() * from there
* 3) Configure the RTC interrupt:
-* a) Set the mask for RTC required interrupt using +* a) Set the mask for RTC required interrupt using * Cy_RTC_SetInterruptMask()
-* b) Initialize the RTC interrupt by setting priority and the RTC interrupt +* b) Initialize the RTC interrupt by setting priority and the RTC interrupt * vector using the Cy_SysInt_Init() function
* c) Enable the RTC interrupt using the CMSIS core function NVIC_EnableIRQ(). * * Alarm functionality
-* To set up an alarm, enable the required RTC interrupt. Then provide the -* configuration parameters in the cy_stc_rtc_alarm_t structure. You enable -* any item you want matched, and provide a match value. You disable any other. -* You do not need to set match values for disabled elements, as they are -* ignored. -* \note The alarm itself must be enabled in this structure. When a match +* To set up an alarm, enable the required RTC interrupt. Then provide the +* configuration parameters in the cy_stc_rtc_alarm_t structure. You enable +* any item you want matched, and provide a match value. You disable any other. +* You do not need to set match values for disabled elements, as they are +* ignored. +* \note The alarm itself must be enabled in this structure. When a match * occurs, the alarm is triggered and your interrupt handler is called. * -* An example is the best way to explain how this works. If you want an alarm -* on every hour, then in the cy_stc_rtc_alarm_t structure, you provide +* An example is the best way to explain how this works. If you want an alarm +* on every hour, then in the cy_stc_rtc_alarm_t structure, you provide * these values: * * Alarm_1.sec = 0u
@@ -159,42 +157,42 @@ * Alarm_1.dateEn = CY_RTC_ALARM_DISABLE
* Alarm_1.monthEn = CY_RTC_ALARM_DISABLE
* Alarm_1.almEn = CY_RTC_ALARM_ENABLE
-* -* With this setup, every time both the second and minute are zero, Alarm1 is -* asserted. That happens once per hour. Note that, counterintuitively, to have -* an alarm every hour, Alarm_1.hourEn is disabled. This is disabled because +* +* With this setup, every time both the second and minute are zero, Alarm1 is +* asserted. That happens once per hour. Note that, counterintuitively, to have +* an alarm every hour, Alarm_1.hourEn is disabled. This is disabled because * for an hourly alarm you do not match the value of the hour. * -* After cy_stc_rtc_alarm_t structure is filled, call the -* Cy_RTC_SetAlarmDateAndTime(). The alarm can also be set without using the -* cy_stc_rtc_alarm_t structure. Call Cy_RTC_SetAlarmDateAndTimeDirect() with +* After cy_stc_rtc_alarm_t structure is filled, call the +* Cy_RTC_SetAlarmDateAndTime(). The alarm can also be set without using the +* cy_stc_rtc_alarm_t structure. Call Cy_RTC_SetAlarmDateAndTimeDirect() with * valid values. * * The DST Feature
-* The DST feature is managed by the PDL using the RTC Alarm2 interrupt. -* Therefore, you cannot have both DST enabled and use the Alarm2 interrupt. +* The DST feature is managed by the PDL using the RTC Alarm2 interrupt. +* Therefore, you cannot have both DST enabled and use the Alarm2 interrupt. * * To set up the DST, route the RTC interrupt to NVIC:
-* 1) Initialize the RTC interrupt by setting priority and the RTC interrupt +* 1) Initialize the RTC interrupt by setting priority and the RTC interrupt * vector using Cy_SysInt_Init()
* 2) Enable the RTC interrupt using the CMSIS core function NVIC_EnableIRQ(). -* -* After this, provide the configuration parameters in the -* cy_stc_rtc_dst_t structure. This structure consists of two -* cy_stc_rtc_dst_format_t structures, one for DST Start time and one for +* +* After this, provide the configuration parameters in the +* cy_stc_rtc_dst_t structure. This structure consists of two +* cy_stc_rtc_dst_format_t structures, one for DST Start time and one for * DST Stop time. You also specify whether these times are absolute or relative. -* -* After the cy_stc_rtc_dst_t structure is filled, call Cy_RTC_EnableDstTime() +* +* After the cy_stc_rtc_dst_t structure is filled, call Cy_RTC_EnableDstTime() * * \section group_rtc_lp Low Power Support -* The RTC provides the callback functions to facilitate -* the low-power mode transition. The callback -* \ref Cy_RTC_DeepSleepCallback must be called during execution -* of \ref Cy_SysPm_DeepSleep; \ref Cy_RTC_HibernateCallback must be -* called during execution of \ref Cy_SysPm_Hibernate. -* To trigger the callback execution, the callback must be registered -* before calling the mode transition function. -* Refer to \ref group_syspm driver for more +* The RTC provides the callback functions to facilitate +* the low-power mode transition. The callback +* \ref Cy_RTC_DeepSleepCallback must be called during execution +* of \ref Cy_SysPm_DeepSleep; \ref Cy_RTC_HibernateCallback must be +* called during execution of \ref Cy_SysPm_Hibernate. +* To trigger the callback execution, the callback must be registered +* before calling the mode transition function. +* Refer to \ref group_syspm driver for more * information about low-power mode transitions. * * \section group_rtc_section_more_information More Information @@ -216,14 +214,14 @@ * The object addressed by the pointer parameter '%s' is not modified and * so the pointer could be of type 'pointer to const'. * -* The pointer parameter is not used or modified, as there is no need -* to do any actions with it. However, such parameter is -* required to be presented in the function, because the -* \ref Cy_RTC_DeepSleepCallback and \ref Cy_RTC_HibernateCallback are +* The pointer parameter is not used or modified, as there is no need +* to do any actions with it. However, such parameter is +* required to be presented in the function, because the +* \ref Cy_RTC_DeepSleepCallback and \ref Cy_RTC_HibernateCallback are * callbacks of \ref cy_en_syspm_status_t type. -* The SysPm driver callback function type requires implementing the +* The SysPm driver callback function type requires implementing the * function with the next parameter and return value:
-* cy_en_syspm_status_t (*Cy_SysPmCallback) +* cy_en_syspm_status_t (*Cy_SysPmCallback) * (cy_stc_syspm_callback_params_t *callbackParams); * * @@ -238,9 +236,9 @@ * function
* Corrected internal macro
* Documentation updates -* Incorrect behavior of \ref Cy_RTC_SetDateAndTimeDirect() and +* Incorrect behavior of \ref Cy_RTC_SetDateAndTimeDirect() and * \ref Cy_RTC_SetNextDstTime() work in debug mode
-* Debug assert correction in \ref Cy_RTC_ConvertDayOfWeek, +* Debug assert correction in \ref Cy_RTC_ConvertDayOfWeek, * \ref Cy_RTC_IsLeapYear, \ref Cy_RTC_DaysInMonth * * @@ -249,7 +247,7 @@ * * Added input parameter(s) validation to all public functions.
* * Removed "Cy_RTC_" prefixes from the internal functions names.
* * Renamed the elements in the cy_stc_rtc_alarm structure.
-* * Changed the type of elements with limited set of values, from +* * Changed the type of elements with limited set of values, from * uint32_t to enumeration. * * @@ -344,28 +342,28 @@ typedef enum cy_en_rtc_alarm } cy_en_rtc_alarm_t; /** This enumeration is used to set/get hours format */ -typedef enum +typedef enum { CY_RTC_24_HOURS, /**< The 24 hour format */ CY_RTC_12_HOURS /**< The 12 hour (AM/PM) format */ } cy_en_rtc_hours_format_t; /** Enumeration to configure the RTC Write register */ -typedef enum +typedef enum { CY_RTC_WRITE_DISABLED, /**< Writing the RTC is disabled */ CY_RTC_WRITE_ENABLED /**< Writing the RTC is enabled */ } cy_en_rtc_write_status_t; /** Enumeration used to set/get DST format */ -typedef enum +typedef enum { CY_RTC_DST_RELATIVE, /**< Relative DST format */ CY_RTC_DST_FIXED /**< Fixed DST format */ } cy_en_rtc_dst_format_t; /** Enumeration to indicate the AM/PM period of day */ -typedef enum +typedef enum { CY_RTC_AM, /**< AM period of day */ CY_RTC_PM /**< PM period of day */ @@ -390,7 +388,7 @@ typedef enum */ /** -* This is the data structure that is used to configure the rtc time +* This is the data structure that is used to configure the rtc time * and date values. */ typedef struct cy_stc_rtc_config @@ -399,14 +397,14 @@ typedef struct cy_stc_rtc_config uint32_t sec; /**< Seconds value, range [0-59] */ uint32_t min; /**< Minutes value, range [0-59] */ uint32_t hour; /**< Hour, range depends on hrFormat, if hrFormat = CY_RTC_24_HOURS, range [0-23]; - If hrFormat = CY_RTC_12_HOURS, range [1-12] and appropriate AM/PM day + If hrFormat = CY_RTC_12_HOURS, range [1-12] and appropriate AM/PM day period should be set (amPm) */ cy_en_rtc_am_pm_t amPm; /**< AM/PM hour period, see \ref cy_en_rtc_am_pm_t. - This element is actual when hrFormat = CY_RTC_12_HOURS. The firmware + This element is actual when hrFormat = CY_RTC_12_HOURS. The firmware ignores this element if hrFormat = CY_RTC_24_HOURS */ cy_en_rtc_hours_format_t hrFormat; /**< Hours format, see \ref cy_en_rtc_hours_format_t */ uint32_t dayOfWeek; /**< Day of the week, range [1-7], see \ref group_rtc_day_of_the_week */ - + /* Date information */ uint32_t date; /**< Date of month, range [1-31] */ uint32_t month; /**< Month, range [1-12]. See \ref group_rtc_month */ @@ -417,34 +415,34 @@ typedef struct cy_stc_rtc_config typedef struct cy_stc_rtc_alarm { /* Alarm time information */ - uint32_t sec; /**< Alarm seconds, range [0-59]. - The appropriate ALARMX interrupt is be asserted on matching with this + uint32_t sec; /**< Alarm seconds, range [0-59]. + The appropriate ALARMX interrupt is be asserted on matching with this value if secEn is previous enabled (secEn = 1) */ cy_en_rtc_alarm_enable_t secEn; /**< Enable alarm on seconds matching, see \ref cy_en_rtc_alarm_enable_t. */ - uint32_t min; /**< Alarm minutes, range [0-59]. + uint32_t min; /**< Alarm minutes, range [0-59]. The appropriate ALARMX interrupt is be asserted on matching with this value if minEn is previous enabled (minEn = 1) */ cy_en_rtc_alarm_enable_t minEn; /**< Enable alarm on minutes matching, see \ref cy_en_rtc_alarm_enable_t. */ uint32_t hour; /**< Alarm hours, range [0-23] - The appropriate ALARMX interrupt is be asserted on matching with this + The appropriate ALARMX interrupt is be asserted on matching with this value if hourEn is previous enabled (hourEn = 1) */ cy_en_rtc_alarm_enable_t hourEn; /**< Enable alarm on hours matching, see \ref cy_en_rtc_alarm_enable_t. */ uint32_t dayOfWeek; /**< Alarm day of the week, range [1-7] The appropriate ALARMX interrupt is be asserted on matching with this value if dayOfWeek is previous enabled (dayOfWeekEn = 1) */ - cy_en_rtc_alarm_enable_t dayOfWeekEn; /**< Enable alarm on day of the week matching, + cy_en_rtc_alarm_enable_t dayOfWeekEn; /**< Enable alarm on day of the week matching, see \ref cy_en_rtc_alarm_enable_t */ /* Alarm date information */ - uint32_t date; /**< Alarm date, range [1-31]. - The appropriate ALARMX interrupt is be asserted on matching with this + uint32_t date; /**< Alarm date, range [1-31]. + The appropriate ALARMX interrupt is be asserted on matching with this value if dateEn is previous enabled (dateEn = 1) */ cy_en_rtc_alarm_enable_t dateEn; /**< Enable alarm on date matching, see \ref cy_en_rtc_alarm_enable_t. */ - uint32_t month; /**< Alarm Month, range [1-12]. + uint32_t month; /**< Alarm Month, range [1-12]. The appropriate ALARMX interrupt is be asserted on matching with this value if dateEn is previous enabled (dateEn = 1) */ cy_en_rtc_alarm_enable_t monthEn; /**< Enable alarm on month matching, see \ref cy_en_rtc_alarm_enable_t. */ @@ -461,21 +459,21 @@ typedef struct cy_stc_rtc_alarm */ typedef struct { - cy_en_rtc_dst_format_t format; /**< DST format. See /ref cy_en_rtc_dst_format_t. + cy_en_rtc_dst_format_t format; /**< DST format. See /ref cy_en_rtc_dst_format_t. Based on this value other structure elements should be filled or could be ignored */ uint32_t hour; /**< Should be filled for both format types. Hour is always presented in 24hour format, range[0-23] */ - uint32_t dayOfMonth; /**< Day of Month, range[1-31]. This element should be filled if + uint32_t dayOfMonth; /**< Day of Month, range[1-31]. This element should be filled if format = CY_RTC_DST_FIXED. Firmware calculates this value in condition that format = CY_RTC_DST_RELATIVE is selected */ - uint32_t weekOfMonth; /**< Week of month, range[1-6]. This element should be filled if + uint32_t weekOfMonth; /**< Week of month, range[1-6]. This element should be filled if format = CY_RTC_DST_RELATIVE. - Firmware calculates dayOfMonth value based on weekOfMonth + Firmware calculates dayOfMonth value based on weekOfMonth and dayOfWeek values */ - uint32_t dayOfWeek; /**< Day of the week, this element should be filled in condition that - format = CY_RTC_DST_RELATIVE. Range[1- 7], - see \ref group_rtc_day_of_the_week. Firmware calculates dayOfMonth value + uint32_t dayOfWeek; /**< Day of the week, this element should be filled in condition that + format = CY_RTC_DST_RELATIVE. Range[1- 7], + see \ref group_rtc_day_of_the_week. Firmware calculates dayOfMonth value based on dayOfWeek and weekOfMonth values */ uint32_t month; /**< Month value, range[1-12], see \ref group_rtc_month. This value should be filled for both format types */ @@ -507,7 +505,7 @@ typedef struct cy_en_rtc_status_t Cy_RTC_Init(cy_stc_rtc_config_t const *config); cy_en_rtc_status_t Cy_RTC_SetDateAndTime(cy_stc_rtc_config_t const *dateTime); void Cy_RTC_GetDateAndTime(cy_stc_rtc_config_t *dateTime); -cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, +cy_en_rtc_status_t Cy_RTC_SetDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, uint32_t date, uint32_t month, uint32_t year); cy_en_rtc_status_t Cy_RTC_SetHoursFormat(cy_en_rtc_hours_format_t hoursFormat); void Cy_RTC_SelectFrequencyPrescaler(cy_en_rtc_clock_freq_t clkSel); @@ -519,7 +517,7 @@ void Cy_RTC_SelectFrequencyPrescaler(cy_en_rtc_clock_freq_t clkSel); */ cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTime(cy_stc_rtc_alarm_t const *alarmDateTime, cy_en_rtc_alarm_t alarmIndex); void Cy_RTC_GetAlarmDateAndTime(cy_stc_rtc_alarm_t *alarmDateTime, cy_en_rtc_alarm_t alarmIndex); -cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, +cy_en_rtc_status_t Cy_RTC_SetAlarmDateAndTimeDirect(uint32_t sec, uint32_t min, uint32_t hour, uint32_t date, uint32_t month, cy_en_rtc_alarm_t alarmIndex); /** \} group_rtc_alarm_functions */ @@ -673,7 +671,7 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbAlarm(uint32_t alarmTimeBcd, uint32_t al /** * \defgroup group_rtc_busy_status RTC Status definitions * \{ -* Definitions for indicating the RTC BUSY bit +* Definitions for indicating the RTC BUSY bit */ #define CY_RTC_BUSY (1UL) /**< RTC Busy bit is set, RTC is pending */ #define CY_RTC_AVAILABLE (0UL) /**< RTC Busy bit is cleared, RTC is available */ @@ -793,7 +791,7 @@ extern uint8_t const cy_RTC_daysInMonthTbl[CY_RTC_MONTHS_PER_YEAR]; /* Internal macro to validate RTC day of the week parameter */ #define CY_RTC_IS_DOW_VALID(dayOfWeek) (((dayOfWeek) > 0U) && ((dayOfWeek) <= CY_RTC_DAYS_PER_WEEK)) - + /* Internal macro to validate RTC day parameter */ #define CY_RTC_IS_DAY_VALID(day) (((day) > 0U) && ((day) <= CY_RTC_MAX_DAYS_IN_MONTH)) @@ -831,9 +829,9 @@ extern uint8_t const cy_RTC_daysInMonthTbl[CY_RTC_MONTHS_PER_YEAR]; * * Returns a day of the week for a year, month, and day of month that are passed * through parameters. Zeller's congruence is used to calculate the day of -* the week. -* RTC HW block does not provide the converting function for day of week. This -* function should be called before Cy_RTC_SetDateAndTime() to get the day of +* the week. +* RTC HW block does not provide the converting function for day of week. This +* function should be called before Cy_RTC_SetDateAndTime() to get the day of * week. * * For the Georgian calendar, Zeller's congruence is: @@ -868,7 +866,7 @@ __STATIC_INLINE uint32_t Cy_RTC_ConvertDayOfWeek(uint32_t day, uint32_t month, u CY_ASSERT_L3(CY_RTC_IS_DAY_VALID(day)); CY_ASSERT_L3(CY_RTC_IS_MONTH_VALID(month)); CY_ASSERT_L3(CY_RTC_IS_YEAR_LONG_VALID(year)); - + /* Converts month number from regular convention * (1=January,..., 12=December) to convention required for this * algorithm (January and February are counted as months 13 and 14 of @@ -881,7 +879,7 @@ __STATIC_INLINE uint32_t Cy_RTC_ConvertDayOfWeek(uint32_t day, uint32_t month, u } /* Calculates Day of Week using Zeller's congruence algorithms */ - retVal = + retVal = (day + (((month + 1UL) * 26UL) / 10UL) + year + (year / 4UL) + (6UL * (year / 100UL)) + (year / 400UL)) % 7UL; /* Makes correction for Saturday. Saturday number should be 7 instead of 0*/ @@ -901,9 +899,9 @@ __STATIC_INLINE uint32_t Cy_RTC_ConvertDayOfWeek(uint32_t day, uint32_t month, u * Checks whether the year passed through the parameter is leap or not. * * This API is for checking an invalid value input for leap year. -* RTC HW block does not provide a validation checker against time/date values, +* RTC HW block does not provide a validation checker against time/date values, * the valid range of days in Month should be checked before SetDateAndTime() -* function call. Leap year is identified as a year that is a multiple of 4 +* function call. Leap year is identified as a year that is a multiple of 4 * or 400 but not 100. * * \param year The year to be checked. Valid range - 2000...2100. @@ -926,7 +924,7 @@ __STATIC_INLINE bool Cy_RTC_IsLeapYear(uint32_t year) * * Returns a number of days in a month passed through the parameters. This API * is for checking an invalid value input for days. -* RTC HW block does not provide a validation checker against time/date values, +* RTC HW block does not provide a validation checker against time/date values, * the valid range of days in Month should be checked before SetDateAndTime() * function call. * @@ -961,11 +959,11 @@ __STATIC_INLINE uint32_t Cy_RTC_DaysInMonth(uint32_t month, uint32_t year) * Function Name: Cy_RTC_SyncFromRtc ****************************************************************************//** * -* The Synchronizer updates RTC values into AHB RTC user registers from the -* actual RTC. By calling this function, the actual RTC register values is +* The Synchronizer updates RTC values into AHB RTC user registers from the +* actual RTC. By calling this function, the actual RTC register values is * copied to AHB user registers. * -* \note Only after calling Cy_RTC_SyncFromRtc(), the RTC time values can be +* \note Only after calling Cy_RTC_SyncFromRtc(), the RTC time values can be * read. * After Cy_RTC_SyncFromRtc() calling the snapshot of the actual RTC registers * are copied to the user registers. Meanwhile the RTC continues to clock. @@ -974,10 +972,10 @@ __STATIC_INLINE uint32_t Cy_RTC_DaysInMonth(uint32_t month, uint32_t year) __STATIC_INLINE void Cy_RTC_SyncFromRtc(void) { uint32_t interruptState; - - interruptState = Cy_SysLib_EnterCriticalSection(); - - /* RTC Write is possible only in the condition that CY_RTC_BUSY bit = 0 + + interruptState = Cy_SysLib_EnterCriticalSection(); + + /* RTC Write is possible only in the condition that CY_RTC_BUSY bit = 0 * or RTC Write bit is not set. */ if((CY_RTC_BUSY != Cy_RTC_GetSyncStatus()) && (!_FLD2BOOL(BACKUP_RTC_RW_WRITE, BACKUP->RTC_RW))) @@ -999,12 +997,12 @@ __STATIC_INLINE void Cy_RTC_SyncFromRtc(void) * Function Name: Cy_RTC_WriteEnable ****************************************************************************//** * -* Set/Clear writeable option for RTC user registers. When the Write bit is set, -* data can be written into the RTC user registers. After all the RTC writes are +* Set/Clear writeable option for RTC user registers. When the Write bit is set, +* data can be written into the RTC user registers. After all the RTC writes are * done, the firmware must clear (call Cy_RTC_WriteEnable(RTC_WRITE_DISABLED)) -* the Write bit for the RTC update to take effect. +* the Write bit for the RTC update to take effect. * -* Set/Clear cannot be done if the RTC is still busy with a previous update +* Set/Clear cannot be done if the RTC is still busy with a previous update * (CY_RTC_BUSY = 1) or RTC Reading is executing. * * \param writeEnable write status, see \ref cy_en_rtc_write_status_t. @@ -1022,7 +1020,7 @@ __STATIC_INLINE cy_en_rtc_status_t Cy_RTC_WriteEnable(cy_en_rtc_write_status_t w if(writeEnable == CY_RTC_WRITE_ENABLED) { - /* RTC Write bit set is possible only in condition that CY_RTC_BUSY bit = 0 + /* RTC Write bit set is possible only in condition that CY_RTC_BUSY bit = 0 * or RTC Read bit is not set */ if((CY_RTC_BUSY != Cy_RTC_GetSyncStatus()) && (!_FLD2BOOL(BACKUP_RTC_RW_READ, BACKUP->RTC_RW))) @@ -1050,8 +1048,8 @@ __STATIC_INLINE cy_en_rtc_status_t Cy_RTC_WriteEnable(cy_en_rtc_write_status_t w ****************************************************************************//** * * Return current status of CY_RTC_BUSY. The status indicates -* synchronization between the RTC user register and the actual RTC register. -* CY_RTC_BUSY bit is set if it is synchronizing. It is not possible to set +* synchronization between the RTC user register and the actual RTC register. +* CY_RTC_BUSY bit is set if it is synchronizing. It is not possible to set * the Read or Write bit until CY_RTC_BUSY clears. * * \return @@ -1060,7 +1058,7 @@ __STATIC_INLINE cy_en_rtc_status_t Cy_RTC_WriteEnable(cy_en_rtc_write_status_t w * *******************************************************************************/ __STATIC_INLINE uint32_t Cy_RTC_GetSyncStatus(void) -{ +{ return((_FLD2BOOL(BACKUP_STATUS_RTC_BUSY, BACKUP->STATUS)) ? CY_RTC_BUSY : CY_RTC_AVAILABLE); } @@ -1079,7 +1077,7 @@ __STATIC_INLINE uint32_t Cy_RTC_GetSyncStatus(void) * \return * decNum An 8-bit hexadecimal equivalent number of the BCD number. * -* For example, for 0x11223344 BCD number, the function returns +* For example, for 0x11223344 BCD number, the function returns * 0x2C in hexadecimal format. * *******************************************************************************/ @@ -1087,8 +1085,8 @@ __STATIC_INLINE uint32_t Cy_RTC_ConvertBcdToDec(uint32_t bcdNum) { uint32_t retVal; - retVal = - ((bcdNum & (CY_RTC_BCD_ONE_DIGIT_MASK << CY_RTC_BCD_NUMBER_SIZE)) + retVal = + ((bcdNum & (CY_RTC_BCD_ONE_DIGIT_MASK << CY_RTC_BCD_NUMBER_SIZE)) >> CY_RTC_BCD_NUMBER_SIZE ) * CY_RTC_BCD_DOZED_DEGREE; retVal += bcdNum & CY_RTC_BCD_ONE_DIGIT_MASK; @@ -1105,14 +1103,14 @@ __STATIC_INLINE uint32_t Cy_RTC_ConvertBcdToDec(uint32_t bcdNum) * is converted individually and returned as an individual byte in the 32-bit * variable. * -* \param +* \param * decNum An 8-bit hexadecimal number. Each byte is represented in hex. * 0x11223344 -> 0x20 hex format. * * \return * bcdNum - An 8-bit BCD equivalent of the passed hexadecimal number. * -* For example, for 0x11223344 hexadecimal number, the function returns +* For example, for 0x11223344 hexadecimal number, the function returns * 0x20 BCD number. * *******************************************************************************/ @@ -1159,8 +1157,8 @@ __STATIC_INLINE cy_en_rtc_hours_format_t Cy_RTC_GetHoursFormat(void) * True if the reset reason is the power cycle and the XRES (external reset)
* False if the reset reason is other than power cycle and the XRES. * -* \note Based on a return value the RTC time and date can be updated or skipped -* after the device reset. For example, you should skip the +* \note Based on a return value the RTC time and date can be updated or skipped +* after the device reset. For example, you should skip the * Cy_RTC_SetAlarmDateAndTime() call function if internal WDT reset occurs. * *******************************************************************************/ @@ -1174,11 +1172,11 @@ __STATIC_INLINE bool Cy_RTC_IsExternalResetOccurred(void) * Function Name: Cy_RTC_SyncToRtcAhbDateAndTime ****************************************************************************//** * -* This function updates new time and date into the time and date RTC AHB +* This function updates new time and date into the time and date RTC AHB * registers. * * \param timeBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * RTC_TIME register:
* [0:6] - Calendar seconds in BCD, the range 0-59.
* [14:8] - Calendar minutes in BCD, the range 0-59.
@@ -1189,7 +1187,7 @@ __STATIC_INLINE bool Cy_RTC_IsExternalResetOccurred(void) * [26:24] - A calendar day of the week, the range 1 - 7, where 1 - Sunday.
* * \param dateBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * RTC_DATE register:
* [5:0] - A calendar day of a month in BCD, the range 1-31.
* [12:8] - A calendar month in BCD, the range 1-12.
@@ -1197,15 +1195,15 @@ __STATIC_INLINE bool Cy_RTC_IsExternalResetOccurred(void) * * \note Ensure that the parameters are presented in the BCD format. Use the * ConstructTimeDate() function to construct BCD time and date values. -* Refer to ConstructTimeDate() function description for more details -* about the RTC_TIME and RTC_DATE bit fields format. +* Refer to ConstructTimeDate() function description for more details +* about the RTC_TIME and RTC_DATE bit fields format. * * The RTC AHB registers can be updated only under condition that the -* Write bit is set and the RTC busy bit is cleared (RTC_BUSY = 0). Call the +* Write bit is set and the RTC busy bit is cleared (RTC_BUSY = 0). Call the * Cy_RTC_WriteEnable(CY_RTC_WRITE_ENABLED) and ensure that Cy_RTC_WriteEnable() * returned CY_RTC_SUCCESS. Then you can call Cy_RTC_SyncToRtcAhbDateAndTime(). -* Do not forget to clear the RTC Write bit to finish an RTC register update by -* calling Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED) after you executed +* Do not forget to clear the RTC Write bit to finish an RTC register update by +* calling Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED) after you executed * Cy_RTC_SyncToRtcAhbDateAndTime(). Ensure that Cy_RTC_WriteEnable() * retuned CY_RTC_SUCCESS. * @@ -1221,17 +1219,17 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbDateAndTime(uint32_t timeBcd, uint32_t d * Function Name: Cy_RTC_SyncToRtcAhbAlarm ****************************************************************************//** * -* This function updates new alarm time and date into the alarm tire and date +* This function updates new alarm time and date into the alarm tire and date * RTC AHB registers. * * \param alarmTimeBcd -* The BCD-formatted time variable which has the same bit masks as the +* The BCD-formatted time variable which has the same bit masks as the * ALMx_TIME register time fields:
* [0:6] - Alarm seconds in BCD, the range 0-59.
* [7] - Alarm seconds Enable: 0 - ignore, 1 - match.
* [14:8] - Alarm minutes in BCD, the range 0-59.
* [15] - Alarm minutes Enable: 0 - ignore, 1 - match.
-* [21:16] - Alarm hours in BCD, value depending on the 12/24-hour mode +* [21:16] - Alarm hours in BCD, value depending on the 12/24-hour mode * (RTC_CTRL_12HR)
* 12HR: [21]:0 = AM, 1 = PM, [20:16] = 1 - 12;
* 24HR: [21:16] = the range 0-23.
@@ -1240,7 +1238,7 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbDateAndTime(uint32_t timeBcd, uint32_t d * [31] - An alarm day of the week Enable: 0 - ignore, 1 - match.
* * \param alarmDateBcd -* The BCD-formatted date variable which has the same bit masks as the +* The BCD-formatted date variable which has the same bit masks as the * ALMx_DATE register date fields:
* [5:0] - An alarm day of a month in BCD, the range 1-31.
* [7] - An alarm day of a month Enable: 0 - ignore, 1 - match.
@@ -1251,17 +1249,17 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbDateAndTime(uint32_t timeBcd, uint32_t d * \param alarmIndex * The alarm index to be configured, see \ref cy_en_rtc_alarm_t. * -* \note Ensure that the parameters are presented in the BCD format. Use the +* \note Ensure that the parameters are presented in the BCD format. Use the * ConstructTimeDate() function to construct BCD time and date values. -* Refer to ConstructTimeDate() function description for more details -* about the RTC ALMx_TIME and ALMx_DATE bit-fields format. +* Refer to ConstructTimeDate() function description for more details +* about the RTC ALMx_TIME and ALMx_DATE bit-fields format. * * The RTC AHB registers can be updated only under condition that the -* Write bit is set and the RTC busy bit is cleared (RTC_BUSY = 0). Call the +* Write bit is set and the RTC busy bit is cleared (RTC_BUSY = 0). Call the * Cy_RTC_WriteEnable(CY_RTC_WRITE_ENABLED) and ensure that Cy_RTC_WriteEnable() * returned CY_RTC_SUCCESS. Then you can call Cy_RTC_SyncToRtcAhbDateAndTime(). -* Do not forget to clear the RTC Write bit to finish an RTC register update by -* calling the Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED) after you executed +* Do not forget to clear the RTC Write bit to finish an RTC register update by +* calling the Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED) after you executed * Cy_RTC_SyncToRtcAhbDateAndTime(). Ensure that Cy_RTC_WriteEnable() * retuned CY_RTC_SUCCESS. * @@ -1269,7 +1267,7 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbDateAndTime(uint32_t timeBcd, uint32_t d __STATIC_INLINE void Cy_RTC_SyncToRtcAhbAlarm(uint32_t alarmTimeBcd, uint32_t alarmDateBcd, cy_en_rtc_alarm_t alarmIndex) { CY_ASSERT_L3(CY_RTC_IS_ALARM_IDX_VALID(alarmIndex)); - + if(alarmIndex != CY_RTC_ALARM_2) { BACKUP->ALM1_TIME = alarmTimeBcd; @@ -1279,7 +1277,7 @@ __STATIC_INLINE void Cy_RTC_SyncToRtcAhbAlarm(uint32_t alarmTimeBcd, uint32_t al { BACKUP->ALM2_TIME = alarmTimeBcd; BACKUP->ALM2_DATE = alarmDateBcd; - } + } } #if defined(__cplusplus) diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.c index 4a3283fe45..a0d575c573 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_sar.h" @@ -135,7 +133,7 @@ cy_en_sar_status_t Cy_SAR_Init(SAR_Type *base, const cy_stc_sar_config_t *config { base->ANA_TRIM0 = CY_SAR_CAP_TRIM; } - + /* Set the REFBUF_EN bit as this is required for proper operation. */ base->CTRL = config->ctrl | SAR_CTRL_REFBUF_EN_Msk; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.h index 1f9120a59e..2e1c2b5bac 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sar/cy_sar.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -537,8 +535,8 @@ * Correct CAP_TRIM is necessary achieving specified SAR ADC linearity * * -* Turn off the entire hardware block only if the SARMUX is not enabled -* for Deep Sleep operation. +* Turn off the entire hardware block only if the SARMUX is not enabled +* for Deep Sleep operation. * * Improvement of the \ref Cy_SAR_Sleep flow * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.c index d17d5304df..12c343bd94 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_scb_common.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.h index 53c67133c8..24d2513b18 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_common.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.c index 731de3dbb6..8b5f946311 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_scb_ezi2c.h" @@ -210,7 +208,7 @@ void Cy_SCB_EZI2C_Disable(CySCB_Type *base, cy_stc_scb_ezi2c_context_t *context) ****************************************************************************//** * * This function handles the transition of the EZI2C SCB into and out of -* Deep Sleep mode. It prevents the device from entering Deep Sleep mode if +* Deep Sleep mode. It prevents the device from entering Deep Sleep mode if * the EZI2C slave is actively communicating. * The following behavior of the EZI2C depends on whether the SCB block is * wakeup-capable: @@ -218,7 +216,7 @@ void Cy_SCB_EZI2C_Disable(CySCB_Type *base, cy_stc_scb_ezi2c_context_t *context) * receives the address and stretches the clock until the device is woken from * Deep Sleep mode. If the slave address occurs before the device enters * Deep Sleep mode, the device will not enter Deep Sleep mode. -* * The SCB is not wakeup-capable: the EZI2C is disabled. It is enabled +* * The SCB is not wakeup-capable: the EZI2C is disabled. It is enabled * when the device fails to enter Deep Sleep mode or it is woken from Deep Sleep * mode. While the EZI2C is disabled, it stops driving the outputs and * ignores the input lines. The slave NACKs all incoming addresses. @@ -240,7 +238,7 @@ void Cy_SCB_EZI2C_Disable(CySCB_Type *base, cy_stc_scb_ezi2c_context_t *context) * For proper operation, when the EZI2C slave is configured to be a wakeup source * from Deep Sleep mode, this function must be copied and modified by the user. * The EZI2C clock disable code must be inserted in the -* \ref CY_SYSPM_BEFORE_TRANSITION and clock enable code in the +* \ref CY_SYSPM_BEFORE_TRANSITION and clock enable code in the * \ref CY_SYSPM_AFTER_TRANSITION mode processing. * *******************************************************************************/ @@ -340,10 +338,10 @@ cy_en_syspm_status_t Cy_SCB_EZI2C_DeepSleepCallback(cy_stc_syspm_callback_params /* Disable SCB clock */ locBase->I2C_CFG &= (uint32_t) ~CY_SCB_I2C_CFG_CLK_ENABLE_Msk; - - /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): - * for proper entering Deep Sleep mode the I2C clock must be disabled. - * This code must be inserted by the user because the driver + + /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): + * for proper entering Deep Sleep mode the I2C clock must be disabled. + * This code must be inserted by the user because the driver * does not have access to the clock. */ } @@ -358,10 +356,10 @@ cy_en_syspm_status_t Cy_SCB_EZI2C_DeepSleepCallback(cy_stc_syspm_callback_params { /* Enable SCB clock */ locBase->I2C_CFG |= CY_SCB_I2C_CFG_CLK_ENABLE_Msk; - - /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): - * for proper exiting Deep Sleep mode, the I2C clock must be enabled. - * This code must be inserted by the user because the driver + + /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): + * for proper exiting Deep Sleep mode, the I2C clock must be enabled. + * This code must be inserted by the user because the driver * does not have access to the clock. */ @@ -394,7 +392,7 @@ cy_en_syspm_status_t Cy_SCB_EZI2C_DeepSleepCallback(cy_stc_syspm_callback_params ****************************************************************************//** * * This function handles the transition of the EZI2C SCB block into Hibernate -* mode. It prevents the device from entering Hibernate mode if the EZI2C slave +* mode. It prevents the device from entering Hibernate mode if the EZI2C slave * is actively communicating. * If the EZI2C is ready to enter Hibernate mode, it is disabled. If the device * fails to enter Hibernate mode, the EZI2C is enabled. While the EZI2C @@ -761,11 +759,11 @@ void Cy_SCB_EZI2C_Interrupt(CySCB_Type *base, cy_stc_scb_ezi2c_context_t *contex /* Handle an I2C wake-up event */ if (0UL != (CY_SCB_I2C_INTR_WAKEUP & Cy_SCB_GetI2CInterruptStatusMasked(base))) { - /* Move from IDLE state, the slave was addressed. Following address match + /* Move from IDLE state, the slave was addressed. Following address match * interrupt continue transfer. */ context->state = CY_SCB_EZI2C_STATE_ADDR; - + Cy_SCB_ClearI2CInterrupt(base, CY_SCB_I2C_INTR_WAKEUP); } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.h index 4f8f8ef3a6..7f44ceebb6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_ezi2c.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -40,89 +38,89 @@ * at run time. * * \section group_scb_ezi2c_configuration Configuration Considerations -* The EZI2C slave driver configuration can be divided to number of sequential -* steps listed below: +* The EZI2C slave driver configuration can be divided to number of sequential +* steps listed below: * * \ref group_scb_ezi2c_config * * \ref group_scb_ezi2c_pins * * \ref group_scb_ezi2c_clock * * \ref group_scb_ezi2c_data_rate * * \ref group_scb_ezi2c_intr * * \ref group_scb_ezi2c_enable -* -* \note -* EZI2C slave driver is built on top of the SCB hardware block. The SCB3 -* instance is used as an example for all code snippets. Modify the code to +* +* \note +* EZI2C slave driver is built on top of the SCB hardware block. The SCB3 +* instance is used as an example for all code snippets. Modify the code to * match your design. * * \subsection group_scb_ezi2c_config Configure EZI2C slave -* To set up the EZI2C slave driver, provide the configuration parameters in the -* \ref cy_stc_scb_ezi2c_config_t structure. The primary slave address -* slaveAddress1 must be provided. The other parameters are optional for -* operation. To initialize the driver, call \ref Cy_SCB_EZI2C_Init -* function providing a pointer to the filled \ref cy_stc_scb_ezi2c_config_t +* To set up the EZI2C slave driver, provide the configuration parameters in the +* \ref cy_stc_scb_ezi2c_config_t structure. The primary slave address +* slaveAddress1 must be provided. The other parameters are optional for +* operation. To initialize the driver, call \ref Cy_SCB_EZI2C_Init +* function providing a pointer to the filled \ref cy_stc_scb_ezi2c_config_t * structure and allocated \ref cy_stc_scb_ezi2c_context_t. * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_CFG * -* Set up the EZI2C slave buffer before enabling its -* operation by using \ref Cy_SCB_EZI2C_SetBuffer1 for the primary slave address +* Set up the EZI2C slave buffer before enabling its +* operation by using \ref Cy_SCB_EZI2C_SetBuffer1 for the primary slave address * and \ref Cy_SCB_EZI2C_SetBuffer2 for the secondary (if the secondary is enabled). * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_CFG_BUFFER * * \subsection group_scb_ezi2c_pins Assign and Configure Pins -* Only dedicated SCB pins can be used for I2C operation. The HSIOM -* register must be configured to connect the block to the pins. Also the I2C pins -* must be configured in Open-Drain, Drives Low mode (this pin configuration +* Only dedicated SCB pins can be used for I2C operation. The HSIOM +* register must be configured to connect the block to the pins. Also the I2C pins +* must be configured in Open-Drain, Drives Low mode (this pin configuration * implies usage of external pull-up resistors): * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_CFG_PINS * * \note -* The alternative pins configuration is Resistive Pull-ups which implies usage -* internal pull-up resistors. This configuration is not recommended because -* resistor value is fixed and cannot be used for all supported data rates. +* The alternative pins configuration is Resistive Pull-ups which implies usage +* internal pull-up resistors. This configuration is not recommended because +* resistor value is fixed and cannot be used for all supported data rates. * Refer to device datasheet parameter RPULLUP for resistor value specifications. * * \subsection group_scb_ezi2c_clock Assign Clock Divider -* The clock source must be connected to the SCB block to oversample input and -* output signals. You must use one of the 8-bit or 16-bit dividers (the -* source clock of this divider must be Clk_Peri). Use the +* The clock source must be connected to the SCB block to oversample input and +* output signals. You must use one of the 8-bit or 16-bit dividers (the +* source clock of this divider must be Clk_Peri). Use the * \ref group_sysclk driver API to do that. * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_CFG_ASSIGN_CLOCK * * \subsection group_scb_ezi2c_data_rate Configure Data Rate -* To get EZI2C slave to operate at the desired data rate, the source clock must be -* fast enough to provide sufficient oversampling. Therefore, the clock divider -* must be configured to provide desired clock frequency. Use the -* \ref group_sysclk driver API to do that. -* Refer to the technical reference manual (TRM) section I2C sub-section -* Oversampling and Bit Rate to get information about how to configure the I2C to run +* To get EZI2C slave to operate at the desired data rate, the source clock must be +* fast enough to provide sufficient oversampling. Therefore, the clock divider +* must be configured to provide desired clock frequency. Use the +* \ref group_sysclk driver API to do that. +* Refer to the technical reference manual (TRM) section I2C sub-section +* Oversampling and Bit Rate to get information about how to configure the I2C to run * at the desired data rate. * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_CFG_DATA_RATE * * \subsection group_scb_ezi2c_intr Configure Interrupt -* The interrupt is mandatory for the EZI2C slave operation. -* The \ref Cy_SCB_EZI2C_Interrupt function must be called in the interrupt -* handler for the selected SCB instance. Also, this interrupt must be enabled +* The interrupt is mandatory for the EZI2C slave operation. +* The \ref Cy_SCB_EZI2C_Interrupt function must be called in the interrupt +* handler for the selected SCB instance. Also, this interrupt must be enabled * in the NVIC or it will not work. * * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_INTR_A * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_INTR_B * * \subsection group_scb_ezi2c_enable Enable EZI2C slave -* Finally, enable the EZI2C slave operation by calling \ref Cy_SCB_EZI2C_Enable. +* Finally, enable the EZI2C slave operation by calling \ref Cy_SCB_EZI2C_Enable. * Now the I2C device responds to the assigned address. * \snippet SCB_CompDatasheet_sut_01_revA.cydsn\ezi2c_snippets.c EZI2C_ENABLE * -* \section group_scb_ezi2c_use_cases Common Use Cases +* \section group_scb_ezi2c_use_cases Common Use Cases * The EZI2C slave operation might not require calling any EZI2C slave function * because the I2C master is able to access the slave buffer. The application * can directly access it as well. Note that this is an application-level task * to ensure the buffer content integrity. -* +* * \subsection group_scb_ezi2c_master_wr Master Write operation * This operation starts with sending a base address that is one * or two bytes, depending on the sub-address size configuration. This base @@ -134,9 +132,9 @@ * read/write region size.\n * When a master attempts to write outside the read/write region or past the * end of the buffer, the last byte is NACKed. -* +* * \image html scb_ezi2c_write.png -* +* * \subsection group_scb_ezi2c_master_rd Master Read operation * This operation always starts from the base address set by the most * recent write operation. The buffer index is incremented for each read byte. @@ -150,26 +148,26 @@ * * \image html scb_ezi2c_read.png * -* The I2C master may use the ReStart or Stop/Start conditions to combine the +* The I2C master may use the ReStart or Stop/Start conditions to combine the * operations. The write operation sets only the base address and the following * read operation will start from the new base address. In cases where the base * address remains the same, there is no need for a write operation. * \image html scb_ezi2c_set_ba_read.png * * \section group_scb_ezi2c_lp Low Power Support -* The EZI2C slave provides the callback functions to handle power mode -* transition. The callback \ref Cy_SCB_EZI2C_DeepSleepCallback must be called -* during execution of \ref Cy_SysPm_DeepSleep; -* \ref Cy_SCB_EZI2C_HibernateCallback must be called during execution of -* \ref Cy_SysPm_Hibernate. To trigger the callback execution, the callback must -* be registered before calling the power mode transition function. Refer to -* \ref group_syspm driver for more information about power mode transitions and +* The EZI2C slave provides the callback functions to handle power mode +* transition. The callback \ref Cy_SCB_EZI2C_DeepSleepCallback must be called +* during execution of \ref Cy_SysPm_DeepSleep; +* \ref Cy_SCB_EZI2C_HibernateCallback must be called during execution of +* \ref Cy_SysPm_Hibernate. To trigger the callback execution, the callback must +* be registered before calling the power mode transition function. Refer to +* \ref group_syspm driver for more information about power mode transitions and * callback registration. * * \note * Only applicable for rev-08 of the CY8CKIT-062-BLE. -* For proper operation, when the EZI2C slave is configured to be a wakeup -* source from Deep Sleep mode, the \ref Cy_SCB_EZI2C_DeepSleepCallback must +* For proper operation, when the EZI2C slave is configured to be a wakeup +* source from Deep Sleep mode, the \ref Cy_SCB_EZI2C_DeepSleepCallback must * be copied and modified. Refer to the function description to get the details. * * \section group_scb_ezi2c_more_information More Information @@ -349,10 +347,10 @@ typedef struct cy_stc_scb_ezi2c_config } cy_stc_scb_ezi2c_config_t; /** EZI2C slave context structure. -* All fields for the context structure are internal. Firmware never reads or -* writes these values. Firmware allocates the structure and provides the -* address of the structure to the driver in function calls. Firmware must -* ensure that the defined instance of this structure remains in scope +* All fields for the context structure are internal. Firmware never reads or +* writes these values. Firmware allocates the structure and provides the +* address of the structure to the driver in function calls. Firmware must +* ensure that the defined instance of this structure remains in scope * while the drive is in use. */ typedef struct cy_stc_scb_ezi2c_context diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.c index 665f88b6a0..c66816e03e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_scb_i2c.h" @@ -1219,8 +1217,8 @@ cy_en_scb_i2c_status_t Cy_SCB_I2C_MasterRead(CySCB_Type *base, if (CY_SCB_I2C_IDLE == context->state) { - /* Put the address in the TX FIFO, then generate a Start condition. - * This sequence ensures that after the Start condition generation + /* Put the address in the TX FIFO, then generate a Start condition. + * This sequence ensures that after the Start condition generation * the address is available to be sent onto the bus. */ Cy_SCB_WriteTxFifo(base, address); @@ -1444,8 +1442,8 @@ cy_en_scb_i2c_status_t Cy_SCB_I2C_MasterWrite(CySCB_Type *base, if (CY_SCB_I2C_IDLE == context->state) { - /* Put the address in the TX FIFO, then generate a Start condition. - * This sequence ensures that after the Start condition generation + /* Put the address in the TX FIFO, then generate a Start condition. + * This sequence ensures that after the Start condition generation * the address is available to be sent onto the bus. */ Cy_SCB_WriteTxFifo (base, address); @@ -1464,9 +1462,9 @@ cy_en_scb_i2c_status_t Cy_SCB_I2C_MasterWrite(CySCB_Type *base, if (0U == context->masterBufferSize) { /* The address is the last byte to transfer. - * Put the address byte in the TX FIFO and clear the TX - * Underflow interrupt source inside the critical section - * to ensure that the TX Underflow interrupt will trigger + * Put the address byte in the TX FIFO and clear the TX + * Underflow interrupt source inside the critical section + * to ensure that the TX Underflow interrupt will trigger * after the address byte is sent onto the bus. */ intrState = Cy_SysLib_EnterCriticalSection(); @@ -1808,8 +1806,8 @@ cy_en_scb_i2c_status_t Cy_SCB_I2C_MasterSendReStart(CySCB_Type *base, if (false == _FLD2BOOL(SCB_I2C_STATUS_M_READ, base->I2C_STATUS)) { /* Cypress ID #295908: Wait until ReStart is generated to complete - * the previous write transfer. This ensures that the address byte - * will not be interpreted as the data byte of the previous + * the previous write transfer. This ensures that the address byte + * will not be interpreted as the data byte of the previous * transfer. */ while ((0U == locStatus) && @@ -2493,9 +2491,9 @@ static void SlaveHandleDataTransmit(CySCB_Type *base, cy_stc_scb_i2c_context_t * { uint32_t intrStatus; - /* Put the last data byte in the TX FIFO and clear the TX Underflow - * interrupt source inside the critical section to ensure that the - * TX Underflow interrupt will trigger after all data bytes from the + /* Put the last data byte in the TX FIFO and clear the TX Underflow + * interrupt source inside the critical section to ensure that the + * TX Underflow interrupt will trigger after all data bytes from the * TX FIFO are transferred onto the bus. */ intrStatus = Cy_SysLib_EnterCriticalSection(); @@ -2887,9 +2885,9 @@ static void MasterHandleDataTransmit(CySCB_Type *base, cy_stc_scb_i2c_context_t { uint32_t intrStatus; - /* Put the last data byte in the TX FIFO and clear the TX Underflow - * interrupt source inside the critical section to ensure that the - * TX Underflow interrupt will trigger after all data bytes from the + /* Put the last data byte in the TX FIFO and clear the TX Underflow + * interrupt source inside the critical section to ensure that the + * TX Underflow interrupt will trigger after all data bytes from the * TX FIFO are transferred onto the bus. */ intrStatus = Cy_SysLib_EnterCriticalSection(); diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.h index 1a6be34132..787fb2550e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_i2c.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -305,9 +303,9 @@ * 2.10 * Fixed the ReStart condition generation sequence for a write * transaction in the \ref Cy_SCB_I2C_MasterWrite function. -* The driver can notify about a zero length write transaction completion -* before the address byte is sent if the \ref Cy_SCB_I2C_MasterWrite -* function execution was interrupted between setting the restart +* The driver can notify about a zero length write transaction completion +* before the address byte is sent if the \ref Cy_SCB_I2C_MasterWrite +* function execution was interrupted between setting the restart * generation command and writing the address byte into the TX FIFO. * * @@ -318,7 +316,7 @@ * master mode configurations. * * -* Updated the Start condition generation sequence in the \ref +* Updated the Start condition generation sequence in the \ref * Cy_SCB_I2C_MasterWrite and \ref Cy_SCB_I2C_MasterRead. * * @@ -329,8 +327,8 @@ * * * 2.0 -* Fixed the \ref Cy_SCB_I2C_MasterSendReStart function to properly -* generate the ReStart condition when the previous transaction was +* Fixed the \ref Cy_SCB_I2C_MasterSendReStart function to properly +* generate the ReStart condition when the previous transaction was * a write. * The master interpreted the address byte written into the TX FIFO as a * data byte and continued a write transaction. The ReStart condition was @@ -345,10 +343,10 @@ * firmware. * The observed slave operation failure depends on whether Level 2 assert * is enabled or not. Enabled: the device stuck in the fault handler due -* to the assert assignment in the \ref Cy_SCB_I2C_Interrupt. Disabled: -* the slave sets the transaction completion status and notifies on the +* to the assert assignment in the \ref Cy_SCB_I2C_Interrupt. Disabled: +* the slave sets the transaction completion status and notifies on the * transaction completion event after the address was NACKed. The failure -* is observed only when the slave is configured to accept an address in +* is observed only when the slave is configured to accept an address in * the RX FIFO. * * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.c index 606e086eac..b70e299630 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_scb_spi.h" @@ -248,28 +246,28 @@ void Cy_SCB_SPI_Disable(CySCB_Type *base, cy_stc_scb_spi_context_t *context) * * This function handles the transition of the SCB SPI into and out of * Deep Sleep mode. It prevents the device from entering Deep Sleep mode -* if the SPI slave or master is actively communicating, or there is any data +* if the SPI slave or master is actively communicating, or there is any data * in the TX or RX FIFOs. * The following behavior of the SPI SCB depends on whether the SCB block is * wakeup-capable or not: -* * The SCB is wakeup-capable: any transfer intended to the slave wakes up -* the device from Deep Sleep mode. The slave responds with 0xFF to the transfer -* and incoming data is ignored. +* * The SCB is wakeup-capable: any transfer intended to the slave wakes up +* the device from Deep Sleep mode. The slave responds with 0xFF to the transfer +* and incoming data is ignored. * If the transfer occurs before the device enters Deep Sleep mode, the device * will not enter Deep Sleep mode and incoming data is stored in the RX FIFO. -* The SCB clock is disabled before entering Deep Sleep and enabled after the -* device exits Deep Sleep mode. The SCB clock must be enabled after exiting -* Deep Sleep mode and after the source of hf_clk[0] gets stable, this includes -* the FLL/PLL. The SysClk callback ensures that hf_clk[0] gets stable and -* it must be called before Cy_SCB_SPI_DeepSleepCallback. The SCB clock -* disabling may lead to corrupted data in the RX FIFO. Clear the RX FIFO -* after this callback is executed. If the transfer occurs before the device -* enters Deep Sleep mode, the device will not enter Deep Sleep mode and +* The SCB clock is disabled before entering Deep Sleep and enabled after the +* device exits Deep Sleep mode. The SCB clock must be enabled after exiting +* Deep Sleep mode and after the source of hf_clk[0] gets stable, this includes +* the FLL/PLL. The SysClk callback ensures that hf_clk[0] gets stable and +* it must be called before Cy_SCB_SPI_DeepSleepCallback. The SCB clock +* disabling may lead to corrupted data in the RX FIFO. Clear the RX FIFO +* after this callback is executed. If the transfer occurs before the device +* enters Deep Sleep mode, the device will not enter Deep Sleep mode and * incoming data will be stored in the RX FIFO. \n * Only the SPI slave can be configured to be a wakeup source from Deep Sleep * mode. -* * The SCB is not wakeup-capable: the SPI is disabled. It is enabled when -* the device fails to enter Deep Sleep mode or it is awakened from Deep Sleep +* * The SCB is not wakeup-capable: the SPI is disabled. It is enabled when +* the device fails to enter Deep Sleep mode or it is awakened from Deep Sleep * mode. While the SPI is disabled, it stops driving the outputs and ignores the * inputs. Any incoming data is ignored. * @@ -385,13 +383,13 @@ cy_en_syspm_status_t Cy_SCB_SPI_DeepSleepCallback(cy_stc_syspm_callback_params_t * becomes pending and prevents entering Deep Sleep mode. */ Cy_SCB_SetSpiInterruptMask(locBase, CY_SCB_I2C_INTR_WAKEUP); - + /* Disable SCB clock */ locBase->I2C_CFG &= (uint32_t) ~CY_SCB_I2C_CFG_CLK_ENABLE_Msk; - - /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): - * for proper entering Deep Sleep mode the SPI clock must be disabled. - * This code must be inserted by the user because the driver + + /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): + * for proper entering Deep Sleep mode the SPI clock must be disabled. + * This code must be inserted by the user because the driver * does not have access to the clock. */ } @@ -406,13 +404,13 @@ cy_en_syspm_status_t Cy_SCB_SPI_DeepSleepCallback(cy_stc_syspm_callback_params_t { /* Enable SCB clock */ locBase->I2C_CFG |= CY_SCB_I2C_CFG_CLK_ENABLE_Msk; - - /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): - * for proper exiting Deep Sleep mode, the SPI clock must be enabled. - * This code must be inserted by the user because the driver + + /* IMPORTANT (replace line above for the CY8CKIT-062 rev-08): + * for proper exiting Deep Sleep mode, the SPI clock must be enabled. + * This code must be inserted by the user because the driver * does not have access to the clock. */ - + /* The SCB is wakeup-capable: disable the SPI wakeup interrupt * source */ @@ -441,7 +439,7 @@ cy_en_syspm_status_t Cy_SCB_SPI_DeepSleepCallback(cy_stc_syspm_callback_params_t ****************************************************************************//** * * This function handles the transition of the SCB SPI into Hibernate mode. -* It prevents the device from entering Hibernate mode if the SPI slave or +* It prevents the device from entering Hibernate mode if the SPI slave or * master is actively communicating, or there is any data in the TX or RX FIFOs. * If the SPI is ready to enter Hibernate mode, it is disabled. If the device * failed to enter Hibernate mode, the SPI is enabled. While the SPI is diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.h index f118099a28..521ece9f21 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_spi.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -184,7 +182,7 @@ * parameter to configure TX FIFO level value. \n * For example, the TX FIFO has 0 data elements (empty) and the TX FIFO level * is 7. The TX trigger signal remains active until DMA does not load TX FIFO -* with 7 data elements (note that after the first TX load operation, the data +* with 7 data elements (note that after the first TX load operation, the data * element goes to the shift register and TX FIFO remains empty). * * To route SCB TX or RX trigger signals to the DMA controller, use \ref group_trigmux @@ -203,23 +201,23 @@ * callback execution, the callback must be registered before calling the * power mode transition function. Refer to \ref group_syspm driver for more * information about power mode transitions and callback registration. -* -* The SPI master is disabled during Deep Sleep and Hibernate and stops driving -* the output pins. The state of the SPI master output pins SCLK, SS, and MOSI is -* High-Z, which can cause unexpected behavior of the SPI Slave due to possible -* glitches on these lines. These pins must be set to the inactive state before -* entering Deep Sleep or Hibernate mode. To do that, configure the SPI master -* pins output to drive the inactive state and High-Speed Input Output -* Multiplexer (HSIOM) to control output by GPIO (use \ref group_gpio -* driver API). The pins configuration must be restored after exiting Deep Sleep -* mode to return the SPI master control of the pins (after exiting Hibernate -* mode, the system init code does the same). -* Note that the SPI master must be enabled to drive the pins during -* configuration change not to cause glitches on the lines. Copy either or -* both \ref Cy_SCB_SPI_DeepSleepCallback and \ref Cy_SCB_SPI_HibernateCallback +* +* The SPI master is disabled during Deep Sleep and Hibernate and stops driving +* the output pins. The state of the SPI master output pins SCLK, SS, and MOSI is +* High-Z, which can cause unexpected behavior of the SPI Slave due to possible +* glitches on these lines. These pins must be set to the inactive state before +* entering Deep Sleep or Hibernate mode. To do that, configure the SPI master +* pins output to drive the inactive state and High-Speed Input Output +* Multiplexer (HSIOM) to control output by GPIO (use \ref group_gpio +* driver API). The pins configuration must be restored after exiting Deep Sleep +* mode to return the SPI master control of the pins (after exiting Hibernate +* mode, the system init code does the same). +* Note that the SPI master must be enabled to drive the pins during +* configuration change not to cause glitches on the lines. Copy either or +* both \ref Cy_SCB_SPI_DeepSleepCallback and \ref Cy_SCB_SPI_HibernateCallback * as appropriate, and make the changes described above inside the function. -* Alternately, external pull-up or pull-down resistors can be connected -* to the appropriate SPI lines to keep them inactive during Deep-Sleep or +* Alternately, external pull-up or pull-down resistors can be connected +* to the appropriate SPI lines to keep them inactive during Deep-Sleep or * Hibernate. * * \note diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.c index 374e2037e3..80fc72beb7 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_scb_uart.h" @@ -265,7 +263,7 @@ void Cy_SCB_UART_Disable(CySCB_Type *base, cy_stc_scb_uart_context_t *context) ****************************************************************************//** * * This function handles the transition of the SCB UART into and out of -* Deep Sleep mode. It prevents the device from entering Deep Sleep +* Deep Sleep mode. It prevents the device from entering Deep Sleep * mode if the UART is transmitting data or has any data in the RX FIFO. If the * UART is ready to enter Deep Sleep mode, it is disabled. The UART is enabled * when the device fails to enter Deep Sleep mode or it is awakened from @@ -365,7 +363,7 @@ cy_en_syspm_status_t Cy_SCB_UART_DeepSleepCallback(cy_stc_syspm_callback_params_ * Function Name: Cy_SCB_UART_HibernateCallback ****************************************************************************//** * -* This function handles the transition of the SCB UART into Hibernate mode. +* This function handles the transition of the SCB UART into Hibernate mode. * It prevents the device from entering Hibernate mode if the UART is * transmitting data or has any data in the RX FIFO. If the UART is ready * to enter Hibernate mode, it is disabled. If the device fails to enter diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.h index d8ff3e5da8..70faeb62bf 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/scb/cy_scb_uart.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -191,7 +189,7 @@ * parameter to configure TX FIFO level value. \n * For example, the TX FIFO has 0 data elements (empty) and the TX FIFO level * is 7. The TX trigger signal remains active until DMA does not load TX FIFO -* with 7 data elements (note that after the first TX load operation, the data +* with 7 data elements (note that after the first TX load operation, the data * element goes to the shift register and TX FIFO remains empty). * * To route SCB TX or RX trigger signals to DMA controller use \ref group_trigmux @@ -211,22 +209,22 @@ * power mode transition function. Refer to \ref group_syspm driver for more * information about power mode transitions and callback registration. * -* The UART is disabled during Deep Sleep and Hibernate and stops driving -* the output pins. The state of the UART output pins TX and RTS is High-Z, +* The UART is disabled during Deep Sleep and Hibernate and stops driving +* the output pins. The state of the UART output pins TX and RTS is High-Z, * which can cause unexpected behavior of the UART receiver due to possible -* glitches on these lines. These pins must be set to the inactive state before -* entering Deep Sleep or Hibernate mode. To do that, configure the UART -* pins output to drive the inactive state and High-Speed Input Output -* Multiplexer (HSIOM) to control output by GPIO (use \ref group_gpio -* driver API). The pins configuration must be restored after exiting Deep Sleep -* mode to return the UART control of the pins (after exiting Hibernate mode, -* the system init code does the same). -* Note that the UART must be enabled to drive the pins during configuration -* change not to cause glitches on the lines. Copy either or both -* \ref Cy_SCB_UART_DeepSleepCallback and \ref Cy_SCB_UART_HibernateCallback as +* glitches on these lines. These pins must be set to the inactive state before +* entering Deep Sleep or Hibernate mode. To do that, configure the UART +* pins output to drive the inactive state and High-Speed Input Output +* Multiplexer (HSIOM) to control output by GPIO (use \ref group_gpio +* driver API). The pins configuration must be restored after exiting Deep Sleep +* mode to return the UART control of the pins (after exiting Hibernate mode, +* the system init code does the same). +* Note that the UART must be enabled to drive the pins during configuration +* change not to cause glitches on the lines. Copy either or both +* \ref Cy_SCB_UART_DeepSleepCallback and \ref Cy_SCB_UART_HibernateCallback as * appropriate, and make the changes described above inside the function. -* Alternately, external pull-up or pull-down resistors can be connected -* to the appropriate UART lines to keep them inactive during Deep-Sleep or +* Alternately, external pull-up or pull-down resistors can be connected +* to the appropriate UART lines to keep them inactive during Deep-Sleep or * Hibernate. * * \section group_scb_uart_more_information More Information diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.c index 0b769ed0f8..3fb44c4b4b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.c @@ -10,9 +10,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_smif.h" @@ -57,7 +55,7 @@ extern "C" { * - \ref CY_SMIF_SUCCESS * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, cy_stc_smif_config_t const *config, uint32_t timeout, cy_stc_smif_context_t *context) @@ -66,14 +64,14 @@ cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, if((NULL != base) && (NULL != config) && (NULL != context)) { - /* Copy the base address of the SMIF and the SMIF Device block - * registers to the context. + /* Copy the base address of the SMIF and the SMIF Device block + * registers to the context. */ context->timeout = timeout; /* Configure the initial interrupt mask */ /* Disable the TR_TX_REQ and TR_RX_REQ interrupts */ - Cy_SMIF_SetInterruptMask(base, Cy_SMIF_GetInterruptMask(base) + Cy_SMIF_SetInterruptMask(base, Cy_SMIF_GetInterruptMask(base) & ~(SMIF_INTR_TR_TX_REQ_Msk | SMIF_INTR_TR_RX_REQ_Msk)); /* Check config structure */ @@ -81,7 +79,7 @@ cy_en_smif_status_t Cy_SMIF_Init(SMIF_Type *base, CY_ASSERT_L3(CY_SMIF_CLOCK_SEL_VALID(config->rxClockSel)); CY_ASSERT_L2(CY_SMIF_DESELECT_DELAY_VALID(config->deselectDelay)); CY_ASSERT_L3(CY_SMIF_BLOCK_EVENT_VALID(config->blockEvent)); - + /* Configure the SMIF interface */ base->CTL = (uint32_t)(_VAL2FLD(SMIF_CTL_XIP_MODE, config->mode) | _VAL2FLD(SMIF_CTL_CLOCK_IF_RX_SEL, config->rxClockSel) | @@ -115,8 +113,8 @@ void Cy_SMIF_DeInit(SMIF_Type *base) { uint32_t idx; - /* Configure the SMIF interface to default values. - * The default value is 0. + /* Configure the SMIF interface to default values. + * The default value is 0. */ base->CTL = CY_SMIF_CTL_REG_DEFAULT; base->TX_DATA_FIFO_CTL = 0U; @@ -153,7 +151,7 @@ void Cy_SMIF_DeInit(SMIF_Type *base) void Cy_SMIF_SetMode(SMIF_Type *base, cy_en_smif_mode_t mode) { CY_ASSERT_L3(CY_SMIF_MODE_VALID(mode)); - + /* Set the register SMIF.CTL.XIP_MODE = TRUE */ if (CY_SMIF_NORMAL == mode) { @@ -223,10 +221,10 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec cy_en_smif_data_select_t dataSelect) { SMIF_DEVICE_Type volatile *device; - + CY_ASSERT_L3(CY_SMIF_SLAVE_SEL_VALID(slaveSelect)); CY_ASSERT_L3(CY_SMIF_DATA_SEL_VALID(dataSelect)); - + /* Connect the slave to its data lines */ device = Cy_SMIF_GetDeviceBySlot(base, slaveSelect); @@ -252,7 +250,7 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec * transmission. This function sets up the slave lines for the rest of the * command structure. The \ref Cy_SMIF_TransmitCommand is called before \ref * Cy_SMIF_TransmitData or \ref Cy_SMIF_ReceiveData is called. When enabled, the -* cmpltTxfr parameter in the function will de-assert the slave select line at +* cmpltTxfr parameter in the function will de-assert the slave select line at * the end of the function execution. * * \note This function blocks until all the command and associated parameters @@ -310,7 +308,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_SUCCESS; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(cmdTxfrWidth)); CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(paramTxfrWidth)); @@ -340,10 +338,10 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, base->TX_CMD_FIFO_WR = constCmdPart| _VAL2FLD(CY_SMIF_CMD_FIFO_WR_TXDATA, (uint32_t) cmdParam[bufIndex]) | - _VAL2FLD(CY_SMIF_CMD_FIFO_WR_WIDTH, + _VAL2FLD(CY_SMIF_CMD_FIFO_WR_WIDTH, (uint32_t) paramTxfrWidth) | _VAL2FLD(CY_SMIF_CMD_FIFO_WR_LAST_BYTE, - ((((uint32_t)bufIndex + 1UL) < paramSize) ? + ((((uint32_t)bufIndex + 1UL) < paramSize) ? 0UL : cmpltTxfr)); bufIndex++; @@ -383,14 +381,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitCommand(SMIF_Type *base, * * \param txBuffer * The pointer to the data to be transferred. If this pointer is a NULL, then the -* function does not enable the interrupt. This use case is typically used when -* the FIFO is handled outside the interrupt and is managed in either a +* function does not enable the interrupt. This use case is typically used when +* the FIFO is handled outside the interrupt and is managed in either a * polling-based code or a DMA. The user would handle the FIFO management in a * DMA or a polling-based code. -* +* * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTxfrStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTxfrStatus are no longer * valid. * * \param size @@ -418,7 +416,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitData(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -506,7 +504,7 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -555,8 +553,8 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, * * This function implements the receive data phase in the memory command. The * data is received into the RX Data FIFO using the RX_COUNT command. This -* function sets up the interrupt to trigger on the RX Data FIFO level, and the -* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This +* function sets up the interrupt to trigger on the RX Data FIFO level, and the +* data is fetched from the RX Data FIFO to the rxBuffer as it gets filled. This * function does not block until completion. The completion will trigger the call * back function. * @@ -579,14 +577,14 @@ cy_en_smif_status_t Cy_SMIF_TransmitDataBlocking(SMIF_Type *base, * * \param rxBuffer * The pointer to the variable where the receive data is stored. If this pointer -* is a NULL, then the function does not enable the interrupt. This use case is -* typically used when the FIFO is handled outside the interrupt and is managed -* in either a polling-based code or a DMA. The user would handle the FIFO +* is a NULL, then the function does not enable the interrupt. This use case is +* typically used when the FIFO is handled outside the interrupt and is managed +* in either a polling-based code or a DMA. The user would handle the FIFO * management in a DMA or a polling-based code. * * \note If the user provides a NULL pointer in this function and does not handle * the FIFO transaction, this could either stall or timeout the operation. -* The transfer statuses returned by \ref Cy_SMIF_GetTxfrStatus are no longer +* The transfer statuses returned by \ref Cy_SMIF_GetTxfrStatus are no longer * valid. * * \param size @@ -614,7 +612,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveData(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -705,7 +703,7 @@ cy_en_smif_status_t Cy_SMIF_ReceiveDataBlocking(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + /* Check input values */ CY_ASSERT_L3(CY_SMIF_TXFR_WIDTH_VALID(transferWidth)); @@ -773,7 +771,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, { /* The return variable */ cy_en_smif_status_t result = CY_SMIF_BAD_PARAM; - + if (cycles > 0U) { result = CY_SMIF_CMD_FIFO_FULL; @@ -782,7 +780,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, { /* Send the dummy bytes */ base->TX_CMD_FIFO_WR = - _VAL2FLD(CY_SMIF_CMD_FIFO_WR_MODE, + _VAL2FLD(CY_SMIF_CMD_FIFO_WR_MODE, CY_SMIF_CMD_FIFO_DUMMY_COUNT_MODE) | _VAL2FLD(CY_SMIF_CMD_FIFO_WR_DUMMY, ((uint32_t)(cycles-1U))); @@ -806,7 +804,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, * is only valid if the functions passed a non-NULL buffer to transmit or * receive respectively. If the pointer passed to \ref Cy_SMIF_ReceiveData() * or \ref Cy_SMIF_TransmitData() is a NULL, then the code/DMA outside this -* driver will take care of the transfer and the Cy_GetTxfrStatus() will return +* driver will take care of the transfer and the Cy_GetTxfrStatus() will return * an erroneous result. * * \param base @@ -819,7 +817,7 @@ cy_en_smif_status_t Cy_SMIF_SendDummyCycles(SMIF_Type *base, * \return Returns the transfer status. \ref cy_en_smif_txfr_status_t * *******************************************************************************/ -uint32_t Cy_SMIF_GetTxfrStatus(SMIF_Type *base, +uint32_t Cy_SMIF_GetTxfrStatus(SMIF_Type *base, cy_stc_smif_context_t const *context) { return (context->transferStatus); @@ -929,7 +927,7 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, uint32_t bufIndex; cy_en_smif_status_t status = CY_SMIF_BAD_PARAM; uint32_t timeoutUnits = context->timeout; - + CY_ASSERT_L2(size > 0U); if((NULL != data) && ((address & (~CY_SMIF_CRYPTO_ADDR_MASK)) == 0UL) ) @@ -948,15 +946,15 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, /* Start the encryption */ base->CRYPTO_CMD &= ~SMIF_CRYPTO_CMD_START_Msk; - base->CRYPTO_CMD = (uint32_t)(_VAL2FLD(SMIF_CRYPTO_CMD_START, + base->CRYPTO_CMD = (uint32_t)(_VAL2FLD(SMIF_CRYPTO_CMD_START, CY_SMIF_CRYPTO_START)); - while((CY_SMIF_CRYPTO_COMPLETED != _FLD2VAL(SMIF_CRYPTO_CMD_START, + while((CY_SMIF_CRYPTO_COMPLETED != _FLD2VAL(SMIF_CRYPTO_CMD_START, base->CRYPTO_CMD)) && (CY_SMIF_EXCEED_TIMEOUT != status)) { - /* Wait until the encryption is completed and check the - * timeout + /* Wait until the encryption is completed and check the + * timeout */ status = Cy_SMIF_TimeoutRun(&timeoutUnits); } @@ -966,13 +964,13 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, break; } - Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT0, + Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT0, &cryptoOut[CY_SMIF_CRYPTO_FIRST_WORD] , true); - Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT1, + Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT1, &cryptoOut[CY_SMIF_CRYPTO_SECOND_WORD], true); - Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT2, + Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT2, &cryptoOut[CY_SMIF_CRYPTO_THIRD_WORD] , true); - Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT3, + Cy_SMIF_UnPackByteArray(base->CRYPTO_OUTPUT3, &cryptoOut[CY_SMIF_CRYPTO_FOURTH_WORD], true); for(outIndex = 0U; outIndex < CY_SMIF_AES128_BYTES; outIndex++) @@ -1002,7 +1000,7 @@ cy_en_smif_status_t Cy_SMIF_Encrypt(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, cy_en_smif_cache_en_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -1022,7 +1020,7 @@ cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, /* A user error*/ status = CY_SMIF_BAD_PARAM; break; - } + } return (status); } @@ -1044,7 +1042,7 @@ cy_en_smif_status_t Cy_SMIF_CacheEnable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheDisable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheDisable(SMIF_Type *base, cy_en_smif_cache_en_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -1130,7 +1128,7 @@ cy_en_smif_status_t Cy_SMIF_CachePrefetchingEnable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, cy_en_smif_cache_en_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -1173,7 +1171,7 @@ cy_en_smif_status_t Cy_SMIF_CachePrefetchingDisable(SMIF_Type *base, * - \ref CY_SMIF_BAD_PARAM * *******************************************************************************/ -cy_en_smif_status_t Cy_SMIF_CacheInvalidate(SMIF_Type *base, +cy_en_smif_status_t Cy_SMIF_CacheInvalidate(SMIF_Type *base, cy_en_smif_cache_en_t cacheType) { cy_en_smif_status_t status = CY_SMIF_SUCCESS; @@ -1230,7 +1228,7 @@ cy_en_smif_status_t Cy_SMIF_CacheInvalidate(SMIF_Type *base, cy_en_syspm_status_t Cy_SMIF_DeepSleepCallback(cy_stc_syspm_callback_params_t *callbackParams) { cy_en_syspm_status_t retStatus = CY_SYSPM_SUCCESS; - + CY_ASSERT_L1(NULL != callbackParams); SMIF_Type *locBase = (SMIF_Type *) callbackParams->base; @@ -1336,7 +1334,7 @@ cy_en_syspm_status_t Cy_SMIF_HibernateCallback(cy_stc_syspm_callback_params_t *c cy_en_syspm_status_t retStatus = CY_SYSPM_SUCCESS; CY_ASSERT_L1(NULL != callbackParams); - + SMIF_Type *locBase = (SMIF_Type *) callbackParams->base; cy_stc_smif_context_t *locContext = (cy_stc_smif_context_t *) callbackParams->context; @@ -1344,7 +1342,7 @@ cy_en_syspm_status_t Cy_SMIF_HibernateCallback(cy_stc_syspm_callback_params_t *c { case CY_SYSPM_CHECK_READY: { - /* Check if API is not busy executing transfer operation + /* Check if API is not busy executing transfer operation * If SPI bus is not busy, all data elements are transferred on * the bus from the TX FIFO and shifter and the RX FIFIOs is * empty - the SPI is ready enter Deep Sleep. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.h index fded44b765..228a24dff3 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -44,11 +42,11 @@ * - SMIF configuration structures * * The SMIF API is divided into the low-level functions and memory-slot functions. Use -* the low level API for the SMIF block initialization and for implementing a generic +* the low level API for the SMIF block initialization and for implementing a generic * SPI communication interface using the SMIF block. * -* The memory slot API has functions to implement the basic memory operations such as -* program, read, erase etc. These functions are implemented using the memory +* The memory slot API has functions to implement the basic memory operations such as +* program, read, erase etc. These functions are implemented using the memory * parameters in the memory device configuration data structure. The memory-slot * initialization API initializes all the memory slots based on the settings in the * array. @@ -62,14 +60,14 @@ * structures are input parameters for cy_smif_memslot API level * * \warning The driver is not responsible for external memory persistence. You cannot edit -* a buffer during the Read/Write operations. If there is a memory error, the SMIF ip block -* can require a reset. To determine if this has happened, check the SMIF -* busy status using Cy_SMIF_BusyCheck() and implement a timeout. Reset the SMIF +* a buffer during the Read/Write operations. If there is a memory error, the SMIF ip block +* can require a reset. To determine if this has happened, check the SMIF +* busy status using Cy_SMIF_BusyCheck() and implement a timeout. Reset the SMIF * block by toggling CTL.ENABLED. Then reconfigure the SMIF block. * -* For the Write operation, check that the SMIF driver has completed -* transferring by calling Cy_SMIF_BusyCheck(). Also, check that the memory is -* available with Cy_SMIF_Memslot_IsBusy() before proceeding. +* For the Write operation, check that the SMIF driver has completed +* transferring by calling Cy_SMIF_BusyCheck(). Also, check that the memory is +* available with Cy_SMIF_Memslot_IsBusy() before proceeding. * * Simple example of external flash memory programming using low level SMIF API. * All steps mentioned in example below are incorporated in @@ -94,7 +92,7 @@ * * \snippet smif/smif_sut_01.cydsn/main_cm4.c SMIF_API: Read example * -* The user should invalidate the cache by calling Cy_SMIF_CacheInvalidate() when +* The user should invalidate the cache by calling Cy_SMIF_CacheInvalidate() when * switching from the MMIO mode to XIP mode. * * \section group_smif_configuration Configuration Considerations @@ -103,7 +101,7 @@ * \ref page_getting_started_pdl_design "PDL Design" section. * * See the documentation for Cy_SMIF_Init() and Cy_SMIF_Memslot_Init() for details -* on the required configuration structures and other initialization topics. +* on the required configuration structures and other initialization topics. * * The normal (MMIO) mode is used for implementing a generic SPI/DSPI/QSPI/Dual * Quad-SPI/Octal-SPI communication interface using the SMIF block. This @@ -137,21 +135,21 @@ * memslot level API usage. * * \subsection group_smif_xip_init SMIF XIP Initialization -* The eXecute In Place (XIP) is a mode of operation where read or write commands -* to the memory device are directed through the SMIF without any use of API -* function calls. In this mode the SMIF block maps the AHB bus-accesses to -* external memory device addresses to make it behave similar to internal memory. -* This allows the CPU to execute code directly from external memory. This mode -* is not limited to code and is suitable also for data read and write accesses. +* The eXecute In Place (XIP) is a mode of operation where read or write commands +* to the memory device are directed through the SMIF without any use of API +* function calls. In this mode the SMIF block maps the AHB bus-accesses to +* external memory device addresses to make it behave similar to internal memory. +* This allows the CPU to execute code directly from external memory. This mode +* is not limited to code and is suitable also for data read and write accesses. * \snippet smif/smif_sut_01.cydsn/main_cm4.c SMIF_INIT: XIP -* \note Example of input parameters initialization is in \ref group_smif_init +* \note Example of input parameters initialization is in \ref group_smif_init * section. -* \warning Functions that called from external memory should be declared with -* long call attribute. +* \warning Functions that called from external memory should be declared with +* long call attribute. * * \section group_smif_more_information More Information * -* More information regarding the Serial Memory Interface can be found in the component +* More information regarding the Serial Memory Interface can be found in the component * datasheet and the Technical Reference Manual (TRM). * More information regarding the SMIF Configuration Tool are in SMIF * Configuration Tool User Guide located in \/tools/\/SMIFConfigurationTool/ @@ -198,7 +196,7 @@ * * * 1.10 -* Fix write to external memory from CM0+ core. Add checks of API input parameters. +* Fix write to external memory from CM0+ core. Add checks of API input parameters. * Minor documentation updates * * @@ -354,7 +352,7 @@ extern "C" { (CY_SMIF_SEL_INV_INTERNAL_CLK == (cy_en_smif_clk_select_t)(clkSel)) || \ (CY_SMIF_SEL_FEEDBACK_CLK == (cy_en_smif_clk_select_t)(clkSel)) || \ (CY_SMIF_SEL_INV_FEEDBACK_CLK == (cy_en_smif_clk_select_t)(clkSel))) - + #define CY_SMIF_DESELECT_DELAY_VALID(delay) ((delay) <= CY_SMIF_MAX_DESELECT_DELAY) #define CY_SMIF_SLAVE_SEL_VALID(ss) ((CY_SMIF_SLAVE_SELECT_0 == (ss)) || \ (CY_SMIF_SLAVE_SELECT_1 == (ss)) || \ @@ -396,7 +394,7 @@ extern "C" { #define CY_SMIF_CMD_FIFO_WR_SS_Pos (8UL) /* [11:8] Slave select */ #define CY_SMIF_CMD_FIFO_WR_SS_Msk (0x00000F00UL) /* DATA[11:8] Slave select */ - + #define CY_SMIF_CMD_FIFO_WR_TXDATA_Pos (0UL) /* [0] Transmitted byte */ #define CY_SMIF_CMD_FIFO_WR_TXDATA_Msk (0x000000FFUL) /* DATA[7:0] Transmitted byte */ #define CY_SMIF_CMD_FIFO_WR_DUMMY_Pos (0UL) /* [0] Dummy count */ @@ -429,8 +427,8 @@ typedef enum { /**< Generates a bus error. */ CY_SMIF_BUS_ERROR = 0UL, - /** Stalls the bus with the wait states. This option will increase the - * interrupt latency. + /** Stalls the bus with the wait states. This option will increase the + * interrupt latency. */ CY_SMIF_WAIT_STATES = 1UL } cy_en_smif_error_event_t; @@ -511,7 +509,7 @@ typedef enum } cy_en_smif_status_t; /** The SMIF slave select definitions for the driver API. Each slave select is - * represented by an enumeration that has the bit corresponding to the slave + * represented by an enumeration that has the bit corresponding to the slave * select number set. */ typedef enum { @@ -570,10 +568,10 @@ typedef struct * - "5": 6 clock cycles. * - "6": 7 clock cycles. * - "7": 8 clock cycles. */ - uint32_t rxClockSel; /**< Specifies the clock source for the receiver + uint32_t rxClockSel; /**< Specifies the clock source for the receiver * clock \ref cy_en_smif_clk_select_t. */ - uint32_t blockEvent; /**< Specifies what happens when there is a Read - * from an empty RX FIFO or a Write to a full + uint32_t blockEvent; /**< Specifies what happens when there is a Read + * from an empty RX FIFO or a Write to a full * TX FIFO. \ref cy_en_smif_error_event_t. */ } cy_stc_smif_config_t; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.c index eba4304c36..bbaee31f03 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.c @@ -10,9 +10,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_smif_memslot.h" @@ -43,7 +41,7 @@ static void Cy_SMIF_Memslot_XipRegInit(SMIF_DEVICE_Type volatile *dev, * achieved using Cy_SMIF_Init(). The cy_stc_smif_context_t context structure * returned from Cy_SMIF_Init() is passed as a parameter to this function. * This function calls the \ref Cy_SMIF_Memslot_SfdpDetect() function for each -* element of the \ref cy_stc_smif_mem_config_t memConfig array and fills the memory +* element of the \ref cy_stc_smif_mem_config_t memConfig array and fills the memory * parameters if the autoDetectSfdp field is enabled in \ref cy_stc_smif_mem_config_t. * The filled memConfig is a part of the \ref cy_stc_smif_block_config_t * blockConfig * structure. The function expects that all the requirements of @@ -74,7 +72,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_Init(SMIF_Type *base, uint32_t sfdpRes =(uint32_t)CY_SMIF_SUCCESS; uint32_t idx; - if ((NULL != base) && (NULL != blockConfig) && (NULL != blockConfig->memConfig) + if ((NULL != base) && (NULL != blockConfig) && (NULL != blockConfig->memConfig) && (NULL != context) && (0U != blockConfig->memCount)) { uint32_t size = blockConfig->memCount; @@ -91,7 +89,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_Init(SMIF_Type *base, CY_ASSERT_L3(CY_SMIF_DATA_SEL_VALID(memCfg->dataSelect)); CY_ASSERT_L1(NULL != memCfg->deviceCfg); CY_ASSERT_L2(CY_SMIF_MEM_ADDR_SIZE_VALID(memCfg->deviceCfg->numOfAddrBytes)); - + device = Cy_SMIF_GetDeviceBySlot(base, memCfg->slaveSelect); if (NULL != device) { @@ -119,7 +117,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_Init(SMIF_Type *base, /* Check valid parameters for XIP */ CY_ASSERT_L3(CY_SMIF_MEM_ADDR_VALID( memCfg->baseAddress, memCfg->memMappedSize)); CY_ASSERT_L3(CY_SMIF_MEM_MAPPED_SIZE_VALID( memCfg->memMappedSize)); - + Cy_SMIF_Memslot_XipRegInit(device, memCfg); /* The device control register initialization */ @@ -291,8 +289,8 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdWriteEnable(SMIF_Type *base, { /* The memory Write Enable */ cy_stc_smif_mem_cmd_t* writeEn = memDevice->deviceCfg->writeEnCmd; - - CY_ASSERT_L1(NULL != writeEn); + + CY_ASSERT_L1(NULL != writeEn); return Cy_SMIF_TransmitCommand( base, (uint8_t) writeEn->command, writeEn->cmdWidth, @@ -335,8 +333,8 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdWriteDisable(SMIF_Type *base, { cy_stc_smif_mem_cmd_t* writeDis = memDevice->deviceCfg->writeDisCmd; - CY_ASSERT_L1(NULL != writeDis); - + CY_ASSERT_L1(NULL != writeDis); + /* The memory write disable */ return Cy_SMIF_TransmitCommand( base, (uint8_t)writeDis->command, writeDis->cmdWidth, @@ -381,8 +379,8 @@ bool Cy_SMIF_Memslot_IsBusy(SMIF_Type *base, cy_stc_smif_mem_config_t *memDevice cy_en_smif_status_t readStsResult; cy_stc_smif_mem_device_cfg_t* device = memDevice->deviceCfg; - CY_ASSERT_L1(NULL != device->readStsRegWipCmd); - + CY_ASSERT_L1(NULL != device->readStsRegWipCmd); + readStsResult = Cy_SMIF_Memslot_CmdReadSts(base, memDevice, &status, (uint8_t)device->readStsRegWipCmd->command, context); @@ -428,14 +426,14 @@ cy_en_smif_status_t Cy_SMIF_Memslot_QuadEnable(SMIF_Type *base, cy_stc_smif_context_t const *context) { cy_en_smif_status_t result; - uint8_t statusReg[CY_SMIF_QE_BIT_STS_REG2_T1] = {0U}; + uint8_t statusReg[CY_SMIF_QE_BIT_STS_REG2_T1] = {0U}; cy_stc_smif_mem_device_cfg_t* device = memDevice->deviceCfg; - + /* Check that command exists */ CY_ASSERT_L1(NULL != device->readStsRegQeCmd); CY_ASSERT_L1(NULL != device->writeStsRegQeCmd); CY_ASSERT_L1(NULL != device->readStsRegWipCmd); - + uint8_t readQeCmd = (uint8_t)device->readStsRegQeCmd->command; uint8_t writeQeCmd = (uint8_t)device->writeStsRegQeCmd->command; uint8_t readWipCmd = (uint8_t)device->readStsRegWipCmd->command; @@ -572,7 +570,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdReadSts(SMIF_Type *base, * The status to write into the status register. * * \param command -* The command to write into the status/configuration register. +* The command to write into the status/configuration register. * * \return A status of the command transmission. * - \ref CY_SMIF_SUCCESS @@ -692,7 +690,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdSectorErase(SMIF_Type *base, cy_stc_smif_mem_device_cfg_t *device = memDevice->deviceCfg; cy_stc_smif_mem_cmd_t *cmdErase = device->eraseCmd; - + CY_ASSERT_L1(NULL != cmdErase); result = Cy_SMIF_TransmitCommand( base, (uint8_t)cmdErase->command, @@ -709,7 +707,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdSectorErase(SMIF_Type *base, * Function Name: Cy_SMIF_Memslot_CmdProgram ****************************************************************************//** * -* This function performs the Program operation. +* This function performs the Program operation. * * \note This function uses the Cy_SMIF_TransmitCommand() API. * The Cy_SMIF_TransmitCommand() API works in the blocking mode. In the dual quad mode, @@ -730,11 +728,11 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdSectorErase(SMIF_Type *base, * \param writeBuff * The pointer to the data to program. If this pointer is a NULL, then the * function does not enable the interrupt. This use case is typically used when -* the FIFO is handled outside the interrupt and is managed in either a -* polling-based code or a DMA. The user would handle the FIFO management -* in a DMA or a polling-based code. -* If the user provides a NULL pointer in this function and does not handle -* the FIFO transaction, this could either stall or timeout the operation +* the FIFO is handled outside the interrupt and is managed in either a +* polling-based code or a DMA. The user would handle the FIFO management +* in a DMA or a polling-based code. +* If the user provides a NULL pointer in this function and does not handle +* the FIFO transaction, this could either stall or timeout the operation * \ref Cy_SMIF_TransmitData(). * * @@ -766,7 +764,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdProgram(SMIF_Type *base, cy_stc_smif_mem_device_cfg_t *device = memDevice->deviceCfg; cy_stc_smif_mem_cmd_t *cmdProg = device->programCmd; - + CY_ASSERT_L1(NULL != cmdProg); if ((NULL != addr) && (size <= device->programSize)) @@ -818,13 +816,13 @@ cy_en_smif_status_t Cy_SMIF_Memslot_CmdProgram(SMIF_Type *base, * The address to read. * * \param readBuff -* The pointer to the variable where the read data is stored. If this pointer is -* a NULL, then the function does not enable the interrupt. This use case is +* The pointer to the variable where the read data is stored. If this pointer is +* a NULL, then the function does not enable the interrupt. This use case is * typically used when the FIFO is handled outside the interrupt and is managed * in either a polling-based code or a DMA. The user would handle the FIFO -* management in a DMA or a polling-based code. -* If the user provides a NULL pointer in this function and does not handle -* the FIFO transaction, this could either stall or timeout the operation +* management in a DMA or a polling-based code. +* If the user provides a NULL pointer in this function and does not handle +* the FIFO transaction, this could either stall or timeout the operation * \ref Cy_SMIF_TransmitData(). * * \param size @@ -944,7 +942,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_SfdpDetect(SMIF_Type *base, /* Check input parameters */ CY_ASSERT_L1(NULL != device); CY_ASSERT_L1(NULL != device->readSfdpCmd); - + uint8_t sfdpBuffer[CY_SMIF_SFDP_LENGTH]; uint8_t sfdpAddress[CY_SMIF_SFDP_ADDRESS_LENGTH] = {0x00U, 0x00U, 0x00U}; cy_en_smif_status_t result; @@ -1101,13 +1099,13 @@ cy_en_smif_status_t Cy_SMIF_Memslot_SfdpDetect(SMIF_Type *base, device->memSize = (locSize - CY_SMIF_BITS_IN_BYTE_ABOVE_4GB) | CY_SMIF_SFDP_SIZE_ABOVE_4GB_Msk; } - + /* The page size */ device->programSize = 0x01UL << _FLD2VAL(CY_SMIF_SFDP_PAGE_SIZE, - (uint32_t) sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_28 + offset]); - + (uint32_t) sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_28 + offset]); + /* The size of the Erase sector */ - device->eraseSize = (0x01UL << (uint32_t)sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_1C + offset]); + device->eraseSize = (0x01UL << (uint32_t)sfdpBuffer[CY_SMIF_SFDP_BFPT_BYTE_1C + offset]); /* This specifies the Read command. The preference order Quad>Dual>SPI */ if ((_FLD2VAL(CY_SMIF_SFDP_FAST_READ_1_4_4, @@ -1276,7 +1274,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_SfdpDetect(SMIF_Type *base, device->writeDisCmd->command = CY_SMIF_WR_DISABLE_CMD; /* The width of the command transfer */ device->writeDisCmd->cmdWidth = CY_SMIF_WIDTH_SINGLE; - + /* The chip Erase command */ /* The 8-bit command. Chip Erase */ device->chipEraseCmd->command = CY_SMIF_CHIP_ERASE_CMD; @@ -1308,7 +1306,7 @@ cy_en_smif_status_t Cy_SMIF_Memslot_SfdpDetect(SMIF_Type *base, /* The busy mask for the status registers */ device->stsRegBusyMask = CY_SMIF_STS_REG_BUSY_MASK; - + /* The command to read the WIP-containing status register */ /* The 8-bit command. WIP RDSR */ device->readStsRegWipCmd->command = CY_SMIF_RD_STS_REG1_CMD; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.h index 7456b84be4..d26f4bf5c4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/smif/cy_smif_memslot.h @@ -11,9 +11,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_SMIF_MEMORYSLOT_H) @@ -129,15 +127,15 @@ extern "C" { #define CY_SMIF_SFDP_ERASE_TIME_16MS (16U) /**< Units of Erase Typical Time in ms */ #define CY_SMIF_SFDP_ERASE_TIME_128MS (128U) /**< Units of Erase Typical Time in ms */ #define CY_SMIF_SFDP_ERASE_TIME_1S (1000U) /**< Units of Erase Typical Time in ms */ - + #define CY_SMIF_SFDP_CHIP_ERASE_TIME_16MS (16U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_256MS (256U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_4S (4000U) /**< Units of Chip Erase Typical Time in ms */ #define CY_SMIF_SFDP_CHIP_ERASE_TIME_64S (64000U) /**< Units of Chip Erase Typical Time in ms */ - + #define CY_SMIF_SFDP_PROG_TIME_8US (8U) /**< Units of Page Program Typical Time in us */ #define CY_SMIF_SFDP_PROG_TIME_64US (64U) /**< Units of Page Program Typical Time in us */ - + #define CY_SMIF_SFDP_UNIT_0 (0U) /**< Units of Basic Flash Parameter Table Time Parameters */ #define CY_SMIF_SFDP_UNIT_1 (1U) /**< Units of Basic Flash Parameter Table Time Parameters */ #define CY_SMIF_SFDP_UNIT_2 (2U) /**< Units of Basic Flash Parameter Table Time Parameters */ @@ -280,7 +278,7 @@ typedef struct */ typedef struct { - uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the + uint32_t numOfAddrBytes; /**< This specifies the number of address bytes used by the * memory slave device, valid values 1-4 */ uint32_t memSize; /**< The size of the memory */ cy_stc_smif_mem_cmd_t* readCmd; /**< This specifies the Read command */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.c index fbdfe9c8ec..40161fa691 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_sysanalog.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.h index ddc4fe8338..276cf8f683 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysanalog/cy_sysanalog.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.c index e789ea9e30..59495b8a50 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ @@ -36,7 +34,7 @@ extern "C" { * Function Name: Cy_SysClk_EcoConfigure ****************************************************************************//** * -* Configures the external crystal oscillator (ECO) trim bits based on crystal +* Configures the external crystal oscillator (ECO) trim bits based on crystal * characteristics. This function should be called only when the ECO is disabled. * * \param freq Operating frequency of the crystal in Hz. @@ -430,7 +428,7 @@ cy_en_sysclk_status_t Cy_SysClk_FllConfigure(uint32_t inputFreq, uint32_t output float32_t testval = 6000.0f / (float32_t)outputFreq; float32_t divval = ceil((float32_t)inputFreq * 0.000001f); float32_t altval = ceil((divval / ttref) + 1.0f); - config.settlingCount = (uint16)(wcoSource ? 200u : + config.settlingCount = (uint16)(wcoSource ? 200u : ((ttref > testval) ? divval : ((divval > altval) ? divval : altval))); } @@ -764,7 +762,7 @@ cy_en_sysclk_status_t Cy_SysClk_PllConfigure(uint32_t clkPath, const cy_stc_pll_ /* OUTPUT_DIV selection */ for (out = MIN_OUTPUT_DIV; (out <= MAX_OUTPUT_DIV) && (foutBest != (config->outputFreq)); out++) { - /* Calculate what output frequency will actually be produced. + /* Calculate what output frequency will actually be produced. If it's closer to the target than what we have so far, then save it. */ uint32_t fout = ((p * config->inputFreq) / q) / out; if ((uint32_t)abs((int32_t)fout - (int32_t)(config->outputFreq)) < @@ -968,7 +966,7 @@ static bool preventCounting = false; * * - One counter (counter1), which is clocked by clock1, is loaded with an initial * value and counts down to zero. -* - The second counter (counter2), which is clocked by clock2, counts up until +* - The second counter (counter2), which is clocked by clock2, counts up until * the first counter reaches zero. * * Either clock1 or clock2 can be a reference clock; the other clock becomes the @@ -1105,7 +1103,7 @@ cy_en_sysclk_status_t Cy_SysClk_StartClkMeasurementCounters(cy_en_meas_clks_t cl ****************************************************************************//** * * Calculates the frequency of the indicated measured clock (clock1 or clock2). -* +* * - If clock1 is the measured clock, its frequency is:
* clock1 frequency = (count1 / count2) * clock2 frequency * - If clock2 is the measured clock, its frequency is:
@@ -1282,7 +1280,7 @@ int32_t Cy_SysClk_PiloTrim(uint32_t piloFreq) * * 1. Before entering deep-sleep, the clock configuration is saved in SRAM. If the * FLL/PLL source is the ECO, then the source is updated to the IMO. -* 2. Upon wakeup from deep-sleep, the function restores the configuration and +* 2. Upon wakeup from deep-sleep, the function restores the configuration and * waits for the FLL/PLL to regain their frequency locks. * * The function prevents entry into DeepSleep mode if the measurement counters @@ -1293,10 +1291,10 @@ int32_t Cy_SysClk_PiloTrim(uint32_t piloFreq) * \ref Cy_SysPm_DeepSleep - specify \ref CY_SYSPM_DEEPSLEEP as the callback * type and call \ref Cy_SysPm_RegisterCallback. * -* \note This function must be the last callback function that is registered. +* \note This function must be the last callback function that is registered. * Doing so minimizes the time spent on low power mode entry and exit. In the case * where the ECO sources the FLL/PLL, this also allows the ECO to stabilize before -* reconnecting it to the FLL or PLL. +* reconnecting it to the FLL or PLL. * * \param callbackParams * structure with the syspm callback parameters, @@ -1327,7 +1325,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t { rtnval = CY_SYSPM_FAIL; } - else + else { /* Indicating that we can go into DeepSleep. Before doing so ... */ uint32_t fllpll; /* 0 = FLL, all other values = a PLL */ @@ -1338,7 +1336,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t for (fllpll = 0ul; fllpll < (SRSS_NUM_PLL + 1ul); fllpll++) { /* If FLL or PLL is enabled, */ - if (0ul != ((fllpll == 0ul) ? (_FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_ENABLE, SRSS->CLK_FLL_CONFIG)) : + if (0ul != ((fllpll == 0ul) ? (_FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_ENABLE, SRSS->CLK_FLL_CONFIG)) : (_FLD2VAL(SRSS_CLK_PLL_CONFIG_ENABLE, SRSS->CLK_PLL_CONFIG[fllpll - 1ul])))) { /* and the FLL or PLL has ECO as a source, */ @@ -1349,7 +1347,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t /* keep a record that this FLL or PLL's source was changed from ECO */ changedSourcePaths |= (uint16_t)(1u << fllpll); } - + /* Set the FLL/PLL bypass mode to 2 */ if(fllpll == 0UL) { @@ -1361,7 +1359,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t } } } - + /* Prevent starting a new clock measurement until after we've come back from DeepSleep. */ preventCounting = true; } @@ -1382,7 +1380,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t rtnval = CY_SYSPM_TIMEOUT; } } - + if(rtnval == CY_SYSPM_SUCCESS) { /* for FLL and each PLL, */ @@ -1390,7 +1388,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t for (fllpll = 0ul; fllpll < (SRSS_NUM_PLL + 1ul); fllpll++) { /* If FLL or PLL is enabled, */ - if (0ul != ((fllpll == 0ul) ? (_FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_ENABLE, SRSS->CLK_FLL_CONFIG)) : + if (0ul != ((fllpll == 0ul) ? (_FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_ENABLE, SRSS->CLK_FLL_CONFIG)) : (_FLD2VAL(SRSS_CLK_PLL_CONFIG_ENABLE, SRSS->CLK_PLL_CONFIG[fllpll - 1ul])))) { /* check the record that this FLL or PLL's source was changed from ECO */ @@ -1399,7 +1397,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t /* Change this FLL or PLL source back to ECO */ (void)Cy_SysClk_ClkPathSetSource(fllpll, CY_SYSCLK_CLKPATH_IN_ECO); } - + /* Timeout wait for FLL or PLL to regain lock. */ uint32_t timout; for (timout = TIMEOUTK; timout != 0ul; timout--) @@ -1428,7 +1426,7 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t } } } - + /* Allow clock measurement. */ preventCounting = false; } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.h index 1b4acd85a4..d242f5eeb3 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysclk/cy_sysclk.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -18,25 +16,25 @@ * The System Clock (SysClk) driver contains the API for configuring system and * peripheral clocks. Firmware uses the API to configure , enable, or disable * a clock. -* +* * The clock system includes a variety of resources that can vary per device, including: * - Internal clock sources such as internal oscillators * - External clock sources such as crystal oscillators or a signal on an I/O pin * - Generated clocks such as an FLL, a PLL, and peripheral clocks * -* Consult the Technical Reference Manual for your device for details of the +* Consult the Technical Reference Manual for your device for details of the * clock system. * * The PDL defines clock system capabilities in:\n * devices\//include\_config.h. (E.g. -* devices/psoc6/psoc63/include/psoc63_config.h). +* devices/psoc6/psoc63/include/psoc63_config.h). * User-configurable clock speeds are defined in the file system_.h. * * As an illustration of the clocking system, the following diagram shows the * PSoC 63 series clock tree. The actual tree may vary depending on the device series. * ![](sysclk_tree.png) * -* The sysclk driver supports multiple peripheral clocks, as well as the fast +* The sysclk driver supports multiple peripheral clocks, as well as the fast * clock, slow clock, backup domain clock, timer clock, and pump clock. The API * for any given clock contains the functions to manage that clock. Functions * for clock measurement and trimming are also provided. @@ -222,7 +220,7 @@ * \{ * Clock paths are a series of multiplexers that allow a source clock * to drive multiple clocking resources down the chain. These paths are -* used for active domain clocks that are not operational during chip +* used for active domain clocks that are not operational during chip * deep-sleep, hibernate and off modes. Illustrated below is a diagram * of the clock paths for the PSoC 63 series, showing the first three * clock paths. The source clocks for these paths are highlighted in @@ -235,8 +233,8 @@ * - Digital Signal (DSI): Digital signal from a UDB source * * Some clock paths such as path 0 and path 1 have additional resources -* that can be utilized to provide a higher frequency clock. For example, -* path 0 source clock can be used as the reference clock for the FLL and +* that can be utilized to provide a higher frequency clock. For example, +* path 0 source clock can be used as the reference clock for the FLL and * path 1 source clock can be used as the reference clock for the PLL. * * ![](sysclk_path_source.png) @@ -259,7 +257,7 @@ * * - They may have different frequency ranges. * - The FLL starts up (locks) faster and consumes less current than the PLL. -* - The FLL accepts a source clock with lower frequency than PLL, such as the WCO (32 KHz). +* - The FLL accepts a source clock with lower frequency than PLL, such as the WCO (32 KHz). * - The FLL does not lock phase. The hardware consist of a counter with a * current-controlled oscillator (CCO). The counter counts the number of output * clock edges in a reference clock period and adjusts the CCO until the @@ -269,11 +267,11 @@ * ![](sysclk_fll.png) * * The SysClk driver supports two models for configuring the FLL. The first -* model is to call the Cy_SysClk_FllConfigure() function, which calculates the +* model is to call the Cy_SysClk_FllConfigure() function, which calculates the * necessary parameters for the FLL at run-time. This may be necessary for dynamic -* run-time changes to the FLL. However this method is slow as it needs to perform -* the calculation before configuring the FLL. The other model is to call -* Cy_SysClk_FllManualConfigure() function with pre-calculated parameter values. +* run-time changes to the FLL. However this method is slow as it needs to perform +* the calculation before configuring the FLL. The other model is to call +* Cy_SysClk_FllManualConfigure() function with pre-calculated parameter values. * This method is faster but requires prior knowledge of the necessary parameters. * Consult the device TRM for the FLL calculation equations. * @@ -291,15 +289,15 @@ * * - They may have different frequency ranges. * - The PLL starts up more slowly and consumes more current than the FLL. -* - The PLL requires a higher frequency source clock than PLL. +* - The PLL requires a higher frequency source clock than PLL. * ![](sysclk_pll.png) * * The SysClk driver supports two models for configuring the PLL. The first -* model is to call the Cy_SysClk_PllConfigure() function, which calculates the +* model is to call the Cy_SysClk_PllConfigure() function, which calculates the * necessary parameters for the PLL at run-time. This may be necessary for dynamic -* run-time changes to the PLL. However this method is slow as it needs to perform -* the calculation before configuring the PLL. The other model is to call -* Cy_SysClk_PllManualConfigure() function with pre-calculated parameter values. +* run-time changes to the PLL. However this method is slow as it needs to perform +* the calculation before configuring the PLL. The other model is to call +* Cy_SysClk_PllManualConfigure() function with pre-calculated parameter values. * This method is faster but requires prior knowledge of the necessary parameters. * Consult the device TRM for the PLL calculation equations. * @@ -309,15 +307,15 @@ * \defgroup group_sysclk_ilo Internal Low-Speed Oscillator (ILO) * \{ * The ILO operates with no external components and outputs a stable clock at -* 32.768 kHz nominal. The ILO is relatively low power and low accuracy. It is +* 32.768 kHz nominal. The ILO is relatively low power and low accuracy. It is * available in all power modes and can be used as a source for the Backup domain clock. * ![](sysclk_backup.png) * * To ensure the ILO remains active in Hibernate mode, and across power-on-reset -* (POR) or brown out detect (BOD), firmware must call Cy_SysClk_IloHibernateOn(). +* (POR) or brown out detect (BOD), firmware must call Cy_SysClk_IloHibernateOn(). * * Additionally, the ILO clock can be trimmed to +/- 1.5% of nominal frequency using -* a higher precision clock source. Use the \ref group_sysclk_calclk API to measure +* a higher precision clock source. Use the \ref group_sysclk_calclk API to measure * the current ILO frequency before trimming. * * \note The ILO is always the source clock for the \ref group_wdt. Therefore: @@ -331,18 +329,18 @@ * PILO provides a higher accuracy 32.768 kHz clock than the \ref group_sysclk_ilo "ILO". * When periodically calibrated using a high-accuracy clock such as the * \ref group_sysclk_eco "ECO", the PILO can achieve 250 ppm accuracy of nominal frequency. -* The PILO is capable of operating in device Active, Sleep and Deep-Sleep power modes. +* The PILO is capable of operating in device Active, Sleep and Deep-Sleep power modes. * It is not available in Hibernate mode. * * The PILO can be used as a source for the \ref group_sysclk_clk_lf. However, * because PILO is disabled in Hibernate mode, RTC timers cannot operate in this mode * when clocked using the PILO. Instead, either the \ref group_sysclk_ilo "ILO" or -* \ref group_sysclk_wco "WCO" should be used when hibernate operation is required. +* \ref group_sysclk_wco "WCO" should be used when hibernate operation is required. * * ![](sysclk_backup.png) * * Periodic calibration to a high-accuracy clock (such as ECO) is required to -* maintain accuracy. The application should use the functions described in the +* maintain accuracy. The application should use the functions described in the * \ref group_sysclk_calclk API to measure the current PILO frequency before trimming. * * \defgroup group_sysclk_pilo_funcs Functions @@ -382,14 +380,14 @@ * Entering and exiting low power modes require compatible clock configurations * to be set before entering low power and restored upon wake-up and exit. The * SysClk driver provides a Cy_SysClk_DeepSleepCallback() function to support -* deep-sleep mode entry. +* deep-sleep mode entry. * * This function can be called either by itself before initiating low-power mode -* entry or it can be used in conjunction with the SysPm driver as a registered -* callback. To do so, register this function as a callback before calling -* Cy_SysPm_DeepSleep(). Specify \ref CY_SYSPM_DEEPSLEEP as the callback type, +* entry or it can be used in conjunction with the SysPm driver as a registered +* callback. To do so, register this function as a callback before calling +* Cy_SysPm_DeepSleep(). Specify \ref CY_SYSPM_DEEPSLEEP as the callback type, * and call Cy_SysPm_RegisterCallback(). -* +* * \note If the FLL or PLL source is the ECO, this function must be called. * * \defgroup group_sysclk_pm_funcs Functions @@ -398,7 +396,7 @@ * \{ * The WCO is a highly accurate 32.768 kHz clock source capable of operating * in all power modes (excluding the Off mode). It is the primary clock source for -* the backup domain clock, which is used by the real-time clock (RTC). The +* the backup domain clock, which is used by the real-time clock (RTC). The * WCO can also be used as a source for the low-frequency clock to support other * low power mode peripherals. * @@ -407,12 +405,12 @@ * The WCO requires the configuration of the dedicated WCO pins (SRSS_WCO_IN_PIN, * SRSS_WCO_OUT_PIN). These must be configured as Analog Hi-Z drive modes and the * HSIOM selection set to GPIO. The WCO can also be used in bypass mode, where -* an external 32.768 kHz square wave is brought in directly through the +* an external 32.768 kHz square wave is brought in directly through the * SRSS_WCO_OUT_PIN pin. * * Some devices support a built-in clock supervisor (CSV) in the WCO. The clock -* supervisor detects if the WCO has been lost; that is, the WCO is no longer -* producing clock pulses. The CSV does this by checking to ensure there is at +* supervisor detects if the WCO has been lost; that is, the WCO is no longer +* producing clock pulses. The CSV does this by checking to ensure there is at * least one WCO clock pulse within a certain time window. The ILO or PILO can be * the supervising clock. Firmware can configure the CSV to trigger a fault, * a reset, or both after specified cycles of the supervising clock. @@ -436,9 +434,9 @@ * |CLK_HF[4]| Clock output on clk_ext pin (when used as an output) | * * ![](sysclk_hf.png) -* +* * High frequency clocks are sourced by path clocks, which should be configured -* first. An exception to this rule is CLK_HF[0], which cannot be disabled. +* first. An exception to this rule is CLK_HF[0], which cannot be disabled. * This divided clock drives the core processors and the peripherals in the system. * In order to update its clock source, CLK_HF[0] source must be selected without * disabling the clock. @@ -447,7 +445,7 @@ * * Some devices support a clock supervisor (CSV) for each root clock. These * can detect frequency loss, or monitor that the clock frequency stays within -* a specified range. The possible supervising clocks are IMO, ECO, or ALTHF. +* a specified range. The possible supervising clocks are IMO, ECO, or ALTHF. * Loss detection and frequency monitoring can be enabled or disabled independently. * Each has its own programmable action that occurs on detection of an error. * @@ -470,7 +468,7 @@ * \{ * The peripheral clock is a divided clock of CLK_HF0 (\ref group_sysclk_clk_hf "HF Clocks"). * It is the source clock for the \ref group_sysclk_clk_slow, and most active domain -* peripheral clocks (\ref group_sysclk_clk_peripheral). A divider value of 1~256 +* peripheral clocks (\ref group_sysclk_clk_peripheral). A divider value of 1~256 * can be used to further divide the CLK_HF[0] to a desired clock speed for the peripherals. * * ![](sysclk_peri.png) @@ -479,8 +477,8 @@ * \} * \defgroup group_sysclk_clk_peripheral Peripherals Clock Dividers * \{ -* There are multiple peripheral clock dividers that, in effect, create -* multiple separate peripheral clocks. The available dividers vary per device +* There are multiple peripheral clock dividers that, in effect, create +* multiple separate peripheral clocks. The available dividers vary per device * series. As an example, for the PSoC 63 series there are 29 dividers: * * - eight 8-bit dividers @@ -498,7 +496,7 @@ * * Each peripheral can connect to any one of the programmable dividers. A * particular peripheral clock divider can drive multiple peripherals. -* +* * The SysClk driver also supports phase aligning two peripheral clock dividers using * Cy_SysClk_PeriphEnablePhaseAlignDivider(). Alignment works for both integer * and fractional dividers. The divider to which a second divider is aligned @@ -510,8 +508,8 @@ * \defgroup group_sysclk_clk_slow Slow Clock * \{ * The slow clock is the source clock for the "slow" processor (e.g. Cortex-M0+ in PSoC 6). -* This clock is a divided version of the \ref group_sysclk_clk_peri, which in turn is -* a divided version of CLK_HF[0] (\ref group_sysclk_clk_hf "HF Clocks"). A divider +* This clock is a divided version of the \ref group_sysclk_clk_peri, which in turn is +* a divided version of CLK_HF[0] (\ref group_sysclk_clk_hf "HF Clocks"). A divider * value of 1~256 can be used to further divide the Peri clock to a desired clock speed * for the processor. * @@ -524,7 +522,7 @@ * The low-frequency clock is the source clock for the \ref group_mcwdt * and can be the source clock for \ref group_sysclk_clk_bak, which drives the * \ref group_rtc. -* +* * The low-frequency clock has three possible source clocks: * \ref group_sysclk_ilo "ILO", \ref group_sysclk_pilo "PILO", and * \ref group_sysclk_wco "WCO". @@ -536,10 +534,10 @@ * \} * \defgroup group_sysclk_clk_timer Timer Clock * \{ -* The timer clock can be a source for the alternative clock driving -* the \ref group_arm_system_timer. It can also be used as a reference clock +* The timer clock can be a source for the alternative clock driving +* the \ref group_arm_system_timer. It can also be used as a reference clock * for a counter in the \ref group_energy_profiler "Energy Profiler". -* +* * The timer clock is a divided clock of either the IMO or CLK_HF[0] * (\ref group_sysclk_clk_hf "HF Clocks"). * @@ -550,8 +548,8 @@ * \{ * The pump clock is a clock source used to provide analog precision in low voltage * applications. Depedning on the usage scenario, it may be required to drive the -* internal voltage pump for the Continuous Time Block mini (CTBm) in the analog -* subsystem. The pump clock is a divided clock of one of the clock paths +* internal voltage pump for the Continuous Time Block mini (CTBm) in the analog +* subsystem. The pump clock is a divided clock of one of the clock paths * (\ref group_sysclk_path_src). * * \defgroup group_sysclk_clk_pump_funcs Functions @@ -797,7 +795,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_FllDisable(void); * * Reports whether or not the FLL is locked. * -* \return +* \return * false = not locked
* true = locked * @@ -818,7 +816,7 @@ __STATIC_INLINE bool Cy_SysClk_FllLocked(void) * Reports whether or not the FLL lost its lock since the last time this function * was called. Clears the lost lock indicator. * -* \return +* \return * false = did not lose lock
* true = lost lock * @@ -905,7 +903,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_PllDisable(uint32_t clkPath); * * \param clkPath Selects which PLL to check. 1 is the first PLL; 0 is invalid. * -* \return +* \return * false = not locked
* true = locked * @@ -928,7 +926,7 @@ __STATIC_INLINE bool Cy_SysClk_PllLocked(uint32_t clkPath) * * \param clkPath Selects which PLL to check. 1 is the first PLL; 0 is invalid. * -* \return +* \return * false = did not lose lock
* true = lost lock * @@ -1042,7 +1040,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_IloDisable(void) * brown-out detect (BOD) event. * * \param on -* true = ILO stays on during hibernate or across XRES/BOD.
+* true = ILO stays on during hibernate or across XRES/BOD.
* false = ILO turns off for hibernate or XRES/BOD. * * \note Writes to the register/bit are ignored if the watchdog (WDT) is locked. @@ -1074,9 +1072,9 @@ __STATIC_INLINE uint32_t Cy_SysClk_PiloGetTrim(void); * Function Name: Cy_SysClk_PiloEnable ****************************************************************************//** * -* Enables the PILO. +* Enables the PILO. * -* \note This function blocks for 1 millisecond between enabling the PILO and +* \note This function blocks for 1 millisecond between enabling the PILO and * releasing the PILO reset. * * \funcusage @@ -1380,7 +1378,7 @@ __STATIC_INLINE cy_en_sysclk_status_t Cy_SysClk_WcoEnable(uint32_t timeoutus) * * Reports the status of the WCO_OK bit. * -* \return +* \return * true = okay
* false = not okay * @@ -2383,7 +2381,7 @@ __STATIC_INLINE void Cy_SysClk_ClkTimerDisable(void); ****************************************************************************//** * * Sets the source for the timer clock (clk_timer). The timer clock can be used -* as a source for SYSTICK as an alternate clock and one or more of the energy +* as a source for SYSTICK as an alternate clock and one or more of the energy * profiler counters. * * \param source \ref cy_en_clktimer_in_sources_t diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.c index 09c183c11e..5ed023e958 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.c @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_sysint.h" @@ -25,7 +23,7 @@ extern "C" { ****************************************************************************//** * * \brief Initializes the referenced interrupt by setting the priority and the -* interrupt vector. +* interrupt vector. * * Note that the interrupt vector will only be relocated if the vector table was * moved to __ramVectors in SRAM. Otherwise it is ignored. @@ -38,8 +36,8 @@ extern "C" { * \param userIsr * Address of the ISR * -* \return -* Initialization status +* \return +* Initialization status * * \funcusage * \snippet sysint/sysint_v1_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysInt_Init @@ -52,7 +50,7 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres if(NULL != config) { CY_ASSERT_L3(CY_SYSINT_IS_PRIORITY_VALID(config->intrPriority)); - + #if (CY_CPU_CORTEX_M0P) if (config->intrSrc > SysTick_IRQn) { @@ -60,9 +58,9 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres Cy_SysInt_SetIntSource(config->intrSrc, config->cm0pSrc); } #endif - + NVIC_SetPriority(config->intrSrc, config->intrPriority); - + /* Only set the new vector if it was moved to __ramVectors */ if (SCB->VTOR == (uint32_t)&__ramVectors) { @@ -75,7 +73,7 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres { status = CY_SYSINT_BAD_PARAM; } - + return(status); } @@ -88,7 +86,7 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t* config, cy_israddres * * \brief Configures the interrupt mux for the specified CM0+ NVIC channel. * -* Setting this value to "disconnected_IRQn" (240) disconnects the interrupt +* Setting this value to "disconnected_IRQn" (240) disconnects the interrupt * source and will effectively deactivate the interrupt. * * \param intrSrc @@ -161,9 +159,9 @@ void Cy_SysInt_SetIntSource(IRQn_Type intrSrc, cy_en_intr_t cm0pSrc) * \param intrSrc * NVIC mux number connected to the NVIC channel of the CM0+ core * -* \return -* Device interrupt source connected to the NVIC mux. A returned value of -* "disconnected_IRQn" (240) indicates that the interrupt source is disconnected. +* \return +* Device interrupt source connected to the NVIC mux. A returned value of +* "disconnected_IRQn" (240) indicates that the interrupt source is disconnected. * * \funcusage * \snippet sysint/sysint_v1_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysInt_SetIntSource @@ -178,7 +176,7 @@ cy_en_intr_t Cy_SysInt_GetIntSource(IRQn_Type intrSrc) cy_en_intr_t srcVal = disconnected_IRQn; uint32_t tempReg = 0UL; - + switch(regPos) { case CY_SYSINT_CM0P_MUX0: @@ -208,7 +206,7 @@ cy_en_intr_t Cy_SysInt_GetIntSource(IRQn_Type intrSrc) default: break; } - + srcVal = (cy_en_intr_t)tempReg; return (srcVal); } @@ -245,7 +243,7 @@ cy_en_intr_t Cy_SysInt_GetIntSource(IRQn_Type intrSrc) cy_israddress Cy_SysInt_SetVector(IRQn_Type intrSrc, cy_israddress userIsr) { cy_israddress prevIsr; - + /* Only set the new vector if it was moved to __ramVectors */ if (SCB->VTOR == (uint32_t)&__ramVectors) { @@ -269,7 +267,7 @@ cy_israddress Cy_SysInt_SetVector(IRQn_Type intrSrc, cy_israddress userIsr) * * \brief Gets the address of the current ISR vector for the Interrupt. * -* Note that for CM0+, this function returns the interrupt vector for the +* Note that for CM0+, this function returns the interrupt vector for the * interrupt mux output feeding into the NVIC. * * Note that this function relies on the assumption that the vector table is @@ -288,7 +286,7 @@ cy_israddress Cy_SysInt_SetVector(IRQn_Type intrSrc, cy_israddress userIsr) cy_israddress Cy_SysInt_GetVector(IRQn_Type intrSrc) { cy_israddress currIsr; - + /* Only return the SRAM ISR address if it was moved to __ramVectors */ if (SCB->VTOR == (uint32_t)&__ramVectors) { @@ -298,7 +296,7 @@ cy_israddress Cy_SysInt_GetVector(IRQn_Type intrSrc) { currIsr = __Vectors[CY_INT_IRQ_BASE + intrSrc]; } - + return currIsr; } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.h index c16d2a0e4c..918991101e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/sysint/cy_sysint.h @@ -7,10 +7,9 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* \copyright +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -27,33 +26,33 @@ * * \subsection group_sysint_initialization Initialization * -* Interrupt numbers are defined in a device-specific header file, such as +* Interrupt numbers are defined in a device-specific header file, such as * cy8c68237bz_ble.h. * * To configure an interrupt, call Cy_SysInt_Init(). Populate * the configuration structure (cy_stc_sysint_t) and pass it as a parameter * along with the ISR address. This initializes the interrupt and * instructs the CPU to jump to the specified ISR vector upon a valid trigger. -* -* On the Cortex M4, system interrupt source 'n' is connected to the +* +* On the Cortex M4, system interrupt source 'n' is connected to the * corresponding IRQn. Deep-sleep capable interrupts are allocated to deep-sleep -* capable IRQn channels. -* +* capable IRQn channels. +* * The CM0+ core supports up to 32 interrupt channels (IRQn 0-31). To allow all device * interrupts to be routable to the NVIC of this core, there is a 240:1 multiplexer * at each of the 32 NVIC channels. The configuration structure (cy_stc_sysint_t) * must specify the device interrupt source (cm0pSrc) that feeds into the CM0+ NVIC * mux (intrSrc). CM0+ NVIC channels 0-2 and 30-31 are reserved for system use. * -* In addition, on the CM0+ core, a deep-sleep capable interrupt must be routed -* to a deep-sleep capable IRQn channel. Otherwise it won't work. The device +* In addition, on the CM0+ core, a deep-sleep capable interrupt must be routed +* to a deep-sleep capable IRQn channel. Otherwise it won't work. The device * header file identifies which IRQn channels are deep-sleep capable. -* +* * \subsection group_sysint_enable Enable -* +* * After initializing an interrupt, use the CMSIS Core * NVIC_EnableIRQ() function -* to enable it. Given an initialization structure named config, +* to enable it. Given an initialization structure named config, * the function should be called as follows: * \code * NVIC_EnableIRQ(config.intrSrc) @@ -88,10 +87,10 @@ * channels 0-2 and 30-31 are reserved for system use, inter-processor communication, * and the crypto driver. Other IRQn channels (3-29) are available to the user application. * -* Deep-sleep wakeup-capability is determined by the CPUSS_CM0_DPSLP_IRQ_NR -* parameter, where the first N number of muxes (NvicMux0 ... NvicMuxN-1) have the -* capability to trigger deep-sleep interrupts. A deep-sleep capable interrupt source -* must be connected to one of these muxes to be able to trigger in deep-sleep. +* Deep-sleep wakeup-capability is determined by the CPUSS_CM0_DPSLP_IRQ_NR +* parameter, where the first N number of muxes (NvicMux0 ... NvicMuxN-1) have the +* capability to trigger deep-sleep interrupts. A deep-sleep capable interrupt source +* must be connected to one of these muxes to be able to trigger in deep-sleep. * Refer to the IRQn_Type definition in the device header. * * The default interrupt handler functions are defined as weak functions in the @@ -211,7 +210,7 @@ extern cy_israddress __ramVectors[]; /**< Relocated vector table in SRAM */ /** * SysInt Driver error codes */ -typedef enum +typedef enum { CY_SYSINT_SUCCESS = 0x00u, /**< Returned successful */ CY_SYSINT_BAD_PARAM = CY_SYSINT_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< Bad parameter was passed */ @@ -267,7 +266,7 @@ typedef struct { /* Parameter validation macros */ #define CY_SYSINT_IS_PRIORITY_VALID(intrPriority) ((uint32_t)(1UL << __NVIC_PRIO_BITS) > (intrPriority)) -#define CY_SYSINT_IS_VECTOR_VALID(userIsr) (NULL != (userIsr)) +#define CY_SYSINT_IS_VECTOR_VALID(userIsr) (NULL != (userIsr)) /** \endcond */ @@ -299,8 +298,8 @@ __STATIC_INLINE IRQn_Type Cy_SysInt_GetIntSourceNMI(void); * * \brief Sets the interrupt source of NMI. * -* The interrupt source must be a positive number. Setting the value to -* "unconnected_IRQn" (240) disconnects the interrupt source from the NMI. +* The interrupt source must be a positive number. Setting the value to +* "unconnected_IRQn" (240) disconnects the interrupt source from the NMI. * * \param intrSrc * Interrupt source @@ -309,7 +308,7 @@ __STATIC_INLINE IRQn_Type Cy_SysInt_GetIntSourceNMI(void); * \snippet sysint/sysint_v1_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysInt_SetIntSourceNMI * * \note The CM0+ NMI is used for performing system calls that execute out of ROM. -* Hence modification of the NMI source is strongly discouraged. However if it +* Hence modification of the NMI source is strongly discouraged. However if it * must be updated, the NMI source must be provided from the cy_en_intr_t enum * as it is a direct connection to the interrupt source. * @@ -331,7 +330,7 @@ __STATIC_INLINE void Cy_SysInt_SetIntSourceNMI(IRQn_Type intrSrc) * \brief Gets the interrupt source of the NMI. * * \return -* Interrupt Source. A value of "unconnected_IRQn" (240) means that there is no +* Interrupt Source. A value of "unconnected_IRQn" (240) means that there is no * interrupt source for the NMI, and it can be only be triggered through software. * * \funcusage @@ -349,7 +348,7 @@ __STATIC_INLINE IRQn_Type Cy_SysInt_GetIntSourceNMI(void) #if (!CY_CPU_CORTEX_M0P) || defined (CY_DOXYGEN) - + /******************************************************************************* * Function Name: Cy_SysInt_SoftwareTrig ****************************************************************************//** diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_ARM_STD/cy_syslib_mdk.s b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_ARM_STD/cy_syslib_mdk.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_ARM_STD/cy_syslib_mdk.s rename to targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_ARM_STD/cy_syslib_mdk.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S index 3b65b1c576..9a05b484a1 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ .syntax unified diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_IAR/cy_syslib_iar.s b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_IAR/cy_syslib_iar.S similarity index 100% rename from targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_IAR/cy_syslib_iar.s rename to targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/TOOLCHAIN_IAR/cy_syslib_iar.S diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.c index e7629d5748..8250f02b0b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.c @@ -6,10 +6,9 @@ * Provides system API implementation for the SysLib driver. * ******************************************************************************** -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* \copyright +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_syslib.h" @@ -64,7 +63,7 @@ * \param milliseconds The number of milliseconds to delay. * * \note The function calls \ref Cy_SysLib_DelayCycles() API to generate a delay. -* If the function parameter (milliseconds) is bigger than +* If the function parameter (milliseconds) is bigger than * CY_DELAY_MS_OVERFLOW constant, then an additional loop runs to prevent * an overflow in parameter passed to \ref Cy_SysLib_DelayCycles() API. * @@ -317,7 +316,7 @@ void Cy_SysLib_ClearResetReason(void) */ SRSS->RES_CAUSE = 0xFFFFFFFFU; SRSS->RES_CAUSE2 = 0xFFFFFFFFU; - + if(0U != _FLD2VAL(SRSS_PWR_HIBERNATE_TOKEN, SRSS->PWR_HIBERNATE)) { /* Clears PWR_HIBERNATE token */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.h index 54a482df48..28edddfa7f 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syslib/cy_syslib.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -48,7 +46,7 @@ * name and line number of the ASSERT into global variables, cy_assertFileName * and cy_assertLine . It then calls the Cy_SysLib_Halt() function. * \note Firmware can redefine the Cy_SysLib_AssertFailed() function for custom processing. -* +* * The PDL source code uses this assert mechanism extensively. It is recommended * that you enable asserts when debugging firmware. \n * Assertion Classes and Levels
@@ -75,15 +73,15 @@ * * Firmware defines which ASSERT class is enabled by defining CY_ASSERT_LEVEL. * This is a compiler command line argument, similar to how the DEBUG / NDEBUG -* macro is passed. \n +* macro is passed. \n * Enabling any class also enables any lower-numbered class. * CY_ASSERT_CLASS_3 is the default level, and it enables asserts for all three * classes. The following example shows the command-line option to enable all * the assert levels: * \code -D CY_ASSERT_LEVEL=CY_ASSERT_CLASS_3 \endcode * \note The use of special characters, such as spaces, parenthesis, etc. must -* be protected with quotes. -* +* be protected with quotes. +* * After CY_ASSERT_LEVEL is defined, firmware can use * one of the three level macros to make an assertion. For example, if the * parameter can vary between devices, firmware uses the L1 macro. @@ -626,7 +624,7 @@ typedef double float64_t; /**< Specific-length typedef for the basic numerical * Defines for the Assert Classes and Levels */ -/** +/** * Class 1 - The highest class, safety-critical functions which rely on parameters that could be * changed between different PSoC devices */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.c index 177b2421ff..598d592e5a 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_syspm.h" @@ -99,7 +97,7 @@ static void ClearVoltageBitForFlash(void); #define PERI_UDB_SLAVE_ENABLED ((uint32_t) (1UL << CY_MMIO_UDB_SLAVE_NR)) #endif /* CY_IP_MXUDB */ -/** The definition for the delay of the LDO after its output +/** The definition for the delay of the LDO after its output * voltage is changed */ #define LDO_STABILIZATION_DELAY_US (9U) @@ -214,7 +212,7 @@ uint32_t Cy_SysPm_ReadStatus(void) pmStatus |= CY_SYSPM_STATUS_CM0_ACTIVE; } - /* Check whether the device is in Low Power mode by reading + /* Check whether the device is in Low Power mode by reading * the Active Reference status */ if(0U != (_FLD2VAL(SRSS_PWR_CTL_ACT_REF_DIS, SRSS->PWR_CTL))) @@ -244,40 +242,40 @@ uint32_t Cy_SysPm_ReadStatus(void) * Prior to entering Sleep mode, all callback functions of the CY_SYSPM_SLEEP * type with the CY_SYSPM_CHECK_READY parameter are called. This allows the driver * to signal whether it is ready to enter the Low Power mode. If any of the -* callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY parameter +* callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY parameter * returns CY_SYSPM_FAIL, the remaining callback of the CY_SYSPM_SLEEP type with * the CY_SYSPM_CHECK_READY parameter calls are skipped. -* After CY_SYSPM_FAIL, all the CY_SYSPM_SLEEP callbacks with -* the CY_SYSPM_CHECK_FAIL parameter are executed. These are the callbacks -* of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY -* parameter that were previously executed before getting CY_SYSPM_FAIL. -* The Sleep mode is not entered and the Cy_SysPm_Sleep() function returns +* After CY_SYSPM_FAIL, all the CY_SYSPM_SLEEP callbacks with +* the CY_SYSPM_CHECK_FAIL parameter are executed. These are the callbacks +* of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_READY +* parameter that were previously executed before getting CY_SYSPM_FAIL. +* The Sleep mode is not entered and the Cy_SysPm_Sleep() function returns * CY_SYSPM_FAIL. * -* If all of the callbacks of the CY_SYSPM_SLEEP type with the -* CY_SYSPM_CHECK_READY parameter calls return CY_SYSPM_SUCCESS, then all -* callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_FAIL parameters -* calls are skipped. Also, all callbacks of the CY_SYSPM_SLEEP type and -* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the +* If all of the callbacks of the CY_SYSPM_SLEEP type with the +* CY_SYSPM_CHECK_READY parameter calls return CY_SYSPM_SUCCESS, then all +* callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_CHECK_FAIL parameters +* calls are skipped. Also, all callbacks of the CY_SYSPM_SLEEP type and +* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the * peripherals to prepare for Sleep. The CPU then enters Sleep mode. * This is a CPU-centric power mode. This means that the CPU has entered Sleep -* mode and its main clock is removed. It is identical to Active from a -* peripheral point of view. Any enabled interrupt can cause a wakeup from +* mode and its main clock is removed. It is identical to Active from a +* peripheral point of view. Any enabled interrupt can cause a wakeup from * Sleep mode. * -* After a wakeup from Sleep, all of the registered callbacks of the -* CY_SYSPM_SLEEP type and with the CY_SYSPM_AFTER_TRANSITION parameter are -* executed to return the peripherals to Active operation. The Cy_SysPm_Sleep() +* After a wakeup from Sleep, all of the registered callbacks of the +* CY_SYSPM_SLEEP type and with the CY_SYSPM_AFTER_TRANSITION parameter are +* executed to return the peripherals to Active operation. The Cy_SysPm_Sleep() * function returns CY_SYSPM_SUCCESS. -* No callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_BEFORE_TRANSITION -* parameter or callbacks of the CY_SYSPM_SLEEP type and -* CY_SYSPM_AFTER_TRANSITION parameter callbacks are executed if Sleep mode +* No callbacks of the CY_SYSPM_SLEEP type with the CY_SYSPM_BEFORE_TRANSITION +* parameter or callbacks of the CY_SYSPM_SLEEP type and +* CY_SYSPM_AFTER_TRANSITION parameter callbacks are executed if Sleep mode * is not entered. * -* \note The last callback that returned CY_SYSPM_FAIL is not executed with the +* \note The last callback that returned CY_SYSPM_FAIL is not executed with the * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. * -* The return values from executed callback functions with the +* The return values from executed callback functions with the * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * modes are ignored. * @@ -309,13 +307,13 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) } /* The device (core) can switch into the sleep power mode only when - * all executed registered callback functions with the CY_SYSPM_CHECK_READY + * all executed registered callback functions with the CY_SYSPM_CHECK_READY * parameter returned CY_SYSPM_SUCCESS. */ if(retVal == CY_SYSPM_SUCCESS) { - /* Call the registered callback functions with - * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be + /* Call the registered callback functions with + * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be * CY_SYSPM_SUCCESS. */ interruptState = Cy_SysLib_EnterCriticalSection(); @@ -337,7 +335,7 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) #if(0u != CY_CPU_CORTEX_M4) - /* For the CM4 core, the WFE instructions are called twice. + /* For the CM4 core, the WFE instructions are called twice. * The second WFE call clears the Event register of CM4 core. * Cypress ID #279077. */ @@ -351,8 +349,8 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) } Cy_SysLib_ExitCriticalSection(interruptState); - /* Call the registered callback functions with the - * CY_SYSPM_AFTER_TRANSITION parameter. The return value should be + /* Call the registered callback functions with the + * CY_SYSPM_AFTER_TRANSITION parameter. The return value should be * CY_SYSPM_SUCCESS. */ if(0U != curRegisteredCallbacks) @@ -363,7 +361,7 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) else { /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to - * undo everything done in the callback with the CY_SYSPM_CHECK_READY + * undo everything done in the callback with the CY_SYSPM_CHECK_READY * parameter. The return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysPm_ExecuteCallback(CY_SYSPM_SLEEP, CY_SYSPM_CHECK_FAIL); @@ -380,32 +378,32 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) * Sets a CPU core to the Deep Sleep mode. * * Puts the core into the Deep Sleep power mode. Prior to entering the Deep Sleep -* mode, all callbacks of the CY_SYSPM_DEEPSLEEP type with the -* CY_SYSPM_CHECK_READY parameter registered callbacks are called, allowing the -* driver to signal whether it is ready to enter the power mode. If any -* CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter call returns -* CY_SYSPM_FAIL, the remaining callback CY_SYSPM_DEEPSLEEP type with the +* mode, all callbacks of the CY_SYSPM_DEEPSLEEP type with the +* CY_SYSPM_CHECK_READY parameter registered callbacks are called, allowing the +* driver to signal whether it is ready to enter the power mode. If any +* CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY parameter call returns +* CY_SYSPM_FAIL, the remaining callback CY_SYSPM_DEEPSLEEP type with the * CY_SYSPM_CHECK_READY parameter calls are skipped. After a CY_SYSPM_FAIL, all -* of the callbacks of the CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL -* parameter are executed that correspond to the callbacks with -* CY_SYSPM_DEEPSLEEP type with CY_SYSPM_CHECK_READY parameter calls that +* of the callbacks of the CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL +* parameter are executed that correspond to the callbacks with +* CY_SYSPM_DEEPSLEEP type with CY_SYSPM_CHECK_READY parameter calls that * occurred up to the point of failure. -* The Deep Sleep mode is not entered and the Cy_SysPm_DeepSleep() function +* The Deep Sleep mode is not entered and the Cy_SysPm_DeepSleep() function * returns CY_SYSPM_FAIL. * * If all callbacks of the CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_READY -* parameter calls return CY_SYSPM_SUCCESS, then all callbacks of the -* CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL parameter calls are -* skipped and all callbacks of the CY_SYSPM_DEEPSLEEP type with the -* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the +* parameter calls return CY_SYSPM_SUCCESS, then all callbacks of the +* CY_SYSPM_DEEPSLEEP type with the CY_SYSPM_CHECK_FAIL parameter calls are +* skipped and all callbacks of the CY_SYSPM_DEEPSLEEP type with the +* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed, allowing the * peripherals to prepare for Deep Sleep. -* The Deep Sleep mode is then entered. Any enabled interrupt can cause a wakeup +* The Deep Sleep mode is then entered. Any enabled interrupt can cause a wakeup * from the Deep Sleep mode. * -* \note The last callback which returned CY_SYSPM_FAIL is not executed with the +* \note The last callback which returned CY_SYSPM_FAIL is not executed with the * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. * -* The return values from executed callback functions with the +* The return values from executed callback functions with the * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * modes are ignored. * @@ -414,55 +412,55 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) * Sleep mode instead and automatically enter Deep Sleep mode when the * system is ready. * -* The system puts the whole device into Deep Sleep mode when all the -* processor(s) is (are) in Deep Sleep, there are no busy peripherals, the -* debugger is not active, and the Deep Sleep circuits are +* The system puts the whole device into Deep Sleep mode when all the +* processor(s) is (are) in Deep Sleep, there are no busy peripherals, the +* debugger is not active, and the Deep Sleep circuits are * ready (PWR_CONTROL.LPM_READY=1). * * The peripherals that do not need a clock or that receive a clock from their * external interface (e.g. I2C/SPI) continue operating. All circuits using the -* current from Vccdpslp supply are under the current limitation, which is +* current from Vccdpslp supply are under the current limitation, which is * controlled by the Deep Sleep regulator. * * Wakeup occurs when an interrupt asserts from a Deep Sleep active peripheral. * For more details, see the corresponding peripheral's datasheet. * -* \note -* For multi-core devices, the second core, which did not participate in -* device wakeup, continues to execute the Deep Sleep instructions. Any Deep Sleep +* \note +* For multi-core devices, the second core, which did not participate in +* device wakeup, continues to execute the Deep Sleep instructions. Any Deep Sleep * capable interrupt routed to this core can wake it. * * For more details about switching into the Deep Sleep power mode and debug, * refer to the device TRM. * * A normal wakeup from the Deep Sleep power mode returns to either LPActive or -* Active, depending on the previous state and programmed behavior for the +* Active, depending on the previous state and programmed behavior for the * particular wakeup interrupt. * * After wakeup from Deep Sleep, all of the registered callbacks with -* CY_SYSPM_DEEPSLEEP type with CY_SYSPM_AFTER_TRANSITION are executed to return -* peripherals to Active operation. The Cy_SysPm_DeepSleep() function returns -* CY_SYSPM_SUCCESS. No callbacks are executed with CY_SYSPM_DEEPSLEEP type with -* CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter, if +* CY_SYSPM_DEEPSLEEP type with CY_SYSPM_AFTER_TRANSITION are executed to return +* peripherals to Active operation. The Cy_SysPm_DeepSleep() function returns +* CY_SYSPM_SUCCESS. No callbacks are executed with CY_SYSPM_DEEPSLEEP type with +* CY_SYSPM_BEFORE_TRANSITION or CY_SYSPM_AFTER_TRANSITION parameter, if * Deep Sleep mode was not entered. * * \param waitFor Selects wait for action. See \ref cy_en_syspm_waitfor_t. * * \sideeffect -* This side effect is applicable only for devices with UDB IP block available. +* This side effect is applicable only for devices with UDB IP block available. * You can obtain unpredictable behavior of the UDB block after the device wakeup * from Deep Sleep. * Unpredictable behavior scenario: * * The first core saves non-retained UDB configuration registers and goes into * the Deep Sleep (Cy_SysPm_DeepSleep() function). -* * These non-retained UDB configuration registers are modified in runtime by +* * These non-retained UDB configuration registers are modified in runtime by * another (second) active core. * * The second core saves non-retained UDB configuration registers and goes into * the Deep Sleep (Cy_SysPm_DeepSleep() function). * These conditions save different values of the non-retained UDB configuration -* registers. The prevented scenario: on the first core wakeup, these registers -* are restored by the values saved on the first core. After the second core -* wakeup, these registers are "reconfigured" by the values saved on the second +* registers. The prevented scenario: on the first core wakeup, these registers +* are restored by the values saved on the first core. After the second core +* wakeup, these registers are "reconfigured" by the values saved on the second * core. * Be aware of this situation. * @@ -479,11 +477,11 @@ cy_en_syspm_status_t Cy_SysPm_Sleep(cy_en_syspm_waitfor_t waitFor) * Entered status, see \ref cy_en_syspm_status_t. * * \note -* The FLL/PLL are not restored right before the CPU starts executing the -* instructions after Deep Sleep. This can affect the peripheral which is +* The FLL/PLL are not restored right before the CPU starts executing the +* instructions after Deep Sleep. This can affect the peripheral which is * driven by PLL/FLL. Ensure that the PLL/FLL were properly restored (locked) -* after the wakeup from Deep Sleep. Refer to the -* \ref group_sysclk driver documentation driver for the information how to +* after the wakeup from Deep Sleep. Refer to the +* \ref group_sysclk driver documentation driver for the information how to * read the PLL/FLL lock statuses. * * \funcusage @@ -497,7 +495,7 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) CY_ASSERT_L3(CY_SYSPM_IS_WAIT_FOR_VALID(waitFor)); - /* Call the registered callback functions with + /* Call the registered callback functions with * the CY_SYSPM_CHECK_READY parameter. */ if(0U != curRegisteredCallbacks) @@ -511,8 +509,8 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) */ if(retVal == CY_SYSPM_SUCCESS) { - /* Call the registered callback functions with the - * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be + /* Call the registered callback functions with the + * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be * CY_SYSPM_SUCCESS. */ interruptState = Cy_SysLib_EnterCriticalSection(); @@ -547,7 +545,7 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) curLdoVoltage = Cy_SysPm_LdoGetVoltage(); - /* Configure additional wakeup delay from Deep Sleep + /* Configure additional wakeup delay from Deep Sleep * for 1.1 V LDO. Cypress ID #290172. */ if ((Cy_SysPm_LdoIsEnabled()) && (CY_SYSPM_LDO_VOLTAGE_1_1V == curLdoVoltage)) @@ -575,7 +573,7 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) Cy_SysLib_ExitCriticalSection(interruptState); - /* Call the registered callback functions with the CY_SYSPM_AFTER_TRANSITION + /* Call the registered callback functions with the CY_SYSPM_AFTER_TRANSITION * parameter. The return value should be CY_SYSPM_SUCCESS. */ if(0U != curRegisteredCallbacks) @@ -585,8 +583,8 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) } else { - /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to - * undo everything done in the callback with the CY_SYSPM_CHECK_READY + /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to + * undo everything done in the callback with the CY_SYSPM_CHECK_READY * parameter. The return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysPm_ExecuteCallback(CY_SYSPM_DEEPSLEEP, CY_SYSPM_CHECK_FAIL); @@ -602,52 +600,52 @@ cy_en_syspm_status_t Cy_SysPm_DeepSleep(cy_en_syspm_waitfor_t waitFor) * * Sets the device into Hibernate mode. * -* Puts the core into the Hibernate power mode. Prior to entering Hibernate -* mode, all callbacks of the CY_SYSPM_HIBERNATE type are executed. -* First, callbacks of the CY_SYSPM_HIBERNATE type and with -* CY_SYSPM_CHECK_READY parameter are called, allowing the driver to signal if it -* is not ready to enter the power mode. If any of the callbacks of the -* CY_SYSPM_HIBERNATE type with the CY_SYSPM_CHECK_READY parameter call returns -* CY_SYSPM_FAIL, the remaining CY_SYSPM_HIBERNATE callbacks with the -* CY_SYSPM_CHECK_READY parameter calls are skipped. After CY_SYSPM_FAIL, all -* of the CY_SYSPM_HIBERNATE callbacks with CY_SYSPM_CHECK_FAIL parameter are -* executed that correspond to the CY_SYSPM_HIBERNATE callbacks with +* Puts the core into the Hibernate power mode. Prior to entering Hibernate +* mode, all callbacks of the CY_SYSPM_HIBERNATE type are executed. +* First, callbacks of the CY_SYSPM_HIBERNATE type and with +* CY_SYSPM_CHECK_READY parameter are called, allowing the driver to signal if it +* is not ready to enter the power mode. If any of the callbacks of the +* CY_SYSPM_HIBERNATE type with the CY_SYSPM_CHECK_READY parameter call returns +* CY_SYSPM_FAIL, the remaining CY_SYSPM_HIBERNATE callbacks with the +* CY_SYSPM_CHECK_READY parameter calls are skipped. After CY_SYSPM_FAIL, all +* of the CY_SYSPM_HIBERNATE callbacks with CY_SYSPM_CHECK_FAIL parameter are +* executed that correspond to the CY_SYSPM_HIBERNATE callbacks with * CY_SYSPM_CHECK_READY parameter calls that occurred up to the point of failure. -* Hibernate mode is not entered and the Cy_SysPm_Hibernate() function +* Hibernate mode is not entered and the Cy_SysPm_Hibernate() function * returns CY_SYSPM_FAIL. * -* If all CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_CHECK_READY parameter -* calls return CY_SYSPM_SUCCESS, then all CY_SYSPM_HIBERNATE callbacks with -* CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_HIBERNATE callbacks -* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed allowing the -* peripherals to prepare for Hibernate. The I/O output state is frozen and -* Hibernate mode is then entered. In Hibernate mode, all internal supplies -* are off and no internal state is retained. There is no handshake with the +* If all CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_CHECK_READY parameter +* calls return CY_SYSPM_SUCCESS, then all CY_SYSPM_HIBERNATE callbacks with +* CY_SYSPM_CHECK_FAIL calls are skipped and all CY_SYSPM_HIBERNATE callbacks +* CY_SYSPM_BEFORE_TRANSITION parameter calls are executed allowing the +* peripherals to prepare for Hibernate. The I/O output state is frozen and +* Hibernate mode is then entered. In Hibernate mode, all internal supplies +* are off and no internal state is retained. There is no handshake with the * CPUs and the chip will enter Hibernate immediately. * -* The I/O output state is frozen and Hibernate mode is then -* entered. In Hibernate mode, all internal supplies are off and no +* The I/O output state is frozen and Hibernate mode is then +* entered. In Hibernate mode, all internal supplies are off and no * internal state is retained. -* For multi-core devices there is no handshake with the CPUs and the chip +* For multi-core devices there is no handshake with the CPUs and the chip * will enter Hibernate power mode immediately. * -* \note The last callback that returned CY_SYSPM_FAIL is not executed with the +* \note The last callback that returned CY_SYSPM_FAIL is not executed with the * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. * -* The return values from executed callback functions with the +* The return values from executed callback functions with the * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * modes are ignored. * * A wakeup from Hibernate is triggered by toggling the wakeup pin(s), a WDT -* match, or back-up domain alarm expiration, depending on how the they were +* match, or back-up domain alarm expiration, depending on how the they were * configured. A wakeup causes a normal boot procedure. * To configure the wakeup pin(s), a Digital Input Pin must be configured, and * resistively pulled up or down to the inverse state of the wakeup polarity. To * distinguish a wakeup from Hibernate mode and a general reset event, the -* Cy_SysLib_GetResetReason() function can be used. The wakeup pin and low-power -* comparators are active-low by default. The wakeup pin or the LPComparators +* Cy_SysLib_GetResetReason() function can be used. The wakeup pin and low-power +* comparators are active-low by default. The wakeup pin or the LPComparators * polarity can be changed with the \ref Cy_SysPm_SetHibernateWakeupSource() function. -* This function call will not return if Hibernate mode is entered. +* This function call will not return if Hibernate mode is entered. * The CY_SYSPM_HIBERNATE callbacks with the CY_SYSPM_AFTER_TRANSITION parameter * are never executed. * @@ -667,7 +665,7 @@ cy_en_syspm_status_t Cy_SysPm_Hibernate(void) { cy_en_syspm_status_t retVal = CY_SYSPM_SUCCESS; - /* Call the registered callback functions with the + /* Call the registered callback functions with the * CY_SYSPM_CHECK_READY parameter */ if(0U != curRegisteredCallbacks) @@ -681,7 +679,7 @@ cy_en_syspm_status_t Cy_SysPm_Hibernate(void) */ if(retVal == CY_SYSPM_SUCCESS) { - /* Call registered callback functions with CY_SYSPM_BEFORE_TRANSITION + /* Call registered callback functions with CY_SYSPM_BEFORE_TRANSITION * parameter. Return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysLib_EnterCriticalSection(); @@ -695,36 +693,36 @@ cy_en_syspm_status_t Cy_SysPm_Hibernate(void) * Wakeup from a general reset event. * Preserve the wakeup source(s) configuration. */ - SRSS->PWR_HIBERNATE = + SRSS->PWR_HIBERNATE = (SRSS->PWR_HIBERNATE & CY_SYSPM_PWR_WAKEUP_HIB_MASK) | CY_SYSPM_PWR_TOKEN_HIBERNATE; /* Freeze I/O-Cells to save I/O-Cell state */ Cy_SysPm_IoFreeze(); SRSS->PWR_HIBERNATE |= CY_SYSPM_PWR_SET_HIBERNATE; - + /* Read register to make sure it is settled */ (void) SRSS->PWR_HIBERNATE; /* Wait for transition */ __WFI(); - /* The callback functions calls with the CY_SYSPM_AFTER_TRANSITION - * parameter in the Hibernate power mode are not applicable as device + /* The callback functions calls with the CY_SYSPM_AFTER_TRANSITION + * parameter in the Hibernate power mode are not applicable as device * wake-up was made on device reboot. */ - /* A wakeup from Hibernate is performed by toggling of the wakeup - * pins, or WDT matches, or Backup domain alarm expires. This depends on what + /* A wakeup from Hibernate is performed by toggling of the wakeup + * pins, or WDT matches, or Backup domain alarm expires. This depends on what * item is configured in the hibernate register. After a wakeup event, a - * normal Boot procedure occurs. + * normal Boot procedure occurs. * There is no need to exit from the critical section. */ } else { - /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to - * undo everything done in the callback with the CY_SYSPM_CHECK_READY + /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to + * undo everything done in the callback with the CY_SYSPM_CHECK_READY * parameter. The return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysPm_ExecuteCallback(CY_SYSPM_HIBERNATE, CY_SYSPM_CHECK_FAIL); @@ -738,79 +736,79 @@ cy_en_syspm_status_t Cy_SysPm_Hibernate(void) * Function Name: Cy_SysPm_EnterLowPowerMode ****************************************************************************//** * -* This function switches only the supply regulators into Low Power mode. -* You must configure -* clocks and/or peripherals to meet current load limitations in LP Active. +* This function switches only the supply regulators into Low Power mode. +* You must configure +* clocks and/or peripherals to meet current load limitations in LP Active. * For more details about power modes and current load limitations refer to * the device technical reference manual (TRM). * * The LPActive mode is similar to the Active mode. -* The difference is that the current is limited and some functions have limited +* The difference is that the current is limited and some functions have limited * features/performance. * -* The key feature of the Low Power mode is the limited current. Restrictions are -* placed on the clock frequencies and allow the peripherals to achieve +* The key feature of the Low Power mode is the limited current. Restrictions are +* placed on the clock frequencies and allow the peripherals to achieve * a current limit. * -* Before entering Low Power mode, you must configure the system so -* the total current drawn from Vccd is less that the value presented in the -* technical reference manual (TRM). Refer to the TRM for the maximum load for +* Before entering Low Power mode, you must configure the system so +* the total current drawn from Vccd is less that the value presented in the +* technical reference manual (TRM). Refer to the TRM for the maximum load for * low power operation and clock limitations in Low Power mode with different * core supply regulator voltages. * * * Peripherals can use the knowledge of the LPActive mode to make * trade-offs that consume less current. For more details, see the corresponding * peripherals' datasheet. -* * High-speed clock sources are available with the appropriate pre-divider +* * High-speed clock sources are available with the appropriate pre-divider * settings to limit the system current. -* Refer to the TRM for the maximum frequency values for low power operation +* Refer to the TRM for the maximum frequency values for low power operation * using different Core Regulators' output voltages. * * This function puts the device into Low Power mode. Prior to entering Low Power mode, -* all the registered CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY -* parameter are called. This allows the driver to signal if it is not ready to +* all the registered CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY +* parameter are called. This allows the driver to signal if it is not ready to * enter Low Power mode. If any CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the * CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, the remaining -* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_CHECK_READY parameter +* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_CHECK_READY parameter * calls are skipped. * -* After a CY_SYSPM_FAIL, all of the CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with -* CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the -* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY parameter calls -* that occurred up to the point of failure. Low Power mode is not entered and +* After a CY_SYSPM_FAIL, all of the CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with +* CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the +* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY parameter calls +* that occurred up to the point of failure. Low Power mode is not entered and * the Cy_SysPm_EnterLowPowerMode() function returns CY_SYSPM_FAIL. * -* If all CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_CHECK_READY -* parameter calls return CY_SYSPM_SUCCESS, then all CY_SYSPM_ENTER_LOWPOWER_MODE -* callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all +* If all CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_CHECK_READY +* parameter calls return CY_SYSPM_SUCCESS, then all CY_SYSPM_ENTER_LOWPOWER_MODE +* callbacks with CY_SYSPM_CHECK_FAIL calls are skipped and all * CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter * calls are executed. This allows the peripherals to prepare for low power. * Low Power mode is then entered. * -* After entering Low Power mode, all of the registered -* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_AFTER_TRANSITION parameter -* are executed to complete preparing the peripherals for low power operation. -* The Cy_SysPm_EnterLowPowerMode() function returns CY_SYSPM_SUCCESS. -* No CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION or +* After entering Low Power mode, all of the registered +* CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_AFTER_TRANSITION parameter +* are executed to complete preparing the peripherals for low power operation. +* The Cy_SysPm_EnterLowPowerMode() function returns CY_SYSPM_SUCCESS. +* No CY_SYSPM_ENTER_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION or * CY_SYSPM_AFTER_TRANSITION parameter are executed, if Low Power mode is not * entered. * -* \note The last callback that returned CY_SYSPM_FAIL is not executed with +* \note The last callback that returned CY_SYSPM_FAIL is not executed with * the CY_SYSPM_CHECK_FAIL parameter because of the FAIL. * -* The return values from executed callback functions with the +* The return values from executed callback functions with the * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * modes are ignored. * -* \note The callbacks are not executed if the device is already not in +* \note The callbacks are not executed if the device is already not in * Low Power mode. * * \return * See \ref cy_en_syspm_status_t.
-* CY_SYSPM_SUCCESS - Entered the LPActive mode or the device is already +* CY_SYSPM_SUCCESS - Entered the LPActive mode or the device is already * in LPActive.
-* CY_SYSPM_FAIL - The LPActive mode is not entered or low power circuits -* are not ready to enter Low Power mode. +* CY_SYSPM_FAIL - The LPActive mode is not entered or low power circuits +* are not ready to enter Low Power mode. * * \funcusage * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_EnterLowPowerMode @@ -824,12 +822,12 @@ cy_en_syspm_status_t Cy_SysPm_EnterLowPowerMode(void) /* Check whether device is in the low power mode. */ if(0U == (_FLD2VAL(SRSS_PWR_CTL_ACT_REF_DIS, SRSS->PWR_CTL))) { - /* The entering into the low power mode is permitted when low + /* The entering into the low power mode is permitted when low * power circuits are ready to enter into the low power mode. */ if(0U != _FLD2VAL(SRSS_PWR_CTL_LPM_READY, SRSS->PWR_CTL)) { - /* Call the registered callback functions with the + /* Call the registered callback functions with the * CY_SYSPM_CHECK_READY parameter. */ if(0U != curRegisteredCallbacks) @@ -838,14 +836,14 @@ cy_en_syspm_status_t Cy_SysPm_EnterLowPowerMode(void) } /* The device (core) can switch into the low power mode only when - * all executed registered callback functions with the + * all executed registered callback functions with the * CY_SYSPM_CHECK_READY parameter returned CY_SYSPM_SUCCESS. */ if(retVal == CY_SYSPM_SUCCESS) { - - /* Call the registered callback functions with the - * CY_SYSPM_BEFORE_TRANSITION parameter. The return value + + /* Call the registered callback functions with the + * CY_SYSPM_BEFORE_TRANSITION parameter. The return value * should be CY_SYSPM_SUCCESS. */ interruptState = Cy_SysLib_EnterCriticalSection(); @@ -882,8 +880,8 @@ cy_en_syspm_status_t Cy_SysPm_EnterLowPowerMode(void) Cy_SysLib_ExitCriticalSection(interruptState); - /* Call the registered callback functions with the - * CY_SYSPM_AFTER_TRANSITION parameter. The return value + /* Call the registered callback functions with the + * CY_SYSPM_AFTER_TRANSITION parameter. The return value * should be CY_SYSPM_SUCCESS. */ if(0U != curRegisteredCallbacks) @@ -893,8 +891,8 @@ cy_en_syspm_status_t Cy_SysPm_EnterLowPowerMode(void) } else { - /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to - * undo everything done in the callback with the CY_SYSPM_CHECK_READY + /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to + * undo everything done in the callback with the CY_SYSPM_CHECK_READY * parameter. The return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysPm_ExecuteCallback(CY_SYSPM_ENTER_LOWPOWER_MODE, CY_SYSPM_CHECK_FAIL); @@ -921,51 +919,51 @@ cy_en_syspm_status_t Cy_SysPm_EnterLowPowerMode(void) * Exits the device from Low Power mode. * * Returns the device to the Active mode. In the Active power mode, the operating -* current can be increased to the normal mode limit. The clock frequencies also -* can be increased to the normal mode limit. Refer to the device TRM for the +* current can be increased to the normal mode limit. The clock frequencies also +* can be increased to the normal mode limit. Refer to the device TRM for the * current and frequency limitations in the Active power mode. -* -* Prior to exiting Low Power mode, all the registered CY_SYSPM_EXIT_LOWPOWER_MODE +* +* Prior to exiting Low Power mode, all the registered CY_SYSPM_EXIT_LOWPOWER_MODE * callbacks with the CY_SYSPM_CHECK_READY parameter are called. This allows -* the driver to signal if it is not ready to exit -* Low Power mode. If any CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with +* the driver to signal if it is not ready to exit +* Low Power mode. If any CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with * the CY_SYSPM_CHECK_READY parameter call returns CY_SYSPM_FAIL, the remaining * CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with the CY_SYSPM_CHECK_READY parameter calls -* are skipped. After a CY_SYSPM_FAIL, all of the CY_SYSPM_EXIT_LOWPOWER_MODE callbacks +* are skipped. After a CY_SYSPM_FAIL, all of the CY_SYSPM_EXIT_LOWPOWER_MODE callbacks * with CY_SYSPM_CHECK_FAIL parameter are executed that correspond to the * CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY parameter calls that -* occurred up to the point of failure. Active mode is not entered and the +* occurred up to the point of failure. Active mode is not entered and the * Cy_SysPm_ExitLowPowerMode() function returns CY_SYSPM_FAIL. * -* If all CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY calls return -* CY_SYSPM_SUCCESS, then all the CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with -* the CY_SYSPM_CHECK_FAIL parameter calls are skipped and all -* CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter -* calls are executed allowing the peripherals to prepare for Active mode. +* If all CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with CY_SYSPM_CHECK_READY calls return +* CY_SYSPM_SUCCESS, then all the CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with +* the CY_SYSPM_CHECK_FAIL parameter calls are skipped and all +* CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION parameter +* calls are executed allowing the peripherals to prepare for Active mode. * Low Power mode is then exited. * -* After exiting Low Power mode, all of the registered callbacks that have -* type CY_SYSPM_EXIT_LOWPOWER_MODE are executed with the CY_SYSPM_AFTER_TRANSITION -* parameter to complete preparing the peripherals for Active mode operation. -* The Cy_SysPm_ExitLowPowerMode() function returns CY_SYSPM_SUCCESS. -* No CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION or -* CY_SYSPM_AFTER_TRANSITION parameter are executed if Low Power mode is +* After exiting Low Power mode, all of the registered callbacks that have +* type CY_SYSPM_EXIT_LOWPOWER_MODE are executed with the CY_SYSPM_AFTER_TRANSITION +* parameter to complete preparing the peripherals for Active mode operation. +* The Cy_SysPm_ExitLowPowerMode() function returns CY_SYSPM_SUCCESS. +* No CY_SYSPM_EXIT_LOWPOWER_MODE callbacks with the CY_SYSPM_BEFORE_TRANSITION or +* CY_SYSPM_AFTER_TRANSITION parameter are executed if Low Power mode is * not exited. * -* \note The last callback that returned CY_SYSPM_FAIL is not executed with the +* \note The last callback that returned CY_SYSPM_FAIL is not executed with the * CY_SYSPM_CHECK_FAIL parameter because of the FAIL. * -* The return values from executed callback functions with the +* The return values from executed callback functions with the * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * modes are ignored. * -* \note The callbacks are not executed if the device is not already in Low +* \note The callbacks are not executed if the device is not already in Low * Power mode. * * \return * See \ref cy_en_syspm_status_t.
-* CY_SYSPM_SUCCESS - Exited from the LPActive power mode, or the device is -* already in Active mode.
+* CY_SYSPM_SUCCESS - Exited from the LPActive power mode, or the device is +* already in Active mode.
* CY_SYSPM_FAIL - Exit from the LPActive mode is not done. * * \warning This function blocks as it waits until Active Reference is ready @@ -984,7 +982,7 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) /* Check if the device is in the low power mode */ if(0U != (_FLD2VAL(SRSS_PWR_CTL_ACT_REF_DIS, SRSS->PWR_CTL))) { - /* Call the registered callback functions with the + /* Call the registered callback functions with the * CY_SYSPM_CHECK_READY parameter. */ if(0U != curRegisteredCallbacks) @@ -992,14 +990,14 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) retVal = Cy_SysPm_ExecuteCallback(CY_SYSPM_EXIT_LOWPOWER_MODE, CY_SYSPM_CHECK_READY); } - /* The device (core) can switch into the Low Power mode only in the - * condition that all executed registered callback functions with the + /* The device (core) can switch into the Low Power mode only in the + * condition that all executed registered callback functions with the * CY_SYSPM_CHECK_READY parameter return CY_SYSPM_SUCCESS. */ if(retVal == CY_SYSPM_SUCCESS) { - /* Call the registered callback functions with the - * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be + /* Call the registered callback functions with the + * CY_SYSPM_BEFORE_TRANSITION parameter. The return value should be * CY_SYSPM_SUCCESS. */ interruptState = Cy_SysLib_EnterCriticalSection(); @@ -1016,7 +1014,7 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) SRSS->PWR_CTL &= ((uint32_t)~(SRSS_PWR_CTL_LINREG_LPMODE_Msk)); } - /* Configure the normal operating mode for the POR/BOD circuits and + /* Configure the normal operating mode for the POR/BOD circuits and * for the Bandgap Voltage and Current References */ SRSS->PWR_CTL &= ((uint32_t)~(_VAL2FLD(SRSS_PWR_CTL_PORBOD_LPMODE, 1U) | @@ -1035,20 +1033,20 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) if(0U == timeOut) { retVal = CY_SYSPM_TIMEOUT; - + Cy_SysLib_ExitCriticalSection(interruptState); } else { /* Configure the normal operation mode */ SRSS->PWR_CTL &= ((uint32_t) (~SRSS_PWR_CTL_BGREF_LPMODE_Msk)); - + /* This wait time allows setting Active Reference */ Cy_SysLib_DelayUs(CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US); Cy_SysLib_ExitCriticalSection(interruptState); - - /* Call registered callback functions with CY_SYSPM_AFTER_TRANSITION + + /* Call registered callback functions with CY_SYSPM_AFTER_TRANSITION * parameter. Return value should be CY_SYSPM_SUCCESS. */ if(0U != curRegisteredCallbacks) @@ -1060,8 +1058,8 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) } else { - /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to - * undo everything done in the callback with the CY_SYSPM_CHECK_READY + /* Execute callback functions with the CY_SYSPM_CHECK_FAIL parameter to + * undo everything done in the callback with the CY_SYSPM_CHECK_READY * parameter. The return value should be CY_SYSPM_SUCCESS. */ (void) Cy_SysPm_ExecuteCallback(CY_SYSPM_EXIT_LOWPOWER_MODE, CY_SYSPM_CHECK_FAIL); @@ -1083,22 +1081,22 @@ cy_en_syspm_status_t Cy_SysPm_ExitLowPowerMode(void) * This function configures the Sleep-on-exit feature of the core. * * This API sets the SLEEPONEXIT bit of the SCR register. -* -* When the Sleep-on-exit feature is enabled (SLEEPONEXIT bit is set), +* +* When the Sleep-on-exit feature is enabled (SLEEPONEXIT bit is set), * the core wakes up to service the interrupt and then immediately goes -* back to sleep. Because of this, the unstacking process is not carried out, so -* this feature is useful for the interrupt driven application and helps to +* back to sleep. Because of this, the unstacking process is not carried out, so +* this feature is useful for the interrupt driven application and helps to * reduce the unnecessary stack push and pop operations. -* The core does not go to sleep if the interrupt handler returns to -* another interrupt handler (nested interrupt). -* You can use this feature in applications that require only the core to run +* The core does not go to sleep if the interrupt handler returns to +* another interrupt handler (nested interrupt). +* You can use this feature in applications that require only the core to run * when an interrupt occurs. * -* When the Sleep-on-exit feature is disabled (SLEEPONEXIT bit is cleared), +* When the Sleep-on-exit feature is disabled (SLEEPONEXIT bit is cleared), * the core returns back to the main thread after servicing the interrupt * without going back to sleep. * -* Refer to the ARM documentation about the Sleep-on-exit feature and +* Refer to the ARM documentation about the Sleep-on-exit feature and * SLEEPONEXIT of the SCR register. * * \param enable @@ -1132,7 +1130,7 @@ void Cy_SysPm_SleepOnExit(bool enable) * Function Name: Cy_SysPm_SetHibernateWakeupSource ****************************************************************************//** * -* This function configures sources to wake up the device from the Hibernate +* This function configures sources to wake up the device from the Hibernate * power mode. Such sources can be wakeup pins, LPComparators, Watchdog (WDT) * interrupt, or a Real-Time clock (RTC) alarm (interrupt). * @@ -1145,39 +1143,39 @@ void Cy_SysPm_SleepOnExit(bool enable) * * LPComparators: * -* A wakeup is supported by up to two LPComps with programmable polarity. These -* LPComp may be connected to the I/O pins or on-chip peripherals under some +* A wakeup is supported by up to two LPComps with programmable polarity. These +* LPComp may be connected to the I/O pins or on-chip peripherals under some * conditions. * Setting the LPComp to this level will cause a wakeup from Hibernate * mode. The wakeup LPComp are active-low by default. * -* \note The low-power comparators should be configured and enabled before +* \note The low-power comparators should be configured and enabled before * switching into the hibernate low power mode. Refer to the LPComp * driver description for more details. * * Watchdog Timer: -* -* \note The WDT should be configured and enabled before entering into the +* +* \note The WDT should be configured and enabled before entering into the * Hibernate power mode. * -* A wakeup is performed by a WDT interrupt and a normal boot procedure -* after a device reset. The device can wake up from Hibernate after a WDT -* device reset, if the WDT was configured to wake up, the device on its +* A wakeup is performed by a WDT interrupt and a normal boot procedure +* after a device reset. The device can wake up from Hibernate after a WDT +* device reset, if the WDT was configured to wake up, the device on its * interrupt and WDT was enabled. * * Real-time Clock: * -* A wakeup is performed by the RTC alarm and a normal boot procedure +* A wakeup is performed by the RTC alarm and a normal boot procedure * after a device reset. * Refer to the Real-Time Clock (RTC) driver description for more details. * -* For information about wakeup sources and their assignment in the specific +* For information about wakeup sources and their assignment in the specific * families devices, refer to the appropriate device TRM. * -* \param wakeupSource -* The source to be configured as a wakeup source from +* \param wakeupSource +* The source to be configured as a wakeup source from * the Hibernate power mode, see \ref cy_en_syspm_hibernate_wakeup_source_t. -* The input parameters values can be ORed. For example, if you want to set +* The input parameters values can be ORed. For example, if you want to set * LPComp0 (active high) and WDT, call this function: * Cy_SysPm_SetHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). * @@ -1192,29 +1190,29 @@ void Cy_SysPm_SleepOnExit(bool enable) void Cy_SysPm_SetHibernateWakeupSource(uint32_t wakeupSource) { CY_ASSERT_L3(CY_SYSPM_IS_WAKE_UP_SOURCE_VALID(wakeupSource)); - + /* Reconfigure the wake-up pins and LPComp polarity based on the input */ if(0U != ((uint32_t) wakeupSource & CY_SYSPM_WAKEUP_LPCOMP0)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_LPCOMP0_BIT)); } - + if(0U != ((uint32_t) wakeupSource & CY_SYSPM_WAKEUP_LPCOMP1)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_LPCOMP1_BIT)); } - + if(0U != ((uint32_t) wakeupSource & CY_SYSPM_WAKEUP_PIN0)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_PIN0_BIT)); } - + if(0U != ((uint32_t) wakeupSource & CY_SYSPM_WAKEUP_PIN1)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_PIN1_BIT)); } @@ -1229,12 +1227,12 @@ void Cy_SysPm_SetHibernateWakeupSource(uint32_t wakeupSource) * Function Name: Cy_SysPm_ClearHibernateWakeupSource ****************************************************************************//** * -* This function disables a wakeup source that was previously configured to +* This function disables a wakeup source that was previously configured to * wake up the device from the hibernate power mode. * * \param wakeupSource * For the source to be disabled, see \ref cy_en_syspm_hibernate_wakeup_source_t. -* The input parameters values can be ORed. For example, if you want to disable +* The input parameters values can be ORed. For example, if you want to disable * LPComp0 (active high) and WDT call this function: * Cy_SysPm_ClearHibernateWakeupSource(CY_SYSPM_HIBERNATE_LPCOMP0_HIGH | CY_SYSPM_HIBERNATE_WDT). * @@ -1253,25 +1251,25 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) /* Clear the high active level of the requested sources */ if((uint32_t) CY_SYSPM_HIBERNATE_LPCOMP0_HIGH == ((uint32_t) wakeupSource & (uint32_t) CY_SYSPM_HIBERNATE_LPCOMP0_HIGH)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_LPCOMP0_BIT)); } - + if((uint32_t) CY_SYSPM_HIBERNATE_LPCOMP1_HIGH == ((uint32_t) wakeupSource & (uint32_t) CY_SYSPM_HIBERNATE_LPCOMP1_HIGH)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_LPCOMP1_BIT)); } - + if((uint32_t) CY_SYSPM_HIBERNATE_PIN0_HIGH == ((uint32_t) wakeupSource & (uint32_t) CY_SYSPM_HIBERNATE_PIN0_HIGH)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_PIN0_BIT)); } - + if((uint32_t) CY_SYSPM_HIBERNATE_PIN1_HIGH == ((uint32_t) wakeupSource & (uint32_t) CY_SYSPM_HIBERNATE_PIN1_HIGH)) { - SRSS->PWR_HIBERNATE &= + SRSS->PWR_HIBERNATE &= ((uint32_t) ~_VAL2FLD(SRSS_PWR_HIBERNATE_POLARITY_HIBPIN, CY_SYSPM_WAKEUP_PIN1_BIT)); } } @@ -1292,58 +1290,58 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) ****************************************************************************//** * * Switch the power supply regulator to Buck regulator instead of the LDO. - * The Buck core regulator provides output voltage(s) using one external + * The Buck core regulator provides output voltage(s) using one external * inductor and can supply Vccd with higher efficiency than the LDO under some * conditions, such as high external supply voltage. * - * Before changing from LDO to Buck, ensure that the circuit board has - * connected Vccbuck1 to Vccd and also populated the - * necessary external components for the Buck regulator, including an + * Before changing from LDO to Buck, ensure that the circuit board has + * connected Vccbuck1 to Vccd and also populated the + * necessary external components for the Buck regulator, including an * inductor and a capacitor for each output. * Refer to the device TRM for more details. * - * When changing from a higher voltage to a lower voltage + * When changing from a higher voltage to a lower voltage * (from LDO 1.1V to Buck 0.9V), ensure that: * * The device maximum operating frequency for all the Clk_HF paths, peripheral, * and slow clock are under the ULP limitations. * * The total current consumption is under the ULP limitations. - * - * * The appropriate wait states values are set for the flash using + * + * * The appropriate wait states values are set for the flash using * the Cy_SysLib_SetWaitStates() function as explained below. * * Setting wait states values for flash * - * The flash access time when the core output voltage is 0.9 V (nominal) is - * longer than at 1.1 V (nominal). Therefore, the number of the wait states must + * The flash access time when the core output voltage is 0.9 V (nominal) is + * longer than at 1.1 V (nominal). Therefore, the number of the wait states must * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate - * wait state values for flash. + * wait state values for flash. * - * To change from a higher voltage (LDO 1.1 V) to a lower voltage (Buck 0.9 V), - * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing + * To change from a higher voltage (LDO 1.1 V) to a lower voltage (Buck 0.9 V), + * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. * - * To change from a lower voltage (LDO 0.9 V) to a higher voltage (Buck 1.1 V), - * calling the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set - * the wait states is optional, but can be done to improve the performance. + * To change from a lower voltage (LDO 0.9 V) to a higher voltage (Buck 1.1 V), + * calling the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set + * the wait states is optional, but can be done to improve the performance. * The clock frequency may now be increased up to LP mode for a new voltage. - * + * * \note 1. The final Buck output is set to 0.9 V (nominal) - the flash works * in the Read-only operation. * \note 2. The final Buck output is set to 1.1 V (nominal) - the flash works * in the Read and Write operations. - * \note 3. The actual device Vccd voltage can be different from the nominal + * \note 3. The actual device Vccd voltage can be different from the nominal * voltage because the actual voltage value depends on the conditions * including the load current. * - * \warning There is no way to go back to the LDO after the + * \warning There is no way to go back to the LDO after the * Buck regulator supplies a core. The function switches off the LDO. * - * For more details refer to the \ref group_syspm_managing_core_regulators + * For more details refer to the \ref group_syspm_managing_core_regulators * section. * Refer to the \ref group_syslib driver for more details about setting the wait * states. * - * \note + * \note * The function is applicable for devices with the Buck regulator. * * \funcusage @@ -1360,12 +1358,12 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) curLdoVoltage = Cy_SysPm_LdoGetVoltage(); interruptState = Cy_SysLib_EnterCriticalSection(); - /* When the LDO is 1.1V and final target Buck 0.9V need to update the + /* When the LDO is 1.1V and final target Buck 0.9V need to update the * RAM and ROM trim values */ if ((CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V == voltage) && (CY_SYSPM_LDO_VOLTAGE_1_1V == curLdoVoltage)) { - /* Set the analog signal bit for the flash before the voltage is + /* Set the analog signal bit for the flash before the voltage is * changed from 1.1V to 0.9V */ SetVoltageBitForFlash(); @@ -1374,19 +1372,19 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) SetReadMarginTrimUlp(); /* Reduce LDO output voltage to 0.95 V nominal */ - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_0_95V); /* Update write assist value for the ULP mode */ SetWriteAssistTrimUlp(); } - /* When the LDO is 0.9V and final target Buck 1.1 V need to update the + /* When the LDO is 0.9V and final target Buck 1.1 V need to update the * RAM and ROM trim values */ else if ((CY_SYSPM_BUCK_OUT1_VOLTAGE_1_1V == voltage) && (CY_SYSPM_LDO_VOLTAGE_0_9V == curLdoVoltage)) { /* Increase LDO to 0.95 V */ - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_0_95V); /* Wait until regulator is stable */ @@ -1396,7 +1394,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) SetWriteAssistTrimLp(); /* Increase LDO to 1.1 V */ - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_1_1V); /* Wait until regulator is stable */ @@ -1406,10 +1404,10 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) SetReadMarginTrimLp(); /* Set the LDO 1.15V as final Buck output is 1.1 V */ - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_1_15V); - /* Clear the analog signal bit for the flash before the voltage is + /* Clear the analog signal bit for the flash before the voltage is * changed from 1.1 V to 0.9 V */ ClearVoltageBitForFlash(); @@ -1417,13 +1415,13 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) /* If LDO is 0.9V and final Buck is 0.9V increase the LDO on 50 mV*/ else if ((CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V == voltage) && (CY_SYSPM_LDO_VOLTAGE_0_9V == curLdoVoltage)) { - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_0_95V); } /* If LDO is 1.1V and final Buck is 1.1 V increase the LDO on 50 mV*/ else { - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_1_15V); } @@ -1436,7 +1434,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) _VAL2FLD(SRSS_PWR_CTL_NWELL_REG_DIS, 1U)); /* Configure the Buck regulator */ - SRSS->PWR_BUCK_CTL = + SRSS->PWR_BUCK_CTL = _CLR_SET_FLD32U((SRSS->PWR_BUCK_CTL), SRSS_PWR_BUCK_CTL_BUCK_OUT1_SEL, (uint32_t) voltage); /* Check whether the Buck regulator is already enabled */ @@ -1468,38 +1466,38 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) * * The device maximum operating frequency for all the Clk_HF paths, peripheral, * and slow clock are under the \ref group_syspm_ulp_limitations. * * The total current consumption is under the \ref group_syspm_ulp_limitations. - * - * * The appropriate wait states values are set for the flash using + * + * * The appropriate wait states values are set for the flash using * the Cy_SysLib_SetWaitStates() function as explained below. * * Setting wait states values for flash * - * The flash access time when the core output voltage is 0.9 V (nominal) is - * longer than at 1.1 V (nominal). Therefore, the number of the wait states must + * The flash access time when the core output voltage is 0.9 V (nominal) is + * longer than at 1.1 V (nominal). Therefore, the number of the wait states must * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate - * wait state values for flash. + * wait state values for flash. * - * To change from a higher voltage to a lower voltage 0.9 V (nominal), - * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing + * To change from a higher voltage to a lower voltage 0.9 V (nominal), + * call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. * - * To change from a lower voltage to a higher voltage 1.1 V (nominal), calling - * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set the - * wait states is optional, but can be done to improve the performance. - * The clock frequency may now be increased up to + * To change from a lower voltage to a higher voltage 1.1 V (nominal), calling + * the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set the + * wait states is optional, but can be done to improve the performance. + * The clock frequency may now be increased up to * \ref group_syspm_lp_limitations for a new voltage. - * - * \note 1. The output is set to 0.9 V (nominal) - the flash works in the + * + * \note 1. The output is set to 0.9 V (nominal) - the flash works in the * Read-only operation. - * \note 2. The output is set to 1.1 V (nominal) - the flash works in the Read + * \note 2. The output is set to 1.1 V (nominal) - the flash works in the Read * and Write operations. - * \note 3. The actual device Vccd voltage can be different from the nominal + * \note 3. The actual device Vccd voltage can be different from the nominal * voltage because the actual voltage value depends on the conditions * including the load current. * - * For more details refer to the \ref group_syspm_managing_core_regulators + * For more details refer to the \ref group_syspm_managing_core_regulators * section. - * Refer to the \ref group_syslib driver for more details about setting the + * Refer to the \ref group_syslib driver for more details about setting the * wait states. * * \param voltage @@ -1523,7 +1521,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) if (CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V == voltage) { - /* Set the analog signal bit for the flash before the voltage is + /* Set the analog signal bit for the flash before the voltage is * changed from 1.1 V to 0.9 V */ SetVoltageBitForFlash(); @@ -1532,7 +1530,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) SetReadMarginTrimUlp(); /* Reduce Buck output voltage to 0.95V nominal */ - SRSS->PWR_BUCK_CTL = + SRSS->PWR_BUCK_CTL = _CLR_SET_FLD32U((SRSS->PWR_BUCK_CTL), SRSS_PWR_BUCK_CTL_BUCK_OUT1_SEL, BUCK_OUT1_VOLTAGE_0_95V); /* Update write assist value for the ULP mode */ @@ -1541,22 +1539,22 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) else { /* Increase Buck output voltage to 0.95 V nominal */ - SRSS->PWR_BUCK_CTL = + SRSS->PWR_BUCK_CTL = _CLR_SET_FLD32U((SRSS->PWR_BUCK_CTL), SRSS_PWR_BUCK_CTL_BUCK_OUT1_SEL, BUCK_OUT1_VOLTAGE_0_95V); - + /* Wait until regulator is stable */ Cy_SysLib_DelayUs(BUCK_STABILIZATION_DELAY_US); - + /* Update write assist value for the LP mode */ SetWriteAssistTrimLp(); } - /* The system may continue operating while the voltage on Vccd - * discharges to the new voltage. The time it takes to reach the + /* The system may continue operating while the voltage on Vccd + * discharges to the new voltage. The time it takes to reach the * new voltage depends on the conditions, including the load current * on Vccd and the external capacitor size. */ - SRSS->PWR_BUCK_CTL = + SRSS->PWR_BUCK_CTL = _CLR_SET_FLD32U((SRSS->PWR_BUCK_CTL), SRSS_PWR_BUCK_CTL_BUCK_OUT1_SEL, (uint32_t) voltage); /* Delay to stabilize at the new voltage is required only @@ -1569,7 +1567,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) /* Update read-write margin value for the LP mode */ SetReadMarginTrimLp(); - /* Set analog signal bit for flash before voltage is changed + /* Set analog signal bit for flash before voltage is changed * from 0.9 V to 1.1 V. */ ClearVoltageBitForFlash(); @@ -1589,7 +1587,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) * The Buck regulator output. See \ref cy_en_syspm_buck_out_t. * * \return - * The current state of the requested output. True if the requested output + * The current state of the requested output. True if the requested output * is enabled. * False if the requested output is disabled. * @@ -1624,22 +1622,22 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) * Function Name: Cy_SysPm_BuckEnableVoltage2 ****************************************************************************//** * - * Enable the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. - * The output 2 voltage (Vbuckrf) of the Buck regulator is used to supply + * Enable the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. + * The output 2 voltage (Vbuckrf) of the Buck regulator is used to supply * the BLE HW block. - * When the Buck regulator is switched off, the function enables the + * When the Buck regulator is switched off, the function enables the * regulator and after it, enables output 2. * - * \note The function does not affect Buck output 1 that can supply + * \note The function does not affect Buck output 1 that can supply * a core. * - * \warning The function does not select the Buck output 2 voltage and + * \warning The function does not select the Buck output 2 voltage and * does not set/clear the HW-controlled bit for Buck output 2. Call - * Cy_SysPm_BuckSetVoltage2() or Cy_SysPm_BuckSetVoltage2HwControl() to + * Cy_SysPm_BuckSetVoltage2() or Cy_SysPm_BuckSetVoltage2HwControl() to * configure the Buck output 2. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1667,9 +1665,9 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) ****************************************************************************//** * * This function sets output voltage 2 of the SIMO Buck regulator. - * + * * \param voltage - * The voltage of the Buck regulator output 2. + * The voltage of the Buck regulator output 2. * See \ref cy_en_syspm_buck_voltage2_t. * * \param waitToSettle @@ -1684,7 +1682,7 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) * the delay is not required. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1696,13 +1694,13 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) uint32_t curVoltage; CY_ASSERT_L3(CY_SYSPM_IS_BUCK_VOLTAGE2_VALID(voltage)); - + /* Get the current voltage */ curVoltage = (uint32_t) Cy_SysPm_BuckGetVoltage2(); if((uint32_t) voltage != curVoltage) { - SRSS->PWR_BUCK_CTL2 = + SRSS->PWR_BUCK_CTL2 = _CLR_SET_FLD32U((SRSS->PWR_BUCK_CTL2), SRSS_PWR_BUCK_CTL2_BUCK_OUT2_SEL, (uint32_t) voltage); /* Delay to stabilize at the new voltage is required only @@ -1728,35 +1726,35 @@ void Cy_SysPm_ClearHibernateWakeupSource(uint32_t wakeupSource) * * The device maximum operating frequency for all the Clk_HF paths, peripheral, * and slow clock are under the \ref group_syspm_ulp_limitations. * * The total current consumption is under the \ref group_syspm_ulp_limitations. -* * The appropriate wait states values are set for the flash using +* * The appropriate wait states values are set for the flash using * the Cy_SysLib_SetWaitStates() function as explained below. * * Setting wait states values for Flash * -* The flash access time when the core output voltage is 0.9 V (nominal) is -* longer than at 1.1 V (nominal). Therefore, the number of the wait states must +* The flash access time when the core output voltage is 0.9 V (nominal) is +* longer than at 1.1 V (nominal). Therefore, the number of the wait states must * be adjusted. Use the Cy_SysLib_SetWaitStates() function to set the appropriate -* wait state values for flash. +* wait state values for flash. * -* To change from a higher voltage to a lower voltage 0.9 V (nominal), -* call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing +* To change from a higher voltage to a lower voltage 0.9 V (nominal), +* call the Cy_SysLib_SetWaitStates(true, hfClkFreqMz) function before changing * the voltage, where hfClkFreqMz is the frequency of HfClk0 in MHz. * -* To change from a lower voltage to a higher voltage 1.1 V (nominal), calling -* the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set the -* wait states is optional, but can be done to improve the performance. +* To change from a lower voltage to a higher voltage 1.1 V (nominal), calling +* the Cy_SysLib_SetWaitStates(false, hfClkFreqMz) function is to set the +* wait states is optional, but can be done to improve the performance. * The clock frequency may now be increased up to \ref group_syspm_lp_limitations * for a new voltage. -* -* \note 1. The output is set to 0.9 V (nominal) - the flash works in the +* +* \note 1. The output is set to 0.9 V (nominal) - the flash works in the * Read-only operation. -* \note 2. The output is set to 1.1 V (nominal) - the flash works in the Read +* \note 2. The output is set to 1.1 V (nominal) - the flash works in the Read * and Write operations. -* \note 3. The actual device Vccd voltage can be different from the nominal +* \note 3. The actual device Vccd voltage can be different from the nominal * voltage because the actual voltage value depends on the conditions * including the load current. * -* For more details refer to the \ref group_syspm_managing_core_regulators +* For more details refer to the \ref group_syspm_managing_core_regulators * section. * Refer to the \ref group_syslib driver for more details about setting the wait * states. @@ -1782,7 +1780,7 @@ void Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage) if (CY_SYSPM_LDO_VOLTAGE_0_9V == voltage) { - /* Set the analog signal bit for the flash before the voltage is changed + /* Set the analog signal bit for the flash before the voltage is changed * from 1.1 V to 0.9 V. Store trimmed voltage value into the local variable */ SetVoltageBitForFlash(); @@ -1790,7 +1788,7 @@ void Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage) /* Update read-write margin value for the ULP mode */ SetReadMarginTrimUlp(); - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_0_95V); /* Update write assist value for the ULP mode */ @@ -1800,41 +1798,41 @@ void Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage) } else { - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, LDO_OUT_VOLTAGE_0_95V); /* A delay for the supply to stabilize at the new higher voltage */ Cy_SysLib_DelayUs(LDO_STABILIZATION_DELAY_US); - + /* Update write assist value for the LP mode */ SetWriteAssistTrimLp(); trimVoltage = SFLASH->LDO_1P1V_TRIM; } - /* The system may continue operating while the voltage on Vccd - * discharges to the new voltage. The time it takes to reach the + /* The system may continue operating while the voltage on Vccd + * discharges to the new voltage. The time it takes to reach the * new voltage depends on the conditions, including the load current on * Vccd and the external capacitor size */ - SRSS->PWR_TRIM_PWRSYS_CTL = + SRSS->PWR_TRIM_PWRSYS_CTL = _CLR_SET_FLD32U((SRSS->PWR_TRIM_PWRSYS_CTL), SRSS_PWR_TRIM_PWRSYS_CTL_ACT_REG_TRIM, trimVoltage); if (CY_SYSPM_LDO_VOLTAGE_1_1V == voltage) { /* A delay for the supply to stabilize at the new higher voltage */ Cy_SysLib_DelayUs(LDO_STABILIZATION_DELAY_US); - + /* Update read-write margin value for the LP mode */ SetReadMarginTrimLp(); - - /* Set the analog signal bit to the flash macro register after + + /* Set the analog signal bit to the flash macro register after * the output voltage is 1.1 V */ ClearVoltageBitForFlash(); } } - + Cy_SysLib_ExitCriticalSection(interruptState); } @@ -1849,13 +1847,13 @@ void Cy_SysPm_LdoSetVoltage(cy_en_syspm_ldo_voltage_t voltage) * middleware module has occurred. The handler callback API will be executed if * the specific event occurs. See \ref cy_stc_syspm_callback_t. * -* \note The registered callbacks are executed in two orders, based on callback -* mode \ref cy_en_syspm_callback_mode_t. For modes CY_SYSPM_CHECK_READY and -* CY_SYSPM_BEFORE_TRANSITION, the order is this: the first registered callback -* will be always the first executed. And the last registered callback will be -* executed as the last callback. For modes CY_SYSPM_AFTER_TRANSITION and -* CY_SYSPM_CHECK_FAIL, the order is this: the first registered callback will be -* always the last executed. And the last registered callback will be executed +* \note The registered callbacks are executed in two orders, based on callback +* mode \ref cy_en_syspm_callback_mode_t. For modes CY_SYSPM_CHECK_READY and +* CY_SYSPM_BEFORE_TRANSITION, the order is this: the first registered callback +* will be always the first executed. And the last registered callback will be +* executed as the last callback. For modes CY_SYSPM_AFTER_TRANSITION and +* CY_SYSPM_CHECK_FAIL, the order is this: the first registered callback will be +* always the last executed. And the last registered callback will be executed * as the first callback. * * \param handler @@ -1971,14 +1969,14 @@ bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler) { uint32_t interruptState; bool retStatus = false; - + interruptState = Cy_SysLib_EnterCriticalSection(); /* Check if there was at least one callback registered */ if (curRegisteredCallbacks > 0UL) { cy_stc_syspm_callback_t* curCallback = callbackRoot; - + /* Search requested callback item in the linked list */ while (curCallback != NULL) { @@ -1988,11 +1986,11 @@ bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler) retStatus = true; break; } - + /* Go to next callback item in the linked list */ curCallback = curCallback->nextItm; } - + if (retStatus) { /* Update links of related to unregistered callback items */ @@ -2037,15 +2035,15 @@ bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler) * \ref Cy_SysPm_DeepSleep, \ref Cy_SysPm_Hibernate, \ref Cy_SysPm_EnterLowPowerMode * and \ref Cy_SysPm_ExitLowPowerMode API functions, however might be also useful as * an independent API function in some custom applications. -* \note The registered callbacks will be executed in order based on -* \ref cy_en_syspm_callback_type_t value. +* \note The registered callbacks will be executed in order based on +* \ref cy_en_syspm_callback_type_t value. * The are possible two orders of callbacks execution:
-* * From first registered to last registered. Such order is relevant to +* * From first registered to last registered. Such order is relevant to * callbacks with mode CY_SYSPM_CHECK_READY and CY_SYSPM_BEFORE_TRANSITION. -* * Backward flow execution: from last executed callback to the -* first registered. Such order is relevant to callbacks with mode +* * Backward flow execution: from last executed callback to the +* first registered. Such order is relevant to callbacks with mode * CY_SYSPM_AFTER_TRANSITION and CY_SYSPM_CHECK_FAIL. Note that, the last -* registered callback function is skipped with mode CY_SYSPM_CHECK_FAIL. This +* registered callback function is skipped with mode CY_SYSPM_CHECK_FAIL. This * is because the callback that returned CY_SYSPM_FAIL already knows that it failed. * * If no callbacks are registered, returns CY_SYSPM_SUCCESS. @@ -2057,10 +2055,10 @@ bool Cy_SysPm_UnregisterCallback(cy_stc_syspm_callback_t const *handler) * The callback mode. See \ref cy_en_syspm_callback_mode_t. * * \note -* If mode is CY_SYSPM_CHECK_READY or CY_SYSPM_BEFORE_TRANSITION the +* If mode is CY_SYSPM_CHECK_READY or CY_SYSPM_BEFORE_TRANSITION the * all required callbacks would be executed in order from first * registered to last registered. -* If mode is CY_SYSPM_CHECK_FAIL or CY_SYSPM_AFTER_TRANSITION the +* If mode is CY_SYSPM_CHECK_FAIL or CY_SYSPM_AFTER_TRANSITION the * all required callbacks would be executed in order from last executed callback * to first registered. * @@ -2078,10 +2076,10 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, cy_en_syspm_status_t retVal = CY_SYSPM_SUCCESS; cy_stc_syspm_callback_t* curCallback; cy_stc_syspm_callback_params_t curParams; - + CY_ASSERT_L3(CY_SYSPM_IS_CALLBACK_TYPE_VALID(type)); CY_ASSERT_L3(CY_SYSPM_IS_CALLBACK_MODE_VALID(mode)); - + if((mode == CY_SYSPM_BEFORE_TRANSITION) || (mode == CY_SYSPM_CHECK_READY)) { /* Execute registered callbacks with order from first registered to the @@ -2098,12 +2096,12 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, curParams.base = curCallback->callbackParams->base; curParams.context = curCallback->callbackParams->context; curParams.mode = mode; - + retVal = curCallback->callback(&curParams); - - /* Update callback pointer with value of executed callback. - * Such update is required to execute further callbacks in - * backward order after exit from low power mode or to undo + + /* Update callback pointer with value of executed callback. + * Such update is required to execute further callbacks in + * backward order after exit from low power mode or to undo * configuration after callback returned fail: from last executed * to first registered. */ @@ -2115,14 +2113,14 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, else { /* Execute registered callbacks with order from lastCallback to - * the first registered callback. Such a flow is required if previous - * callback function returned CY_SYSPM_FAIL or previous callback mode was - * CY_SYSPM_BEFORE_TRANSITION. Such an order is required to undo configurations in + * the first registered callback. Such a flow is required if previous + * callback function returned CY_SYSPM_FAIL or previous callback mode was + * CY_SYSPM_BEFORE_TRANSITION. Such an order is required to undo configurations in * correct backward order. */ curCallback = callbackListLast; - - /* Skip last executed callback that returned CY_SYSPM_FAIL, as this + + /* Skip last executed callback that returned CY_SYSPM_FAIL, as this * callback already knows that it failed */ if (mode == CY_SYSPM_CHECK_FAIL) @@ -2137,14 +2135,14 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, /* Execute all registered callback functions with required type and mode */ while ((curCallback != NULL) && (retVal != CY_SYSPM_FAIL)) { - if ((curCallback->type == type) && ((curCallback->skipMode == 0UL) || + if ((curCallback->type == type) && ((curCallback->skipMode == 0UL) || (((uint32_t) mode & curCallback->skipMode) == 0UL))) { /* Update elements for local callback parameter values */ curParams.base = curCallback->callbackParams->base; curParams.context = curCallback->callbackParams->context; curParams.mode = mode; - + retVal = curCallback->callback(&curParams); } curCallback = curCallback->prevItm; @@ -2160,10 +2158,10 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, * * This function saves the output states and configuration of I/O cells. * -* I/O-cell configuration can be changed while I/O-cells are frozen. The new +* I/O-cell configuration can be changed while I/O-cells are frozen. The new * configuration becomes effective only after the pins are unfrozen. * -* Cy_SysPm_Hibernate() calls this function to freeze the I/O cells while +* Cy_SysPm_Hibernate() calls this function to freeze the I/O cells while * entering hibernate. * * \funcusage @@ -2174,7 +2172,7 @@ void Cy_SysPm_IoFreeze(void) { uint32_t interruptState; uint32_t regValue; - + interruptState = Cy_SysLib_EnterCriticalSection(); /* Check the FREEZE state to avoid a recurrent I/O-cells freeze attempt, @@ -2187,7 +2185,7 @@ void Cy_SysPm_IoFreeze(void) { /* Clear the unlock field for correct freeze of the I/O cells */ SRSS->PWR_HIBERNATE = _CLR_SET_FLD32U((SRSS->PWR_HIBERNATE), SRSS_PWR_HIBERNATE_UNLOCK, 0U); - + /* Disable overriding by the peripherals the next pin-freeze command */ SRSS->PWR_HIBERNATE |= CY_SYSPM_PWR_SET_HIBERNATE; @@ -2204,7 +2202,7 @@ void Cy_SysPm_IoFreeze(void) * Function Name: Cy_SysPm_IoUnfreeze ****************************************************************************//** * -* This function unfreezes the I/O cells which were automatically frozen when the +* This function unfreezes the I/O cells which were automatically frozen when the * Hibernate is entered with the call to \ref Cy_SysPm_Hibernate(). * * I/O-cells remain frozen after a wakeup from hibernate mode until the @@ -2212,11 +2210,11 @@ void Cy_SysPm_IoFreeze(void) * * If the firmware must retain the data value on the port, then the * value must be read and re-written to the data register before calling this -* function. Furthermore, the drive mode must be re-programmed before the pins are +* function. Furthermore, the drive mode must be re-programmed before the pins are * unfrozen. If this is not done, the pin will change to the default state * the moment the freeze is removed. * -* Note that I/O cell configuration can be changed while frozen. The new +* Note that I/O cell configuration can be changed while frozen. The new * configuration becomes effective only after the pins are unfrozen. * * \funcusage @@ -2233,11 +2231,11 @@ void Cy_SysPm_IoUnfreeze(void) */ SRSS->PWR_HIBERNATE = (SRSS->PWR_HIBERNATE & CY_SYSPM_PWR_RETAIN_HIBERNATE_STATUS) | CY_SYSPM_PWR_HIBERNATE_UNLOCK; - /* Lock the hibernate mode: + /* Lock the hibernate mode: * write PWR_HIBERNATE.HIBERNATE=0, UNLOCK=0x00, HIBERANTE=0 */ SRSS->PWR_HIBERNATE &= CY_SYSPM_PWR_RETAIN_HIBERNATE_STATUS; - + /* Read register to make sure it is settled */ (void) SRSS->PWR_HIBERNATE; @@ -2250,8 +2248,8 @@ void Cy_SysPm_IoUnfreeze(void) ****************************************************************************//** * * The internal function that changes the Vcc setting for the flash. -* -* Sets the bit for the flash macro register. This bit should be set when the +* +* Sets the bit for the flash macro register. This bit should be set when the * voltage for the core regulators is less than 0.99 V. * *******************************************************************************/ @@ -2266,8 +2264,8 @@ static void SetVoltageBitForFlash(void) ****************************************************************************//** * * This is the internal function that changes the Vcc setting for the flash. -* -* Clears the bit for the flash macro register. This bit should +* +* Clears the bit for the flash macro register. This bit should * be cleared if the output voltage for the core regulators is higher than 0.99 V. * *******************************************************************************/ @@ -2302,13 +2300,13 @@ static void ClearVoltageBitForFlash(void) regs->CY_UDB_BCTL_QCLK_EN1_REG = UDB->BCTL.QCLK_EN[1U]; regs->CY_UDB_BCTL_QCLK_EN2_REG = UDB->BCTL.QCLK_EN[2U]; } - - + + /******************************************************************************* * Function Name: RestoreRegisters ****************************************************************************//** * - * The internal function restores the non-retained registers after + * The internal function restores the non-retained registers after * leaving the Deep Sleep power mode. Cypress ID #280370. * * \param regs @@ -2337,7 +2335,7 @@ static void ClearVoltageBitForFlash(void) * Function Name: Cy_EnterDeepSleep ****************************************************************************//** * - * The internal function that prepares the system for Deep Sleep and + * The internal function that prepares the system for Deep Sleep and * restores the system after a wakeup from Deep Sleep. * * \param waitFor Selects wait for action. See \ref cy_en_syspm_waitfor_t. @@ -2360,24 +2358,24 @@ static void ClearVoltageBitForFlash(void) /* Set the flag that current core entered Deep Sleep */ SYSPM_IPC_STC->DATA |= CUR_CORE_DP_MASK; - /* Change the slow and fast clock dividers only under condition that + /* Change the slow and fast clock dividers only under condition that * the other core is already in Deep Sleep. Cypress ID #284516 */ if (0U != (SYSPM_IPC_STC->DATA & OTHER_CORE_DP_MASK)) { - /* Get the divider values of the slow and high clocks and store them into + /* Get the divider values of the slow and high clocks and store them into * the IPC data register */ - SYSPM_IPC_STC->DATA = + SYSPM_IPC_STC->DATA = (SYSPM_IPC_STC->DATA & ((uint32_t) ~(SYSPM_FAST_CLK_DIV_Msk | SYSPM_SLOW_CLK_DIV_Msk))) | (((uint32_t)(_FLD2VAL(CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, CPUSS->CM0_CLOCK_CTL) << SYSPM_SLOW_CLK_DIV_Pos)) | ((uint32_t)(_FLD2VAL(CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, CPUSS->CM4_CLOCK_CTL) << SYSPM_FAST_CLK_DIV_Pos))); /* Increase the clock divider for the slow and fast clocks to SYSPM_CLK_DIVIDER */ - CPUSS->CM0_CLOCK_CTL = + CPUSS->CM0_CLOCK_CTL = _CLR_SET_FLD32U(CPUSS->CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, SYSPM_CLK_DIVIDER); - CPUSS->CM4_CLOCK_CTL = + CPUSS->CM4_CLOCK_CTL = _CLR_SET_FLD32U(CPUSS->CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, SYSPM_CLK_DIVIDER); /* Read the divider value to make sure it is set */ @@ -2406,7 +2404,7 @@ static void ClearVoltageBitForFlash(void) } #else - /* Repeat the WFI/WFE instructions if a wake up was not intended. + /* Repeat the WFI/WFE instructions if a wake up was not intended. * Cypress ID #272909 */ do @@ -2422,7 +2420,7 @@ static void ClearVoltageBitForFlash(void) { __WFE(); - /* Call the WFE instructions twice to clear the Event register + /* Call the WFE instructions twice to clear the Event register * of the CM4 core. Cypress ID #279077 */ if(wasEventSent) @@ -2442,18 +2440,18 @@ static void ClearVoltageBitForFlash(void) /* Wait until the IPC structure is released by another core */ } - /* Read and change the slow and fast clock dividers only under condition + /* Read and change the slow and fast clock dividers only under condition * that the other core is already in Deep Sleep. Cypress ID #284516 */ if(0U != (SYSPM_IPC_STC->DATA & OTHER_CORE_DP_MASK)) { /* Restore the clock dividers for the slow and fast clocks */ - CPUSS->CM0_CLOCK_CTL = - (_CLR_SET_FLD32U(CPUSS->CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, + CPUSS->CM0_CLOCK_CTL = + (_CLR_SET_FLD32U(CPUSS->CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, (_FLD2VAL(SYSPM_SLOW_CLK_DIV, SYSPM_IPC_STC->DATA)))); - CPUSS->CM4_CLOCK_CTL = - (_CLR_SET_FLD32U(CPUSS->CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, + CPUSS->CM4_CLOCK_CTL = + (_CLR_SET_FLD32U(CPUSS->CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, (_FLD2VAL(SYSPM_FAST_CLK_DIV, SYSPM_IPC_STC->DATA)))); } @@ -2473,11 +2471,11 @@ static void ClearVoltageBitForFlash(void) * Function Name: EnterDeepSleep ****************************************************************************//** * -* The internal function that prepares the system for Deep Sleep, -* sets the CPU core to the Deep Sleep, and restores the system after a +* The internal function that prepares the system for Deep Sleep, +* sets the CPU core to the Deep Sleep, and restores the system after a * wakeup from Deep Sleep. * -* \param waitFor +* \param waitFor * Selects wait for action. See \ref cy_en_syspm_waitfor_t. * *******************************************************************************/ @@ -2504,7 +2502,7 @@ static void EnterDeepSleep(cy_en_syspm_waitfor_t waitFor) } #else - /* Repeat the WFI/WFE instructions if a wake up was not intended. + /* Repeat the WFI/WFE instructions if a wake up was not intended. * Cypress ID #272909 */ do @@ -2520,7 +2518,7 @@ static void EnterDeepSleep(cy_en_syspm_waitfor_t waitFor) { __WFE(); - /* Call the WFE instructions twice to clear the Event register + /* Call the WFE instructions twice to clear the Event register * of the CM4 core. Cypress ID #279077 */ if(wasEventSent) @@ -2542,7 +2540,7 @@ static void EnterDeepSleep(cy_en_syspm_waitfor_t waitFor) /* Wait until the IPC structure is released by another core */ } - /* Set 10 uS delay only under condition that the DELAY_DONE_FLAG is + /* Set 10 uS delay only under condition that the DELAY_DONE_FLAG is * cleared. Cypress ID #288510 */ if(DELAY_DONE_FLAG->BIST_DATA[0] == NEED_DELAY) @@ -2564,7 +2562,7 @@ static void EnterDeepSleep(cy_en_syspm_waitfor_t waitFor) DELAY_DONE_FLAG->BIST_DATA[0] = DELAY_DONE; } - /* Release the IPC structure in do while loop just to sure that this code + /* Release the IPC structure in do while loop just to sure that this code * is not optimized */ do @@ -2581,8 +2579,8 @@ static void EnterDeepSleep(cy_en_syspm_waitfor_t waitFor) * Function Name: SetReadMarginTrimUlp ****************************************************************************//** * -* This is the internal function that updates the read-margin trim values for the -* RAM and ROM. The trim update is done during transition of regulator voltage +* This is the internal function that updates the read-margin trim values for the +* RAM and ROM. The trim update is done during transition of regulator voltage * from higher to a lower one. * *******************************************************************************/ @@ -2601,8 +2599,8 @@ static void SetReadMarginTrimUlp(void) * Function Name: SetReadMarginTrimLp ****************************************************************************//** * -* The internal function which updates the read-margin trim values for the -* RAM and ROM. The trim update is done during transition of regulator voltage +* The internal function which updates the read-margin trim values for the +* RAM and ROM. The trim update is done during transition of regulator voltage * from lower to a higher one. * *******************************************************************************/ @@ -2621,8 +2619,8 @@ static void SetReadMarginTrimLp(void) * Function Name: SetWriteAssistTrimUlp ****************************************************************************//** * -* This is the internal function that updates the write assistant trim value for the -* RAM. The trim update is done during transition of regulator voltage +* This is the internal function that updates the write assistant trim value for the +* RAM. The trim update is done during transition of regulator voltage * from higher to a lower. * *******************************************************************************/ @@ -2638,8 +2636,8 @@ static void SetWriteAssistTrimUlp(void) * Function Name: SetWriteAssistTrimLp ****************************************************************************//** * -* This is the internal function that updates the write assistant trim value for the -* RAM. The trim update is done during transition of regulator voltage +* This is the internal function that updates the write assistant trim value for the +* RAM. The trim update is done during transition of regulator voltage * from lower to a higher one. * *******************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.h index fc663f6a19..a267d4dc70 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/syspm/cy_syspm.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 * *******************************************************************************/ @@ -17,9 +15,9 @@ * \defgroup group_syspm System Power Management (SysPm) * \{ * -* Use the System Power Management (SysPm) driver to enter low-power modes and -* reduce system power consumption in power sensitive designs. For multi-core -* devices, this library allows you to individually enter low-power modes for +* Use the System Power Management (SysPm) driver to enter low-power modes and +* reduce system power consumption in power sensitive designs. For multi-core +* devices, this library allows you to individually enter low-power modes for * each core. * * This document contains the following topics: @@ -49,91 +47,91 @@ * * \section group_syspm_section_configuration Configuration Considerations * \subsection group_syspm_power_modes Power Modes -* PSoC 6 MCUs support the following power modes (in the order of high-to-low -* power consumption): Active, Low-Power (LPActive), Deep Sleep, and Hibernate. -* The core(s) can also be in Arm-defined power modes - Active, Sleep, +* PSoC 6 MCUs support the following power modes (in the order of high-to-low +* power consumption): Active, Low-Power (LPActive), Deep Sleep, and Hibernate. +* The core(s) can also be in Arm-defined power modes - Active, Sleep, * and Deep Sleep. -* +* * \subsection group_syspm_device_power_modes Device Power Modes -* * Active - In this mode the code is executed, and all logic and -* memories are powered. Firmware may disable clocks for specific peripherals +* * Active - In this mode the code is executed, and all logic and +* memories are powered. Firmware may disable clocks for specific peripherals * and power down specific analog power domains. * -* * LPActive - Low-Power mode is like Active mode, but with clock +* * LPActive - Low-Power mode is like Active mode, but with clock * restrictions and limited/slower peripherals to achieve a lower system current. -* Refer to \ref group_syspm_switching_into_lpactive in Configuration +* Refer to \ref group_syspm_switching_into_lpactive in Configuration * considerations. * -* * Deep Sleep - is a lower power mode where high-frequency clocks are -* disabled. Deep-Sleep-capable peripherals are available. A normal wakeup from -* Deep Sleep returns to either LPActive, Active, or Sleep, depending on the -* previous state and programmed behavior for the configured wakeup interrupt. -* Likewise, a debug wakeup from Deep Sleep returns to Sleep, depending on which -* mode was used to enter the Deep Sleep power mode. +* * Deep Sleep - is a lower power mode where high-frequency clocks are +* disabled. Deep-Sleep-capable peripherals are available. A normal wakeup from +* Deep Sleep returns to either LPActive, Active, or Sleep, depending on the +* previous state and programmed behavior for the configured wakeup interrupt. +* Likewise, a debug wakeup from Deep Sleep returns to Sleep, depending on which +* mode was used to enter the Deep Sleep power mode. * -* * Hibernate - is an even lower power mode that is entered from -* firmware, just like Deep Sleep. However, on a wakeup the core and all -* peripherals go through a full reset. The I/O's state is frozen so that the -* output driver state is held. Note that in this mode, the core(s) and all -* peripherals lose their states, so the system and firmware reboot on a wakeup -* event. Backup memory (if present) can be used to store system states for use +* * Hibernate - is an even lower power mode that is entered from +* firmware, just like Deep Sleep. However, on a wakeup the core and all +* peripherals go through a full reset. The I/O's state is frozen so that the +* output driver state is held. Note that in this mode, the core(s) and all +* peripherals lose their states, so the system and firmware reboot on a wakeup +* event. Backup memory (if present) can be used to store system states for use * on the next reboot. * * \subsubsection group_syspm_switching_into_lpactive Switching Device into LPActive -* Before switching into the LPActive power mode, ensure that the device meets -* the current load limitation. Decrease the clock frequencies, and slow or +* Before switching into the LPActive power mode, ensure that the device meets +* the current load limitation. Decrease the clock frequencies, and slow or * disable peripherals. Refer to the \ref group_syspm_managing_core_regulators * Section.
* * The IMO is set to the Clk_HF * -* * Turn off unused peripherals, or decrease their operating frequencies to +* * Turn off unused peripherals, or decrease their operating frequencies to * achieve total current consumption less than or equal to 20 mA. * -* * Call the Cy_SysPm_EnterLowPowerMode() function that will put references +* * Call the Cy_SysPm_EnterLowPowerMode() function that will put references * such as POR and BOD into Low-Power mode. * -* * If the core is sourced by the LDO Core Voltage Regulator, then the -* 0.9 V (nominal) mode must be set. Refer \ref group_syspm_functions_ldo API +* * If the core is sourced by the LDO Core Voltage Regulator, then the +* 0.9 V (nominal) mode must be set. Refer \ref group_syspm_functions_ldo API * in \ref group_syspm_functions_core_regulators. * -* * If the core is sourced by the Buck Core Voltage Regulator, then it is -* recommended, but not required, to set CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V. -* Decide whether your application can meet the requirements for the -* CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V. +* * If the core is sourced by the Buck Core Voltage Regulator, then it is +* recommended, but not required, to set CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V. +* Decide whether your application can meet the requirements for the +* CY_SYSPM_BUCK_OUT1_VOLTAGE_0_9V. * See \ref group_syspm_managing_core_regulators. * * \subsubsection group_syspm_switching_from_lpactive Switching Device from LPActive -* To switch a device from LPActive to Active mode, just +* To switch a device from LPActive to Active mode, just * call Cy_SysPm_ExitLowPowerMode(). * * \subsubsection group_syspm_switching_into_sleep_deepsleep Switching Device or Core to Sleep or Deep Sleep -* For multi-core devices, the Cy_SysPm_Sleep() and Cy_SysPm_DeepSleep() -* functions switch only the core that calls the function into the Sleep or +* For multi-core devices, the Cy_SysPm_Sleep() and Cy_SysPm_DeepSleep() +* functions switch only the core that calls the function into the Sleep or * the Deep Sleep power mode. To set the whole device in the Sleep or Deep Sleep -* power mode, ensure that each core calls the Cy_SysPm_Sleep() or +* power mode, ensure that each core calls the Cy_SysPm_Sleep() or * Cy_SysPm_DeepSleep() function. * -* There are situations when the device does not switch into the Deep Sleep -* power mode immediately after the second core calls Cy_SysPm_DeepSleep(). -* The device will switch into Deep Sleep mode automatically a little bit later, -* after the low-power circuits are ready to switch into Deep Sleep. Refer to +* There are situations when the device does not switch into the Deep Sleep +* power mode immediately after the second core calls Cy_SysPm_DeepSleep(). +* The device will switch into Deep Sleep mode automatically a little bit later, +* after the low-power circuits are ready to switch into Deep Sleep. Refer to * the Cy_SysPm_DeepSleep() description for more details. * -* All pending interrupts should be cleared before the device is put into a +* All pending interrupts should be cleared before the device is put into a * Sleep or Deep Sleep mode, even if they are masked. * -* For single-core devices, SysPm functions that return the status of the +* For single-core devices, SysPm functions that return the status of the * unsupported core always return CY_SYSPM_STATUS__DEEPSLEEP. * * \subsubsection group_syspm_wakingup_from_sleep_deepsleep Waking Up from Sleep or Deep Sleep -* For Arm-based devices, an interrupt is required for the core to wake up. -* For multi-core devices, one core can wake up the other core by sending the +* For Arm-based devices, an interrupt is required for the core to wake up. +* For multi-core devices, one core can wake up the other core by sending the * event instruction. Use the CMSIS function __SEV() to sent event from one core * to another. * * \subsubsection group_syspm_switching_into_hibernate Switching Device to Hibernate * If you call Cy_SysPm_Hibernate() from either core, the device will be switched -* into the Hibernate power mode directly, as there is no +* into the Hibernate power mode directly, as there is no * handshake between cores. * * \subsubsection group_syspm_wakingup_from_hibernate Waking Up from Hibernate @@ -148,66 +146,66 @@ * * * WDT interrupt * -* Wakeup is supported from device specific pin(s) with programmable polarity. -* Additionally, unregulated peripherals can wake the device under some -* conditions. For example, a low-power comparator can wake the device by -* comparing two external voltages but may not support comparison to an -* internally-generated voltage. The Backup domain remains functional, and if -* present it can schedule an alarm to wake the device from Hibernate using RTC. -* Alternatively, the Watchdog Timer (WDT) can be configured to wake-up the +* Wakeup is supported from device specific pin(s) with programmable polarity. +* Additionally, unregulated peripherals can wake the device under some +* conditions. For example, a low-power comparator can wake the device by +* comparing two external voltages but may not support comparison to an +* internally-generated voltage. The Backup domain remains functional, and if +* present it can schedule an alarm to wake the device from Hibernate using RTC. +* Alternatively, the Watchdog Timer (WDT) can be configured to wake-up the * device by WDT interrupt. * Refer to \ref Cy_SysPm_SetHibernateWakeupSource() for more details. * * \subsection group_syspm_managing_core_regulators Managing Core Voltage Regulators -* The SysPm driver provides functionality to manage the power modes of the +* The SysPm driver provides functionality to manage the power modes of the * low-dropout (LDO) and Buck Core Voltage Regulators. * For both core regulators, two voltages are possible: * -* * 0.9 V (nominal) - core is sourced by 0.9 V (nominal). This core regulator -* power mode is called Ultra Low-Power (ULP). In this mode, the device -* functionality and performance is limited. You must decrease the operating -* frequency and current consumption to meet the +* * 0.9 V (nominal) - core is sourced by 0.9 V (nominal). This core regulator +* power mode is called Ultra Low-Power (ULP). In this mode, the device +* functionality and performance is limited. You must decrease the operating +* frequency and current consumption to meet the * \ref group_syspm_ulp_limitations, shown below. -* * 1.1 V (nominal) - core is sourced by 1.1 V (nominal). This core regulator -* power mode is called low-power mode (LP). In this mode, you must meet the +* * 1.1 V (nominal) - core is sourced by 1.1 V (nominal). This core regulator +* power mode is called low-power mode (LP). In this mode, you must meet the * \ref group_syspm_lp_limitations, shown below. * * \subsubsection group_syspm_ulp_limitations ULP Limitations -* When the core voltage is 0.9 V (nominal) the next limitations must be +* When the core voltage is 0.9 V (nominal) the next limitations must be * meet:
-* - the maximum operating frequency for all Clk_HF paths must not exceed +* - the maximum operating frequency for all Clk_HF paths must not exceed * 50 MHz, whereas the peripheral and slow clock must not exceed 25 MHz * (refer to \ref group_sysclk driver documentation). * - the total current consumption must be less than or equal to 20 mA
* * \subsubsection group_syspm_lp_limitations LP Limitations * When the core voltage is 1.1V (nominal) the next limitations must be meet: -* - the maximum operating frequency for all Clk_HF paths must not exceed +* - the maximum operating frequency for all Clk_HF paths must not exceed * 150 MHz, whereas the peripheral and slow clock must not exceed 100 MHz * (refer to \ref group_sysclk driver documentation).
* - the total current consumption must be less than or equal to 250 mA * * \subsection group_syspm_managing_pmic Managing PMIC * -* The SysPm driver also provides an API to configure the external power +* The SysPm driver also provides an API to configure the external power * management integrated circuit (PMIC) that supplies Vddd. -* Use the API to enable the PMIC output that is routed to pmic_wakeup_out pin, -* and configure the polarity of the PMIC input (pmic_wakeup_in) that is used to +* Use the API to enable the PMIC output that is routed to pmic_wakeup_out pin, +* and configure the polarity of the PMIC input (pmic_wakeup_in) that is used to * wake up the PMIC. * * The PMIC is automatically enabled when: * * * the PMIC is locked by a call to Cy_SysPm_PmicLock() * -* * the configured polarity of the PMIC input and the polarity driven to +* * the configured polarity of the PMIC input and the polarity driven to * pmic_wakeup_in pin matches. * * Because a call to Cy_SysPm_PmicLock() automatically enables the PMIC, the PMIC -* can remain disabled only when it is unlocked. See Cy_SysPm_PmicUnlock() +* can remain disabled only when it is unlocked. See Cy_SysPm_PmicUnlock() * for more details. * * Use Cy_SysPm_PmicIsLocked() to read the current PMIC lock status. -* +* * To enable the PMIC, use these functions in this order:
* \code{.c} * 1 Cy_SysPm_PmicUnlock(); @@ -215,18 +213,18 @@ * 3 Cy_SysPm_PmicLock(); * \endcode * -* To disable the PMIC block, unlock the PMIC. Then call Cy_SysPm_PmicDisable() -* with the inverted value of the current active state of the pmic_wakeup_in pin. +* To disable the PMIC block, unlock the PMIC. Then call Cy_SysPm_PmicDisable() +* with the inverted value of the current active state of the pmic_wakeup_in pin. * For example, assume the current state of the pmic_wakeup_in pin is active low. * To disable the PMIC, call these functions in this order:
* \code{.c} * 1 Cy_SysPm_PmicUnlock(); * 2 Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_HIGH); * \endcode -* Note that you do not call Cy_SysPm_PmicLock(), because that automatically +* Note that you do not call Cy_SysPm_PmicLock(), because that automatically * enables the PMIC. -* -* While disabled, the PMIC block is automatically enabled when the +* +* While disabled, the PMIC block is automatically enabled when the * pmic_wakeup_in pin state is changed into high state. * * To disable the PMIC output, call these functions in this order: @@ -234,8 +232,8 @@ * Cy_SysPm_PmicDisableOutput(); * * Do not call Cy_SysPm_PmicLock() (which automatically enables the PMIC output). -* -* When disabled, the PMIC output is enabled when the PMIC is locked, or by +* +* When disabled, the PMIC output is enabled when the PMIC is locked, or by * calling Cy_SysPm_PmicEnableOutput(). * * \subsection group_syspm_managing_backup_domain Managing the Backup Domain @@ -246,137 +244,137 @@ * * Select power supply (Vbackup or Vddd) for the Vddbackup * * * Measure Vddbackup using the ADC -* +* * Refer to the \ref group_syspm_functions_backup functions for more details. * * \subsection group_syspm_cb SysPm Callbacks -* The SysPm driver handles the low power callbacks declared in the application. +* The SysPm driver handles the low power callbacks declared in the application. * -* If there are no callbacks registered, the device just executes the power mode -* transition. However, it is often the case that your firmware must prepare for -* low power mode. For example, you may need to disable a peripheral, or ensure +* If there are no callbacks registered, the device just executes the power mode +* transition. However, it is often the case that your firmware must prepare for +* low power mode. For example, you may need to disable a peripheral, or ensure * that a message is not being transmitted or received. * * To enable this, the SysPm driver implements a callback mechanism. When a lower -* power mode transition is about to take place (either entering or exiting +* power mode transition is about to take place (either entering or exiting * \ref group_syspm_device_power_modes), the registered callbacks are called. * -* The SysPm driver organizes all the callbacks into a linked list. While -* entering a low-power mode, SysPm goes through that linked list from first to +* The SysPm driver organizes all the callbacks into a linked list. While +* entering a low-power mode, SysPm goes through that linked list from first to * last, executing the callbacks one after another. While exiting low-power mode, -* SysPm goes through that linked list again, but in the opposite direction from +* SysPm goes through that linked list again, but in the opposite direction from * last to first. * -* For example, the picture below shows three callback structures organized into -* a linked list: myDeepSleep1, mySleep1, myDeepSleep2 (represented with the -* \ref cy_stc_syspm_callback_t configuration structure). Each structure -* contains, among other fields, the address of the callback function. The code -* snippets below set this up so that myDeepSleep1 is called first when entering -* the low-power mode. This also means that myDeepSleep1 will be the last one to +* For example, the picture below shows three callback structures organized into +* a linked list: myDeepSleep1, mySleep1, myDeepSleep2 (represented with the +* \ref cy_stc_syspm_callback_t configuration structure). Each structure +* contains, among other fields, the address of the callback function. The code +* snippets below set this up so that myDeepSleep1 is called first when entering +* the low-power mode. This also means that myDeepSleep1 will be the last one to * execute when exiting the low-power mode. * * The callback structures after registration: * \image html syspm_2_10_after_registration.png * -* Your application must register each callback, so that SysPm can execute it. -* Upon registration, the linked list is built by the SysPm driver. Notice -* the &mySleep1 address in the myDeepSleep1 -* \ref cy_stc_syspm_callback_t structure. This is filled in by the SysPm driver +* Your application must register each callback, so that SysPm can execute it. +* Upon registration, the linked list is built by the SysPm driver. Notice +* the &mySleep1 address in the myDeepSleep1 +* \ref cy_stc_syspm_callback_t structure. This is filled in by the SysPm driver * when you register mySleep1. The order in which the callbacks are registered in * the application defines the order of their execution by the SysPm driver. You -* may have up to 32 callback functions registered. -* Call \ref Cy_SysPm_RegisterCallback() to register each callback function. -* -* A callback function is typically associated with a particular driver that -* handles the peripheral. So the callback mechanism enables a peripheral to -* prepare for a low-power mode (for instance, shutting down the analog part); -* or to perform tasks while exiting a low-power mode (like enabling the analog +* may have up to 32 callback functions registered. +* Call \ref Cy_SysPm_RegisterCallback() to register each callback function. +* +* A callback function is typically associated with a particular driver that +* handles the peripheral. So the callback mechanism enables a peripheral to +* prepare for a low-power mode (for instance, shutting down the analog part); +* or to perform tasks while exiting a low-power mode (like enabling the analog * part again). * * With the callback mechanism you can prevent switching into a low-power mode if -* a peripheral is not ready. For example, driver X is in the process of -* receiving a message. In the callback function implementation simply return +* a peripheral is not ready. For example, driver X is in the process of +* receiving a message. In the callback function implementation simply return * CY_SYSPM_FAIL in a response to CY_SYSPM_CHECK_READY. * -* If success is returned while executing a callback, the SysPm driver calls the -* next callback and so on to the end of the list. If at some point a callback -* returns CY_SYSPM_FAIL in response to the CY_SYSPM_CHECK_READY step, all the -* callbacks that have already executed are executed in reverse order, with the -* CY_SYSPM_CHECK_FAIL step. This allows each callback to know that entering the -* low-power mode has failed. The callback can then undo whatever it did to -* prepare for low power mode. For example, if the driver X callback shut down +* If success is returned while executing a callback, the SysPm driver calls the +* next callback and so on to the end of the list. If at some point a callback +* returns CY_SYSPM_FAIL in response to the CY_SYSPM_CHECK_READY step, all the +* callbacks that have already executed are executed in reverse order, with the +* CY_SYSPM_CHECK_FAIL step. This allows each callback to know that entering the +* low-power mode has failed. The callback can then undo whatever it did to +* prepare for low power mode. For example, if the driver X callback shut down * the analog part, it can re-enable the analog part. -* -* Let's switch to an example explaining the implementation, setup, and +* +* Let's switch to an example explaining the implementation, setup, and * registration of three callbacks (myDeepSleep1, mySleep1, myDeepSleep2) in the -* application. The \ref group_syspm_cb_config_consideration are provided after +* application. The \ref group_syspm_cb_config_consideration are provided after * the \ref group_syspm_cb_example. -* +* * \subsection group_syspm_cb_example SysPm Callbacks Example * * The following code snippets demonstrate how use the SysPm callbacks mechanism. -* We will build the prototype for an application that registers +* We will build the prototype for an application that registers * three callback functions:
* 1. mySleep1 - handles Sleep
-* 2. myDeepSleep1 - handles Deep Sleep and is associated with peripheral -* HW1_address (see PDL Design -* section to learn about the base hardware +* 2. myDeepSleep1 - handles Deep Sleep and is associated with peripheral +* HW1_address (see PDL Design +* section to learn about the base hardware * address)
-* 3. myDeepSleep2 - handles entering and exiting Deep Sleep and is +* 3. myDeepSleep2 - handles entering and exiting Deep Sleep and is * associated with peripheral HW2_address
* -* We set things up so that the mySleep1 and myDeepSleep1 callbacks do nothing -* while entering the low power mode (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION - -* see \ref group_syspm_cb_function_implementation in +* We set things up so that the mySleep1 and myDeepSleep1 callbacks do nothing +* while entering the low power mode (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION - +* see \ref group_syspm_cb_function_implementation in * \ref group_syspm_cb_config_consideration). -* Skipping the actions while entering low power might be useful if you need +* Skipping the actions while entering low power might be useful if you need * to save the time while switching low-power modes. This is because the callback * function with skipped mode is not even called. -* -* Let's first declare the callback functions. Each gets the pointer to the +* +* Let's first declare the callback functions. Each gets the pointer to the * \ref cy_stc_syspm_callback_params_t structure as the argument. * * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_Callback_Func_Declaration * * Now we setup the \ref cy_stc_syspm_callback_params_t structures that we will -* pass to callback functions. Note that for the myDeepSleep1 and myDeepSleep2 -* callbacks we also pass the pointers to the peripherals related to that -* callback (see PDL Design section to -* learn about the base hardware address). -* The configuration considerations related to this structure are described +* pass to callback functions. Note that for the myDeepSleep1 and myDeepSleep2 +* callbacks we also pass the pointers to the peripherals related to that +* callback (see PDL Design section to +* learn about the base hardware address). +* The configuration considerations related to this structure are described * in \ref group_syspm_cb_parameters in \ref group_syspm_cb_config_consideration. * * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_Callback_Params_Declaration * -* Now we setup the actual callback configuration structures. Each of these -* contains, among the other fields, the address of the -* \ref cy_stc_syspm_callback_params_t we just set up. We will use the callback -* configuration structures later in the code to register the callbacks in the -* SysPm driver. Again, we set things up so that the mySleep1 and myDeepSleep1 -* callbacks do nothing while entering the low power mode -* (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION) - see -* \ref group_syspm_cb_function_implementation in +* Now we setup the actual callback configuration structures. Each of these +* contains, among the other fields, the address of the +* \ref cy_stc_syspm_callback_params_t we just set up. We will use the callback +* configuration structures later in the code to register the callbacks in the +* SysPm driver. Again, we set things up so that the mySleep1 and myDeepSleep1 +* callbacks do nothing while entering the low power mode +* (skip on CY_SYSPM_SKIP_BEFORE_TRANSITION) - see +* \ref group_syspm_cb_function_implementation in * \ref group_syspm_cb_config_consideration. * * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_Callback_Structure_Declaration * -* Note that in each case the last two fields are NULL. These are fields used by +* Note that in each case the last two fields are NULL. These are fields used by * the SysPm driver to set up the linked list of callback functions. -* -* The callback structures are now defined and allocated in the user's +* +* The callback structures are now defined and allocated in the user's * memory space: * \image html syspm_2_10_before_registration.png * -* Now we implement the callback functions. See -* \ref group_syspm_cb_function_implementation in -* \ref group_syspm_cb_config_consideration for the instructions on how the +* Now we implement the callback functions. See +* \ref group_syspm_cb_function_implementation in +* \ref group_syspm_cb_config_consideration for the instructions on how the * callback functions should be implemented. * * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_Callback_Func_Implementation * -* Finally, we register the callbacks so that the SysPm driver knows about them. -* The order in which the callbacks will be called depends upon the order in -* which the callbacks are registered. If there are no callbacks registered, +* Finally, we register the callbacks so that the SysPm driver knows about them. +* The order in which the callbacks will be called depends upon the order in +* which the callbacks are registered. If there are no callbacks registered, * the device just executes the power mode transition. * * Callbacks that reconfigure global resources, such as clock frequencies, should @@ -387,114 +385,114 @@ * \snippet syspm/syspm_2_10_sut_01.cydsn/main_cm4.c snippet_Cy_SysPm_RegisterCallback * * We are done configuring three callbacks. Now the SysPm driver will execute the -* callbacks appropriately whenever there is a call to a power mode transition -* function: \ref Cy_SysPm_Sleep(), \ref Cy_SysPm_DeepSleep(), -* \ref Cy_SysPm_EnterLowPowerMode(), \ref Cy_SysPm_ExitLowPowerMode(), and +* callbacks appropriately whenever there is a call to a power mode transition +* function: \ref Cy_SysPm_Sleep(), \ref Cy_SysPm_DeepSleep(), +* \ref Cy_SysPm_EnterLowPowerMode(), \ref Cy_SysPm_ExitLowPowerMode(), and * \ref Cy_SysPm_Hibernate(). -* \note On a wakeup from hibernate the device goes through a reset, so the -* callbacks with CY_SYSPM_AFTER_TRANSITION are not executed. Refer to +* \note On a wakeup from hibernate the device goes through a reset, so the +* callbacks with CY_SYSPM_AFTER_TRANSITION are not executed. Refer to * \ref Cy_SysPm_Hibernate() for more details. -* -* Refer to \ref group_syspm_cb_uregistering in -* \ref group_syspm_cb_config_consideration to learn what to do if you need to -* remove the callback from the linked list. You might want to unregister the +* +* Refer to \ref group_syspm_cb_uregistering in +* \ref group_syspm_cb_config_consideration to learn what to do if you need to +* remove the callback from the linked list. You might want to unregister the * callback for debug purposes. -* -* Refer to \ref group_syspm_cb_flow in \ref group_syspm_cb_config_consideration +* +* Refer to \ref group_syspm_cb_flow in \ref group_syspm_cb_config_consideration * to learn about how the SysPm is processing the callbacks. * * \subsection group_syspm_cb_config_consideration Callback Configuration Considerations * * \subsubsection group_syspm_cb_parameters Callback Function Parameters -* -* The callbackParams parameter of the callback function is a -* \ref cy_stc_syspm_callback_params_t structure. The first field in this -* structure (mode) is for internal use. In the example code we used a -* dummy value CY_SYSPM_CHECK_READY to eliminate compilation errors associated -* with the enumeration. The driver sets the mode field to the correct -* value when calling the callback functions (the mode is referred to as step in -* the \ref group_syspm_cb_function_implementation). The callback function reads -* the value and acts based on the mode set by the SysPm driver. The base +* +* The callbackParams parameter of the callback function is a +* \ref cy_stc_syspm_callback_params_t structure. The first field in this +* structure (mode) is for internal use. In the example code we used a +* dummy value CY_SYSPM_CHECK_READY to eliminate compilation errors associated +* with the enumeration. The driver sets the mode field to the correct +* value when calling the callback functions (the mode is referred to as step in +* the \ref group_syspm_cb_function_implementation). The callback function reads +* the value and acts based on the mode set by the SysPm driver. The base * and context fields are optional and can be NULL. Some drivers require a -* base hardware address and a context. If your callback routine needs access to -* the driver registers or context, provide those values (see -* PDL Design section -* to learn about Base Hardware Address). Be aware of MISRA warnings if these +* base hardware address and a context. If your callback routine needs access to +* the driver registers or context, provide those values (see +* PDL Design section +* to learn about Base Hardware Address). Be aware of MISRA warnings if these * parameters are NULL. * * \subsubsection group_syspm_cb_structures Callback Function Structure -* For each callback, provide a \ref cy_stc_syspm_callback_t structure. Some -* fields in this structure are maintained by the driver. Use NULL for -* prevItm and nextItm. The driver uses these fields to build a +* For each callback, provide a \ref cy_stc_syspm_callback_t structure. Some +* fields in this structure are maintained by the driver. Use NULL for +* prevItm and nextItm. The driver uses these fields to build a * linked list of callback functions. * -* \warning The Cy_SysPm_RegisterCallback() function stores a pointer to the -* cy_stc_syspm_callback_t variable. Do not modify elements of the -* cy_stc_syspm_callback_t structure after the callback is registered. -* You are responsible for ensuring that the variable remains in scope. -* Typically the structure is declared as a global or static variable, or as a +* \warning The Cy_SysPm_RegisterCallback() function stores a pointer to the +* cy_stc_syspm_callback_t variable. Do not modify elements of the +* cy_stc_syspm_callback_t structure after the callback is registered. +* You are responsible for ensuring that the variable remains in scope. +* Typically the structure is declared as a global or static variable, or as a * local variable in the main() function. * * \subsubsection group_syspm_cb_function_implementation Callback Function Implementation * -* Every callback function should handle four possible steps (referred to as +* Every callback function should handle four possible steps (referred to as * "mode") defined in \ref cy_en_syspm_callback_mode_t :
* * CY_SYSPM_CHECK_READY - prepare for entering a low power mode
-* * CY_SYSPM_BEFORE_TRANSITION - The actions to be done before entering +* * CY_SYSPM_BEFORE_TRANSITION - The actions to be done before entering * the low-power mode
-* * CY_SYSPM_AFTER_TRANSITION - The actions to be done after exiting the +* * CY_SYSPM_AFTER_TRANSITION - The actions to be done after exiting the * low-power mode
-* * CY_SYSPM_CHECK_FAIL - roll back the actions done in the callbacks +* * CY_SYSPM_CHECK_FAIL - roll back the actions done in the callbacks * executed previously with CY_SYSPM_CHECK_READY
* * A callback function can skip steps (see \ref group_syspm_skip_callback_modes). -* In our example mySleep1 and myDeepSleep1 callbacks do nothing while entering -* the low power mode (skip on CY_SYSPM_BEFORE_TRANSITION). If there is anything -* preventing low power mode entry - return CY_SYSPM_FAIL in response to -* CY_SYSPM_CHECK_READY in your callback implementation. Note that the callback -* should return CY_SYSPM_FAIL only in response to CY_SYSPM_CHECK_READY. The -* callback function should always return CY_SYSPM_PASS for other modes: +* In our example mySleep1 and myDeepSleep1 callbacks do nothing while entering +* the low power mode (skip on CY_SYSPM_BEFORE_TRANSITION). If there is anything +* preventing low power mode entry - return CY_SYSPM_FAIL in response to +* CY_SYSPM_CHECK_READY in your callback implementation. Note that the callback +* should return CY_SYSPM_FAIL only in response to CY_SYSPM_CHECK_READY. The +* callback function should always return CY_SYSPM_PASS for other modes: * CY_SYSPM_CHECK_FAIL, CY_SYSPM_BEFORE_TRANSITION, and CY_SYSPM_AFTER_TRANSITION * (see \ref group_syspm_cb_flow). -* +* * \subsubsection group_syspm_cb_flow Callbacks Execution Flow * -* This section explains what happens during a power transition, when callbacks +* This section explains what happens during a power transition, when callbacks * are implemented and set up correctly. The following discussion assumes:
* * All required callback functions are defined and implemented
* * All cy_stc_syspm_callback_t structures are filled with required values
-* * All callbacks are successfully registered +* * All callbacks are successfully registered * -* User calls one of the power mode transition functions: \ref Cy_SysPm_Sleep(), -* \ref Cy_SysPm_DeepSleep(), \ref Cy_SysPm_EnterLowPowerMode(), -* \ref Cy_SysPm_ExitLowPowerMode(), and \ref Cy_SysPm_Hibernate(). -* It calls each callback with the mode set to CY_SYSPM_CHECK_READY. This +* User calls one of the power mode transition functions: \ref Cy_SysPm_Sleep(), +* \ref Cy_SysPm_DeepSleep(), \ref Cy_SysPm_EnterLowPowerMode(), +* \ref Cy_SysPm_ExitLowPowerMode(), and \ref Cy_SysPm_Hibernate(). +* It calls each callback with the mode set to CY_SYSPM_CHECK_READY. This * triggers execution of the code for that step inside of each user callback. -* -* If that process is successful for all callbacks, then -* \ref Cy_SysPm_ExecuteCallback() calls each callback with the mode set to -* CY_SYSPM_BEFORE_TRANSITION. This triggers execution of the code for that step +* +* If that process is successful for all callbacks, then +* \ref Cy_SysPm_ExecuteCallback() calls each callback with the mode set to +* CY_SYSPM_BEFORE_TRANSITION. This triggers execution of the code for that step * inside each user callback. We then enter the low power mode. -* -* When exiting the low power mode, the SysPm driver executes -* \ref Cy_SysPm_ExecuteCallback() again. This time it calls each callback in -* reverse order, with the mode set to CY_SYSPM_AFTER_TRANSITION. This triggers -* execution of the code for that step inside each user callback. When complete, +* +* When exiting the low power mode, the SysPm driver executes +* \ref Cy_SysPm_ExecuteCallback() again. This time it calls each callback in +* reverse order, with the mode set to CY_SYSPM_AFTER_TRANSITION. This triggers +* execution of the code for that step inside each user callback. When complete, * we are back to Active state. -* -* A callback can return CY_SYSPM_FAIL only while executing the -* CY_SYSPM_CHECK_READY step. If that happens, then the remaining callbacks are -* not executed. Any callbacks that have already executed are called again, in -* reverse order, with CY_SYSPM_CHECK_FAIL. This allows the system to return to -* the previous state. Then any of the functions (\ref Cy_SysPm_Sleep(), -* \ref Cy_SysPm_DeepSleep(), \ref Cy_SysPm_EnterLowPowerMode(), -* \ref Cy_SysPm_ExitLowPowerMode(), and \ref Cy_SysPm_Hibernate()) that -* attempted to switch the device into a low power mode will +* +* A callback can return CY_SYSPM_FAIL only while executing the +* CY_SYSPM_CHECK_READY step. If that happens, then the remaining callbacks are +* not executed. Any callbacks that have already executed are called again, in +* reverse order, with CY_SYSPM_CHECK_FAIL. This allows the system to return to +* the previous state. Then any of the functions (\ref Cy_SysPm_Sleep(), +* \ref Cy_SysPm_DeepSleep(), \ref Cy_SysPm_EnterLowPowerMode(), +* \ref Cy_SysPm_ExitLowPowerMode(), and \ref Cy_SysPm_Hibernate()) that +* attempted to switch the device into a low power mode will * return CY_SYSPM_FAIL. * -* Callbacks that reconfigure global resources, such as clock frequencies, -* should be registered last. They then modify global resources as the final -* step before entering the low power mode, and restore those resources first, +* Callbacks that reconfigure global resources, such as clock frequencies, +* should be registered last. They then modify global resources as the final +* step before entering the low power mode, and restore those resources first, * as the system returns from Low-power mode. * * \subsubsection group_syspm_cb_uregistering Callback Unregistering @@ -516,29 +514,29 @@ * * * LDO -* Low Dropout Linear Regulator (LDO). The functions that manage this -* block are grouped as \ref group_syspm_functions_ldo under +* Low Dropout Linear Regulator (LDO). The functions that manage this +* block are grouped as \ref group_syspm_functions_ldo under * \ref group_syspm_functions_core_regulators * * * * SIMO Buck -* Single Inductor Multiple Output Buck Regulator, referred as -* "Buck regulator" throughout the documentation. The functions that +* Single Inductor Multiple Output Buck Regulator, referred as +* "Buck regulator" throughout the documentation. The functions that * manage this block are grouped as \ref group_syspm_functions_buck under * \ref group_syspm_functions_core_regulators * * * * PMIC -* Power Management Integrated Circuit. The functions that manage this +* Power Management Integrated Circuit. The functions that manage this * block are grouped as \ref group_syspm_functions_pmic * * * * LPActive -* Low-Power Active mode. The MCU power mode. -* See the \ref group_syspm_switching_into_lpactive +* Low-Power Active mode. The MCU power mode. +* See the \ref group_syspm_switching_into_lpactive * section for details * * @@ -556,7 +554,7 @@ * * 2.10 *
-* * Changed names for all Backup, Buck-related functions, defines, +* * Changed names for all Backup, Buck-related functions, defines, * and enums
* * Changed next power mode function names:
* Cy_SysPm_EnterLpMode
@@ -570,7 +568,7 @@ * cy_en_syspm_simo_buck_voltage2_t
* * Updated Power Modes documentation section
* * Added Low Power Callback Managements section
-* * Documentation edits +* * Documentation edits * * Improvements made based on usability feedback
* Documentation update and clarification @@ -578,10 +576,10 @@ * * * 2.0 -* Enhancement and defect fixes:
+* Enhancement and defect fixes:
* * Added input parameter(s) validation to all public functions
* * Removed "_SysPm_" prefixes from the internal functions names
-* * Changed the type of elements with limited set of values, from +* * Changed the type of elements with limited set of values, from * uint32_t to enumeration * * Enhanced syspm callback mechanism * * Added functions to control:
@@ -602,9 +600,9 @@ * \defgroup group_syspm_functions Functions * \{ * \defgroup group_syspm_functions_power Power Modes -* \defgroup group_syspm_functions_power_status Power Status +* \defgroup group_syspm_functions_power_status Power Status * \defgroup group_syspm_functions_iofreeze I/Os Freeze -* \defgroup group_syspm_functions_core_regulators Core Voltage Regulation +* \defgroup group_syspm_functions_core_regulators Core Voltage Regulation * \{ * \defgroup group_syspm_functions_ldo LDO * \defgroup group_syspm_functions_buck Buck @@ -660,7 +658,7 @@ extern "C" { /** The internal define of the unlock value for the PMIC functions */ #define CY_SYSPM_PMIC_UNLOCK_KEY (0x3AU) -/** The internal define of the tries number in the Cy_SysPm_ExitLowPowerMode() +/** The internal define of the tries number in the Cy_SysPm_ExitLowPowerMode() * function */ #define CY_SYSPM_WAIT_DELAY_TRYES (100U) @@ -715,19 +713,19 @@ extern "C" { /* Macro to validate parameters in Cy_SysPm_BackupSetSupply() function */ #define CY_SYSPM_IS_VDDBACKUP_VALID(vddBackControl) (((vddBackControl) == CY_SYSPM_VDDBACKUP_DEFAULT) || \ ((vddBackControl) == CY_SYSPM_VDDBACKUP_VBACKUP)) - + /* Macro to validate parameters in Cy_SysPm_BackupSuperCapCharge() function */ #define CY_SYSPM_IS_SC_CHARGE_KEY_VALID(key) (((key) == CY_SYSPM_SC_CHARGE_ENABLE) || \ ((key) == CY_SYSPM_SC_CHARGE_DISABLE)) #if(0u != SRSS_BUCKCTL_PRESENT) - /** The definition for the delay of the Buck supply regulator + /** The definition for the delay of the Buck supply regulator * stabilization after it was configured with enabled Buck output 1 */ #define CY_SYSPM_BUCK_CORE_SUPPLY_STABLE_US (900U) - /** The definition for the delay of the Buck supply regulator - * stabilization after it was configured with enabled Buck + /** The definition for the delay of the Buck supply regulator + * stabilization after it was configured with enabled Buck * output 2 only */ #define CY_SYSPM_BUCK_BLE_SUPPLY_STABLE_US (600U) @@ -739,20 +737,20 @@ extern "C" { #endif /* (0u != SRSS_BUCKCTL_PRESENT) */ -/** The wait time for transition of the device from the Active into +/** The wait time for transition of the device from the Active into * the LPActive */ #define CY_SYSPM_ACTIVE_TO_LP_WAIT_US (1U) /** The wait delay time which occurs before the Active reference is settled. -* This delay is used in transition of the device from Active into the LPActive -* low-power mode +* This delay is used in transition of the device from Active into the LPActive +* low-power mode */ #define CY_SYSPM_LP_TO_ACTIVE_WAIT_BEFORE_US (8U) -/** The wait delay time which occurs after the Active reference is settled. -* This delay is used in transition the device from Active into the LPActive -* mode +/** The wait delay time which occurs after the Active reference is settled. +* This delay is used in transition the device from Active into the LPActive +* mode */ #define CY_SYSPM_LP_TO_ACTIVE_WAIT_AFTER_US (1U) @@ -788,46 +786,46 @@ extern "C" { */ #define CY_SYSPM_WAKEUP_PIN0_BIT (1UL) -/** The internal define of the second wakeup pin bit +/** The internal define of the second wakeup pin bit * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_PIN1_BIT (2UL) /** -* The internal define of the first LPComparator bit +* The internal define of the first LPComparator bit * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_LPCOMP0_BIT (4UL) /** -* The internal define for the second LPComparator bit +* The internal define for the second LPComparator bit * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_LPCOMP1_BIT (8UL) /** -* The internal define of the first LPComparator value +* The internal define of the first LPComparator value * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_LPCOMP0 ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP0_BIT << \ SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos) /** -* The internal define of the second LPComparator value +* The internal define of the second LPComparator value * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_LPCOMP1 ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP1_BIT << \ SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos) /** -* The internal define of the first wake-up pin value +* The internal define of the first wake-up pin value * used in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_PIN0 ((uint32_t) CY_SYSPM_WAKEUP_PIN0_BIT << \ SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos) /** -* The internal define of the second wake-up pin value used +* The internal define of the second wake-up pin value used * in the Cy_SysPm_SetHibernateWakeupSource() function */ #define CY_SYSPM_WAKEUP_PIN1 ((uint32_t) CY_SYSPM_WAKEUP_PIN1_BIT << \ @@ -873,10 +871,10 @@ extern "C" { /** The CM4 is Low-Power mode */ #define CY_SYSPM_STATUS_CM4_LOWPOWER (0x80U) - + /** The define of retained power mode of the CM4 */ #define CY_SYSPM_CM4_PWR_RETAINED (2UL) - + #endif /* (0u != CY_IP_M4CPUSS) */ /** The CM0 is Active */ @@ -935,48 +933,48 @@ typedef enum CY_SYSPM_WAIT_FOR_EVENT /**< Wait for an event */ } cy_en_syspm_waitfor_t; -/** This enumeration is used to configure sources for wakeup from the Hibernate +/** This enumeration is used to configure sources for wakeup from the Hibernate * power mode */ typedef enum { /** Configure a low level for the first LPComp */ - CY_SYSPM_HIBERNATE_LPCOMP0_LOW = + CY_SYSPM_HIBERNATE_LPCOMP0_LOW = ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP0_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos), /** Configure a high level for the first LPComp */ - CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = - ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP0_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | + CY_SYSPM_HIBERNATE_LPCOMP0_HIGH = + ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP0_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP0_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos)), /** Configure a low level for the second LPComp */ CY_SYSPM_HIBERNATE_LPCOMP1_LOW = ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP1_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos), - + /** Configure a high level for the second LPComp */ CY_SYSPM_HIBERNATE_LPCOMP1_HIGH = - ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP1_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | + ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP1_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | ((uint32_t) CY_SYSPM_WAKEUP_LPCOMP1_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos)), /** Configure the RTC alarm */ CY_SYSPM_HIBERNATE_RTC_ALARM = SRSS_PWR_HIBERNATE_MASK_HIBALARM_Msk, - + /** Configure the WDT interrupt */ CY_SYSPM_HIBERNATE_WDT = SRSS_PWR_HIBERNATE_MASK_HIBWDT_Msk, /** Configure a low level for the first wakeup-pin */ CY_SYSPM_HIBERNATE_PIN0_LOW = ((uint32_t) CY_SYSPM_WAKEUP_PIN0_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos), - + /** Configure a high level for the first wakeup-pin */ CY_SYSPM_HIBERNATE_PIN0_HIGH = - ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_PIN0_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | + ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_PIN0_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | ((uint32_t) CY_SYSPM_WAKEUP_PIN0_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos)), /** Configure a low level for the second wakeup-pin */ CY_SYSPM_HIBERNATE_PIN1_LOW = ((uint32_t) CY_SYSPM_WAKEUP_PIN1_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos), - + /** Configure a high level for the second wakeup-pin */ CY_SYSPM_HIBERNATE_PIN1_HIGH = - ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_PIN1_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | + ((uint32_t) ((uint32_t) CY_SYSPM_WAKEUP_PIN1_BIT << SRSS_PWR_HIBERNATE_POLARITY_HIBPIN_Pos) | ((uint32_t) CY_SYSPM_WAKEUP_PIN1_BIT << SRSS_PWR_HIBERNATE_MASK_HIBPIN_Pos)), } cy_en_syspm_hibernate_wakeup_source_t; @@ -990,7 +988,7 @@ typedef enum #if(0u != SRSS_BUCKCTL_PRESENT) /** - * The enumeration is used to select the output voltage for the Buck + * The enumeration is used to select the output voltage for the Buck * output 1, which can supply a core(s). */ typedef enum @@ -1011,7 +1009,7 @@ typedef enum #if(0u != SRSS_SIMOBUCK_PRESENT) /** - * The enumeration is used to select the output voltage for the Buck + * The enumeration is used to select the output voltage for the Buck * output 2, which can source the BLE HW block. */ typedef enum @@ -1030,7 +1028,7 @@ typedef enum #endif /* (0u != SRSS_BUCKCTL_PRESENT) */ /** -* This enumeration is used to set a polarity for the PMIC input. The PMIC is +* This enumeration is used to set a polarity for the PMIC input. The PMIC is * automatically enabled when configured polarity of PMIC input and the polarity * driven to pmic_wakeup_in pin matches. */ @@ -1045,7 +1043,7 @@ typedef enum */ typedef enum { - CY_SYSPM_VDDBACKUP_DEFAULT = 0U, /**< Automatically selects Vddd or Vbackup to supply + CY_SYSPM_VDDBACKUP_DEFAULT = 0U, /**< Automatically selects Vddd or Vbackup to supply Vddbackup */ CY_SYSPM_VDDBACKUP_VBACKUP = 2U /**< Set Vbackup to supply Vddbackup */ } cy_en_syspm_vddbackup_control_t; @@ -1077,7 +1075,7 @@ typedef enum /** The callback mode enumeration. This enum defines the callback mode */ typedef enum { - CY_SYSPM_CHECK_READY = 0x01U, /**< Callbacks with this mode are executed before entering into the + CY_SYSPM_CHECK_READY = 0x01U, /**< Callbacks with this mode are executed before entering into the low-power mode. Callback function check if the device is ready to enter the low-power mode */ CY_SYSPM_CHECK_FAIL = 0x02U, /**< Callbacks with this mode are executed after the previous callbacks @@ -1098,7 +1096,7 @@ typedef enum * \defgroup group_syspm_skip_callback_modes The Defines to skip the callbacks modes * \{ * The defines of the SysPm callbacks modes that can be skipped during execution. -* For more information about callbacks modes refer +* For more information about callbacks modes refer * to \ref cy_en_syspm_callback_mode_t. */ #define CY_SYSPM_SKIP_CHECK_READY (0x01U) /**< The define to skip the check ready mode in the syspm callback */ @@ -1116,13 +1114,13 @@ typedef enum /** The structure with the syspm callback parameters */ typedef struct { - cy_en_syspm_callback_mode_t mode; /**< The callback mode. You can skip assigning as this element is for - internal usage, see \ref cy_en_syspm_callback_mode_t. This element - should not be defined as it is updated every time before the + cy_en_syspm_callback_mode_t mode; /**< The callback mode. You can skip assigning as this element is for + internal usage, see \ref cy_en_syspm_callback_mode_t. This element + should not be defined as it is updated every time before the callback function is executed */ void *base; /**< The base address of a HW instance, matches name of the driver in the API for the base address. Can be not defined if not required */ - void *context; /**< The context for the handler function. This item can be + void *context; /**< The context for the handler function. This item can be skipped if not required. Can be not defined if not required */ } cy_stc_syspm_callback_params_t; @@ -1135,26 +1133,26 @@ typedef struct cy_stc_syspm_callback { Cy_SysPmCallback callback; /**< The callback handler function */ cy_en_syspm_callback_type_t type; /**< The callback type, see \ref cy_en_syspm_callback_type_t */ - uint32_t skipMode; /**< The mask of modes to be skipped during callback + uint32_t skipMode; /**< The mask of modes to be skipped during callback execution, see \ref group_syspm_skip_callback_modes. The - corresponding callback mode won't execute if the + corresponding callback mode won't execute if the appropriate define is set. These values can be ORed. If all modes are required to be executed this element should be equal to zero. */ - cy_stc_syspm_callback_params_t *callbackParams; /**< The address of a cy_stc_syspm_callback_params_t, + cy_stc_syspm_callback_params_t *callbackParams; /**< The address of a cy_stc_syspm_callback_params_t, the callback is executed with these parameters */ - struct cy_stc_syspm_callback *prevItm; /**< The previous list item. This element should not be - defined, or defined as NULL. It is for internal + struct cy_stc_syspm_callback *prevItm; /**< The previous list item. This element should not be + defined, or defined as NULL. It is for internal usage to link this structure to the next registered structure. - It will be updated during callback registering. Do not + It will be updated during callback registering. Do not modify this element in run-time */ - - struct cy_stc_syspm_callback *nextItm; /**< The next list item. This element should not be - defined, or defined as NULL. It is for internal usage to + + struct cy_stc_syspm_callback *nextItm; /**< The next list item. This element should not be + defined, or defined as NULL. It is for internal usage to link this structure to the previous registered structure. - It will be updated during callback registering. Do not + It will be updated during callback registering. Do not modify this element in run-time */ } cy_stc_syspm_callback_t; @@ -1253,10 +1251,10 @@ __STATIC_INLINE bool Cy_SysPm_LdoIsEnabled(void); * \{ */ __STATIC_INLINE void Cy_SysPm_PmicEnable(void); -__STATIC_INLINE void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t polarity); +__STATIC_INLINE void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t polarity); __STATIC_INLINE void Cy_SysPm_PmicAlwaysEnable(void); __STATIC_INLINE void Cy_SysPm_PmicEnableOutput(void); -__STATIC_INLINE void Cy_SysPm_PmicDisableOutput(void); +__STATIC_INLINE void Cy_SysPm_PmicDisableOutput(void); __STATIC_INLINE void Cy_SysPm_PmicLock(void); __STATIC_INLINE void Cy_SysPm_PmicUnlock(void); __STATIC_INLINE bool Cy_SysPm_PmicIsEnabled(void); @@ -1339,7 +1337,7 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, * Checks whether the CM4 is in Sleep mode. * * \return - * true - if the CM4 is in Sleep mode; + * true - if the CM4 is in Sleep mode; * false - if the CM4 is not in Sleep mode. * * \funcusage @@ -1359,7 +1357,7 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, * Checks whether the CM4 is in the Deep Sleep mode. * * \return - * true - if CM4 is in Deep Sleep mode; false - if the CM4 is not in + * true - if CM4 is in Deep Sleep mode; false - if the CM4 is not in * Deep Sleep mode. * * \funcusage @@ -1376,11 +1374,11 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, * Function Name: Cy_SysPm_Cm4IsLowPower ****************************************************************************//** * - * Checks whether the CM4 is in Low-Power mode. Note that Low-Power mode is a + * Checks whether the CM4 is in Low-Power mode. Note that Low-Power mode is a * status of the device. * * \return - * true - if the CM4 is in Low-Power mode; + * true - if the CM4 is in Low-Power mode; * false - if the CM4 is not in Low-Power mode. * * \funcusage @@ -1406,7 +1404,7 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type, * Checks whether the CM0+ is in Active mode. * * \return -* true - if the CM0+ is in Active mode; +* true - if the CM0+ is in Active mode; * false - if the CM0+ is not in Active mode. * * \funcusage @@ -1426,7 +1424,7 @@ __STATIC_INLINE bool Cy_SysPm_Cm0IsActive(void) * Checks whether the CM0+ is in Sleep mode. * * \return -* true - if the CM0+ is in Sleep mode; +* true - if the CM0+ is in Sleep mode; * false - if the CM0+ is not in Sleep mode. * * \funcusage @@ -1446,7 +1444,7 @@ __STATIC_INLINE bool Cy_SysPm_Cm0IsSleep(void) * Checks whether the CM0+ is in Deep Sleep mode. * * \return -* true - if the CM0+ is in Deep Sleep mode; +* true - if the CM0+ is in Deep Sleep mode; * false - if the CM0+ is not in Deep Sleep mode. * * \funcusage @@ -1467,7 +1465,7 @@ __STATIC_INLINE bool Cy_SysPm_Cm0IsDeepSleep(void) * status of the device. * * \return -* true - if the CM0+ is in Low-Power mode; +* true - if the CM0+ is in Low-Power mode; * false - if the CM0+ is not in Low-Power mode. * * \funcusage @@ -1531,11 +1529,11 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * Function Name: Cy_SysPm_BuckGetVoltage1 ****************************************************************************//** * - * Gets the current nominal output 1 voltage (Vccbuck1) of + * Gets the current nominal output 1 voltage (Vccbuck1) of * the Buck regulator. * * \note The actual device output 1 voltage (Vccbuck1) can be different from - * the nominal voltage because the actual voltage value depends on the + * the nominal voltage because the actual voltage value depends on the * conditions including the load current. * * \return @@ -1560,20 +1558,20 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * Function Name: Cy_SysPm_BuckGetVoltage2 ****************************************************************************//** * - * Gets the current output 2 nominal voltage (Vbuckrf) of the SIMO + * Gets the current output 2 nominal voltage (Vbuckrf) of the SIMO * Buck regulator. * - * \note The actual device output 2 voltage (Vbuckrf) can be different from the - * nominal voltage because the actual voltage value depends on the conditions + * \note The actual device output 2 voltage (Vbuckrf) can be different from the + * nominal voltage because the actual voltage value depends on the conditions * including the load current. * * \return - * The nominal output voltage of the Buck SIMO regulator output 2 + * The nominal output voltage of the Buck SIMO regulator output 2 * voltage (Vbuckrf). * See \ref cy_en_syspm_buck_voltage2_t. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1593,18 +1591,18 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * Function Name: Cy_SysPm_BuckDisableVoltage2 ****************************************************************************//** * - * Disables the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. The - * output 2 voltage (Vbuckrf) of the Buck regulator is used to supply + * Disables the output 2 voltage (Vbuckrf) of the SIMO Buck regulator. The + * output 2 voltage (Vbuckrf) of the Buck regulator is used to supply * the BLE HW block. * * \note The function does not have effect if the Buck regulator is * switched off. * - * \note Ensures that the new voltage supply for the BLE HW block is settled + * \note Ensures that the new voltage supply for the BLE HW block is settled * and is stable before calling the Cy_SysPm_BuckDisableVoltage2() function. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1624,8 +1622,8 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * * Sets the hardware control for the SIMO Buck output 2 (Vbuckrf). * - * The hardware control for the Vbuckrf output. When this bit is set, the - * value in BUCK_OUT2_EN is ignored and the hardware signal is used instead. If the + * The hardware control for the Vbuckrf output. When this bit is set, the + * value in BUCK_OUT2_EN is ignored and the hardware signal is used instead. If the * product has supporting hardware, it can directly control the enable signal * for Vbuckrf. * @@ -1635,7 +1633,7 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * Function does not have an effect if SIMO Buck regulator is disabled. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1664,17 +1662,17 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * * Gets the hardware control for Vbuckrf. * - * The hardware control for the Vbuckrf output. When this bit is set, the - * value in BUCK_OUT2_EN is ignored and the hardware signal is used instead. - * If the product has supporting hardware, it can directly control the enable + * The hardware control for the Vbuckrf output. When this bit is set, the + * value in BUCK_OUT2_EN is ignored and the hardware signal is used instead. + * If the product has supporting hardware, it can directly control the enable * signal for Vbuckrf. * * \return - * True if the HW control is set; false if the FW control is set for the + * True if the HW control is set; false if the FW control is set for the * Buck output 2. * * The function is applicable for devices with the SIMO Buck regulator. - * Refer to device datasheet about information if device contains + * Refer to device datasheet about information if device contains * SIMO Buck. * * \funcusage @@ -1700,8 +1698,8 @@ __STATIC_INLINE bool Cy_SysPm_IsLowPower(void) * * Gets the current output voltage value of the LDO. * -* \note The actual device Vccd voltage can be different from the -* nominal voltage because the actual voltage value depends on the conditions +* \note The actual device Vccd voltage can be different from the +* nominal voltage because the actual voltage value depends on the conditions * including the load current. * * \return @@ -1779,10 +1777,10 @@ __STATIC_INLINE bool Cy_SysPm_IoIsFrozen(void) * * Enable the external PMIC that supplies Vddd (if present). * -* For information about the PMIC input and output pins and their assignment in +* For information about the PMIC input and output pins and their assignment in * the specific families devices, refer to the appropriate device TRM. -* -* The function is not effective when the PMIC is locked. Call +* +* The function is not effective when the PMIC is locked. Call * Cy_SysPm_PmicUnlock() before enabling the PMIC. * * \funcusage @@ -1805,28 +1803,28 @@ __STATIC_INLINE void Cy_SysPm_PmicEnable(void) * Function Name: Cy_SysPm_PmicDisable ****************************************************************************//** * -* Disables the PMIC. This function does not affect the output pin. Configures -* the PMIC input pin polarity. The PMIC input pin has programmable polarity to -* enable the PMIC using different input polarities. The PMIC output pin is +* Disables the PMIC. This function does not affect the output pin. Configures +* the PMIC input pin polarity. The PMIC input pin has programmable polarity to +* enable the PMIC using different input polarities. The PMIC output pin is * automatically enabled when input polarity and configured polarity matches. -* The function is not effective when the active level of PMIC input pin +* The function is not effective when the active level of PMIC input pin * is equal to configured PMIC polarity. * -* The function is not effective when the PMIC is locked. Call +* The function is not effective when the PMIC is locked. Call * Cy_SysPm_PmicUnlock() before enabling the PMIC. * * \param polarity -* Configures the PMIC wakeup input pin to be active low or active +* Configures the PMIC wakeup input pin to be active low or active * high. See \ref cy_en_syspm_pmic_wakeup_polarity_t. * -* The PMIC will be enabled automatically by any of RTC alarm or PMIC wakeup +* The PMIC will be enabled automatically by any of RTC alarm or PMIC wakeup * event regardless of the PMIC lock state. * * \warning -* The PMIC is enabled automatically when you call Cy_SysPm_PmicLock(). +* The PMIC is enabled automatically when you call Cy_SysPm_PmicLock(). * To keep the PMIC disabled, the PMIC must remain unlocked. * -* For information about the PMIC input and output pins and their assignment in +* For information about the PMIC input and output pins and their assignment in * the specific families devices, refer to the appropriate device TRM. * * \funcusage @@ -1836,11 +1834,11 @@ __STATIC_INLINE void Cy_SysPm_PmicEnable(void) __STATIC_INLINE void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t polarity) { CY_ASSERT_L3(CY_SYSPM_IS_POLARITY_VALID(polarity)); - + if(CY_SYSPM_PMIC_UNLOCK_KEY == _FLD2VAL(BACKUP_PMIC_CTL_UNLOCK, BACKUP->PMIC_CTL)) { - BACKUP->PMIC_CTL = - (_VAL2FLD(BACKUP_PMIC_CTL_UNLOCK, CY_SYSPM_PMIC_UNLOCK_KEY) | + BACKUP->PMIC_CTL = + (_VAL2FLD(BACKUP_PMIC_CTL_UNLOCK, CY_SYSPM_PMIC_UNLOCK_KEY) | _CLR_SET_FLD32U(BACKUP->PMIC_CTL, BACKUP_PMIC_CTL_POLARITY, (uint32_t) polarity)) & ((uint32_t) ~ _VAL2FLD(BACKUP_PMIC_CTL_PMIC_EN, 1U)); } @@ -1851,11 +1849,11 @@ __STATIC_INLINE void Cy_SysPm_PmicDisable(cy_en_syspm_pmic_wakeup_polarity_t pol * Function Name: Cy_SysPm_PmicAlwaysEnable ****************************************************************************//** * -* Enables the signal through the PMIC output pin. This is a Write once API, -* ensure that the PMIC cannot be disabled or polarity changed until a next +* Enables the signal through the PMIC output pin. This is a Write once API, +* ensure that the PMIC cannot be disabled or polarity changed until a next * device reset. -* -* For information about the PMIC input and output pins and their assignment in +* +* For information about the PMIC input and output pins and their assignment in * the specific families devices, refer to the appropriate device TRM. * * \funcusage @@ -1872,12 +1870,12 @@ __STATIC_INLINE void Cy_SysPm_PmicAlwaysEnable(void) * Function Name: Cy_SysPm_PmicEnableOutput ****************************************************************************//** * -* Enable the PMIC output. +* Enable the PMIC output. * -* The function is not effective when the PMIC is locked. Call +* The function is not effective when the PMIC is locked. Call * Cy_SysPm_PmicUnlock() before enabling the PMIC. * -* For information about the PMIC output pin and it assignment in +* For information about the PMIC output pin and it assignment in * the specific families devices, refer to the appropriate device TRM. * * \funcusage @@ -1898,19 +1896,19 @@ __STATIC_INLINE void Cy_SysPm_PmicEnableOutput(void) * Function Name: Cy_SysPm_PmicDisableOutput ****************************************************************************//** * -* Disables the PMIC output. +* Disables the PMIC output. * -* When PMIC output pin is disabled and is unlocked the pmic output pin can be +* When PMIC output pin is disabled and is unlocked the pmic output pin can be * used for the another purpose. * -* The function is not effective when the PMIC is locked. Call +* The function is not effective when the PMIC is locked. Call * Cy_SysPm_PmicUnlock() before enabling the PMIC. * -* For information about the PMIC output pin and it assignment in +* For information about the PMIC output pin and it assignment in * the specific families devices, refer to the appropriate device TRM. * * \warning -* The PMIC output is enabled automatically when you call Cy_SysPm_PmicLock(). +* The PMIC output is enabled automatically when you call Cy_SysPm_PmicLock(). * To keep PMIC output disabled, the PMIC must remain unlocked. * * \funcusage @@ -1921,10 +1919,10 @@ __STATIC_INLINE void Cy_SysPm_PmicDisableOutput(void) { if(CY_SYSPM_PMIC_UNLOCK_KEY == _FLD2VAL(BACKUP_PMIC_CTL_UNLOCK, BACKUP->PMIC_CTL)) { - BACKUP->PMIC_CTL = + BACKUP->PMIC_CTL = (BACKUP->PMIC_CTL | _VAL2FLD(BACKUP_PMIC_CTL_UNLOCK, CY_SYSPM_PMIC_UNLOCK_KEY)) & ((uint32_t) ~ _VAL2FLD(BACKUP_PMIC_CTL_PMIC_EN_OUTEN, 1U)); - } + } } @@ -1932,12 +1930,12 @@ __STATIC_INLINE void Cy_SysPm_PmicDisableOutput(void) * Function Name: Cy_SysPm_PmicLock ****************************************************************************//** * -* Locks the PMIC control register so that no changes can be made. The changes -* are related to the PMIC enabling/disabling and PMIC output signal +* Locks the PMIC control register so that no changes can be made. The changes +* are related to the PMIC enabling/disabling and PMIC output signal * enabling/disabling. * * \warning -* The PMIC and/or the PMIC output are enabled automatically when +* The PMIC and/or the PMIC output are enabled automatically when * you call Cy_SysPm_PmicLock(). To keep the PMIC or PMIC output disabled, * the PMIC must remain unlocked. * @@ -1956,11 +1954,11 @@ __STATIC_INLINE void Cy_SysPm_PmicLock(void) ****************************************************************************//** * * Unlocks the PMIC control register so that changes can be made. The changes are -* related to the PMIC enabling/disabling and PMIC output signal +* related to the PMIC enabling/disabling and PMIC output signal * enabling/disabling. * * \warning -* The PMIC and/or the PMIC output are enabled automatically when +* The PMIC and/or the PMIC output are enabled automatically when * you call Cy_SysPm_PmicLock(). To keep the PMIC or PMIC output disabled, * the PMIC must remain unlocked. * @@ -1977,7 +1975,7 @@ __STATIC_INLINE void Cy_SysPm_PmicUnlock(void) /******************************************************************************* * Function Name: Cy_SysPm_PmicIsEnabled ****************************************************************************//** -* +* * The function returns the status of the PMIC. * * \return @@ -1997,7 +1995,7 @@ __STATIC_INLINE bool Cy_SysPm_PmicIsEnabled(void) /******************************************************************************* * Function Name: Cy_SysPm_PmicIsOutputEnabled ****************************************************************************//** -* +* * The function returns the status of the PMIC output. * * \return @@ -2048,7 +2046,7 @@ __STATIC_INLINE bool Cy_SysPm_PmicIsLocked(void) * Sets the Backup Supply (Vddback) operation mode. * * \param -* vddBackControl +* vddBackControl * Selects Backup Supply (Vddback) operation mode. * See \ref cy_en_syspm_vddbackup_control_t. * @@ -2073,7 +2071,7 @@ __STATIC_INLINE void Cy_SysPm_BackupSetSupply(cy_en_syspm_vddbackup_control_t vd * Returns the current Backup Supply (Vddback) operation mode. * * \return -* The current Backup Supply (Vddback) operation mode, +* The current Backup Supply (Vddback) operation mode, * see \ref cy_en_syspm_status_t. * * Refer to device TRM for more details about Backup supply modes. @@ -2095,8 +2093,8 @@ __STATIC_INLINE cy_en_syspm_vddbackup_control_t Cy_SysPm_BackupGetSupply(void) * Function Name: Cy_SysPm_BackupEnableVoltageMeasurement ****************************************************************************//** * -* This function enables the Vbackup supply measurement by the ADC. The function -* connects the Vbackup supply to the AMUXBUSA. Note that measured signal is +* This function enables the Vbackup supply measurement by the ADC. The function +* connects the Vbackup supply to the AMUXBUSA. Note that measured signal is * scaled by 40% to allow being measured by the ADC. * * Refer to device TRM for more details about Vbackup supply measurement. @@ -2115,7 +2113,7 @@ __STATIC_INLINE void Cy_SysPm_BackupEnableVoltageMeasurement(void) * Function Name: Cy_SysPm_BackupDisableVoltageMeasurement ****************************************************************************//** * -* The function disables the Vbackup supply measurement by the ADC. The function +* The function disables the Vbackup supply measurement by the ADC. The function * disconnects the Vbackup supply from the AMUXBUSA. * * Refer to device TRM for more details about Vbackup supply measurement. @@ -2136,13 +2134,13 @@ __STATIC_INLINE void Cy_SysPm_BackupDisableVoltageMeasurement(void) * * Configures the supercapacitor charger circuit. * -* \param key +* \param key * Passes the key to enable or disable the supercapacitor charger circuit. * See \ref cy_en_syspm_sc_charge_key_t. * * \warning * This function is used only for charging the supercapacitor. -* Do not use this function to charge a battery. Refer to device TRM for more +* Do not use this function to charge a battery. Refer to device TRM for more * details. * * \funcusage @@ -2152,7 +2150,7 @@ __STATIC_INLINE void Cy_SysPm_BackupDisableVoltageMeasurement(void) __STATIC_INLINE void Cy_SysPm_BackupSuperCapCharge(cy_en_syspm_sc_charge_key_t key) { CY_ASSERT_L3(CY_SYSPM_IS_SC_CHARGE_KEY_VALID(key)); - + if(key == CY_SYSPM_SC_CHARGE_ENABLE) { BACKUP->CTL = _CLR_SET_FLD32U((BACKUP->CTL), BACKUP_CTL_EN_CHARGE_KEY, (uint32_t) CY_SYSPM_SC_CHARGE_ENABLE); @@ -2169,7 +2167,7 @@ __STATIC_INLINE void Cy_SysPm_BackupSuperCapCharge(cy_en_syspm_sc_charge_key_t k /** \cond INTERNAL */ /******************************************************************************* -* Backward compatibility macro. The following code is DEPRECATED and must +* Backward compatibility macro. The following code is DEPRECATED and must * not be used in new projects *******************************************************************************/ #if(0u != SRSS_BUCKCTL_PRESENT) @@ -2189,9 +2187,9 @@ __STATIC_INLINE void Cy_SysPm_BackupSuperCapCharge(cy_en_syspm_sc_charge_key_t k #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_15V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_15V #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_2V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_2V #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_25V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_25V - #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_3V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V + #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_3V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_3V #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_35V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_35V - #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_4V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V + #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_4V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_4V #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_45V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_45V #define CY_SYSPM_SIMO_BUCK_OUT2_VOLTAGE_1_5V CY_SYSPM_BUCK_OUT2_VOLTAGE_1_5V #endif /* (0u != SRSS_SIMOBUCK_PRESENT) */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.c index 7f5b477628..a1702d81f3 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.c @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_systick.h" diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.h index 868769b864..6df517a5d1 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/systick/cy_systick.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CY_SYSTICK_H_ @@ -70,7 +68,7 @@ * * 1.0.1 * Fixed a warning issued when the compilation of C++ source code was -* enabled. +* enabled. * * * diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm.h index ffa91ef7c7..e95d9c22cd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** @@ -24,17 +22,17 @@ /** * \addtogroup group_tcpwm * \{ -* -* The TCPWM driver is a multifunction driver that implements Timer Counter, +* +* The TCPWM driver is a multifunction driver that implements Timer Counter, * PWM, and Quadrature Decoder functionality using the TCPWM block. * -* Each TCPWM block is a collection of counters that can all be triggered -* simultaneously. For each function call, the base register address of -* the TCPWM being used must be passed first, followed by the index of -* the counter you want to touch next. -* For some functions, you can manage multiple counters simultaneously. You -* provide a bit field representing each counter, rather than the single counter -* index). +* Each TCPWM block is a collection of counters that can all be triggered +* simultaneously. For each function call, the base register address of +* the TCPWM being used must be passed first, followed by the index of +* the counter you want to touch next. +* For some functions, you can manage multiple counters simultaneously. You +* provide a bit field representing each counter, rather than the single counter +* index). * * The TCPWM supports three operating modes: * * Timer/Counter @@ -44,7 +42,7 @@ * \n * \b Timer/Counter * -* Use this mode whenever a specific timing interval or measurement is +* Use this mode whenever a specific timing interval or measurement is * needed. Examples include: * * Creating a periodic interrupt for running other system tasks * * Measuring frequency of an input signal @@ -57,18 +55,18 @@ * The Timer/Counter has the following features: * * 16- or 32-bit Timer/Counter * * Programmable Period Register -* * Programmable Compare Register. Compare value can be swapped with a +* * Programmable Compare Register. Compare value can be swapped with a * buffered compare value on comparison event * * Capture with buffer register * * Count Up, Count Down, or Count Up and Down Counting modes * * Continuous or One Shot Run modes -* * Interrupt and Output on Overflow, Underflow, Capture, or Compare +* * Interrupt and Output on Overflow, Underflow, Capture, or Compare * * Start, Reload, Stop, Capture, and Count Inputs * * \n * \b PWM * -* Use this mode when an output square wave is needed with a specific +* Use this mode when an output square wave is needed with a specific * period and duty cycle, such as: * * Creating arbitrary square wave outputs * * Driving an LED (changing the brightness) @@ -77,30 +75,30 @@ * The PWM has the following features: * * 16- or 32-bit Counter * * Two Programmable Period registers that can be swapped -* * Two Output Compare registers that can be swapped on overflow and/or +* * Two Output Compare registers that can be swapped on overflow and/or * underflow * * Left Aligned, Right Aligned, Center Aligned, and Asymmetric Aligned modes * * Continuous or One Shot run modes * * Pseudo Random mode * * Two PWM outputs with Dead Time insertion, and programmable polarity -* * Interrupt and Output on Overflow, Underflow, or Compare +* * Interrupt and Output on Overflow, Underflow, or Compare * * Start, Reload, Stop, Swap (Capture), and Count Inputs -* * Multiple Components can be synchronized together for applications +* * Multiple Components can be synchronized together for applications * such as three phase motor control * * \n * \b Quadrature \b Decoder * -* A quadrature decoder is used to decode the output of a quadrature encoder. -* A quadrature encoder senses the position, velocity, and direction of -* an object (for example a rotating axle, or a spinning mouse ball). -* A quadrature decoder can also be used for precision measurement of speed, -* acceleration, and position of a motor's rotor, or with a rotary switch to +* A quadrature decoder is used to decode the output of a quadrature encoder. +* A quadrature encoder senses the position, velocity, and direction of +* an object (for example a rotating axle, or a spinning mouse ball). +* A quadrature decoder can also be used for precision measurement of speed, +* acceleration, and position of a motor's rotor, or with a rotary switch to * determine user input. \n -* +* * The Quadrature Decoder has the following features: * * 16- or 32-bit Counter -* * Counter Resolution of x1, x2, and x4 the frequency of the phiA (Count) and +* * Counter Resolution of x1, x2, and x4 the frequency of the phiA (Count) and * phiB (Start) inputs * * Index Input to determine absolute position * * A positive edge on phiA increments the counter when phiB is 0 and decrements @@ -108,48 +106,48 @@ * * \section group_tcpwm_configuration Configuration Considerations * -* For each mode, the TCPWM driver has a configuration structure, an Init -* function, and an Enable function. +* For each mode, the TCPWM driver has a configuration structure, an Init +* function, and an Enable function. * * Provide the configuration parameters in the appropriate structure (see -* Counter \ref group_tcpwm_data_structures_counter, PWM -* \ref group_tcpwm_data_structures_pwm, or QuadDec -* \ref group_tcpwm_data_structures_quaddec). -* Then call the appropriate Init function: -* \ref Cy_TCPWM_Counter_Init, \ref Cy_TCPWM_PWM_Init, or -* \ref Cy_TCPWM_QuadDec_Init. Provide the address of the filled structure as a -* parameter. To enable the counter, call the appropriate Enable function: -* \ref Cy_TCPWM_Counter_Enable, \ref Cy_TCPWM_PWM_Enable, or +* Counter \ref group_tcpwm_data_structures_counter, PWM +* \ref group_tcpwm_data_structures_pwm, or QuadDec +* \ref group_tcpwm_data_structures_quaddec). +* Then call the appropriate Init function: +* \ref Cy_TCPWM_Counter_Init, \ref Cy_TCPWM_PWM_Init, or +* \ref Cy_TCPWM_QuadDec_Init. Provide the address of the filled structure as a +* parameter. To enable the counter, call the appropriate Enable function: +* \ref Cy_TCPWM_Counter_Enable, \ref Cy_TCPWM_PWM_Enable, or * \ref Cy_TCPWM_QuadDec_Enable). * -* Many functions work with an individual counter. You can also manage multiple -* counters simultaneously for certain functions. These are listed in the -* \ref group_tcpwm_functions_common -* section of the TCPWM. You can enable, disable, or trigger (in various ways) -* multiple counters simultaneously. For these functions you provide a bit field -* representing each counter in the TCPWM you want to control. You can -* represent the bit field as an ORed mask of each counter, like -* ((1U << cntNumX) | (1U << cntNumX) | (1U << cntNumX)), where X is the counter +* Many functions work with an individual counter. You can also manage multiple +* counters simultaneously for certain functions. These are listed in the +* \ref group_tcpwm_functions_common +* section of the TCPWM. You can enable, disable, or trigger (in various ways) +* multiple counters simultaneously. For these functions you provide a bit field +* representing each counter in the TCPWM you want to control. You can +* represent the bit field as an ORed mask of each counter, like +* ((1U << cntNumX) | (1U << cntNumX) | (1U << cntNumX)), where X is the counter * number from 0 to 31. * * \note -* * If none of the input terminals (start, reload(index)) are used, the -* software event \ref Cy_TCPWM_TriggerStart or +* * If none of the input terminals (start, reload(index)) are used, the +* software event \ref Cy_TCPWM_TriggerStart or * \ref Cy_TCPWM_TriggerReloadOrIndex must be called to start the counting. -* * If count input terminal is not used, the \ref CY_TCPWM_INPUT_LEVEL macro -* should be set for the countInputMode parameter and the \ref CY_TCPWM_INPUT_1 -* macro should be set for the countInputMode parameter in the configuration -* structure of the appropriate mode(Counter -* \ref group_tcpwm_data_structures_counter, PWM -* \ref group_tcpwm_data_structures_pwm, or QuadDec +* * If count input terminal is not used, the \ref CY_TCPWM_INPUT_LEVEL macro +* should be set for the countInputMode parameter and the \ref CY_TCPWM_INPUT_1 +* macro should be set for the countInputMode parameter in the configuration +* structure of the appropriate mode(Counter +* \ref group_tcpwm_data_structures_counter, PWM +* \ref group_tcpwm_data_structures_pwm, or QuadDec * \ref group_tcpwm_data_structures_quaddec). * * \section group_tcpwm_more_information More Information * -* For more information on the TCPWM peripheral, refer to the technical +* For more information on the TCPWM peripheral, refer to the technical * reference manual (TRM). * -* \section group_tcpwm_MISRA MISRA-C Compliance +* \section group_tcpwm_MISRA MISRA-C Compliance * * * @@ -276,7 +274,7 @@ extern "C" { /** * \defgroup group_tcpwm_interrupt_sources Interrupt Sources * \{ -* Interrupt Sources +* Interrupt Sources */ #define CY_TCPWM_INT_ON_TC (1U) /**< Interrupt on Terminal count(TC) */ #define CY_TCPWM_INT_ON_CC (2U) /**< Interrupt on Compare/Capture(CC) */ @@ -327,13 +325,13 @@ extern "C" { */ /** TCPWM status definitions */ -typedef enum +typedef enum { CY_TCPWM_SUCCESS = 0x00U, /**< Successful */ CY_TCPWM_BAD_PARAM = CY_TCPWM_ID | CY_PDL_STATUS_ERROR | 0x01U, /**< One or more invalid parameters */ } cy_en_tcpwm_status_t; /** \} group_tcpwm_enums */ - + /******************************************************************************* * Function Prototypes *******************************************************************************/ @@ -361,7 +359,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatusMasked(TCPWM_Type const *bas * Function Name: Cy_TCPWM_Enable_Multiple ****************************************************************************//** * -* Enables the counter(s) in the TCPWM block. Multiple blocks can be started +* Enables the counter(s) in the TCPWM block. Multiple blocks can be started * simultaneously. * * \param base @@ -384,7 +382,7 @@ __STATIC_INLINE void Cy_TCPWM_Enable_Multiple(TCPWM_Type *base, uint32_t counter * Function Name: Cy_TCPWM_Disable_Multiple ****************************************************************************//** * -* Disables the counter(s) in the TCPWM block. Multiple TCPWM can be disabled +* Disables the counter(s) in the TCPWM block. Multiple TCPWM can be disabled * simultaneously. * * \param base @@ -500,10 +498,10 @@ __STATIC_INLINE void Cy_TCPWM_TriggerCaptureOrSwap(TCPWM_Type *base, uint32_t co * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * -* \return +* \return *. See \ref group_tcpwm_interrupt_sources * * \funcusage @@ -525,7 +523,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptStatus(TCPWM_Type const *base, uin * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param source @@ -551,7 +549,7 @@ __STATIC_INLINE void Cy_TCPWM_ClearInterrupt(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param source @@ -571,13 +569,13 @@ __STATIC_INLINE void Cy_TCPWM_SetInterrupt(TCPWM_Type *base, uint32_t cntNum, u * Function Name: Cy_TCPWM_SetInterruptMask ****************************************************************************//** * -* Sets an interrupt mask. A 1 means that when the event occurs, it will cause an +* Sets an interrupt mask. A 1 means that when the event occurs, it will cause an * interrupt; a 0 means no interrupt will be triggered. * * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param mask @@ -602,10 +600,10 @@ __STATIC_INLINE void Cy_TCPWM_SetInterruptMask(TCPWM_Type *base, uint32_t cntNum * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * -* \return +* \return * Interrupt Mask. See \ref group_tcpwm_interrupt_sources * * \funcusage @@ -627,10 +625,10 @@ __STATIC_INLINE uint32_t Cy_TCPWM_GetInterruptMask(TCPWM_Type const *base, uint3 * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * -* \return +* \return * Interrupt Mask. See \ref group_tcpwm_interrupt_sources * * \funcusage diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.c index 254035d052..525f41fd46 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.c @@ -8,9 +8,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_tcpwm_counter.h" @@ -42,7 +40,7 @@ extern "C" { * \snippet tcpwm/tcpwm_v1_0_counter_sut_01.cydsn/main_cm4.c snippet_Cy_TCPWM_Counter_Init * *******************************************************************************/ -cy_en_tcpwm_status_t Cy_TCPWM_Counter_Init(TCPWM_Type *base, uint32_t cntNum, +cy_en_tcpwm_status_t Cy_TCPWM_Counter_Init(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_counter_config_t const *config) { cy_en_tcpwm_status_t status = CY_TCPWM_BAD_PARAM; @@ -104,7 +102,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_Counter_Init(TCPWM_Type *base, uint32_t cntNum, * Function Name: Cy_TCPWM_Counter_DeInit ****************************************************************************//** * -* De-initializes the counter in the TCPWM block, returns register values to +* De-initializes the counter in the TCPWM block, returns register values to * default. * * \param base @@ -133,7 +131,7 @@ void Cy_TCPWM_Counter_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_cou base->CNT[cntNum].INTR = CY_TCPWM_CNT_INTR_DEFAULT; base->CNT[cntNum].INTR_SET = CY_TCPWM_CNT_INTR_SET_DEFAULT; base->CNT[cntNum].INTR_MASK = CY_TCPWM_CNT_INTR_MASK_DEFAULT; - + if (CY_TCPWM_INPUT_CREATOR != config->countInput) { base->CNT[cntNum].TR_CTRL0 = CY_TCPWM_CNT_TR_CTRL0_DEFAULT; diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.h index 31554fe2d7..92fcb0c9da 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_counter.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_TCPWM_COUNTER_H) @@ -44,11 +42,11 @@ typedef struct cy_stc_tcpwm_counter_config { uint32_t period; /**< Sets the period of the counter */ /** Sets the clock prescaler inside the TCWPM block. See \ref group_tcpwm_counter_clk_prescalers */ - uint32_t clockPrescaler; + uint32_t clockPrescaler; uint32_t runMode; /**< Sets the Counter Timer Run mode. See \ref group_tcpwm_counter_run_modes */ uint32_t countDirection; /**< Sets the counter direction. See \ref group_tcpwm_counter_direction */ /** The counter can either compare or capture a value. See \ref group_tcpwm_counter_compare_capture */ - uint32_t compareOrCapture; + uint32_t compareOrCapture; uint32_t compare0; /**< Sets the value for Compare0*/ uint32_t compare1; /**< Sets the value for Compare1*/ bool enableCompareSwap; /**< If enabled, the compare values are swapped each time the comparison is true */ @@ -138,7 +136,7 @@ typedef struct cy_stc_tcpwm_counter_config * \addtogroup group_tcpwm_functions_counter * \{ */ -cy_en_tcpwm_status_t Cy_TCPWM_Counter_Init(TCPWM_Type *base, uint32_t cntNum, +cy_en_tcpwm_status_t Cy_TCPWM_Counter_Init(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_counter_config_t const *config); void Cy_TCPWM_Counter_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_counter_config_t const *config); __STATIC_INLINE void Cy_TCPWM_Counter_Enable(TCPWM_Type *base, uint32_t cntNum); @@ -166,7 +164,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetPeriod(TCPWM_Type const *base, uint * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -175,7 +173,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetPeriod(TCPWM_Type const *base, uint *******************************************************************************/ __STATIC_INLINE void Cy_TCPWM_Counter_Enable(TCPWM_Type *base, uint32_t cntNum) { - base->CTRL_SET = (1UL << cntNum); + base->CTRL_SET = (1UL << cntNum); } @@ -188,7 +186,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_Enable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -210,7 +208,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_Disable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -223,10 +221,10 @@ __STATIC_INLINE void Cy_TCPWM_Counter_Disable(TCPWM_Type *base, uint32_t cntNum) __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetStatus(TCPWM_Type const *base, uint32_t cntNum) { uint32_t status = base->CNT[cntNum].STATUS; - + /* Generates proper up counting status. Is not generated by HW */ status &= ~CY_TCPWM_COUNTER_STATUS_UP_COUNTING; - status |= ((~status & CY_TCPWM_COUNTER_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << + status |= ((~status & CY_TCPWM_COUNTER_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << CY_TCPWM_CNT_STATUS_UP_POS); return(status); @@ -242,7 +240,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetStatus(TCPWM_Type const *base, uin * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -267,7 +265,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetCapture(TCPWM_Type const *base, ui * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -292,7 +290,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetCaptureBuf(TCPWM_Type const *base, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param compare0 @@ -317,7 +315,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_SetCompare0(TCPWM_Type *base, uint32_t cnt * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -342,7 +340,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetCompare0(TCPWM_Type const *base, u * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param compare1 @@ -367,7 +365,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_SetCompare1(TCPWM_Type *base, uint32_t cnt * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -392,7 +390,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetCompare1(TCPWM_Type const *base, u * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param enable @@ -424,7 +422,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_EnableCompareSwap(TCPWM_Type *base, uint32 * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param count @@ -449,7 +447,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_SetCounter(TCPWM_Type *base, uint32_t cntN * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -474,7 +472,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_Counter_GetCounter(TCPWM_Type const *base, ui * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param period @@ -499,7 +497,7 @@ __STATIC_INLINE void Cy_TCPWM_Counter_SetPeriod(TCPWM_Type *base, uint32_t cntNu * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.c index a4b3b6cd28..14991befc9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.c @@ -8,9 +8,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_tcpwm_pwm.h" @@ -96,7 +94,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_st _VAL2FLD(TCPWM_CNT_TR_CTRL0_STOP_SEL, config->killInput) | _VAL2FLD(TCPWM_CNT_TR_CTRL0_COUNT_SEL, config->countInput)); } - + base->CNT[cntNum].TR_CTRL1 = (_VAL2FLD(TCPWM_CNT_TR_CTRL1_CAPTURE_EDGE, config->swapInputMode) | _VAL2FLD(TCPWM_CNT_TR_CTRL1_RELOAD_EDGE, config->reloadInputMode) | _VAL2FLD(TCPWM_CNT_TR_CTRL1_START_EDGE, config->startInputMode) | @@ -115,7 +113,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_PWM_Init(TCPWM_Type *base, uint32_t cntNum, cy_st * Function Name: Cy_TCPWM_PWM_DeInit ****************************************************************************//** * -* De-initializes the counter in the TCPWM block, returns register values to +* De-initializes the counter in the TCPWM block, returns register values to * default. * * \param base @@ -146,7 +144,7 @@ void Cy_TCPWM_PWM_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_pwm_con base->CNT[cntNum].INTR_MASK = CY_TCPWM_CNT_INTR_MASK_DEFAULT; if (CY_TCPWM_INPUT_CREATOR != config->countInput) - { + { base->CNT[cntNum].TR_CTRL0 = CY_TCPWM_CNT_TR_CTRL0_DEFAULT; } } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.h index 863ccfe013..1aff8527d7 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_pwm.h @@ -7,10 +7,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_TCPWM_PWM_H) @@ -60,14 +58,14 @@ typedef struct cy_stc_tcpwm_pwm_config uint32_t invertPWMOutN; /**< Inverts the PWM_n output */ uint32_t killMode; /**< Configures the PWM kill modes. See \ref group_tcpwm_pwm_kill_modes */ uint32_t swapInputMode; /**< Configures how the swap input behaves. See \ref group_tcpwm_input_modes */ - /** Selects which input the swap uses. Inputs are device-specific. See \ref group_tcpwm_input_selection */ + /** Selects which input the swap uses. Inputs are device-specific. See \ref group_tcpwm_input_selection */ uint32_t swapInput; uint32_t reloadInputMode; /**< Configures how the reload input behaves. See \ref group_tcpwm_input_modes */ /** Selects which input the reload uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */ - uint32_t reloadInput; + uint32_t reloadInput; uint32_t startInputMode; /**< Configures how the start input behaves. See \ref group_tcpwm_input_modes */ /** Selects which input the start uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */ - uint32_t startInput; + uint32_t startInput; uint32_t killInputMode; /**< Configures how the kill input behaves. See \ref group_tcpwm_input_modes */ /** Selects which input the kill uses. The inputs are device-specific. See \ref group_tcpwm_input_selection */ uint32_t killInput; @@ -88,7 +86,7 @@ typedef struct cy_stc_tcpwm_pwm_config #define CY_TCPWM_PWM_CONTINUOUS (0U) /**< Counter runs forever */ /** \} group_tcpwm_pwm_run_modes */ -/** \defgroup group_tcpwm_pwm_modes PWM modes +/** \defgroup group_tcpwm_pwm_modes PWM modes * \{ * Sets the PWM modes. */ @@ -228,7 +226,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type *base, uint32_t cn * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -237,7 +235,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type *base, uint32_t cn *******************************************************************************/ __STATIC_INLINE void Cy_TCPWM_PWM_Enable(TCPWM_Type *base, uint32_t cntNum) { - base->CTRL_SET = (1UL << cntNum); + base->CTRL_SET = (1UL << cntNum); } /******************************************************************************* @@ -249,7 +247,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_Enable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -271,7 +269,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_Disable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -284,12 +282,12 @@ __STATIC_INLINE void Cy_TCPWM_PWM_Disable(TCPWM_Type *base, uint32_t cntNum) __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetStatus(TCPWM_Type const *base, uint32_t cntNum) { uint32_t status = base->CNT[cntNum].STATUS; - + /* Generates proper up counting status, does not generated by HW */ status &= ~CY_TCPWM_PWM_STATUS_UP_COUNTING; - status |= ((~status & CY_TCPWM_PWM_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << + status |= ((~status & CY_TCPWM_PWM_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << CY_TCPWM_CNT_STATUS_UP_POS); - + return(status); } @@ -303,7 +301,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetStatus(TCPWM_Type const *base, uint32_t * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param compare0 @@ -328,7 +326,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare0(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -353,7 +351,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare0(TCPWM_Type const *base, uint32 * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param compare1 @@ -378,7 +376,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_SetCompare1(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -403,7 +401,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCompare1(TCPWM_Type const *base, uint32 * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param enable @@ -435,7 +433,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_EnableCompareSwap(TCPWM_Type *base, uint32_t c * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param count @@ -460,7 +458,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_SetCounter(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -485,7 +483,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetCounter(TCPWM_Type const *base, uint32_ * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param period0 @@ -510,7 +508,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod0(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -535,7 +533,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod0(TCPWM_Type const *base, uint32_ * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param period1 @@ -560,7 +558,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_SetPeriod1(TCPWM_Type *base, uint32_t cntNum, * \param base * The pointer to a COUNTER PWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -585,7 +583,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_PWM_GetPeriod1(TCPWM_Type const *base, uint32_ * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param enable @@ -604,7 +602,7 @@ __STATIC_INLINE void Cy_TCPWM_PWM_EnablePeriodSwap(TCPWM_Type *base, uint32_t cn else { base->CNT[cntNum].CTRL &= ~TCPWM_CNT_CTRL_AUTO_RELOAD_PERIOD_Msk; - } + } } /** \} group_tcpwm_functions_pwm */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.c index 05499a2be4..b580a2be5e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.c @@ -8,9 +8,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_tcpwm_quaddec.h" @@ -42,7 +40,7 @@ extern "C" { * \snippet tcpwm/tcpwm_v1_0_quaddec_sut_01.cydsn/main_cm4.c snippet_Cy_TCPWM_QuadDec_Init * *******************************************************************************/ -cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, +cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_quaddec_config_t const *config) { cy_en_tcpwm_status_t status = CY_TCPWM_BAD_PARAM; @@ -53,18 +51,18 @@ cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, _VAL2FLD(TCPWM_CNT_CTRL_MODE, CY_TCPWM_QUADDEC_CTRL_QUADDEC_MODE)); if (CY_TCPWM_INPUT_CREATOR != config->phiAInput) - { + { base->CNT[cntNum].TR_CTRL0 = (_VAL2FLD(TCPWM_CNT_TR_CTRL0_COUNT_SEL, config->phiAInput) | _VAL2FLD(TCPWM_CNT_TR_CTRL0_START_SEL, config->phiBInput) | _VAL2FLD(TCPWM_CNT_TR_CTRL0_RELOAD_SEL, config->indexInput) | _VAL2FLD(TCPWM_CNT_TR_CTRL0_STOP_SEL, config->stopInput)); } - + base->CNT[cntNum].TR_CTRL1 = (_VAL2FLD(TCPWM_CNT_TR_CTRL1_CAPTURE_EDGE, CY_TCPWM_INPUT_LEVEL) | _VAL2FLD(TCPWM_CNT_TR_CTRL1_COUNT_EDGE, CY_TCPWM_INPUT_LEVEL) | _VAL2FLD(TCPWM_CNT_TR_CTRL1_START_EDGE, CY_TCPWM_INPUT_LEVEL) | _VAL2FLD(TCPWM_CNT_TR_CTRL1_RELOAD_EDGE, config->indexInputMode) | - _VAL2FLD(TCPWM_CNT_TR_CTRL1_STOP_EDGE, config->stopInputMode)); + _VAL2FLD(TCPWM_CNT_TR_CTRL1_STOP_EDGE, config->stopInputMode)); base->CNT[cntNum].INTR_MASK = config->interruptSources; @@ -79,7 +77,7 @@ cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, * Function Name: Cy_TCPWM_QuadDec_DeInit ****************************************************************************//** * -* De-initializes the counter in the TCPWM block, returns register values to +* De-initializes the counter in the TCPWM block, returns register values to * default. * * \param base @@ -110,7 +108,7 @@ void Cy_TCPWM_QuadDec_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_qua base->CNT[cntNum].INTR_MASK = CY_TCPWM_CNT_INTR_MASK_DEFAULT; if (CY_TCPWM_INPUT_CREATOR != config->phiAInput) - { + { base->CNT[cntNum].TR_CTRL0 = CY_TCPWM_CNT_TR_CTRL0_DEFAULT; } } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.h index de455e454f..7cb3171dd9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/tcpwm/cy_tcpwm_quaddec.h @@ -7,10 +7,9 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* \copyright +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #if !defined(CY_TCPWM_QUADDEC_H) @@ -58,14 +57,14 @@ typedef struct cy_stc_tcpwm_quaddec_config uint32_t phiAInput; /** Selects which input the phiB uses. The inputs are device specific. See \ref group_tcpwm_input_selection */ uint32_t phiBInput; - + }cy_stc_tcpwm_quaddec_config_t; /** \} group_tcpwm_data_structures_quaddec */ /** * \addtogroup group_tcpwm_macros_quaddec * \{ -* \defgroup group_tcpwm_quaddec_resolution QuadDec Resolution +* \defgroup group_tcpwm_quaddec_resolution QuadDec Resolution * \{ * The quadrature decoder resolution. */ @@ -103,7 +102,7 @@ typedef struct cy_stc_tcpwm_quaddec_config * \{ */ -cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, +cy_en_tcpwm_status_t Cy_TCPWM_QuadDec_Init(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_quaddec_config_t const *config); void Cy_TCPWM_QuadDec_DeInit(TCPWM_Type *base, uint32_t cntNum, cy_stc_tcpwm_quaddec_config_t const *config); __STATIC_INLINE void Cy_TCPWM_QuadDec_Enable(TCPWM_Type *base, uint32_t cntNum); @@ -124,7 +123,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetCounter(TCPWM_Type const *base, uin * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -133,7 +132,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetCounter(TCPWM_Type const *base, uin *******************************************************************************/ __STATIC_INLINE void Cy_TCPWM_QuadDec_Enable(TCPWM_Type *base, uint32_t cntNum) { - base->CTRL_SET = (1UL << cntNum); + base->CTRL_SET = (1UL << cntNum); } /******************************************************************************* @@ -145,7 +144,7 @@ __STATIC_INLINE void Cy_TCPWM_QuadDec_Enable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \funcusage @@ -167,7 +166,7 @@ __STATIC_INLINE void Cy_TCPWM_QuadDec_Disable(TCPWM_Type *base, uint32_t cntNum) * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -180,10 +179,10 @@ __STATIC_INLINE void Cy_TCPWM_QuadDec_Disable(TCPWM_Type *base, uint32_t cntNum) __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetStatus(TCPWM_Type const *base, uint32_t cntNum) { uint32_t status = base->CNT[cntNum].STATUS; - + /* Generates proper up counting status, does not generated by HW */ status &= ~CY_TCPWM_QUADDEC_STATUS_UP_COUNTING; - status |= ((~status & CY_TCPWM_QUADDEC_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << + status |= ((~status & CY_TCPWM_QUADDEC_STATUS_DOWN_COUNTING & (status >> TCPWM_CNT_STATUS_RUNNING_Pos)) << CY_TCPWM_CNT_STATUS_UP_POS); return(status); @@ -199,7 +198,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetStatus(TCPWM_Type const *base, uint * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -224,7 +223,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetCapture(TCPWM_Type const *base, uin * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return @@ -249,7 +248,7 @@ __STATIC_INLINE uint32_t Cy_TCPWM_QuadDec_GetCaptureBuf(TCPWM_Type const *base, * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \param count @@ -274,7 +273,7 @@ __STATIC_INLINE void Cy_TCPWM_QuadDec_SetCounter(TCPWM_Type *base, uint32_t cntN * \param base * The pointer to a TCPWM instance. * -* \param cntNum +* \param cntNum * The Counter instance number in the selected TCPWM. * * \return diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.c index a75e83bfd8..2ffefb09dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.c @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_trigmux.h" @@ -26,7 +24,7 @@ * - Bits 6:0 select the input trigger number in the trigger group. * * \param outTrig -* The output of the trigger mux. This refers to the consumer of the trigger mux. +* The output of the trigger mux. This refers to the consumer of the trigger mux. * - Bits 11:8 represent the trigger group selection. * - Bits 6:0 select the output trigger number in the trigger group. * @@ -42,9 +40,9 @@ * \return * A status * - 0: Successful connection made. -* - 1: An invalid input selection corresponding to the output. +* - 1: An invalid input selection corresponding to the output. * Generally when the trigger groups do not match. -* +* *******************************************************************************/ cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, bool invert, en_trig_type_t trigType) { @@ -52,7 +50,7 @@ cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, boo cy_en_trigmux_status_t retVal = CY_TRIGMUX_BAD_PARAM; CY_ASSERT_L3(CY_LPCOMP_IS_TRIGTYPE_VALID(trigType)); - + /* inTrig and outTrig should be in the same group */ if ((inTrig & CY_TR_GROUP_MASK) == (outTrig & CY_TR_GROUP_MASK)) { @@ -61,7 +59,7 @@ cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, boo *trOutCtlAddr = _VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_SEL, inTrig) | _BOOL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_INV, invert) | _VAL2FLD(PERI_TR_GR_TR_OUT_CTL_TR_EDGE, trigType); - + retVal = CY_TRIGMUX_SUCCESS; } @@ -73,28 +71,28 @@ cy_en_trigmux_status_t Cy_TrigMux_Connect(uint32_t inTrig, uint32_t outTrig, boo * Function Name: Cy_TrigMux_SwTrigger ****************************************************************************//** * -* This function generates a software trigger on an input trigger line. -* All output triggers connected to this input trigger will be triggered. -* The function also verifies that there is no activated trigger before -* generating another activation. +* This function generates a software trigger on an input trigger line. +* All output triggers connected to this input trigger will be triggered. +* The function also verifies that there is no activated trigger before +* generating another activation. * * \param trigLine * The input of the trigger mux. -* - Bit 30 represents if the signal is an input/output. When this bit is set, +* - Bit 30 represents if the signal is an input/output. When this bit is set, * the trigger activation is for an output trigger from the trigger multiplexer. -* When this bit is reset, the trigger activation is for an input trigger to -* the trigger multiplexer. +* When this bit is reset, the trigger activation is for an input trigger to +* the trigger multiplexer. * - Bits 11:8 represent the trigger group selection. * - Bits 6:0 select the output trigger number in the trigger group. * * \param cycles * The number of cycles during which the trigger remains activated. -* The valid range of cycles is 1-254. +* The valid range of cycles is 1-254. * These two additional special values can be passed to this parameter: -* * CY_TRIGGER_INFINITE - The trigger will be active until the user +* * CY_TRIGGER_INFINITE - The trigger will be active until the user * clears it; * * CY_TRIGGER_DEACTIVATE - The trigger will be deactivated forcibly. -* +* * \return * A status * - 0: If there was not an already activated trigger. @@ -107,7 +105,7 @@ cy_en_trigmux_status_t Cy_TrigMux_SwTrigger(uint32_t trigLine, uint32_t cycles) CY_ASSERT_L2(0U == (trigLine & (uint32_t)~CY_TR_PARAM_MASK)); CY_ASSERT_L2(CY_TR_CYCLES_MAX >= cycles); - + if (CY_TRIGGER_DEACTIVATE != cycles) { @@ -119,7 +117,7 @@ cy_en_trigmux_status_t Cy_TrigMux_SwTrigger(uint32_t trigLine, uint32_t cycles) _VAL2FLD(PERI_TR_CMD_COUNT, cycles) | _VAL2FLD(PERI_TR_CMD_OUT_SEL, (trigLine & CY_TR_OUT_CTL_MASK) >> CY_TR_OUT_CTL_SHIFT) | _VAL2FLD(PERI_TR_CMD_ACTIVATE, CY_TR_ACTIVATE_ENABLE); - + retVal = CY_TRIGMUX_SUCCESS; } } @@ -130,12 +128,12 @@ cy_en_trigmux_status_t Cy_TrigMux_SwTrigger(uint32_t trigLine, uint32_t cycles) /* Forcibly deactivate the trigger. */ PERI->TR_CMD = _VAL2FLD(PERI_TR_CMD_TR_SEL, (trigLine & CY_TR_MASK)) | _VAL2FLD(PERI_TR_CMD_GROUP_SEL, ((trigLine & CY_TR_GROUP_MASK) >> CY_TR_GROUP_SHIFT)) | - _VAL2FLD(PERI_TR_CMD_OUT_SEL, (trigLine & CY_TR_OUT_CTL_MASK) >> CY_TR_OUT_CTL_SHIFT); - + _VAL2FLD(PERI_TR_CMD_OUT_SEL, (trigLine & CY_TR_OUT_CTL_MASK) >> CY_TR_OUT_CTL_SHIFT); + retVal = CY_TRIGMUX_SUCCESS; - } + } } - + return retVal; } diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.h index d1c31e77e6..b9b8d0782d 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/trigmux/cy_trigmux.h @@ -7,98 +7,96 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ /** * \defgroup group_trigmux Trigger multiplexer (TrigMux) * \{ -* The trigger multiplexer provides access to the multiplexer that selects a set -* of trigger output signals from different peripheral blocks to route them to the +* The trigger multiplexer provides access to the multiplexer that selects a set +* of trigger output signals from different peripheral blocks to route them to the * specific trigger input of another peripheral block. * -* The TrigMux driver is based on the trigger multiplexer's hardware block. -* The Trigger multiplexer block consists of multiple trigger multiplexers. -* These trigger multiplexers are grouped in trigger groups. All the trigger -* multiplexers in the trigger group share similar input options. The trigger +* The TrigMux driver is based on the trigger multiplexer's hardware block. +* The Trigger multiplexer block consists of multiple trigger multiplexers. +* These trigger multiplexers are grouped in trigger groups. All the trigger +* multiplexers in the trigger group share similar input options. The trigger * multiplexer groups are either reduction multiplexers or distribution multiplexers. -* Figure below illustrates a generic trigger multiplexer block implementation +* Figure below illustrates a generic trigger multiplexer block implementation * with a reduction multiplexer layer of N trigger groups and a distribution multiplexer * layer of M trigger groups. * \image html trigmux_architecture.png -* The reduction multiplexer groups have input options that are the trigger outputs -* coming from the different peripheral blocks and the reduction multiplexer groups -* route them to intermediate signals. The distribution multiplexer groups have input -* options from these intermediate signals and route them back to multiple peripheral +* The reduction multiplexer groups have input options that are the trigger outputs +* coming from the different peripheral blocks and the reduction multiplexer groups +* route them to intermediate signals. The distribution multiplexer groups have input +* options from these intermediate signals and route them back to multiple peripheral * blocks as their trigger inputs. * -* The trigger architecture of the PSoC device is explained in the technical reference +* The trigger architecture of the PSoC device is explained in the technical reference * manual (TRM). Refer to the TRM to better understand the trigger multiplexer routing * architecture available. -* +* * \section group_trigmux_section_Configuration_Considerations Configuration Considerations * * -* To route a trigger signal from one peripheral in the PSoC -* to another, the user must configure a reduction multiplexer and a distribution +* To route a trigger signal from one peripheral in the PSoC +* to another, the user must configure a reduction multiplexer and a distribution * multiplexer. The Cy_TrigMux_connect() is used to configure a trigger multiplexer connection. * The user will need two calls of this API, one for the reduction multiplexer and another * for the distribution multiplexer, to achieve the trigger connection from a source -* peripheral to a destination peripheral. The Cy_TrigMux_connect() function has two main -* parameters, inTrig and outTrig that refer to the input and output trigger signals +* peripheral to a destination peripheral. The Cy_TrigMux_connect() function has two main +* parameters, inTrig and outTrig that refer to the input and output trigger signals * connected using the multiplexer. * * These parameters are represented in the following format: * \image html trigmux_parameter_30.png * In addition, the Cy_TrigMux_connect() function also has an invert and trigger type parameter. -* Refer to the API reference for a detailed description of this parameter. -* All the constants associated with the different trigger signals in the system -* (input and output) are defined as constants in the device configuration header file. -* The constants for TrigMux in the device configuration header file are divided into four -* types based on the signal being input/output and being part of a reduction/distribution +* Refer to the API reference for a detailed description of this parameter. +* All the constants associated with the different trigger signals in the system +* (input and output) are defined as constants in the device configuration header file. +* The constants for TrigMux in the device configuration header file are divided into four +* types based on the signal being input/output and being part of a reduction/distribution * trigger multiplexer. * -* The four types of the input/output parameters are: -* 1) The parameters for the reduction multiplexer's inputs (input signals of TrigMux); -* 2) The parameters for the reduction multiplexer's outputs (intermediate signals); -* 3) The parameters for the distribution multiplexer's inputs (intermediate signals); -* 4) The parameters for the distribution multiplexer's outputs (output signals of TrigMux). +* The four types of the input/output parameters are: +* 1) The parameters for the reduction multiplexer's inputs (input signals of TrigMux); +* 2) The parameters for the reduction multiplexer's outputs (intermediate signals); +* 3) The parameters for the distribution multiplexer's inputs (intermediate signals); +* 4) The parameters for the distribution multiplexer's outputs (output signals of TrigMux). * Refer to the TRM for a more detailed description of this architecture and different options. * * The steps to connect one peripheral block to the other: * -* Step 1. Find the trigger group number in the Trigger Group Inputs section of the device -* configuration header file that corresponds to the output of the first peripheral block. -* For example, TRIG10_IN_CPUSS_DW0_TR_OUT4 input of the reduction multiplexers belongs +* Step 1. Find the trigger group number in the Trigger Group Inputs section of the device +* configuration header file that corresponds to the output of the first peripheral block. +* For example, TRIG10_IN_CPUSS_DW0_TR_OUT4 input of the reduction multiplexers belongs * to Trigger Group 10. * * Step 2. Find the trigger group number in the Trigger Group Outputs section of the device -* configuration header file that corresponds to the input of the second peripheral block. -* For example, TRIG3_OUT_TCPWM1_TR_IN0 output of the distribution multiplexer belongs to +* configuration header file that corresponds to the input of the second peripheral block. +* For example, TRIG3_OUT_TCPWM1_TR_IN0 output of the distribution multiplexer belongs to * Trigger Group 3. * -* Step 3. Find the same trigger group number in the Trigger Group Inputs section of the -* device configuration header file that corresponds to the trigger group number found in -* Step 1. Select the reduction multiplexer output that can be connected to the trigger group +* Step 3. Find the same trigger group number in the Trigger Group Inputs section of the +* device configuration header file that corresponds to the trigger group number found in +* Step 1. Select the reduction multiplexer output that can be connected to the trigger group * found in Step 2. For example, TRIG3_IN_TR_GROUP10_OUTPUT5 means that Reduction Multiplexer * Output 5 of Trigger Group 10 can be connected to Trigger Group 3. * -* Step 4. Find the same trigger group number in the Trigger Group Outputs section of the +* Step 4. Find the same trigger group number in the Trigger Group Outputs section of the * device configuration header file that corresponds to the trigger group number found in Step 2. * Select the distribution multiplexer input that can be connected to the trigger group found * in Step 1. For example, TRIG10_OUT_TR_GROUP3_INPUT1 means that the Distribution Multiplexer -* Input 1 of Trigger Group 3 can be connected to the output of the reduction multiplexer +* Input 1 of Trigger Group 3 can be connected to the output of the reduction multiplexer * in Trigger Group 10 found in Step 3. * -* Step 5. Call Cy_TrigMux_Connect() API twice: the first call - with the constants for the -* inTrig and outTrig parameters found in Steps 1 and Step 4, the second call - with the -* constants for the inTrig and outTrig parameters found in Steps 2 and Step 3. -* For example, -* Cy_TrigMux_Connect(TRIG10_IN_CPUSS_DW0_TR_OUT4, TRIG10_OUT_TR_GROUP3_INPUT1, -* TR_MUX_TR_INV_DISABLE, TRIGGER_TYPE_LEVEL); -* Cy_TrigMux_Connect(TRIG3_IN_TR_GROUP10_OUTPUT5, TRIG3_OUT_TCPWM1_TR_IN0, +* Step 5. Call Cy_TrigMux_Connect() API twice: the first call - with the constants for the +* inTrig and outTrig parameters found in Steps 1 and Step 4, the second call - with the +* constants for the inTrig and outTrig parameters found in Steps 2 and Step 3. +* For example, +* Cy_TrigMux_Connect(TRIG10_IN_CPUSS_DW0_TR_OUT4, TRIG10_OUT_TR_GROUP3_INPUT1, +* TR_MUX_TR_INV_DISABLE, TRIGGER_TYPE_LEVEL); +* Cy_TrigMux_Connect(TRIG3_IN_TR_GROUP10_OUTPUT5, TRIG3_OUT_TCPWM1_TR_IN0, * TR_MUX_TR_INV_DISABLE, TRIGGER_TYPE_LEVEL); * * \section group_trigmux_more_information More Information @@ -112,7 +110,7 @@ * * * -* @@ -199,7 +197,7 @@ extern "C" { *****************************************************************************/ /** The TRIGMUX error codes. */ -typedef enum +typedef enum { CY_TRIGMUX_SUCCESS = 0x00u, /**< Successful */ CY_TRIGMUX_BAD_PARAM = CY_TRIGMUX_ID | CY_PDL_STATUS_ERROR | 0x01u, /**< One or more invalid parameters */ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.c index 3260df3356..637868a418 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.c +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.c @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #include "cy_wdt.h" @@ -31,7 +29,7 @@ static bool Cy_WDT_Locked(void); * The given default setting of the WDT: * The WDT is unlocked and disabled. * The WDT match value is 4096. -* None of ignore bits are set: the whole WDT counter bits are checked against +* None of ignore bits are set: the whole WDT counter bits are checked against * the match value. * *******************************************************************************/ @@ -61,7 +59,7 @@ void Cy_WDT_Init(void) * * Locks out configuration changes to the Watchdog Timer register. * -* After this function is called, the WDT configuration cannot be changed until +* After this function is called, the WDT configuration cannot be changed until * Cy_WDT_Unlock() is called. * *******************************************************************************/ @@ -117,12 +115,12 @@ void Cy_WDT_Unlock(void) * Function Name: Cy_WDT_SetMatch ****************************************************************************//** * -* Configures the WDT counter match comparison value. The Watchdog timer -* should be unlocked before changing the match value. Call the Cy_WDT_Unlock() +* Configures the WDT counter match comparison value. The Watchdog timer +* should be unlocked before changing the match value. Call the Cy_WDT_Unlock() * function to unlock the WDT. * * \param match -* The valid valid range is [0-65535]. The value to be used to match +* The valid valid range is [0-65535]. The value to be used to match * against the counter. * *******************************************************************************/ @@ -139,8 +137,8 @@ void Cy_WDT_SetMatch(uint32_t match) * Function Name: Cy_WDT_SetIgnoreBits ****************************************************************************//** * -* Configures the number of the most significant bits of the Watchdog timer that -* are not checked against the match. Unlock the Watchdog timer before +* Configures the number of the most significant bits of the Watchdog timer that +* are not checked against the match. Unlock the Watchdog timer before * ignoring the bits setting. Call the Cy_WDT_Unlock() API to unlock the WDT. * * \param bitsNum @@ -150,7 +148,7 @@ void Cy_WDT_SetMatch(uint32_t match) * \details The value of bitsNum controls the time-to-reset of the Watchdog timer * This happens after 3 successive matches. * -* \warning This function changes the WDT interrupt period, therefore +* \warning This function changes the WDT interrupt period, therefore * the device can go into an infinite WDT reset loop. This may happen * if a WDT reset occurs faster that a device start-up. * @@ -168,8 +166,8 @@ void Cy_WDT_SetIgnoreBits(uint32_t bitsNum) * Function Name: Cy_WDT_ClearInterrupt ****************************************************************************//** * -* Clears the WDT match flag which is set every time the WDT counter reaches a -* WDT match value. Two unserviced interrupts lead to a system reset +* Clears the WDT match flag which is set every time the WDT counter reaches a +* WDT match value. Two unserviced interrupts lead to a system reset * (i.e. at the third match). * *******************************************************************************/ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.h index 82cc433f0d..c0c63486cd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/drivers/peripheral/wdt/cy_wdt.h @@ -7,9 +7,7 @@ ******************************************************************************** * \copyright * Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* SPDX-License-Identifier: Apache-2.0 * *******************************************************************************/ @@ -17,8 +15,8 @@ * \defgroup group_wdt Watchdog Timer (WDT) * \{ * -* The Watchdog timer (WDT) has a 16-bit free-running up-counter. The WDT can -* issue counter match interrupts, and a device reset if its interrupts are not +* The Watchdog timer (WDT) has a 16-bit free-running up-counter. The WDT can +* issue counter match interrupts, and a device reset if its interrupts are not * handled. Use the Watchdog timer for two main purposes.
* The First use case is recovering from a CPU or firmware failure. * A timeout period is set up in the Watchdog timer, and if a timeout occurs, the @@ -27,100 +25,100 @@ * It is strongly recommended not to use the WDT for periodic interrupt * generation. However, if absolutely required, see information below. * -* A "reset cause" register exists, and the firmware should check this register +* A "reset cause" register exists, and the firmware should check this register * at a start-up. An appropriate action can be taken if a WRES reset is detected. * -* The user's firmware periodically resets the timeout period (clears or "feeds" +* The user's firmware periodically resets the timeout period (clears or "feeds" * the watchdog) before a timeout occurs. If the firmware fails to do so, that is -* considered to be a CPU crash or a firmware failure, and the reason for a +* considered to be a CPU crash or a firmware failure, and the reason for a * device reset. -* The WDT can generate an interrupt instead of a device reset. The Interrupt +* The WDT can generate an interrupt instead of a device reset. The Interrupt * Service Routine (ISR) can handle the interrupt either as a periodic interrupt, * or as an early indication of a firmware failure and respond accordingly. -* However, it is not recommended to use the WDT for periodic interrupt -* generation. The Multi-counter Watchdog Timers (MCWDT) can be used to generate +* However, it is not recommended to use the WDT for periodic interrupt +* generation. The Multi-counter Watchdog Timers (MCWDT) can be used to generate * periodic interrupts if such are presented in the device. * * Functional Description
-* The WDT generates an interrupt when the count value in the counter equals the +* The WDT generates an interrupt when the count value in the counter equals the * configured match value. * * Note that the counter is not reset on a match. In such case the WDT * reset period is: * WDT_Reset_Period = ILO_Period * (2*2^(16-IgnoreBits) + MatchValue); -* When the counter reaches a match value, it generates an interrupt and then -* keeps counting up until it overflows and rolls back to zero and reaches the +* When the counter reaches a match value, it generates an interrupt and then +* keeps counting up until it overflows and rolls back to zero and reaches the * match value again, at which point another interrupt is generated. * -* To use a WDT to generate a periodic interrupt, the match value should be -* incremented in the ISR. As a result, the next WDT interrupt is generated when +* To use a WDT to generate a periodic interrupt, the match value should be +* incremented in the ISR. As a result, the next WDT interrupt is generated when * the counter reaches a new match value. * -* You can also reduce the entire WDT counter period by -* specifying the number of most significant bits that are ignored in the WDT +* You can also reduce the entire WDT counter period by +* specifying the number of most significant bits that are ignored in the WDT * counter. For example, if the Cy_WDT_SetIgnoreBits() function is called with * parameter 3, the WDT counter becomes a 13-bit free-running up-counter. * * Power Modes
-* WDT can operate in all possible low power modes. -* Operation during Hibernate mode is possible because the logic and -* high-voltage internal low oscillator (ILO) are supplied by the external -* high-voltage supply (Vddd). The WDT can be configured to wake the device from +* WDT can operate in all possible low power modes. +* Operation during Hibernate mode is possible because the logic and +* high-voltage internal low oscillator (ILO) are supplied by the external +* high-voltage supply (Vddd). The WDT can be configured to wake the device from * Hibernate mode. * -* In Active or LPActive mode, an interrupt request from the WDT is sent to the -* CPU via IRQ 22. In Sleep, LPSleep or Deep Sleep power mode, the CPU subsystem +* In Active or LPActive mode, an interrupt request from the WDT is sent to the +* CPU via IRQ 22. In Sleep, LPSleep or Deep Sleep power mode, the CPU subsystem * is powered down, so the interrupt request from the WDT is sent directly to the -* WakeUp Interrupt Controller (WIC) which will then wake up the CPU. The +* WakeUp Interrupt Controller (WIC) which will then wake up the CPU. The * CPU then acknowledges the interrupt request and executes the ISR. * * Clock Source
-* The WDT is clocked by the ILO. The WDT must be disabled before disabling -* the ILO. According to the device datasheet, the ILO accuracy is +/-30% over -* voltage and temperature. This means that the timeout period may vary by 30% -* from the configured value. Appropriate margins should be added while -* configuring WDT intervals to make sure that unwanted device resets do not +* The WDT is clocked by the ILO. The WDT must be disabled before disabling +* the ILO. According to the device datasheet, the ILO accuracy is +/-30% over +* voltage and temperature. This means that the timeout period may vary by 30% +* from the configured value. Appropriate margins should be added while +* configuring WDT intervals to make sure that unwanted device resets do not * occur on some devices. -* +* * Refer to the device datasheet for more information on the oscillator accuracy. * * Register Locking
-* You can prevent accidental corruption of the WDT configuration by calling -* the Cy_WDT_Lock() function. When the WDT is locked, any writing to the WDT_*, -* CLK_ILO_CONFIG, CLK_SELECT.LFCLK_SEL, and CLK_TRIM_ILO_CTL registers is +* You can prevent accidental corruption of the WDT configuration by calling +* the Cy_WDT_Lock() function. When the WDT is locked, any writing to the WDT_*, +* CLK_ILO_CONFIG, CLK_SELECT.LFCLK_SEL, and CLK_TRIM_ILO_CTL registers is * ignored. * Call the Cy_WDT_Unlock() function to allow WDT registers modification. * * Clearing WDT
-* The ILO clock is asynchronous to the SysClk. Therefore it generally -* takes three ILO cycles for WDT register changes to come into effect. It is -* important to remember that a WDT should be cleared at least four cycles -* (3 + 1 for sure) before a timeout occurs, especially when small +* The ILO clock is asynchronous to the SysClk. Therefore it generally +* takes three ILO cycles for WDT register changes to come into effect. It is +* important to remember that a WDT should be cleared at least four cycles +* (3 + 1 for sure) before a timeout occurs, especially when small * match values / low-toggle bit numbers are used. * -* \warning It may happen that a WDT reset can be generated -* faster than a device start-up. To prevent this, calculate the -* start-up time and WDT reset time. The WDT reset time should be always smaller +* \warning It may happen that a WDT reset can be generated +* faster than a device start-up. To prevent this, calculate the +* start-up time and WDT reset time. The WDT reset time should be always smaller * than device start-up time. * * Reset Detection
-* Use the Cy_SysLib_GetResetReason() function to detect whether the WDT has +* Use the Cy_SysLib_GetResetReason() function to detect whether the WDT has * triggered a device reset. * * Interrupt Configuration
-* The Global Signal Reference and Interrupt components can be used for ISR -* configuration. If the WDT is configured to generate an interrupt, pending -* interrupts must be cleared within the ISR (otherwise, the interrupt will be +* The Global Signal Reference and Interrupt components can be used for ISR +* configuration. If the WDT is configured to generate an interrupt, pending +* interrupts must be cleared within the ISR (otherwise, the interrupt will be * generated continuously). -* A pending interrupt to the WDT block must be cleared by calling the -* Cy_WDT_ClearInterrupt() function. The call to the function will clear the +* A pending interrupt to the WDT block must be cleared by calling the +* Cy_WDT_ClearInterrupt() function. The call to the function will clear the * unhandled WDT interrupt counter. * -* Use the WDT ISR as a timer to trigger certain actions +* Use the WDT ISR as a timer to trigger certain actions * and to change a next WDT match value. * -* Ensure that the interrupts from the WDT are passed to the CPU to avoid -* unregistered interrupts. Unregistered WDT interrupts result in a continuous +* Ensure that the interrupts from the WDT are passed to the CPU to avoid +* unregistered interrupts. Unregistered WDT interrupts result in a continuous * device reset. To avoid this, call Cy_WDT_UnmaskInterrupt(). * After that, call the WDT API functions for interrupt * handling/clearing. @@ -128,24 +126,24 @@ * \section group_wdt_configuration Configuration Considerations * * To start the WDT, make sure that ILO is enabled. -* After the ILO is enabled, ensure that the WDT is unlocked and disabled by -* calling the Cy_WDT_Unlock() and Cy_WDT_Disable() functions. Set the WDT match -* value by calling Cy_WDT_SetMatch() with the required match value. If needed, -* set the ignore bits for reducing the WDT counter period by calling -* Cy_WDT_SetIgnoreBits() function. After the WDT configuration is set, +* After the ILO is enabled, ensure that the WDT is unlocked and disabled by +* calling the Cy_WDT_Unlock() and Cy_WDT_Disable() functions. Set the WDT match +* value by calling Cy_WDT_SetMatch() with the required match value. If needed, +* set the ignore bits for reducing the WDT counter period by calling +* Cy_WDT_SetIgnoreBits() function. After the WDT configuration is set, * call Cy_WDT_Enable(). * * \note Enable a WDT if the power supply can produce -* sudden brownout events that may compromise the CPU functionality. This +* sudden brownout events that may compromise the CPU functionality. This * ensures that the system can recover after a brownout. * -* When the WDT is used to protect against system crashes, the -* WDT interrupt should be cleared by a portion of the code that is not directly +* When the WDT is used to protect against system crashes, the +* WDT interrupt should be cleared by a portion of the code that is not directly * associated with the WDT interrupt. -* Otherwise, it is possible that the main firmware loop has crashed or is in an -* endless loop, but the WDT interrupt vector continues to operate and service +* Otherwise, it is possible that the main firmware loop has crashed or is in an +* endless loop, but the WDT interrupt vector continues to operate and service * the WDT. The user should: -* * Feed the watchdog by clearing the interrupt bit regularly in the main body +* * Feed the watchdog by clearing the interrupt bit regularly in the main body * of the firmware code. * * * Guarantee that the interrupt is cleared at least once every WDT period. @@ -317,7 +315,7 @@ __STATIC_INLINE uint32_t Cy_WDT_GetCount(void) * Function Name: Cy_WDT_GetIgnoreBits ****************************************************************************//** * -* Reads the number of the most significant bits of the Watchdog timer that are +* Reads the number of the most significant bits of the Watchdog timer that are * not checked against the match. * * \return The number of the most significant bits. diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_backup.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_backup.h index f797399c6c..ee6865c3c9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_backup.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_backup.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_BACKUP_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ble.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ble.h index 8513db5292..3bd1596cc9 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ble.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ble.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_BLE_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_cpuss.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_cpuss.h index a7ab807b3a..5746e6a3db 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_cpuss.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_cpuss.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_CPUSS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_crypto.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_crypto.h index 73bccdd220..439f3c34b1 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_crypto.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_crypto.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_CRYPTO_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_csd.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_csd.h index 80ed04fabd..4cf156ef4b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_csd.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_csd.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_CSD_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctbm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctbm.h index 4a86dde28e..8e8faedf35 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctbm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctbm.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_CTBM_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctdac.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctdac.h index 1f537fcb2f..5984a3d5f4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctdac.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ctdac.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_CTDAC_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_dw.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_dw.h index bb16655471..a87623b1e2 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_dw.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_dw.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_DW_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse.h index 251e5f87bc..b7e07f3bdb 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_EFUSE_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse_data.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse_data.h index d62577eea8..fb385a4e21 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse_data.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_efuse_data.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_EFUSE_DATA_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_fault.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_fault.h index 3c8f17927b..4827f196ce 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_fault.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_fault.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_FAULT_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_flashc.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_flashc.h index 0414e51df3..0bc50b6539 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_flashc.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_flashc.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_FLASHC_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_gpio.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_gpio.h index e285570c3d..b71a91a319 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_gpio.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_gpio.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_GPIO_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_headers.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_headers.h index 0e9567bd53..1f025a76ab 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_headers.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_headers.h @@ -6,10 +6,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_HEADERS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_hsiom.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_hsiom.h index 067e7824d5..789d13d9ed 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_hsiom.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_hsiom.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_HSIOM_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_i2s.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_i2s.h index 1383cb1977..3948e50cb2 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_i2s.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_i2s.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_I2S_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ipc.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ipc.h index 9726b5e329..9e82cef323 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ipc.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_ipc.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_IPC_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lcd.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lcd.h index 5913c6f51e..eeeec7a090 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lcd.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lcd.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_LCD_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lpcomp.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lpcomp.h index e19db35b0f..afdc3966c7 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lpcomp.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_lpcomp.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_LPCOMP_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pass.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pass.h index 0c75a92960..90b420ef6f 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pass.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pass.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_PASS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pdm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pdm.h index db7674282c..e511a62bf4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pdm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_pdm.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_PDM_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_peri.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_peri.h index 5771bc740e..b51dbf12e8 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_peri.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_peri.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_PERI_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_profile.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_profile.h index 3ba7bdaa6f..bace32d408 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_profile.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_profile.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_PROFILE_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_prot.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_prot.h index b812954058..87027528b4 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_prot.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_prot.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_PROT_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sar.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sar.h index b3d7f1e325..f33b3bac5b 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sar.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sar.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SAR_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_scb.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_scb.h index a5689ab56e..24b44f87fd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_scb.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_scb.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SCB_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sflash.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sflash.h index 2255521a16..3a0e0e06af 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sflash.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_sflash.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SFLASH_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smartio.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smartio.h index fd76493f62..220ab383dd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smartio.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smartio.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SMARTIO_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smif.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smif.h index 46b6a72cd1..7b31422ecd 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smif.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_smif.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SMIF_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_srss.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_srss.h index 993f583aab..540e98ebcf 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_srss.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_srss.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_SRSS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_tcpwm.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_tcpwm.h index e00b154285..fa654b96a6 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_tcpwm.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_tcpwm.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_TCPWM_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_udb.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_udb.h index 22a9437563..154cfea956 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_udb.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_udb.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_UDB_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_usbfs.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_usbfs.h index 079afe11bd..2f49cf873e 100644 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_usbfs.h +++ b/targets/TARGET_Cypress/TARGET_PSOC6/device/ip/cyip_usbfs.h @@ -10,10 +10,8 @@ * ******************************************************************************** * \copyright -* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. +* Copyright 2016-2018, Cypress Semiconductor Corporation. All rights reserved. +* SPDX-License-Identifier: Apache-2.0 *******************************************************************************/ #ifndef _CYIP_USBFS_H_ diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.c b/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.c deleted file mode 100644 index 01e4f39a91..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.c +++ /dev/null @@ -1,1338 +0,0 @@ -/***************************************************************************//** -* \file cy_em_eeprom.c -* \version 1.0.1 -* -* \brief -* This file provides source code of the API for the Emulated EEPROM library. -* The Emulated EEPROM API allows creating of an emulated EEPROM in flash that -* has the ability to do wear leveling and restore corrupted data from a -* redundant copy. -* -******************************************************************************** -* \copyright -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - - -#include - -#include "em_eeprom/cy_em_eeprom.h" - - -#if defined(__cplusplus) -extern "C" { -#endif - - -/*************************************** -* Private Function Prototypes -***************************************/ -static void FindLastWrittenRow(uint32_t * lastWrRowPtr, cy_stc_eeprom_context_t * context); -static uint32_t GetRowAddrBySeqNum(uint32_t seqNum, cy_stc_eeprom_context_t * context); -static uint8_t CalcChecksum(uint8_t rowData[], uint32_t len); -static void GetNextRowToWrite(uint32_t seqNum, - uint32_t * rowToWrPtr, - uint32_t * rowToRdPtr, - cy_stc_eeprom_context_t * context); -static cy_en_em_eeprom_status_t CheckRanges(cy_stc_eeprom_config_t* config); -static cy_en_em_eeprom_status_t WriteRow(uint32_t rowAddr, uint32_t *rowData, cy_stc_eeprom_context_t * context); -static cy_en_em_eeprom_status_t EraseRow(uint32_t rowAddr, uint32_t ramBuffAddr, cy_stc_eeprom_context_t * context); -static cy_en_em_eeprom_status_t CheckCrcAndCopy(uint32_t startAddr, - uint32_t dstAddr, - uint32_t rowOffset, - uint32_t numBytes, - cy_stc_eeprom_context_t * context); -static uint32_t GetAddresses(uint32_t *startAddr, uint32_t *endAddr, uint32_t *offset, uint32_t rowNum, uint32_t addr, uint32_t len); -static cy_en_em_eeprom_status_t FillChecksum(cy_stc_eeprom_context_t * context); - -/** -* \addtogroup group_em_eeprom_functions -* \{ -*/ - -/******************************************************************************* -* Function Name: Cy_Em_EEPROM_Init -****************************************************************************//** -* -* Initializes the Emulated EEPROM library by filling the context structure. -* -* \param config -* The pointer to a configuration structure. See \ref cy_stc_eeprom_config_t. -* -* \param context -* The pointer to the EEPROM context structure to be filled by the function. -* \ref cy_stc_eeprom_context_t. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -* \note -* The context structure should not be modified by the user after it is filled -* with this function. Modification of context structure may cause the -* unexpected behavior of the Cy_Em_EEPROM API functions which rely on it. -* -* \note -* This function uses a buffer of the flash row size to perform read -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -* \sideeffect -* If the "Redundant Copy" option is used, the function performs a number of -* write operations to the EEPROM to initialize flash rows checksums. Therefore, -* Cy_Em_EEPROM_NumWrites(), when it is called right after Cy_Em_EEPROM_Init(), -* will return a non-zero value that identifies the number of writes performed -* by Cy_Em_EEPROM_Init(). -* -*******************************************************************************/ -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Init(cy_stc_eeprom_config_t* config, cy_stc_eeprom_context_t * context) -{ - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_BAD_PARAM; - - if((NULL != context) && (NULL != config) && (NULL != ((uint32_t *)config->userFlashStartAddr)) && - (config->wearLevelingFactor <= CY_EM_EEPROM_MAX_WEAR_LEVELING_FACTOR) && (config->eepromSize != 0u)) - { - ret = CheckRanges(config); - - if(CY_EM_EEPROM_SUCCESS == ret) - { - /* Copy the user config structure fields into context */ - context->eepromSize = config->eepromSize; - context->wearLevelingFactor = config->wearLevelingFactor; - context->redundantCopy = config->redundantCopy; - context->blockingWrite = config->blockingWrite; - context->userFlashStartAddr = config->userFlashStartAddr; - /* Store frequently used data for internal use */ - context->numberOfRows = CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(config->eepromSize); - context->wlEndAddr = ((CY_EM_EEPROM_GET_EEPROM_SIZE(context->numberOfRows) * config->wearLevelingFactor) + - config->userFlashStartAddr); - /* Find last written EEPROM row and store it for quick access */ - FindLastWrittenRow(&context->lastWrRowAddr, context); - - if((0u == CY_EM_EEPROM_GET_SEQ_NUM(context->lastWrRowAddr)) && (0u != context->redundantCopy)) - { - /* Call the function only after device reprogramming in case - * if redundant copy is enabled. - */ - ret = FillChecksum(context); - - /* Update the last written EEPROM row for Cy_Em_EEPROM_NumWrites() */ - FindLastWrittenRow(&context->lastWrRowAddr, context); - } - } - } - - return(ret); -} - - -/******************************************************************************* -* Function Name: Cy_Em_EEPROM_Read -****************************************************************************//** -* -* This function takes the logical EEPROM address, converts it to the actual -* physical address where the data is stored and returns the data to the user. -* -* \param addr -* The logical start address in EEPROM to start reading data from. -* -* \param eepromData -* The pointer to a user array to write data to. -* -* \param size -* The amount of data to read. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* This function returns \ref cy_en_em_eeprom_status_t. -* -* \note -* This function uses a buffer of the flash row size to perform read -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -* \note -* In case if redundant copy option is enabled the function may perform writes -* to EEPROM. This is done in case if the data in the EEPPROM is corrupted and -* the data in redundant copy is valid based on CRC-8 data integrity check. -* -*******************************************************************************/ -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Read(uint32_t addr, - void * eepromData, - uint32_t size, - cy_stc_eeprom_context_t * context) -{ - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_BAD_PARAM; - uint32_t i; - uint32_t numBytesToRead; - uint32_t curEepromBaseAddr; - uint32_t curRowOffset; - uint32_t startRowAddr; - uint32_t actEepromRowNum; - uint32_t curRdEepromRowNum = 0u; - uint32_t dataStartEepromRowNum = 0u; - uint32_t eeData = (uint32_t) eepromData; /* To avoid the pointer arithmetic with void */ - - /* Validate input parameters */ - if((0u != size) && ((addr + size) <= (context->eepromSize)) && (NULL != eepromData)) - { - uint32_t rdAddr = addr; - uint32_t rdSize = size; - /* Get the sequence number of the last written row */ - uint32_t seqNum = CY_EM_EEPROM_GET_SEQ_NUM(context->lastWrRowAddr); - uint32_t updateAddrFlag = 0u; - - /* Calculate the number of the row read operations. Currently this only concerns - * the reads from the EEPROM data locations. - */ - uint32_t numRowReads = ((((rdAddr + rdSize) - 1u) / CY_EM_EEPROM_EEPROM_DATA_LEN) - - (rdAddr / CY_EM_EEPROM_EEPROM_DATA_LEN)) + 1u; - - /* Get the address of the first row of the currently active EEPROM sector. If - * no wear leveling is used - the EEPROM has only one sector, so use the base - * addr stored in "context->userFlashStartAddr". - */ - curEepromBaseAddr = (((context->lastWrRowAddr - context->userFlashStartAddr) / - (CY_EM_EEPROM_FLASH_SIZEOF_ROW * context->numberOfRows)) * - (CY_EM_EEPROM_FLASH_SIZEOF_ROW * context->numberOfRows)) + - context->userFlashStartAddr; - - /* Find the number of the row that contains the start address of the data */ - for(i = 0u; i < context->numberOfRows; i++) - { - if(0u != CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(rdAddr, i)) - { - dataStartEepromRowNum = i; - curRdEepromRowNum = dataStartEepromRowNum; - break; - } - } - - /* Find the row number of the last written row */ - actEepromRowNum = (context->lastWrRowAddr - curEepromBaseAddr) / CY_EM_EEPROM_FLASH_SIZEOF_ROW; - - /* Check if wear leveling is used */ - if(context->wearLevelingFactor > 1u) - { - uint32_t dataEndEepromRowNum = dataStartEepromRowNum + (numRowReads - 1u); - - /* Check if the future validation of the read address is required. */ - updateAddrFlag = (dataStartEepromRowNum > actEepromRowNum) ? 1u : - ((dataEndEepromRowNum > actEepromRowNum) ? 1u : 0u); - } - - /* Copy data from the EEPROM data locations to the user buffer */ - for(i = 0u; i < numRowReads; i++) - { - startRowAddr = curEepromBaseAddr + (curRdEepromRowNum * CY_EM_EEPROM_FLASH_SIZEOF_ROW); - curRowOffset = CY_EM_EEPROM_EEPROM_DATA_LEN + (rdAddr % CY_EM_EEPROM_EEPROM_DATA_LEN); - - /* Check if there are more reads pending and update the number of the - * remaining bytes to read respectively. - */ - if((i + 1u) < numRowReads) - { - numBytesToRead = CY_EM_EEPROM_EEPROM_DATA_LEN - (rdAddr % CY_EM_EEPROM_EEPROM_DATA_LEN); - } - else - { - numBytesToRead = rdSize; - } - - /* Check if the read address needs to be updated to point to the correct - * EEPROM sector. - */ - if((0u != updateAddrFlag) && (curRdEepromRowNum > actEepromRowNum)) - { - startRowAddr -= context->numberOfRows * CY_EM_EEPROM_FLASH_SIZEOF_ROW; - - if(startRowAddr < context->userFlashStartAddr) - { - startRowAddr = context->wlEndAddr - - ((context->numberOfRows - curRdEepromRowNum) * CY_EM_EEPROM_FLASH_SIZEOF_ROW); - } - } - - if(0u != context->redundantCopy) - { - /* Check a checksum of the EEPROM row and if it is bad, check a checksum in - * the corresponding row in redundant copy, otherwise return failure. - */ - ret = CheckCrcAndCopy(startRowAddr, eeData, curRowOffset, numBytesToRead, context); - - if(CY_EM_EEPROM_SUCCESS != ret) - { - break; - } - } - else - { - /* Copy the data to the user buffer */ - (void)memcpy((void *)(eeData), - (void *)(startRowAddr + curRowOffset), - numBytesToRead); - - /* Indicate success to be able to execute next code block */ - ret = CY_EM_EEPROM_SUCCESS; - } - - /* Update variables anticipated in the read operation */ - rdAddr += numBytesToRead; - rdSize -= numBytesToRead; - eeData += numBytesToRead; - curRdEepromRowNum++; - } - - /* This code block will copy the latest data from the EEPROM headers into the - * user buffer. The data previously copied into the user buffer may be updated - * as the EEPROM headers contain more recent data. - * The code block is executed when two following conditions are true: - * 1) The reads from "historic" data locations were successful; - * 2) The user performed at least one write operation to Em_EEPROM (0u != - * seqNum). - */ - if((CY_EM_EEPROM_SUCCESS == ret) && (0u != seqNum)) - { - numRowReads = (context->numberOfRows <= seqNum) ? (context->numberOfRows) : (seqNum); - numRowReads--; - - for(i = (seqNum - numRowReads); i <= seqNum; i++) - { - startRowAddr = GetRowAddrBySeqNum(i, context); - - if (0u != startRowAddr) - { - /* The following variables are introduced to increase code readability. */ - uint32_t startAddr = *(uint32_t *)(startRowAddr + CY_EM_EEPROM_HEADER_ADDR_OFFSET); - uint32_t endAddr = startAddr + (*(uint32_t *)(startRowAddr + CY_EM_EEPROM_HEADER_LEN_OFFSET)); - - /* Check if the current row EEPROM header contains the data requested for read */ - if(0u != CY_EM_EEPROM_IS_ADDRESES_CROSSING(startAddr, endAddr, addr, addr + size)) - { - uint32_t srcOffset = (startAddr > addr) ? (0u) : (addr - startAddr); - uint32_t dstOffset = (startAddr > addr) ? (startAddr - addr): (0u); - rdAddr = (startAddr > addr) ? (startAddr) : (addr); - - srcOffset += CY_EM_EEPROM_HEADER_DATA_OFFSET; - - /* Calculate the number of bytes to be read from the current row's EEPROM header */ - numBytesToRead = ((endAddr < (addr + size)) ? endAddr : (addr + size)) - rdAddr; - - /* Calculate the offset in the user buffer from which the data will be updated. */ - eeData = ((uint32_t)eepromData) + dstOffset; - - /* Check a checksum of the EEPROM row and if it is bad, check a checksum in the - * corresponding row in redundant copy, otherwise return failure. Copy the data - * from the recent EEPROM headers to the user buffer. This will overwrite the - * data copied form EEPROM data locations as the data in EEPROM headers is newer. - */ - if(0u != context->redundantCopy) - { - ret = CheckCrcAndCopy(startRowAddr, eeData, srcOffset, numBytesToRead, context); - - if(CY_EM_EEPROM_SUCCESS != ret) - { - break; - } - } - else - { - (void)memcpy((void *)(eeData), (void *)(startRowAddr + srcOffset), numBytesToRead); - } - } - } - } - } - } - - return(ret); -} - - -/******************************************************************************* -* Function Name: Cy_Em_EEPROM_Write -****************************************************************************//** -* -* This function takes the logical EEPROM address and converts it to the actual -* physical address and writes data there. If wear leveling is implemented, the -* writing process will use the wear leveling techniques. This is a blocking -* function and it does not return until the write operation is completed. The -* user firmware should not enter Hibernate mode until write is completed. The -* write operation is allowed in Sleep and Deep-Sleep modes. During the flash -* operation, the device should not be reset, including the XRES pin, a software -* reset, and watchdog reset sources. Also, low-voltage detect circuits should -* be configured to generate an interrupt instead of a reset. Otherwise, portions -* of flash may undergo unexpected changes. -* -* \param addr -* The logical start address in EEPROM to start writing data from. -* -* \param eepromData -* Data to write to EEPROM. -* -* \param size -* The amount of data to write to EEPROM. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* This function returns \ref cy_en_em_eeprom_status_t. -* -* \note -* This function uses a buffer of the flash row size to perform write -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -* \sideeffect -* In case when blocking write option is used, if this function is called by -* the CM4 the user code on CM0P and the user code on CM4 are blocked until erase -* flash row operation is finished. If this function is called by the CM0P the -* user code on CM4 is not blocked and the user code on CM0P is blocked until -* erase flash row operation is finished. Plan your task allocation accordingly. -* -* \sideeffect -* In case if non-blocking write option is used and when user flash is used as -* an EEPROM storage care should be taken to prevent the read while write (RWW) -* exception. To prevent the RWW exception the user flash macro that includes -* the EEPROM storage should not be read while the EEPROM write is not completed. -* The read also means the user code execution from the respective flash macro. -* -*******************************************************************************/ -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Write(uint32_t addr, - void * eepromData, - uint32_t size, - cy_stc_eeprom_context_t * context) -{ - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_BAD_PARAM; - uint32_t i; - uint32_t wrCnt; - uint32_t actEmEepromRowNum; - uint32_t writeRamBuffer[CY_EM_EEPROM_FLASH_SIZEOF_ROW / CY_EM_EEPROM_U32_DIV]; - uint32_t startAddr = 0u; - uint32_t endAddr = 0u; - uint32_t tmpRowAddr; - uint32_t emEepromRowAddr = context->lastWrRowAddr; - uint32_t emEepromRowRdAddr; - void * tmpData; - uint32_t eeData = (uint32_t) eepromData; /* To avoid the pointer arithmetic with void */ - - /* Check if the EEPROM data does not exceed the EEPROM capacity */ - if((0u != size) && ((addr + size) <= (context->eepromSize)) && (NULL != eepromData)) - { - uint32_t numWrites = ((size - 1u) / CY_EM_EEPROM_HEADER_DATA_LEN) + 1u; - uint32_t eeHeaderDataOffset = 0u; - - for(wrCnt = 0u; wrCnt < numWrites; wrCnt++) - { - uint32_t skipOperation = 0u; - /* Get the sequence number of the last written row */ - uint32_t seqNum = CY_EM_EEPROM_GET_SEQ_NUM(emEepromRowAddr); - - /* Get the address of the row to be written. The "emEepromRowAddr" may be - * updated with the proper address (if wear leveling is used). The - * "emEepromRowRdAddr" will point to the row address from which the historic - * data will be read into the RAM buffer. - */ - GetNextRowToWrite(seqNum, &emEepromRowAddr, &emEepromRowRdAddr, context); - - /* Clear the RAM buffer so to not put junk into flash */ - (void)memset(writeRamBuffer, 0, CY_EM_EEPROM_FLASH_SIZEOF_ROW); - - /* Fill the EM_EEPROM header info for the row in the RAM buffer */ - seqNum++; - writeRamBuffer[CY_EM_EEPROM_HEADER_SEQ_NUM_OFFSET_U32] = seqNum; - writeRamBuffer[CY_EM_EEPROM_HEADER_ADDR_OFFSET_U32] = addr; - tmpData = (void *) eeData; - - /* Check if this is the last row to write */ - if(wrCnt == (numWrites - 1u)) - { - /* Fill in the remaining size value to the EEPROM header. */ - writeRamBuffer[CY_EM_EEPROM_HEADER_LEN_OFFSET_U32] = size; - } - else - { - /* This is not the last row to write in the current EEPROM write operation. - * Write the maximum possible data size to the EEPROM header. Update the - * size, eeData and addr respectively. - */ - writeRamBuffer[CY_EM_EEPROM_HEADER_LEN_OFFSET_U32] = CY_EM_EEPROM_HEADER_DATA_LEN; - size -= CY_EM_EEPROM_HEADER_DATA_LEN; - addr += CY_EM_EEPROM_HEADER_DATA_LEN; - eeData += CY_EM_EEPROM_HEADER_DATA_LEN; - } - - /* Write the data to the EEPROM header */ - (void)memcpy((void *)&writeRamBuffer[CY_EM_EEPROM_HEADER_DATA_OFFSET_U32], - tmpData, - writeRamBuffer[CY_EM_EEPROM_HEADER_LEN_OFFSET_U32]); - - if(emEepromRowRdAddr != 0UL) - { - /* Copy the EEPROM historic data for this row from flash to RAM */ - (void)memcpy((void *)&writeRamBuffer[CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32], - (void *)(emEepromRowRdAddr + CY_EM_EEPROM_EEPROM_DATA_LEN), - CY_EM_EEPROM_EEPROM_DATA_LEN); - } - - /* Check if there is data for this location in other EEPROM headers: - * find out the row with the lowest possible sequence number which - * may contain the data for the current row. - */ - i = (seqNum > context->numberOfRows) ? ((seqNum - (context->numberOfRows)) + 1u) : 1u; - - for(; i <= seqNum; i++) - { - if(i == seqNum) - { - /* The code reached the row that is about to be written. Analyze the recently - * created EEPROM header (stored in the RAM buffer currently): if it contains - * the data for EEPROM data locations in the row that is about to be written. - */ - tmpRowAddr = (uint32_t) writeRamBuffer; - } - else - { - /* Retrieve the address of the previously written row by its sequence number. - * The pointer will be used to get data from the respective EEPROM header. - */ - tmpRowAddr = GetRowAddrBySeqNum(i, context); - } - - actEmEepromRowNum = CY_EM_EEPROM_GET_ACT_ROW_NUM_FROM_ADDR(emEepromRowAddr, - context->numberOfRows, - context->userFlashStartAddr); - if(0UL != tmpRowAddr) - { - /* Calculate the required addressed for the later EEPROM historic data update */ - skipOperation = GetAddresses( - &startAddr, - &endAddr, - &eeHeaderDataOffset, - actEmEepromRowNum, - *(uint32_t *)(tmpRowAddr + CY_EM_EEPROM_HEADER_ADDR_OFFSET), - *(uint32_t *)(tmpRowAddr + CY_EM_EEPROM_HEADER_LEN_OFFSET)); - } - else - { - /* Skip writes to the RAM buffer */ - skipOperation++; - } - - /* Write data to the RAM buffer */ - if(0u == skipOperation) - { - uint32_t dataAddr = ((uint32_t)((uint8_t *)&writeRamBuffer)) + startAddr; - - /* Update the address to point to the EEPROM header data and not to - * the start of the row. - */ - tmpRowAddr = tmpRowAddr + CY_EM_EEPROM_HEADER_DATA_OFFSET + eeHeaderDataOffset; - (void)memcpy((void *)(dataAddr), (void *)(tmpRowAddr), endAddr - startAddr); - } - - /* Calculate the checksum if redundant copy is enabled */ - if(0u != context->redundantCopy) - { - writeRamBuffer[CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32] = (uint32_t) - CalcChecksum((uint8_t *) &writeRamBuffer[CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32], - CY_EM_EEPROM_EEPROM_DATA_LEN); - } - } - - /* Write the data to the specified flash row */ - ret = WriteRow(emEepromRowAddr, writeRamBuffer, context); - tmpRowAddr = emEepromRowAddr; - - /* Check if redundant copy is used */ - if((0u != context->redundantCopy) && (CY_EM_EEPROM_SUCCESS == ret)) - { - /* Update the row address to point to the row in the redundant EEPROM's copy */ - tmpRowAddr = (emEepromRowAddr - context->userFlashStartAddr) + context->wlEndAddr; - - /* Write the data to the specified flash row */ - ret = WriteRow(tmpRowAddr, writeRamBuffer, context); - } - - if(CY_EM_EEPROM_SUCCESS == ret) - { - /* Store last written row address only when EEPROM and redundant - * copy writes were successful. - */ - context->lastWrRowAddr = emEepromRowAddr; - } - else - { - break; - } - } - } - return(ret); -} - - -/******************************************************************************* -* Function Name: Cy_Em_EEPROM_Erase -****************************************************************************//** -* -* This function erases the entire contents of the EEPROM. Erased values are all -* zeros. This is a blocking function and it does not return until the write -* operation is completed. The user firmware should not enter Hibernate mode until -* erase is completed. The erase operation is allowed in Sleep and Deep-Sleep modes. -* During the flash operation, the device should not be reset, including the -* XRES pin, a software reset, and watchdog reset sources. Also, low-voltage -* detect circuits should be configured to generate an interrupt instead of a -* reset. Otherwise, portions of flash may undergo unexpected changes. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* This function returns \ref cy_en_em_eeprom_status_t. -* -* \note -* For all non PSoC 6 devices the erase operation is performed by clearing -* the EEPROM data using flash write. This affects the flash durability. -* So it is recommended to use this function in utmost case to prolongate -* flash life. -* -* \note -* This function uses a buffer of the flash row size to perform erase -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -* \sideeffect -* In case when blocking write option is used, if this function is called by -* the CM4 the user code on CM0P and the user code on CM4 are blocked until erase -* flash row operation is finished. If this function is called by the CM0P the -* user code on CM4 is not blocked and the user code on CM0P is blocked until -* erase flash row operation is finished. Plan your task allocation accordingly. -* -* \sideeffect -* In case if non-blocking write option is used and when user flash is used as -* an EEPROM storage care should be taken to prevent the read while write (RWW) -* exception. To prevent the RWW exception the user flash macro that includes -* the EEPROM storage should not be read while the EEPROM erase is not completed. -* The read also means the user code execution from the respective flash macro. -* -*******************************************************************************/ -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Erase(cy_stc_eeprom_context_t * context) -{ - uint32_t i; - uint32_t seqNum; - uint32_t emEepromRowAddr = context->lastWrRowAddr; - uint32_t emEepromRowRdAddr; - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_WRITE_FAIL; - uint32_t writeRamBuffer[CY_EM_EEPROM_FLASH_SIZEOF_ROW / CY_EM_EEPROM_U32_DIV] = {0u}; - uint32_t emEepromStoredRowAddr = context->lastWrRowAddr; - uint32_t storedSeqNum; - - /* Get the sequence number of the last written row */ - seqNum = CY_EM_EEPROM_GET_SEQ_NUM(emEepromRowAddr); - - /* If there were no writes to EEPROM - nothing to erase */ - if(0u != seqNum) - { - /* Calculate the number of row erase operations required */ - uint32_t numWrites = context->numberOfRows * context->wearLevelingFactor; - - GetNextRowToWrite(seqNum, &emEepromStoredRowAddr, &emEepromRowRdAddr, context); - storedSeqNum = seqNum + 1u; - - if(0u != context->redundantCopy) - { - writeRamBuffer[CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32] = (uint32_t) - CalcChecksum((uint8_t *) &writeRamBuffer[CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32], - CY_EM_EEPROM_EEPROM_DATA_LEN); - } - - for(i = 0u; i < numWrites; i++) - { - /* For PSoC 6 the erase operation moves backwards. From last written row - * identified by "seqNum" down to "seqNum" - "numWrites". If "emEepromRowAddr" - * is zero this means that the row identified by "seqNum" was previously - * erased. - */ - if(0u != emEepromRowAddr) - { - ret = EraseRow(emEepromRowAddr, (uint32_t)writeRamBuffer, context); - } - - seqNum--; - - if(0u == seqNum) - { - /* Exit the loop as there is no more row is EEPROM to be erased */ - break; - } - emEepromRowAddr = GetRowAddrBySeqNum(seqNum, context); - } - - if(CY_EM_EEPROM_SUCCESS == ret) - { - writeRamBuffer[0u] = storedSeqNum; - - /* Write the previously stored sequence number to the flash row which would be - * written next if the erase wouldn't happen. In this case the write to - * redundant copy can be skipped as it does not add any value. - */ - ret = WriteRow(emEepromStoredRowAddr, writeRamBuffer, context); - - if(CY_EM_EEPROM_SUCCESS == ret) - { - context->lastWrRowAddr = emEepromStoredRowAddr; - } - } - - } - return(ret); -} - - -/******************************************************************************* -* Function Name: Cy_Em_EEPROM_NumWrites -****************************************************************************//** -* -* Returns the number of the EEPROM writes completed so far. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* The number of writes performed to the EEPROM. -* -*******************************************************************************/ -uint32_t Cy_Em_EEPROM_NumWrites(cy_stc_eeprom_context_t * context) -{ - return(CY_EM_EEPROM_GET_SEQ_NUM(context->lastWrRowAddr)); -} - -/** \} */ - -/** \cond INTERNAL */ - - -/******************************************************************************* -* Function Name: FindLastWrittenRow -****************************************************************************//** -* -* Performs a search of the last written row address of the EEPROM associated -* with the context structure. If there were no writes to the EEPROM the -* function returns the start address of the EEPROM. The row address is returned -* in the input parameter. -* -* \param lastWrRowPtr -* The pointer to a memory where the last written row will be returned. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -*******************************************************************************/ -static void FindLastWrittenRow(uint32_t * lastWrRowPtr, cy_stc_eeprom_context_t * context) -{ - uint32_t seqNum = 0u; - uint32_t prevSeqNum = 0u; - uint32_t numRows; - uint32_t emEepromAddr = context->userFlashStartAddr; - - *lastWrRowPtr = emEepromAddr; - - for(numRows = 0u; numRows < (context->numberOfRows * context->wearLevelingFactor); numRows++) - { - seqNum = CY_EM_EEPROM_GET_SEQ_NUM(emEepromAddr); - if((0u != seqNum) && (seqNum > prevSeqNum)) - { - /* Some record in EEPROM was found. Store found sequence - * number and row address. - */ - prevSeqNum = seqNum; - *lastWrRowPtr = emEepromAddr; - } - - /* Switch to the next row */ - emEepromAddr = emEepromAddr + CY_EM_EEPROM_FLASH_SIZEOF_ROW; - } -} - - -/******************************************************************************* -* Function Name: GetRowAddrBySeqNum -****************************************************************************//** -* -* Returns the address of the row in EEPROM using its sequence number. -* -* \param seqNum -* The sequence number of the row. -* -* \param context -* The pointer to the EEPROM context structure. -* -* \return -* The address of the row or zero if the row with the sequence number was not -* found. -* -*******************************************************************************/ -static uint32_t GetRowAddrBySeqNum(uint32_t seqNum, cy_stc_eeprom_context_t * context) -{ - uint32_t emEepromAddr = context->userFlashStartAddr; - - while(CY_EM_EEPROM_GET_SEQ_NUM(emEepromAddr) != seqNum) - { - /* Switch to the next row */ - emEepromAddr = emEepromAddr + CY_EM_EEPROM_FLASH_SIZEOF_ROW; - - if (CY_EM_EEPROM_ADDR_IN_RANGE != - CY_EM_EEPROM_IS_ADDR_EXCEED_RANGE(emEepromAddr, context->wlEndAddr)) - { - emEepromAddr = 0u; - /* Exit the loop as we reached the end of EEPROM */ - break; - } - } - - return (emEepromAddr); -} - - -/******************************************************************************* -* Function Name: GetNextRowToWrite -****************************************************************************//** -* -* Performs a range check of the row that should be written and updates the -* address to the row respectively. The similar actions are done for the read -* address. -* -* \param seqNum -* The sequence number of the last written row. -* -* \param rowToWrPtr -* The address of the last written row (input). The address of the row to be -* written (output). -* -* \param rowToRdPtr -* The address of the row from which the data should be read into the RAM buffer -* in a later write operation. Out parameter. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -*******************************************************************************/ -static void GetNextRowToWrite(uint32_t seqNum, - uint32_t * rowToWrPtr, - uint32_t * rowToRdPtr, - cy_stc_eeprom_context_t * context) -{ - /* Switch to the next row to be written if the current sequence number is - * not zero. - */ - if(0u != seqNum) - { - *rowToWrPtr = (*rowToWrPtr + CY_EM_EEPROM_FLASH_SIZEOF_ROW); - } - - /* If the resulting row address is out of EEPROM, then switch to the base - * EEPROM address (Row#0). - */ - if(CY_EM_EEPROM_ADDR_IN_RANGE != - CY_EM_EEPROM_IS_ADDR_EXCEED_RANGE(*rowToWrPtr, context->wlEndAddr)) - { - *rowToWrPtr = context->userFlashStartAddr; - } - - *rowToRdPtr = 0u; - - /* Check if the sequence number is larger than the number of rows in the EEPROM. - * If not, do not update the row read address because there is no historic - * data to be read. - */ - if(context->numberOfRows <= seqNum) - { - /* Check if wear leveling is used in EEPROM */ - if(context->wearLevelingFactor > 1u) - { - /* The read row address should be taken from an EEPROM copy that became - * inactive recently. This condition check handles that. - */ - if((*rowToWrPtr - (context->numberOfRows * CY_EM_EEPROM_FLASH_SIZEOF_ROW)) < - context->userFlashStartAddr) - { - *rowToRdPtr = context->userFlashStartAddr + - (context->numberOfRows * (context->wearLevelingFactor - 1u) * - CY_EM_EEPROM_FLASH_SIZEOF_ROW) + (*rowToWrPtr - context->userFlashStartAddr); - } - else - { - *rowToRdPtr = *rowToWrPtr - (context->numberOfRows * CY_EM_EEPROM_FLASH_SIZEOF_ROW); - } - } - else - { - /* If no wear leveling, always read from the same flash row that - * should be written. - */ - *rowToRdPtr = *rowToWrPtr; - } - } -} - - -/******************************************************************************* -* Function Name: CalcChecksum -****************************************************************************//** -* -* Implements CRC-8 that is used in checksum calculation for the redundant copy -* algorithm. -* -* \param rowData -* The row data to be used to calculate the checksum. -* -* \param len -* The length of rowData. -* -* \return -* The calculated value of CRC-8. -* -*******************************************************************************/ -static uint8_t CalcChecksum(uint8_t rowData[], uint32_t len) -{ - uint8_t crc = CY_EM_EEPROM_CRC8_SEED; - uint8_t i; - uint16_t cnt = 0u; - - while(cnt != len) - { - crc ^= rowData[cnt]; - for (i = 0u; i < CY_EM_EEPROM_CRC8_POLYNOM_LEN; i++) - { - crc = CY_EM_EEPROM_CALCULATE_CRC8(crc); - } - cnt++; - } - - return (crc); -} - - -/******************************************************************************* -* Function Name: CheckRanges -****************************************************************************//** -* -* Checks if the EEPROM of the requested size can be placed in flash. -* -* \param config -* The pointer to a configuration structure. See \ref cy_stc_eeprom_config_t. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -*******************************************************************************/ -static cy_en_em_eeprom_status_t CheckRanges(cy_stc_eeprom_config_t* config) -{ - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_BAD_DATA; - uint32_t startAddr = config->userFlashStartAddr; - uint32_t endAddr = startAddr + CY_EM_EEPROM_GET_PHYSICAL_SIZE(config->eepromSize, - config->wearLevelingFactor, config->redundantCopy); - - /* Range check if there is enough flash for EEPROM */ - if (CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr)) - { - ret = CY_EM_EEPROM_SUCCESS; - } - return (ret); -} - - -/******************************************************************************* -* Function Name: WriteRow -****************************************************************************//** -* -* Writes one flash row starting from the specified row address. -* -* \param rowAdd -* The address of the flash row. -* -* \param rowData -* The pointer to the data to be written to the row. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -*******************************************************************************/ -static cy_en_em_eeprom_status_t WriteRow(uint32_t rowAddr, - uint32_t *rowData, - cy_stc_eeprom_context_t * context) -{ - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_WRITE_FAIL; - if(0u != context->blockingWrite) - { - /* Do blocking write */ - if(CY_FLASH_DRV_SUCCESS == Cy_Flash_WriteRow(rowAddr, (const uint32_t *)rowData)) - { - ret = CY_EM_EEPROM_SUCCESS; - } - } - else - { - /* Initiate write */ - if(CY_FLASH_DRV_OPERATION_STARTED == Cy_Flash_StartWrite(rowAddr, (const uint32_t *)rowData)) - { - uint32_t countMs = CY_EM_EEPROM_MAX_WRITE_DURATION_MS; - cy_en_flashdrv_status_t rc; - - do - { - CyDelay(1u); /* Wait 1ms */ - rc = Cy_Flash_IsWriteComplete(); /* Check if write completed */ - countMs--; - } - while ((rc == CY_FLASH_DRV_OPCODE_BUSY) && (0u != countMs)); - - if(CY_FLASH_DRV_SUCCESS == rc) - { - ret = CY_EM_EEPROM_SUCCESS; - } - } - } - - return (ret); -} - - -/******************************************************************************* -* Function Name: EraseRow -****************************************************************************//** -* -* Erases one flash row starting from the specified row address. If the redundant -* copy option is enabled the corresponding row in the redundant copy will also -* be erased. -* -* \param rowAdd -* The address of the flash row. -* -* \param ramBuffAddr -* The address of the RAM buffer that contains zeroed data (used only for -* non-PSoC 6 devices). -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -*******************************************************************************/ -static cy_en_em_eeprom_status_t EraseRow(uint32_t rowAddr, - uint32_t ramBuffAddr, - cy_stc_eeprom_context_t * context) -{ - uint32_t emEepromRowAddr = rowAddr; - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_WRITE_FAIL; - uint32_t i = 1u; - - (void)ramBuffAddr; /* To avoid compiler warning */ - - if(0u != context->redundantCopy) - { - i++; - } - - do - { - if(0u != context->blockingWrite) - { - /* Erase the flash row */ - if(CY_FLASH_DRV_SUCCESS == Cy_Flash_EraseRow(emEepromRowAddr)) - { - ret = CY_EM_EEPROM_SUCCESS; - } - } - else - { - /* Initiate erase */ - if(CY_FLASH_DRV_OPERATION_STARTED == Cy_Flash_StartErase(emEepromRowAddr)) - { - uint32_t countMs = CY_EM_EEPROM_MAX_WRITE_DURATION_MS; - cy_en_flashdrv_status_t rc; - - do - { - CyDelay(1u); /* Wait 1ms */ - rc = Cy_Flash_IsWriteComplete(); /* Check if erase completed */ - countMs--; - } - while ((rc == CY_FLASH_DRV_OPCODE_BUSY) && (0u != countMs)); - - if(CY_FLASH_DRV_SUCCESS == rc) - { - ret = CY_EM_EEPROM_SUCCESS; - } - } - } - - if(CY_EM_EEPROM_SUCCESS == ret) - { - /* Update the address to point to the redundant copy row */ - emEepromRowAddr = (emEepromRowAddr - context->userFlashStartAddr) + context->wlEndAddr; - } - else - { - break; - } - i--; - } while (0u != i); - - return(ret); -} - - -/******************************************************************************* -* Function Name: CheckCrcAndCopy -****************************************************************************//** -* -* Checks the checksum of the specific row in EEPROM. If the CRC matches - copies -* the data to the "datAddr" from EEPROM. f the CRC does not match checks the -* CRC of the corresponding row in the EEPROM's redundant copy. If the CRC -* matches - copies the data to the "datAddr" from EEPROM redundant copy. If the -* CRC of the redundant copy does not match - returns bad checksum. -* -* \param startAddr -* The address that points to the start of the specified row. -* -* \param datAddr -* The start address of where the row data will be copied if the CRC check -* will succeed. -* -* \param rowOffset -* The offset in the row from which the data should be copied. -* -* \param numBytes -* The number of bytes to be copied. -* -* \param context -* The pointer to the EEPROM context structure \ref cy_stc_eeprom_context_t. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -* \note -* This function uses a buffer of the flash row size to perform read -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -*******************************************************************************/ -static cy_en_em_eeprom_status_t CheckCrcAndCopy(uint32_t startAddr, - uint32_t dstAddr, - uint32_t rowOffset, - uint32_t numBytes, - cy_stc_eeprom_context_t * context) -{ - cy_en_em_eeprom_status_t ret; - uint32_t writeRamBuffer[CY_EM_EEPROM_FLASH_SIZEOF_ROW / CY_EM_EEPROM_U32_DIV]; - - /* Calculate the row address in the EEPROM's redundant copy */ - uint32_t rcStartRowAddr = (startAddr - context->userFlashStartAddr) + context->wlEndAddr; - - /* Check the row data CRC in the EEPROM */ - if((*(uint32_t *)(startAddr + CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET)) == - ((uint32_t) CalcChecksum((uint8_t *)(startAddr + CY_EM_EEPROM_EEPROM_DATA_OFFSET), - CY_EM_EEPROM_EEPROM_DATA_LEN))) - { - (void)memcpy((void *)(dstAddr), (void *)(startAddr + rowOffset), numBytes); - - ret = CY_EM_EEPROM_SUCCESS; - } - /* Check the row data CRC in the EEPROM's redundant copy */ - else if((*(uint32_t *)(rcStartRowAddr + CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET)) == - ((uint32_t) CalcChecksum((uint8_t *)(rcStartRowAddr + CY_EM_EEPROM_EEPROM_DATA_OFFSET), - CY_EM_EEPROM_EEPROM_DATA_LEN))) - { - /* Copy the redundant copy row to RAM buffer to avoid read while write (RWW) - * flash exception. The RWW occurs while trying to write and read the data from - * same flash macro. - */ - (void)memcpy((void *)(writeRamBuffer), (void *)(rcStartRowAddr), CY_EM_EEPROM_FLASH_SIZEOF_ROW); - - /* Restore bad row data from the RAM buffer */ - ret = WriteRow(startAddr, (uint32_t *)writeRamBuffer, context); - - if(CY_EM_EEPROM_SUCCESS == ret) - { - (void)memcpy((void *)(dstAddr), (void *)(writeRamBuffer + rowOffset), numBytes); - } - } - else - { - ret = CY_EM_EEPROM_BAD_CHECKSUM; - } - - return(ret); -} - - -/******************************************************************************* -* Function Name: GetAddresses -****************************************************************************//** -* -* Calculates the start and end address of the row's EEPROM data to be updated. -* The start and end are not absolute addresses but a relative addresses in a -* flash row. -* -* \param startAddr -* The pointer the address where the EEPROM data start address will be returned. -* -* \param endAddr -* The pointer the address where the EEPROM data end address will be returned. -* -* \param offset -* The pointer the address where the calculated offset of the EEPROM header data -* will be returned. -* -* \param rowNum -* The row number that is about to be written. -* -* \param addr -* The address of the EEPROM header data in the currently analyzed row that may -* concern to the row about to be written. -* -* \param len -* The length of the EEPROM header data in the currently analyzed row that may -* concern to the row about to be written. -* -* \return -* Zero indicates that the currently analyzed row has the data to be written to -* the active EEPROM row data locations. Non zero value indicates that there is -* no data to be written -* -*******************************************************************************/ -static uint32_t GetAddresses(uint32_t *startAddr, - uint32_t *endAddr, - uint32_t *offset, - uint32_t rowNum, - uint32_t addr, - uint32_t len) -{ - uint32_t skip = 0u; - - *offset =0u; - - if(0u != CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr, rowNum)) - { - *startAddr = CY_EM_EEPROM_EEPROM_DATA_LEN + (addr % CY_EM_EEPROM_EEPROM_DATA_LEN); - - if(0u != CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr + len, rowNum)) - { - *endAddr = *startAddr + len; - } - else - { - *endAddr = CY_EM_EEPROM_FLASH_SIZEOF_ROW; - } - } - else - { - - if(0u != CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr + len, rowNum)) - { - *startAddr = CY_EM_EEPROM_EEPROM_DATA_LEN; - *endAddr = (*startAddr + len) - (*startAddr - (addr % CY_EM_EEPROM_EEPROM_DATA_LEN)); - *offset = len - (*endAddr - *startAddr); - } - else - { - skip++; - } - } - - return (skip); -} - - -/******************************************************************************* -* Function Name: FillChecksum -****************************************************************************//** -* -* Performs calculation of the checksum on each row in the Em_EEPROM and fills -* the Em_EEPROM headers checksum field with the calculated checksums. -* -* \param context -* The pointer to the EEPROM context structure. -* -* \return -* error / status code. See \ref cy_en_em_eeprom_status_t. -* -* \theory -* In case if redundant copy option is used the Em_EEPROM would return bad -* checksum while trying to read the EEPROM rows which were not yet written by -* the user. E.g. any read after device reprogramming without previous Write() -* operation to the EEPROM would fail. This would happen because the Em_EEPROM -* headers checksum field values (which is zero at the moment) would not be -* equal to the actual data checksum. This function allows to avoid read failure -* after device reprogramming. -* -* \note -* This function uses a buffer of the flash row size to perform read -* operation. For the size of the row refer to the specific PSoC device -* datasheet. -* -*******************************************************************************/ -static cy_en_em_eeprom_status_t FillChecksum(cy_stc_eeprom_context_t * context) -{ - uint32_t i; - uint32_t rdAddr; - uint32_t writeRamBuffer[CY_EM_EEPROM_FLASH_SIZEOF_ROW / CY_EM_EEPROM_U32_DIV]; - uint32_t wrAddr = context->lastWrRowAddr; - uint32_t tmpRowAddr; - /* Get the sequence number (number of writes) */ - uint32_t seqNum = CY_EM_EEPROM_GET_SEQ_NUM(wrAddr); - cy_en_em_eeprom_status_t ret = CY_EM_EEPROM_BAD_PARAM; - - for(i = 0u; i < (context->numberOfRows * context->wearLevelingFactor); i++) - { - /* Copy the EEPROM row from Flash to RAM */ - (void)memcpy((void *)&writeRamBuffer[0u], (void *)(wrAddr), CY_EM_EEPROM_FLASH_SIZEOF_ROW); - - /* Increment the sequence number */ - seqNum++; - writeRamBuffer[CY_EM_EEPROM_HEADER_SEQ_NUM_OFFSET_U32] = seqNum; - - /* Calculate and fill the checksum to the Em_EEPROM header */ - writeRamBuffer[CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32] = (uint32_t) - CalcChecksum((uint8_t *) &writeRamBuffer[CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32], - CY_EM_EEPROM_EEPROM_DATA_LEN); - - /* Write the data to the specified flash row */ - ret = WriteRow(wrAddr, writeRamBuffer, context); - - /* Update the row address to point to the relevant row in the redundant - * EEPROM's copy. - */ - tmpRowAddr = (wrAddr - context->userFlashStartAddr) + context->wlEndAddr; - - /* Write the data to the specified flash row */ - ret = WriteRow(tmpRowAddr, writeRamBuffer, context); - - /* Get the address of the next row to be written. - * "rdAddr" is not used in this function but provided to prevent NULL - * pointer exception in GetNextRowToWrite(). - */ - GetNextRowToWrite(seqNum, &wrAddr, &rdAddr, context); - } - - return(ret); -} - -/** \endcond */ - -#if defined(__cplusplus) -} -#endif - -/* [] END OF FILE */ - diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.h b/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.h deleted file mode 100644 index e88cca2e11..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/device/middleware/em_eeprom/cy_em_eeprom.h +++ /dev/null @@ -1,536 +0,0 @@ -/******************************************************************************* -* \file cy_em_eeprom.h -* \version 1.0.1 -* -* \brief -* This file provides the function prototypes and constants for the Emulated -* EEPROM middleware library. -* -******************************************************************************** -* Copyright 2017-2018, Cypress Semiconductor Corporation. All rights reserved. -* You may use this file only in accordance with the license, terms, conditions, -* disclaimers, and limitations in the end user license agreement accompanying -* the software package with which this file was provided. -*******************************************************************************/ - -/** - * \mainpage Cypress Em_EEPROM Middleware Library - * - * The Emulated EEPROM provides an API that allows creating an emulated - * EEPROM in flash that has the ability to do wear leveling and restore - * corrupted data from a redundant copy. The Emulated EEPROM library is designed - * to be used with the Em_EEPROM component. - * - * The Cy_Em_EEPROM API is described in the following sections: - * - \ref group_em_eeprom_macros - * - \ref group_em_eeprom_data_structures - * - \ref group_em_eeprom_enums - * - \ref group_em_eeprom_functions - * - * Features: - * * EEPROM-Like Non-Volatile Storage - * * Easy to use Read and Write API - * * Optional Wear Leveling - * * Optional Redundant Data storage - * - * \section group_em_eeprom_configuration Configuration Considerations - * - * The Em_EEPROM operates on the top of the flash driver. The flash driver has - * some prerequisites for proper operation. Refer to the "Flash System - * Routine (Flash)" section of the PDL API Reference Manual. - * - * Initializing Emulated EEPROM in User flash - * - * To initialize an Emulated EEPROM in the User flash, the EEPROM storage should - * be declared by the user. For the proper operation, the EEPROM storage should - * be aligned to the size of the flash row. An example of the EEPROM storage - * declaration is below (applicable for GCC and MDK compilers): - * - * CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW) - * const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u}; - * - * The same declaration for the IAR compiler: - * - * #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW - * const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u}; - * - * Note that the name "emEeprom" is shown for reference. Any other name can be - * used instead. Also, note that the Em_EEPROM_PHYSICAL_SIZE constant is - * generated by the PSoC Creator Em_EEPROM component and so it is instance name - * dependent and its prefix should be changed when the name of the component - * changes. If the The Cy_Em_EEPROM middleware library is used without the - * Em_EEPROM component, the user has to provide a proper size for the EEPROM - * storage instead of Em_EEPROM_PHYSICAL_SIZE. The size of the EEPROM storage - * can be calculated using the following equation: - * - * Physical size = EEPROM data size * 2 * wear leveling * (1 + redundant copy) - * - * where, - * "EEPROM data size" - the size of data the user wants to store in the - * EEPROM. The data size must divide evenly to the half of the flash row size. - * "wear leveling" - the wear leveling factor (1-10). - * "redundant copy" - "zero" if a redundant copy is not used, and "one" - * otherwise. - * - * The start address of the storage should be filled to the Emulated EEPROM - * configuration structure and then passed to the Cy_Em_EEPROM_Init(). - * If the Em_EEPROM component is used, the config (Em_EEPROM_config) and - * context structures (Em_EEPROM_context) are defined by the component, so the - * user may just use that structures otherwise both of the structures need to - * be provided by the user. Note that if the "Config Data in Flash" - * option is selected in the component, then the configuration structure should - * be copied to RAM to allow EEPROM storage start address update. The following - * code demonstrates utilization of "Em_EEPROM_config" and "Em_EEPROM_context" - * Em_EEPROM component structures for Cy_Em_EEPROM middleware library - * initialization: - * - * cy_en_em_eeprom_status_t retValue; - * cy_stc_eeprom_config_t config; - * - * memcpy((void *)&config, - (void *)&Em_EEPROM_config, - sizeof(cy_stc_eeprom_config_t)); - * config.userFlashStartAddr = (uint32_t)emEeprom; - * retValue = Cy_Em_EEPROM_Init(&config, &Em_EEPROM_context); - * - * Initializing EEPROM in Emulated EEPROM flash area - * - * Initializing of the EEPROM storage in the Emulated EEPROM flash area is - * identical to initializing of the EEPROM storage in the User flash with one - * difference. The location of the Emulated EEPROM storage should be specified - * somewhere in the EmulatedEEPROM flash area. If the Em_EEPROM component is - * utilized in the project, then the respective storage - * (Em_EEPROM_em_EepromStorage[]) is automatically declared by the component - * if the "Use Emulated EEPROM" option is set to "Yes". The user just needs to - * fill the start address of the storage to the config structure. If the - * Em_EEPROM component is not used, the user needs to declare the storage - * in the Emulated EEPROM flash area. An example of such declaration is - * following (applicable for GCC and MDK compilers): - * - * CY_SECTION(".cy_em_eeprom") CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW) - * const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u}; - * - * The same declaration for the IAR compiler: - * - * #pragma location = ".cy_em_eeprom" - * #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW - * const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u}; - * - * where, - * Em_EEPROM_PHYSICAL_SIZE - is a constant that is generated by the Em_EEPROM - * component when the component is utilized in the project or it should be - * provided by the user. The equation for the calculation of the constant is - * shown above. - * - * Note that the size of the Emulated EEPROM flash area is limited. Refer to the - * specific device datasheet for the value of the available EEPROM Emulation - * area. - * - * Also note that by default, the Em_EEPROM storage is fully allocated to both - * of the PSoC 6 cores in the ".cy_em_eeprom" section. If the Em_EEPROM is - * used on one of the cores, you must reallocate the declaration of the - * ".cy_em_eeprom" section in both linker scripts. Otherwise, while building the - * project the cymcuelftool will report an error because of ".cy_em_eeprom" - * section contents collision. - * - * \section group_em_eeprom_more_information More Information - * See the Em_EEPROM Component datasheet. - * - * - * \section group_em_eeprom_MISRA MISRA-C Compliance - * - * The Cy_Em_EEPROM library has the following specific deviations: - * - *
MISRA Rule
VersionChangesReason for Change
1.10The input/output bit in the trigLine parameter of the +* The input/output bit in the trigLine parameter of the * Cy_TrigMux_SwTrigger() function is changed to 30.
* The invert parameter type is changed to bool.
* Added input parameter validation to the API functions.
- * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - * - *
MISRA RuleRule Class (Required/Advisory)Rule DescriptionDescription of Deviation(s)
11.4AThe cast should not be performed between a pointer to the object type - * and a different pointer to the object type.The cast from the object type and a different pointer to the object - * was used intentionally because of the performance reasons.
14.2RAll non-null statements shall either have at least one side-effect, - * however executed, or cause control flow to change.To maintain common codebase, some variables, unused for a specific - * device, are casted to void to prevent generation of an unused variable - * compiler warning.
16.7AThe object addressed by the pointer parameter is not modified and so - * the pointer could be of type 'pointer to const'.The warning is generated because of the pointer dereferencing to - * address which makes the MISRA checker think the data is not - * modified.
17.4RThe array indexing shall be the only allowed form of pointer - * arithmetic.The pointer arithmetic used in several places on the Cy_Em_EEPROM - * implementation is safe and preferred because it increases the code - * flexibility.
19.7AA function shall be used in preference to a function-like macro.Macro is used because of performance reasons.
- * - * \section group_em_eeprom_changelog Changelog - * - * - * - * - * - * - * - * - * - * - * - * - *
VersionChangesReason for Change
1.0.1EM_EEPROM storage allocation note added to - * \ref group_em_eeprom_configurationDocumentation update and clarification
1.0Initial Version
- * - * \defgroup group_em_eeprom_macros Macros - * \brief - * This section describes the Emulated EEPROM Macros. - * - * \defgroup group_em_eeprom_functions Functions - * \brief - * This section describes the Emulated EEPROM Function Prototypes. - * - * \defgroup group_em_eeprom_data_structures Data Structures - * \brief - * Describes the data structures defined by the Emulated EEPROM. - * - * \defgroup group_em_eeprom_enums Enumerated types - * \brief - * Describes the enumeration types defined by the Emulated EEPROM. - * - */ - - -#if !defined(CY_EM_EEPROM_H) -#define CY_EM_EEPROM_H - -#include -#include -#include "syslib/cy_syslib.h" -#include "flash/cy_flash.h" - -/* The C binding of definitions if building with the C++ compiler */ -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - - -/*************************************** -* Conditional Compilation Parameters -***************************************/ - - -/*************************************** -* Data Structure definitions -***************************************/ -/** -* \addtogroup group_em_eeprom_data_structures -* \{ -*/ - -/** EEPROM configuration structure */ -typedef struct -{ - /** The number of bytes to store in EEPROM */ - uint32_t eepromSize; - - /** The amount of wear leveling from 1 to 10. 1 means no wear leveling - * is used. - */ - uint32_t wearLevelingFactor; - - /** If not zero, a redundant copy of the Em_EEPROM is included. */ - uint8_t redundantCopy; - - /** If not zero, a blocking write to flash is used. Otherwise non-blocking - * write is used. This parameter is used only for PSoC 6. - */ - uint8_t blockingWrite; - - /** The start address of the EEPROM memory in the user's flash or in the - * Emulated EEPROM flash area. - */ - uint32_t userFlashStartAddr; -} cy_stc_eeprom_config_t; - -/** \} group_em_eeprom_data_structures */ - -/** The EEPROM context data structure. It is used to store the specific -* EEPROM context data. -*/ -typedef struct -{ - /** The pointer to the end address of EEPROM including wear leveling overhead - * and excluding redundant copy overhead. - */ - uint32_t wlEndAddr; - - /** The number of flash rows allocated for the EEPROM excluding the number of - * rows allocated for wear leveling and redundant copy overhead. - */ - uint32_t numberOfRows; - - /** The address of the last written EEPROM row */ - uint32_t lastWrRowAddr; - - /** The number of bytes to store in EEPROM */ - uint32_t eepromSize; - - /** The amount of wear leveling from 1 to 10. 1 means no wear leveling - * is used. - */ - uint32_t wearLevelingFactor; - - /** If not zero, a redundant copy of the Em_EEPROM is included. */ - uint8_t redundantCopy; - - /** If not zero, a blocking write to flash is used. Otherwise non-blocking - * write is used. This parameter is used only for PSoC 6. - */ - uint8_t blockingWrite; - - /** The start address for the EEPROM memory in the user's flash. */ - uint32_t userFlashStartAddr; -} cy_stc_eeprom_context_t; - - -#define CY_EM_EEPROM_ID (CY_PDL_DRV_ID(0x1BuL)) /**< Em_EEPROM PDL ID */ - /** - * \addtogroup group_em_eeprom_enums - * \{ - * Specifies return values meaning. - */ - /** A prefix for EEPROM function error return-values */ -#define CY_EM_EEPROM_ID_ERROR (uint32_t)(CY_EM_EEPROM_ID | CY_PDL_STATUS_ERROR) - - - -/*************************************** -* Enumerated Types and Parameters -***************************************/ - -/** EEPROM return enumeration type */ -typedef enum -{ - CY_EM_EEPROM_SUCCESS = 0x00uL, /**< The function executed successfully */ - CY_EM_EEPROM_BAD_PARAM = (CY_EM_EEPROM_ID_ERROR + 1uL), /**< The input parameter is invalid */ - CY_EM_EEPROM_BAD_CHECKSUM = (CY_EM_EEPROM_ID_ERROR + 2uL), /**< The data in EEPROM is corrupted */ - CY_EM_EEPROM_BAD_DATA = (CY_EM_EEPROM_ID_ERROR + 3uL), /**< Failed to place the EEPROM in flash */ - CY_EM_EEPROM_WRITE_FAIL = (CY_EM_EEPROM_ID_ERROR + 4uL) /**< Write to EEPROM failed */ -} cy_en_em_eeprom_status_t; - -/** \} group_em_eeprom_enums */ - - -/*************************************** -* Function Prototypes -***************************************/ - -/** -* \addtogroup group_em_eeprom_functions -* \{ -*/ -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Init(cy_stc_eeprom_config_t* config, cy_stc_eeprom_context_t * context); -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Read(uint32_t addr, - void * eepromData, - uint32_t size, - cy_stc_eeprom_context_t * context); -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Write(uint32_t addr, - void * eepromData, - uint32_t size, - cy_stc_eeprom_context_t * context); -cy_en_em_eeprom_status_t Cy_Em_EEPROM_Erase(cy_stc_eeprom_context_t * context); -uint32_t Cy_Em_EEPROM_NumWrites(cy_stc_eeprom_context_t * context); -/** \} group_em_eeprom_functions */ - - -/*************************************** -* API Constants -***************************************/ -/** -* \addtogroup group_em_eeprom_macros -* \{ -*/ -/** Library major version */ -#define CY_EM_EEPROM_VERSION_MAJOR (1) - -/** Library minor version */ -#define CY_EM_EEPROM_VERSION_MINOR (0) - -/** Defines the maximum data length that can be stored in one flash row */ -#define CY_EM_EEPROM_EEPROM_DATA_LEN (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) - -/** \} group_em_eeprom_macros */ - - -/*************************************** -* Macro definitions -***************************************/ -/** \cond INTERNAL */ - -/* Defines the size of flash row */ -#define CY_EM_EEPROM_FLASH_SIZEOF_ROW (CY_FLASH_SIZEOF_ROW) - -/* Device specific flash constants */ -#define CY_EM_EEPROM_FLASH_BASE_ADDR (CY_FLASH_BASE) -#define CY_EM_EEPROM_FLASH_SIZE (CY_FLASH_SIZE) -#define CY_EM_EEPROM_EM_EEPROM_BASE_ADDR (CY_EM_EEPROM_BASE) -#define CY_EM_EEPROM_EM_EEPROM_SIZE (CY_EM_EEPROM_SIZE) -#define CY_EM_EEPROM_EM_EEPROM_END_ADDR (CY_EM_EEPROM_EM_EEPROM_BASE_ADDR + CY_EM_EEPROM_EM_EEPROM_SIZE) - /* Checks is the EEPROM is in flash range */ -#define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \ - (((((startAddr) > CY_EM_EEPROM_FLASH_BASE_ADDR) && ((endAddr) <= CY_EM_EEPROM_FLASH_END_ADDR)) || \ - (((startAddr) >= CY_EM_EEPROM_EM_EEPROM_BASE_ADDR) && \ - ((endAddr) <= CY_EM_EEPROM_EM_EEPROM_END_ADDR)))) - -#define CY_EM_EEPROM_FLASH_END_ADDR (CY_EM_EEPROM_FLASH_BASE_ADDR + CY_EM_EEPROM_FLASH_SIZE) - -/* Defines the length of EEPROM data that can be stored in Em_EEPROM header */ -#define CY_EM_EEPROM_HEADER_DATA_LEN ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) - 16u) - -#define CY_EM_EEPROM_ADDR_IN_RANGE (1u) - -/* Return CY_EM_EEPROM_ADDR_IN_RANGE if addr exceeded the upper range of -* EEPROM. The wear leveling overhead is included in the range but redundant copy -* is excluded. -*/ -#define CY_EM_EEPROM_IS_ADDR_EXCEED_RANGE(addr, endEepromAddr) \ - (((addr) >= (endEepromAddr)) ? (0u) : (CY_EM_EEPROM_ADDR_IN_RANGE)) - -/* Check to see if the specified address is present in the EEPROM */ -#define CY_EM_EEPROM_IS_ADDR_IN_RANGE(addr, startEepromAddr, endEepromAddr) \ - (((addr) > (startEepromAddr)) ? \ - (((addr) < (endEepromAddr)) ? (CY_EM_EEPROM_ADDR_IN_RANGE) : (0u)) : (0u)) - -/* Check if the EEPROM address locations from startAddr1 to endAddr1 -* are crossed with EEPROM address locations from startAddr2 to endAddr2. -*/ -#define CY_EM_EEPROM_IS_ADDRESES_CROSSING(startAddr1, endAddr1 , startAddr2, endAddr2) \ - (((startAddr1) > (startAddr2)) ? (((startAddr1) >= (endAddr2)) ? (0u) : (1u) ) : \ - (((startAddr2) >= (endAddr1)) ? (0u) : (1u))) - -/* Return the pointer to the start of the redundant copy of the EEPROM */ -#define CY_EM_EEPROM_GET_REDNT_COPY_ADDR_BASE(numRows, wearLeveling, eepromStartAddr) \ - ((((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW) * (wearLeveling)) + (eepromStartAddr)) - -/* Return the number of the row in EM_EEPROM which contains an address defined by -* rowAddr. - */ -#define CY_EM_EEPROM_GET_ACT_ROW_NUM_FROM_ADDR(rowAddr, maxRows, eepromStartAddr) \ - ((((rowAddr) - (eepromStartAddr)) / CY_EM_EEPROM_FLASH_SIZEOF_ROW) % (maxRows)) - - -/** Returns the size allocated for the EEPROM excluding wear leveling and -* redundant copy overhead. -*/ -#define CY_EM_EEPROM_GET_EEPROM_SIZE(numRows) ((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW) - -/* Check if the given address belongs to the EEPROM address of the row -* specified by rowNum. -*/ -#define CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr, rowNum) \ - (((addr) < ((rowNum) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u))) ? (0u) : \ - (((addr) > ((((rowNum) + 1u) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)) - 1u)) ? \ - (0u) : (1u))) - -/* CRC-8 constants */ -#define CY_EM_EEPROM_CRC8_POLYNOM ((uint8_t)(0x31u)) -#define CY_EM_EEPROM_CRC8_POLYNOM_LEN (8u) -#define CY_EM_EEPROM_CRC8_SEED (0xFFu) -#define CY_EM_EEPROM_CRC8_XOR_VAL ((uint8_t) (0x80u)) - -#define CY_EM_EEPROM_CALCULATE_CRC8(crc) \ - ((CY_EM_EEPROM_CRC8_XOR_VAL == ((crc) & CY_EM_EEPROM_CRC8_XOR_VAL)) ? \ - ((uint8_t)(((uint8_t)((uint8_t)((crc) << 1u))) ^ CY_EM_EEPROM_CRC8_POLYNOM)) : ((uint8_t)((crc) << 1u))) - -#define CY_EM_EEPROM_GET_SEQ_NUM(addr) (*(uint32_t*)(addr)) - -/** \endcond */ - -/** -* \addtogroup group_em_eeprom_macros -* \{ -*/ - -/** Calculate the number of flash rows required to create an Em_EEPROM of -* dataSize. -*/ -#define CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) \ - (((dataSize) / (CY_EM_EEPROM_EEPROM_DATA_LEN)) + \ - ((((dataSize) % (CY_EM_EEPROM_EEPROM_DATA_LEN)) != 0u) ? 1U : 0U)) - -/** Returns the size of flash allocated for EEPROM including wear leveling and -* redundant copy overhead. -*/ -#define CY_EM_EEPROM_GET_PHYSICAL_SIZE(dataSize, wearLeveling, redundantCopy) \ - (((CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) * \ - CY_EM_EEPROM_FLASH_SIZEOF_ROW) * \ - (wearLeveling)) * (1uL + (redundantCopy))) - -/** \} group_em_eeprom_macros */ - - -/****************************************************************************** -* Local definitions -*******************************************************************************/ -/** \cond INTERNAL */ - -/* Offsets for 32-bit RAM buffer addressing */ -#define CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32 ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) / 4u) -#define CY_EM_EEPROM_HEADER_SEQ_NUM_OFFSET_U32 (0u) -#define CY_EM_EEPROM_HEADER_ADDR_OFFSET_U32 (1u) -#define CY_EM_EEPROM_HEADER_LEN_OFFSET_U32 (2u) -#define CY_EM_EEPROM_HEADER_DATA_OFFSET_U32 (3u) -#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32 (CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32 - 1u) - -/* The same offsets as above used for direct memory addressing */ -#define CY_EM_EEPROM_EEPROM_DATA_OFFSET (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) -#define CY_EM_EEPROM_HEADER_ADDR_OFFSET (4u) -#define CY_EM_EEPROM_HEADER_LEN_OFFSET (8u) -#define CY_EM_EEPROM_HEADER_DATA_OFFSET (12u) -#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET (CY_EM_EEPROM_EEPROM_DATA_OFFSET - 4u) - -#define CY_EM_EEPROM_U32_DIV (4u) - -/* Maximum wear leveling value */ -#define CY_EM_EEPROM_MAX_WEAR_LEVELING_FACTOR (10u) - -/* Maximum allowed flash row write/erase operation duration */ -#define CY_EM_EEPROM_MAX_WRITE_DURATION_MS (50u) - -/** \endcond */ - - -#ifdef __cplusplus -} -#endif /* __cplusplus */ -#endif /* CY_EM_EEPROM_H */ - - -/* [] END OF FILE */ - diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/trng_api.c b/targets/TARGET_Cypress/TARGET_PSOC6/trng_api.c deleted file mode 100644 index 78d303c165..0000000000 --- a/targets/TARGET_Cypress/TARGET_PSOC6/trng_api.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * mbed Microcontroller Library - * Copyright (c) 2017-2018 Future Electronics - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "device.h" -#include "mbed_critical.h" -#include "mbed_error.h" -#include "trng_api.h" -#include "drivers/peripheral/ipc/cy_ipc_drv.h" -#include "drivers/peripheral/crypto/cy_crypto_config.h" -#include "drivers/peripheral/crypto/cy_crypto.h" -#include "drivers/peripheral/crypto/cy_crypto_server.h" - - -#if DEVICE_TRNG - -/* Polynomial configuration for the programmable Galois and Fibonacci ring oscillators */ -#define CRYPTO_TRNG_GARO_POL (0x42000000) -#define CRYPTO_TRNG_FIRO_POL (0x43000000) - - -static uint32_t trng_initialized = 0; - -/** The Crypto configuration structure. */ -static const cy_stc_crypto_config_t crypto_config = { - /* .ipcChannel */ CY_IPC_CHAN_CRYPTO, - /* .acquireNotifierChannel */ CY_CRYPTO_IPC_INTR_NOTIFY_NUM, - /* .releaseNotifierChannel */ CY_CRYPTO_IPC_INTR_RELEASE_NUM, - - /* .releaseNotifierConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_RELEASE_INTR_NR, - /* .cm0pSrc */ (cy_en_intr_t)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_RELEASE_NUM), -#else - /* .intrSrc */ (IRQn_Type)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_RELEASE_NUM), -#endif - /* .intrPriority */ CY_CRYPTO_RELEASE_INTR_PR, - }, - /* .userCompleteCallback */ NULL - -#if (CY_CRYPTO_CORE_ENABLE) - , - /* .userGetDataHandler */ NULL, - /* .userErrorHandler */ NULL, - - /* .acquireNotifierConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_NOTIFY_INTR_NR, - /* .cm0pSrc */ (cy_en_intr_t)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_NOTIFY_NUM), -#else - /* .intrSrc */ (IRQn_Type)CY_IPC_INTR_NUM_TO_VECT((int32_t)CY_CRYPTO_IPC_INTR_NOTIFY_NUM), -#endif - /* .intrPriority */ CY_CRYPTO_NOTIFY_INTR_PR, - }, - /* .cryptoErrorIntrConfig */ { -#if (CY_CPU_CORTEX_M0P) - /* .intrSrc */ CY_CRYPTO_CM0_ERROR_INTR_NR, - /* .cm0pSrc */ cpuss_interrupt_crypto_IRQn, -#else - /* .intrSrc */ cpuss_interrupt_crypto_IRQn, -#endif - /* .intrPriority */ CY_CRYPTO_ERROR_INTR_PR, - } -#endif -}; - -#if defined(TARGET_MCU_PSOC6_M0) -static cy_stc_crypto_server_context_t crypto_server_context; -#endif -static cy_stc_crypto_context_t crypto_scratch; -static cy_stc_crypto_context_trng_t trng_context; - -void trng_init(trng_t *obj) -{ - (void) obj; - - if (core_util_atomic_incr_u32(&trng_initialized, 1) > 1) { - error("Only single instance of TRNG is supported."); - } - - /* Start the Crypto Server, only on Cm0 core */ -#if defined(TARGET_MCU_PSOC6_M0) - Cy_Crypto_Server_Start(&crypto_config, &crypto_server_context); - Cy_Crypto_Sync(CY_CRYPTO_SYNC_BLOCKING); -#endif - - /* Initialize the Crypto Driver */ - Cy_Crypto_Init(&crypto_config, &crypto_scratch); - Cy_Crypto_Sync(CY_CRYPTO_SYNC_BLOCKING); - - /* Enable Crypto Engine */ - Cy_Crypto_Enable(); - Cy_Crypto_Sync(CY_CRYPTO_SYNC_BLOCKING); - -} - -void trng_free(trng_t *obj) -{ - (void) obj; - - Cy_Crypto_Enable(); - Cy_Crypto_Sync(CY_CRYPTO_SYNC_BLOCKING); - Cy_Crypto_DeInit(); - -#if defined(TARGET_MCU_PSOC6_M0) - Cy_Crypto_Server_Stop(); -#endif - trng_initialized = 0; -} - -int trng_get_bytes(trng_t *obj, uint8_t *output, size_t length, size_t *output_length) -{ - uint8_t random_val[4]; - uint32_t i; - - (void) obj; - - *output_length = length; - while (length > 0) { - if (Cy_Crypto_Trng_Generate(CRYPTO_TRNG_GARO_POL, - CRYPTO_TRNG_FIRO_POL, - 32, - (uint32_t *)random_val, - &trng_context) != CY_CRYPTO_SUCCESS) { - *output_length = 0; - return (-1); - } - - Cy_Crypto_Sync(CY_CRYPTO_SYNC_BLOCKING); - - for (i = 0; (i < 4) && (length > 0); ++i) { - *output++ = random_val[i]; - --length; - } - } - - return 0; -} - -#endif // DEVICE_TRNG diff --git a/targets/targets.json b/targets/targets.json index a2d235a741..2eb19400bc 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -4556,7 +4556,6 @@ "FUTURE_SEQUANA_M0": { "inherits": ["MCU_PSOC6_M0"], "supported_form_factors": ["ARDUINO"], - "device_name": "CY8C6347BZI-BLD53M0+", "extra_labels_add": ["CY8C63XX", "FUTURE_SEQUANA"], "macros_add": ["CY8C6347BZI_BLD53"], "detect_code": ["6000"], @@ -4585,7 +4584,6 @@ "inherits": ["MCU_PSOC6_M4"], "sub_target": "FUTURE_SEQUANA_M0", "supported_form_factors": ["ARDUINO"], - "device_name": "CY8C6347BZI-BLD53M4", "extra_labels_add": ["CY8C63XX", "CORDIO"], "macros_add": ["CY8C6347BZI_BLD53"], "detect_code": ["6000"],