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Updated RAM config symbols to reflect the L4 device ram names

pull/1353/head
Helmut Tschemernjak 2015-09-25 19:45:14 +02:00
parent eab731595f
commit 8dead7639d
4 changed files with 28 additions and 28 deletions
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14
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
View File

@ -2,8 +2,8 @@
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188 SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
RAM2 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
@ -112,7 +112,7 @@ SECTIONS
__data_end__ = .; __data_end__ = .;
_edata = .; _edata = .;
} > RAM } > SRAM2
.bss : .bss :
{ {
@ -124,7 +124,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
__bss_end__ = .; __bss_end__ = .;
_ebss = .; _ebss = .;
} > RAM } > SRAM2
.heap (COPY): .heap (COPY):
{ {
@ -132,7 +132,7 @@ SECTIONS
end = __end__; end = __end__;
*(.heap*) *(.heap*)
__HeapLimit = .; __HeapLimit = .;
} > RAM } > SRAM2
/* .stack_dummy section doesn't contains any symbols. It is only /* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign * used for linker to calculate size of stack sections, and assign
@ -140,11 +140,11 @@ SECTIONS
.stack_dummy (COPY): .stack_dummy (COPY):
{ {
*(.stack*) *(.stack*)
} > RAM } > SRAM2
/* Set stack top to end of RAM, and stack limit move down by /* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - SIZEOF(.stack_dummy); __StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);

14
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_DISCO_L476VG/TOOLCHAIN_IAR/stm32l476xx.icf
View File

@ -7,16 +7,16 @@ define symbol __region_ROM_end__ = 0x080FFFFF;
/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */ /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */ define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
define symbol __region_RAM_start__ = 0x10000188; define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_RAM_end__ = 0x10007FFF; define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_SRAM2_start__ = 0x20000000; define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_SRAM2_end__ = 0x20017FFF; define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */ /* Memory regions */
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Stack 1/8 and Heap 1/4 of RAM */ /* Stack 1/8 and Heap 1/4 of RAM */
define symbol __size_cstack__ = 0x4000; define symbol __size_cstack__ = 0x4000;
@ -31,5 +31,5 @@ do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in SRAM2_region { readwrite, block STACKHEAP };
place in SRAM2_region { }; place in SRAM1_region { };

14
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_GCC_ARM/STM32L476XX.ld
View File

@ -2,8 +2,8 @@
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
RAM (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188 SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
RAM2 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
} }
/* Linker script to place sections and symbol values. Should be used together /* Linker script to place sections and symbol values. Should be used together
@ -112,7 +112,7 @@ SECTIONS
__data_end__ = .; __data_end__ = .;
_edata = .; _edata = .;
} > RAM } > SRAM2
.bss : .bss :
{ {
@ -124,7 +124,7 @@ SECTIONS
. = ALIGN(4); . = ALIGN(4);
__bss_end__ = .; __bss_end__ = .;
_ebss = .; _ebss = .;
} > RAM } > SRAM2
.heap (COPY): .heap (COPY):
{ {
@ -132,7 +132,7 @@ SECTIONS
end = __end__; end = __end__;
*(.heap*) *(.heap*)
__HeapLimit = .; __HeapLimit = .;
} > RAM } > SRAM2
/* .stack_dummy section doesn't contains any symbols. It is only /* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign * used for linker to calculate size of stack sections, and assign
@ -140,11 +140,11 @@ SECTIONS
.stack_dummy (COPY): .stack_dummy (COPY):
{ {
*(.stack*) *(.stack*)
} > RAM } > SRAM2
/* Set stack top to end of RAM, and stack limit move down by /* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */ * size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM); __StackTop = ORIGIN(SRAM2) + LENGTH(SRAM2);
_estack = __StackTop; _estack = __StackTop;
__StackLimit = __StackTop - SIZEOF(.stack_dummy); __StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop); PROVIDE(__stack = __StackTop);

14
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L476RG/TOOLCHAIN_IAR/stm32l476xx.icf
View File

@ -7,16 +7,16 @@ define symbol __region_ROM_end__ = 0x080FFFFF;
/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */ /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x10000000; define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */ define symbol __NVIC_end__ = 0x10000187; /* Aligned on 8 bytes (392 = 49 x 8) */
define symbol __region_RAM_start__ = 0x10000188; define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_RAM_end__ = 0x10007FFF; define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_SRAM2_start__ = 0x20000000; define symbol __region_SRAM1_start__ = 0x20000000;
define symbol __region_SRAM2_end__ = 0x20017FFF; define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */ /* Memory regions */
define memory mem with size = 4G; define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Stack 1/8 and Heap 1/4 of RAM */ /* Stack 1/8 and Heap 1/4 of RAM */
define symbol __size_cstack__ = 0x4000; define symbol __size_cstack__ = 0x4000;
@ -31,5 +31,5 @@ do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec }; place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly }; place in ROM_region { readonly };
place in RAM_region { readwrite, block STACKHEAP }; place in SRAM2_region { readwrite, block STACKHEAP };
place in SRAM2_region { }; place in SRAM1_region { };