From 30907d7772613abd5c01b8bc04bc15d3f06111a5 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 23 Sep 2013 10:09:33 +0100 Subject: [PATCH 001/117] Refactor LPC1114 and LPC11C24 code Since most of the code for LPC1114 and LPC11C24 is similar, refactor the code structure to avoid duplication of the common code. --- .../cmsis/TARGET_NXP/TARGET_LPC11XX/LPC11xx.h | 602 ------------------ .../TOOLCHAIN_ARM_MICRO/LPC1114.sct | 16 - .../TOOLCHAIN_ARM_MICRO/sys.cpp | 31 - .../TOOLCHAIN_ARM_STD/LPC1114.sct | 14 - .../TARGET_LPC11XX/TOOLCHAIN_ARM_STD/sys.cpp | 31 - .../TOOLCHAIN_GCC_ARM/startup_LPC11xx.s | 213 ------- .../TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp | 161 ----- .../TOOLCHAIN_GCC_CS/startup_LPC11xx.s | 112 ---- .../TARGET_LPC11XX/TOOLCHAIN_GCC_CS/sys.cpp | 79 --- .../cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis.h | 13 - .../TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.c | 57 -- .../TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.h | 26 - .../TARGET_LPC11XX/system_LPC11xx.h | 64 -- .../LPC11xx.h | 0 .../TARGET_LPC11CXX/system_LPC11xx.c | 0 .../TARGET_LPC11XX/system_LPC11xx.c | 0 .../TARGET_LPC11CXX}/startup_LPC11xx.s | 0 .../TARGET_LPC11XX}/LPC1114.sct | 0 .../TARGET_LPC11XX}/startup_LPC11xx.s | 0 .../TOOLCHAIN_ARM_MICRO/sys.cpp | 0 .../TARGET_LPC11CXX}/startup_LPC11xx.s | 0 .../TARGET_LPC11XX}/LPC1114.sct | 0 .../TARGET_LPC11XX}/startup_LPC11xx.s | 0 .../TOOLCHAIN_ARM_STD/sys.cpp | 0 .../TARGET_LPC11CXX/LPC11C24.ld} | 0 .../TARGET_LPC11XX}/LPC1114.ld | 0 .../TOOLCHAIN_GCC_ARM/startup_LPC11xx.s | 0 .../TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp | 0 .../TOOLCHAIN_GCC_CS/startup_LPC11xx.s | 0 .../TOOLCHAIN_GCC_CS/sys.cpp | 0 .../cmsis.h | 0 .../cmsis_nvic.c | 0 .../cmsis_nvic.h | 0 .../system_LPC11xx.h | 0 .../hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c | 62 -- .../TARGET_NXP/TARGET_LPC11CXX/gpio_irq_api.c | 166 ----- .../hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c | 387 ----------- .../hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c | 214 ------- .../hal/TARGET_NXP/TARGET_LPC11XX/PortNames.h | 33 - .../TARGET_NXP/TARGET_LPC11XX/analogin_api.c | 123 ---- .../TARGET_NXP/TARGET_LPC11XX/gpio_object.h | 46 -- .../hal/TARGET_NXP/TARGET_LPC11XX/pinmap.c | 47 -- .../hal/TARGET_NXP/TARGET_LPC11XX/port_api.c | 78 --- .../TARGET_NXP/TARGET_LPC11XX/serial_api.c | 278 -------- .../hal/TARGET_NXP/TARGET_LPC11XX/sleep.c | 75 --- .../hal/TARGET_NXP/TARGET_LPC11XX/us_ticker.c | 62 -- .../PortNames.h | 0 .../TARGET_LPC11CXX/PeripheralNames.h | 0 .../TARGET_LPC11CXX/PinNames.h | 0 .../TARGET_LPC11CXX/README.md | 0 .../TARGET_LPC11CXX/adc_pinmap.h | 20 + .../TARGET_LPC11CXX/device.h | 0 .../TARGET_LPC11CXX/objects.h | 0 .../TARGET_LPC11CXX/pwmout_api.c | 0 .../TARGET_LPC11CXX/reserved_pins.h | 8 + .../TARGET_LPC11CXX/spi_pinmap.h | 34 + .../TARGET_LPC11XX/PeripheralNames.h | 0 .../TARGET_LPC11XX/PinNames.h | 0 .../TARGET_LPC11XX/README.md | 0 .../TARGET_LPC11XX/adc_pinmap.h | 20 + .../TARGET_LPC11XX/device.h | 0 .../TARGET_LPC11XX/objects.h | 0 .../TARGET_LPC11XX/pwmout_api.c | 0 .../TARGET_LPC11XX/reserved_pins.h | 8 + .../TARGET_LPC11XX/spi_pinmap.h | 33 + .../analogin_api.c | 15 +- .../gpio_api.c | 19 +- .../gpio_irq_api.c | 0 .../gpio_object.h | 0 .../i2c_api.c | 0 .../pinmap.c | 0 .../port_api.c | 0 .../serial_api.c | 0 .../sleep.c | 0 .../spi_api.c | 25 +- .../us_ticker.c | 0 workspace_tools/targets.py | 4 +- 77 files changed, 141 insertions(+), 3035 deletions(-) delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/LPC11xx.h delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/LPC1114.sct delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/sys.cpp delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/LPC1114.sct delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/sys.cpp delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/sys.cpp delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis.h delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.c delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.h delete mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.h rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/LPC11xx.h (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/system_LPC11xx.c (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/system_LPC11xx.c (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX}/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX}/LPC1114.sct (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX}/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_ARM_MICRO/sys.cpp (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX/TOOLCHAIN_ARM_STD => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX}/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX/TOOLCHAIN_ARM_STD => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX}/LPC1114.sct (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11XX/TOOLCHAIN_ARM_STD => TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX}/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_ARM_STD/sys.cpp (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX/TOOLCHAIN_GCC_ARM/LPC1114.ld => TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld} (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11XX/TOOLCHAIN_GCC_ARM => TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX}/LPC1114.ld (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_GCC_CS/startup_LPC11xx.s (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/TOOLCHAIN_GCC_CS/sys.cpp (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/cmsis.h (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/cmsis_nvic.c (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/cmsis_nvic.h (100%) rename libraries/mbed/targets/cmsis/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/system_LPC11xx.h (100%) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_irq_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PortNames.h delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/analogin_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_object.h delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pinmap.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/port_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/serial_api.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/sleep.c delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/us_ticker.c rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/PortNames.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/PeripheralNames.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/PinNames.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/README.md (100%) create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/device.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/objects.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11CXX/pwmout_api.c (100%) create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/reserved_pins.h create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/PeripheralNames.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/PinNames.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/README.md (100%) create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/device.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/objects.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{ => TARGET_LPC11XX_11CXX}/TARGET_LPC11XX/pwmout_api.c (100%) create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/reserved_pins.h create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/analogin_api.c (92%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11XX => TARGET_LPC11XX_11CXX}/gpio_api.c (86%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11XX => TARGET_LPC11XX_11CXX}/gpio_irq_api.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/gpio_object.h (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11XX => TARGET_LPC11XX_11CXX}/i2c_api.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/pinmap.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/port_api.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/serial_api.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/sleep.c (100%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11XX => TARGET_LPC11XX_11CXX}/spi_api.c (91%) rename libraries/mbed/targets/hal/TARGET_NXP/{TARGET_LPC11CXX => TARGET_LPC11XX_11CXX}/us_ticker.c (100%) diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/LPC11xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/LPC11xx.h deleted file mode 100644 index 3465e38f6e..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/LPC11xx.h +++ /dev/null @@ -1,602 +0,0 @@ -/**************************************************************************** - * $Id:: LPC11xx.h 9198 2012-05-29 usb00175 $ - * Project: NXP LPC11xx software example - * - * Description: - * CMSIS Cortex-M0 Core Peripheral Access Layer Header File for - * NXP LPC11xx Device Series - - **************************************************************************** - * Software that is described herein is for illustrative purposes only -* which provides customers with programming information regarding the -* products. This software is supplied "AS IS" without any warranties. -* NXP Semiconductors assumes no responsibility or liability for the -* use of the software, conveys no license or title under any patent, -* copyright, or mask work right to the product. NXP Semiconductors -* reserves the right to make changes in the software without -* notification. NXP Semiconductors also make no representation or -* warranty that such application will be suitable for the specified -* use without further testing or modification. - -* Permission to use, copy, modify, and distribute this software and its -* documentation is hereby granted, under NXP Semiconductors' -* relevant copyright in the software, without fee, provided that it -* is used in conjunction with NXP Semiconductors microcontrollers. This -* copyright, permission, and disclaimer notice must appear in all copies of -* this code. - -****************************************************************************/ -#ifndef __LPC11xx_H__ -#define __LPC11xx_H__ - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup LPC11xx_Definitions LPC11xx Definitions - This file defines all structures and symbols for LPC11xx: - - Registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions - @{ -*/ - - -/******************************************************************************/ -/* Processor and Core Peripherals */ -/******************************************************************************/ -/** @addtogroup LPC11xx_CMSIS LPC11xx CMSIS Definitions - Configuration of the Cortex-M0 Processor and Core Peripherals - @{ -*/ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ -typedef enum IRQn -{ -/****** Cortex-M0 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt */ - -/****** LPC11Cxx or LPC11xx Specific Interrupt Numbers *******************************************************/ - WAKEUP0_IRQn = 0, /*!< All I/O pins can be used as wakeup source. */ - WAKEUP1_IRQn = 1, /*!< There are 13 pins in total for LPC11xx */ - WAKEUP2_IRQn = 2, - WAKEUP3_IRQn = 3, - WAKEUP4_IRQn = 4, - WAKEUP5_IRQn = 5, - WAKEUP6_IRQn = 6, - WAKEUP7_IRQn = 7, - WAKEUP8_IRQn = 8, - WAKEUP9_IRQn = 9, - WAKEUP10_IRQn = 10, - WAKEUP11_IRQn = 11, - WAKEUP12_IRQn = 12, - CAN_IRQn = 13, /*!< CAN Interrupt */ - SSP1_IRQn = 14, /*!< SSP1 Interrupt */ - I2C_IRQn = 15, /*!< I2C Interrupt */ - TIMER_16_0_IRQn = 16, /*!< 16-bit Timer0 Interrupt */ - TIMER_16_1_IRQn = 17, /*!< 16-bit Timer1 Interrupt */ - TIMER_32_0_IRQn = 18, /*!< 32-bit Timer0 Interrupt */ - TIMER_32_1_IRQn = 19, /*!< 32-bit Timer1 Interrupt */ - SSP0_IRQn = 20, /*!< SSP0 Interrupt */ - UART_IRQn = 21, /*!< UART Interrupt */ - Reserved0_IRQn = 22, /*!< Reserved Interrupt */ - Reserved1_IRQn = 23, - ADC_IRQn = 24, /*!< A/D Converter Interrupt */ - WDT_IRQn = 25, /*!< Watchdog timer Interrupt */ - BOD_IRQn = 26, /*!< Brown Out Detect(BOD) Interrupt */ - FMC_IRQn = 27, /*!< Flash Memory Controller Interrupt */ - EINT3_IRQn = 28, /*!< External Interrupt 3 Interrupt */ - EINT2_IRQn = 29, /*!< External Interrupt 2 Interrupt */ - EINT1_IRQn = 30, /*!< External Interrupt 1 Interrupt */ - EINT0_IRQn = 31, /*!< External Interrupt 0 Interrupt */ -} IRQn_Type; - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M0 Processor and Core Peripherals */ -#define __MPU_PRESENT 0 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 2 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - -/*@}*/ /* end of group LPC11xx_CMSIS */ - - -#include "core_cm0.h" /* Cortex-M0 processor and core peripherals */ -#include "system_LPC11xx.h" /* System Header */ - - -/******************************************************************************/ -/* Device Specific Peripheral Registers structures */ -/******************************************************************************/ - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - -/*------------- System Control (SYSCON) --------------------------------------*/ -/** @addtogroup LPC11xx_SYSCON LPC11xx System Control Block - @{ -*/ -typedef struct -{ - __IO uint32_t SYSMEMREMAP; /*!< Offset: 0x000 System memory remap (R/W) */ - __IO uint32_t PRESETCTRL; /*!< Offset: 0x004 Peripheral reset control (R/W) */ - __IO uint32_t SYSPLLCTRL; /*!< Offset: 0x008 System PLL control (R/W) */ - __I uint32_t SYSPLLSTAT; /*!< Offset: 0x00C System PLL status (R/ ) */ - uint32_t RESERVED0[4]; - - __IO uint32_t SYSOSCCTRL; /*!< Offset: 0x020 System oscillator control (R/W) */ - __IO uint32_t WDTOSCCTRL; /*!< Offset: 0x024 Watchdog oscillator control (R/W) */ - __IO uint32_t IRCCTRL; /*!< Offset: 0x028 IRC control (R/W) */ - uint32_t RESERVED1[1]; - __IO uint32_t SYSRSTSTAT; /*!< Offset: 0x030 System reset status Register (R/ ) */ - uint32_t RESERVED2[3]; - __IO uint32_t SYSPLLCLKSEL; /*!< Offset: 0x040 System PLL clock source select (R/W) */ - __IO uint32_t SYSPLLCLKUEN; /*!< Offset: 0x044 System PLL clock source update enable (R/W) */ - uint32_t RESERVED3[10]; - - __IO uint32_t MAINCLKSEL; /*!< Offset: 0x070 Main clock source select (R/W) */ - __IO uint32_t MAINCLKUEN; /*!< Offset: 0x074 Main clock source update enable (R/W) */ - __IO uint32_t SYSAHBCLKDIV; /*!< Offset: 0x078 System AHB clock divider (R/W) */ - uint32_t RESERVED4[1]; - - __IO uint32_t SYSAHBCLKCTRL; /*!< Offset: 0x080 System AHB clock control (R/W) */ - uint32_t RESERVED5[4]; - __IO uint32_t SSP0CLKDIV; /*!< Offset: 0x094 SSP0 clock divider (R/W) */ - __IO uint32_t UARTCLKDIV; /*!< Offset: 0x098 UART clock divider (R/W) */ - __IO uint32_t SSP1CLKDIV; /*!< Offset: 0x09C SSP1 clock divider (R/W) */ - uint32_t RESERVED6[12]; - - __IO uint32_t WDTCLKSEL; /*!< Offset: 0x0D0 WDT clock source select (R/W) */ - __IO uint32_t WDTCLKUEN; /*!< Offset: 0x0D4 WDT clock source update enable (R/W) */ - __IO uint32_t WDTCLKDIV; /*!< Offset: 0x0D8 WDT clock divider (R/W) */ - uint32_t RESERVED8[1]; - __IO uint32_t CLKOUTCLKSEL; /*!< Offset: 0x0E0 CLKOUT clock source select (R/W) */ - __IO uint32_t CLKOUTUEN; /*!< Offset: 0x0E4 CLKOUT clock source update enable (R/W) */ - __IO uint32_t CLKOUTDIV; /*!< Offset: 0x0E8 CLKOUT clock divider (R/W) */ - uint32_t RESERVED9[5]; - - __IO uint32_t PIOPORCAP0; /*!< Offset: 0x100 POR captured PIO status 0 (R/ ) */ - __IO uint32_t PIOPORCAP1; /*!< Offset: 0x104 POR captured PIO status 1 (R/ ) */ - uint32_t RESERVED10[18]; - __IO uint32_t BODCTRL; /*!< Offset: 0x150 BOD control (R/W) */ - __IO uint32_t SYSTCKCAL; /*!< Offset: 0x154 System tick counter calibration (R/W) */ - - uint32_t RESERVED13[7]; - __IO uint32_t NMISRC; /*!< Offset: 0x174 NMI source selection register (R/W) */ - uint32_t RESERVED14[34]; - - __IO uint32_t STARTAPRP0; /*!< Offset: 0x200 Start logic edge control Register 0 (R/W) */ - __IO uint32_t STARTERP0; /*!< Offset: 0x204 Start logic signal enable Register 0 (R/W) */ - __O uint32_t STARTRSRP0CLR; /*!< Offset: 0x208 Start logic reset Register 0 ( /W) */ - __I uint32_t STARTSRP0; /*!< Offset: 0x20C Start logic status Register 0 (R/) */ - __IO uint32_t STARTAPRP1; /*!< Offset: 0x210 Start logic edge control Register 0 (R/W). (LPC11UXX only) */ - __IO uint32_t STARTERP1; /*!< Offset: 0x214 Start logic signal enable Register 0 (R/W). (LPC11UXX only) */ - __O uint32_t STARTRSRP1CLR; /*!< Offset: 0x218 Start logic reset Register 0 ( /W). (LPC11UXX only) */ - __IO uint32_t STARTSRP1; /*!< Offset: 0x21C Start logic status Register 0 (R/W). (LPC11UXX only) */ - uint32_t RESERVED17[4]; - - __IO uint32_t PDSLEEPCFG; /*!< Offset: 0x230 Power-down states in Deep-sleep mode (R/W) */ - __IO uint32_t PDAWAKECFG; /*!< Offset: 0x234 Power-down states after wake-up (R/W) */ - __IO uint32_t PDRUNCFG; /*!< Offset: 0x238 Power-down configuration Register (R/W) */ - uint32_t RESERVED15[110]; - __I uint32_t DEVICE_ID; /*!< Offset: 0x3F4 Device ID (R/ ) */ -} LPC_SYSCON_TypeDef; -/*@}*/ /* end of group LPC11xx_SYSCON */ - - -/*------------- Pin Connect Block (IOCON) --------------------------------*/ -/** @addtogroup LPC11xx_IOCON LPC11xx I/O Configuration Block - @{ -*/ -typedef struct -{ - __IO uint32_t PIO2_6; /*!< Offset: 0x000 I/O configuration for pin PIO2_6 (R/W) */ - uint32_t RESERVED0[1]; - __IO uint32_t PIO2_0; /*!< Offset: 0x008 I/O configuration for pin PIO2_0/DTR/SSEL1 (R/W) */ - __IO uint32_t RESET_PIO0_0; /*!< Offset: 0x00C I/O configuration for pin RESET/PIO0_0 (R/W) */ - __IO uint32_t PIO0_1; /*!< Offset: 0x010 I/O configuration for pin PIO0_1/CLKOUT/CT32B0_MAT2 (R/W) */ - __IO uint32_t PIO1_8; /*!< Offset: 0x014 I/O configuration for pin PIO1_8/CT16B1_CAP0 (R/W) */ - __IO uint32_t SSEL1_LOC; /*!< Offset: 0x018 IOCON SSEL1 location register (IOCON_SSEL1_LOC, address 0x4004 4018) */ - __IO uint32_t PIO0_2; /*!< Offset: 0x01C I/O configuration for pin PIO0_2/SSEL0/CT16B0_CAP0 (R/W) */ - - __IO uint32_t PIO2_7; /*!< Offset: 0x020 I/O configuration for pin PIO2_7 (R/W) */ - __IO uint32_t PIO2_8; /*!< Offset: 0x024 I/O configuration for pin PIO2_8 (R/W) */ - __IO uint32_t PIO2_1; /*!< Offset: 0x028 I/O configuration for pin PIO2_1/nDSR/SCK1 (R/W) */ - __IO uint32_t PIO0_3; /*!< Offset: 0x02C I/O configuration for pin PIO0_3 (R/W) */ - __IO uint32_t PIO0_4; /*!< Offset: 0x030 I/O configuration for pin PIO0_4/SCL (R/W) */ - __IO uint32_t PIO0_5; /*!< Offset: 0x034 I/O configuration for pin PIO0_5/SDA (R/W) */ - __IO uint32_t PIO1_9; /*!< Offset: 0x038 I/O configuration for pin PIO1_9/CT16B1_MAT0 (R/W) */ - __IO uint32_t PIO3_4; /*!< Offset: 0x03C I/O configuration for pin PIO3_4 (R/W) */ - - __IO uint32_t PIO2_4; /*!< Offset: 0x040 I/O configuration for pin PIO2_4 (R/W) */ - __IO uint32_t PIO2_5; /*!< Offset: 0x044 I/O configuration for pin PIO2_5 (R/W) */ - __IO uint32_t PIO3_5; /*!< Offset: 0x048 I/O configuration for pin PIO3_5 (R/W) */ - __IO uint32_t PIO0_6; /*!< Offset: 0x04C I/O configuration for pin PIO0_6/SCK0 (R/W) */ - __IO uint32_t PIO0_7; /*!< Offset: 0x050 I/O configuration for pin PIO0_7/nCTS (R/W) */ - __IO uint32_t PIO2_9; /*!< Offset: 0x054 I/O configuration for pin PIO2_9 (R/W) */ - __IO uint32_t PIO2_10; /*!< Offset: 0x058 I/O configuration for pin PIO2_10 (R/W) */ - __IO uint32_t PIO2_2; /*!< Offset: 0x05C I/O configuration for pin PIO2_2/DCD/MISO1 (R/W) */ - - __IO uint32_t PIO0_8; /*!< Offset: 0x060 I/O configuration for pin PIO0_8/MISO0/CT16B0_MAT0 (R/W) */ - __IO uint32_t PIO0_9; /*!< Offset: 0x064 I/O configuration for pin PIO0_9/MOSI0/CT16B0_MAT1 (R/W) */ - __IO uint32_t SWCLK_PIO0_10; /*!< Offset: 0x068 I/O configuration for pin SWCLK/PIO0_10/SCK0/CT16B0_MAT2 (R/W) */ - __IO uint32_t PIO1_10; /*!< Offset: 0x06C I/O configuration for pin PIO1_10/AD6/CT16B1_MAT1 (R/W) */ - __IO uint32_t PIO2_11; /*!< Offset: 0x070 I/O configuration for pin PIO2_11/SCK0 (R/W) */ - __IO uint32_t R_PIO0_11; /*!< Offset: 0x074 I/O configuration for pin TDI/PIO0_11/AD0/CT32B0_MAT3 (R/W) */ - __IO uint32_t R_PIO1_0; /*!< Offset: 0x078 I/O configuration for pin TMS/PIO1_0/AD1/CT32B1_CAP0 (R/W) */ - __IO uint32_t R_PIO1_1; /*!< Offset: 0x07C I/O configuration for pin TDO/PIO1_1/AD2/CT32B1_MAT0 (R/W) */ - - __IO uint32_t R_PIO1_2; /*!< Offset: 0x080 I/O configuration for pin nTRST/PIO1_2/AD3/CT32B1_MAT1 (R/W) */ - __IO uint32_t PIO3_0; /*!< Offset: 0x084 I/O configuration for pin PIO3_0/nDTR (R/W) */ - __IO uint32_t PIO3_1; /*!< Offset: 0x088 I/O configuration for pin PIO3_1/nDSR (R/W) */ - __IO uint32_t PIO2_3; /*!< Offset: 0x08C I/O configuration for pin PIO2_3/RI/MOSI1 (R/W) */ - __IO uint32_t SWDIO_PIO1_3; /*!< Offset: 0x090 I/O configuration for pin SWDIO/PIO1_3/AD4/CT32B1_MAT2 (R/W) */ - __IO uint32_t PIO1_4; /*!< Offset: 0x094 I/O configuration for pin PIO1_4/AD5/CT32B1_MAT3 (R/W) */ - __IO uint32_t PIO1_11; /*!< Offset: 0x098 I/O configuration for pin PIO1_11/AD7 (R/W) */ - __IO uint32_t PIO3_2; /*!< Offset: 0x09C I/O configuration for pin PIO3_2/nDCD (R/W) */ - - __IO uint32_t PIO1_5; /*!< Offset: 0x0A0 I/O configuration for pin PIO1_5/nRTS/CT32B0_CAP0 (R/W) */ - __IO uint32_t PIO1_6; /*!< Offset: 0x0A4 I/O configuration for pin PIO1_6/RXD/CT32B0_MAT0 (R/W) */ - __IO uint32_t PIO1_7; /*!< Offset: 0x0A8 I/O configuration for pin PIO1_7/TXD/CT32B0_MAT1 (R/W) */ - __IO uint32_t PIO3_3; /*!< Offset: 0x0AC I/O configuration for pin PIO3_3/nRI (R/W) */ - __IO uint32_t SCK_LOC; /*!< Offset: 0x0B0 SCK pin location select Register (R/W) */ - __IO uint32_t DSR_LOC; /*!< Offset: 0x0B4 DSR pin location select Register (R/W) */ - __IO uint32_t DCD_LOC; /*!< Offset: 0x0B8 DCD pin location select Register (R/W) */ - __IO uint32_t RI_LOC; /*!< Offset: 0x0BC RI pin location Register (R/W) */ - - __IO uint32_t CT16B0_CAP0_LOC; /*!< Offset: 0x0C0 IOCON CT16B0_CAP0 location register (IOCON_CT16B0_CAP0_LOC, address 0x4004 40C0) */ - __IO uint32_t SCK1_LOC; /*!< Offset: 0x0C4 IOCON SCK1 location register (IOCON_SCK1_LOC, address 0x4004 40C4) */ - __IO uint32_t MISO1_LOC; /*!< Offset: 0x0C8 IOCON MISO1 location register (IOCON_MISO1_LOC, address 0x4004 40C8) */ - __IO uint32_t MOSI1_LOC; /*!< Offset: 0x0CC IOCON MOSI1 location register (IOCON_MOSI1_LOC, address 0x4004 40CC) */ - __IO uint32_t CT32B0_CAP0_LOC; /*!< Offset: 0x0D0 IOCON CT32B0_CAP0 location register (IOCON_CT32B0_CAP0_LOC, address 0x4004 40D0) */ - __IO uint32_t RXD_LOC; /*!< Offset: 0x0D4 IOCON RXD location register (IOCON_RXD_LOC, address 0x4004 40D4) */ -} LPC_IOCON_TypeDef; -/*@}*/ /* end of group LPC11xx_IOCON */ - - -/*------------- Power Management Unit (PMU) --------------------------*/ -/** @addtogroup LPC11xx_PMU LPC11xx Power Management Unit - @{ -*/ -typedef struct -{ - __IO uint32_t PCON; /*!< Offset: 0x000 Power control Register (R/W) */ - __IO uint32_t GPREG0; /*!< Offset: 0x004 General purpose Register 0 (R/W) */ - __IO uint32_t GPREG1; /*!< Offset: 0x008 General purpose Register 1 (R/W) */ - __IO uint32_t GPREG2; /*!< Offset: 0x00C General purpose Register 2 (R/W) */ - __IO uint32_t GPREG3; /*!< Offset: 0x010 General purpose Register 3 (R/W) */ - __IO uint32_t GPREG4; /*!< Offset: 0x014 General purpose Register 4 (R/W) */ -} LPC_PMU_TypeDef; -/*@}*/ /* end of group LPC11xx_PMU */ - - - -// ------------------------------------------------------------------------------------------------ -// ----- FLASHCTRL ----- -// ------------------------------------------------------------------------------------------------ - -typedef struct { /*!< (@ 0x4003C000) FLASHCTRL Structure */ - __I uint32_t RESERVED0[4]; - __IO uint32_t FLASHCFG; /*!< (@ 0x4003C010) Flash memory access time configuration register */ - __I uint32_t RESERVED1[3]; - __IO uint32_t FMSSTART; /*!< (@ 0x4003C020) Signature start address register */ - __IO uint32_t FMSSTOP; /*!< (@ 0x4003C024) Signature stop-address register */ - __I uint32_t RESERVED2[1]; - __I uint32_t FMSW0; /*!< (@ 0x4003C02C) Word 0 [31:0] */ - __I uint32_t FMSW1; /*!< (@ 0x4003C030) Word 1 [63:32] */ - __I uint32_t FMSW2; /*!< (@ 0x4003C034) Word 2 [95:64] */ - __I uint32_t FMSW3; /*!< (@ 0x4003C038) Word 3 [127:96] */ - __I uint32_t RESERVED3[1001]; - __I uint32_t FMSTAT; /*!< (@ 0x4003CFE0) Signature generation status register */ - __I uint32_t RESERVED4[1]; - __IO uint32_t FMSTATCLR; /*!< (@ 0x4003CFE8) Signature generation status clear register */ -} LPC_FLASHCTRL_Type; - - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -/** @addtogroup LPC11xx_GPIO LPC11xx General Purpose Input/Output - @{ -*/ -typedef struct -{ - union { - __IO uint32_t MASKED_ACCESS[4096]; /*!< Offset: 0x0000 to 0x3FFC Port data Register for pins PIOn_0 to PIOn_11 (R/W) */ - struct { - uint32_t RESERVED0[4095]; - __IO uint32_t DATA; /*!< Offset: 0x3FFC Port data Register (R/W) */ - }; - }; - uint32_t RESERVED1[4096]; - __IO uint32_t DIR; /*!< Offset: 0x8000 Data direction Register (R/W) */ - __IO uint32_t IS; /*!< Offset: 0x8004 Interrupt sense Register (R/W) */ - __IO uint32_t IBE; /*!< Offset: 0x8008 Interrupt both edges Register (R/W) */ - __IO uint32_t IEV; /*!< Offset: 0x800C Interrupt event Register (R/W) */ - __IO uint32_t IE; /*!< Offset: 0x8010 Interrupt mask Register (R/W) */ - __I uint32_t RIS; /*!< Offset: 0x8014 Raw interrupt status Register (R/ ) */ - __I uint32_t MIS; /*!< Offset: 0x8018 Masked interrupt status Register (R/ ) */ - __O uint32_t IC; /*!< Offset: 0x801C Interrupt clear Register (/W) */ -} LPC_GPIO_TypeDef; -/*@}*/ /* end of group LPC11xx_GPIO */ - -/*------------- Timer (TMR) --------------------------------------------------*/ -/** @addtogroup LPC11xx_TMR LPC11xx 16/32-bit Counter/Timer - @{ -*/ -typedef struct -{ - __IO uint32_t IR; /*!< Offset: 0x000 Interrupt Register (R/W) */ - __IO uint32_t TCR; /*!< Offset: 0x004 Timer Control Register (R/W) */ - __IO uint32_t TC; /*!< Offset: 0x008 Timer Counter Register (R/W) */ - __IO uint32_t PR; /*!< Offset: 0x00C Prescale Register (R/W) */ - __IO uint32_t PC; /*!< Offset: 0x010 Prescale Counter Register (R/W) */ - __IO uint32_t MCR; /*!< Offset: 0x014 Match Control Register (R/W) */ - union { - __IO uint32_t MR[4]; /*!< Offset: Match Register base */ - struct{ - __IO uint32_t MR0; /*!< Offset: 0x018 Match Register 0 (R/W) */ - __IO uint32_t MR1; /*!< Offset: 0x01C Match Register 1 (R/W) */ - __IO uint32_t MR2; /*!< Offset: 0x020 Match Register 2 (R/W) */ - __IO uint32_t MR3; /*!< Offset: 0x024 Match Register 3 (R/W) */ - }; - }; - __IO uint32_t CCR; /*!< Offset: 0x028 Capture Control Register (R/W) */ - __I uint32_t CR0; /*!< Offset: 0x02C Capture Register 0 (R/ ) */ - __I uint32_t CR1; /*!< Offset: 0x030 Capture Register 1 (R/ ) */ - uint32_t RESERVED1[2]; - __IO uint32_t EMR; /*!< Offset: 0x03C External Match Register (R/W) */ - uint32_t RESERVED2[12]; - __IO uint32_t CTCR; /*!< Offset: 0x070 Count Control Register (R/W) */ - __IO uint32_t PWMC; /*!< Offset: 0x074 PWM Control Register (R/W) */ -} LPC_TMR_TypeDef; -/*@}*/ /* end of group LPC11xx_TMR */ - - -/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ -/** @addtogroup LPC11xx_UART LPC11xx Universal Asynchronous Receiver/Transmitter - @{ -*/ -typedef struct -{ - union { - __I uint32_t RBR; /*!< Offset: 0x000 Receiver Buffer Register (R/ ) */ - __O uint32_t THR; /*!< Offset: 0x000 Transmit Holding Register ( /W) */ - __IO uint32_t DLL; /*!< Offset: 0x000 Divisor Latch LSB (R/W) */ - }; - union { - __IO uint32_t DLM; /*!< Offset: 0x004 Divisor Latch MSB (R/W) */ - __IO uint32_t IER; /*!< Offset: 0x000 Interrupt Enable Register (R/W) */ - }; - union { - __I uint32_t IIR; /*!< Offset: 0x008 Interrupt ID Register (R/ ) */ - __O uint32_t FCR; /*!< Offset: 0x008 FIFO Control Register ( /W) */ - }; - __IO uint32_t LCR; /*!< Offset: 0x00C Line Control Register (R/W) */ - __IO uint32_t MCR; /*!< Offset: 0x010 Modem control Register (R/W) */ - __I uint32_t LSR; /*!< Offset: 0x014 Line Status Register (R/ ) */ - __I uint32_t MSR; /*!< Offset: 0x018 Modem status Register (R/ ) */ - __IO uint32_t SCR; /*!< Offset: 0x01C Scratch Pad Register (R/W) */ - __IO uint32_t ACR; /*!< Offset: 0x020 Auto-baud Control Register (R/W) */ - uint32_t RESERVED0; - __IO uint32_t FDR; /*!< Offset: 0x028 Fractional Divider Register (R/W) */ - uint32_t RESERVED1; - __IO uint32_t TER; /*!< Offset: 0x030 Transmit Enable Register (R/W) */ - uint32_t RESERVED2[6]; - __IO uint32_t RS485CTRL; /*!< Offset: 0x04C RS-485/EIA-485 Control Register (R/W) */ - __IO uint32_t ADRMATCH; /*!< Offset: 0x050 RS-485/EIA-485 address match Register (R/W) */ - __IO uint32_t RS485DLY; /*!< Offset: 0x054 RS-485/EIA-485 direction control delay Register (R/W) */ - __I uint32_t FIFOLVL; /*!< Offset: 0x058 FIFO Level Register (R) */ -} LPC_UART_TypeDef; -/*@}*/ /* end of group LPC11xx_UART */ - - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -/** @addtogroup LPC11xx_SSP LPC11xx Synchronous Serial Port - @{ -*/ -typedef struct -{ - __IO uint32_t CR0; /*!< Offset: 0x000 Control Register 0 (R/W) */ - __IO uint32_t CR1; /*!< Offset: 0x004 Control Register 1 (R/W) */ - __IO uint32_t DR; /*!< Offset: 0x008 Data Register (R/W) */ - __I uint32_t SR; /*!< Offset: 0x00C Status Registe (R/ ) */ - __IO uint32_t CPSR; /*!< Offset: 0x010 Clock Prescale Register (R/W) */ - __IO uint32_t IMSC; /*!< Offset: 0x014 Interrupt Mask Set and Clear Register (R/W) */ - __I uint32_t RIS; /*!< Offset: 0x018 Raw Interrupt Status Register (R/) */ - __I uint32_t MIS; /*!< Offset: 0x01C Masked Interrupt Status Register (R/) */ - __O uint32_t ICR; /*!< Offset: 0x020 SSPICR Interrupt Clear Register (/W) */ -} LPC_SSP_TypeDef; -/*@}*/ /* end of group LPC11xx_SSP */ - - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -/** @addtogroup LPC11xx_I2C LPC11xx I2C-Bus Interface - @{ -*/ -typedef struct -{ - __IO uint32_t CONSET; /*!< Offset: 0x000 I2C Control Set Register (R/W) */ - __I uint32_t STAT; /*!< Offset: 0x004 I2C Status Register (R/ ) */ - __IO uint32_t DAT; /*!< Offset: 0x008 I2C Data Register (R/W) */ - __IO uint32_t ADR0; /*!< Offset: 0x00C I2C Slave Address Register 0 (R/W) */ - __IO uint32_t SCLH; /*!< Offset: 0x010 SCH Duty Cycle Register High Half Word (R/W) */ - __IO uint32_t SCLL; /*!< Offset: 0x014 SCL Duty Cycle Register Low Half Word (R/W) */ - __O uint32_t CONCLR; /*!< Offset: 0x018 I2C Control Clear Register ( /W) */ - __IO uint32_t MMCTRL; /*!< Offset: 0x01C Monitor mode control register (R/W) */ - __IO uint32_t ADR1; /*!< Offset: 0x020 I2C Slave Address Register 1 (R/W) */ - __IO uint32_t ADR2; /*!< Offset: 0x024 I2C Slave Address Register 2 (R/W) */ - __IO uint32_t ADR3; /*!< Offset: 0x028 I2C Slave Address Register 3 (R/W) */ - __I uint32_t DATA_BUFFER; /*!< Offset: 0x02C Data buffer register ( /W) */ - __IO uint32_t MASK0; /*!< Offset: 0x030 I2C Slave address mask register 0 (R/W) */ - __IO uint32_t MASK1; /*!< Offset: 0x034 I2C Slave address mask register 1 (R/W) */ - __IO uint32_t MASK2; /*!< Offset: 0x038 I2C Slave address mask register 2 (R/W) */ - __IO uint32_t MASK3; /*!< Offset: 0x03C I2C Slave address mask register 3 (R/W) */ -} LPC_I2C_TypeDef; -/*@}*/ /* end of group LPC11xx_I2C */ - - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -/** @addtogroup LPC11xx_WDT LPC11xx WatchDog Timer - @{ -*/ -typedef struct -{ - __IO uint32_t MOD; /*!< Offset: 0x000 Watchdog mode register (R/W) */ - __IO uint32_t TC; /*!< Offset: 0x004 Watchdog timer constant register (R/W) */ - __O uint32_t FEED; /*!< Offset: 0x008 Watchdog feed sequence register (W) */ - __I uint32_t TV; /*!< Offset: 0x00C Watchdog timer value register (R) */ - uint32_t RESERVED0; - __IO uint32_t WARNINT; /*!< Offset: 0x014 Watchdog timer warning int. register (R/W) */ - __IO uint32_t WINDOW; /*!< Offset: 0x018 Watchdog timer window value register (R/W) */ -} LPC_WDT_TypeDef; -/*@}*/ /* end of group LPC11xx_WDT */ - - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -/** @addtogroup LPC11xx_ADC LPC11xx Analog-to-Digital Converter - @{ -*/ -typedef struct -{ - __IO uint32_t CR; /*!< Offset: 0x000 A/D Control Register (R/W) */ - __IO uint32_t GDR; /*!< Offset: 0x004 A/D Global Data Register (R/W) */ - uint32_t RESERVED0; - __IO uint32_t INTEN; /*!< Offset: 0x00C A/D Interrupt Enable Register (R/W) */ - __IO uint32_t DR[8]; /*!< Offset: 0x010-0x02C A/D Channel 0..7 Data Register (R/W) */ - __I uint32_t STAT; /*!< Offset: 0x030 A/D Status Register (R/ ) */ -} LPC_ADC_TypeDef; -/*@}*/ /* end of group LPC11xx_ADC */ - - -/*------------- CAN Controller (CAN) ----------------------------*/ -/** @addtogroup LPC11xx_CAN LPC11xx Controller Area Network(CAN) - @{ -*/ -typedef struct -{ - __IO uint32_t CNTL; /* 0x000 */ - __IO uint32_t STAT; - __IO uint32_t EC; - __IO uint32_t BT; - __IO uint32_t INT; - __IO uint32_t TEST; - __IO uint32_t BRPE; - uint32_t RESERVED0; - __IO uint32_t IF1_CMDREQ; /* 0x020 */ - __IO uint32_t IF1_CMDMSK; - __IO uint32_t IF1_MSK1; - __IO uint32_t IF1_MSK2; - __IO uint32_t IF1_ARB1; - __IO uint32_t IF1_ARB2; - __IO uint32_t IF1_MCTRL; - __IO uint32_t IF1_DA1; - __IO uint32_t IF1_DA2; - __IO uint32_t IF1_DB1; - __IO uint32_t IF1_DB2; - uint32_t RESERVED1[13]; - __IO uint32_t IF2_CMDREQ; /* 0x080 */ - __IO uint32_t IF2_CMDMSK; - __IO uint32_t IF2_MSK1; - __IO uint32_t IF2_MSK2; - __IO uint32_t IF2_ARB1; - __IO uint32_t IF2_ARB2; - __IO uint32_t IF2_MCTRL; - __IO uint32_t IF2_DA1; - __IO uint32_t IF2_DA2; - __IO uint32_t IF2_DB1; - __IO uint32_t IF2_DB2; - uint32_t RESERVED2[21]; - __I uint32_t TXREQ1; /* 0x100 */ - __I uint32_t TXREQ2; - uint32_t RESERVED3[6]; - __I uint32_t ND1; /* 0x120 */ - __I uint32_t ND2; - uint32_t RESERVED4[6]; - __I uint32_t IR1; /* 0x140 */ - __I uint32_t IR2; - uint32_t RESERVED5[6]; - __I uint32_t MSGV1; /* 0x160 */ - __I uint32_t MSGV2; - uint32_t RESERVED6[6]; - __IO uint32_t CLKDIV; /* 0x180 */ -} LPC_CAN_TypeDef; -/*@}*/ /* end of group LPC11xx_CAN */ - -#if defined ( __CC_ARM ) -#pragma no_anon_unions -#endif - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define LPC_FLASH_BASE (0x00000000UL) -#define LPC_RAM_BASE (0x10000000UL) -#define LPC_APB0_BASE (0x40000000UL) -#define LPC_AHB_BASE (0x50000000UL) - -/* APB0 peripherals */ -#define LPC_I2C_BASE (LPC_APB0_BASE + 0x00000) -#define LPC_WDT_BASE (LPC_APB0_BASE + 0x04000) -#define LPC_UART_BASE (LPC_APB0_BASE + 0x08000) -#define LPC_CT16B0_BASE (LPC_APB0_BASE + 0x0C000) -#define LPC_CT16B1_BASE (LPC_APB0_BASE + 0x10000) -#define LPC_CT32B0_BASE (LPC_APB0_BASE + 0x14000) -#define LPC_CT32B1_BASE (LPC_APB0_BASE + 0x18000) -#define LPC_ADC_BASE (LPC_APB0_BASE + 0x1C000) -#define LPC_PMU_BASE (LPC_APB0_BASE + 0x38000) -#define LPC_FLASHCTRL_BASE (LPC_APB0_BASE + 0x3C000) -#define LPC_SSP0_BASE (LPC_APB0_BASE + 0x40000) -#define LPC_IOCON_BASE (LPC_APB0_BASE + 0x44000) -#define LPC_SYSCON_BASE (LPC_APB0_BASE + 0x48000) -#define LPC_CAN_BASE (LPC_APB0_BASE + 0x50000) -#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x58000) - -/* AHB peripherals */ -#define LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000) -#define LPC_GPIO0_BASE (LPC_AHB_BASE + 0x00000) -#define LPC_GPIO1_BASE (LPC_AHB_BASE + 0x10000) -#define LPC_GPIO2_BASE (LPC_AHB_BASE + 0x20000) -#define LPC_GPIO3_BASE (LPC_AHB_BASE + 0x30000) - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define LPC_I2C ((LPC_I2C_TypeDef *) LPC_I2C_BASE ) -#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE ) -#define LPC_UART ((LPC_UART_TypeDef *) LPC_UART_BASE ) -#define LPC_TMR16B0 ((LPC_TMR_TypeDef *) LPC_CT16B0_BASE) -#define LPC_TMR16B1 ((LPC_TMR_TypeDef *) LPC_CT16B1_BASE) -#define LPC_TMR32B0 ((LPC_TMR_TypeDef *) LPC_CT32B0_BASE) -#define LPC_TMR32B1 ((LPC_TMR_TypeDef *) LPC_CT32B1_BASE) -#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE ) -#define LPC_PMU ((LPC_PMU_TypeDef *) LPC_PMU_BASE ) -#define LPC_FLASHCTRL ((LPC_FLASHCTRL_Type *) LPC_FLASHCTRL_BASE) -#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE ) -#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE ) -#define LPC_CAN ((LPC_CAN_TypeDef *) LPC_CAN_BASE ) -#define LPC_IOCON ((LPC_IOCON_TypeDef *) LPC_IOCON_BASE ) -#define LPC_SYSCON ((LPC_SYSCON_TypeDef *) LPC_SYSCON_BASE) -#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) -#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) -#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) -#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) - -#ifdef __cplusplus -} -#endif - -#endif /* __LPC11xx_H__ */ diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/LPC1114.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/LPC1114.sct deleted file mode 100644 index 44850e6a94..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/LPC1114.sct +++ /dev/null @@ -1,16 +0,0 @@ - -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - - ER_IROM1 0x00000000 0x8000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - ; 48 vectors * 4 bytes = 0xC0 for remap - RW_IRAM1 (0x10000000+0xC0) (0x1000-0xC0) { - .ANY (+RW +ZI) - } - -} - diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/sys.cpp deleted file mode 100644 index 2f1024ace8..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/sys.cpp +++ /dev/null @@ -1,31 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Copyright (C) 2009-2011 ARM Limited. All rights reserved. - * - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -extern char Image$$RW_IRAM1$$ZI$$Limit[]; - -extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; - uint32_t sp_limit = __current_sp(); - - zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned - - struct __initial_stackheap r; - r.heap_base = zi_limit; - r.heap_limit = sp_limit; - return r; -} - -#ifdef __cplusplus -} -#endif diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/LPC1114.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/LPC1114.sct deleted file mode 100644 index 0a7772d0c3..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/LPC1114.sct +++ /dev/null @@ -1,14 +0,0 @@ - -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0xF40 - RW_IRAM1 0x100000C0 0xF40 { - .ANY (+RW +ZI) - } -} - diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/sys.cpp deleted file mode 100644 index 2f1024ace8..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/sys.cpp +++ /dev/null @@ -1,31 +0,0 @@ -/* mbed Microcontroller Library - stackheap - * Copyright (C) 2009-2011 ARM Limited. All rights reserved. - * - * Setup a fixed single stack/heap memory model, - * between the top of the RW/ZI region and the stackpointer - */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include - -extern char Image$$RW_IRAM1$$ZI$$Limit[]; - -extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { - uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; - uint32_t sp_limit = __current_sp(); - - zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned - - struct __initial_stackheap r; - r.heap_base = zi_limit; - r.heap_limit = sp_limit; - return r; -} - -#ifdef __cplusplus -} -#endif diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s deleted file mode 100644 index 3ffdd07e58..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s +++ /dev/null @@ -1,213 +0,0 @@ -/* File: startup_ARMCM0.S - * Purpose: startup file for Cortex-M0 devices. Should use with - * GCC for ARM Embedded Processors - * Version: V1.2 - * Date: 15 Nov 2011 - * - * Copyright (c) 2011, ARM Limited - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - * Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - * Neither the name of the ARM Limited nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - .syntax unified - .arch armv6-m - -/* Memory Model - The HEAP starts at the end of the DATA section and grows upward. - - The STACK starts at the end of the RAM and grows downward. - - The HEAP and stack STACK are only checked at compile time: - (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE - - This is just a check for the bare minimum for the Heap+Stack area before - aborting compilation, it is not the run time limit: - Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100 - */ - .section .stack - .align 3 -#ifdef __STACK_SIZE - .equ Stack_Size, __STACK_SIZE -#else - .equ Stack_Size, 0x80 -#endif - .globl __StackTop - .globl __StackLimit -__StackLimit: - .space Stack_Size - .size __StackLimit, . - __StackLimit -__StackTop: - .size __StackTop, . - __StackTop - - .section .heap - .align 3 -#ifdef __HEAP_SIZE - .equ Heap_Size, __HEAP_SIZE -#else - .equ Heap_Size, 0x80 -#endif - .globl __HeapBase - .globl __HeapLimit -__HeapBase: - .space Heap_Size - .size __HeapBase, . - __HeapBase -__HeapLimit: - .size __HeapLimit, . - __HeapLimit - - .section .isr_vector - .align 2 - .globl __isr_vector -__isr_vector: - .long __StackTop /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - -/* LPC11xx interrupts */ - .long WAKEUP_IRQHandler /* 16 0 Wake-up on pin PIO0_0 */ - .long WAKEUP_IRQHandler /* 17 1 Wake-up on pin PIO0_1 */ - .long WAKEUP_IRQHandler /* 18 2 Wake-up on pin PIO0_2 */ - .long WAKEUP_IRQHandler /* 19 3 Wake-up on pin PIO0_3 */ - .long WAKEUP_IRQHandler /* 20 4 Wake-up on pin PIO0_4 */ - .long WAKEUP_IRQHandler /* 21 5 Wake-up on pin PIO0_5 */ - .long WAKEUP_IRQHandler /* 22 6 Wake-up on pin PIO0_6 */ - .long WAKEUP_IRQHandler /* 23 7 Wake-up on pin PIO0_7 */ - .long WAKEUP_IRQHandler /* 24 8 Wake-up on pin PIO0_8 */ - .long WAKEUP_IRQHandler /* 25 9 Wake-up on pin PIO0_9 */ - .long WAKEUP_IRQHandler /* 26 10 Wake-up on pin PIO0_10 */ - .long WAKEUP_IRQHandler /* 27 11 Wake-up on pin PIO0_11 */ - .long WAKEUP_IRQHandler /* 28 12 Wake-up on pin PIO1_0 */ - .long Default_Handler /* 29 13 */ - .long SSP1_IRQHandler /* 30 14 SSP1 */ - .long I2C_IRQHandler /* 31 15 I2C0 SI (state change) */ - .long TIMER16_0_IRQHandler /* 32 16 CT16B0 16 bit timer 0 */ - .long TIMER16_1_IRQHandler /* 33 17 CT16B1 16 bit timer 1 */ - .long TIMER32_0_IRQHandler /* 34 18 CT32B0 32 bit timer 0 */ - .long TIMER32_1_IRQHandler /* 35 19 CT32B1 32 bit timer 1 */ - .long SSP0_IRQHandler /* 36 20 SSP */ - .long UART_IRQHandler /* 37 21 UART */ - .long Default_Handler /* 38 22 */ - .long Default_Handler /* 39 23 */ - .long ADC_IRQHandler /* 40 24 ADC end of conversion */ - .long WDT_IRQHandler /* 41 25 Watchdog interrupt (WDINT) */ - .long BOD_IRQHandler /* 42 26 BOD Brown-out detect */ - .long Default_Handler /* 43 27 */ - .long PIOINT3_IRQHandler /* 44 28 PIO_3 GPIO interrupt status of port 3 */ - .long PIOINT2_IRQHandler /* 45 29 PIO_2 GPIO interrupt status of port 2 */ - .long PIOINT1_IRQHandler /* 46 30 PIO_1 GPIO interrupt status of port 1 */ - .long PIOINT0_IRQHandler /* 47 31 PIO_0 GPIO interrupt status of port 0 */ - - .size __isr_vector, . - __isr_vector - - .section .text.Reset_Handler - .thumb - .thumb_func - .align 2 - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: -/* Loop to copy data from read only memory to RAM. The ranges - * of copy from/to are specified by following symbols evaluated in - * linker script. - * __etext: End of code section, i.e., begin of data sections to copy from. - * __data_start__/__data_end__: RAM address range that data should be - * copied to. Both must be aligned to 4 bytes boundary. */ - - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - - subs r3, r2 - ble .flash_to_ram_loop_end - - movs r4, 0 -.flash_to_ram_loop: - ldr r0, [r1,r4] - str r0, [r2,r4] - adds r4, 4 - cmp r4, r3 - blt .flash_to_ram_loop -.flash_to_ram_loop_end: - - ldr r0, =SystemInit - blx r0 - ldr r0, =_start - bx r0 - .pool - .size Reset_Handler, . - Reset_Handler - - .text -/* Macro to define default handlers. Default handler - * will be weak symbol and just dead loops. They can be - * overwritten by other handlers */ - .macro def_default_handler handler_name - .align 1 - .thumb_func - .weak \handler_name - .type \handler_name, %function -\handler_name : - b . - .size \handler_name, . - \handler_name - .endm - - def_default_handler NMI_Handler - def_default_handler HardFault_Handler - def_default_handler SVC_Handler - def_default_handler PendSV_Handler - def_default_handler SysTick_Handler - def_default_handler Default_Handler - - def_default_handler WAKEUP_IRQHandler - def_default_handler SSP1_IRQHandler - def_default_handler I2C_IRQHandler - def_default_handler TIMER16_0_IRQHandler - def_default_handler TIMER16_1_IRQHandler - def_default_handler TIMER32_0_IRQHandler - def_default_handler TIMER32_1_IRQHandler - def_default_handler SSP0_IRQHandler - def_default_handler UART_IRQHandler - def_default_handler ADC_IRQHandler - def_default_handler WDT_IRQHandler - def_default_handler BOD_IRQHandler - def_default_handler PIOINT3_IRQHandler - def_default_handler PIOINT2_IRQHandler - def_default_handler PIOINT1_IRQHandler - def_default_handler PIOINT0_IRQHandler - - .weak DEF_IRQHandler - .set DEF_IRQHandler, Default_Handler - - .end - diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp deleted file mode 100644 index ffcb738df4..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp +++ /dev/null @@ -1,161 +0,0 @@ -extern "C" { - -#include "LPC11Uxx.h" - -#define WEAK __attribute__ ((weak)) -#define ALIAS(f) __attribute__ ((weak, alias (#f))) -#define AFTER_VECTORS __attribute__ ((section(".after_vectors"))) - - void ResetISR (void); -WEAK void NMI_Handler (void); -WEAK void HardFault_Handler (void); -WEAK void SVCall_Handler (void); -WEAK void PendSV_Handler (void); -WEAK void SysTick_Handler (void); -WEAK void IntDefaultHandler (void); - void FLEX_INT0_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT1_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT2_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT3_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT4_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT5_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT6_IRQHandler(void) ALIAS(IntDefaultHandler); - void FLEX_INT7_IRQHandler(void) ALIAS(IntDefaultHandler); - void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler); - void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler); - void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler); - void I2C_IRQHandler (void) ALIAS(IntDefaultHandler); - void TIMER16_0_IRQHandler(void) ALIAS(IntDefaultHandler); - void TIMER16_1_IRQHandler(void) ALIAS(IntDefaultHandler); - void TIMER32_0_IRQHandler(void) ALIAS(IntDefaultHandler); - void TIMER32_1_IRQHandler(void) ALIAS(IntDefaultHandler); - void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler); - void UART_IRQHandler (void) ALIAS(IntDefaultHandler); - void USB_IRQHandler (void) ALIAS(IntDefaultHandler); - void USB_FIQHandler (void) ALIAS(IntDefaultHandler); - void ADC_IRQHandler (void) ALIAS(IntDefaultHandler); - void WDT_IRQHandler (void) ALIAS(IntDefaultHandler); - void BOD_IRQHandler (void) ALIAS(IntDefaultHandler); - void FMC_IRQHandler (void) ALIAS(IntDefaultHandler); - void USBWakeup_IRQHandler(void) ALIAS(IntDefaultHandler); - -extern void __libc_init_array(void); -extern int main(void); -extern void _vStackTop(void); - -extern void (* const g_pfnVectors[])(void); -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = { - &_vStackTop, - ResetISR, - NMI_Handler, - HardFault_Handler, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - SVCall_Handler, - 0, - 0, - PendSV_Handler, - SysTick_Handler, - FLEX_INT0_IRQHandler, - FLEX_INT1_IRQHandler, - FLEX_INT2_IRQHandler, - FLEX_INT3_IRQHandler, - FLEX_INT4_IRQHandler, - FLEX_INT5_IRQHandler, - FLEX_INT6_IRQHandler, - FLEX_INT7_IRQHandler, - GINT0_IRQHandler, - GINT1_IRQHandler, - 0, - 0, - 0, - 0, - SSP1_IRQHandler, - I2C_IRQHandler, - TIMER16_0_IRQHandler, - TIMER16_1_IRQHandler, - TIMER32_0_IRQHandler, - TIMER32_1_IRQHandler, - SSP0_IRQHandler, - UART_IRQHandler, - USB_IRQHandler, - USB_FIQHandler, - ADC_IRQHandler, - WDT_IRQHandler, - BOD_IRQHandler, - FMC_IRQHandler, - 0, - 0, - USBWakeup_IRQHandler, - 0, -}; - -AFTER_VECTORS void data_init(unsigned int romstart, unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int *pulSrc = (unsigned int*) romstart; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = *pulSrc++; -} - -AFTER_VECTORS void bss_init(unsigned int start, unsigned int len) { - unsigned int *pulDest = (unsigned int*) start; - unsigned int loop; - for (loop = 0; loop < len; loop = loop + 4) *pulDest++ = 0; -} - -extern unsigned int __data_section_table; -extern unsigned int __data_section_table_end; -extern unsigned int __bss_section_table_end; - -AFTER_VECTORS void ResetISR(void) { - unsigned int LoadAddr, ExeAddr, SectionLen; - unsigned int *SectionTableAddr; - - // Data Init - SectionTableAddr = &__data_section_table; - while (SectionTableAddr < &__data_section_table_end) { - LoadAddr = *SectionTableAddr++; - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - data_init(LoadAddr, ExeAddr, SectionLen); - } - - // BSS Init - while (SectionTableAddr < &__bss_section_table_end) { - ExeAddr = *SectionTableAddr++; - SectionLen = *SectionTableAddr++; - bss_init(ExeAddr, SectionLen); - } - - SystemInit(); - __libc_init_array(); - main(); - while (1) {;} -} - -AFTER_VECTORS void NMI_Handler (void) {while(1){}} -AFTER_VECTORS void HardFault_Handler(void) {while(1){}} -AFTER_VECTORS void SVCall_Handler (void) {while(1){}} -AFTER_VECTORS void PendSV_Handler (void) {while(1){}} -AFTER_VECTORS void SysTick_Handler (void) {while(1){}} -AFTER_VECTORS void IntDefaultHandler(void) {while(1){}} - -#include - -void *operator new (size_t size) {return malloc(size);} -void *operator new[](size_t size) {return malloc(size);} - -void operator delete (void *p) {free(p);} -void operator delete[](void *p) {free(p);} - -int __aeabi_atexit(void *object, void (*destructor)(void *), void *dso_handle) { - return 0; -} - -} diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s deleted file mode 100644 index cc8ab7bc24..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s +++ /dev/null @@ -1,112 +0,0 @@ - .equ Stack_Size, 0x80 - .section ".stack", "w" - .align 3 - .globl __cs3_stack_mem - .globl __cs3_stack_size -__cs3_stack_mem: - .if Stack_Size - .space Stack_Size - .endif - .size __cs3_stack_mem, . - __cs3_stack_mem - .set __cs3_stack_size, . - __cs3_stack_mem - - .equ Heap_Size, 0x80 - .section ".heap", "w" - .align 3 - .globl __cs3_heap_start - .globl __cs3_heap_end -__cs3_heap_start: - .if Heap_Size - .space Heap_Size - .endif -__cs3_heap_end: - - .section ".cs3.interrupt_vector" - .globl __cs3_interrupt_vector_cortex_m - .type __cs3_interrupt_vector_cortex_m, %object - -__cs3_interrupt_vector_cortex_m: - .long __cs3_stack - .long __cs3_reset - .long NMI_Handler - .long HardFault_Handler - .long 0 - .long 0 - .long 0 - .long 0 - .long 0 - .long 0 - .long 0 - .long SVC_Handler - .long 0 - .long 0 - .long PendSV_Handler - .long SysTick_Handler - - .long DEF_IRQHandler - - .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m - - .thumb - - .section .cs3.reset,"x",%progbits - .thumb_func - .globl __cs3_reset_cortex_m - .type __cs3_reset_cortex_m, %function -__cs3_reset_cortex_m: - .fnstart - LDR R0, =SystemInit - BLX R0 - LDR R0,=__cs3_start_c - BX R0 - .pool - .cantunwind - .fnend - .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m - - .section ".text" - - .weak NMI_Handler - .type NMI_Handler, %function -NMI_Handler: - B . - .size NMI_Handler, . - NMI_Handler - - .weak HardFault_Handler - .type HardFault_Handler, %function -HardFault_Handler: - B . - .size HardFault_Handler, . - HardFault_Handler - - .weak SVC_Handler - .type SVC_Handler, %function -SVC_Handler: - B . - .size SVC_Handler, . - SVC_Handler - - .weak PendSV_Handler - .type PendSV_Handler, %function -PendSV_Handler: - B . - .size PendSV_Handler, . - PendSV_Handler - - .weak SysTick_Handler - .type SysTick_Handler, %function -SysTick_Handler: - B . - .size SysTick_Handler, . - SysTick_Handler - - .globl Default_Handler - .type Default_Handler, %function -Default_Handler: - B . - .size Default_Handler, . - Default_Handler - - .macro IRQ handler - .weak \handler - .set \handler, Default_Handler - .endm - - IRQ DEF_IRQHandler - - .end diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/sys.cpp deleted file mode 100644 index 6fc5736daf..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_CS/sys.cpp +++ /dev/null @@ -1,79 +0,0 @@ -#include "cmsis.h" -#include -#include - -extern "C" { - -struct SCS3Regions { - unsigned long Dummy; - unsigned long* InitRam; - unsigned long* StartRam; - unsigned long InitSizeRam; - unsigned long ZeroSizeRam; -}; - -extern unsigned long __cs3_regions; -extern unsigned long __cs3_heap_start; - -int main(void); -void __libc_init_array(void); -void exit(int ErrorCode); - -static void *heap_pointer = NULL; - -void __cs3_start_c(void) { - static SCS3Regions* pCS3Regions = (SCS3Regions*)&__cs3_regions; - unsigned long* pulDest; - unsigned long* pulSrc; - unsigned long ByteCount; - unsigned long i; - - pulSrc = pCS3Regions->InitRam; - pulDest = pCS3Regions->StartRam; - ByteCount = pCS3Regions->InitSizeRam; - if (pulSrc != pulDest) { - for(i = 0 ; i < ByteCount ; i += sizeof(unsigned long)) { - *(pulDest++) = *(pulSrc++); - } - } else { - pulDest = (unsigned long*)(void*)((char*)pulDest + ByteCount); - } - - ByteCount = pCS3Regions->ZeroSizeRam; - for(i = 0 ; i < ByteCount ; i += sizeof(unsigned long)) { - *(pulDest++) = 0; - } - - heap_pointer = &__cs3_heap_start; - __libc_init_array(); - exit(main()); -} - -int _kill(int pid, int sig) { - errno = EINVAL; - return -1; -} - -void _exit(int status) { - exit(status); -} - -int _getpid(void) { - return 1; -} - -void *_sbrk(unsigned int incr) { - void *mem; - - unsigned int next = ((((unsigned int)heap_pointer + incr) + 7) & ~7); - if (next > __get_MSP()) { - mem = NULL; - } else { - mem = (void *)heap_pointer; - } - heap_pointer = (void *)next; - - return mem; -} - -} diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis.h deleted file mode 100644 index 6e00f1e26b..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis.h +++ /dev/null @@ -1,13 +0,0 @@ -/* mbed Microcontroller Library - CMSIS - * Copyright (C) 2009-2011 ARM Limited. All rights reserved. - * - * A generic CMSIS include header, pulling in LPC11U24 specifics - */ - -#ifndef MBED_CMSIS_H -#define MBED_CMSIS_H - -#include "LPC11xx.h" -#include "cmsis_nvic.h" - -#endif diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.c deleted file mode 100644 index f1028cbe57..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.c +++ /dev/null @@ -1,57 +0,0 @@ -/* mbed Microcontroller Library - cmsis_nvic for LPC11U24 - * Copyright (c) 2011 ARM Limited. All rights reserved. - * - * CMSIS-style functionality to support dynamic vectors - */ - -#include "cmsis_nvic.h" - -/* In the M0, there is no VTOR. In the LPC range such as the LPC11U, - * whilst the vector table may only be something like 48 entries (192 bytes, 0xC0), - * the SYSMEMREMAP register actually remaps the memory from 0x10000000-0x100001FF - * to adress 0x0-0x1FF. In this case, RAM can be addressed at both 0x10000000 and 0x0 - * - * If we just copy the vectors to RAM and switch the SYSMEMMAP, any accesses to FLASH - * above the vector table before 0x200 will actually go to RAM. So we need to provide - * a solution where the compiler gets the right results based on the memory map - * - * Option 1 - We allocate and copy 0x200 of RAM rather than just the table - * - const data and instructions before 0x200 will be copied to and fetched/exec from RAM - * - RAM overhead: 0x200 - 0xC0 = 320 bytes, FLASH overhead: 0 - * - * Option 2 - We pad the flash to 0x200 to ensure the compiler doesn't allocate anything there - * - No flash accesses will go to ram, as there will be nothing there - * - RAM only needs to be allocated for the vectors, as all other ram addresses are normal - * - RAM overhead: 0, FLASH overhead: 320 bytes - * - * Option 2 is the one to go for, as RAM is the most valuable resource - */ - -#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of RAM - -void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { - int i; - // Space for dynamic vectors, initialised to allocate in R/W - static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; - - // Copy and switch to dynamic vectors if first time called - if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) { - uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0 - for(i = 0; i < NVIC_NUM_VECTORS; i++) { - vectors[i] = old_vectors[i]; - } - LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block - } - - // Set the vector - vectors[IRQn + 16] = vector; -} - -uint32_t NVIC_GetVector(IRQn_Type IRQn) { - // We can always read vectors at 0x0, as the addresses are remapped - uint32_t *vectors = (uint32_t*)0; - - // Return the vector - return vectors[IRQn + 16]; -} - diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.h deleted file mode 100644 index 4e0ddede09..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/cmsis_nvic.h +++ /dev/null @@ -1,26 +0,0 @@ -/* mbed Microcontroller Library - cmsis_nvic - * Copyright (c) 2009-2011 ARM Limited. All rights reserved. - * - * CMSIS-style functionality to support dynamic vectors - */ - -#ifndef MBED_CMSIS_NVIC_H -#define MBED_CMSIS_NVIC_H - -#include "cmsis.h" - -#define NVIC_NUM_VECTORS (16 + 32) // CORE + MCU Peripherals -#define NVIC_USER_IRQ_OFFSET 16 - -#ifdef __cplusplus -extern "C" { -#endif - -void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector); -uint32_t NVIC_GetVector(IRQn_Type IRQn); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.h deleted file mode 100644 index fa57304d48..0000000000 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.h +++ /dev/null @@ -1,64 +0,0 @@ -/**************************************************************************//** - * @file system_LPC11xx.h - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File - * for the NXP LPC11xx/LPC11Cxx Device Series - * @version V1.10 - * @date 24. November 2010 - * - * @note - * Copyright (C) 2009-2010 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __SYSTEM_LPC11xx_H -#define __SYSTEM_LPC11xx_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemCoreClock variable. - */ -extern void SystemInit (void); - -/** - * Update SystemCoreClock variable - * - * @param none - * @return none - * - * @brief Updates the SystemCoreClock with current core Clock - * retrieved from cpu registers. - */ -extern void SystemCoreClockUpdate (void); - -#ifdef __cplusplus -} -#endif - -#endif /* __SYSTEM_LPC11xx_H */ diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/LPC11xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/LPC11xx.h similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/LPC11xx.h rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/LPC11xx.h diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/system_LPC11xx.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/system_LPC11xx.c similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/system_LPC11xx.c rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/system_LPC11xx.c diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/system_LPC11xx.c similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/system_LPC11xx.c rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/system_LPC11xx.c diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/LPC1114.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/LPC1114.sct rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_MICRO/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/sys.cpp similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_MICRO/sys.cpp rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/sys.cpp diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/LPC1114.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/LPC1114.sct rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/LPC1114.sct diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_ARM_STD/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11XX/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/sys.cpp similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_ARM_STD/sys.cpp rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/sys.cpp diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_ARM/LPC1114.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_ARM/LPC1114.ld rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11CXX/LPC11C24.ld diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/LPC1114.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX/TOOLCHAIN_GCC_ARM/LPC1114.ld rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/TARGET_LPC11XX/LPC1114.ld diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_ARM/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CR/startup_LPC11xx.cpp diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CS/startup_LPC11xx.s diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CS/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CS/sys.cpp similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/TOOLCHAIN_GCC_CS/sys.cpp rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_GCC_CS/sys.cpp diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis.h rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis_nvic.c similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.c rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis_nvic.c diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis_nvic.h similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/cmsis_nvic.h rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis_nvic.h diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/system_LPC11xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/system_LPC11xx.h similarity index 100% rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11CXX/system_LPC11xx.h rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/system_LPC11xx.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c deleted file mode 100644 index 8566e7ae83..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_api.c +++ /dev/null @@ -1,62 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "gpio_api.h" -#include "pinmap.h" - -uint32_t gpio_set(PinName pin) { - // PIO default value of following ports are not same as others - int f = ((pin == P0_0 ) || // RESET - (pin == P0_10) || // SWCLK - (pin == P0_11) || // R - (pin == P1_0 ) || // R - (pin == P1_1 ) || // R - (pin == P1_2 ) || // R - (pin == P1_3 )) ? // - (1) : (0); - - pin_function(pin, f); - return ((pin & 0x0F00) >> PIN_SHIFT); -} - -void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) { - if(pin == NC) return; - - obj->pin = pin; - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000))); - - obj->reg_mask_read = &port_reg->MASKED_ACCESS[1 << gpio_set(pin)]; - obj->reg_dir = &port_reg->DIR; - obj->reg_write = &port_reg->DATA; - - gpio_dir(obj, direction); - - switch (direction) { - case PIN_OUTPUT: pin_mode(pin, PullNone); break; - case PIN_INPUT : pin_mode(pin, PullDown); break; - } -} - -void gpio_mode(gpio_t *obj, PinMode mode) { - pin_mode(obj->pin, mode); -} - -void gpio_dir(gpio_t *obj, PinDirection direction) { - int pin_number = ((obj->pin & 0x0F00) >> 8); - switch (direction) { - case PIN_INPUT : *obj->reg_dir &= ~(1 << pin_number); break; - case PIN_OUTPUT: *obj->reg_dir |= (1 << pin_number); break; - } -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_irq_api.c deleted file mode 100644 index 7049894c03..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_irq_api.c +++ /dev/null @@ -1,166 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include -#include "cmsis.h" -#include "gpio_irq_api.h" -#include "error.h" -#include "gpio_api.h" - -// The chip is capable of 4 external interrupts. -#define CHANNEL_NUM 4 - -static uint32_t channel_ids[CHANNEL_NUM] = {0}; -static gpio_irq_handler irq_handler; -static PinName pin_names[CHANNEL_NUM] = {}; -static uint8_t trigger_events[CHANNEL_NUM] = {}; - -static inline void handle_interrupt_in(uint32_t channel) { - // Find out whether the interrupt has been triggered by a high or low value... - // As the LPC1114 doesn't have a specific register for this, we'll just have to read - // the level of the pin as if it were just a normal input... - - // Get the number of the pin being used and the port typedef - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((pin_names[channel] & 0xF000) >> PORT_SHIFT) * 0x10000))); - uint8_t pin_num = (pin_names[channel] & (0x0f << PIN_SHIFT)) >> PIN_SHIFT; - uint8_t trigger_event = trigger_events[channel]; - - if (trigger_event == 1) - irq_handler(channel_ids[channel], IRQ_RISE); - else if (trigger_event == 2) - irq_handler(channel_ids[channel], IRQ_FALL); - else { - // In order to get an idea of which kind of event it is, - // We need to read the logic level of the pin... - - uint8_t logic = (port_reg->DATA & (1 << pin_num)) >> pin_num; - - if (logic == 1) - irq_handler(channel_ids[channel], IRQ_RISE); - else - irq_handler(channel_ids[channel], IRQ_FALL); - } - - // Clear the interrupt... - port_reg->IC |= 1 << pin_num; -} - -void gpio_irq0(void) {handle_interrupt_in(0);} -void gpio_irq1(void) {handle_interrupt_in(1);} -void gpio_irq2(void) {handle_interrupt_in(2);} -void gpio_irq3(void) {handle_interrupt_in(3);} - -int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) { - if (pin == NC) return -1; - - // Firstly, we'll put some data in *obj so we can keep track of stuff. - obj->pin = pin; - - // Set the handler to be the pointer at the top... - irq_handler = handler; - - // Which port are we using? - int channel; - uint32_t port_reg = (LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000)); - - switch (port_reg) { - case LPC_GPIO0_BASE: - NVIC_SetVector(EINT0_IRQn, (uint32_t)gpio_irq0); - NVIC_EnableIRQ(EINT0_IRQn); - channel = 0; - break; - case LPC_GPIO1_BASE: - NVIC_SetVector(EINT1_IRQn, (uint32_t)gpio_irq1); - NVIC_EnableIRQ(EINT1_IRQn); - channel = 1; - break; - case LPC_GPIO2_BASE: - NVIC_SetVector(EINT2_IRQn, (uint32_t)gpio_irq2); - NVIC_EnableIRQ(EINT2_IRQn); - channel = 2; - break; - case LPC_GPIO3_BASE: - NVIC_SetVector(EINT3_IRQn, (uint32_t)gpio_irq3); - NVIC_EnableIRQ(EINT3_IRQn); - channel = 3; - break; - default: - channel = -1; - error("Invalid interrupt choice."); - break; - } - - channel_ids[channel] = id; - pin_names[channel] = pin; - obj->ch = channel; - return 0; -} - -void gpio_irq_free(gpio_irq_t *obj) { - channel_ids[obj->ch] = 0; -} - -void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { - // Firstly, check if there is an existing event stored... - - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (((obj->pin & 0xF000) >> PORT_SHIFT) * 0x10000))); - - // Need to get the pin number of the pin, not the value of the enum - uint8_t pin_num = (obj->pin & (0x0f << PIN_SHIFT)) >> PIN_SHIFT; - - - if (trigger_events[obj->ch] != 0) { - // We have an event. - // Enable both edge interrupts. - - if (enable) { - trigger_events[obj->ch] = 3; - port_reg->IBE |= 1 << pin_num; - port_reg->IE |= 1 << pin_num; - } - else { - // These all need to be opposite, to reenable the other one. - trigger_events[obj->ch] = event == IRQ_RISE ? 2 : 1; - - port_reg->IBE &= ~(1 << pin_num); - - if (event == IRQ_RISE) - port_reg->IEV &= ~(1 << pin_num); - else - port_reg->IEV |= 1 << pin_num; - - port_reg->IE |= 1 << pin_num; - } - } - else { - if (enable) { - trigger_events[obj->ch] = event == IRQ_RISE ? 1 : 2; - port_reg->IE |= 1 << pin_num; - } - // One edge - port_reg->IBE &= ~(1 << pin_num); - // Rising/falling? - if (event == IRQ_RISE) - port_reg->IEV |= 1 << pin_num; - else - port_reg->IEV &= ~(1 << pin_num); - } - - // Clear - port_reg->IC |= 1 << pin_num; - - // Make it edge sensitive. - port_reg->IS &= ~(1 << pin_num); -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c deleted file mode 100644 index 6fb7b23850..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/i2c_api.c +++ /dev/null @@ -1,387 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "i2c_api.h" -#include "cmsis.h" -#include "pinmap.h" -#include "error.h" - -static const PinMap PinMap_I2C_SDA[] = { - {P0_5, I2C_0, 1}, - {NC , NC , 0} -}; - -static const PinMap PinMap_I2C_SCL[] = { - {P0_4, I2C_0, 1}, - {NC , NC, 0} -}; - -#define I2C_CONSET(x) (x->i2c->CONSET) -#define I2C_CONCLR(x) (x->i2c->CONCLR) -#define I2C_STAT(x) (x->i2c->STAT) -#define I2C_DAT(x) (x->i2c->DAT) -#define I2C_SCLL(x, val) (x->i2c->SCLL = val) -#define I2C_SCLH(x, val) (x->i2c->SCLH = val) - -static const uint32_t I2C_addr_offset[2][4] = { - {0x0C, 0x20, 0x24, 0x28}, - {0x30, 0x34, 0x38, 0x3C} -}; - -static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) { - I2C_CONCLR(obj) = (start << 5) - | (stop << 4) - | (interrupt << 3) - | (acknowledge << 2); -} - -static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) { - I2C_CONSET(obj) = (start << 5) - | (stop << 4) - | (interrupt << 3) - | (acknowledge << 2); -} - -// Clear the Serial Interrupt (SI) -static inline void i2c_clear_SI(i2c_t *obj) { - i2c_conclr(obj, 0, 0, 1, 0); -} - -static inline int i2c_status(i2c_t *obj) { - return I2C_STAT(obj); -} - -// Wait until the Serial Interrupt (SI) is set -static int i2c_wait_SI(i2c_t *obj) { - int timeout = 0; - while (!(I2C_CONSET(obj) & (1 << 3))) { - timeout++; - if (timeout > 100000) return -1; - } - return 0; -} - -static inline void i2c_interface_enable(i2c_t *obj) { - I2C_CONSET(obj) = 0x40; -} - -static inline void i2c_power_enable(i2c_t *obj) { - LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5); - LPC_SYSCON->PRESETCTRL |= 1 << 1; -} - -void i2c_init(i2c_t *obj, PinName sda, PinName scl) { - // determine the SPI to use - I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA); - I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL); - obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl); - - if ((int)obj->i2c == NC) { - error("I2C pin mapping failed"); - } - - // enable power - i2c_power_enable(obj); - - // set default frequency at 100k - i2c_frequency(obj, 100000); - i2c_conclr(obj, 1, 1, 1, 1); - i2c_interface_enable(obj); - - pinmap_pinout(sda, PinMap_I2C_SDA); - pinmap_pinout(scl, PinMap_I2C_SCL); -} - -inline int i2c_start(i2c_t *obj) { - int status = 0; - // 8.1 Before master mode can be entered, I2CON must be initialised to: - // - I2EN STA STO SI AA - - - // - 1 0 0 0 x - - - // if AA = 0, it can't enter slave mode - i2c_conclr(obj, 1, 1, 1, 1); - - // The master mode may now be entered by setting the STA bit - // this will generate a start condition when the bus becomes free - i2c_conset(obj, 1, 0, 0, 1); - - i2c_wait_SI(obj); - status = i2c_status(obj); - - // Clear start bit now transmitted, and interrupt bit - i2c_conclr(obj, 1, 0, 0, 0); - return status; -} - -inline int i2c_stop(i2c_t *obj) { - int timeout = 0; - - // write the stop bit - i2c_conset(obj, 0, 1, 0, 0); - i2c_clear_SI(obj); - - // wait for STO bit to reset - while(I2C_CONSET(obj) & (1 << 4)) { - timeout ++; - if (timeout > 100000) return 1; - } - - return 0; -} - - -static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) { - // write the data - I2C_DAT(obj) = value; - - // clear SI to init a send - i2c_clear_SI(obj); - - // wait and return status - i2c_wait_SI(obj); - return i2c_status(obj); -} - -static inline int i2c_do_read(i2c_t *obj, int last) { - // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack) - if (last) { - i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK - } else { - i2c_conset(obj, 0, 0, 0, 1); // send a ACK - } - - // accept byte - i2c_clear_SI(obj); - - // wait for it to arrive - i2c_wait_SI(obj); - - // return the data - return (I2C_DAT(obj) & 0xFF); -} - -void i2c_frequency(i2c_t *obj, int hz) { - // No peripheral clock divider on the M0 - uint32_t PCLK = SystemCoreClock; - - uint32_t pulse = PCLK / (hz * 2); - - // I2C Rate - I2C_SCLL(obj, pulse); - I2C_SCLH(obj, pulse); -} - -// The I2C does a read or a write as a whole operation -// There are two types of error conditions it can encounter -// 1) it can not obtain the bus -// 2) it gets error responses at part of the transmission -// -// We tackle them as follows: -// 1) we retry until we get the bus. we could have a "timeout" if we can not get it -// which basically turns it in to a 2) -// 2) on error, we use the standard error mechanisms to report/debug -// -// Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programatically -// check for that - -int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { - int count, status; - - status = i2c_start(obj); - - if ((status != 0x10) && (status != 0x08)) { - i2c_stop(obj); - return I2C_ERROR_BUS_BUSY; - } - - status = i2c_do_write(obj, (address | 0x01), 1); - if (status != 0x40) { - i2c_stop(obj); - return I2C_ERROR_NO_SLAVE; - } - - // Read in all except last byte - for (count = 0; count < (length - 1); count++) { - int value = i2c_do_read(obj, 0); - status = i2c_status(obj); - if (status != 0x50) { - i2c_stop(obj); - return count; - } - data[count] = (char) value; - } - - // read in last byte - int value = i2c_do_read(obj, 1); - status = i2c_status(obj); - if (status != 0x58) { - i2c_stop(obj); - return length - 1; - } - - data[count] = (char) value; - - // If not repeated start, send stop. - if (stop) { - i2c_stop(obj); - } - - return length; -} - -int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { - int i, status; - - status = i2c_start(obj); - - if ((status != 0x10) && (status != 0x08)) { - i2c_stop(obj); - return I2C_ERROR_BUS_BUSY; - } - - status = i2c_do_write(obj, (address & 0xFE), 1); - if (status != 0x18) { - i2c_stop(obj); - return I2C_ERROR_NO_SLAVE; - } - - for (i=0; i= 0) && (idx <= 3)) { - addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx]; - *((uint32_t *) addr) = address & 0xFF; - } -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c deleted file mode 100644 index a35895682c..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/spi_api.c +++ /dev/null @@ -1,214 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include -#include "spi_api.h" -#include "cmsis.h" -#include "pinmap.h" -#include "error.h" - -static const PinMap PinMap_SPI_SCLK[] = { - {P0_6 , SPI_0, 0x02}, - {P0_10, SPI_0, 0x02}, - {P2_11, SPI_0, 0x01}, - {P2_1 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MOSI[] = { - {P0_9 , SPI_0, 0x01}, - {P2_3 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MISO[] = { - {P0_8 , SPI_0, 0x01}, - {P2_2 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_SSEL[] = { - {P0_2 , SPI_0, 0x01}, - {P2_0 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static inline int ssp_disable(spi_t *obj); -static inline int ssp_enable(spi_t *obj); - -void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) { - // determine the SPI to use - SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI); - SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO); - SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK); - SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL); - SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso); - SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel); - - obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl); - - if ((int)obj->spi == NC) { - error("SPI pinout mapping failed"); - } - - // enable power and clocking - switch ((int)obj->spi) { - case SPI_0: - LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11; - LPC_SYSCON->SSP0CLKDIV = 0x01; - LPC_SYSCON->PRESETCTRL |= 1 << 0; - break; - case SPI_1: - LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18; - LPC_SYSCON->SSP1CLKDIV = 0x01; - LPC_SYSCON->PRESETCTRL |= 1 << 2; - break; - } - - // set default format and frequency - if (ssel == NC) { - spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master - } else { - spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave - } - spi_frequency(obj, 1000000); - - // enable the ssp channel - ssp_enable(obj); - - // pin out the spi pins - pinmap_pinout(mosi, PinMap_SPI_MOSI); - pinmap_pinout(miso, PinMap_SPI_MISO); - pinmap_pinout(sclk, PinMap_SPI_SCLK); - if (ssel != NC) { - pinmap_pinout(ssel, PinMap_SPI_SSEL); - } -} - -void spi_free(spi_t *obj) {} - -void spi_format(spi_t *obj, int bits, int mode, int slave) { - ssp_disable(obj); - - if (!(bits >= 4 && bits <= 16) || !(mode >= 0 && mode <= 3)) { - error("SPI format error"); - } - - int polarity = (mode & 0x2) ? 1 : 0; - int phase = (mode & 0x1) ? 1 : 0; - - // set it up - int DSS = bits - 1; // DSS (data select size) - int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity - int SPH = (phase) ? 1 : 0; // SPH - clock out phase - - int FRF = 0; // FRF (frame format) = SPI - uint32_t tmp = obj->spi->CR0; - tmp &= ~(0xFFFF); - tmp |= DSS << 0 - | FRF << 4 - | SPO << 6 - | SPH << 7; - obj->spi->CR0 = tmp; - - tmp = obj->spi->CR1; - tmp &= ~(0xD); - tmp |= 0 << 0 // LBM - loop back mode - off - | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave - | 0 << 3; // SOD - slave output disable - na - obj->spi->CR1 = tmp; - - ssp_enable(obj); -} - -void spi_frequency(spi_t *obj, int hz) { - ssp_disable(obj); - - uint32_t PCLK = SystemCoreClock; - - int prescaler; - - for (prescaler = 2; prescaler <= 254; prescaler += 2) { - int prescale_hz = PCLK / prescaler; - - // calculate the divider - int divider = floor(((float)prescale_hz / (float)hz) + 0.5f); - - // check we can support the divider - if (divider < 256) { - // prescaler - obj->spi->CPSR = prescaler; - - // divider - obj->spi->CR0 &= ~(0xFFFF << 8); - obj->spi->CR0 |= (divider - 1) << 8; - ssp_enable(obj); - return; - } - } - error("Couldn't setup requested SPI frequency"); -} - -static inline int ssp_disable(spi_t *obj) { - return obj->spi->CR1 &= ~(1 << 1); -} - -static inline int ssp_enable(spi_t *obj) { - return obj->spi->CR1 |= (1 << 1); -} - -static inline int ssp_readable(spi_t *obj) { - return obj->spi->SR & (1 << 2); -} - -static inline int ssp_writeable(spi_t *obj) { - return obj->spi->SR & (1 << 1); -} - -static inline void ssp_write(spi_t *obj, int value) { - while (!ssp_writeable(obj)); - obj->spi->DR = value; -} - -static inline int ssp_read(spi_t *obj) { - while (!ssp_readable(obj)); - return obj->spi->DR; -} - -static inline int ssp_busy(spi_t *obj) { - return (obj->spi->SR & (1 << 4)) ? (1) : (0); -} - -int spi_master_write(spi_t *obj, int value) { - ssp_write(obj, value); - return ssp_read(obj); -} - -int spi_slave_receive(spi_t *obj) { - return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0); -}; - -int spi_slave_read(spi_t *obj) { - return obj->spi->DR; -} - -void spi_slave_write(spi_t *obj, int value) { - while (ssp_writeable(obj) == 0) ; - obj->spi->DR = value; -} - -int spi_busy(spi_t *obj) { - return ssp_busy(obj); -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PortNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PortNames.h deleted file mode 100644 index 4887fecb33..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PortNames.h +++ /dev/null @@ -1,33 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PORTNAMES_H -#define MBED_PORTNAMES_H - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - Port0 = 0, - Port1 = 1, - Port2 = 2, - Port3 = 3 -} PortName; - -#ifdef __cplusplus -} -#endif -#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/analogin_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/analogin_api.c deleted file mode 100644 index 7fd16253d3..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/analogin_api.c +++ /dev/null @@ -1,123 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "analogin_api.h" -#include "cmsis.h" -#include "pinmap.h" -#include "error.h" - -#define ANALOGIN_MEDIAN_FILTER 1 - -#define ADC_10BIT_RANGE 0x3FF -#define ADC_12BIT_RANGE 0xFFF - -static inline int div_round_up(int x, int y) { - return (x + (y - 1)) / y; -} - -static const PinMap PinMap_ADC[] = { - {P0_11, ADC0_0, 2}, - {P1_0 , ADC0_1, 2}, - {P1_1 , ADC0_2, 2}, - {P1_2 , ADC0_3, 2}, - // ADC0_4 (P1_3) should be mapped to SWDIO only - {P1_4 , ADC0_5, 1}, - {P1_10, ADC0_6, 1}, - {P1_11, ADC0_7, 1}, - {NC , NC , 0} -}; - -#define ADC_RANGE ADC_10BIT_RANGE - -void analogin_init(analogin_t *obj, PinName pin) { - obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); - if (obj->adc == (uint32_t)NC) { - error("ADC pin mapping failed"); - return; - } - - // Power up ADC - LPC_SYSCON->PDRUNCFG &= ~(1 << 4); - LPC_SYSCON->SYSAHBCLKCTRL |= ((uint32_t)1 << 13); - - __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + (pin & 0xff)); - - // set pin to ADC mode - *reg &= ~(1 << 7); // set ADMODE = 0 (analog mode) - - uint32_t PCLK = SystemCoreClock; - uint32_t MAX_ADC_CLK = 4500000; - uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1; - - LPC_ADC->CR = (0 << 0) // no channels selected - | (clkdiv << 8) // max of 4.5MHz - | (0 << 16) // BURST = 0, software controlled - | ( 0 << 17 ); // CLKS = 0, not applicable - - pinmap_pinout(pin, PinMap_ADC); -} - -static inline uint32_t adc_read(analogin_t *obj) { - // Select the appropriate channel and start conversion - LPC_ADC->CR &= ~0xFF; - LPC_ADC->CR |= 1 << (int)obj->adc; - LPC_ADC->CR |= 1 << 24; - - // Repeatedly get the sample data until DONE bit - unsigned int data; - do { - data = LPC_ADC->GDR; - } while ((data & ((unsigned int)1 << 31)) == 0); - - // Stop conversion - LPC_ADC->CR &= ~(1 << 24); - - return (data >> 6) & ADC_RANGE; // 10 bit -} - -static inline void order(uint32_t *a, uint32_t *b) { - if (*a > *b) { - uint32_t t = *a; - *a = *b; - *b = t; - } -} - -static inline uint32_t adc_read_u32(analogin_t *obj) { - uint32_t value; -#if ANALOGIN_MEDIAN_FILTER - uint32_t v1 = adc_read(obj); - uint32_t v2 = adc_read(obj); - uint32_t v3 = adc_read(obj); - order(&v1, &v2); - order(&v2, &v3); - order(&v1, &v2); - value = v2; -#else - value = adc_read(obj); -#endif - return value; -} - -uint16_t analogin_read_u16(analogin_t *obj) { - uint32_t value = adc_read_u32(obj); - - return (value << 6) | ((value >> 4) & 0x003F); // 10 bit -} - -float analogin_read(analogin_t *obj) { - uint32_t value = adc_read_u32(obj); - return (float)value * (1.0f / (float)ADC_RANGE); -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_object.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_object.h deleted file mode 100644 index 2ece747074..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_object.h +++ /dev/null @@ -1,46 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_GPIO_OBJECT_H -#define MBED_GPIO_OBJECT_H - -#ifdef __cplusplus -extern "C" { -#endif - -typedef struct { - PinName pin; - __I uint32_t *reg_mask_read; - __IO uint32_t *reg_dir; - __IO uint32_t *reg_write; -} gpio_t; - -static inline void gpio_write(gpio_t *obj, int value) { - uint32_t pin_number = ((obj->pin & 0x0F00) >> 8); - if (value) - *obj->reg_write |= (1 << pin_number); - else - *obj->reg_write &= ~(1 << pin_number); -} - -static inline int gpio_read(gpio_t *obj) { - return ((*obj->reg_mask_read) ? 1 : 0); -} - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pinmap.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pinmap.c deleted file mode 100644 index 8006ca18f1..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pinmap.c +++ /dev/null @@ -1,47 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "pinmap.h" -#include "error.h" - -void pin_function(PinName pin, int function) { - if (pin == (uint32_t)NC) return; - - uint32_t offset = (uint32_t)pin & 0xff; - __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + offset); - - // pin function bits: [2:0] -> 111 = (0x7) - *reg = (*reg & ~0x7) | (function & 0x7); -} - -void pin_mode(PinName pin, PinMode mode) { - if (pin == (uint32_t)NC) { return; } - - uint32_t offset = (uint32_t)pin & 0xff; - uint32_t drain = ((uint32_t) mode & (uint32_t) OpenDrain) >> 2; - - __IO uint32_t *reg = (__IO uint32_t*)(LPC_IOCON_BASE + offset); - uint32_t tmp = *reg; - - // pin mode bits: [4:3] -> 11000 = (0x3 << 3) - tmp &= ~(0x3 << 3); - tmp |= (mode & 0x3) << 3; - - // drain - tmp &= ~(0x1 << 10); - tmp |= drain << 10; - - *reg = tmp; -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/port_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/port_api.c deleted file mode 100644 index 3dd911eed5..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/port_api.c +++ /dev/null @@ -1,78 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "port_api.h" -#include "pinmap.h" -#include "gpio_api.h" - -// LPC114 IOCON offset table [port][pin] - -static uint8_t iocon_offset[4][12] = { - {0x0c,0x10,0x1c,0x2c,0x30,0x34,0x4c,0x50,0x60,0x64,0x68,0x74}, // PORT 0 - {0x78,0x7c,0x80,0x90,0x94,0xa0,0xa4,0xa8,0x14,0x38,0x6c,0x98}, // PORT 1 - {0x08,0x28,0x5c,0x8c,0x40,0x44,0x00,0x20,0x24,0x54,0x58,0x70}, // PORT 2 - {0x84,0x88,0x9c,0xac,0x3c,0x48} // PORT 3 -}; - -PinName port_pin(PortName port, int pin) { - return (PinName)((port << PORT_SHIFT) | (pin << PIN_SHIFT) | (uint32_t)iocon_offset[port][pin]); -} - -void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { - obj->port = port; - obj->mask = mask; - - LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) (LPC_GPIO0_BASE + (port * 0x10000))); - - obj->reg_data = &port_reg->DATA; - obj->reg_dir = &port_reg->DIR; - - uint32_t i; - // The function is set per pin: reuse gpio logic - for (i=0; i<12; i++) { - if (obj->mask & (1<port, i)); - } - } - - port_dir(obj, dir); -} - -void port_mode(port_t *obj, PinMode mode) { - uint32_t i; - // The mode is set per pin: reuse pinmap logic - for (i=0; i<12; i++) { - if (obj->mask & (1<port, i), mode); - } - } -} - -void port_dir(port_t *obj, PinDirection dir) { - switch (dir) { - case PIN_INPUT : *obj->reg_dir &= ~obj->mask; break; - case PIN_OUTPUT: *obj->reg_dir |= obj->mask; break; - } -} - -void port_write(port_t *obj, int value) { - *obj->reg_data = (value & obj->mask); -} - -int port_read(port_t *obj) { - return (*obj->reg_data & obj->mask); -} - diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/serial_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/serial_api.c deleted file mode 100644 index 18b1bd9a7e..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/serial_api.c +++ /dev/null @@ -1,278 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -// math.h required for floating point operations for baud rate calculation -#include -#include - -#include "serial_api.h" -#include "cmsis.h" -#include "pinmap.h" -#include "error.h" - -/****************************************************************************** - * INITIALIZATION - ******************************************************************************/ -#define UART_NUM 1 - -static const PinMap PinMap_UART_TX[] = { - {P2_8 , UART_0, 0x02}, - {P3_5 , UART_0, 0x02}, - {P3_0 , UART_0, 0x03}, - {P1_7 , UART_0, 0x01}, - {NC , NC , 0x00} -}; - -static const PinMap PinMap_UART_RX[] = { - {P2_7 , UART_0, 0x02}, - {P3_4 , UART_0, 0x02}, - {P3_1 , UART_0, 0x03}, - {P1_6 , UART_0, 0x01}, - {NC , NC , 0x00} -}; - -static uint32_t serial_irq_ids[UART_NUM] = {0}; -static uart_irq_handler irq_handler; - -int stdio_uart_inited = 0; -serial_t stdio_uart; - -void serial_init(serial_t *obj, PinName tx, PinName rx) { - int is_stdio_uart = 0; - - // determine the UART to use - UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); - UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); - UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx); - if ((int)uart == NC) { - error("Serial pinout mapping failed"); - } - - obj->uart = (LPC_UART_TypeDef *)uart; - LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12); - - // enable fifos and default rx trigger level - obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled - | 0 << 1 // Rx Fifo Reset - | 0 << 2 // Tx Fifo Reset - | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars - - // disable irqs - obj->uart->IER = 0 << 0 // Rx Data available irq enable - | 0 << 1 // Tx Fifo empty irq enable - | 0 << 2; // Rx Line Status irq enable - - // set default baud rate and format - serial_baud (obj, 9600); - serial_format(obj, 8, ParityNone, 1); - - // pinout the chosen uart - pinmap_pinout(tx, PinMap_UART_TX); - pinmap_pinout(rx, PinMap_UART_RX); - - // set rx/tx pins in PullUp mode - pin_mode(tx, PullUp); - pin_mode(rx, PullUp); - - switch (uart) { - case UART_0: obj->index = 0; break; - } - - is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); - - if (is_stdio_uart) { - stdio_uart_inited = 1; - memcpy(&stdio_uart, obj, sizeof(serial_t)); - } -} - -void serial_free(serial_t *obj) { - serial_irq_ids[obj->index] = 0; -} - -// serial_baud -// set the baud rate, taking in to account the current SystemFrequency -void serial_baud(serial_t *obj, int baudrate) { - LPC_SYSCON->UARTCLKDIV = 0x1; - uint32_t PCLK = SystemCoreClock; - // First we check to see if the basic divide with no DivAddVal/MulVal - // ratio gives us an integer result. If it does, we set DivAddVal = 0, - // MulVal = 1. Otherwise, we search the valid ratio value range to find - // the closest match. This could be more elegant, using search methods - // and/or lookup tables, but the brute force method is not that much - // slower, and is more maintainable. - uint16_t DL = PCLK / (16 * baudrate); - - uint8_t DivAddVal = 0; - uint8_t MulVal = 1; - int hit = 0; - uint16_t dlv; - uint8_t mv, dav; - if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder - float err_best = (float) baudrate; - uint16_t dlmax = DL; - for ( dlv = (dlmax/2); (dlv <= dlmax) && !hit; dlv++) { - for ( mv = 1; mv <= 15; mv++) { - for ( dav = 1; dav < mv; dav++) { - float ratio = 1.0f + ((float) dav / (float) mv); - float calcbaud = (float)PCLK / (16.0f * (float) dlv * ratio); - float err = fabs(((float) baudrate - calcbaud) / (float) baudrate); - if (err < err_best) { - DL = dlv; - DivAddVal = dav; - MulVal = mv; - err_best = err; - if (err < 0.001f) { - hit = 1; - } - } - } - } - } - } - - // set LCR[DLAB] to enable writing to divider registers - obj->uart->LCR |= (1 << 7); - - // set divider values - obj->uart->DLM = (DL >> 8) & 0xFF; - obj->uart->DLL = (DL >> 0) & 0xFF; - obj->uart->FDR = (uint32_t) DivAddVal << 0 - | (uint32_t) MulVal << 4; - - // clear LCR[DLAB] - obj->uart->LCR &= ~(1 << 7); -} - -void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { - // 0: 1 stop bits, 1: 2 stop bits - if (stop_bits != 1 && stop_bits != 2) { - error("Invalid stop bits specified"); - } - stop_bits -= 1; - - // 0: 5 data bits ... 3: 8 data bits - if (data_bits < 5 || data_bits > 8) { - error("Invalid number of bits (%d) in serial format, should be 5..8", data_bits); - } - data_bits -= 5; - - int parity_enable, parity_select; - switch (parity) { - case ParityNone: parity_enable = 0; parity_select = 0; break; - case ParityOdd : parity_enable = 1; parity_select = 0; break; - case ParityEven: parity_enable = 1; parity_select = 1; break; - case ParityForced1: parity_enable = 1; parity_select = 2; break; - case ParityForced0: parity_enable = 1; parity_select = 3; break; - default: - error("Invalid serial parity setting"); - return; - } - - obj->uart->LCR = data_bits << 0 - | stop_bits << 2 - | parity_enable << 3 - | parity_select << 4; -} - -/****************************************************************************** - * INTERRUPTS HANDLING - ******************************************************************************/ -static inline void uart_irq(uint32_t iir, uint32_t index) { - // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling - SerialIrq irq_type; - switch (iir) { - case 1: irq_type = TxIrq; break; - case 2: irq_type = RxIrq; break; - default: return; - } - - if (serial_irq_ids[index] != 0) - irq_handler(serial_irq_ids[index], irq_type); -} - -void uart0_irq() {uart_irq((LPC_UART->IIR >> 1) & 0x7, 0);} - -void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) { - irq_handler = handler; - serial_irq_ids[obj->index] = id; -} - -void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) { - IRQn_Type irq_n = (IRQn_Type)0; - uint32_t vector = 0; - switch ((int)obj->uart) { - case UART_0: - irq_n=UART_IRQn; - vector = (uint32_t)&uart0_irq; - break; - default: - return; - } - - if (enable) { - obj->uart->IER |= 1 << irq; - NVIC_SetVector(irq_n, vector); - NVIC_EnableIRQ(irq_n); - } else { // disable - int all_disabled = 0; - SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq); - - obj->uart->IER &= ~(1 << irq); - all_disabled = (obj->uart->IER & (1 << other_irq)) == 0; - - if (all_disabled) - NVIC_DisableIRQ(irq_n); - } -} - -/****************************************************************************** - * READ/WRITE - ******************************************************************************/ -int serial_getc(serial_t *obj) { - while (!serial_readable(obj)); - return obj->uart->RBR; -} - -void serial_putc(serial_t *obj, int c) { - while (!serial_writable(obj)); - obj->uart->THR = c; -} - -int serial_readable(serial_t *obj) { - return obj->uart->LSR & 0x01; -} - -int serial_writable(serial_t *obj) { - return obj->uart->LSR & 0x20; -} - -void serial_clear(serial_t *obj) { - obj->uart->FCR = 1 << 1 // rx FIFO reset - | 1 << 2 // tx FIFO reset - | 0 << 6; // interrupt depth -} - -void serial_pinout_tx(PinName tx) { - pinmap_pinout(tx, PinMap_UART_TX); -} - -void serial_break_clear(serial_t *obj) { - obj->uart->LCR &= ~(1 << 6); -} - -void serial_break_set(serial_t *obj) { - obj->uart->LCR |= 1 << 6; -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/sleep.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/sleep.c deleted file mode 100644 index 051db5217b..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/sleep.c +++ /dev/null @@ -1,75 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "sleep_api.h" -#include "cmsis.h" -#include "mbed_interface.h" - -void sleep(void) { - // ensure debug is disconnected - mbed_interface_disconnect(); - - // PCON[DPDEN] set to sleep - LPC_PMU->PCON = 0x0; - - // SRC[SLEEPDEEP] set to 0 = sleep - SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; - - // wait for interrupt - __WFI(); -} - -/* -* The mbed lpc1768 does not support the deepsleep mode -* as a debugger is connected to it (the mbed interface). -* -* As mentionned in an application note from NXP: -* -* http://www.po-star.com/public/uploads/20120319123122_141.pdf -* -* {{{ -* The user should be aware of certain limitations during debugging. -* The most important is that, due to limitations of the Cortex-M3 -* integration, the LPC17xx cannot wake up in the usual manner from -* Deep Sleep and Power-down modes. It is recommended not to use these -* modes during debug. Once an application is downloaded via JTAG/SWD -* interface, the USB to SWD/JTAG debug adapter (Keil ULINK2 for example) -* should be removed from the target board, and thereafter, power cycle -* the LPC17xx to allow wake-up from deep sleep and power-down modes -* }}} -* -* As the interface firmware does not reset the target when a -* mbed_interface_disconnect() semihosting call is made, the -* core cannot wake-up from deepsleep. -* -* We treat a deepsleep() as a normal sleep(). -*/ - -void deepsleep(void) { - // ensure debug is disconnected - mbed_interface_disconnect(); - - // PCON[DPDEN] set to deepsleep - LPC_PMU->PCON = 0x2; - - // SRC[SLEEPDEEP] set to 1 = deep sleep - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - - // Power up everything after powerdown - LPC_SYSCON->PDAWAKECFG &= 0xFFFFF800; - - // wait for interrupt - __WFI(); -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/us_ticker.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/us_ticker.c deleted file mode 100644 index 32b7f0d66f..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/us_ticker.c +++ /dev/null @@ -1,62 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include -#include "us_ticker_api.h" -#include "PeripheralNames.h" - -#define US_TICKER_TIMER ((LPC_TMR_TypeDef *)LPC_CT32B1_BASE) -#define US_TICKER_TIMER_IRQn TIMER_32_1_IRQn - -int us_ticker_inited = 0; - -void us_ticker_init(void) { - if (us_ticker_inited) return; - us_ticker_inited = 1; - - LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10); // Clock TIMER_1 - uint32_t PCLK = SystemCoreClock; - - US_TICKER_TIMER->TCR = 0x2; // reset - - uint32_t prescale = PCLK / 1000000; // default to 1MHz (1 us ticks) - US_TICKER_TIMER->PR = prescale - 1; - US_TICKER_TIMER->TCR = 1; // enable = 1, reset = 0 - - NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler); - NVIC_EnableIRQ(US_TICKER_TIMER_IRQn); -} - -uint32_t us_ticker_read() { - if (!us_ticker_inited) - us_ticker_init(); - - return US_TICKER_TIMER->TC; -} - -void us_ticker_set_interrupt(unsigned int timestamp) { - // set match value - US_TICKER_TIMER->MR0 = timestamp; - // enable match interrupt - US_TICKER_TIMER->MCR |= 1; -} - -void us_ticker_disable_interrupt(void) { - US_TICKER_TIMER->MCR &= ~1; -} - -void us_ticker_clear_interrupt(void) { - US_TICKER_TIMER->IR = 1; -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PortNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/PortNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PortNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/PortNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PeripheralNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PinNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PinNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/PinNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PinNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/README.md b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/README.md rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h new file mode 100644 index 0000000000..2fc49f4add --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h @@ -0,0 +1,20 @@ +// ADC pin mappings for LPC11CXX +// This should be included ONLY from analogin_api.c + +#ifndef ADC_PINMAP_H +#define ADC_PINMAP_H + +static const PinMap PinMap_ADC[] = { + {P0_11, ADC0_0, 2}, + {P1_0 , ADC0_1, 2}, + {P1_1 , ADC0_2, 2}, + {P1_2 , ADC0_3, 2}, + {P1_3 , ADC0_4, 2}, + {P1_4 , ADC0_5, 1}, + {P1_10, ADC0_6, 1}, + {P1_11, ADC0_7, 1}, + {NC , NC , 0} +}; + +#endif + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/device.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/device.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/device.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/device.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/objects.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/objects.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/objects.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/pwmout_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/reserved_pins.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/reserved_pins.h new file mode 100644 index 0000000000..7c8a7ba3c4 --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/reserved_pins.h @@ -0,0 +1,8 @@ +// List of reserved pins for LPC11C24 + +#ifndef RESERVED_PINS_H +#define RESERVED_PINS_H + +#define TARGET_RESERVED_PINS {P0_0, P0_10, P0_11, P1_0, P1_1, P1_2, P1_3} + +#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h new file mode 100644 index 0000000000..03dbb35095 --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h @@ -0,0 +1,34 @@ +// SPI pin mappings for LPC11CXX +// This should be included ONLY from spi_api.c + +#ifndef SPI_PINMAP_H +#define SPI_PINMAP_H + +static const PinMap PinMap_SPI_SCLK[] = { + {P0_6 , SPI_0, 0x02}, + {P0_10, SPI_0, 0x02}, + {P2_11, SPI_0, 0x01}, + {P2_1 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MOSI[] = { + {P0_9 , SPI_0, 0x01}, + {P2_3 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MISO[] = { + {P0_8 , SPI_0, 0x01}, + {P2_2 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_SSEL[] = { + {P0_2 , SPI_0, 0x01}, + {P2_0 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +#endif + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PeripheralNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PeripheralNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PeripheralNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PinNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PinNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/PinNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PinNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/README.md b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/README.md similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/README.md rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/README.md diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h new file mode 100644 index 0000000000..d2a80e989e --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h @@ -0,0 +1,20 @@ +// ADC pin mappings for LPC11XX +// This should be included ONLY from analogin_api.c + +#ifndef ADC_PINMAP_H +#define ADC_PINMAP_H + +static const PinMap PinMap_ADC[] = { + {P0_11, ADC0_0, 2}, + {P1_0 , ADC0_1, 2}, + {P1_1 , ADC0_2, 2}, + {P1_2 , ADC0_3, 2}, + // ADC0_4 (P1_3) should be mapped to SWDIO only + {P1_4 , ADC0_5, 1}, + {P1_10, ADC0_6, 1}, + {P1_11, ADC0_7, 1}, + {NC , NC , 0} +}; + +#endif + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/device.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/device.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/device.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/device.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/objects.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/pwmout_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/pwmout_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/pwmout_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/reserved_pins.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/reserved_pins.h new file mode 100644 index 0000000000..f33637f557 --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/reserved_pins.h @@ -0,0 +1,8 @@ +// List of reserved pins for LPC1114 + +#ifndef RESERVED_PINS_H +#define RESERVED_PINS_H + +#define TARGET_RESERVED_PINS {P0_0, P0_11, P1_0, P1_1, P1_2} + +#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h new file mode 100644 index 0000000000..da5ca3d48b --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h @@ -0,0 +1,33 @@ +// SPI pin mappings for LPC11XX +// This should be included ONLY from spi_api.c + +#ifndef SPI_PINMAP_H +#define SPI_PINMAP_H + +static const PinMap PinMap_SPI_SCLK[] = { + {P0_6 , SPI_0, 0x02}, + {P2_11, SPI_0, 0x01}, + {P2_1 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MOSI[] = { + {P0_9 , SPI_0, 0x01}, + {P2_3 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MISO[] = { + {P0_8 , SPI_0, 0x01}, + {P2_2 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_SSEL[] = { + {P0_2 , SPI_0, 0x01}, + {P2_0 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +#endif + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/analogin_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c similarity index 92% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/analogin_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c index 2309224f68..a5587eb5d0 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/analogin_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c @@ -18,6 +18,8 @@ #include "pinmap.h" #include "error.h" +#include "adc_pinmap.h" + #define ANALOGIN_MEDIAN_FILTER 1 #define ADC_10BIT_RANGE 0x3FF @@ -27,24 +29,13 @@ static inline int div_round_up(int x, int y) { return (x + (y - 1)) / y; } -static const PinMap PinMap_ADC[] = { - {P0_11, ADC0_0, 2}, - {P1_0 , ADC0_1, 2}, - {P1_1 , ADC0_2, 2}, - {P1_2 , ADC0_3, 2}, - {P1_3 , ADC0_4, 2}, - {P1_4 , ADC0_5, 1}, - {P1_10, ADC0_6, 1}, - {P1_11, ADC0_7, 1}, - {NC , NC , 0} -}; - #define ADC_RANGE ADC_10BIT_RANGE void analogin_init(analogin_t *obj, PinName pin) { obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC); if (obj->adc == (uint32_t)NC) { error("ADC pin mapping failed"); + return; } // Power up ADC diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c similarity index 86% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c index b6f097a67c..7ed3ed91a3 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c @@ -15,16 +15,21 @@ */ #include "gpio_api.h" #include "pinmap.h" +#include "reserved_pins.h" + +static const PinName reserved_pins[] = TARGET_RESERVED_PINS; uint32_t gpio_set(PinName pin) { // PIO default value of following ports are not same as others - int f = ((pin == P0_0 ) || // RESET - (pin == P0_11) || // R - (pin == P1_0 ) || // R - (pin == P1_1 ) || // R - (pin == P1_2 )) ? // R - (1) : (0); - + unsigned i; + int f = 0; + + for (i = 0; i < sizeof(reserved_pins) / sizeof(int); i ++) + if (pin == reserved_pins[i]) { + f = 1; + break; + } + pin_function(pin, f); return ((pin & 0x0F00) >> 8); } diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/gpio_irq_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_object.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_object.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/gpio_object.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_object.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/i2c_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/i2c_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/pinmap.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/pinmap.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/pinmap.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/pinmap.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/port_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/port_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/port_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/port_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/serial_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/serial_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/serial_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/serial_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/sleep.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/sleep.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/sleep.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/sleep.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/spi_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c similarity index 91% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/spi_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c index f41f008f84..ed9ed02381 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c @@ -19,30 +19,7 @@ #include "pinmap.h" #include "error.h" -static const PinMap PinMap_SPI_SCLK[] = { - {P0_6 , SPI_0, 0x02}, - {P2_11, SPI_0, 0x01}, - {P2_1 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MOSI[] = { - {P0_9 , SPI_0, 0x01}, - {P2_3 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MISO[] = { - {P0_8 , SPI_0, 0x01}, - {P2_2 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_SSEL[] = { - {P0_2 , SPI_0, 0x01}, - {P2_0 , SPI_1, 0x02}, - {NC , NC , 0} -}; +#include "spi_pinmap.h" static inline int ssp_disable(spi_t *obj); static inline int ssp_enable(spi_t *obj); diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/us_ticker.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/us_ticker.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11CXX/us_ticker.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/us_ticker.c diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index 888f40b9c0..fccaa67b3b 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -266,7 +266,7 @@ class LPC1114(Target): self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11XX'] + self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11XX'] self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] @@ -277,7 +277,7 @@ class LPC11C24(Target): self.core = "Cortex-M0" - self.extra_labels = ['NXP', 'LPC11CXX'] + self.extra_labels = ['NXP', 'LPC11XX_11CXX', 'LPC11CXX'] self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] From 1e224c515266bd9814fe41ab895930347deaefd5 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 23 Sep 2013 16:50:51 +0100 Subject: [PATCH 002/117] Fix RAM size for LPC11C24 in ARM/uARM linker command files --- .../TARGET_LPC11CXX/LPC11C24.sct | 16 ++++++++++++++++ .../TARGET_LPC11CXX/LPC11C24.sct | 14 ++++++++++++++ 2 files changed, 30 insertions(+) create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct new file mode 100644 index 0000000000..9fcb33a3e4 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct @@ -0,0 +1,16 @@ + +LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) + + ER_IROM1 0x00000000 0x8000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + ; 48 vectors * 4 bytes = 0xC0 for remap + RW_IRAM1 (0x10000000+0xC0) (0x2000-0xC0) { + .ANY (+RW +ZI) + } + +} + diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct new file mode 100644 index 0000000000..8868823c45 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/TOOLCHAIN_ARM_STD/TARGET_LPC11CXX/LPC11C24.sct @@ -0,0 +1,14 @@ + +LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) + ER_IROM1 0x00000000 0x8000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 + ; 8KB - 0xC0 = 0x1F40 + RW_IRAM1 0x100000C0 0x1F40 { + .ANY (+RW +ZI) + } +} + From 3fe31ad50e8cac47299a1435defff202eeb68293 Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Fri, 27 Sep 2013 18:53:19 -0700 Subject: [PATCH 003/117] Move objects.h to LPC11XX_11CXX common Use #if DEVICE_CAN for can_s definition --- .../TARGET_LPC11XX/objects.h | 68 ------------------- .../{TARGET_LPC11CXX => }/objects.h | 2 + 2 files changed, 2 insertions(+), 68 deletions(-) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/{TARGET_LPC11CXX => }/objects.h (98%) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h deleted file mode 100644 index 02f982d559..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/objects.h +++ /dev/null @@ -1,68 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_OBJECTS_H -#define MBED_OBJECTS_H - -#include "cmsis.h" -#include "PortNames.h" -#include "PeripheralNames.h" -#include "PinNames.h" - -#ifdef __cplusplus -extern "C" { -#endif - -struct gpio_irq_s { - uint32_t ch; - PinName pin; - __I uint32_t *reg_mask_read; -}; - -struct port_s { - __IO uint32_t *reg_dir; - __IO uint32_t *reg_data; - PortName port; - uint32_t mask; -}; - -struct pwmout_s { - PWMName pwm; -}; - -struct serial_s { - LPC_UART_TypeDef *uart; - int index; -}; - -struct analogin_s { - ADCName adc; -}; - -struct i2c_s { - LPC_I2C_TypeDef *i2c; -}; - -struct spi_s { - LPC_SSP_TypeDef *spi; -}; - -#include "gpio_object.h" - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/objects.h similarity index 98% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/objects.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/objects.h index 22e5b8b0fe..f98fd59233 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/objects.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/objects.h @@ -59,9 +59,11 @@ struct spi_s { LPC_SSP_TypeDef *spi; }; +#if DEVICE_CAN struct can_s { int index; }; +#endif #include "gpio_object.h" From e9f5c8d3caed87b87e35177f7fdd8ee306c33d42 Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Fri, 27 Sep 2013 18:56:11 -0700 Subject: [PATCH 004/117] Move README.md to LPC11XX_11CXX common --- .../TARGET_LPC11XX_11CXX/{TARGET_LPC11XX => }/README.md | 3 ++- .../TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md | 4 ---- 2 files changed, 2 insertions(+), 5 deletions(-) rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/{TARGET_LPC11XX => }/README.md (60%) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/README.md b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/README.md similarity index 60% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/README.md rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/README.md index b1e431268e..ba7c05892a 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/README.md +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/README.md @@ -1,3 +1,4 @@ -LPC1114 Port +LPC1114/LPC11C24 Port -------------- A port of the MBED SDK to the NXP LPC1114 by Yoshihiro Tsuboi, Toyomasa Watarai and Matthew Else. +Extra, LPC11C24-specific things added by Joris Aerts. \ No newline at end of file diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md deleted file mode 100644 index 0031266b9e..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/README.md +++ /dev/null @@ -1,4 +0,0 @@ -LPC11C24 Port --------------- -Based on a port of the MBED SDK to the NXP LPC1114 by Yoshihiro Tsuboi, Toyomasa Watarai and Matthew Else. -Extra, LPC11C24-specific things added by Joris Aerts. \ No newline at end of file From e1967755a5ceb563da4a1bf3c6c7d5fedf84db8d Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Fri, 27 Sep 2013 19:10:08 -0700 Subject: [PATCH 005/117] Move spi_pinmap.h to LPC11XX_11CXX common Merge back into spi_api.c. P0_10/SPI_0 (SWCLK) now disabled for both targets --- .../TARGET_LPC11CXX/spi_pinmap.h | 34 ------------------- .../TARGET_LPC11XX/spi_pinmap.h | 33 ------------------ .../TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c | 26 +++++++++++++- 3 files changed, 25 insertions(+), 68 deletions(-) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h deleted file mode 100644 index 03dbb35095..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/spi_pinmap.h +++ /dev/null @@ -1,34 +0,0 @@ -// SPI pin mappings for LPC11CXX -// This should be included ONLY from spi_api.c - -#ifndef SPI_PINMAP_H -#define SPI_PINMAP_H - -static const PinMap PinMap_SPI_SCLK[] = { - {P0_6 , SPI_0, 0x02}, - {P0_10, SPI_0, 0x02}, - {P2_11, SPI_0, 0x01}, - {P2_1 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MOSI[] = { - {P0_9 , SPI_0, 0x01}, - {P2_3 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MISO[] = { - {P0_8 , SPI_0, 0x01}, - {P2_2 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_SSEL[] = { - {P0_2 , SPI_0, 0x01}, - {P2_0 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -#endif - diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h deleted file mode 100644 index da5ca3d48b..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/spi_pinmap.h +++ /dev/null @@ -1,33 +0,0 @@ -// SPI pin mappings for LPC11XX -// This should be included ONLY from spi_api.c - -#ifndef SPI_PINMAP_H -#define SPI_PINMAP_H - -static const PinMap PinMap_SPI_SCLK[] = { - {P0_6 , SPI_0, 0x02}, - {P2_11, SPI_0, 0x01}, - {P2_1 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MOSI[] = { - {P0_9 , SPI_0, 0x01}, - {P2_3 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_MISO[] = { - {P0_8 , SPI_0, 0x01}, - {P2_2 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -static const PinMap PinMap_SPI_SSEL[] = { - {P0_2 , SPI_0, 0x01}, - {P2_0 , SPI_1, 0x02}, - {NC , NC , 0} -}; - -#endif - diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c index ed9ed02381..5b62c98d53 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c @@ -19,7 +19,31 @@ #include "pinmap.h" #include "error.h" -#include "spi_pinmap.h" +static const PinMap PinMap_SPI_SCLK[] = { + {P0_6 , SPI_0, 0x02}, + // {P0_10, SPI_0, 0x02}, -- should be mapped to SWCLK only + {P2_11, SPI_0, 0x01}, + {P2_1 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MOSI[] = { + {P0_9 , SPI_0, 0x01}, + {P2_3 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_MISO[] = { + {P0_8 , SPI_0, 0x01}, + {P2_2 , SPI_1, 0x02}, + {NC , NC , 0} +}; + +static const PinMap PinMap_SPI_SSEL[] = { + {P0_2 , SPI_0, 0x01}, + {P2_0 , SPI_1, 0x02}, + {NC , NC , 0} +}; static inline int ssp_disable(spi_t *obj); static inline int ssp_enable(spi_t *obj); From 2ca3195b17ea5311de0a77bd9e3f836e16a6da6d Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Sun, 29 Sep 2013 18:53:57 +0200 Subject: [PATCH 006/117] NVIC offset and address in RAM correction --- .../TARGET_KL46Z/TOOLCHAIN_GCC_ARM/MKL46Z4.ld | 6 +++--- .../cmsis/TARGET_Freescale/TARGET_KL46Z/cmsis_nvic.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_GCC_ARM/MKL46Z4.ld b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_GCC_ARM/MKL46Z4.ld index 6c59fec5e5..6f20f32126 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_GCC_ARM/MKL46Z4.ld +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_GCC_ARM/MKL46Z4.ld @@ -1,13 +1,13 @@ /* - * KL25Z ARM GCC linker script file + * KL46Z ARM GCC linker script file */ MEMORY { VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400 - FLASH_PROTECTION (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010 + FLASH_PROTECTION (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010 FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x00000410 - RAM (rwx) : ORIGIN = 0x1FFFE000, LENGTH = 32K + RAM (rwx) : ORIGIN = 0x1FFFE0C0, LENGTH = 32K - 0xC0 } /* Linker script to place sections and symbol values. Should be used together diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/cmsis_nvic.c index a15284bf92..8d64306859 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/cmsis_nvic.c @@ -2,10 +2,10 @@ * Copyright (c) 2011 ARM Limited. All rights reserved. * * CMSIS-style functionality to support dynamic vectors - */ + */ #include "cmsis_nvic.h" -#define NVIC_RAM_VECTOR_ADDRESS (0x1FFFF000) // Vectors positioned at start of RAM +#define NVIC_RAM_VECTOR_ADDRESS (0x1FFFE000) // Vectors positioned at start of RAM #define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { From b83fd7fb3b4bb4af45bb5b74e23dab1ab73546a2 Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Sun, 29 Sep 2013 20:04:56 +0200 Subject: [PATCH 007/117] MUX corrections, Arduino Analog signals - added new MUX options to all drivers - removal of LED which are not there - analog arduino R3 signals were switched --- .../TARGET_Freescale/TARGET_KL46Z/PinNames.h | 17 +++---- .../TARGET_KL46Z/pwmout_api.c | 21 ++++----- .../TARGET_Freescale/TARGET_KL46Z/rtc_api.c | 2 +- .../TARGET_KL46Z/serial_api.c | 44 ++++++++++--------- .../TARGET_Freescale/TARGET_KL46Z/spi_api.c | 7 +++ 5 files changed, 50 insertions(+), 41 deletions(-) diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h index 10ec9a2622..d4450f7bc2 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h @@ -193,13 +193,10 @@ typedef enum { LED_RED = PTE29, LED_GREEN = PTD5, - LED_BLUE = PTD5, // mbed original LED naming LED1 = LED_GREEN, LED2 = LED_RED, - LED3 = LED_GREEN, - LED4 = LED_RED, // USB Pins USBTX = PTA2, @@ -223,18 +220,18 @@ typedef enum { D14 = PTE0, D15 = PTE1, - A0 = PTC1, - A1 = PTC2, - A2 = PTB3, - A3 = PTB2, - A4 = PTB1, - A5 = PTB0, + A0 = PTB0, + A1 = PTB1, + A2 = PTB2, + A3 = PTB3, + A4 = PTC2, + A5 = PTC1, // Not connected NC = (int)0xFFFFFFFF } PinName; -/* PullDown not available for KL25 */ +/* PullDown not available for KL46 */ typedef enum { PullNone = 0, PullUp = 2, diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/pwmout_api.c index 4265c8e5bc..722bc43f9c 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/pwmout_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/pwmout_api.c @@ -20,29 +20,29 @@ #include "error.h" static const PinMap PinMap_PWM[] = { - // LEDs - {LED_RED , PWM_9 , 3}, // PTB18, TPM2 CH0 - {LED_GREEN, PWM_10, 3}, // PTB19, TPM2 CH1 - {LED_BLUE , PWM_2 , 4}, // PTD1 , TPM0 CH1 + // LEDs - only RED pin is PWM capable + {LED_RED, PWM_3, 3}, // PTE29, TPM0 CH2 // Arduino digital pinout {D0, PWM_9 , 3}, // PTA1 , TPM2 CH0 {D1, PWM_10, 3}, // PTA2 , TPM2 CH1 - {D2, PWM_5 , 4}, // PTD4 , TPM0 CH4 + {D2, PWM_4 , 4}, // PTD3 , TPM0 CH3 {D3, PWM_7 , 3}, // PTA12, TPM1 CH0 {D4, PWM_2 , 3}, // PTA4 , TPM0 CH1 {D5, PWM_3 , 3}, // PTA5 , TPM0 CH2 {D6, PWM_5 , 3}, // PTC8 , TPM0 CH4 {D7, PWM_6 , 3}, // PTC9 , TPM0 CH5 {D8, PWM_8 , 3}, // PTA13, TPM1 CH1 - {D9, PWM_6 , 4}, // PTD5 , TPM0 CH5 - {D10, PWM_1 , 4}, // PTD0 , TPM0 CH0 - {D11, PWM_3 , 4}, // PTD2 , TPM0 CH2 - {D12, PWM_4 , 4}, // PTD3 , TPM0 CH3 - {D13, PWM_2 , 4}, // PTD1 , TPM0 CH1, + {D9, PWM_3 , 4}, // PTD2 , TPM0 CH2 + {D10, PWM_5 , 4}, // PTD4 , TPM0 CH4 + //PWM on D11 not available + //PWM on D12 not available + {D13, PWM_2 , 4}, // PTD5 , TPM0 CH1, {PTA0, PWM_6, 3}, {PTA3, PWM_1, 3}, + {PTA6, PWM_4, 3}, + {PTA7, PWM_5, 3}, {PTB0, PWM_7, 3}, {PTB1, PWM_8, 3}, {PTB2, PWM_9, 3}, @@ -57,6 +57,7 @@ static const PinMap PinMap_PWM[] = { {PTE23, PWM_10, 3}, {PTE24, PWM_1, 3}, {PTE25, PWM_2, 3}, + {PTE26, PWM_6, 3}, {PTE29, PWM_3, 3}, {PTE30, PWM_4, 3}, {PTE31, PWM_5, 3}, diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/rtc_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/rtc_api.c index 0402f585bd..90765ac118 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/rtc_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/rtc_api.c @@ -24,7 +24,7 @@ static void init(void) { /* * configure PTC1 with alternate function 1: RTC_CLKIN - * As the kl25z board does not have a 32kHz osc, + * As the KL46Z board does not have a 32kHz osc, * we use an external clock generated by the * interface chip */ diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c index 0d360060be..a942af1caa 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c @@ -28,26 +28,30 @@ * INITIALIZATION ******************************************************************************/ static const PinMap PinMap_UART_TX[] = { - {PTC4, UART_1, 3}, {PTA2, UART_0, 2}, - {PTD5, UART_2, 3}, + {PTA14, UART_0, 3} + {PTC4, UART_1, 3}, {PTD3, UART_2, 3}, + {PTD5, UART_2, 3}, {PTD7, UART_0, 3}, + {PTE0, UART_1, 3}, + {PTE16, UART_2, 3}, {PTE20, UART_0, 4}, {PTE22, UART_2, 4}, - {PTE0, UART_1, 3}, {NC , NC , 0} }; static const PinMap PinMap_UART_RX[] = { - {PTC3, UART_1, 3}, {PTA1, UART_0, 2}, - {PTD4, UART_2, 3}, + {PTA15, UART_0, 3}, + {PTC3, UART_1, 3}, {PTD2, UART_2, 3}, + {PTD4, UART_2, 3}, {PTD6, UART_0, 3}, - {PTE23, UART_2, 4}, - {PTE21, UART_0, 4}, {PTE1, UART_1, 3}, + {PTE17, UART_2, 3}, + {PTE21, UART_0, 4}, + {PTE23, UART_2, 4}, {NC , NC , 0} }; @@ -77,7 +81,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { } // Disable UART before changing registers obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK); - + switch (uart) { case UART_0: obj->index = 0; break; case UART_1: obj->index = 1; break; @@ -122,13 +126,13 @@ void serial_free(serial_t *obj) { // DivAddVal < MulVal // void serial_baud(serial_t *obj, int baudrate) { - + // save C2 state uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK)); - + // Disable UART before changing registers obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK); - + // [TODO] not hardcode this value uint32_t PCLK = (obj->uart == UART0) ? 48000000u : 24000000u; @@ -143,20 +147,20 @@ void serial_baud(serial_t *obj, int baudrate) { // set BDH and BDL obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f); obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff); - + // restore C2 state obj->uart->C2 |= c2_state; } void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) { uint8_t m10 = 0; - + // save C2 state uint8_t c2_state = (obj->uart->C2 & (UART_C2_RE_MASK | UART_C2_TE_MASK)); - + // Disable UART before changing registers obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK); - + // 8 data bits = 0 ... 9 data bits = 1 if ((data_bits < 8) || (data_bits > 9)) { error("Invalid number of bits (%d) in serial format, should be 8..9\r\n", data_bits); @@ -178,7 +182,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b error("Invalid stop bits specified\r\n"); } stop_bits -= 1; - + // 9 data bits + parity if (data_bits == 2) { // only uart0 supports 10 bit communication @@ -193,17 +197,17 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b obj->uart->C1 = ((data_bits << 4) | (parity_enable << 1) | (parity_select << 0)); - + // enable 10bit mode if needed if (obj->index == 0) { obj->uart->C4 &= ~UARTLP_C4_M10_MASK; obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT); } - + // stop bits obj->uart->BDH &= ~UART_BDH_SBNS_MASK; obj->uart->BDH |= (stop_bits << UART_BDH_SBNS_SHIFT); - + // restore C2 state obj->uart->C2 |= c2_state; } @@ -304,7 +308,7 @@ void serial_pinout_tx(PinName tx) { } void serial_break_set(serial_t *obj) { - obj->uart->C2 |= UART_C2_SBK_MASK; + obj->uart->C2 |= UART_C2_SBK_MASK; } void serial_break_clear(serial_t *obj) { diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c index 20a953aec7..e76c5aa137 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c @@ -23,11 +23,13 @@ static const PinMap PinMap_SPI_SCLK[] = { {PTA15, SPI_0, 2}, + {PTB9, SPI_1, 2}, {PTB11, SPI_1, 2}, {PTC5, SPI_0, 2}, {PTD1, SPI_0, 2}, {PTD5, SPI_1, 2}, {PTE2, SPI_1, 2}, + {PTE17, SPI_0, 2}, {NC , NC , 0} }; @@ -44,6 +46,8 @@ static const PinMap PinMap_SPI_MOSI[] = { {PTD7, SPI_1, 5}, {PTE1, SPI_1, 2}, {PTE3, SPI_1, 5}, + {PTE18, SPI_0, 2}, + {PTE19, SPI_0, 5}, {NC , NC , 0} }; @@ -60,6 +64,8 @@ static const PinMap PinMap_SPI_MISO[] = { {PTD7, SPI_1, 2}, {PTE1, SPI_1, 5}, {PTE3, SPI_1, 2}, + {PTE18, SPI_0, 5}, + {PTE19, SPI_0, 2}, {NC , NC , 0} }; @@ -70,6 +76,7 @@ static const PinMap PinMap_SPI_SSEL[] = { {PTD0, SPI_0, 2}, {PTD4, SPI_1, 2}, {PTE4, SPI_1, 2}, + {PTE16, SPI_0, 2}, {NC , NC , 0} }; From 5dcd8ea10e61abcc5da40fdb9452e611cfa4bc12 Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Sun, 29 Sep 2013 20:40:06 +0200 Subject: [PATCH 008/117] ARM (KEIL) files for KL46Z --- .../TOOLCHAIN_ARM_STD/MKL46Z4.sct | 14 + .../TOOLCHAIN_ARM_STD/startup_MKL46Z4.s | 380 ++++++++++++++++++ .../TARGET_KL46Z/TOOLCHAIN_ARM_STD/sys.cpp | 31 ++ .../TARGET_KL46Z/serial_api.c | 2 +- workspace_tools/targets.py | 132 +++--- 5 files changed, 492 insertions(+), 67 deletions(-) create mode 100644 libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct create mode 100644 libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s create mode 100644 libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/sys.cpp diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct new file mode 100644 index 0000000000..6c400aa8b6 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -0,0 +1,14 @@ + +LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) + ER_IROM1 0x00000000 0x40000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 + ; 0x4000 - 0xC0 = 0x3F40 + RW_IRAM1 0x1FFFE0C0 0x3F40 { + .ANY (+RW +ZI) + } +} + diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s new file mode 100644 index 0000000000..548d19e1c1 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s @@ -0,0 +1,380 @@ +;/***************************************************************************** +; * @file: startup_MKL46Z4.s +; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the +; * MKL46Z4 +; * @version: 2.0 +; * @date: 2012-12-12 +; * +; * Copyright: 1997 - 2013 Freescale Semiconductor, Inc. All Rights Reserved. +;* +; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +; * +; *****************************************************************************/ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD DMA0_IRQHandler ; DMA channel 0 transfer complete/error interrupt + DCD DMA1_IRQHandler ; DMA channel 1 transfer complete/error interrupt + DCD DMA2_IRQHandler ; DMA channel 2 transfer complete/error interrupt + DCD DMA3_IRQHandler ; DMA channel 3 transfer complete/error interrupt + DCD Reserved20_IRQHandler ; Reserved interrupt 20 + DCD FTFA_IRQHandler ; FTFA command complete/read collision interrupt + DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning + DCD LLW_IRQHandler ; Low Leakage Wakeup + DCD I2C0_IRQHandler ; I2C0 interrupt + DCD I2C1_IRQHandler ; I2C0 interrupt 25 + DCD SPI0_IRQHandler ; SPI0 interrupt + DCD SPI1_IRQHandler ; SPI1 interrupt + DCD UART0_IRQHandler ; UART0 status/error interrupt + DCD UART1_IRQHandler ; UART1 status/error interrupt + DCD UART2_IRQHandler ; UART2 status/error interrupt + DCD ADC0_IRQHandler ; ADC0 interrupt + DCD CMP0_IRQHandler ; CMP0 interrupt + DCD TPM0_IRQHandler ; TPM0 fault, overflow and channels interrupt + DCD TPM1_IRQHandler ; TPM1 fault, overflow and channels interrupt + DCD TPM2_IRQHandler ; TPM2 fault, overflow and channels interrupt + DCD RTC_IRQHandler ; RTC interrupt + DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt + DCD PIT_IRQHandler ; PIT timer interrupt + DCD I2S0_IRQHandler ; I2S0 transmit interrupt + DCD USB0_IRQHandler ; USB0 interrupt + DCD DAC0_IRQHandler ; DAC0 interrupt + DCD TSI0_IRQHandler ; TSI0 interrupt + DCD MCG_IRQHandler ; MCG interrupt + DCD LPTimer_IRQHandler ; LPTimer interrupt + DCD LCD_IRQHandler ; Segment LCD Interrupt + DCD PORTA_IRQHandler ; Port A interrupt + DCD PORTD_IRQHandler ; Port D interrupt +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + +; Flash Configuration +; 16-byte flash configuration field that stores default protection settings (loaded on reset) +; and security information that allows the MCU to restrict acces to the FTFL module. +; Backdoor Comparison Key +; Backdoor Key 0 <0x0-0xFF:2> +; Backdoor Key 1 <0x0-0xFF:2> +; Backdoor Key 2 <0x0-0xFF:2> +; Backdoor Key 3 <0x0-0xFF:2> +; Backdoor Key 4 <0x0-0xFF:2> +; Backdoor Key 5 <0x0-0xFF:2> +; Backdoor Key 6 <0x0-0xFF:2> +; Backdoor Key 7 <0x0-0xFF:2> +BackDoorK0 EQU 0xFF +BackDoorK1 EQU 0xFF +BackDoorK2 EQU 0xFF +BackDoorK3 EQU 0xFF +BackDoorK4 EQU 0xFF +BackDoorK5 EQU 0xFF +BackDoorK6 EQU 0xFF +BackDoorK7 EQU 0xFF +; +; Program flash protection bytes (FPROT) +; Each program flash region can be protected from program and erase operation by setting the associated PROT bit. +; Each bit protects a 1/32 region of the program flash memory. +; FPROT0 +; Program flash protection bytes +; 1/32 - 8/32 region +; FPROT0.0 +; FPROT0.1 +; FPROT0.2 +; FPROT0.3 +; FPROT0.4 +; FPROT0.5 +; FPROT0.6 +; FPROT0.7 +nFPROT0 EQU 0x00 +FPROT0 EQU nFPROT0:EOR:0xFF +; +; FPROT1 +; Program Flash Region Protect Register 1 +; 9/32 - 16/32 region +; FPROT1.0 +; FPROT1.1 +; FPROT1.2 +; FPROT1.3 +; FPROT1.4 +; FPROT1.5 +; FPROT1.6 +; FPROT1.7 +nFPROT1 EQU 0x00 +FPROT1 EQU nFPROT1:EOR:0xFF +; +; FPROT2 +; Program Flash Region Protect Register 2 +; 17/32 - 24/32 region +; FPROT2.0 +; FPROT2.1 +; FPROT2.2 +; FPROT2.3 +; FPROT2.4 +; FPROT2.5 +; FPROT2.6 +; FPROT2.7 +nFPROT2 EQU 0x00 +FPROT2 EQU nFPROT2:EOR:0xFF +; +; FPROT3 +; Program Flash Region Protect Register 3 +; 25/32 - 32/32 region +; FPROT3.0 +; FPROT3.1 +; FPROT3.2 +; FPROT3.3 +; FPROT3.4 +; FPROT3.5 +; FPROT3.6 +; FPROT3.7 +nFPROT3 EQU 0x00 +FPROT3 EQU nFPROT3:EOR:0xFF +; +; +; +; Flash nonvolatile option byte (FOPT) +; Allows the user to customize the operation of the MCU at boot time. +; LPBOOT0 +; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x3 (divide by 4) +; <1=> Core and system clock divider (OUTDIV1) is 0x1 (divide by 2) or 0x0 (divide by 1) +; LPBOOT1 +; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x1 (divide by 2) +; <1=> Core and system clock divider (OUTDIV1) is 0x3 (divide by 4) or 0x0 (divide by 1) +; NMI_DIS +; <0=> NMI interrupts are always blocked +; <1=> NMI pin/interrupts reset default to enabled +; RESET_PIN_CFG +; <0=> RESET pin is disabled following a POR and cannot be enabled as RESET function +; <1=> RESET pin is dedicated +; FAST_INIT +; <0=> Slower initialization +; <1=> Fast Initialization +FOPT EQU 0xFF +; +; Flash security byte (FSEC) +; WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled", +; MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!! +; SEC +; <2=> MCU security status is unsecure +; <3=> MCU security status is secure +; Flash Security +; This bits define the security state of the MCU. +; FSLACC +; <2=> Freescale factory access denied +; <3=> Freescale factory access granted +; Freescale Failure Analysis Access Code +; This bits define the security state of the MCU. +; MEEN +; <2=> Mass erase is disabled +; <3=> Mass erase is enabled +; Mass Erase Enable Bits +; Enables and disables mass erase capability of the FTFL module +; KEYEN +; <2=> Backdoor key access enabled +; <3=> Backdoor key access disabled +; Backdoor key Security Enable +; These bits enable and disable backdoor key access to the FTFL module. +FSEC EQU 0xFE +; + + IF :LNOT::DEF:RAM_TARGET + AREA |.ARM.__at_0x400|, CODE, READONLY + DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3 + DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7 + DCB FPROT0, FPROT1, FPROT2, FPROT3 + DCB FSEC, FOPT, 0xFF, 0xFF + ENDIF + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + EXPORT DMA0_IRQHandler [WEAK] + EXPORT DMA1_IRQHandler [WEAK] + EXPORT DMA2_IRQHandler [WEAK] + EXPORT DMA3_IRQHandler [WEAK] + EXPORT Reserved20_IRQHandler [WEAK] + EXPORT FTFA_IRQHandler [WEAK] + EXPORT LVD_LVW_IRQHandler [WEAK] + EXPORT LLW_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT SPI0_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT ADC0_IRQHandler [WEAK] + EXPORT CMP0_IRQHandler [WEAK] + EXPORT TPM0_IRQHandler [WEAK] + EXPORT TPM1_IRQHandler [WEAK] + EXPORT TPM2_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT RTC_Seconds_IRQHandler [WEAK] + EXPORT PIT_IRQHandler [WEAK] + EXPORT I2S0_IRQHandler [WEAK] + EXPORT USB0_IRQHandler [WEAK] + EXPORT DAC0_IRQHandler [WEAK] + EXPORT TSI0_IRQHandler [WEAK] + EXPORT MCG_IRQHandler [WEAK] + EXPORT LPTimer_IRQHandler [WEAK] + EXPORT LCD_IRQHandler [WEAK] + EXPORT PORTA_IRQHandler [WEAK] + EXPORT PORTD_IRQHandler [WEAK] + EXPORT DefaultISR [WEAK] + +DMA0_IRQHandler +DMA1_IRQHandler +DMA2_IRQHandler +DMA3_IRQHandler +Reserved20_IRQHandler +FTFA_IRQHandler +LVD_LVW_IRQHandler +LLW_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +SPI0_IRQHandler +SPI1_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +ADC0_IRQHandler +CMP0_IRQHandler +TPM0_IRQHandler +TPM1_IRQHandler +TPM2_IRQHandler +RTC_IRQHandler +RTC_Seconds_IRQHandler +PIT_IRQHandler +I2S0_IRQHandler +USB0_IRQHandler +DAC0_IRQHandler +TSI0_IRQHandler +MCG_IRQHandler +LPTimer_IRQHandler +LCD_IRQHandler +PORTA_IRQHandler +PORTD_IRQHandler +DefaultISR + + B . + + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/sys.cpp new file mode 100644 index 0000000000..2f1024ace8 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/sys.cpp @@ -0,0 +1,31 @@ +/* mbed Microcontroller Library - stackheap + * Copyright (C) 2009-2011 ARM Limited. All rights reserved. + * + * Setup a fixed single stack/heap memory model, + * between the top of the RW/ZI region and the stackpointer + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +extern char Image$$RW_IRAM1$$ZI$$Limit[]; + +extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { + uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit; + uint32_t sp_limit = __current_sp(); + + zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned + + struct __initial_stackheap r; + r.heap_base = zi_limit; + r.heap_limit = sp_limit; + return r; +} + +#ifdef __cplusplus +} +#endif diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c index a942af1caa..3414e47ee3 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c @@ -29,7 +29,7 @@ ******************************************************************************/ static const PinMap PinMap_UART_TX[] = { {PTA2, UART_0, 2}, - {PTA14, UART_0, 3} + {PTA14, UART_0, 3}, {PTC4, UART_1, 3}, {PTD3, UART_2, 3}, {PTD5, UART_2, 3}, diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index b22c237a18..79d5e99862 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -30,21 +30,21 @@ class Target: def __init__(self): # ARM Core self.core = None - + # Is the disk provided by the interface chip of this board virtual? self.is_disk_virtual = False - + # list of toolchains that are supported by the mbed SDK for this target self.supported_toolchains = None - + # list of extra specific labels self.extra_labels = [] - + self.name = self.__class__.__name__ - + def program_cycle_s(self): return 4 if self.is_disk_virtual else 1.5 - + def get_labels(self): return [self.name, CORE_LABELS[self.core]] + self.extra_labels @@ -54,119 +54,119 @@ class Target: class LPC2368(Target): def __init__(self): Target.__init__(self) - + self.core = "ARM7TDMI-S" - + self.extra_labels = ['NXP', 'LPC23XX'] - + self.supported_toolchains = ["ARM","GCC_ARM","GCC_CR"] class LPC1768(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M3" - + self.extra_labels = ['NXP', 'LPC176X'] - + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"] class LPC11U24(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0" - + self.extra_labels = ['NXP', 'LPC11UXX', 'LPC11U24_401'] - + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] class LPC11U24_301(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0" - + self.extra_labels = ['NXP', 'LPC11UXX'] - + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] class KL05Z(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['Freescale'] - + self.supported_toolchains = ["ARM"] - + self.is_disk_virtual = True class KL25Z(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['Freescale'] - + self.supported_toolchains = ["ARM", "GCC_CW_EWL", "GCC_CW_NEWLIB", "GCC_ARM"] - + self.is_disk_virtual = True class KL46Z(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['Freescale'] - - self.supported_toolchains = ["GCC_ARM"] - + + self.supported_toolchains = ["GCC_ARM", "ARM"] + self.is_disk_virtual = True class LPC812(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['NXP', 'LPC81X', 'LPC81X_COMMON'] - + self.supported_toolchains = ["uARM"] - + self.is_disk_virtual = True class LPC810(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['NXP', 'LPC81X', 'LPC81X_COMMON'] - + self.supported_toolchains = ["uARM"] - + self.is_disk_virtual = True class LPC4088(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M4" - + self.extra_labels = ['NXP', 'LPC408X'] - + self.supported_toolchains = ["ARM", "GCC_CR"] # Use this target to generate the custom binary image for LPC4088 EA boards @@ -209,88 +209,88 @@ class LPC4088_EA(LPC4088): class LPC4330_M4(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M4" - + self.extra_labels = ['NXP', 'LPC43XX'] - + self.supported_toolchains = ["ARM", "GCC_CR", "IAR"] class LPC4330_M0(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0" - + self.extra_labels = ['NXP', 'LPC43XX'] - + self.supported_toolchains = ["ARM", "GCC_CR", "IAR"] class LPC1800(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M3" - + self.extra_labels = ['NXP', 'LPC43XX'] - + self.supported_toolchains = ["ARM", "GCC_CR", "IAR"] class STM32F407(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M4" - + self.extra_labels = ['STM', 'STM32F4XX'] - + self.supported_toolchains = ["ARM", "GCC_ARM"] class MBED_MCU(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0+" - + self.extra_labels = ['ARM'] - + self.supported_toolchains = ["ARM"] class LPC1347(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M3" - + self.extra_labels = ['NXP', 'LPC13XX'] - + self.supported_toolchains = ["ARM", "GCC_ARM"] class LPC1114(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0" - + self.extra_labels = ['NXP', 'LPC11XX'] - + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] class LPC11C24(Target): def __init__(self): Target.__init__(self) - + self.core = "Cortex-M0" - + self.extra_labels = ['NXP', 'LPC11CXX'] - + self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"] class LPC11U35_401(Target): From 8df14cadc90772ce0724f4773c433afab497090b Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Sun, 29 Sep 2013 22:36:50 +0200 Subject: [PATCH 009/117] scatter file - 32kb RAM, startup - removed heap, stack init - clock set to 1 (external crystal) --- .../TOOLCHAIN_ARM_STD/MKL46Z4.sct | 4 +- .../TOOLCHAIN_ARM_STD/startup_MKL46Z4.s | 50 +------------------ .../TARGET_KL46Z/system_MKL46Z4.c | 2 +- 3 files changed, 4 insertions(+), 52 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct index 6c400aa8b6..82ddfb8786 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/MKL46Z4.sct @@ -6,8 +6,8 @@ LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) .ANY (+RO) } ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 0x4000 - 0xC0 = 0x3F40 - RW_IRAM1 0x1FFFE0C0 0x3F40 { + ; 0x8000 - 0xC0 = 0x7F40 + RW_IRAM1 0x1FFFE0C0 0x7F40 { .ANY (+RW +ZI) } } diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s index 548d19e1c1..b690a22a6d 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/TOOLCHAIN_ARM_STD/startup_MKL46Z4.s @@ -12,28 +12,7 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - +__initial_sp EQU 0x20006000 ; Top of RAM PRESERVE8 THUMB @@ -350,31 +329,4 @@ DefaultISR ALIGN - - -; User Initial Stack & Heap - - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c index a6e037ef2c..0a3298c69b 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.c @@ -44,7 +44,7 @@ #define DISABLE_WDOG 1 -#define CLOCK_SETUP 0 +#define CLOCK_SETUP 1 /* Predefined clock setups 0 ... Multipurpose Clock Generator (MCG) in FLL Engaged Internal (FEI) mode Reference clock source for MCG module is the slow internal clock source 32.768kHz From 4d0c864b16bf83cfca4f4c00e3c42ab3e03095a3 Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Mon, 30 Sep 2013 08:07:26 -0700 Subject: [PATCH 010/117] Move adc_pinmap.h to LPC11XX_11CXX common Merge back into analog_api.c. P1_3/ADC0_4 (SWDIO) now disabled for both targets --- .../TARGET_LPC11CXX/adc_pinmap.h | 20 ------------------- .../TARGET_LPC11XX/adc_pinmap.h | 20 ------------------- .../TARGET_LPC11XX_11CXX/analogin_api.c | 12 ++++++++++- 3 files changed, 11 insertions(+), 41 deletions(-) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h deleted file mode 100644 index 2fc49f4add..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/adc_pinmap.h +++ /dev/null @@ -1,20 +0,0 @@ -// ADC pin mappings for LPC11CXX -// This should be included ONLY from analogin_api.c - -#ifndef ADC_PINMAP_H -#define ADC_PINMAP_H - -static const PinMap PinMap_ADC[] = { - {P0_11, ADC0_0, 2}, - {P1_0 , ADC0_1, 2}, - {P1_1 , ADC0_2, 2}, - {P1_2 , ADC0_3, 2}, - {P1_3 , ADC0_4, 2}, - {P1_4 , ADC0_5, 1}, - {P1_10, ADC0_6, 1}, - {P1_11, ADC0_7, 1}, - {NC , NC , 0} -}; - -#endif - diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h deleted file mode 100644 index d2a80e989e..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/adc_pinmap.h +++ /dev/null @@ -1,20 +0,0 @@ -// ADC pin mappings for LPC11XX -// This should be included ONLY from analogin_api.c - -#ifndef ADC_PINMAP_H -#define ADC_PINMAP_H - -static const PinMap PinMap_ADC[] = { - {P0_11, ADC0_0, 2}, - {P1_0 , ADC0_1, 2}, - {P1_1 , ADC0_2, 2}, - {P1_2 , ADC0_3, 2}, - // ADC0_4 (P1_3) should be mapped to SWDIO only - {P1_4 , ADC0_5, 1}, - {P1_10, ADC0_6, 1}, - {P1_11, ADC0_7, 1}, - {NC , NC , 0} -}; - -#endif - diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c index a5587eb5d0..1d8610a420 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/analogin_api.c @@ -18,7 +18,17 @@ #include "pinmap.h" #include "error.h" -#include "adc_pinmap.h" +static const PinMap PinMap_ADC[] = { + {P0_11, ADC0_0, 2}, + {P1_0 , ADC0_1, 2}, + {P1_1 , ADC0_2, 2}, + {P1_2 , ADC0_3, 2}, + // {P1_3 , ADC0_4, 2}, -- should be mapped to SWDIO only + {P1_4 , ADC0_5, 1}, + {P1_10, ADC0_6, 1}, + {P1_11, ADC0_7, 1}, + {NC , NC , 0} +}; #define ANALOGIN_MEDIAN_FILTER 1 From 7ed6acb08af49077649600e24262c2c63987a516 Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Mon, 30 Sep 2013 08:11:56 -0700 Subject: [PATCH 011/117] Move pwmout_api.c/PeripheralNames.h to LPC11XX_11CXX common Because CT32B1 (P1_1, P1_2 and P1_3) is used by us_ticker.c for wait and ticker function. Since wait/ticker is commonly used by mbed code and I decided CT32B1 of LPC11XX should only be used for this function, not for PwmOut. P1_6 and P1_7 are used by UART (USBTX/USBRX) and I think they should not be assigned to other function. --- .../{TARGET_LPC11XX => }/PeripheralNames.h | 0 .../TARGET_LPC11CXX/PeripheralNames.h | 71 ------- .../TARGET_LPC11CXX/pwmout_api.c | 193 ------------------ .../{TARGET_LPC11XX => }/pwmout_api.c | 0 4 files changed, 264 deletions(-) rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/{TARGET_LPC11XX => }/PeripheralNames.h (100%) delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h delete mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/{TARGET_LPC11XX => }/pwmout_api.c (100%) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/PeripheralNames.h similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/PeripheralNames.h rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/PeripheralNames.h diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h deleted file mode 100644 index e7eba416e5..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/PeripheralNames.h +++ /dev/null @@ -1,71 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef MBED_PERIPHERALNAMES_H -#define MBED_PERIPHERALNAMES_H - -#include "cmsis.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - UART_0 = (int)LPC_UART_BASE -} UARTName; - -typedef enum { - I2C_0 = (int)LPC_I2C_BASE -} I2CName; - -typedef enum { - ADC0_0 = 0, - ADC0_1, - ADC0_2, - ADC0_3, - ADC0_4, - ADC0_5, - ADC0_6, - ADC0_7 -} ADCName; - -typedef enum { - SPI_0 = (int)LPC_SSP0_BASE, - SPI_1 = (int)LPC_SSP1_BASE -} SPIName; - -typedef enum { - PWM_1 = 0, - PWM_2, - PWM_3, - PWM_4, - PWM_5, - PWM_6, - PWM_7, - PWM_8, - PWM_9, - PWM_10, - PWM_11 -} PWMName; - -#define STDIO_UART_TX USBTX -#define STDIO_UART_RX USBRX -#define STDIO_UART UART_0 - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c deleted file mode 100644 index 5cb2f8e54a..0000000000 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/pwmout_api.c +++ /dev/null @@ -1,193 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2006-2013 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "pwmout_api.h" -#include "cmsis.h" -#include "pinmap.h" -#include "error.h" - -#define TCR_CNT_EN 0x00000001 -#define TCR_RESET 0x00000002 - -/* To have a PWM where we can change both the period and the duty cycle, - * we need an entire timer. With the following conventions: - * * MR3 is used for the PWM period - * * MR0, MR1, MR2 are used for the duty cycle - */ -static const PinMap PinMap_PWM[] = { - /* CT16B0 */ - {P0_8 , PWM_1, 0x02}, /* MR0 */ - {P0_9 , PWM_2, 0x02}, /* MR1 */ - {P0_10, PWM_3, 0x03}, /* MR2 */ - - /* CT16B1 */ - {P1_9 , PWM_4, 0x01}, /* MR0 */ - {P1_10, PWM_5, 0x02}, /* MR1 */ - - /* CT32B0 */ - {P1_6 , PWM_6, 0x02}, /* MR0 */ - {P1_7 , PWM_7, 0x02}, /* MR1 */ - {P0_1 , PWM_8, 0x02}, /* MR2 */ - - /* CT32B1 */ - {P1_1 , PWM_9 ,0x03}, /* MR0 */ - {P1_2 , PWM_10,0x03}, /* MR1 */ - {P1_3 , PWM_11,0x03}, /* MR2 */ - - {NC , NC ,0x00} -}; - -typedef struct { - uint8_t timer; - uint8_t mr; -} timer_mr; - -static timer_mr pwm_timer_map[11] = { - {0, 0}, /* CT16B0, MR0 */ - {0, 1}, /* CT16B0, MR1 */ - {0, 2}, /* CT16B0, MR2 */ - - {1, 0}, /* CT16B1, MR0 */ - {1, 1}, /* CT16B1, MR1 */ - - {2, 0}, /* CT32B0, MR0 */ - {2, 1}, /* CT32B0, MR1 */ - {2, 2}, /* CT32B0, MR2 */ - - {3, 0}, /* CT32B1, MR0 */ - {3, 1}, /* CT32B1, MR1 */ - {3, 2} /* CT32B1, MR2 */ -}; - -static LPC_TMR_TypeDef *Timers[4] = { - LPC_TMR16B0, LPC_TMR16B1, - LPC_TMR32B0, LPC_TMR32B1 -}; - -static unsigned int pwm_clock_mhz; - -void pwmout_init(pwmout_t* obj, PinName pin) { - // determine the channel - PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM); - if (pwm == (uint32_t)NC) - error("PwmOut pin mapping failed"); - - obj->pwm = pwm; - - // Timer registers - timer_mr tid = pwm_timer_map[pwm]; - LPC_TMR_TypeDef *timer = Timers[tid.timer]; - - // Disable timer - timer->TCR = 0; - - // Power the correspondent timer - LPC_SYSCON->SYSAHBCLKCTRL |= 1 << (tid.timer + 7); - - /* Enable PWM function */ - timer->PWMC = (1 << 3)|(1 << 2)|(1 << 1)|(1 << 0); - - /* Reset Functionality on MR3 controlling the PWM period */ - timer->MCR = 1 << 10; - - pwm_clock_mhz = SystemCoreClock / 1000000; - - // default to 20ms: standard for servos, and fine for e.g. brightness control - pwmout_period_ms(obj, 20); - pwmout_write (obj, 0); - - // Wire pinout - pinmap_pinout(pin, PinMap_PWM); -} - -void pwmout_free(pwmout_t* obj) { - // [TODO] -} - -void pwmout_write(pwmout_t* obj, float value) { - if (value < 0.0f) { - value = 0.0; - } else if (value > 1.0f) { - value = 1.0; - } - - timer_mr tid = pwm_timer_map[obj->pwm]; - LPC_TMR_TypeDef *timer = Timers[tid.timer]; - uint32_t t_off = timer->MR3 - (uint32_t)((float)(timer->MR3) * value); - - timer->TCR = TCR_RESET; - timer->MR[tid.mr] = t_off; - timer->TCR = TCR_CNT_EN; -} - -float pwmout_read(pwmout_t* obj) { - timer_mr tid = pwm_timer_map[obj->pwm]; - LPC_TMR_TypeDef *timer = Timers[tid.timer]; - - float v = (float)(timer->MR3 - timer->MR[tid.mr]) / (float)(timer->MR3); - return (v > 1.0f) ? (1.0f) : (v); -} - -void pwmout_period(pwmout_t* obj, float seconds) { - pwmout_period_us(obj, seconds * 1000000.0f); -} - -void pwmout_period_ms(pwmout_t* obj, int ms) { - pwmout_period_us(obj, ms * 1000); -} - -// Set the PWM period, keeping the duty cycle the same. -void pwmout_period_us(pwmout_t* obj, int us) { - int i = 0; - uint32_t period_ticks = pwm_clock_mhz * us; - - timer_mr tid = pwm_timer_map[obj->pwm]; - LPC_TMR_TypeDef *timer = Timers[tid.timer]; - uint32_t old_period_ticks = timer->MR3; - - timer->TCR = TCR_RESET; - timer->MR3 = period_ticks; - - // Scale the pulse width to preserve the duty ratio - if (old_period_ticks > 0) { - for (i=0; i<3; i++) { - uint32_t t_off = period_ticks - (uint32_t)(((uint64_t)timer->MR[i] * (uint64_t)period_ticks) / (uint64_t)old_period_ticks); - timer->MR[i] = t_off; - } - } - timer->TCR = TCR_CNT_EN; -} - -void pwmout_pulsewidth(pwmout_t* obj, float seconds) { - pwmout_pulsewidth_us(obj, seconds * 1000000.0f); -} - -void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) { - pwmout_pulsewidth_us(obj, ms * 1000); -} - -void pwmout_pulsewidth_us(pwmout_t* obj, int us) { - uint32_t t_on = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000); - timer_mr tid = pwm_timer_map[obj->pwm]; - LPC_TMR_TypeDef *timer = Timers[tid.timer]; - - timer->TCR = TCR_RESET; - if (t_on > timer->MR3) { - pwmout_period_us(obj, us); - } - uint32_t t_off = timer->MR3 - t_on; - timer->MR[tid.mr] = t_off; - timer->TCR = TCR_CNT_EN; -} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/pwmout_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/pwmout_api.c similarity index 100% rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11XX/pwmout_api.c rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/pwmout_api.c From 44bb8e00e5da4498eb39dd05171af42f64cdc527 Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Tue, 1 Oct 2013 20:18:39 +0200 Subject: [PATCH 012/117] First passed tests for KL46 - spi is failing, need to fix it --- libraries/tests/mbed/analog/main.cpp | 4 ++++ libraries/tests/mbed/spi_master/main.cpp | 3 +++ libraries/tests/mbed/ticker/main.cpp | 2 ++ libraries/tests/mbed/ticker_2/main.cpp | 4 ++++ libraries/tests/mbed/time_us/main.cpp | 3 +++ libraries/tests/mbed/timeout/main.cpp | 3 +++ 6 files changed, 19 insertions(+) diff --git a/libraries/tests/mbed/analog/main.cpp b/libraries/tests/mbed/analog/main.cpp index 0df1d3ff4c..60341ae3f6 100644 --- a/libraries/tests/mbed/analog/main.cpp +++ b/libraries/tests/mbed/analog/main.cpp @@ -8,6 +8,10 @@ AnalogOut out(PTE30); AnalogIn in(PTB11); // D9 AnalogOut out(PTB1); // D1 +#elif defined(TARGET_KL46Z) +AnalogIn in(PTB0); +AnalogOut out(PTE30); + #else AnalogIn in(p17); AnalogOut out(p18); diff --git a/libraries/tests/mbed/spi_master/main.cpp b/libraries/tests/mbed/spi_master/main.cpp index f2d2a6f4e1..0d5a3fbb28 100644 --- a/libraries/tests/mbed/spi_master/main.cpp +++ b/libraries/tests/mbed/spi_master/main.cpp @@ -7,6 +7,9 @@ DigitalOut cs(PTA13); #elif defined(TARGET_KL05Z) SPI spi(PTA7, PTA6, PTB0); // mosi, miso, sclk DigitalOut cs(PTB1); +#elif defined(TARGET_KL46Z) +SPI spi(PTD2, PTD3, PTD1); // mosi, miso, sclk +DigitalOut cs(PTA13); #else SPI spi(p5, p6, p7); // mosi, miso, sclk DigitalOut cs(p8); diff --git a/libraries/tests/mbed/ticker/main.cpp b/libraries/tests/mbed/ticker/main.cpp index 09eb230d12..d34c5f1127 100644 --- a/libraries/tests/mbed/ticker/main.cpp +++ b/libraries/tests/mbed/ticker/main.cpp @@ -17,6 +17,8 @@ Ticker flipper_2; # define LED_NAME LED2 #elif defined(TARGET_KL05Z) # define LED_NAME LED2 +#elif defined(TARGET_KL46Z) +# define LED_NAME LED2 #else # define LED_NAME PTE31 #endif diff --git a/libraries/tests/mbed/ticker_2/main.cpp b/libraries/tests/mbed/ticker_2/main.cpp index 9b07e424fa..6d7e569673 100644 --- a/libraries/tests/mbed/ticker_2/main.cpp +++ b/libraries/tests/mbed/ticker_2/main.cpp @@ -11,6 +11,10 @@ DigitalOut out(D10); #elif TARGET_KL05Z DigitalOut out(PTB1); +#elif TARGET_KL46Z +DigitalOut out(PTA1); + + #else DigitalOut out(p5); #endif diff --git a/libraries/tests/mbed/time_us/main.cpp b/libraries/tests/mbed/time_us/main.cpp index 532bad7b14..549ae26d9d 100644 --- a/libraries/tests/mbed/time_us/main.cpp +++ b/libraries/tests/mbed/time_us/main.cpp @@ -6,6 +6,9 @@ DigitalOut out(PTD4); #elif TARGET_KL05Z DigitalOut out(PTB1); +#elif TARGET_KL46Z +DigitalOut out(PTA1); + #elif TARGET_LPC812 DigitalOut out(D10); diff --git a/libraries/tests/mbed/timeout/main.cpp b/libraries/tests/mbed/timeout/main.cpp index 7f46886efa..a496f0c502 100644 --- a/libraries/tests/mbed/timeout/main.cpp +++ b/libraries/tests/mbed/timeout/main.cpp @@ -8,6 +8,9 @@ DigitalOut out(PTA1); #elif TARGET_KL05Z DigitalOut out(PTB1); +#elif TARGET_KL46Z +DigitalOut out(PTA1); + #elif defined(TARGET_LPC812) DigitalOut out(P0_12); From d3963de05d9ddff98b9da2b2a1fee0d51fd9481e Mon Sep 17 00:00:00 2001 From: Dave Van Wagner <> Date: Wed, 9 Oct 2013 13:46:49 +0300 Subject: [PATCH 013/117] Added methods to retrieve gateway and netmask from DHCP assignment --- .../eth/EthernetInterface/EthernetInterface.cpp | 14 ++++++++++++++ .../net/eth/EthernetInterface/EthernetInterface.h | 10 ++++++++++ 2 files changed, 24 insertions(+) diff --git a/libraries/net/eth/EthernetInterface/EthernetInterface.cpp b/libraries/net/eth/EthernetInterface/EthernetInterface.cpp index 85df281b80..16c1a9704e 100644 --- a/libraries/net/eth/EthernetInterface/EthernetInterface.cpp +++ b/libraries/net/eth/EthernetInterface/EthernetInterface.cpp @@ -33,6 +33,8 @@ static struct netif lpcNetif; static char mac_addr[19]; static char ip_addr[17] = "\0"; +static char gateway[17] = "\0"; +static char networkmask[17] = "\0"; static bool use_dhcp = false; static Semaphore tcpip_inited(0); @@ -52,6 +54,8 @@ static void netif_link_callback(struct netif *netif) { static void netif_status_callback(struct netif *netif) { if (netif_is_up(netif)) { strcpy(ip_addr, inet_ntoa(netif->ip_addr)); + strcpy(gateway, inet_ntoa(netif->gw)); + strcpy(networkmask, inet_ntoa(netif->netmask)); netif_up.release(); } } @@ -142,3 +146,13 @@ char* EthernetInterface::getMACAddress() { char* EthernetInterface::getIPAddress() { return ip_addr; } + +char* EthernetInterface::getGateway() { + return gateway; +} + +char* EthernetInterface::getNetworkMask() { + return networkmask; +} + + diff --git a/libraries/net/eth/EthernetInterface/EthernetInterface.h b/libraries/net/eth/EthernetInterface/EthernetInterface.h index edbcaf88f3..3b9336e5a6 100644 --- a/libraries/net/eth/EthernetInterface/EthernetInterface.h +++ b/libraries/net/eth/EthernetInterface/EthernetInterface.h @@ -69,6 +69,16 @@ public: * \return a pointer to a string containing the IP address */ static char* getIPAddress(); + + /** Get the Gateway address of your Ethernet interface + * \return a pointer to a string containing the Gateway address + */ + static char* getGateway(); + + /** Get the Network mask of your Ethernet interface + * \return a pointer to a string containing the Network mask + */ + static char* getNetworkMask(); }; #include "TCPSocketConnection.h" From 330e59fb850b83aefe641d40f9cf02873ab00d08 Mon Sep 17 00:00:00 2001 From: Michael Ammann <> Date: Wed, 9 Oct 2013 15:10:14 +0300 Subject: [PATCH 014/117] make buffer big enough --- libraries/USBHost/USBHost/USBHost.cpp | 2 +- libraries/USBHost/USBHost/USBHost.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/USBHost/USBHost/USBHost.cpp b/libraries/USBHost/USBHost/USBHost.cpp index 036f19265c..3a4fef5ad4 100644 --- a/libraries/USBHost/USBHost/USBHost.cpp +++ b/libraries/USBHost/USBHost/USBHost.cpp @@ -852,7 +852,7 @@ USB_TYPE USBHost::enumerate(USBDeviceConnected * dev, IUSBEnumerator* pEnumerato pEnumerator->setVidPid( data[8] | (data[9] << 8), data[10] | (data[11] << 8) ); - res = getConfigurationDescriptor(dev, data, 300, &total_conf_descr_length); + res = getConfigurationDescriptor(dev, data, sizeof(data), &total_conf_descr_length); if (res != USB_TYPE_OK) { usb_mutex.unlock(); return res; diff --git a/libraries/USBHost/USBHost/USBHost.h b/libraries/USBHost/USBHost/USBHost.h index f332b52b04..39d59397ec 100644 --- a/libraries/USBHost/USBHost/USBHost.h +++ b/libraries/USBHost/USBHost/USBHost.h @@ -272,7 +272,7 @@ private: Mutex td_mutex; // buffer for conf descriptor - uint8_t data[300]; + uint8_t data[415]; /** * Add a transfer on the TD linked list associated to an ED From 3fc39b51a49bdabb11e47d8032d4a2d3eed2a96f Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 10 Oct 2013 11:31:09 +0100 Subject: [PATCH 015/117] Build after project rename --- workspace_tools/export/ds5_5_lpc1768.cproject.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl b/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl index 1157fcd167..1cf286f4d8 100644 --- a/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl +++ b/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl @@ -13,7 +13,7 @@ - + From f51de7be24362deb32d473da81a39591d7801509 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 10 Oct 2013 11:31:42 +0100 Subject: [PATCH 016/117] Add symbols --- workspace_tools/export/ds5_5_lpc1768.cproject.tmpl | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl b/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl index 1cf286f4d8..5a5fff4d49 100644 --- a/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl +++ b/workspace_tools/export/ds5_5_lpc1768.cproject.tmpl @@ -26,6 +26,11 @@ {% endfor %} @@ -69,6 +74,11 @@ + From f7425b4e7253be2c54657e4831acb268315f23c9 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 10 Oct 2013 11:32:29 +0100 Subject: [PATCH 017/117] Base project name on mbed project name --- workspace_tools/export/ds5_5_lpc1768.project.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/export/ds5_5_lpc1768.project.tmpl b/workspace_tools/export/ds5_5_lpc1768.project.tmpl index b5f6fcfc9f..4f892f370b 100644 --- a/workspace_tools/export/ds5_5_lpc1768.project.tmpl +++ b/workspace_tools/export/ds5_5_lpc1768.project.tmpl @@ -1,6 +1,6 @@ - ds5_lpc1768 + {{name}}_ds5_lpc1768 From a34c747a21b454668c57c33ee8e9257269318512 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 10 Oct 2013 11:38:02 +0100 Subject: [PATCH 018/117] Base DS-5 lpc11u24 project name on mbed project name --- workspace_tools/export/ds5_5_lpc11u24.project.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/export/ds5_5_lpc11u24.project.tmpl b/workspace_tools/export/ds5_5_lpc11u24.project.tmpl index fedc73660a..8ad8f0a24d 100644 --- a/workspace_tools/export/ds5_5_lpc11u24.project.tmpl +++ b/workspace_tools/export/ds5_5_lpc11u24.project.tmpl @@ -1,6 +1,6 @@ - ds5_lpc11u24 + {{name}}_ds5_lpc11u24 From a574fd73b3f184e90472adbe22b9aecc368cd134 Mon Sep 17 00:00:00 2001 From: Andreas Rebert Date: Fri, 11 Oct 2013 14:01:49 +0200 Subject: [PATCH 019/117] Bugfixes for I2C and port impl --- .../mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/i2c_api.c | 9 +++++++++ .../targets/hal/TARGET_NXP/TARGET_LPC408X/port_api.c | 3 ++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/i2c_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/i2c_api.c index e399f62b20..5619a51435 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/i2c_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/i2c_api.c @@ -122,6 +122,15 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) { pinmap_pinout(sda, PinMap_I2C_SDA); pinmap_pinout(scl, PinMap_I2C_SCL); + + // OpenDrain must explicitly be enabled for p0.0 and p0.1 + if (sda == P0_0) { + pin_mode(sda, OpenDrain); + } + if (scl == P0_1) { + pin_mode(scl, OpenDrain); + } + } inline int i2c_start(i2c_t *obj) { diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/port_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/port_api.c index 5f44eedd9e..8fe23e6dd0 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/port_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/port_api.c @@ -17,8 +17,9 @@ #include "pinmap.h" #include "gpio_api.h" + PinName port_pin(PortName port, int pin_n) { - return (PinName)(LPC_GPIO0_BASE + ((port << PORT_SHIFT) | pin_n)); + return (PinName)(((port << PORT_SHIFT) | pin_n)); } void port_init(port_t *obj, PortName port, int mask, PinDirection dir) { From 62f1ac097dcf96c9cbf9f96f503e8c8f0e7acf0f Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 14 Oct 2013 17:32:41 +0300 Subject: [PATCH 020/117] Integrated support for Red Lizzard's "goanna" static analysis tool Initial support (activate with "-o analyze"). Not working well with IAR for now (partially because of a bug in goannac++ which was reported to Red Lizzard). --- workspace_tools/options.py | 2 +- workspace_tools/toolchains/__init__.py | 12 +++++++++++- workspace_tools/toolchains/arm.py | 24 +++++++++++++++++++----- workspace_tools/toolchains/gcc.py | 26 +++++++++++++++++++++----- workspace_tools/toolchains/iar.py | 20 ++++++++++++++++---- 5 files changed, 68 insertions(+), 16 deletions(-) diff --git a/workspace_tools/options.py b/workspace_tools/options.py index 3ffabe8891..8ba8aff9d6 100644 --- a/workspace_tools/options.py +++ b/workspace_tools/options.py @@ -35,6 +35,6 @@ def get_default_options_parser(): help="clean the build directory") parser.add_option("-o", "--options", action="append", - help='Add a build option ("save-asm": save the asm generated by the compiler, "debug-info": generate debugging information)') + help='Add a build option ("save-asm": save the asm generated by the compiler, "debug-info": generate debugging information, "analyze": run static code analyzer")') return parser diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py index 352aa1f048..29fbf34f15 100644 --- a/workspace_tools/toolchains/__init__.py +++ b/workspace_tools/toolchains/__init__.py @@ -26,6 +26,7 @@ from workspace_tools.patch import patch from workspace_tools.settings import BUILD_OPTIONS import workspace_tools.hooks as hooks +import re def print_notify(event): # Default command line notification @@ -141,7 +142,10 @@ class mbedToolchain: "Cortex-M0+": ["__CORTEX_M0PLUS", "ARM_MATH_CM0"], "Cortex-M4" : ["__CORTEX_M4", "ARM_MATH_CM4", "__FPU_PRESENT=1"], } - + + GOANNA_FORMAT = "[Goanna] warning [%FILENAME%:%LINENO%] - [%CHECKNAME%(%SEVERITY%)] %MESSAGE%" + GOANNA_DIAGNOSTIC_PATTERN = re.compile(r'"\[Goanna\] (?Pwarning) \[(?P[^:]+):(?P\d+)\] \- (?P.*)"') + def __init__(self, target, options=None, notify=None): self.target = target self.name = self.__class__.__name__ @@ -168,6 +172,12 @@ class mbedToolchain: self.labels = None self.build_all = False + + def goanna_parse_line(self, line): + if "analyze" in self.options: + return self.GOANNA_DIAGNOSTIC_PATTERN.match(line) + else: + return None def get_symbols(self): if self.symbols is None: diff --git a/workspace_tools/toolchains/arm.py b/workspace_tools/toolchains/arm.py index df265d0f76..902d84edef 100644 --- a/workspace_tools/toolchains/arm.py +++ b/workspace_tools/toolchains/arm.py @@ -20,6 +20,7 @@ from os.path import join from workspace_tools.toolchains import mbedToolchain from workspace_tools.settings import ARM_BIN, ARM_INC, ARM_LIB, MY_ARM_CLIB, ARM_CPPLIB from workspace_tools.hooks import hook_tool +from workspace_tools.settings import GOANNA_PATH class ARM(mbedToolchain): LINKER_EXT = '.sct' @@ -39,7 +40,8 @@ class ARM(mbedToolchain): else: cpu = target.core - common = [join(ARM_BIN, "armcc"), "-c", + main_cc = join(ARM_BIN, "armcc") + common = ["-c", "--cpu=%s" % cpu, "--gnu", "-Ospace", "--split_sections", "--apcs=interwork", "--brief_diagnostics", "--restrict" @@ -56,9 +58,13 @@ class ARM(mbedToolchain): '-I%s' % ARM_INC ] - self.asm = common - self.cc = common + common_c + ["--c99"] - self.cppc = common + common_c + ["--cpp", "--no_rtti"] + self.asm = [main_cc] + common + if not "analyze" in self.options: + self.cc = [main_cc] + common + common_c + ["--c99"] + self.cppc = [main_cc] + common + common_c + ["--cpp", "--no_rtti"] + else: + self.cc = [join(GOANNA_PATH, "goannacc"), "--with-cc=" + main_cc.replace('\\', '/'), "--dialect=armcc", '--output-format="%s"' % self.GOANNA_FORMAT] + common + common_c + ["--c99"] + self.cppc= [join(GOANNA_PATH, "goannac++"), "--with-cxx=" + main_cc.replace('\\', '/'), "--dialect=armcc", '--output-format="%s"' % self.GOANNA_FORMAT] + common + common_c + ["--cpp", "--no_rtti"] self.ld = [join(ARM_BIN, "armlink")] self.sys_libs = [] @@ -92,7 +98,15 @@ class ARM(mbedToolchain): match.group('line'), match.group('message') ) - + match = self.goanna_parse_line(line) + if match is not None: + self.cc_info( + match.group('severity').lower(), + match.group('file'), + match.group('line'), + match.group('message') + ) + def archive(self, objects, lib_path): self.default_cmd([self.ar, '-r', lib_path] + objects) diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py index 014a8ff9e2..fef4c03fe7 100644 --- a/workspace_tools/toolchains/gcc.py +++ b/workspace_tools/toolchains/gcc.py @@ -19,7 +19,7 @@ from os.path import join, basename, splitext from workspace_tools.toolchains import mbedToolchain from workspace_tools.settings import GCC_ARM_PATH, GCC_CR_PATH, GCC_CS_PATH, CW_EWL_PATH, CW_GCC_PATH - +from workspace_tools.settings import GOANNA_PATH class GCC(mbedToolchain): LINKER_EXT = '.ld' @@ -59,11 +59,17 @@ class GCC(mbedToolchain): if "debug-info" in self.options: common_flags.append("-g") - + self.asm = [join(tool_path, "arm-none-eabi-as")] + self.cpu - - self.cc = [join(tool_path, "arm-none-eabi-gcc"), "-std=gnu99"] + common_flags - self.cppc =[join(tool_path, "arm-none-eabi-g++"), "-std=gnu++98"] + common_flags + + main_cc = join(tool_path, "arm-none-eabi-gcc") + main_cppc = join(tool_path, "arm-none-eabi-g++") + if not "analyze" in self.options: + self.cc = [main_cc, "-std=gnu99"] + common_flags + self.cppc =[main_cppc, "-std=gnu++98"] + common_flags + else: + self.cc = [join(GOANNA_PATH, "goannacc"), "--with-cc=" + main_cc.replace('\\', '/'), "-std=gnu99", "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + common_flags + self.cppc= [join(GOANNA_PATH, "goannac++"), "--with-cxx=" + main_cppc.replace('\\', '/'), "-std=gnu++98", "--dialect=gnu", '--output-format="%s"' % self.GOANNA_FORMAT] + common_flags self.ld = [join(tool_path, "arm-none-eabi-gcc"), "-Wl,--gc-sections", "-Wl,--wrap,main"] + self.cpu self.sys_libs = ["stdc++", "supc++", "m", "c", "gcc"] @@ -98,6 +104,16 @@ class GCC(mbedToolchain): WHERE, WHAT = 0, 1 state, file, message = WHERE, None, None for line in output.splitlines(): + match = self.goanna_parse_line(line) + if match is not None: + self.cc_info( + match.group('severity').lower(), + match.group('file'), + match.group('line'), + match.group('message') + ) + continue + # Each line should start with the file information: "filepath: ..." # i should point past the file path ^ # avoid the first column in Windows (C:\) diff --git a/workspace_tools/toolchains/iar.py b/workspace_tools/toolchains/iar.py index e4816d2f72..8f935b6f3f 100644 --- a/workspace_tools/toolchains/iar.py +++ b/workspace_tools/toolchains/iar.py @@ -20,7 +20,7 @@ from os.path import join, exists from workspace_tools.toolchains import mbedToolchain from workspace_tools.settings import IAR_PATH - +from workspace_tools.settings import GOANNA_PATH class IAR(mbedToolchain): LIBRARY_EXT = '.a' @@ -49,10 +49,14 @@ class IAR(mbedToolchain): c_flags.append("-r") IAR_BIN = join(IAR_PATH, "bin") + main_cc = join(IAR_BIN, "iccarm") self.asm = [join(IAR_BIN, "iasmarm")] + ["--cpu", target.core] - self.cc = [join(IAR_BIN, "iccarm")] + c_flags - self.cppc = [join(IAR_BIN, "iccarm"), "--c++", "--no_rtti", "--no_exceptions"] + c_flags - + if not "analyze" in self.options: + self.cc = [main_cc] + c_flags + self.cppc = [main_cc, "--c++", "--no_rtti", "--no_exceptions"] + c_flags + else: + self.cc = [join(GOANNA_PATH, "goannacc"), '--with-cc="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT] + c_flags + self.cppc = [join(GOANNA_PATH, "goannac++"), '--with-cxx="%s"' % main_cc.replace('\\', '/'), "--dialect=iar-arm", '--output-format="%s"' % self.GOANNA_FORMAT] + ["--c++", "--no_rtti", "--no_exceptions"] + c_flags self.ld = join(IAR_BIN, "ilinkarm") self.ar = join(IAR_BIN, "iarchive") self.elf2bin = join(IAR_BIN, "ielftool") @@ -67,6 +71,14 @@ class IAR(mbedToolchain): match.group('line'), match.group('message'), ) + match = self.goanna_parse_line(line) + if match is not None: + self.cc_info( + match.group('severity').lower(), + match.group('file'), + match.group('line'), + match.group('message') + ) def get_dep_opt(self, dep_path): return ["--dependencies", dep_path] From a0d9973cab21dff0c3ebb22e3932254289a528af Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:45:25 +0300 Subject: [PATCH 021/117] Initial import of USB3GModem in the USBHost library In the future, USBHostConf.h should really reside in the project that imports USBHost, not inside the USBHost library itself. Doing that now though might break compatibility with projects that currently import USBHost, so we need to figure out a better solution. --- .../USBHost/USB3GModule/IUSBHostSerial.h | 91 +++++ .../USB3GModule/IUSBHostSerialListener.h | 37 ++ libraries/USBHost/USB3GModule/WANDongle.cpp | 221 ++++++++++ libraries/USBHost/USB3GModule/WANDongle.h | 99 +++++ .../USB3GModule/WANDongleInitializer.cpp | 380 ++++++++++++++++++ .../USB3GModule/WANDongleInitializer.h | 178 ++++++++ .../USB3GModule/WANDongleSerialPort.cpp | 340 ++++++++++++++++ .../USBHost/USB3GModule/WANDongleSerialPort.h | 133 ++++++ libraries/USBHost/USBHost/USBHostConf.h | 23 +- 9 files changed, 1493 insertions(+), 9 deletions(-) create mode 100644 libraries/USBHost/USB3GModule/IUSBHostSerial.h create mode 100644 libraries/USBHost/USB3GModule/IUSBHostSerialListener.h create mode 100644 libraries/USBHost/USB3GModule/WANDongle.cpp create mode 100644 libraries/USBHost/USB3GModule/WANDongle.h create mode 100644 libraries/USBHost/USB3GModule/WANDongleInitializer.cpp create mode 100644 libraries/USBHost/USB3GModule/WANDongleInitializer.h create mode 100644 libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp create mode 100644 libraries/USBHost/USB3GModule/WANDongleSerialPort.h diff --git a/libraries/USBHost/USB3GModule/IUSBHostSerial.h b/libraries/USBHost/USB3GModule/IUSBHostSerial.h new file mode 100644 index 0000000000..8b96996399 --- /dev/null +++ b/libraries/USBHost/USB3GModule/IUSBHostSerial.h @@ -0,0 +1,91 @@ +/* IUSBHostSerial.h */ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef IUSBHOSTSERIAL_H_ +#define IUSBHOSTSERIAL_H_ + +/** + * Generic interface to abstract 3G dongles' impl + */ + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#include "IUSBHostSerialListener.h" + +class IUSBHostSerial { +public: + + enum IrqType { + RxIrq, + TxIrq + }; + + /* + * Get a char from the dongle's serial interface + */ + virtual int getc() = 0; + + /* + * Put a char to the dongle's serial interface + */ + virtual int putc(int c) = 0; + + /* + * Read a packet from the dongle's serial interface, to be called after multiple getc() calls + */ + virtual int readPacket() = 0; + + /* + * Write a packet to the dongle's serial interface, to be called after multiple putc() calls + */ + virtual int writePacket() = 0; + + /** + * Check the number of bytes available. + * + * @returns the number of bytes available + */ + virtual int readable() = 0; + + /** + * Check the free space in output. + * + * @returns the number of bytes available + */ + virtual int writeable() = 0; + + /** + * Attach a handler to call when a packet is received / when a packet has been transmitted. + * + * @param pListener instance of the listener deriving from the IUSBHostSerialListener + */ + virtual void attach(IUSBHostSerialListener* pListener) = 0; + + /** + * Enable or disable readable/writeable callbacks + */ + virtual void setupIrq(bool en, IrqType irq = RxIrq) = 0; + +}; + +#endif /* USBHOST_3GMODULE */ + +#endif /* IUSBHOSTSERIAL_H_ */ diff --git a/libraries/USBHost/USB3GModule/IUSBHostSerialListener.h b/libraries/USBHost/USB3GModule/IUSBHostSerialListener.h new file mode 100644 index 0000000000..525b734637 --- /dev/null +++ b/libraries/USBHost/USB3GModule/IUSBHostSerialListener.h @@ -0,0 +1,37 @@ +/* IUSBHostSerialListener.h */ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + + +#ifndef IUSBHOSTSERIALLISTENER_H_ +#define IUSBHOSTSERIALLISTENER_H_ + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +class IUSBHostSerialListener +{ +public: + virtual void readable() = 0; //Called when new data is available + virtual void writeable() = 0; //Called when new space is available +}; + +#endif /* USBHOST_3GMODULE */ + +#endif /* IUSBHOSTSERIALLISTENER_H_ */ diff --git a/libraries/USBHost/USB3GModule/WANDongle.cpp b/libraries/USBHost/USB3GModule/WANDongle.cpp new file mode 100644 index 0000000000..4c004466fd --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongle.cpp @@ -0,0 +1,221 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "WANDongle.cpp" +#endif + +#include "core/dbg.h" +#include +#include "rtos.h" + +#include "WANDongle.h" +#include "WANDongleInitializer.h" + +WANDongle::WANDongle() : m_pInitializer(NULL), m_serialCount(0) +{ + host = USBHost::getHostInst(); + init(); +} + + +bool WANDongle::connected() { + return dev_connected; +} + +bool WANDongle::tryConnect() +{ + //FIXME should run on USB thread + + DBG("Trying to connect device"); + + if (dev_connected) { + return true; + } + + m_pInitializer = NULL; + + for (int i = 0; i < MAX_DEVICE_CONNECTED; i++) + { + if ((dev = host->getDevice(i)) != NULL) + { + m_pInitializer = NULL; //Will be set in setVidPid callback + + DBG("Enumerate"); + int ret = host->enumerate(dev, this); + if(ret) + { + return false; + } + + DBG("Device has VID:%04x PID:%04x", dev->getVid(), dev->getPid()); + + if(m_pInitializer) //If an initializer has been found + { + DBG("m_pInitializer=%p", m_pInitializer); + DBG("m_pInitializer->getSerialVid()=%04x", m_pInitializer->getSerialVid()); + DBG("m_pInitializer->getSerialPid()=%04x", m_pInitializer->getSerialPid()); + if ((dev->getVid() == m_pInitializer->getSerialVid()) && (dev->getPid() == m_pInitializer->getSerialPid())) + { + DBG("The dongle is in virtual serial mode"); + host->registerDriver(dev, 0, this, &WANDongle::init); + m_serialCount = m_pInitializer->getSerialPortCount(); + if( m_serialCount > WANDONGLE_MAX_SERIAL_PORTS ) + { + m_serialCount = WANDONGLE_MAX_SERIAL_PORTS; + } + for(int j = 0; j < m_serialCount; j++) + { + DBG("Connecting serial port #%d", j+1); + DBG("Ep %p", m_pInitializer->getEp(dev, j, false)); + DBG("Ep %p", m_pInitializer->getEp(dev, j, true)); + m_serial[j].connect( dev, m_pInitializer->getEp(dev, j, false), m_pInitializer->getEp(dev, j, true) ); + } + + DBG("Device connected"); + + dev_connected = true; + + + return true; + } + else if ((dev->getVid() == m_pInitializer->getMSDVid()) && (dev->getPid() == m_pInitializer->getMSDPid())) + { + DBG("Vodafone K3370 dongle detected in MSD mode"); + //Try to switch + if( m_pInitializer->switchMode(dev) ) + { + DBG("Switched OK"); + return false; //Will be connected on a next iteration + } + else + { + ERR("Could not switch mode"); + return false; + } + } + } //if() + } //if() + } //for() + return false; +} + +bool WANDongle::disconnect() +{ + dev_connected = false; + for(int i = 0; i < WANDONGLE_MAX_SERIAL_PORTS; i++) + { + m_serial[i].disconnect(); + } + return true; +} + +WAN_DONGLE_TYPE WANDongle::getDongleType() +{ + if( m_pInitializer != NULL ) + { + return m_pInitializer->getType(); + } + else + { + return WAN_DONGLE_TYPE_UNKNOWN; + } +} + +IUSBHostSerial& WANDongle::getSerial(int index) +{ + return m_serial[index]; +} + +int WANDongle::getSerialCount() +{ + return m_serialCount; +} + +//Private methods +void WANDongle::init() +{ + m_pInitializer = NULL; + dev_connected = false; + for(int i = 0; i < WANDONGLE_MAX_SERIAL_PORTS; i++) + { + m_serial[i].init(host); + } +} + + +/*virtual*/ void WANDongle::setVidPid(uint16_t vid, uint16_t pid) +{ + //Load right initializer + WANDongleInitializer** initializer = WANDongleInitializer::getInitializers(host); + + while(*initializer) + { + DBG("*initializer=%p", *initializer); + DBG("(*initializer)->getSerialVid()=%04x", (*initializer)->getSerialVid()); + DBG("(*initializer)->getSerialPid()=%04x", (*initializer)->getSerialPid()); + if ((dev->getVid() == (*initializer)->getSerialVid()) && (dev->getPid() == (*initializer)->getSerialPid())) + { + DBG("The dongle is in virtual serial mode"); + m_pInitializer = *initializer; + break; + } + else if ((dev->getVid() == (*initializer)->getMSDVid()) && (dev->getPid() == (*initializer)->getMSDPid())) + { + DBG("Vodafone K3370 dongle detected in MSD mode"); + m_pInitializer = *initializer; + break; + } + initializer++; + } //while() + if(m_pInitializer) + { + m_pInitializer->setVidPid(vid, pid); + } +} + +/*virtual*/ bool WANDongle::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + if(m_pInitializer) + { + return m_pInitializer->parseInterface(intf_nb, intf_class, intf_subclass, intf_protocol); + } + else + { + return false; + } +} + +/*virtual*/ bool WANDongle::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + if(m_pInitializer) + { + return m_pInitializer->useEndpoint(intf_nb, type, dir); + } + else + { + return false; + } +} + +#endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongle.h b/libraries/USBHost/USB3GModule/WANDongle.h new file mode 100644 index 0000000000..3728937c2e --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongle.h @@ -0,0 +1,99 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef WANDONGLE_H +#define WANDONGLE_H + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#include "USBHost.h" +#include "IUSBHostSerial.h" + +#include "rtos.h" + +#include "WANDongleSerialPort.h" +#include "WANDongleInitializer.h" +#include "IUSBEnumerator.h" + +#define WANDONGLE_MAX_OUTEP_SIZE 64 +#define WANDONGLE_MAX_INEP_SIZE 64 + +/** A class to use a WAN (3G/LTE) access dongle + * + */ +class WANDongle : public IUSBEnumerator { +public: + /* + * Constructor + * + * @param rootdir mount name + */ + WANDongle(); + + /* + * Check if a serial port device is connected + * + * @return true if a serial device is connected + */ + bool connected(); + + /* + * Try to connect device + * + * * @return true if connection was successful + */ + bool tryConnect(); + + /* + * Disconnect device + * + * * @return true if disconnection was successful + */ + bool disconnect(); + + WAN_DONGLE_TYPE getDongleType(); + + IUSBHostSerial& getSerial(int index); + int getSerialCount(); + + //From IUSBEnumerator + + virtual void setVidPid(uint16_t vid, uint16_t pid); + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used + +protected: + USBHost * host; + USBDeviceConnected * dev; + bool dev_connected; + + WANDongleInitializer* m_pInitializer; + + void init(); + + WANDongleSerialPort m_serial[WANDONGLE_MAX_SERIAL_PORTS]; + int m_serialCount; +}; + +#endif /* USBHOST_3GMODULE */ + +#endif diff --git a/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp b/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp new file mode 100644 index 0000000000..1ee56dc4d5 --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp @@ -0,0 +1,380 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "WANDongleInitializer.cpp" +#endif + +#include "core/dbg.h" + +#include +using std::uint16_t; + +#include "WANDongleInitializer.h" + +WANDongleInitializer::WANDongleInitializer(USBHost* pHost) : m_pHost(pHost) +{ + +} + +WANDongleInitializer** WANDongleInitializer::getInitializers(USBHost* pHost) +{ + static VodafoneK3770Initializer vodafoneK3770(pHost); + static VodafoneK3772ZInitializer vodafoneK3772Z(pHost); + // mamm + static UbxInitializer ubx(pHost); + const static WANDongleInitializer* list[] = { &vodafoneK3770, &vodafoneK3772Z, &ubx, NULL }; +// const static WANDongleInitializer* list[] = { &vodafoneK3770, &vodafoneK3772Z, NULL }; + // mamm + return (WANDongleInitializer**)list; +} + +//Huawei K3770 (Vodafone) +// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 00 11 06 20 00 00 01 00 00 00 00 00 00 00 00 00 00" +static uint8_t vodafone_k3770_switch_packet[] = { + 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0, 0x11, 0x06, 0x20, 0, 0, 0x01, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +VodafoneK3770Initializer::VodafoneK3770Initializer(USBHost* pHost) : WANDongleInitializer(pHost) +{ + +} + +uint16_t VodafoneK3770Initializer::getMSDVid() { return 0x12D1; } +uint16_t VodafoneK3770Initializer::getMSDPid() { return 0x14D1; } + +uint16_t VodafoneK3770Initializer::getSerialVid() { return 0x12D1; } +uint16_t VodafoneK3770Initializer::getSerialPid() { return 0x14C9; } + +bool VodafoneK3770Initializer::switchMode(USBDeviceConnected* pDev) +{ + for (int i = 0; i < pDev->getNbIntf(); i++) + { + if (pDev->getInterface(i)->intf_class == MSD_CLASS) + { + USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); + if ( pEp != NULL ) + { + DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); + m_pHost->bulkWrite(pDev, pEp, vodafone_k3770_switch_packet, 31); + return true; + } + } + } + return false; +} + +USBEndpoint* VodafoneK3770Initializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) +{ + return pDev->getEndpoint(serialPortNumber, BULK_ENDPOINT, tx?OUT:IN, 0); +} + +int VodafoneK3770Initializer::getSerialPortCount() +{ + return 2; +} + +/*virtual*/ void VodafoneK3770Initializer::setVidPid(uint16_t vid, uint16_t pid) +{ + if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) + { + m_hasSwitched = true; + m_currentSerialIntf = 0; + m_endpointsToFetch = 4; + } + else + { + m_hasSwitched = false; + m_endpointsToFetch = 1; + } +} + +/*virtual*/ bool VodafoneK3770Initializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + if( m_hasSwitched ) + { + if( intf_class == 0xFF ) + { + if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 4) ) + { + m_currentSerialIntf++; + return true; + } + m_currentSerialIntf++; + } + } + else + { + if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) + { + return true; + } + } + return false; +} + +/*virtual*/ bool VodafoneK3770Initializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + if( m_hasSwitched ) + { + if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + else + { + if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + return false; +} + +/*virtual*/ WAN_DONGLE_TYPE VodafoneK3770Initializer::getType() +{ + return WAN_DONGLE_TYPE_VODAFONEK3770; +} + +// NVIDIA (ICERA) /ZTE K3772-Z (Vodafone) +// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 06 1b 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00" +static uint8_t vodafone_k3772_z_switch_packet[] = { + 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0x06, 0x1b, 0, 0, 0, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +VodafoneK3772ZInitializer::VodafoneK3772ZInitializer(USBHost* pHost) : WANDongleInitializer(pHost) +{ + +} + +uint16_t VodafoneK3772ZInitializer::getMSDVid() { return 0x19D2; } +uint16_t VodafoneK3772ZInitializer::getMSDPid() { return 0x1179; } + +uint16_t VodafoneK3772ZInitializer::getSerialVid() { return 0x19D2; } +uint16_t VodafoneK3772ZInitializer::getSerialPid() { return 0x1181; } + +bool VodafoneK3772ZInitializer::switchMode(USBDeviceConnected* pDev) +{ + for (int i = 0; i < pDev->getNbIntf(); i++) + { + if (pDev->getInterface(i)->intf_class == MSD_CLASS) + { + USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); + if ( pEp != NULL ) + { + DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); + m_pHost->bulkWrite(pDev, pEp, vodafone_k3772_z_switch_packet, 31); + return true; + } + } + } + return false; +} + +USBEndpoint* VodafoneK3772ZInitializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) +{ + return pDev->getEndpoint((serialPortNumber==1)?0:1, BULK_ENDPOINT, tx?OUT:IN, 0); +} + +int VodafoneK3772ZInitializer::getSerialPortCount() +{ + return 2; +} + +/*virtual*/ void VodafoneK3772ZInitializer::setVidPid(uint16_t vid, uint16_t pid) +{ + if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) + { + m_hasSwitched = true; + m_currentSerialIntf = 0; + m_endpointsToFetch = 4; + } + else + { + m_hasSwitched = false; + m_endpointsToFetch = 1; + } +} + +/*virtual*/ bool VodafoneK3772ZInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + if( m_hasSwitched ) + { + DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); + if( intf_class == 0x0A ) + { + if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) + { + m_currentSerialIntf++; + return true; + } + m_currentSerialIntf++; + } + } + else + { + if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) + { + return true; + } + } + return false; +} + +/*virtual*/ bool VodafoneK3772ZInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + if( m_hasSwitched ) + { + DBG("USBEndpoint on Inteface #%d; Type:%d; Direction:%d", intf_nb, type, dir); + if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + else + { + if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + return false; +} + + +/*virtual*/ WAN_DONGLE_TYPE VodafoneK3772ZInitializer::getType() +{ + return WAN_DONGLE_TYPE_VODAFONEK3772Z; +} + +//----------------------------------------------------------------------- +// mamm, u-blox Modem +//----------------------------------------------------------------------- + +UbxInitializer::UbxInitializer(USBHost* pHost) : WANDongleInitializer(pHost) +{ + +} + +uint16_t UbxInitializer::getMSDVid() { return 0x1546; } +uint16_t UbxInitializer::getMSDPid() { return 0x0000; } + +uint16_t UbxInitializer::getSerialVid() { return 0x1546; } +uint16_t UbxInitializer::getSerialPid() { return 0x1102; } + +bool UbxInitializer::switchMode(USBDeviceConnected* pDev) +{ + for (int i = 0; i < pDev->getNbIntf(); i++) + { + if (pDev->getInterface(i)->intf_class == MSD_CLASS) + { + USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); + if ( pEp != NULL ) + { + ERR("MSD descriptor found on device %p, intf %d", (void *)pDev, i); + } + } + } + return false; +} + +#define UBX_SERIALCOUNT 7 + +int UbxInitializer::getSerialPortCount() +{ + return UBX_SERIALCOUNT; +} + +/*virtual*/ void UbxInitializer::setVidPid(uint16_t vid, uint16_t pid) +{ + if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) + { + m_hasSwitched = true; + m_currentSerialIntf = 0; + m_endpointsToFetch = UBX_SERIALCOUNT*2; + } + else + { + m_hasSwitched = false; + m_endpointsToFetch = 1; + } +} + +/*virtual*/ bool UbxInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + if( m_hasSwitched ) + { + DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); + if( intf_class == 0x0A ) + { + if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) + { + m_serialIntfMap[m_currentSerialIntf++] = intf_nb; + return true; + } + m_currentSerialIntf++; + } + } + else + { + if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) + { + return true; + } + } + return false; +} + +/*virtual*/ bool UbxInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + if( m_hasSwitched ) + { + DBG("USBEndpoint on Interface #%d; Type:%d; Direction:%d", intf_nb, type, dir); + if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + else + { + if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + return false; +} + +/*virtual*/ WAN_DONGLE_TYPE UbxInitializer::getType() +{ + return WAN_DONGLE_TYPE_UBX; +} + +#endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongleInitializer.h b/libraries/USBHost/USB3GModule/WANDongleInitializer.h new file mode 100644 index 0000000000..66859a268c --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongleInitializer.h @@ -0,0 +1,178 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef WANDONGLEINITIALIZER_H +#define WANDONGLEINITIALIZER_H + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#include +using std::uint16_t; +using std::uint32_t; + +#include "USBHost.h" +#include "IUSBEnumerator.h" + +enum WAN_DONGLE_TYPE +{ + WAN_DONGLE_TYPE_UNKNOWN = -1, + WAN_DONGLE_TYPE_VODAFONEK3770 = 0, + WAN_DONGLE_TYPE_VODAFONEK3772Z = 1, + WAN_DONGLE_TYPE_UBX = 2, +}; + +#define WANDONGLE_MAX_SERIAL_PORTS 2 + +class WANDongleInitializer : public IUSBEnumerator +{ +protected: + WANDongleInitializer(USBHost* pHost); + USBHost* m_pHost; + uint8_t m_serialIntfMap[WANDONGLE_MAX_SERIAL_PORTS]; + +public: + virtual uint16_t getMSDVid() = 0; + virtual uint16_t getMSDPid() = 0; + + virtual uint16_t getSerialVid() = 0; + virtual uint16_t getSerialPid() = 0; + + virtual bool switchMode(USBDeviceConnected* pDev) = 0; + + virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) { + return pDev->getEndpoint(m_serialIntfMap[serialPortNumber], BULK_ENDPOINT, tx ? OUT : IN, 0); + } + + virtual int getSerialPortCount() = 0; + + virtual void setVidPid(uint16_t vid, uint16_t pid) = 0; + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) = 0; //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) = 0; //Must return true if the endpoint will be used + + virtual WAN_DONGLE_TYPE getType() = 0; + + virtual uint8_t getSerialIntf(int index) { return m_serialIntfMap[index]; } + + static WANDongleInitializer** getInitializers(USBHost* pHost); +}; + +class VodafoneK3770Initializer : public WANDongleInitializer +{ +public: + VodafoneK3770Initializer(USBHost* pHost); + + virtual uint16_t getMSDVid(); + virtual uint16_t getMSDPid(); + + virtual uint16_t getSerialVid(); + virtual uint16_t getSerialPid(); + + virtual bool switchMode(USBDeviceConnected* pDev); + + virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); + + virtual int getSerialPortCount(); + + virtual void setVidPid(uint16_t vid, uint16_t pid); + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used + + virtual WAN_DONGLE_TYPE getType(); + +private: + + bool m_hasSwitched; + int m_currentSerialIntf; + int m_endpointsToFetch; +}; + +class VodafoneK3772ZInitializer : public WANDongleInitializer +{ +public: + VodafoneK3772ZInitializer(USBHost* pHost); + + virtual uint16_t getMSDVid(); + virtual uint16_t getMSDPid(); + + virtual uint16_t getSerialVid(); + virtual uint16_t getSerialPid(); + + virtual bool switchMode(USBDeviceConnected* pDev); + + virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); + + virtual int getSerialPortCount(); + + virtual void setVidPid(uint16_t vid, uint16_t pid); + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used + + virtual WAN_DONGLE_TYPE getType(); + +private: + + bool m_hasSwitched; + int m_currentSerialIntf; + int m_endpointsToFetch; +}; + +//----------------------------------------------------------------------- +// mamm, u-blox Modem +//----------------------------------------------------------------------- + +class UbxInitializer : public WANDongleInitializer +{ +public: + UbxInitializer(USBHost* pHost); + + virtual uint16_t getMSDVid(); + virtual uint16_t getMSDPid(); + + virtual uint16_t getSerialVid(); + virtual uint16_t getSerialPid(); + + virtual bool switchMode(USBDeviceConnected* pDev); + + virtual int getSerialPortCount(); + + virtual void setVidPid(uint16_t vid, uint16_t pid); + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used + + virtual WAN_DONGLE_TYPE getType(); + +private: + + bool m_hasSwitched; + int m_currentSerialIntf; + int m_endpointsToFetch; +}; + +#endif /* USBHOST_3GMODULE */ + +#endif diff --git a/libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp b/libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp new file mode 100644 index 0000000000..7b6fa9e01a --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp @@ -0,0 +1,340 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "WANDongleSerialPort.cpp" +#endif + +#include "core/dbg.h" +#include +#include "rtos.h" + +#include "WANDongleSerialPort.h" + +WANDongleSerialPort::WANDongleSerialPort() : cb_tx_en(false), cb_rx_en(false), listener(NULL) +{ + reset(); +} + +void WANDongleSerialPort::init(USBHost* pHost) +{ + host = pHost; +} + +void WANDongleSerialPort::reset() +{ + tx_mtx.lock(); + rx_mtx.lock(); + + bulk_in = NULL; + bulk_out = NULL; + + buf_out_len = 0; + max_out_size = 0; + lock_tx = false; + cb_tx_pending = false; + + buf_in_len = 0; + buf_in_read_pos = 0; + lock_rx = false; + cb_rx_pending = false; + + tx_mtx.unlock(); + rx_mtx.unlock(); +} + +int WANDongleSerialPort::readPacket() +{ + DBG("Read packet on %p", this); + rx_mtx.lock(); + if(lock_rx) + { + ERR("Fail"); + rx_mtx.unlock(); + return -1; + } + + if( bulk_in == NULL ) + { + WARN("Port is disconnected"); + rx_mtx.unlock(); + return -1; + } + + lock_rx = true; //Receiving + rx_mtx.unlock(); +// DBG("readPacket"); + //lock_rx.lock(); + USB_TYPE res = host->bulkRead(dev, (USBEndpoint *)bulk_in, buf_in, ((USBEndpoint *)bulk_in)->getSize(), false); //Queue transfer + if(res != USB_TYPE_PROCESSING) + { + //lock_rx.unlock(); + ERR("host->bulkRead() returned %d", res); + Thread::wait(100); + return -1; + } + return 0; +} + +int WANDongleSerialPort::writePacket() +{ + tx_mtx.lock(); + if(lock_tx) + { + ERR("Fail"); + tx_mtx.unlock(); + return -1; + } + + if( bulk_out == NULL ) + { + WARN("Port is disconnected"); + tx_mtx.unlock(); + return -1; + } + + lock_tx = true; //Transmitting + tx_mtx.unlock(); +// DBG("writePacket"); + + //lock_tx.lock(); + USB_TYPE res = host->bulkWrite(dev, (USBEndpoint *)bulk_out, buf_out, buf_out_len, false); //Queue transfer + if(res != USB_TYPE_PROCESSING) + { + //lock_tx.unlock(); + ERR("host->bulkWrite() returned %d", res); + Thread::wait(100); + return -1; + } + return 0; +} + +int WANDongleSerialPort::putc(int c) +{ + tx_mtx.lock(); + if(!lock_tx) + { + if(buf_out_len < max_out_size) + { + buf_out[buf_out_len] = (uint8_t)c; + buf_out_len++; + } + } + else + { + ERR("CAN'T WRITE!"); + } + tx_mtx.unlock(); + return c; +} + +int WANDongleSerialPort::getc() +{ + rx_mtx.lock(); + int c = 0; + if(!lock_rx) + { + if(buf_in_read_pos < buf_in_len) + { + c = (int)buf_in[buf_in_read_pos]; + buf_in_read_pos++; + } + } + else + { + ERR("CAN'T READ!"); + } + rx_mtx.unlock(); + return c; +} + +int WANDongleSerialPort::readable() +{ + rx_mtx.lock(); + if (lock_rx) + { + rx_mtx.unlock(); + return 0; + } + + /* if( !lock_rx.trylock() ) + { + return 0; + }*/ + int res = buf_in_len - buf_in_read_pos; + //lock_rx.unlock(); + rx_mtx.unlock(); + return res; +} + +int WANDongleSerialPort::writeable() +{ + tx_mtx.lock(); + if (lock_tx) + { + tx_mtx.unlock(); + return 0; + } + + /*if( !lock_tx.trylock() ) + { + return 0; + }*/ + int res = max_out_size - buf_out_len; + tx_mtx.unlock(); + //lock_tx.unlock(); + return res; +} + +void WANDongleSerialPort::attach(IUSBHostSerialListener* pListener) +{ + if(pListener == NULL) + { + setupIrq(false, RxIrq); + setupIrq(false, TxIrq); + } + listener = pListener; + if(pListener != NULL) + { + setupIrq(true, RxIrq); + setupIrq(true, TxIrq); + } +} + +void WANDongleSerialPort::setupIrq(bool en, IrqType irq /*= RxIrq*/) +{ + switch(irq) + { + case RxIrq: + rx_mtx.lock(); + cb_rx_en = en; + if(en && cb_rx_pending) + { + cb_rx_pending = false; + rx_mtx.unlock(); + listener->readable(); //Process the interrupt that was raised + } + else + { + rx_mtx.unlock(); + } + break; + case TxIrq: + tx_mtx.lock(); + cb_tx_en = en; + if(en && cb_tx_pending) + { + cb_tx_pending = false; + tx_mtx.unlock(); + listener->writeable(); //Process the interrupt that was raised + } + else + { + tx_mtx.unlock(); + } + break; + } +} + + +void WANDongleSerialPort::connect( USBDeviceConnected* pDev, USBEndpoint* pInEp, USBEndpoint* pOutEp ) +{ + dev = pDev; + bulk_in = pInEp; + bulk_out = pOutEp; + max_out_size = bulk_out->getSize(); + if( max_out_size > WANDONGLE_MAX_OUTEP_SIZE ) + { + max_out_size = WANDONGLE_MAX_OUTEP_SIZE; + } + bulk_in->attach(this, &WANDongleSerialPort::rxHandler); + bulk_out->attach(this, &WANDongleSerialPort::txHandler); + readPacket(); //Start receiving data +} + +void WANDongleSerialPort::disconnect( ) +{ + reset(); +} + +//Private methods + + +void WANDongleSerialPort::rxHandler() +{ + if (((USBEndpoint *) bulk_in)->getState() == USB_TYPE_IDLE) //Success + { + buf_in_read_pos = 0; + buf_in_len = ((USBEndpoint *) bulk_in)->getLengthTransferred(); //Update length + //lock_rx.unlock(); + rx_mtx.lock(); + lock_rx = false; //Transmission complete + if(cb_rx_en) + { + rx_mtx.unlock(); + listener->readable(); //Call handler from the IRQ context + //readPacket() should be called by the handler subsequently once the buffer has been emptied + } + else + { + cb_rx_pending = true; //Queue the callback + rx_mtx.unlock(); + } + + } + else //Error, try reading again + { + //lock_rx.unlock(); + DBG("Trying again"); + readPacket(); + } +} + +void WANDongleSerialPort::txHandler() +{ + if (((USBEndpoint *) bulk_out)->getState() == USB_TYPE_IDLE) //Success + { + tx_mtx.lock(); + buf_out_len = 0; //Reset length + lock_tx = false; //Transmission complete + //lock_tx.unlock(); + if(cb_tx_en) + { + tx_mtx.unlock(); + listener->writeable(); //Call handler from the IRQ context + //writePacket() should be called by the handler subsequently once the buffer has been filled + } + else + { + cb_tx_pending = true; //Queue the callback + tx_mtx.unlock(); + } + } + else //Error, try reading again + { + //lock_tx.unlock(); + writePacket(); + } +} + +#endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongleSerialPort.h b/libraries/USBHost/USB3GModule/WANDongleSerialPort.h new file mode 100644 index 0000000000..9da1717078 --- /dev/null +++ b/libraries/USBHost/USB3GModule/WANDongleSerialPort.h @@ -0,0 +1,133 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#ifndef WANDONGLESERIALPORT_H +#define WANDONGLESERIALPORT_H + +#include "USBHostConf.h" + +#ifdef USBHOST_3GMODULE + +#include "USBHost.h" +#include "IUSBHostSerial.h" + +#include "rtos.h" + + +#define WANDONGLE_MAX_OUTEP_SIZE 64 +#define WANDONGLE_MAX_INEP_SIZE 64 + +/** A class to use a WAN (3G/LTE) access dongle + * + */ +class WANDongleSerialPort : public IUSBHostSerial { +public: + /* + * Constructor + * + */ + WANDongleSerialPort(); + + void init( USBHost* pHost ); + + void connect( USBDeviceConnected* pDev, USBEndpoint* pInEp, USBEndpoint* pOutEp ); + + void disconnect( ); + + /* + * Get a char from the dongle's serial interface + */ + virtual int getc(); + + /* + * Put a char to the dongle's serial interface + */ + virtual int putc(int c); + + /* + * Read a packet from the dongle's serial interface, to be called after multiple getc() calls + */ + virtual int readPacket(); + + /* + * Write a packet to the dongle's serial interface, to be called after multiple putc() calls + */ + virtual int writePacket(); + + /** + * Check the number of bytes available. + * + * @returns the number of bytes available + */ + virtual int readable(); + + /** + * Check the free space in output. + * + * @returns the number of bytes available + */ + virtual int writeable(); + + /** + * Attach a handler to call when a packet is received / when a packet has been transmitted. + * + * @param pListener instance of the listener deriving from the IUSBHostSerialListener + */ + virtual void attach(IUSBHostSerialListener* pListener); + + /** + * Enable or disable readable/writeable callbacks + */ + virtual void setupIrq(bool en, IrqType irq = RxIrq); + + +protected: + USBEndpoint * bulk_in; + USBEndpoint * bulk_out; + USBHost * host; + USBDeviceConnected * dev; + + uint8_t buf_out[WANDONGLE_MAX_OUTEP_SIZE]; + volatile uint32_t buf_out_len; + uint32_t max_out_size; + volatile bool lock_tx; + volatile bool cb_tx_en; + volatile bool cb_tx_pending; + Mutex tx_mtx; + + uint8_t buf_in[WANDONGLE_MAX_INEP_SIZE]; + volatile uint32_t buf_in_len; + volatile uint32_t buf_in_read_pos; + volatile bool lock_rx; + volatile bool cb_rx_en; + volatile bool cb_rx_pending; + Mutex rx_mtx; + + IUSBHostSerialListener* listener; + + void reset(); + + void rxHandler(); + void txHandler(); + +}; + +#endif /* USBHOST_3GMODULE */ + +#endif + diff --git a/libraries/USBHost/USBHost/USBHostConf.h b/libraries/USBHost/USBHost/USBHostConf.h index 1f90d0186f..b9f6026ceb 100644 --- a/libraries/USBHost/USBHost/USBHostConf.h +++ b/libraries/USBHost/USBHost/USBHostConf.h @@ -21,47 +21,52 @@ * Maximum number of devices that can be connected * to the usb host */ -#define MAX_DEVICE_CONNECTED 5 +#define MAX_DEVICE_CONNECTED 1 /* * Maximum of Hub connected to the usb host */ -#define MAX_HUB_NB 2 +#define MAX_HUB_NB 0 /* * Maximum number of ports on a USB hub */ -#define MAX_HUB_PORT 4 +#define MAX_HUB_PORT 0 /* * Enable USBHostMSD */ -#define USBHOST_MSD 1 +#define USBHOST_MSD 0 /* * Enable USBHostKeyboard */ -#define USBHOST_KEYBOARD 1 +#define USBHOST_KEYBOARD 0 /* * Enable USBHostMouse */ -#define USBHOST_MOUSE 1 +#define USBHOST_MOUSE 0 /* * Enable USBHostSerial */ -#define USBHOST_SERIAL 1 +#define USBHOST_SERIAL 0 + +/* +* Enable USB3Gmodule +*/ +#define USBHOST_3GMODULE 1 /* * Maximum number of interfaces of a usb device */ -#define MAX_INTF 3 +#define MAX_INTF 4 /* * Maximum number of endpoints on each interface */ -#define MAX_ENDPOINT_PER_INTERFACE 3 +#define MAX_ENDPOINT_PER_INTERFACE 2 /* * Maximum number of endpoint descriptors that can be allocated From ae2e7c3051868564afd41269e8f7ab3534aa5e3d Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:46:26 +0300 Subject: [PATCH 022/117] Refactored dongle initialization code The code for dongle initialization (WANDongleInitializer.cpp) was removed from this class, it will be added by each modem as needed. --- libraries/USBHost/USB3GModule/WANDongle.cpp | 43 +- libraries/USBHost/USB3GModule/WANDongle.h | 11 +- .../USB3GModule/WANDongleInitializer.cpp | 380 ------------------ 3 files changed, 39 insertions(+), 395 deletions(-) delete mode 100644 libraries/USBHost/USB3GModule/WANDongleInitializer.cpp diff --git a/libraries/USBHost/USB3GModule/WANDongle.cpp b/libraries/USBHost/USB3GModule/WANDongle.cpp index 4c004466fd..99160d7711 100644 --- a/libraries/USBHost/USB3GModule/WANDongle.cpp +++ b/libraries/USBHost/USB3GModule/WANDongle.cpp @@ -32,7 +32,7 @@ #include "WANDongle.h" #include "WANDongleInitializer.h" -WANDongle::WANDongle() : m_pInitializer(NULL), m_serialCount(0) +WANDongle::WANDongle() : m_pInitializer(NULL), m_serialCount(0), m_totalInitializers(0) { host = USBHost::getHostInst(); init(); @@ -166,28 +166,28 @@ void WANDongle::init() /*virtual*/ void WANDongle::setVidPid(uint16_t vid, uint16_t pid) { - //Load right initializer - WANDongleInitializer** initializer = WANDongleInitializer::getInitializers(host); - - while(*initializer) + WANDongleInitializer* initializer; + + for(unsigned i = 0; i < m_totalInitializers; i++) { - DBG("*initializer=%p", *initializer); - DBG("(*initializer)->getSerialVid()=%04x", (*initializer)->getSerialVid()); - DBG("(*initializer)->getSerialPid()=%04x", (*initializer)->getSerialPid()); - if ((dev->getVid() == (*initializer)->getSerialVid()) && (dev->getPid() == (*initializer)->getSerialPid())) + initializer = m_Initializers[i]; + DBG("initializer=%p", initializer); + DBG("initializer->getSerialVid()=%04x", initializer->getSerialVid()); + DBG("initializer->getSerialPid()=%04x", initializer->getSerialPid()); + if ((dev->getVid() == initializer->getSerialVid()) && (dev->getPid() == initializer->getSerialPid())) { DBG("The dongle is in virtual serial mode"); - m_pInitializer = *initializer; + m_pInitializer = initializer; break; } - else if ((dev->getVid() == (*initializer)->getMSDVid()) && (dev->getPid() == (*initializer)->getMSDPid())) + else if ((dev->getVid() == initializer->getMSDVid()) && (dev->getPid() == initializer->getMSDPid())) { - DBG("Vodafone K3370 dongle detected in MSD mode"); - m_pInitializer = *initializer; + DBG("Dongle detected in MSD mode"); + m_pInitializer = initializer; break; } initializer++; - } //while() + } //for if(m_pInitializer) { m_pInitializer->setVidPid(vid, pid); @@ -218,4 +218,19 @@ void WANDongle::init() } } + +bool WANDongle::addInitializer(WANDongleInitializer* pInitializer) +{ + if (m_totalInitializers >= MAX_DEVICE_CONNECTED) + return false; + m_Initializers[m_totalInitializers++] = pInitializer; + return true; +} + +WANDongle::~WANDongle() +{ + for(unsigned i = 0; i < m_totalInitializers; i++) + delete m_Initializers[i]; +} + #endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongle.h b/libraries/USBHost/USB3GModule/WANDongle.h index 3728937c2e..7d9df1baf8 100644 --- a/libraries/USBHost/USB3GModule/WANDongle.h +++ b/libraries/USBHost/USB3GModule/WANDongle.h @@ -47,6 +47,11 @@ public: */ WANDongle(); + /* + * Destructor + */ + virtual ~WANDongle(); + /* * Check if a serial port device is connected * @@ -72,7 +77,8 @@ public: IUSBHostSerial& getSerial(int index); int getSerialCount(); - + bool addInitializer(WANDongleInitializer* pInitializer); + //From IUSBEnumerator virtual void setVidPid(uint16_t vid, uint16_t pid); @@ -92,6 +98,9 @@ protected: WANDongleSerialPort m_serial[WANDONGLE_MAX_SERIAL_PORTS]; int m_serialCount; + + int m_totalInitializers; + WANDongleInitializer* m_Initializers[MAX_DEVICE_CONNECTED]; }; #endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp b/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp deleted file mode 100644 index 1ee56dc4d5..0000000000 --- a/libraries/USBHost/USB3GModule/WANDongleInitializer.cpp +++ /dev/null @@ -1,380 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#include "USBHostConf.h" - -#ifdef USBHOST_3GMODULE - -#define __DEBUG__ 0 -#ifndef __MODULE__ -#define __MODULE__ "WANDongleInitializer.cpp" -#endif - -#include "core/dbg.h" - -#include -using std::uint16_t; - -#include "WANDongleInitializer.h" - -WANDongleInitializer::WANDongleInitializer(USBHost* pHost) : m_pHost(pHost) -{ - -} - -WANDongleInitializer** WANDongleInitializer::getInitializers(USBHost* pHost) -{ - static VodafoneK3770Initializer vodafoneK3770(pHost); - static VodafoneK3772ZInitializer vodafoneK3772Z(pHost); - // mamm - static UbxInitializer ubx(pHost); - const static WANDongleInitializer* list[] = { &vodafoneK3770, &vodafoneK3772Z, &ubx, NULL }; -// const static WANDongleInitializer* list[] = { &vodafoneK3770, &vodafoneK3772Z, NULL }; - // mamm - return (WANDongleInitializer**)list; -} - -//Huawei K3770 (Vodafone) -// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 00 11 06 20 00 00 01 00 00 00 00 00 00 00 00 00 00" -static uint8_t vodafone_k3770_switch_packet[] = { - 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0, 0x11, 0x06, 0x20, 0, 0, 0x01, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -VodafoneK3770Initializer::VodafoneK3770Initializer(USBHost* pHost) : WANDongleInitializer(pHost) -{ - -} - -uint16_t VodafoneK3770Initializer::getMSDVid() { return 0x12D1; } -uint16_t VodafoneK3770Initializer::getMSDPid() { return 0x14D1; } - -uint16_t VodafoneK3770Initializer::getSerialVid() { return 0x12D1; } -uint16_t VodafoneK3770Initializer::getSerialPid() { return 0x14C9; } - -bool VodafoneK3770Initializer::switchMode(USBDeviceConnected* pDev) -{ - for (int i = 0; i < pDev->getNbIntf(); i++) - { - if (pDev->getInterface(i)->intf_class == MSD_CLASS) - { - USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); - if ( pEp != NULL ) - { - DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); - m_pHost->bulkWrite(pDev, pEp, vodafone_k3770_switch_packet, 31); - return true; - } - } - } - return false; -} - -USBEndpoint* VodafoneK3770Initializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) -{ - return pDev->getEndpoint(serialPortNumber, BULK_ENDPOINT, tx?OUT:IN, 0); -} - -int VodafoneK3770Initializer::getSerialPortCount() -{ - return 2; -} - -/*virtual*/ void VodafoneK3770Initializer::setVidPid(uint16_t vid, uint16_t pid) -{ - if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) - { - m_hasSwitched = true; - m_currentSerialIntf = 0; - m_endpointsToFetch = 4; - } - else - { - m_hasSwitched = false; - m_endpointsToFetch = 1; - } -} - -/*virtual*/ bool VodafoneK3770Initializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if( m_hasSwitched ) - { - if( intf_class == 0xFF ) - { - if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 4) ) - { - m_currentSerialIntf++; - return true; - } - m_currentSerialIntf++; - } - } - else - { - if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) - { - return true; - } - } - return false; -} - -/*virtual*/ bool VodafoneK3770Initializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if( m_hasSwitched ) - { - if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - else - { - if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - return false; -} - -/*virtual*/ WAN_DONGLE_TYPE VodafoneK3770Initializer::getType() -{ - return WAN_DONGLE_TYPE_VODAFONEK3770; -} - -// NVIDIA (ICERA) /ZTE K3772-Z (Vodafone) -// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 06 1b 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00" -static uint8_t vodafone_k3772_z_switch_packet[] = { - 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0x06, 0x1b, 0, 0, 0, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -VodafoneK3772ZInitializer::VodafoneK3772ZInitializer(USBHost* pHost) : WANDongleInitializer(pHost) -{ - -} - -uint16_t VodafoneK3772ZInitializer::getMSDVid() { return 0x19D2; } -uint16_t VodafoneK3772ZInitializer::getMSDPid() { return 0x1179; } - -uint16_t VodafoneK3772ZInitializer::getSerialVid() { return 0x19D2; } -uint16_t VodafoneK3772ZInitializer::getSerialPid() { return 0x1181; } - -bool VodafoneK3772ZInitializer::switchMode(USBDeviceConnected* pDev) -{ - for (int i = 0; i < pDev->getNbIntf(); i++) - { - if (pDev->getInterface(i)->intf_class == MSD_CLASS) - { - USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); - if ( pEp != NULL ) - { - DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); - m_pHost->bulkWrite(pDev, pEp, vodafone_k3772_z_switch_packet, 31); - return true; - } - } - } - return false; -} - -USBEndpoint* VodafoneK3772ZInitializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) -{ - return pDev->getEndpoint((serialPortNumber==1)?0:1, BULK_ENDPOINT, tx?OUT:IN, 0); -} - -int VodafoneK3772ZInitializer::getSerialPortCount() -{ - return 2; -} - -/*virtual*/ void VodafoneK3772ZInitializer::setVidPid(uint16_t vid, uint16_t pid) -{ - if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) - { - m_hasSwitched = true; - m_currentSerialIntf = 0; - m_endpointsToFetch = 4; - } - else - { - m_hasSwitched = false; - m_endpointsToFetch = 1; - } -} - -/*virtual*/ bool VodafoneK3772ZInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if( m_hasSwitched ) - { - DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); - if( intf_class == 0x0A ) - { - if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) - { - m_currentSerialIntf++; - return true; - } - m_currentSerialIntf++; - } - } - else - { - if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) - { - return true; - } - } - return false; -} - -/*virtual*/ bool VodafoneK3772ZInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if( m_hasSwitched ) - { - DBG("USBEndpoint on Inteface #%d; Type:%d; Direction:%d", intf_nb, type, dir); - if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - else - { - if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - return false; -} - - -/*virtual*/ WAN_DONGLE_TYPE VodafoneK3772ZInitializer::getType() -{ - return WAN_DONGLE_TYPE_VODAFONEK3772Z; -} - -//----------------------------------------------------------------------- -// mamm, u-blox Modem -//----------------------------------------------------------------------- - -UbxInitializer::UbxInitializer(USBHost* pHost) : WANDongleInitializer(pHost) -{ - -} - -uint16_t UbxInitializer::getMSDVid() { return 0x1546; } -uint16_t UbxInitializer::getMSDPid() { return 0x0000; } - -uint16_t UbxInitializer::getSerialVid() { return 0x1546; } -uint16_t UbxInitializer::getSerialPid() { return 0x1102; } - -bool UbxInitializer::switchMode(USBDeviceConnected* pDev) -{ - for (int i = 0; i < pDev->getNbIntf(); i++) - { - if (pDev->getInterface(i)->intf_class == MSD_CLASS) - { - USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); - if ( pEp != NULL ) - { - ERR("MSD descriptor found on device %p, intf %d", (void *)pDev, i); - } - } - } - return false; -} - -#define UBX_SERIALCOUNT 7 - -int UbxInitializer::getSerialPortCount() -{ - return UBX_SERIALCOUNT; -} - -/*virtual*/ void UbxInitializer::setVidPid(uint16_t vid, uint16_t pid) -{ - if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) - { - m_hasSwitched = true; - m_currentSerialIntf = 0; - m_endpointsToFetch = UBX_SERIALCOUNT*2; - } - else - { - m_hasSwitched = false; - m_endpointsToFetch = 1; - } -} - -/*virtual*/ bool UbxInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if( m_hasSwitched ) - { - DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); - if( intf_class == 0x0A ) - { - if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) - { - m_serialIntfMap[m_currentSerialIntf++] = intf_nb; - return true; - } - m_currentSerialIntf++; - } - } - else - { - if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) - { - return true; - } - } - return false; -} - -/*virtual*/ bool UbxInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if( m_hasSwitched ) - { - DBG("USBEndpoint on Interface #%d; Type:%d; Direction:%d", intf_nb, type, dir); - if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - else - { - if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - return false; -} - -/*virtual*/ WAN_DONGLE_TYPE UbxInitializer::getType() -{ - return WAN_DONGLE_TYPE_UBX; -} - -#endif /* USBHOST_3GMODULE */ From a4da76201606846f87cfc55f45ed1e99a09c7e1a Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:47:46 +0300 Subject: [PATCH 023/117] Removed references to specific initializers from the code --- libraries/USBHost/USB3GModule/WANDongle.cpp | 4 +- libraries/USBHost/USB3GModule/WANDongle.h | 4 +- .../USB3GModule/WANDongleInitializer.h | 116 +----------------- 3 files changed, 10 insertions(+), 114 deletions(-) diff --git a/libraries/USBHost/USB3GModule/WANDongle.cpp b/libraries/USBHost/USB3GModule/WANDongle.cpp index 99160d7711..27a0500ff4 100644 --- a/libraries/USBHost/USB3GModule/WANDongle.cpp +++ b/libraries/USBHost/USB3GModule/WANDongle.cpp @@ -130,7 +130,7 @@ bool WANDongle::disconnect() return true; } -WAN_DONGLE_TYPE WANDongle::getDongleType() +int WANDongle::getDongleType() { if( m_pInitializer != NULL ) { @@ -221,7 +221,7 @@ void WANDongle::init() bool WANDongle::addInitializer(WANDongleInitializer* pInitializer) { - if (m_totalInitializers >= MAX_DEVICE_CONNECTED) + if (m_totalInitializers >= WANDONGLE_MAX_INITIALIZERS) return false; m_Initializers[m_totalInitializers++] = pInitializer; return true; diff --git a/libraries/USBHost/USB3GModule/WANDongle.h b/libraries/USBHost/USB3GModule/WANDongle.h index 7d9df1baf8..ab12bdc6e4 100644 --- a/libraries/USBHost/USB3GModule/WANDongle.h +++ b/libraries/USBHost/USB3GModule/WANDongle.h @@ -73,7 +73,7 @@ public: */ bool disconnect(); - WAN_DONGLE_TYPE getDongleType(); + int getDongleType(); IUSBHostSerial& getSerial(int index); int getSerialCount(); @@ -100,7 +100,7 @@ protected: int m_serialCount; int m_totalInitializers; - WANDongleInitializer* m_Initializers[MAX_DEVICE_CONNECTED]; + WANDongleInitializer* m_Initializers[WANDONGLE_MAX_INITIALIZERS]; }; #endif /* USBHOST_3GMODULE */ diff --git a/libraries/USBHost/USB3GModule/WANDongleInitializer.h b/libraries/USBHost/USB3GModule/WANDongleInitializer.h index 66859a268c..bafded065e 100644 --- a/libraries/USBHost/USB3GModule/WANDongleInitializer.h +++ b/libraries/USBHost/USB3GModule/WANDongleInitializer.h @@ -30,20 +30,16 @@ using std::uint32_t; #include "USBHost.h" #include "IUSBEnumerator.h" -enum WAN_DONGLE_TYPE -{ - WAN_DONGLE_TYPE_UNKNOWN = -1, - WAN_DONGLE_TYPE_VODAFONEK3770 = 0, - WAN_DONGLE_TYPE_VODAFONEK3772Z = 1, - WAN_DONGLE_TYPE_UBX = 2, -}; - +// [TODO] move these declarations to a proper place #define WANDONGLE_MAX_SERIAL_PORTS 2 +#define WANDONGLE_MAX_INITIALIZERS 6 + +#define WAN_DONGLE_TYPE_UNKNOWN (-1) class WANDongleInitializer : public IUSBEnumerator { protected: - WANDongleInitializer(USBHost* pHost); + WANDongleInitializer(USBHost* pHost) { m_pHost = pHost; } USBHost* m_pHost; uint8_t m_serialIntfMap[WANDONGLE_MAX_SERIAL_PORTS]; @@ -68,109 +64,9 @@ public: virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) = 0; //Must return true if the endpoint will be used - virtual WAN_DONGLE_TYPE getType() = 0; + virtual int getType() = 0; virtual uint8_t getSerialIntf(int index) { return m_serialIntfMap[index]; } - - static WANDongleInitializer** getInitializers(USBHost* pHost); -}; - -class VodafoneK3770Initializer : public WANDongleInitializer -{ -public: - VodafoneK3770Initializer(USBHost* pHost); - - virtual uint16_t getMSDVid(); - virtual uint16_t getMSDPid(); - - virtual uint16_t getSerialVid(); - virtual uint16_t getSerialPid(); - - virtual bool switchMode(USBDeviceConnected* pDev); - - virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); - - virtual int getSerialPortCount(); - - virtual void setVidPid(uint16_t vid, uint16_t pid); - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType(); - -private: - - bool m_hasSwitched; - int m_currentSerialIntf; - int m_endpointsToFetch; -}; - -class VodafoneK3772ZInitializer : public WANDongleInitializer -{ -public: - VodafoneK3772ZInitializer(USBHost* pHost); - - virtual uint16_t getMSDVid(); - virtual uint16_t getMSDPid(); - - virtual uint16_t getSerialVid(); - virtual uint16_t getSerialPid(); - - virtual bool switchMode(USBDeviceConnected* pDev); - - virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); - - virtual int getSerialPortCount(); - - virtual void setVidPid(uint16_t vid, uint16_t pid); - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType(); - -private: - - bool m_hasSwitched; - int m_currentSerialIntf; - int m_endpointsToFetch; -}; - -//----------------------------------------------------------------------- -// mamm, u-blox Modem -//----------------------------------------------------------------------- - -class UbxInitializer : public WANDongleInitializer -{ -public: - UbxInitializer(USBHost* pHost); - - virtual uint16_t getMSDVid(); - virtual uint16_t getMSDPid(); - - virtual uint16_t getSerialVid(); - virtual uint16_t getSerialPid(); - - virtual bool switchMode(USBDeviceConnected* pDev); - - virtual int getSerialPortCount(); - - virtual void setVidPid(uint16_t vid, uint16_t pid); - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType(); - -private: - - bool m_hasSwitched; - int m_currentSerialIntf; - int m_endpointsToFetch; }; #endif /* USBHOST_3GMODULE */ From 864d3ef19585bedcd44869dbbe302707f8f173c4 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:52:47 +0300 Subject: [PATCH 024/117] Renamed USB3GModule to USBHost3GModule to keep the naming convention --- .../USBHost/{USB3GModule => USBHost3GModule}/IUSBHostSerial.h | 0 .../{USB3GModule => USBHost3GModule}/IUSBHostSerialListener.h | 0 libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongle.cpp | 0 libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongle.h | 0 .../{USB3GModule => USBHost3GModule}/WANDongleInitializer.h | 0 .../{USB3GModule => USBHost3GModule}/WANDongleSerialPort.cpp | 0 .../{USB3GModule => USBHost3GModule}/WANDongleSerialPort.h | 0 7 files changed, 0 insertions(+), 0 deletions(-) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/IUSBHostSerial.h (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/IUSBHostSerialListener.h (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongle.cpp (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongle.h (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongleInitializer.h (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongleSerialPort.cpp (100%) rename libraries/USBHost/{USB3GModule => USBHost3GModule}/WANDongleSerialPort.h (100%) diff --git a/libraries/USBHost/USB3GModule/IUSBHostSerial.h b/libraries/USBHost/USBHost3GModule/IUSBHostSerial.h similarity index 100% rename from libraries/USBHost/USB3GModule/IUSBHostSerial.h rename to libraries/USBHost/USBHost3GModule/IUSBHostSerial.h diff --git a/libraries/USBHost/USB3GModule/IUSBHostSerialListener.h b/libraries/USBHost/USBHost3GModule/IUSBHostSerialListener.h similarity index 100% rename from libraries/USBHost/USB3GModule/IUSBHostSerialListener.h rename to libraries/USBHost/USBHost3GModule/IUSBHostSerialListener.h diff --git a/libraries/USBHost/USB3GModule/WANDongle.cpp b/libraries/USBHost/USBHost3GModule/WANDongle.cpp similarity index 100% rename from libraries/USBHost/USB3GModule/WANDongle.cpp rename to libraries/USBHost/USBHost3GModule/WANDongle.cpp diff --git a/libraries/USBHost/USB3GModule/WANDongle.h b/libraries/USBHost/USBHost3GModule/WANDongle.h similarity index 100% rename from libraries/USBHost/USB3GModule/WANDongle.h rename to libraries/USBHost/USBHost3GModule/WANDongle.h diff --git a/libraries/USBHost/USB3GModule/WANDongleInitializer.h b/libraries/USBHost/USBHost3GModule/WANDongleInitializer.h similarity index 100% rename from libraries/USBHost/USB3GModule/WANDongleInitializer.h rename to libraries/USBHost/USBHost3GModule/WANDongleInitializer.h diff --git a/libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp similarity index 100% rename from libraries/USBHost/USB3GModule/WANDongleSerialPort.cpp rename to libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp diff --git a/libraries/USBHost/USB3GModule/WANDongleSerialPort.h b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.h similarity index 100% rename from libraries/USBHost/USB3GModule/WANDongleSerialPort.h rename to libraries/USBHost/USBHost3GModule/WANDongleSerialPort.h From 1c088eed13cbec7a55f71b59237c50246840baf8 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:53:58 +0300 Subject: [PATCH 025/117] Moved USBSerialStream from the CellularModem library to USBHost This removes any dependency on USB code from CellularModem. --- .../USBHost3GModule/USBSerialStream.cpp | 236 ++++++++++++++++++ .../USBHost/USBHost3GModule/USBSerialStream.h | 73 ++++++ 2 files changed, 309 insertions(+) create mode 100644 libraries/USBHost/USBHost3GModule/USBSerialStream.cpp create mode 100644 libraries/USBHost/USBHost3GModule/USBSerialStream.h diff --git a/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp b/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp new file mode 100644 index 0000000000..81349ce884 --- /dev/null +++ b/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp @@ -0,0 +1,236 @@ +/* USBSerialStream.cpp */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "USBSerialStream.cpp" +#endif + +#include "core/fwk.h" + +#include + +#include "USBSerialStream.h" + + +USBSerialStream::USBSerialStream(IUSBHostSerial& serial) : m_serial(serial), m_serialTxFifoEmpty(true), +m_availableSphre(1), m_spaceSphre(1), m_inBuf() +{ + m_availableSphre.wait(); + m_spaceSphre.wait(); + //Attach interrupts + m_serial.attach(this); +} + +/*virtual*/ USBSerialStream::~USBSerialStream() +{ + m_serial.attach(NULL); +} + +//0 for non-blocking (returns immediately), -1 for infinite blocking +/*virtual*/ int USBSerialStream::read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout/*=osWaitForever*/) +{ + DBG("Trying to read at most %d chars", maxLength); + int ret = waitAvailable(timeout); + if(ret) + { + WARN("Error %d while waiting for incoming data", ret); + return ret; + } + int a = available(); //Prevent macro issues + int readLen = MIN( a, maxLength ); + *pLength = readLen; + + setupReadableISR(false); + while(readLen--) + { + m_inBuf.dequeue(buf); + buf++; + } + setupReadableISR(true); + DBG("Read %d chars successfully", *pLength); + return OK; +} + +/*virtual*/ size_t USBSerialStream::available() +{ + setupReadableISR(false); //m_inBuf.available() is not reentrant + size_t len = m_inBuf.available(); + setupReadableISR(true); + return len; +} + +/*virtual*/ int USBSerialStream::waitAvailable(uint32_t timeout/*=osWaitForever*/) //Wait for data to be available +{ + int ret; + if(available()) //Is data already available? + { + while( m_availableSphre.wait(0) > 0 ); //Clear the queue as data is available + return OK; + } + + DBG("Waiting for data availability %d ms (-1 is infinite)", timeout); + ret = m_availableSphre.wait(timeout); //Wait for data to arrive or for abort + if(ret <= 0) + { + DBG("Timeout"); + return NET_TIMEOUT; + } + if(!m_inBuf.available()) //Even if abort has been called, return that data is available + { + DBG("Aborted"); + return NET_INTERRUPTED; + } + DBG("Finished waiting"); + while( m_availableSphre.wait(0) > 0 ); //Clear the queue as data is available + return OK; +} + +/*virtual*/ int USBSerialStream::abortRead() //Abort current reading (or waiting) operation +{ + if( /*!available()*/true ) //If there is data pending, no need to abort + { + m_availableSphre.release(); //Force exiting the waiting state + } + else + { + DBG("Serial is readable"); ; + } + return OK; +} + +void USBSerialStream::setupReadableISR(bool en) +{ + m_serial.setupIrq(en, IUSBHostSerial::RxIrq); +} + +void USBSerialStream::readable() //Callback from m_serial when new data is available +{ + while(m_serial.readable()) + { + m_inBuf.queue(m_serial.getc()); + } + m_serial.readPacket(); //Start read of next packet + m_availableSphre.release(); //Force exiting the waiting state +} + +//0 for non-blocking (returns immediately), -1 for infinite blocking +/*virtual*/ int USBSerialStream::write(uint8_t* buf, size_t length, uint32_t timeout/*=-1*/) +{ + DBG("Trying to write %d chars", length); + do + { + int ret = waitSpace(timeout); + if(ret) + { + WARN("Error %d while waiting for space", ret); + return ret; + } + int s = space(); //Prevent macro issues + int writeLen = MIN( s, length ); + DBG("Writing %d chars", writeLen); + setupWriteableISR(false); + while(writeLen) + { + m_outBuf.queue(*buf); + buf++; + length--; + writeLen--; + } + //If m_serial tx fifo is empty we need to start the packet write + if( m_outBuf.available() && m_serialTxFifoEmpty ) + { + writeable(); + } + setupWriteableISR(true); + } while(length); + + DBG("Write successful"); + return OK; +} + +/*virtual*/ size_t USBSerialStream::space() +{ + setupWriteableISR(false); //m_outBuf.available() is not reentrant + size_t len = CIRCBUF_SIZE - m_outBuf.available(); + setupWriteableISR(true); + return len; +} + +/*virtual*/ int USBSerialStream::waitSpace(uint32_t timeout/*=-1*/) //Wait for space to be available +{ + int ret; + if(space()) //Is still space already left? + { + while( m_spaceSphre.wait(0) > 0); //Clear the queue as space is available + return OK; + } + + DBG("Waiting for data space %d ms (-1 is infinite)", timeout); + ret = m_spaceSphre.wait(timeout); //Wait for space to be made or for abort + if(ret <= 0) + { + DBG("Timeout"); + return NET_TIMEOUT; + } + if(!space()) //Even if abort has been called, return that space is available + { + DBG("Aborted"); + return NET_INTERRUPTED; + } + while( m_spaceSphre.wait(0) > 0); //Clear the queue as space is available + return OK; +} + +/*virtual*/ int USBSerialStream::abortWrite() //Abort current writing (or waiting) operation +{ + if( !space() ) //If there is space left, no need to abort + { + m_spaceSphre.release(); //Force exiting the waiting state + } + return OK; +} + +void USBSerialStream::setupWriteableISR(bool en) +{ + m_serial.setupIrq(en, IUSBHostSerial::TxIrq); +} + +void USBSerialStream::writeable() //Callback from m_serial when new space is available +{ + if(m_outBuf.isEmpty()) + { + m_serialTxFifoEmpty = true; + } + else + { + m_serialTxFifoEmpty = false; + while(m_serial.writeable() && !m_outBuf.isEmpty()) + { + uint8_t c; + m_outBuf.dequeue(&c); + m_serial.putc((char)c); + } + m_serial.writePacket(); //Start packet write + } + if(!m_outBuf.isFull()) + { + m_spaceSphre.release(); //Force exiting the waiting state + } +} diff --git a/libraries/USBHost/USBHost3GModule/USBSerialStream.h b/libraries/USBHost/USBHost3GModule/USBSerialStream.h new file mode 100644 index 0000000000..1af5f019db --- /dev/null +++ b/libraries/USBHost/USBHost3GModule/USBSerialStream.h @@ -0,0 +1,73 @@ +/* USBSerialStream.h */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef USBSERIALSTREAM_H_ +#define USBSERIALSTREAM_H_ + + +#include "core/fwk.h" + +#include "USBHost3GModule/IUSBHostSerial.h" +#include "USBHost3GModule/IUSBHostSerialListener.h" + +#include "rtos.h" +#include "core/MtxCircBuffer.h" + +/* Input Serial Stream for USB virtual serial ports interfaces +This class is not thread-safe, except for the *Abort() methods that can be called by any thread/ISR +*/ +#define CIRCBUF_SIZE 127 +class USBSerialStream : public IOStream, IUSBHostSerialListener +{ +public: + USBSerialStream(IUSBHostSerial& serial); + /*virtual*/ ~USBSerialStream(); + + //0 for non-blocking (returns immediately), osWaitForever for infinite blocking + virtual int read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout=osWaitForever); + virtual size_t available(); + virtual int waitAvailable(uint32_t timeout=osWaitForever); //Wait for data to be available + virtual int abortRead(); //Abort current reading (or waiting) operation + + + //0 for non-blocking (returns immediately), osWaitForever for infinite blocking + virtual int write(uint8_t* buf, size_t length, uint32_t timeout=osWaitForever); + virtual size_t space(); + virtual int waitSpace(uint32_t timeout=osWaitForever); //Wait for space to be available + virtual int abortWrite(); //Abort current writing (or waiting) operation + +private: + IUSBHostSerial& m_serial; + volatile bool m_serialTxFifoEmpty; + + void setupReadableISR(bool en); + virtual void readable(); //Callback from m_serial when new data is available + + Semaphore m_availableSphre; //Used for signalling + + void setupWriteableISR(bool en); + virtual void writeable(); //Callback from m_serial when new space is available + + Semaphore m_spaceSphre; //Used for signalling + + MtxCircBuffer m_inBuf; + MtxCircBuffer m_outBuf; +}; + +#endif /* USBSERIALSTREAM_H_ */ From 26ac4e528866ab1b48ee293317ed5b4cce686ee0 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:55:04 +0300 Subject: [PATCH 026/117] Remove "debugging LED" from USBHost.cpp --- libraries/USBHost/USBHost/USBHost.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/libraries/USBHost/USBHost/USBHost.cpp b/libraries/USBHost/USBHost/USBHost.cpp index 3a4fef5ad4..1d2dca5203 100644 --- a/libraries/USBHost/USBHost/USBHost.cpp +++ b/libraries/USBHost/USBHost/USBHost.cpp @@ -28,8 +28,6 @@ USBHost * USBHost::instHost = NULL; #define MIN(a, b) ((a > b) ? b : a) -DigitalOut l4(LED4); - /** * How interrupts are processed: * - new device connected: @@ -72,7 +70,6 @@ void USBHost::usb_process() { if (evt.status == osEventMail) { - l4 = !l4; message_t * usb_msg = (message_t*)evt.value.p; switch (usb_msg->event_id) { From d8c3822c4c4e995cd7eaff0ce99f2d3284dde9cd Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 15:55:31 +0300 Subject: [PATCH 027/117] Changed USBHostConf.h to better match the previous USBHost configuration. --- libraries/USBHost/USBHost/USBHostConf.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/libraries/USBHost/USBHost/USBHostConf.h b/libraries/USBHost/USBHost/USBHostConf.h index b9f6026ceb..b0d9ff76b8 100644 --- a/libraries/USBHost/USBHost/USBHostConf.h +++ b/libraries/USBHost/USBHost/USBHostConf.h @@ -21,37 +21,37 @@ * Maximum number of devices that can be connected * to the usb host */ -#define MAX_DEVICE_CONNECTED 1 +#define MAX_DEVICE_CONNECTED 5 /* * Maximum of Hub connected to the usb host */ -#define MAX_HUB_NB 0 +#define MAX_HUB_NB 2 /* * Maximum number of ports on a USB hub */ -#define MAX_HUB_PORT 0 +#define MAX_HUB_PORT 4 /* * Enable USBHostMSD */ -#define USBHOST_MSD 0 +#define USBHOST_MSD 1 /* * Enable USBHostKeyboard */ -#define USBHOST_KEYBOARD 0 +#define USBHOST_KEYBOARD 1 /* * Enable USBHostMouse */ -#define USBHOST_MOUSE 0 +#define USBHOST_MOUSE 1 /* * Enable USBHostSerial */ -#define USBHOST_SERIAL 0 +#define USBHOST_SERIAL 1 /* * Enable USB3Gmodule @@ -66,7 +66,7 @@ /* * Maximum number of endpoints on each interface */ -#define MAX_ENDPOINT_PER_INTERFACE 2 +#define MAX_ENDPOINT_PER_INTERFACE 3 /* * Maximum number of endpoint descriptors that can be allocated From 52e23e58c0174a595af367b0ef5cc79ef3933698 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 16:35:35 +0300 Subject: [PATCH 028/117] Added default path for Goanna --- workspace_tools/settings.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/workspace_tools/settings.py b/workspace_tools/settings.py index 9b6d3e9ce8..738c2a4394 100644 --- a/workspace_tools/settings.py +++ b/workspace_tools/settings.py @@ -68,6 +68,9 @@ IAR_PATH = "C:/Program Files (x86)/IAR Systems/Embedded Workbench 6.0/arm" CW_GCC_PATH = "C:/Freescale/CW MCU v10.3/Cross_Tools/arm-none-eabi-gcc-4_6_2/bin" CW_EWL_PATH = "C:/Freescale/CW MCU v10.3/MCU/ARM_GCC_Support/ewl/lib" +# Goanna static analyzer +GOANNA_PATH = "c:/Program Files (x86)/RedLizards/Goanna Central 3.1.4/bin" + BUILD_OPTIONS = [] ############################################################################## From aa209e30023ada41b20771db3ad0c49dc908b0bf Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 23:57:09 +0300 Subject: [PATCH 029/117] Remove USBSerialStream from USBHost The code from USBSerialStream depends on some headers from CellularModem, so remove it from USBHost. --- .../USBHost3GModule/USBSerialStream.cpp | 236 ------------------ .../USBHost/USBHost3GModule/USBSerialStream.h | 73 ------ 2 files changed, 309 deletions(-) delete mode 100644 libraries/USBHost/USBHost3GModule/USBSerialStream.cpp delete mode 100644 libraries/USBHost/USBHost3GModule/USBSerialStream.h diff --git a/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp b/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp deleted file mode 100644 index 81349ce884..0000000000 --- a/libraries/USBHost/USBHost3GModule/USBSerialStream.cpp +++ /dev/null @@ -1,236 +0,0 @@ -/* USBSerialStream.cpp */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#define __DEBUG__ 0 -#ifndef __MODULE__ -#define __MODULE__ "USBSerialStream.cpp" -#endif - -#include "core/fwk.h" - -#include - -#include "USBSerialStream.h" - - -USBSerialStream::USBSerialStream(IUSBHostSerial& serial) : m_serial(serial), m_serialTxFifoEmpty(true), -m_availableSphre(1), m_spaceSphre(1), m_inBuf() -{ - m_availableSphre.wait(); - m_spaceSphre.wait(); - //Attach interrupts - m_serial.attach(this); -} - -/*virtual*/ USBSerialStream::~USBSerialStream() -{ - m_serial.attach(NULL); -} - -//0 for non-blocking (returns immediately), -1 for infinite blocking -/*virtual*/ int USBSerialStream::read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout/*=osWaitForever*/) -{ - DBG("Trying to read at most %d chars", maxLength); - int ret = waitAvailable(timeout); - if(ret) - { - WARN("Error %d while waiting for incoming data", ret); - return ret; - } - int a = available(); //Prevent macro issues - int readLen = MIN( a, maxLength ); - *pLength = readLen; - - setupReadableISR(false); - while(readLen--) - { - m_inBuf.dequeue(buf); - buf++; - } - setupReadableISR(true); - DBG("Read %d chars successfully", *pLength); - return OK; -} - -/*virtual*/ size_t USBSerialStream::available() -{ - setupReadableISR(false); //m_inBuf.available() is not reentrant - size_t len = m_inBuf.available(); - setupReadableISR(true); - return len; -} - -/*virtual*/ int USBSerialStream::waitAvailable(uint32_t timeout/*=osWaitForever*/) //Wait for data to be available -{ - int ret; - if(available()) //Is data already available? - { - while( m_availableSphre.wait(0) > 0 ); //Clear the queue as data is available - return OK; - } - - DBG("Waiting for data availability %d ms (-1 is infinite)", timeout); - ret = m_availableSphre.wait(timeout); //Wait for data to arrive or for abort - if(ret <= 0) - { - DBG("Timeout"); - return NET_TIMEOUT; - } - if(!m_inBuf.available()) //Even if abort has been called, return that data is available - { - DBG("Aborted"); - return NET_INTERRUPTED; - } - DBG("Finished waiting"); - while( m_availableSphre.wait(0) > 0 ); //Clear the queue as data is available - return OK; -} - -/*virtual*/ int USBSerialStream::abortRead() //Abort current reading (or waiting) operation -{ - if( /*!available()*/true ) //If there is data pending, no need to abort - { - m_availableSphre.release(); //Force exiting the waiting state - } - else - { - DBG("Serial is readable"); ; - } - return OK; -} - -void USBSerialStream::setupReadableISR(bool en) -{ - m_serial.setupIrq(en, IUSBHostSerial::RxIrq); -} - -void USBSerialStream::readable() //Callback from m_serial when new data is available -{ - while(m_serial.readable()) - { - m_inBuf.queue(m_serial.getc()); - } - m_serial.readPacket(); //Start read of next packet - m_availableSphre.release(); //Force exiting the waiting state -} - -//0 for non-blocking (returns immediately), -1 for infinite blocking -/*virtual*/ int USBSerialStream::write(uint8_t* buf, size_t length, uint32_t timeout/*=-1*/) -{ - DBG("Trying to write %d chars", length); - do - { - int ret = waitSpace(timeout); - if(ret) - { - WARN("Error %d while waiting for space", ret); - return ret; - } - int s = space(); //Prevent macro issues - int writeLen = MIN( s, length ); - DBG("Writing %d chars", writeLen); - setupWriteableISR(false); - while(writeLen) - { - m_outBuf.queue(*buf); - buf++; - length--; - writeLen--; - } - //If m_serial tx fifo is empty we need to start the packet write - if( m_outBuf.available() && m_serialTxFifoEmpty ) - { - writeable(); - } - setupWriteableISR(true); - } while(length); - - DBG("Write successful"); - return OK; -} - -/*virtual*/ size_t USBSerialStream::space() -{ - setupWriteableISR(false); //m_outBuf.available() is not reentrant - size_t len = CIRCBUF_SIZE - m_outBuf.available(); - setupWriteableISR(true); - return len; -} - -/*virtual*/ int USBSerialStream::waitSpace(uint32_t timeout/*=-1*/) //Wait for space to be available -{ - int ret; - if(space()) //Is still space already left? - { - while( m_spaceSphre.wait(0) > 0); //Clear the queue as space is available - return OK; - } - - DBG("Waiting for data space %d ms (-1 is infinite)", timeout); - ret = m_spaceSphre.wait(timeout); //Wait for space to be made or for abort - if(ret <= 0) - { - DBG("Timeout"); - return NET_TIMEOUT; - } - if(!space()) //Even if abort has been called, return that space is available - { - DBG("Aborted"); - return NET_INTERRUPTED; - } - while( m_spaceSphre.wait(0) > 0); //Clear the queue as space is available - return OK; -} - -/*virtual*/ int USBSerialStream::abortWrite() //Abort current writing (or waiting) operation -{ - if( !space() ) //If there is space left, no need to abort - { - m_spaceSphre.release(); //Force exiting the waiting state - } - return OK; -} - -void USBSerialStream::setupWriteableISR(bool en) -{ - m_serial.setupIrq(en, IUSBHostSerial::TxIrq); -} - -void USBSerialStream::writeable() //Callback from m_serial when new space is available -{ - if(m_outBuf.isEmpty()) - { - m_serialTxFifoEmpty = true; - } - else - { - m_serialTxFifoEmpty = false; - while(m_serial.writeable() && !m_outBuf.isEmpty()) - { - uint8_t c; - m_outBuf.dequeue(&c); - m_serial.putc((char)c); - } - m_serial.writePacket(); //Start packet write - } - if(!m_outBuf.isFull()) - { - m_spaceSphre.release(); //Force exiting the waiting state - } -} diff --git a/libraries/USBHost/USBHost3GModule/USBSerialStream.h b/libraries/USBHost/USBHost3GModule/USBSerialStream.h deleted file mode 100644 index 1af5f019db..0000000000 --- a/libraries/USBHost/USBHost3GModule/USBSerialStream.h +++ /dev/null @@ -1,73 +0,0 @@ -/* USBSerialStream.h */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef USBSERIALSTREAM_H_ -#define USBSERIALSTREAM_H_ - - -#include "core/fwk.h" - -#include "USBHost3GModule/IUSBHostSerial.h" -#include "USBHost3GModule/IUSBHostSerialListener.h" - -#include "rtos.h" -#include "core/MtxCircBuffer.h" - -/* Input Serial Stream for USB virtual serial ports interfaces -This class is not thread-safe, except for the *Abort() methods that can be called by any thread/ISR -*/ -#define CIRCBUF_SIZE 127 -class USBSerialStream : public IOStream, IUSBHostSerialListener -{ -public: - USBSerialStream(IUSBHostSerial& serial); - /*virtual*/ ~USBSerialStream(); - - //0 for non-blocking (returns immediately), osWaitForever for infinite blocking - virtual int read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout=osWaitForever); - virtual size_t available(); - virtual int waitAvailable(uint32_t timeout=osWaitForever); //Wait for data to be available - virtual int abortRead(); //Abort current reading (or waiting) operation - - - //0 for non-blocking (returns immediately), osWaitForever for infinite blocking - virtual int write(uint8_t* buf, size_t length, uint32_t timeout=osWaitForever); - virtual size_t space(); - virtual int waitSpace(uint32_t timeout=osWaitForever); //Wait for space to be available - virtual int abortWrite(); //Abort current writing (or waiting) operation - -private: - IUSBHostSerial& m_serial; - volatile bool m_serialTxFifoEmpty; - - void setupReadableISR(bool en); - virtual void readable(); //Callback from m_serial when new data is available - - Semaphore m_availableSphre; //Used for signalling - - void setupWriteableISR(bool en); - virtual void writeable(); //Callback from m_serial when new space is available - - Semaphore m_spaceSphre; //Used for signalling - - MtxCircBuffer m_inBuf; - MtxCircBuffer m_outBuf; -}; - -#endif /* USBSERIALSTREAM_H_ */ From 2f26d096068de09a47b93fd4ac097201f3ba25c4 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 16 Oct 2013 23:58:40 +0300 Subject: [PATCH 030/117] Changed debugging macros in WANDongle and WANDongleSerialPort Now they use "dbg.h" which is a part of USBHost, thus eliminating the dependency on code from CellularModem. --- .../USBHost/USBHost3GModule/WANDongle.cpp | 40 +++++++++---------- .../USBHost3GModule/WANDongleSerialPort.cpp | 26 ++++++------ 2 files changed, 33 insertions(+), 33 deletions(-) diff --git a/libraries/USBHost/USBHost3GModule/WANDongle.cpp b/libraries/USBHost/USBHost3GModule/WANDongle.cpp index 27a0500ff4..f83399bc00 100644 --- a/libraries/USBHost/USBHost3GModule/WANDongle.cpp +++ b/libraries/USBHost/USBHost3GModule/WANDongle.cpp @@ -25,7 +25,7 @@ #define __MODULE__ "WANDongle.cpp" #endif -#include "core/dbg.h" +#include "dbg.h" #include #include "rtos.h" @@ -47,7 +47,7 @@ bool WANDongle::tryConnect() { //FIXME should run on USB thread - DBG("Trying to connect device"); + USB_DBG("Trying to connect device"); if (dev_connected) { return true; @@ -61,23 +61,23 @@ bool WANDongle::tryConnect() { m_pInitializer = NULL; //Will be set in setVidPid callback - DBG("Enumerate"); + USB_DBG("Enumerate"); int ret = host->enumerate(dev, this); if(ret) { return false; } - DBG("Device has VID:%04x PID:%04x", dev->getVid(), dev->getPid()); + USB_DBG("Device has VID:%04x PID:%04x", dev->getVid(), dev->getPid()); if(m_pInitializer) //If an initializer has been found { - DBG("m_pInitializer=%p", m_pInitializer); - DBG("m_pInitializer->getSerialVid()=%04x", m_pInitializer->getSerialVid()); - DBG("m_pInitializer->getSerialPid()=%04x", m_pInitializer->getSerialPid()); + USB_DBG("m_pInitializer=%p", m_pInitializer); + USB_DBG("m_pInitializer->getSerialVid()=%04x", m_pInitializer->getSerialVid()); + USB_DBG("m_pInitializer->getSerialPid()=%04x", m_pInitializer->getSerialPid()); if ((dev->getVid() == m_pInitializer->getSerialVid()) && (dev->getPid() == m_pInitializer->getSerialPid())) { - DBG("The dongle is in virtual serial mode"); + USB_DBG("The dongle is in virtual serial mode"); host->registerDriver(dev, 0, this, &WANDongle::init); m_serialCount = m_pInitializer->getSerialPortCount(); if( m_serialCount > WANDONGLE_MAX_SERIAL_PORTS ) @@ -86,13 +86,13 @@ bool WANDongle::tryConnect() } for(int j = 0; j < m_serialCount; j++) { - DBG("Connecting serial port #%d", j+1); - DBG("Ep %p", m_pInitializer->getEp(dev, j, false)); - DBG("Ep %p", m_pInitializer->getEp(dev, j, true)); + USB_DBG("Connecting serial port #%d", j+1); + USB_DBG("Ep %p", m_pInitializer->getEp(dev, j, false)); + USB_DBG("Ep %p", m_pInitializer->getEp(dev, j, true)); m_serial[j].connect( dev, m_pInitializer->getEp(dev, j, false), m_pInitializer->getEp(dev, j, true) ); } - DBG("Device connected"); + USB_DBG("Device connected"); dev_connected = true; @@ -101,16 +101,16 @@ bool WANDongle::tryConnect() } else if ((dev->getVid() == m_pInitializer->getMSDVid()) && (dev->getPid() == m_pInitializer->getMSDPid())) { - DBG("Vodafone K3370 dongle detected in MSD mode"); + USB_DBG("Vodafone K3370 dongle detected in MSD mode"); //Try to switch if( m_pInitializer->switchMode(dev) ) { - DBG("Switched OK"); + USB_DBG("Switched OK"); return false; //Will be connected on a next iteration } else { - ERR("Could not switch mode"); + USB_ERR("Could not switch mode"); return false; } } @@ -171,18 +171,18 @@ void WANDongle::init() for(unsigned i = 0; i < m_totalInitializers; i++) { initializer = m_Initializers[i]; - DBG("initializer=%p", initializer); - DBG("initializer->getSerialVid()=%04x", initializer->getSerialVid()); - DBG("initializer->getSerialPid()=%04x", initializer->getSerialPid()); + USB_DBG("initializer=%p", initializer); + USB_DBG("initializer->getSerialVid()=%04x", initializer->getSerialVid()); + USB_DBG("initializer->getSerialPid()=%04x", initializer->getSerialPid()); if ((dev->getVid() == initializer->getSerialVid()) && (dev->getPid() == initializer->getSerialPid())) { - DBG("The dongle is in virtual serial mode"); + USB_DBG("The dongle is in virtual serial mode"); m_pInitializer = initializer; break; } else if ((dev->getVid() == initializer->getMSDVid()) && (dev->getPid() == initializer->getMSDPid())) { - DBG("Dongle detected in MSD mode"); + USB_DBG("Dongle detected in MSD mode"); m_pInitializer = initializer; break; } diff --git a/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp index 7b6fa9e01a..edf908ac10 100644 --- a/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp +++ b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp @@ -25,7 +25,7 @@ #define __MODULE__ "WANDongleSerialPort.cpp" #endif -#include "core/dbg.h" +#include "dbg.h" #include #include "rtos.h" @@ -65,31 +65,31 @@ void WANDongleSerialPort::reset() int WANDongleSerialPort::readPacket() { - DBG("Read packet on %p", this); + USB_DBG("Read packet on %p", this); rx_mtx.lock(); if(lock_rx) { - ERR("Fail"); + USB_ERR("Fail"); rx_mtx.unlock(); return -1; } if( bulk_in == NULL ) { - WARN("Port is disconnected"); + USB_WARN("Port is disconnected"); rx_mtx.unlock(); return -1; } lock_rx = true; //Receiving rx_mtx.unlock(); -// DBG("readPacket"); +// USB_DBG("readPacket"); //lock_rx.lock(); USB_TYPE res = host->bulkRead(dev, (USBEndpoint *)bulk_in, buf_in, ((USBEndpoint *)bulk_in)->getSize(), false); //Queue transfer if(res != USB_TYPE_PROCESSING) { //lock_rx.unlock(); - ERR("host->bulkRead() returned %d", res); + USB_ERR("host->bulkRead() returned %d", res); Thread::wait(100); return -1; } @@ -101,28 +101,28 @@ int WANDongleSerialPort::writePacket() tx_mtx.lock(); if(lock_tx) { - ERR("Fail"); + USB_ERR("Fail"); tx_mtx.unlock(); return -1; } if( bulk_out == NULL ) { - WARN("Port is disconnected"); + USB_WARN("Port is disconnected"); tx_mtx.unlock(); return -1; } lock_tx = true; //Transmitting tx_mtx.unlock(); -// DBG("writePacket"); +// USB_DBG("writePacket"); //lock_tx.lock(); USB_TYPE res = host->bulkWrite(dev, (USBEndpoint *)bulk_out, buf_out, buf_out_len, false); //Queue transfer if(res != USB_TYPE_PROCESSING) { //lock_tx.unlock(); - ERR("host->bulkWrite() returned %d", res); + USB_ERR("host->bulkWrite() returned %d", res); Thread::wait(100); return -1; } @@ -142,7 +142,7 @@ int WANDongleSerialPort::putc(int c) } else { - ERR("CAN'T WRITE!"); + USB_ERR("CAN'T WRITE!"); } tx_mtx.unlock(); return c; @@ -162,7 +162,7 @@ int WANDongleSerialPort::getc() } else { - ERR("CAN'T READ!"); + USB_ERR("CAN'T READ!"); } rx_mtx.unlock(); return c; @@ -305,7 +305,7 @@ void WANDongleSerialPort::rxHandler() else //Error, try reading again { //lock_rx.unlock(); - DBG("Trying again"); + USB_DBG("Trying again"); readPacket(); } } From 6a5d7c654dfdbdf6ded00871f0db8a03e6120ddd Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 10:33:19 +0300 Subject: [PATCH 031/117] Modifications for compatibility with GCC --- libraries/USBHost/USBHost3GModule/IUSBHostSerial.h | 4 ++++ libraries/USBHost/USBHost3GModule/WANDongle.cpp | 6 +++--- libraries/USBHost/USBHost3GModule/WANDongleInitializer.h | 5 ++--- libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp | 2 +- 4 files changed, 10 insertions(+), 7 deletions(-) diff --git a/libraries/USBHost/USBHost3GModule/IUSBHostSerial.h b/libraries/USBHost/USBHost3GModule/IUSBHostSerial.h index 8b96996399..5814fdd883 100644 --- a/libraries/USBHost/USBHost3GModule/IUSBHostSerial.h +++ b/libraries/USBHost/USBHost3GModule/IUSBHostSerial.h @@ -30,6 +30,10 @@ #include "IUSBHostSerialListener.h" +// This is needed by some versions of GCC +#undef putc +#undef getc + class IUSBHostSerial { public: diff --git a/libraries/USBHost/USBHost3GModule/WANDongle.cpp b/libraries/USBHost/USBHost3GModule/WANDongle.cpp index f83399bc00..e0d3cfdffe 100644 --- a/libraries/USBHost/USBHost3GModule/WANDongle.cpp +++ b/libraries/USBHost/USBHost3GModule/WANDongle.cpp @@ -26,7 +26,7 @@ #endif #include "dbg.h" -#include +#include #include "rtos.h" #include "WANDongle.h" @@ -168,7 +168,7 @@ void WANDongle::init() { WANDongleInitializer* initializer; - for(unsigned i = 0; i < m_totalInitializers; i++) + for(int i = 0; i < m_totalInitializers; i++) { initializer = m_Initializers[i]; USB_DBG("initializer=%p", initializer); @@ -229,7 +229,7 @@ bool WANDongle::addInitializer(WANDongleInitializer* pInitializer) WANDongle::~WANDongle() { - for(unsigned i = 0; i < m_totalInitializers; i++) + for(int i = 0; i < m_totalInitializers; i++) delete m_Initializers[i]; } diff --git a/libraries/USBHost/USBHost3GModule/WANDongleInitializer.h b/libraries/USBHost/USBHost3GModule/WANDongleInitializer.h index bafded065e..a78d69bdbd 100644 --- a/libraries/USBHost/USBHost3GModule/WANDongleInitializer.h +++ b/libraries/USBHost/USBHost3GModule/WANDongleInitializer.h @@ -23,9 +23,7 @@ #ifdef USBHOST_3GMODULE -#include -using std::uint16_t; -using std::uint32_t; +#include #include "USBHost.h" #include "IUSBEnumerator.h" @@ -44,6 +42,7 @@ protected: uint8_t m_serialIntfMap[WANDONGLE_MAX_SERIAL_PORTS]; public: + virtual ~WANDongleInitializer() {} virtual uint16_t getMSDVid() = 0; virtual uint16_t getMSDPid() = 0; diff --git a/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp index edf908ac10..4cb43379e4 100644 --- a/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp +++ b/libraries/USBHost/USBHost3GModule/WANDongleSerialPort.cpp @@ -26,7 +26,7 @@ #endif #include "dbg.h" -#include +#include #include "rtos.h" #include "WANDongleSerialPort.h" From 7585a23e6c29c41da4793a46a746ac3ec743b780 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 12:01:55 +0300 Subject: [PATCH 032/117] Added CellularModem library, removed old VodafoneUSBModem library --- .../USB3GModule/IUSBHostSerial.h | 85 -- .../USB3GModule/IUSBHostSerialListener.h | 32 - .../USB3GModule/WANDongle.cpp | 230 ----- .../USB3GModule/WANDongleInitializer.cpp | 265 ----- .../USB3GModule/WANDongleInitializer.h | 130 --- .../USB3GModule/WANDongleSerialPort.cpp | 340 ------- .../USB3GModule/WANDongleSerialPort.h | 126 --- .../USBHost/USBDeviceConnected.cpp | 122 --- .../USBHost/USBDeviceConnected.h | 205 ---- .../USBHostWANDongle/USBHost/USBEndpoint.cpp | 233 ----- .../USBHostWANDongle/USBHost/USBEndpoint.h | 189 ---- .../USBHostWANDongle/USBHost/USBHALHost.cpp | 404 -------- .../USBHostWANDongle/USBHost/USBHALHost.h | 206 ---- .../USBHostWANDongle/USBHost/USBHost.cpp | 960 ------------------ .../USBHostWANDongle/USBHost/USBHost.h | 304 ------ .../USBHostWANDongle/USBHost/USBHostTypes.h | 191 ---- .../serial/io/IOSerialStream.cpp | 253 ----- .../serial/io/IOSerialStream.h | 72 -- .../net/VodafoneUSBModem/socket/bsd_socket.h | 34 - libraries/net/VodafoneUSBModem/socket/netdb.h | 47 - .../net/VodafoneUSBModem/socket/netinet/in.h | 25 - .../net/VodafoneUSBModem/socket/sys/socket.h | 126 --- .../CellularModem}/at/ATCommandsInterface.cpp | 0 .../CellularModem}/at/ATCommandsInterface.h | 0 .../CellularModem}/core/IOStream.h | 2 - .../CellularModem}/core/MtxCircBuffer.h | 2 - .../CellularModem}/core/config.h | 0 .../CellularModem}/core/dbg.cpp | 0 .../CellularModem}/core/dbg.h | 0 .../CellularModem}/core/errors.h | 0 .../CellularModem}/core/fwk.h | 0 .../CellularModem}/ip/IPInterface.cpp | 0 .../CellularModem}/ip/IPInterface.h | 0 .../CellularModem}/ip/LwIPInterface.cpp | 0 .../CellularModem}/ip/LwIPInterface.h | 0 .../CellularModem}/ip/PPPIPInterface.cpp | 27 +- .../CellularModem}/ip/PPPIPInterface.h | 9 +- .../CellularModem}/link/LinkMonitor.cpp | 0 .../CellularModem}/link/LinkMonitor.h | 0 .../CellularModem}/lwipopts_conf.h | 1 + .../CellularModem/sms/CDMASMSInterface.cpp | 348 +++++++ .../CellularModem/sms/CDMASMSInterface.h | 90 ++ .../CellularModem/sms/GSMSMSInterface.cpp} | 37 +- .../CellularModem/sms/GSMSMSInterface.h} | 26 +- .../cellular/CellularModem/sms/SMSInterface.h | 67 ++ .../CellularModem}/ussd/USSDInterface.cpp | 0 .../CellularModem}/ussd/USSDInterface.h | 0 .../serial/usb/USBSerialStream.cpp | 0 .../serial/usb/USBSerialStream.h | 4 +- .../UbloxCDMAModemInitializer.cpp | 110 ++ .../UbloxCDMAModemInitializer.h} | 76 +- .../UbloxGSMModemInitializer.cpp | 131 +++ .../UbloxUSBModem/UbloxGSMModemInitializer.h} | 60 +- .../UbloxUSBModem/UbloxUSBCDMAModem.cpp | 398 ++++++++ .../UbloxUSBModem/UbloxUSBCDMAModem.h | 117 +++ .../UbloxUSBModem/UbloxUSBGSMModem.cpp} | 99 +- .../UbloxUSBModem/UbloxUSBGSMModem.h} | 18 +- workspace_tools/build.py | 8 +- workspace_tools/build_api.py | 1 + workspace_tools/libraries.py | 12 +- workspace_tools/paths.py | 4 + 61 files changed, 1443 insertions(+), 4783 deletions(-) delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerial.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerialListener.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.cpp delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.h delete mode 100644 libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHostTypes.h delete mode 100644 libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.cpp delete mode 100644 libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.h delete mode 100644 libraries/net/VodafoneUSBModem/socket/bsd_socket.h delete mode 100644 libraries/net/VodafoneUSBModem/socket/netdb.h delete mode 100644 libraries/net/VodafoneUSBModem/socket/netinet/in.h delete mode 100644 libraries/net/VodafoneUSBModem/socket/sys/socket.h rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/at/ATCommandsInterface.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/at/ATCommandsInterface.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/IOStream.h (99%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/MtxCircBuffer.h (99%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/config.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/dbg.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/dbg.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/errors.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/core/fwk.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/IPInterface.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/IPInterface.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/LwIPInterface.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/LwIPInterface.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/PPPIPInterface.cpp (89%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ip/PPPIPInterface.h (90%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/link/LinkMonitor.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/link/LinkMonitor.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/lwipopts_conf.h (99%) create mode 100644 libraries/net/cellular/CellularModem/sms/CDMASMSInterface.cpp create mode 100644 libraries/net/cellular/CellularModem/sms/CDMASMSInterface.h rename libraries/net/{VodafoneUSBModem/sms/SMSInterface.cpp => cellular/CellularModem/sms/GSMSMSInterface.cpp} (88%) rename libraries/net/{VodafoneUSBModem/sms/SMSInterface.h => cellular/CellularModem/sms/GSMSMSInterface.h} (87%) create mode 100644 libraries/net/cellular/CellularModem/sms/SMSInterface.h rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ussd/USSDInterface.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularModem}/ussd/USSDInterface.h (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularUSBModem}/serial/usb/USBSerialStream.cpp (100%) rename libraries/net/{VodafoneUSBModem => cellular/CellularUSBModem}/serial/usb/USBSerialStream.h (96%) create mode 100644 libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp rename libraries/net/{VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.h => cellular/UbloxUSBModem/UbloxCDMAModemInitializer.h} (57%) create mode 100644 libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.cpp rename libraries/net/{VodafoneUSBModem/USBHostWANDongle/USBHost/IUSBEnumerator.h => cellular/UbloxUSBModem/UbloxGSMModemInitializer.h} (54%) create mode 100644 libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.cpp create mode 100644 libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h rename libraries/net/{VodafoneUSBModem/VodafoneUSBModem.cpp => cellular/UbloxUSBModem/UbloxUSBGSMModem.cpp} (77%) rename libraries/net/{VodafoneUSBModem/VodafoneUSBModem.h => cellular/UbloxUSBModem/UbloxUSBGSMModem.h} (94%) diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerial.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerial.h deleted file mode 100644 index d52df46ec2..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerial.h +++ /dev/null @@ -1,85 +0,0 @@ -/* IUSBHostSerial.h */ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef IUSBHOSTSERIAL_H_ -#define IUSBHOSTSERIAL_H_ - -/** - * Generic interface to abstract 3G dongles' impl - */ - -#include "IUSBHostSerialListener.h" - -class IUSBHostSerial { -public: - - enum IrqType { - RxIrq, - TxIrq - }; - - /* - * Get a char from the dongle's serial interface - */ - virtual int getc() = 0; - - /* - * Put a char to the dongle's serial interface - */ - virtual int putc(int c) = 0; - - /* - * Read a packet from the dongle's serial interface, to be called after multiple getc() calls - */ - virtual int readPacket() = 0; - - /* - * Write a packet to the dongle's serial interface, to be called after multiple putc() calls - */ - virtual int writePacket() = 0; - - /** - * Check the number of bytes available. - * - * @returns the number of bytes available - */ - virtual int readable() = 0; - - /** - * Check the free space in output. - * - * @returns the number of bytes available - */ - virtual int writeable() = 0; - - /** - * Attach a handler to call when a packet is received / when a packet has been transmitted. - * - * @param pListener instance of the listener deriving from the IUSBHostSerialListener - */ - virtual void attach(IUSBHostSerialListener* pListener) = 0; - - /** - * Enable or disable readable/writeable callbacks - */ - virtual void setupIrq(bool en, IrqType irq = RxIrq) = 0; - -}; - -#endif /* IUSBHOSTSERIAL_H_ */ diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerialListener.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerialListener.h deleted file mode 100644 index c3f11de84e..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/IUSBHostSerialListener.h +++ /dev/null @@ -1,32 +0,0 @@ -/* IUSBHostSerialListener.h */ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - - -#ifndef IUSBHOSTSERIALLISTENER_H_ -#define IUSBHOSTSERIALLISTENER_H_ - -class IUSBHostSerialListener -{ -public: - virtual void readable() = 0; //Called when new data is available - virtual void writeable() = 0; //Called when new space is available -}; - - -#endif /* IUSBHOSTSERIALLISTENER_H_ */ diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.cpp deleted file mode 100644 index bd28eb0855..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.cpp +++ /dev/null @@ -1,230 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#define __DEBUG__ 0 -#ifndef __MODULE__ -#define __MODULE__ "WANDongle.cpp" -#endif - -#include "core/dbg.h" -#include -#include "rtos.h" - -#include "WANDongle.h" -#include "WANDongleInitializer.h" - -WANDongle::WANDongle() : m_pInitializer(NULL), m_serialCount(0) -{ - host = USBHost::getHostInst(); - init(); -} - - -bool WANDongle::connected() { - return dev_connected; -} - -bool WANDongle::tryConnect() -{ - //FIXME should run on USB thread - - DBG("Trying to connect device"); - - if (dev_connected) { - return true; - } - - m_pInitializer = NULL; - - host->lock(); - - for (int i = 0; i < MAX_DEVICE_NB; i++) - { - if ((dev = host->getDevice(i)) != NULL) - { - m_pInitializer = NULL; //Will be set in setVidPid callback - - DBG("Found one device reset it"); - int ret = host->resetDevice(dev); - if(ret) - { - host->unlock(); - return false; - } - - DBG("Enumerate"); - ret = host->enumerate(dev, this); - if(ret) - { - host->unlock(); - return false; - } - - DBG("Device has VID:%04x PID:%04x", dev->getVid(), dev->getPid()); - - if(m_pInitializer) //If an initializer has been found - { - DBG("m_pInitializer=%p", m_pInitializer); - DBG("m_pInitializer->getSerialVid()=%04x", m_pInitializer->getSerialVid()); - DBG("m_pInitializer->getSerialPid()=%04x", m_pInitializer->getSerialPid()); - if ((dev->getVid() == m_pInitializer->getSerialVid()) && (dev->getPid() == m_pInitializer->getSerialPid())) - { - DBG("The dongle is in virtual serial mode"); - host->registerDriver(dev, 0, this, &WANDongle::init); - m_serialCount = m_pInitializer->getSerialPortCount(); - if( m_serialCount > WANDONGLE_MAX_SERIAL_PORTS ) - { - m_serialCount = WANDONGLE_MAX_SERIAL_PORTS; - } - for(int j = 0; j < m_serialCount; j++) - { - DBG("Connecting serial port #%d", j+1); - DBG("Ep %p", m_pInitializer->getEp(dev, j, false)); - DBG("Ep %p", m_pInitializer->getEp(dev, j, true)); - m_serial[j].connect( dev, m_pInitializer->getEp(dev, j, false), m_pInitializer->getEp(dev, j, true) ); - } - - DBG("Device connected"); - - dev_connected = true; - host->unlock(); - - - return true; - } - else if ((dev->getVid() == m_pInitializer->getMSDVid()) && (dev->getPid() == m_pInitializer->getMSDPid())) - { - DBG("Vodafone K3370 dongle detected in MSD mode"); - //Try to switch - if( m_pInitializer->switchMode(dev) ) - { - DBG("Switched OK"); - host->unlock(); - return false; //Will be connected on a next iteration - } - else - { - ERR("Could not switch mode"); - host->unlock(); - return false; - } - } - } //if() - } //if() - } //for() - host->unlock(); - return false; -} - -bool WANDongle::disconnect() -{ - dev_connected = false; - for(int i = 0; i < WANDONGLE_MAX_SERIAL_PORTS; i++) - { - m_serial[i].disconnect(); - } - return true; -} - -WAN_DONGLE_TYPE WANDongle::getDongleType() -{ - if( m_pInitializer != NULL ) - { - return m_pInitializer->getType(); - } - else - { - return WAN_DONGLE_TYPE_UNKNOWN; - } -} - -IUSBHostSerial& WANDongle::getSerial(int index) -{ - return m_serial[index]; -} - -int WANDongle::getSerialCount() -{ - return m_serialCount; -} - -//Private methods -void WANDongle::init() -{ - m_pInitializer = NULL; - dev_connected = false; - for(int i = 0; i < WANDONGLE_MAX_SERIAL_PORTS; i++) - { - m_serial[i].init(host); - } -} - - -/*virtual*/ void WANDongle::setVidPid(uint16_t vid, uint16_t pid) -{ - //Load right initializer - WANDongleInitializer** initializer = WANDongleInitializer::getInitializers(host); - - while(*initializer) - { - DBG("*initializer=%p", *initializer); - DBG("(*initializer)->getSerialVid()=%04x", (*initializer)->getSerialVid()); - DBG("(*initializer)->getSerialPid()=%04x", (*initializer)->getSerialPid()); - if ((dev->getVid() == (*initializer)->getSerialVid()) && (dev->getPid() == (*initializer)->getSerialPid())) - { - DBG("The dongle is in virtual serial mode"); - m_pInitializer = *initializer; - break; - } - else if ((dev->getVid() == (*initializer)->getMSDVid()) && (dev->getPid() == (*initializer)->getMSDPid())) - { - DBG("Vodafone K3370 dongle detected in MSD mode"); - m_pInitializer = *initializer; - break; - } - initializer++; - } //while() - if(m_pInitializer) - { - m_pInitializer->setVidPid(vid, pid); - } -} - -/*virtual*/ bool WANDongle::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if(m_pInitializer) - { - return m_pInitializer->parseInterface(intf_nb, intf_class, intf_subclass, intf_protocol); - } - else - { - return false; - } -} - -/*virtual*/ bool WANDongle::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if(m_pInitializer) - { - return m_pInitializer->useEndpoint(intf_nb, type, dir); - } - else - { - return false; - } -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.cpp deleted file mode 100644 index ba647dc30e..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.cpp +++ /dev/null @@ -1,265 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#define __DEBUG__ 0 -#ifndef __MODULE__ -#define __MODULE__ "WANDongleInitializer.cpp" -#endif - -#include "core/dbg.h" - -#include -using std::uint16_t; - -#include "WANDongleInitializer.h" - -WANDongleInitializer::WANDongleInitializer(USBHost* pHost) : m_pHost(pHost) -{ - -} - -WANDongleInitializer** WANDongleInitializer::getInitializers(USBHost* pHost) -{ - static VodafoneK3770Initializer vodafoneK3770(pHost); - static VodafoneK3772ZInitializer vodafoneK3772Z(pHost); - const static WANDongleInitializer* list[] = { &vodafoneK3770, &vodafoneK3772Z, NULL }; - return (WANDongleInitializer**)list; -} - -//Huawei K3770 (Vodafone) -// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 00 11 06 20 00 00 01 00 00 00 00 00 00 00 00 00 00" -static uint8_t vodafone_k3770_switch_packet[] = { - 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0, 0x11, 0x06, 0x20, 0, 0, 0x01, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -VodafoneK3770Initializer::VodafoneK3770Initializer(USBHost* pHost) : WANDongleInitializer(pHost) -{ - -} - -uint16_t VodafoneK3770Initializer::getMSDVid() { return 0x12D1; } -uint16_t VodafoneK3770Initializer::getMSDPid() { return 0x14D1; } - -uint16_t VodafoneK3770Initializer::getSerialVid() { return 0x12D1; } -uint16_t VodafoneK3770Initializer::getSerialPid() { return 0x14C9; } - -bool VodafoneK3770Initializer::switchMode(USBDeviceConnected* pDev) -{ - for (int i = 0; i < pDev->getNbInterface(); i++) - { - if (pDev->getInterface(i)->intf_class == MSD_CLASS) - { - USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); - if ( pEp != NULL ) - { - DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); - m_pHost->bulkWrite(pDev, pEp, vodafone_k3770_switch_packet, 31); - return true; - } - } - } - return false; -} - -USBEndpoint* VodafoneK3770Initializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) -{ - return pDev->getEndpoint(serialPortNumber, BULK_ENDPOINT, tx?OUT:IN, 0); -} - -int VodafoneK3770Initializer::getSerialPortCount() -{ - return 2; -} - -/*virtual*/ void VodafoneK3770Initializer::setVidPid(uint16_t vid, uint16_t pid) -{ - if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) - { - m_hasSwitched = true; - m_currentSerialIntf = 0; - m_endpointsToFetch = 4; - } - else - { - m_hasSwitched = false; - m_endpointsToFetch = 1; - } -} - -/*virtual*/ bool VodafoneK3770Initializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if( m_hasSwitched ) - { - if( intf_class == 0xFF ) - { - if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 4) ) - { - m_currentSerialIntf++; - return true; - } - m_currentSerialIntf++; - } - } - else - { - if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) - { - return true; - } - } - return false; -} - -/*virtual*/ bool VodafoneK3770Initializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if( m_hasSwitched ) - { - if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - else - { - if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - return false; -} - -/*virtual*/ WAN_DONGLE_TYPE VodafoneK3770Initializer::getType() -{ - return WAN_DONGLE_TYPE_VODAFONEK3770; -} - -// NVIDIA (ICERA) /ZTE K3772-Z (Vodafone) -// Switching from mass storage device string is: "55 53 42 43 12 34 56 78 00 00 00 00 00 00 06 1b 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00" -static uint8_t vodafone_k3772_z_switch_packet[] = { - 0x55, 0x53, 0x42, 0x43, 0x12, 0x34, 0x56, 0x78, 0, 0, 0, 0, 0, 0, 0x06, 0x1b, 0, 0, 0, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 -}; - -VodafoneK3772ZInitializer::VodafoneK3772ZInitializer(USBHost* pHost) : WANDongleInitializer(pHost) -{ - -} - -uint16_t VodafoneK3772ZInitializer::getMSDVid() { return 0x19D2; } -uint16_t VodafoneK3772ZInitializer::getMSDPid() { return 0x1179; } - -uint16_t VodafoneK3772ZInitializer::getSerialVid() { return 0x19D2; } -uint16_t VodafoneK3772ZInitializer::getSerialPid() { return 0x1181; } - -bool VodafoneK3772ZInitializer::switchMode(USBDeviceConnected* pDev) -{ - for (int i = 0; i < pDev->getNbInterface(); i++) - { - if (pDev->getInterface(i)->intf_class == MSD_CLASS) - { - USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); - if ( pEp != NULL ) - { - DBG("MSD descriptor found on device %p, intf %d, will now try to switch into serial mode", (void *)pDev, i); - m_pHost->bulkWrite(pDev, pEp, vodafone_k3772_z_switch_packet, 31); - return true; - } - } - } - return false; -} - -USBEndpoint* VodafoneK3772ZInitializer::getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) -{ - return pDev->getEndpoint((serialPortNumber==1)?0:1, BULK_ENDPOINT, tx?OUT:IN, 0); -} - -int VodafoneK3772ZInitializer::getSerialPortCount() -{ - return 2; -} - -/*virtual*/ void VodafoneK3772ZInitializer::setVidPid(uint16_t vid, uint16_t pid) -{ - if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) - { - m_hasSwitched = true; - m_currentSerialIntf = 0; - m_endpointsToFetch = 4; - } - else - { - m_hasSwitched = false; - m_endpointsToFetch = 1; - } -} - -/*virtual*/ bool VodafoneK3772ZInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed -{ - if( m_hasSwitched ) - { - DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); - if( intf_class == 0x0A ) - { - if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) - { - m_currentSerialIntf++; - return true; - } - m_currentSerialIntf++; - } - } - else - { - if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) - { - return true; - } - } - return false; -} - -/*virtual*/ bool VodafoneK3772ZInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used -{ - if( m_hasSwitched ) - { - DBG("USBEndpoint on Inteface #%d; Type:%d; Direction:%d", intf_nb, type, dir); - if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - else - { - if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) - { - m_endpointsToFetch--; - return true; - } - } - return false; -} - - -/*virtual*/ WAN_DONGLE_TYPE VodafoneK3772ZInitializer::getType() -{ - return WAN_DONGLE_TYPE_VODAFONEK3772Z; -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.h deleted file mode 100644 index 4120bc8baf..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleInitializer.h +++ /dev/null @@ -1,130 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef WANDONGLEINITIALIZER_H -#define WANDONGLEINITIALIZER_H - -#include -using std::uint16_t; -using std::uint32_t; - -#include "USBHost.h" -#include "IUSBEnumerator.h" - -enum WAN_DONGLE_TYPE -{ - WAN_DONGLE_TYPE_UNKNOWN = -1, - WAN_DONGLE_TYPE_VODAFONEK3770 = 0, - WAN_DONGLE_TYPE_VODAFONEK3772Z = 1, -}; - -class WANDongleInitializer : public IUSBEnumerator -{ -protected: - WANDongleInitializer(USBHost* pHost); - USBHost* m_pHost; - -public: - virtual uint16_t getMSDVid() = 0; - virtual uint16_t getMSDPid() = 0; - - virtual uint16_t getSerialVid() = 0; - virtual uint16_t getSerialPid() = 0; - - virtual bool switchMode(USBDeviceConnected* pDev) = 0; - - virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx) = 0; - - virtual int getSerialPortCount() = 0; - - virtual void setVidPid(uint16_t vid, uint16_t pid) = 0; - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) = 0; //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) = 0; //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType() = 0; - - static WANDongleInitializer** getInitializers(USBHost* pHost); -}; - -class VodafoneK3770Initializer : public WANDongleInitializer -{ -public: - VodafoneK3770Initializer(USBHost* pHost); - - virtual uint16_t getMSDVid(); - virtual uint16_t getMSDPid(); - - virtual uint16_t getSerialVid(); - virtual uint16_t getSerialPid(); - - virtual bool switchMode(USBDeviceConnected* pDev); - - virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); - - virtual int getSerialPortCount(); - - virtual void setVidPid(uint16_t vid, uint16_t pid); - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType(); - -private: - - bool m_hasSwitched; - int m_currentSerialIntf; - int m_endpointsToFetch; -}; - -class VodafoneK3772ZInitializer : public WANDongleInitializer -{ -public: - VodafoneK3772ZInitializer(USBHost* pHost); - - virtual uint16_t getMSDVid(); - virtual uint16_t getMSDPid(); - - virtual uint16_t getSerialVid(); - virtual uint16_t getSerialPid(); - - virtual bool switchMode(USBDeviceConnected* pDev); - - virtual USBEndpoint* getEp(USBDeviceConnected* pDev, int serialPortNumber, bool tx); - - virtual int getSerialPortCount(); - - virtual void setVidPid(uint16_t vid, uint16_t pid); - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used - - virtual WAN_DONGLE_TYPE getType(); - -private: - - bool m_hasSwitched; - int m_currentSerialIntf; - int m_endpointsToFetch; -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.cpp deleted file mode 100644 index b2ec1cc63c..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.cpp +++ /dev/null @@ -1,340 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#define __DEBUG__ 0 -#ifndef __MODULE__ -#define __MODULE__ "WANDongleSerialPort.cpp" -#endif - -#include "core/dbg.h" -#include -#include "rtos.h" - -#include "WANDongleSerialPort.h" - -WANDongleSerialPort::WANDongleSerialPort() : cb_tx_en(false), cb_rx_en(false), listener(NULL) -{ - reset(); -} - -void WANDongleSerialPort::init(USBHost* pHost) -{ - host = pHost; -} - -void WANDongleSerialPort::reset() -{ - tx_mtx.lock(); - rx_mtx.lock(); - - bulk_in = NULL; - bulk_out = NULL; - - buf_out_len = 0; - max_out_size = 0; - lock_tx = false; - cb_tx_pending = false; - - buf_in_len = 0; - buf_in_read_pos = 0; - lock_rx = false; - cb_rx_pending = false; - - tx_mtx.unlock(); - rx_mtx.unlock(); -} - -int WANDongleSerialPort::readPacket() -{ - DBG("Read packet on %p", this); - rx_mtx.lock(); - if(lock_rx) - { - ERR("Fail"); - rx_mtx.unlock(); - return -1; - } - - if( bulk_in == NULL ) - { - WARN("Port is disconnected"); - rx_mtx.unlock(); - return -1; - } - - lock_rx = true; //Receiving - rx_mtx.unlock(); -// DBG("readPacket"); - //lock_rx.lock(); - host->lock(); - USB_TYPE res = host->bulkRead(dev, (USBEndpoint *)bulk_in, buf_in, ((USBEndpoint *)bulk_in)->getSize(), false); //Queue transfer - if(res != USB_TYPE_PROCESSING) - { - host->unlock(); - //lock_rx.unlock(); - ERR("host->bulkRead() returned %d", res); - Thread::wait(100); - return -1; - } - host->unlock(); - return 0; -} - -int WANDongleSerialPort::writePacket() -{ - tx_mtx.lock(); - if(lock_tx) - { - ERR("Fail"); - tx_mtx.unlock(); - return -1; - } - - if( bulk_out == NULL ) - { - WARN("Port is disconnected"); - tx_mtx.unlock(); - return -1; - } - - lock_tx = true; //Transmitting - tx_mtx.unlock(); -// DBG("writePacket"); - - //lock_tx.lock(); - host->lock(); - USB_TYPE res = host->bulkWrite(dev, (USBEndpoint *)bulk_out, buf_out, buf_out_len, false); //Queue transfer - if(res != USB_TYPE_PROCESSING) - { - host->unlock(); - //lock_tx.unlock(); - ERR("host->bulkWrite() returned %d", res); - Thread::wait(100); - return -1; - } - host->unlock(); - return 0; -} - -int WANDongleSerialPort::putc(int c) -{ - tx_mtx.lock(); - if(!lock_tx) - { - if(buf_out_len < max_out_size) - { - buf_out[buf_out_len] = (uint8_t)c; - buf_out_len++; - } - } - else - { - ERR("CAN'T WRITE!"); - } - tx_mtx.unlock(); - return c; -} - -int WANDongleSerialPort::getc() -{ - rx_mtx.lock(); - int c = 0; - if(!lock_rx) - { - if(buf_in_read_pos < buf_in_len) - { - c = (int)buf_in[buf_in_read_pos]; - buf_in_read_pos++; - } - } - else - { - ERR("CAN'T READ!"); - } - rx_mtx.unlock(); - return c; -} - -int WANDongleSerialPort::readable() -{ - rx_mtx.lock(); - if (lock_rx) - { - rx_mtx.unlock(); - return 0; - } - - /* if( !lock_rx.trylock() ) - { - return 0; - }*/ - int res = buf_in_len - buf_in_read_pos; - //lock_rx.unlock(); - rx_mtx.unlock(); - return res; -} - -int WANDongleSerialPort::writeable() -{ - tx_mtx.lock(); - if (lock_tx) - { - tx_mtx.unlock(); - return 0; - } - - /*if( !lock_tx.trylock() ) - { - return 0; - }*/ - int res = max_out_size - buf_out_len; - tx_mtx.unlock(); - //lock_tx.unlock(); - return res; -} - -void WANDongleSerialPort::attach(IUSBHostSerialListener* pListener) -{ - if(pListener == NULL) - { - setupIrq(false, RxIrq); - setupIrq(false, TxIrq); - } - listener = pListener; - if(pListener != NULL) - { - setupIrq(true, RxIrq); - setupIrq(true, TxIrq); - } -} - -void WANDongleSerialPort::setupIrq(bool en, IrqType irq /*= RxIrq*/) -{ - switch(irq) - { - case RxIrq: - rx_mtx.lock(); - cb_rx_en = en; - if(en && cb_rx_pending) - { - cb_rx_pending = false; - rx_mtx.unlock(); - listener->readable(); //Process the interrupt that was raised - } - else - { - rx_mtx.unlock(); - } - break; - case TxIrq: - tx_mtx.lock(); - cb_tx_en = en; - if(en && cb_tx_pending) - { - cb_tx_pending = false; - tx_mtx.unlock(); - listener->writeable(); //Process the interrupt that was raised - } - else - { - tx_mtx.unlock(); - } - break; - } -} - - -void WANDongleSerialPort::connect( USBDeviceConnected* pDev, USBEndpoint* pInEp, USBEndpoint* pOutEp ) -{ - dev = pDev; - bulk_in = pInEp; - bulk_out = pOutEp; - max_out_size = bulk_out->getSize(); - if( max_out_size > WANDONGLE_MAX_OUTEP_SIZE ) - { - max_out_size = WANDONGLE_MAX_OUTEP_SIZE; - } - bulk_in->attach(this, &WANDongleSerialPort::rxHandler); - bulk_out->attach(this, &WANDongleSerialPort::txHandler); - readPacket(); //Start receiving data -} - -void WANDongleSerialPort::disconnect( ) -{ - reset(); -} - -//Private methods - - -void WANDongleSerialPort::rxHandler() -{ - if (((USBEndpoint *) bulk_in)->getState() == USB_TYPE_IDLE) //Success - { - buf_in_read_pos = 0; - buf_in_len = ((USBEndpoint *) bulk_in)->getLengthTransferred(); //Update length - //lock_rx.unlock(); - rx_mtx.lock(); - lock_rx = false; //Transmission complete - if(cb_rx_en) - { - rx_mtx.unlock(); - listener->readable(); //Call handler from the IRQ context - //readPacket() should be called by the handler subsequently once the buffer has been emptied - } - else - { - cb_rx_pending = true; //Queue the callback - rx_mtx.unlock(); - } - - } - else //Error, try reading again - { - //lock_rx.unlock(); - DBG("Trying again"); - readPacket(); - } -} - -void WANDongleSerialPort::txHandler() -{ - if (((USBEndpoint *) bulk_out)->getState() == USB_TYPE_IDLE) //Success - { - tx_mtx.lock(); - buf_out_len = 0; //Reset length - lock_tx = false; //Transmission complete - //lock_tx.unlock(); - if(cb_tx_en) - { - tx_mtx.unlock(); - listener->writeable(); //Call handler from the IRQ context - //writePacket() should be called by the handler subsequently once the buffer has been filled - } - else - { - cb_tx_pending = true; //Queue the callback - tx_mtx.unlock(); - } - } - else //Error, try reading again - { - //lock_tx.unlock(); - writePacket(); - } -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.h deleted file mode 100644 index 7dee8cc003..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongleSerialPort.h +++ /dev/null @@ -1,126 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef WANDONGLESERIALPORT_H -#define WANDONGLESERIALPORT_H - -#include "USBHost.h" -#include "IUSBHostSerial.h" - -#include "rtos.h" - - -#define WANDONGLE_MAX_OUTEP_SIZE 64 -#define WANDONGLE_MAX_INEP_SIZE 64 - -/** A class to use a WAN (3G/LTE) access dongle - * - */ -class WANDongleSerialPort : public IUSBHostSerial { -public: - /* - * Constructor - * - */ - WANDongleSerialPort(); - - void init( USBHost* pHost ); - - void connect( USBDeviceConnected* pDev, USBEndpoint* pInEp, USBEndpoint* pOutEp ); - - void disconnect( ); - - /* - * Get a char from the dongle's serial interface - */ - virtual int getc(); - - /* - * Put a char to the dongle's serial interface - */ - virtual int putc(int c); - - /* - * Read a packet from the dongle's serial interface, to be called after multiple getc() calls - */ - virtual int readPacket(); - - /* - * Write a packet to the dongle's serial interface, to be called after multiple putc() calls - */ - virtual int writePacket(); - - /** - * Check the number of bytes available. - * - * @returns the number of bytes available - */ - virtual int readable(); - - /** - * Check the free space in output. - * - * @returns the number of bytes available - */ - virtual int writeable(); - - /** - * Attach a handler to call when a packet is received / when a packet has been transmitted. - * - * @param pListener instance of the listener deriving from the IUSBHostSerialListener - */ - virtual void attach(IUSBHostSerialListener* pListener); - - /** - * Enable or disable readable/writeable callbacks - */ - virtual void setupIrq(bool en, IrqType irq = RxIrq); - - -protected: - USBEndpoint * bulk_in; - USBEndpoint * bulk_out; - USBHost * host; - USBDeviceConnected * dev; - - uint8_t buf_out[WANDONGLE_MAX_OUTEP_SIZE]; - volatile uint32_t buf_out_len; - uint32_t max_out_size; - volatile bool lock_tx; - volatile bool cb_tx_en; - volatile bool cb_tx_pending; - Mutex tx_mtx; - - uint8_t buf_in[WANDONGLE_MAX_INEP_SIZE]; - volatile uint32_t buf_in_len; - volatile uint32_t buf_in_read_pos; - volatile bool lock_rx; - volatile bool cb_rx_en; - volatile bool cb_rx_pending; - Mutex rx_mtx; - - IUSBHostSerialListener* listener; - - void reset(); - - void rxHandler(); - void txHandler(); - -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.cpp deleted file mode 100644 index d7551c264d..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.cpp +++ /dev/null @@ -1,122 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#include "USBDeviceConnected.h" - -USBDeviceConnected::USBDeviceConnected() { - init(); -} - -void USBDeviceConnected::init() { - hub = 0; - port = 0; - vid = 0; - pid = 0; - nb_interf = 0; - enumerated = false; - activeAddr = false; - sizeControlEndpoint = 8; - device_class = 0; - device_subclass = 0; - proto = 0; - speed = false; - for (int i = 0; i < MAX_INTF; i++) { - memset((void *)&intf[i], 0, sizeof(INTERFACE)); - intf[i].in_use = false; - for (int j = 0; j < MAX_ENDPOINT_PER_INTERFACE; j++) { - intf[i].ep[j] = NULL; - } - } -} - -INTERFACE * USBDeviceConnected::getInterface(uint8_t index) { - if (index >= MAX_INTF) { - return NULL; - } - return &intf[index]; -} - -bool USBDeviceConnected::addInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) { - if ((intf_nb >= MAX_INTF) || (intf[intf_nb].in_use)) { - return false; - } - intf[intf_nb].in_use = true; - intf[intf_nb].intf_class = intf_class; - intf[intf_nb].intf_subclass = intf_subclass; - intf[intf_nb].intf_protocol = intf_protocol; - intf[intf_nb].nb_endpoint = 0; - nb_interf++; - return true; -} - -bool USBDeviceConnected::addEndpoint(uint8_t intf_nb, USBEndpoint * ept) { - if ((intf_nb >= MAX_INTF) || (intf[intf_nb].in_use == false) || (intf[intf_nb].nb_endpoint >= MAX_ENDPOINT_PER_INTERFACE)) { - return false; - } - intf[intf_nb].nb_endpoint++; - - for (int i = 0; i < MAX_ENDPOINT_PER_INTERFACE; i++) { - if (intf[intf_nb].ep[i] == NULL) { - intf[intf_nb].ep[i] = ept; - return true; - } - } - return false; -} - -void USBDeviceConnected::init(uint8_t hub, uint8_t port, bool lowSpeed) { - init(); - this->hub = hub; - this->port = port; - this->speed = lowSpeed; -} - -void USBDeviceConnected::disconnect() { - for(int i = 0; i < nb_interf; i++) { - intf[i].detach.call(); - } - init(); -} - - - -USBEndpoint * USBDeviceConnected::getEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint8_t index) { - if (intf_nb >= MAX_INTF) { - return NULL; - } - for (int i = 0; i < MAX_ENDPOINT_PER_INTERFACE; i++) { - if ((intf[intf_nb].ep[i]->getType() == type) && (intf[intf_nb].ep[i]->getDir() == dir)) { - if(index) - { - index--; - } - else - { - return intf[intf_nb].ep[i]; - } - } - } - return NULL; -} - -USBEndpoint * USBDeviceConnected::getEndpoint(uint8_t intf_nb, uint8_t index) { - if ((intf_nb >= MAX_INTF) || (index >= MAX_ENDPOINT_PER_INTERFACE)) { - return NULL; - } - return intf[intf_nb].ep[index]; -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.h deleted file mode 100644 index 86a333e1e3..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBDeviceConnected.h +++ /dev/null @@ -1,205 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef USBDEVICECONNECTED_H -#define USBDEVICECONNECTED_H - -#include "stdint.h" -#include "USBEndpoint.h" - -#define MAX_ENDPOINT_PER_INTERFACE 2 -#define MAX_INTF 2 - -typedef struct { - bool in_use; - uint8_t nb_endpoint; - uint8_t intf_class; - uint8_t intf_subclass; - uint8_t intf_protocol; - USBEndpoint * ep[MAX_ENDPOINT_PER_INTERFACE]; - FunctionPointer detach; -}INTERFACE; - - -class USBDeviceConnected { -public: - - /* - * Constructor - */ - USBDeviceConnected(); - - /* - * Attach an USBEndpoint to this device - * - * @param ep pointeur on the USBEndpoint which will be attached - * @returns true if successful, false otherwise - */ - bool addEndpoint(uint8_t intf_nb, USBEndpoint * ep); - - /* - * Retrieve an USBEndpoint by its TYPE and DIRECTION - * - * @param intf_nb the interface on which to lookup the USBEndpoint - * @param type type of the USBEndpoint looked for - * @param direction of the USBEndpoint looked for - * @param index the index of the USBEndpoint whitin the interface - * @returns pointer on the USBEndpoint if found, NULL otherwise - */ - USBEndpoint * getEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint8_t index = 0); - - /* - * Retrieve an USBEndpoint by its index - * - * @param index index of the USBEndpoint - * @returns pointer on the USBEndpoint if found, NULL otherwise - */ - USBEndpoint * getEndpoint(uint8_t intf_nb, uint8_t index); - - bool addInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); - - uint8_t getNbInterface() {return nb_interf;}; - - INTERFACE * getInterface(uint8_t index); - - /** - * Attach a member function to call when a the device has been disconnected - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - */ - template - void onDisconnect(uint8_t intf_nb, T* tptr, void (T::*mptr)(void)) { - if ((mptr != NULL) && (tptr != NULL)) { - intf[intf_nb].detach.attach(tptr, mptr); - } - } - - /** - * Attach a callback called when the device has been disconnected - * - * @param fptr function pointer - */ - void onDisconnect(uint8_t intf_nb, void (*fn)(void)) { - if (fn != NULL) { - intf[intf_nb].detach.attach(fn); - } - } - - /* - * Disconnect the device by calling a callback function registered by a driver - */ - void disconnect(); - - /* - * Setters - */ - void init(uint8_t hub, uint8_t port, bool lowSpeed); - void setAddress(uint8_t addr) { - this->addr = addr; - }; - void setVid(uint16_t vid) { - this->vid = vid; - }; - void setPid(uint16_t pid) { - this->pid = pid; - }; - void setClass(uint8_t device_class) { - this->device_class = device_class; - }; - void setSubClass(uint8_t device_subclass) { - this->device_subclass = device_subclass; - }; - void setProtocol(uint8_t pr) { - proto = pr; - }; - void setSizeControlEndpoint(uint32_t size) { - sizeControlEndpoint = size; - }; - void activeAddress() { - activeAddr = true; - }; - void setEnumerated() { - enumerated = true; - }; - - /* - * Getters - */ - uint8_t getPort() { - return port; - }; - uint8_t getHub() { - return hub; - }; - uint8_t getAddress() { - return addr; - }; - uint16_t getVid() { - return vid; - }; - uint16_t getPid() { - return pid; - }; - uint8_t getClass() { - return device_class; - }; - uint8_t getSubClass() { - return device_subclass; - }; - uint8_t getProtocol() { - return proto; - }; - bool getSpeed() { - return speed; - }; - uint32_t getSizeControlEndpoint() { - return sizeControlEndpoint; - }; - bool isActiveAddress() { - return activeAddr; - }; - bool isEnumerated() { - return enumerated; - }; - - -private: - INTERFACE intf[MAX_INTF]; - //USBEndpoint * ep[MAX_ENDPOINT_PER_DEVICE]; - uint32_t sizeControlEndpoint; - uint8_t hub; - uint8_t port; - uint16_t vid; - uint16_t pid; - uint8_t addr; - uint8_t device_class; - uint8_t device_subclass; - uint8_t proto; - bool speed; - bool activeAddr; - bool enumerated; - - uint8_t nb_interf; - - - void init(); - -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.cpp deleted file mode 100644 index c4860d45ec..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.cpp +++ /dev/null @@ -1,233 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - - -#define __DEBUG__ 0 //Maximum verbosity -#ifndef __MODULE__ -#define __MODULE__ "USBEndpoint.cpp" -#endif - -#include "core/dbg.h" -#include - -#include "USBEndpoint.h" - - -void USBEndpoint::init(HCED * hced, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint32_t size, uint8_t ep_number, HCTD* td_list[2]) { - this->hced = hced; - this->type = type; - this->dir = /*(type == CONTROL_ENDPOINT) ? OUT :*/ dir; - setup = (type == CONTROL_ENDPOINT) ? true : false; - - //TDs have been allocated by the host - memcpy((HCTD**)this->td_list, td_list, sizeof(HCTD*)*2); //TODO: Maybe should add a param for td_list size... at least a define - memcpy(td_list[0], 0, sizeof(HCTD)); - memcpy(td_list[1], 0, sizeof(HCTD)); - - this->hced->control = 0; - //Empty queue - this->hced->tailTD = (uint32_t)td_list[0]; - this->hced->headTD = (uint32_t)td_list[0]; - this->hced->nextED = 0; - - this->hced->control = ((ep_number & 0x7F) << 7) // Endpoint address - | (type != CONTROL_ENDPOINT ? ( dir << 11) : 0 ) // direction : Out = 1, 2 = In - | ((size & 0x3ff) << 16); // MaxPkt Size - - //carry = false; - transfer_len = 0; - transferred = 0; - buf_start = 0; - nextEp = NULL; - - td_current = td_list[0]; - td_next = td_list[1]; - - state = USB_TYPE_IDLE; -} - -void USBEndpoint::setSize(uint32_t size) { - hced->control &= ~(0x3ff << 16); - hced->control |= (size << 16); -} - - -uint32_t USBEndpoint::getSize() { - return (hced->control >> 16) & 0x3ff; -} - -void USBEndpoint::setDeviceAddress(uint8_t addr) { - hced->control &= ~(0x7f); - hced->control |= (addr & 0x7F); -} - -uint8_t USBEndpoint::getDeviceAddress() { - return hced->control & 0x7f; -} - -void USBEndpoint::setSpeed(uint8_t speed) { - if(speed) { - DBG("SET LOW SPEED"); - } - hced->control &= ~(1 << 13); - hced->control |= (speed << 13); -} - - -void USBEndpoint::setNextToken(uint32_t token) { //Only for control Eps - switch (token) { - case TD_SETUP: - dir = OUT; - setup = true; - break; - case TD_IN: - dir = IN; - setup = false; - break; - case TD_OUT: - dir = OUT; - setup = false; - break; - } -} - -volatile HCTD* USBEndpoint::getNextTD() -{ - return td_current/*(HCTD*) hced->tailTD*/; //It's the tailing one -} - -void USBEndpoint::queueTransfer() { - //Try with OHCI impl - //Caller of getNextTD() has now populated the td - //So insert it into queue - - //Find an OTHER free td - //TODO: if we had more than 2 tds, this would have to be changed - /*HCTD* toSendTD = (HCTD*) hced->tailTD;*/ - //HCTD* freeTD; -/* - if( hced->tailTD == td_list[0] ) - { - freeTD = td_list[1]; - } - else *//*if( hced->tailTD == (uint32_t) td_list[1] )*/ - /*{ - freeTD = td_list[0]; - } - */ - - /* - freeTD->control = 0; - freeTD->currBufPtr = 0; - freeTD->bufEnd = 0; - freeTD->nextTD = 0; - - td_current = toSendTD; -*/ - transfer_len = td_current->bufEnd - td_current->currBufPtr + 1; - transferred = transfer_len; - buf_start = td_current->currBufPtr; - - //No add this free TD at this end of the queue - state = USB_TYPE_PROCESSING; - td_current->nextTD = (volatile uint32_t)td_next; - hced->tailTD = (volatile uint32_t)td_next; - - #if 0 - // if TD list empty -> we put the head of the list - if (!hced->headTD) { - state = USB_TYPE_IDLE; - hced->headTD = (uint32_t)(td); - hced->tailTD = (uint32_t)(td); - tailTD = (HCTD *) (hced->headTD); - //DBG("queue null transfer: endpoint: %p, %08X\r\n", this, (uint32_t)(td)); - } else { - state = USB_TYPE_PROCESSING; - td->nextTD = (uint32_t)headTD & ~(0x0f); - hced->headTD = (uint32_t)(td) | ((carry) ? 0x2 : 0); - } - headTD = (HCTD *) ((hced->headTD) & ~(0x3)); - transfer_len = td->bufEnd - td->currBufPtr + 1; - transferred = transfer_len; - buf_start = td->currBufPtr; -#endif - //printf("queue real transfer: endpoint: %p \t headTD: %p \t head: %08X \t tail: %08X \t td: %08X \t nexttd: %08X\r\n", this, hced->headTD, hced->headTD, ((HCTD *)((hced->headTD) & ~(0x0f)))->nextTD, toSendTD, toSendTD->nextTD); -} - -volatile HCTD * USBEndpoint::getProcessedTD() -{ - return td_current; -} - -void USBEndpoint::setLengthTransferred(int len) { - transferred = len; -} - -uint32_t USBEndpoint::getBufStart() { - return buf_start; -} - -void USBEndpoint::unqueueTransfer(volatile HCTD * td) { - //printf("unqueue transfer: %p on endpoint: %p\r\n", (void *)td, this); - //headTD = tailTD; //FIXME FIXME -// hced->headTD = hced->headTD | (td-> & 0x02); - if(td != td_current) - { - ERR("MISMATCH"); - ERR("this=%p, td_current = %p, td_next=%p, td=%p", this, td_current, td_next, td); - error(""); - } - td->control=0; - td->currBufPtr=0; - td->bufEnd=0; - td->nextTD=0; - hced->headTD = hced->tailTD | (hced->headTD & 0x2); //Carry bit - td_current = td_next; - td_next = td; - DBG("current:%p, next:%p", td_current, td_next); -} - -ENDPOINT_TYPE USBEndpoint::getType() { - return type; -} - - -USBEndpoint * USBEndpoint::nextEndpoint() { - return (USBEndpoint*)nextEp; -} - - -void USBEndpoint::queueEndpoint(USBEndpoint * ed) { - nextEp = ed; - hced->nextED = (ed == NULL) ? 0 : (uint32_t)ed->getHCED(); -} - -volatile HCED * USBEndpoint::getHCED() { - return hced; -} - - -volatile HCTD * USBEndpoint::getHeadTD() { - //return headTD; - return (volatile HCTD*) (hced->headTD & ~0xF); -} - -volatile HCTD ** USBEndpoint::getTDList() -{ - return td_list; -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.h deleted file mode 100644 index 18a6028ddc..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBEndpoint.h +++ /dev/null @@ -1,189 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef USBENDPOINT_H -#define USBENDPOINT_H - -#include "stdint.h" -#include "FunctionPointer.h" -#include "USBHostTypes.h" - - -enum ENDPOINT_TYPE { - CONTROL_ENDPOINT = 0, - ISOCHRONOUS_ENDPOINT, - BULK_ENDPOINT, - INTERRUPT_ENDPOINT -}; - -enum ENDPOINT_DIRECTION { - OUT = 1, - IN -}; - -class USBEndpoint { -public: - /* - * Constructor - */ - USBEndpoint() {state = USB_TYPE_FREE; nextEp = NULL;}; - - /* - * Initialize an endpoint - * - * @param hced hced associated to the endpoint - * @param type endpoint type - * @param dir endpoint direction - * @param size endpoint size - * @param ep_number endpoint number - */ - void init(HCED * hced, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint32_t size, uint8_t ep_number, HCTD* td_list[2]); - - /* - * Set next token. Warining: only useful for the control endpoint - * - * @param token IN, OUT or SETUP token - */ - void setNextToken(uint32_t token); - - /* - * Queue an endpoint - * - * endpoint endpoint which will be queued in the linked list - */ - void queueEndpoint(USBEndpoint * endpoint); - - /* - * Get a td to be queued - * - * @returns td hctd which will be queued - */ - volatile HCTD* getNextTD(); - - /* - * Queue a transfer on the endpoint - * - */ - void queueTransfer(); - - /* - * Get the currently processed td - * - * @returns td hctd that was queued - */ - volatile HCTD * getProcessedTD(); - - /* - * Unqueue a transfer from the endpoint - * - * @param td hctd which will be unqueued - */ - void unqueueTransfer(volatile HCTD * td); - - /* - * Return the next endpoint in the linked list - * - * @returns next endpoint - */ - USBEndpoint * nextEndpoint(); - - /** - * Attach a member function to call when a transfer is finished - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - */ - template - void attach(T* tptr, void (T::*mptr)(void)) { - if((mptr != NULL) && (tptr != NULL)) { - rx.attach(tptr, mptr); - } - } - - /** - * Attach a callback called when a transfer is finished - * - * @param fptr function pointer - */ - void attach(void (*fn)(void)) { - if(fn != NULL) { - rx.attach(fn); - } - } - - /* - * Call the handler associted to the end of a transfer - */ - void call() { - rx.call(); - }; - - - /* - * Setters - */ - void setState(USB_TYPE st) {state = st;} - void setDeviceAddress(uint8_t addr); - void setLengthTransferred(int len); - void setSpeed(uint8_t speed); - void setSize(uint32_t size); - void setDir(ENDPOINT_DIRECTION d) {dir = d;} - - /* - * Getters - */ - USB_TYPE getState() {return state;} - ENDPOINT_TYPE getType(); - uint8_t getDeviceAddress(); - int getLengthTransferred() {return transferred;} - uint32_t getBufStart(); - uint32_t getSize(); - volatile HCTD * getHeadTD(); - volatile HCTD** getTDList(); - volatile HCED * getHCED(); - ENDPOINT_DIRECTION getDir() {return dir;} - bool isSetup() {return setup;} - - -private: - ENDPOINT_TYPE type; - volatile USB_TYPE state; - ENDPOINT_DIRECTION dir; - bool setup; - - int transfer_len; - int transferred; - uint32_t buf_start; - - FunctionPointer rx; - - USBEndpoint* nextEp; - - // USBEndpoint descriptor - volatile HCED * hced; - - volatile HCTD * td_list[2]; - volatile HCTD * td_current; - volatile HCTD * td_next; - /*bool carry;*/ - - int count; - -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.cpp deleted file mode 100644 index 4d7a202456..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.cpp +++ /dev/null @@ -1,404 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#define __DEBUG__ 0 //WARN: ENABLING DEBUGGING HERE WILL PRINTF IN IRQS!! UNEXPECTED BEHAVIOUR MAY RESULT... -#ifndef __MODULE__ -#define __MODULE__ "USBHALHost.cpp" -#endif - -#include "core/dbg.h" -#include - -#include "mbed.h" -#include "USBHALHost.h" - -// bits of the USB/OTG clock control register -#define HOST_CLK_EN (1<<0) -#define DEV_CLK_EN (1<<1) -#define PORTSEL_CLK_EN (1<<3) -#define AHB_CLK_EN (1<<4) - -// bits of the USB/OTG clock status register -#define HOST_CLK_ON (1<<0) -#define DEV_CLK_ON (1<<1) -#define PORTSEL_CLK_ON (1<<3) -#define AHB_CLK_ON (1<<4) - -// we need host clock, OTG/portsel clock and AHB clock -#define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN) - - - -#define HCCA_SIZE 0x100 -#define ED_SIZE 0x10 -#define TD_SIZE 0x10 - -#define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE)) - -static volatile uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned(256))); //256 bytes aligned! - -USBHALHost * USBHALHost::instHost; - -USBHALHost::USBHALHost() : thread(USBHALHost::staticCb, (void*)this, osPriorityNormal, 4*128) { - instHost = this; - memInit(); - memset((void*)usb_hcca, 0, HCCA_SIZE); - for (int i = 0; i < MAX_ENDPOINT; i++) { - edBufAlloc[i] = false; - } - for (int i = 0; i < MAX_TD; i++) { - tdBufAlloc[i] = false; - } -} - - -void USBHALHost::init() { - thread.signal_set(USBHALHOST_SIG_INIT); -} - - -uint32_t USBHALHost::controlHeadED() { - return LPC_USB->HcControlHeadED; -} - -uint32_t USBHALHost::bulkHeadED() { - return LPC_USB->HcBulkHeadED; -} - -uint32_t USBHALHost::interruptHeadED() { - return usb_hcca->IntTable[0]; -} - -void USBHALHost::updateBulkHeadED(uint32_t addr) { - LPC_USB->HcBulkHeadED = addr; -} - - -void USBHALHost::updateControlHeadED(uint32_t addr) { - LPC_USB->HcControlHeadED = addr; -} - -void USBHALHost::updateInterruptHeadED(uint32_t addr) { - usb_hcca->IntTable[0] = addr; -} - - -void USBHALHost::enableControlList() { - LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF; - LPC_USB->HcControl |= OR_CONTROL_CLE; //Enable control list -} - -void USBHALHost::enableBulkList() { - LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF; - LPC_USB->HcControl |= OR_CONTROL_BLE; //Enable bulk list -} - -void USBHALHost::enableInterruptList() { - LPC_USB->HcControl |= OR_CONTROL_PLE; -} - -bool USBHALHost::disableControlList() { - if(LPC_USB->HcControl & OR_CONTROL_CLE) - { - LPC_USB->HcControl &= ~OR_CONTROL_CLE; //Disable control list - return true; - } - else - { - return false; - } -} - -bool USBHALHost::disableBulkList() { - if(LPC_USB->HcControl & OR_CONTROL_BLE) - { - LPC_USB->HcControl &= ~OR_CONTROL_BLE; //Disable bulk list - return true; - } - else - { - return false; - } -} - -bool USBHALHost::disableInterruptList() { - if(LPC_USB->HcControl & OR_CONTROL_PLE) - { - LPC_USB->HcControl &= ~OR_CONTROL_PLE; //Disable interrupt list - return true; - } - else - { - return false; - } -} - -//Lock processing -void USBHALHost::lock() -{ - mtx.lock(); -} - -void USBHALHost::unlock() -{ - mtx.unlock(); -} - -void USBHALHost::memInit() { - usb_hcca = (volatile HCCA *)usb_buf; - usb_edBuf = usb_buf + HCCA_SIZE; - usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE); -} - -volatile uint8_t * USBHALHost::getED() { - for (int i = 0; i < MAX_ENDPOINT; i++) { - if ( !edBufAlloc[i] ) { - edBufAlloc[i] = true; - return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE); - } - } - perror("Could not allocate ED\r\n"); - return NULL; //Could not alloc ED -} - -volatile uint8_t * USBHALHost::getTD() { - int i; - for (i = 0; i < MAX_TD; i++) { - if ( !tdBufAlloc[i] ) { - tdBufAlloc[i] = true; - return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE); - } - } - perror("Could not allocate TD\r\n"); - return NULL; //Could not alloc TD -} - - -void USBHALHost::freeED(volatile uint8_t * ed) { - int i; - i = (ed - usb_edBuf) / ED_SIZE; - edBufAlloc[i] = false; -} - -void USBHALHost::freeTD(volatile uint8_t * td) { - int i; - i = (td - usb_tdBuf) / TD_SIZE; - tdBufAlloc[i] = false; -} - - -void USBHALHost::resetPort(int hub, int port) { - DBG("Resetting hub %d, port %d\n", hub, port); - if (hub == 0) { //Root hub - // USB 2.0 spec says at least 50ms delay before port reset - Thread::wait(200); - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS; // Initiate port reset - while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS); - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; // ...and clear port reset signal - // Wait for 100 MS after port reset - Thread::wait(200); - } else { - //TODO: Hubs - } -} - - -void USBHALHost::_usbisr(void) { - if (instHost) { - instHost->UsbIrqhandler(); - } -} - -void USBHALHost::UsbIrqhandler() { - if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process? - { - NVIC_DisableIRQ(USB_IRQn); - NVIC_ClearPendingIRQ(USB_IRQn); - thread.signal_set(USBHALHOST_SIG_IRQ); //Signal processing thread - } - -} - -void USBHALHost::process() -{ - DBG("USB Process started"); - - lock(); - Thread::signal_wait(USBHALHOST_SIG_INIT); - - NVIC_DisableIRQ(USB_IRQn); // Disable the USB interrupt source - - LPC_SC->PCONP &= ~(1UL<<31); //Cut power - Thread::wait(200); - - // turn on power for USB - LPC_SC->PCONP |= (1UL<<31); - - // Enable USB host clock, port selection and AHB clock - LPC_USB->USBClkCtrl |= CLOCK_MASK; - - // Wait for clocks to become available - while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK); - - // it seems the bits[0:1] mean the following - // 0: U1=device, U2=host - // 1: U1=host, U2=host - // 2: reserved - // 3: U1=host, U2=device - // NB: this register is only available if OTG clock (aka "port select") is enabled!! - // since we don't care about port 2, set just bit 0 to 1 (U1=host) - LPC_USB->OTGStCtrl |= 1; - - // now that we've configured the ports, we can turn off the portsel clock - LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN; - - // configure USB D+/D- pins - // P0[29] = USB_D+, 01 - // P0[30] = USB_D-, 01 - LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28)); - LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); // 0x14000000 - - LPC_USB->HcControl = 0; // HARDWARE RESET - LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero - LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero - - //wait_ms(100); // Wait 50 ms before apply reset - Thread::wait(100); - - // SOFTWARE RESET - LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR; - LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL; // Write Fm Interval and Largest Data Packet Counter - LPC_USB->HcPeriodicStart = FI * 90 / 100; - - // Put HC in operational state - LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER; - LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC; // Set Global Power - - LPC_USB->HcHCCA = (uint32_t)(usb_hcca); - LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus; // Clear Interrrupt Status - - LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC; - - //DG: Do not set prio - //NVIC_SetPriority(USB_IRQn, 0); // highest priority - // Enable the USB Interrupt - NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr)); - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; - - NVIC_EnableIRQ(USB_IRQn); - - - // Check for any connected devices - if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) { //Root device connected - //Device connected - Thread::wait(500); - DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1); - deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA); //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed - } - - unlock(); - - - for(;;) - { - Thread::signal_wait(USBHALHOST_SIG_IRQ); //Wait for IRQ to process - - lock(); - DBG("Locked"); - - WARN("isr %08x [EN %08x]", LPC_USB->HcInterruptStatus, LPC_USB->HcInterruptEnable); - - //Now process IRQ - uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable; - - if (int_status & OR_INTR_STATUS_RHSC) - { // Root hub status change interrupt - WARN("Port status %08x", LPC_USB->HcRhPortStatus1); - if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) - { - if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) - { - - // When DRWE is on, Connect Status Change - // means a remote wakeup event. - - } - else - { - - // When DRWE is off, Connect Status Change - // is NOT a remote wakeup event - - if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) - { //Root device connected - //Device connected - WARN("Device connected!!"); - // Thread::wait(500); - deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA); //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed - } - else - { //Root device disconnected - //Device disconnected - WARN("Device disconnected!!"); - Thread::wait(500); - if (!(int_status & OR_INTR_STATUS_WDH)) - { - usb_hcca->DoneHead = 0; - } - deviceDisconnected(0, 1, usb_hcca->DoneHead & 0xFFFFFFFE); - if (int_status & OR_INTR_STATUS_WDH) - { - usb_hcca->DoneHead = 0; - LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH; - } - - } - //TODO: HUBS - } - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC; - } - if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) - { - LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC; - //int_status &= ~OR_RH_PORT_PRSC; - } - LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC; - } - - if (int_status & OR_INTR_STATUS_WDH) - { // Writeback Done Head interrupt - transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE); - LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH; - } - - //IRQ Processed - - DBG("Unlocked"); - - NVIC_EnableIRQ(USB_IRQn); - - unlock(); - - } -} - -/*static*/ void USBHALHost::staticCb(void const* p) -{ - ((USBHALHost*)p)->process(); -} diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.h deleted file mode 100644 index c72a63a999..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHALHost.h +++ /dev/null @@ -1,206 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef USBHALHOST_H -#define USBHALHOST_H - -#include "rtos.h" - -#include "USBHostTypes.h" - -#define MAX_ENDPOINT 5 -#define MAX_TD (MAX_ENDPOINT*2) - -#define USBHALHOST_SIG_INIT 0x01 -#define USBHALHOST_SIG_IRQ 0x02 - -class USBHALHost { -public: - - /* - * Constructor - * init variables and memory where will be stored HCCA, ED and TD - */ - USBHALHost(); - - /* - * Initialize host controller. Enable USB interrupts. This part is not in the constructor because, - * this function calls a virtual method if a device is already connected - */ - void init(); - - /* - * reset a port of a specific hub - * TODO: support hub - */ - void resetPort(int hub, int port); - - /* - * return the value contained in the control HEAD ED register - * - * @returns address of the control Head ED - */ - uint32_t controlHeadED(); - - /* - * return the value contained in the bulk HEAD ED register - * - * @returns address of the bulk head ED - */ - uint32_t bulkHeadED(); - - /* - * return the value of the head interrupt ED contained in the HCCA - * - * @returns address of the head interrupt ED contained in the HCCA - */ - uint32_t interruptHeadED(); - - - /* - * Update the head ED for control transfers - */ - void updateControlHeadED(uint32_t addr); - - /* - * Update the head ED for bulk transfers - */ - void updateBulkHeadED(uint32_t addr); - - /* - * Update the head ED for interrupt transfers - */ - void updateInterruptHeadED(uint32_t addr); - - /* - * Enable control list ED - */ - void enableControlList(); - - /* - * Enable bulk list ED - */ - void enableBulkList(); - - /* - * Enable Interrupt list ED - */ - void enableInterruptList(); - - /* - * Disable control list ED - */ - bool disableControlList(); - - /* - * Disable bulk list ED - */ - bool disableBulkList(); - - /* - * Disable Interrupt list ED - */ - bool disableInterruptList(); - - //Lock processing - void lock(); - - void unlock(); - - -protected: - /* - * Virtual method called when a device has been connected - * - * @param hub hub number of the device - * @param port port number of the device - * @param lowSpeed 1 if low speed, 0 otherwise - */ - virtual void deviceConnected(int hub, int port, bool lowSpeed) {}; - - /* - * Virtuel method called when a device has been disconnected - * - * @param hub hub number of the device - * @param port port number of the device - * @param addr list of the TDs which have been completed to dequeue freed TDs - */ - virtual void deviceDisconnected(int hub, int port, volatile uint32_t addr) {}; - - /* - * Virtual method called when a transfer has been completed - * - * @param addr list of the TDs which have been completed - */ - virtual void transferCompleted(volatile uint32_t addr){}; - - /* - * Find a memory section for a new ED - * - * @returns the address of this section - */ - volatile uint8_t * getED(); - - /* - * Find a memory section for a new TD - * - * @returns the address of this section - */ - volatile uint8_t * getTD(); - - /* - * Release a previous memory section reserved for an ED - * - * @param ed address of the ED - */ - void freeED(volatile uint8_t * ed); - - /* - * Release a previous memory section reserved for an TD - * - * @param ed address of the TD - */ - void freeTD(volatile uint8_t * td); - - -private: - static void _usbisr(void); - void UsbIrqhandler(); - - void memInit(); - - void process(); - - static void staticCb(void const* p); - - HCCA volatile * usb_hcca; //256 bytes aligned! - uint8_t volatile * usb_edBuf; //4 bytes aligned! - uint8_t volatile * usb_tdBuf; //4 bytes aligned! - - static USBHALHost * instHost; - - bool volatile edBufAlloc[MAX_ENDPOINT]; - bool volatile tdBufAlloc[MAX_TD]; - - //RTOS impl - Thread thread; - Mutex mtx; - -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.cpp b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.cpp deleted file mode 100644 index f5bcbaecfe..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.cpp +++ /dev/null @@ -1,960 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#define __DEBUG__ 0 //WARN: ENABLING DEBUGGING HERE WILL PRINTF IN IRQS!! UNEXPECTED BEHAVIOUR MAY RESULT... -#ifndef __MODULE__ -#define __MODULE__ "USBHost.cpp" -#endif - -#include "core/dbg.h" -#include - -#include "USBHost.h" -#include "rtos.h" - - -#define NB_MAX_INTF 2 - -USBHost * USBHost::instHost = NULL; - -USBHost::USBHost() -#if 0 //try not to use this - : m_usbQueue(), m_usbThread(3, this, &USBHost::usbProcess) -#endif -{ - headControlEndpoint = NULL; - headBulkEndpoint = NULL; - headInterruptEndpoint = NULL; - tailControlEndpoint = NULL; - tailBulkEndpoint = NULL; - tailInterruptEndpoint = NULL; - - nb_devices = 0; - lenReportDescr = 0; - - controlEndpointAllocated = false; - - for (int i = 0; i < MAX_DEVICE_NB; i++) { - deviceInUse[i] = false; - devices[i].setAddress(i + 1); - deviceReset[i] = false; - } -} - - -void USBHost::transferCompleted(volatile uint32_t addr) { -#if 0 //try not to use this - Interrupt::enter(); - m_usbQueue.post(addr); - Interrupt::leave(); -#else - - if(addr == NULL) //Nothing to process? - { - return; - } - - volatile HCTD* tdList = NULL; - - //First we must reverse the list order and dequeue each TD - do - { - volatile HCTD* td = (volatile HCTD*)addr; - - if(td->control & 0xF0000000 != 0) - { - WARN("Condition code %02x", td->control >> 28); - } - - addr = td->nextTD; //Dequeue from physical list - td->nextTD = (uint32_t)tdList; //Enqueue into reversed list - tdList = td; - } while(addr); - - //Now we can process the list - USBEndpoint * volatile iter = NULL; - - while(tdList != NULL) - { - bool found = false; - volatile HCTD* td = tdList; - tdList = (volatile HCTD*)td->nextTD; //Dequeue element now as it could be modified below - for (int i = 0; i < 3; i++) { - if (found) { - break; - } - iter = (i == 0) ? headControlEndpoint : ( (i == 1) ? headBulkEndpoint : headInterruptEndpoint); - while (iter != NULL) { - if (iter->getProcessedTD() == td) { - DBG("td=%p FOUND ed: %08X", td, (void *)iter->getHCED()); - if (((HCTD *)td)->control >> 28) { - DBG("TD Error: %d", td->control >> 28); - iter->setState(USB_TYPE_TDFAIL); - } else if ((uint32_t)iter->getHCED() & 0x1) { - DBG("HALTED"); - iter->setState(USB_TYPE_HALTED); - } else if (!td->currBufPtr) { - DBG("!%p", iter); - iter->setState(USB_TYPE_IDLE); - found=true; - } else { - DBG("!%p", iter); - iter->setState(USB_TYPE_IDLE); - iter->setLengthTransferred(td->currBufPtr - iter->getBufStart()); - found=true; - } - break; - } - iter = iter->nextEndpoint(); - } - } - - - if (found) { - iter->unqueueTransfer(td); - - if (iter->getType() != CONTROL_ENDPOINT) { - iter->call(); - } - } - else - { - WARN("TD not found!!!"); - freeTD((uint8_t *)td); //Device must have been disconnected meanwhile - } - - } -#endif -} - -USBHost * USBHost::getHostInst() { - if (instHost == NULL) { - instHost = new USBHost(); - instHost->init(); - } - return instHost; -} - - -/* - * Call in ISR when a device has been connected - */ -void USBHost::deviceConnected(int hub, int port, bool lowSpeed) { - - for (int i = 0; i < MAX_DEVICE_NB; i++) { - if (!deviceInUse[i]) { - deviceInUse[i] = true; - WARN("will call init on device %p: speed: %d", (void *)&devices[i], lowSpeed); - devices[i].init(hub, port, lowSpeed); - deviceReset[i] = false; - break; - } - } - - if (!controlEndpointAllocated) { - control = newEndpoint(CONTROL_ENDPOINT, OUT, 0x08, 0x00); - addEndpoint(NULL, 0, (USBEndpoint*)control); - controlEndpointAllocated = true; - } -} - -/* - * Call in ISR when a device has been disconnected - */ -void USBHost::deviceDisconnected(int hub, int port, volatile uint32_t addr) { - - bool controlListState = disableControlList(); - bool bulkListState = disableBulkList(); - bool interruptListState = disableInterruptList(); - - transferCompleted(addr); //Finish processing any pending completed TD - - for (int i = 0; i < MAX_DEVICE_NB; i++) { - if ((devices[i].getHub() == hub) && (devices[i].getPort() == port)) { - WARN("device disconnected: %p", (void *)&devices[i]); - deviceInUse[i] = false; - deviceReset[i] = false; - freeDevice((USBDeviceConnected*)&devices[i]); - break; - } - } - nb_devices--; - - if (controlListState) enableControlList(); - if (bulkListState) enableBulkList(); - if (interruptListState) enableInterruptList(); -} - -void USBHost::freeDevice(USBDeviceConnected * dev) { - USBEndpoint * ep = NULL; -// HCTD * td = NULL; - HCED * ed = NULL; - - for (int j = 0; j < dev->getNbInterface(); j++) { - DBG("FREE INTF %d, %p, nb_endpot: %d", j, (void *)dev->getInterface(j), dev->getInterface(j)->nb_endpoint); - for (int i = 0; i < dev->getInterface(j)->nb_endpoint; i++) { - if ((ep = dev->getEndpoint(j, i)) != NULL) { - DBG("Freeing USBEndpoint"); - ed = (HCED *)ep->getHCED(); - ed->control |= (1 << 13); //sKip bit - DBG("Dequeueing USBEndpoint"); - unqueueEndpoint(ep); - - DBG("Freeing first transfer descriptor"); - freeTD((volatile uint8_t*)ep->getTDList()[0]); - DBG("Freeing second transfer descriptor"); - freeTD((volatile uint8_t*)ep->getTDList()[1]); - - DBG("Freeing USBEndpoint descriptor"); - freeED((uint8_t *)ep->getHCED()); - } - //printBulk(); - //printInt(); - } - } - DBG("Disconnecting device"); - dev->disconnect(); - DBG("Device disconnected"); -} - - -void USBHost::unqueueEndpoint(USBEndpoint * ep) { - USBEndpoint * prec = NULL; - USBEndpoint * current = NULL; - bool found = false; - - DBG("want to unqueue ep: %p", (void *)ep->getHCED()); - - for (int i = 0; i < 2; i++) { - if (found) { - DBG("USBEndpoint unqueued: %p", (void *)ep->getHCED()); - break; - } - current = (i == 0) ? (USBEndpoint*)headBulkEndpoint : (USBEndpoint*)headInterruptEndpoint; - prec = current; - while (current != NULL) { - if (current == ep) { - if (current->nextEndpoint() != NULL) { - prec->queueEndpoint(current->nextEndpoint()); - if (current == headBulkEndpoint) { - updateBulkHeadED((uint32_t)current->nextEndpoint()->getHCED()); - headBulkEndpoint = current->nextEndpoint(); - } - if (current == headInterruptEndpoint) { - updateInterruptHeadED((uint32_t)current->nextEndpoint()->getHCED()); - headInterruptEndpoint = current->nextEndpoint(); - } - } else { - prec->queueEndpoint(NULL); - if (current == headBulkEndpoint) { - updateBulkHeadED(0); - headBulkEndpoint = current->nextEndpoint(); - } - if (current == headInterruptEndpoint) { - updateInterruptHeadED(0); - headInterruptEndpoint = current->nextEndpoint(); - } - } - found = true; - current->setState(USB_TYPE_FREE); - break; - } - prec = current; - current = current->nextEndpoint(); - } - } - //printBulk(); - //printInt(); -} - - -USBDeviceConnected * USBHost::getDevice(uint8_t index) { - if ((index >= MAX_DEVICE_NB) || (!deviceInUse[index])) { - return NULL; - } - return (USBDeviceConnected*)&devices[index]; -} - - - -// create an USBEndpoint descriptor. the USBEndpoint is not linked -USBEndpoint * USBHost::newEndpoint(ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint32_t size, uint8_t addr) { - int i = 0; - HCED * ed = (HCED *)getED(); - HCTD* td_list[2] = { (HCTD*)getTD(), (HCTD*)getTD() }; - - memset((void *)td_list[0], 0x00, sizeof(HCTD)); - memset((void *)td_list[1], 0x00, sizeof(HCTD)); - - // search a free USBEndpoint - for (i = 0; i < MAX_ENDPOINT; i++) { - if (endpoints[i].getState() == USB_TYPE_FREE) { - DBG("Trying to create ep"); - endpoints[i].init(ed, type, dir, size, addr, td_list); - //endpoints[i].queueTransfer(nullTd); - DBG("USBEndpoint created (%p): type: %d, dir: %d, size: %d, addr: %d", &endpoints[i], type, dir, size, addr); - return &endpoints[i]; - } - } - DBG("could not allocate more endpoints!!!!"); - return NULL; -} - - -USB_TYPE USBHost::resetDevice(USBDeviceConnected * dev) { - int index = findDevice(dev); - if ((index != -1) && (!deviceReset[index])) { - resetPort(dev->getHub(), dev->getPort()); - deviceReset[index] = true; - return USB_TYPE_OK; - } - return USB_TYPE_NOTFOUND; -} - -// link the USBEndpoint to the linked list and attach an USBEndpoint to a device -bool USBHost::addEndpoint(USBDeviceConnected * dev, uint8_t intf_nb, USBEndpoint * ep) { - - if (ep == NULL) { - return false; - } - - DBG("New ep %p", ep); - - HCED * prevEd; - - // set device address in the USBEndpoint descriptor - if (dev == NULL) { - ep->setDeviceAddress(0); - } else { - ep->setDeviceAddress(dev->getAddress()); - } - - if (dev != NULL && dev->getSpeed()) { - DBG("add USBEndpoint: set speed"); - ep->setSpeed(dev->getSpeed()); - } - - // queue the new USBEndpoint on the ED list - switch (ep->getType()) { - - case CONTROL_ENDPOINT: - prevEd = ( HCED*) controlHeadED(); - if (!prevEd) { - updateControlHeadED((uint32_t) ep->getHCED()); - DBG("First control USBEndpoint: %08X", (uint32_t) ep->getHCED()); - headControlEndpoint = ep; - tailControlEndpoint = ep; - return true; - } - tailControlEndpoint->queueEndpoint(ep); - tailControlEndpoint = ep; - return true; - - case BULK_ENDPOINT: - prevEd = ( HCED*) bulkHeadED(); - if (!prevEd) { - updateBulkHeadED((uint32_t) ep->getHCED()); - //DBG("First bulk USBEndpoint: %08X\r\n", (uint32_t) ep->getHCED()); - headBulkEndpoint = ep; - tailBulkEndpoint = ep; - break; - } - tailBulkEndpoint->queueEndpoint(ep); - tailBulkEndpoint = ep; - break; - - case INTERRUPT_ENDPOINT: - prevEd = ( HCED*) interruptHeadED(); - if (!prevEd) { - updateInterruptHeadED((uint32_t) ep->getHCED()); - //DBG("First interrupt USBEndpoint: %08X\r\n", (uint32_t) ep->getHCED()); - headInterruptEndpoint = ep; - tailInterruptEndpoint = ep; - break; - } - tailInterruptEndpoint->queueEndpoint(ep); - tailInterruptEndpoint = ep; - break; - default: - return false; - } - - dev->addEndpoint(intf_nb, ep); - //printBulk(); - //printInt(); - - return true; -} - - -int USBHost::findDevice(USBDeviceConnected * dev) { - for (int i = 0; i < MAX_DEVICE_NB; i++) { - if (dev == &devices[i]) { - return i; - } - } - return -1; -} - -void USBHost::printBulk() { - HCED * hced = (HCED *)bulkHeadED(); - HCTD * hctd = NULL; - printf("---------State of Bulk:--------\r\n"); - while (hced != NULL) { - printf("hced: %p\r\n", hced); - hctd = (HCTD *)((uint32_t)(hced->headTD) & ~(0x0f)); - while (((uint32_t)hctd & ~(0x0f)) != ((hced->tailTD) & ~(0x0f))) { - printf("\thctd: %p\r\n", hctd); - hctd = (HCTD *)((uint32_t)(hctd->nextTD) & ~(0x0f)); - } - printf("\thctd: %p\r\n", hctd); - hced = (HCED *)((uint32_t)(hced->nextED) & ~(0x0f)); - } - printf("--------------------\r\n"); -} - -void USBHost::printInt() { - HCED * hced = (HCED *)interruptHeadED(); - HCTD * hctd = NULL; - printf("---------State of Int:--------\r\n"); - while (hced != NULL) { - printf("hced: %p\r\n", hced); - hctd = (HCTD *)((uint32_t)(hced->headTD) & ~(0x0f)); - while (((uint32_t)hctd & ~(0x0f)) != ((hced->tailTD) & ~(0x0f))) { - printf("\thctd: %p\r\n", hctd); - hctd = (HCTD *)((uint32_t)(hctd->nextTD) & ~(0x0f)); - } - printf("\thctd: %p\r\n", hctd); - hced = (HCED *)((uint32_t)(hced->nextED) & ~(0x0f)); - } - printf("--------------------\r\n"); -} - - -// add a transfer on the TD linked list -USB_TYPE USBHost::addTransfer(USBEndpoint * ed, uint8_t * buf, uint32_t len) { - - // allocate a TD which will be freed in TDcompletion - volatile HCTD * td = ed->getNextTD(); - if (td == NULL) { - return USB_TYPE_ERROR; - } - - DBG("Next td = %p",td); - - uint32_t token = (ed->isSetup() ? TD_SETUP : ( (ed->getDir() == IN) ? TD_IN : TD_OUT )); - - uint32_t td_toggle; - - if (ed->getType() == CONTROL_ENDPOINT) { - if (ed->isSetup()) { - td_toggle = TD_TOGGLE_0; - } else { - td_toggle = TD_TOGGLE_1; - } - } else { - td_toggle = 0; - } - - DBG("Buf=%d, len=%d", buf, len); - td->control = (TD_ROUNDING | token | TD_DELAY_INT(0) | td_toggle | TD_CC); - td->currBufPtr = (uint32_t) buf; - td->bufEnd = (uint32_t)(buf + (len - 1)); - - DBG("Now do queue transfer on ep %p", ed); - - ed->queueTransfer(); - - DBG("Enable list if needed"); - - switch (ed->getType()) { - case CONTROL_ENDPOINT: - enableControlList(); - break; - case BULK_ENDPOINT: - enableBulkList(); - break; - case INTERRUPT_ENDPOINT: - //printInt(); - enableInterruptList(); - break; - } - - DBG("Wait for HC to process TD"); - - - return USB_TYPE_PROCESSING; -} - - - -USB_TYPE USBHost::getDeviceDescriptor(USBDeviceConnected * dev, uint8_t * buf) { - return controlRead( dev, - USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, - GET_DESCRIPTOR, - (DEVICE_DESCRIPTOR << 8) | (0), - 0, - buf, - DEVICE_DESCRIPTOR_LENGTH); -} - -USB_TYPE USBHost::getConfigurationDescriptor(USBDeviceConnected * dev, uint8_t * buf, uint16_t * len_conf_descr) { - USB_TYPE res; - uint16_t total_conf_descr_length = 0; - - // fourth step: get the beginning of the configuration descriptor to have the total length of the conf descr - res = controlRead( dev, - USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, - GET_DESCRIPTOR, - (CONFIGURATION_DESCRIPTOR << 8) | (0), - 0, - buf, - CONFIGURATION_DESCRIPTOR_LENGTH); - - if (res != USB_TYPE_OK) { - ERR("GET CONF 1 DESCR FAILED"); - return res; - } - total_conf_descr_length = buf[2] | (buf[3] << 8); - if (len_conf_descr != NULL) { - *len_conf_descr = total_conf_descr_length; - } - DBG("TOTAL_LENGTH: %d \t NUM_INTERF: %d", total_conf_descr_length, buf[4]); - - return controlRead( dev, - USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, - GET_DESCRIPTOR, - (CONFIGURATION_DESCRIPTOR << 8) | (0), - 0, - buf, - total_conf_descr_length); - -} - -USB_TYPE USBHost::setConfiguration(USBDeviceConnected * dev, uint8_t conf) { - return controlWrite( dev, - USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, - SET_CONFIGURATION, - conf, - 0, - NULL, - 0); - -} - - -// enumerate a device with the control USBEndpoint -USB_TYPE USBHost::enumerate(USBDeviceConnected * dev, IUSBEnumerator* pEnumerator) { - uint8_t data[384]; - uint16_t total_conf_descr_length = 0; - USB_TYPE res; - - DBG("data = %p", data); - - if (dev->isEnumerated()) { - return USB_TYPE_OK; - } - - // first step: get the size of USBEndpoint 0 - DBG("Get size of EP 0"); - res = controlRead( dev, - USB_DEVICE_TO_HOST | USB_RECIPIENT_DEVICE, - GET_DESCRIPTOR, - (DEVICE_DESCRIPTOR << 8) | (0), - 0, - data, - 8); - - if (res != USB_TYPE_OK) { - ERR("Control read failed!!"); - return res; - } - dev->setSizeControlEndpoint(data[7]); - DBG("size control USBEndpoint: %d", dev->getSizeControlEndpoint()); - -DBG("Now set addr"); - // second step: set an address to the device - res = controlWrite( dev, - USB_HOST_TO_DEVICE | USB_RECIPIENT_DEVICE, - SET_ADDRESS, - dev->getAddress(), - 0, - NULL, - 0); - - if (res != USB_TYPE_OK) { - DBG("SET ADDR FAILED"); - freeDevice(dev); - return res; - } - dev->activeAddress(); - - - // third step: get the whole device descriptor to see vid, pid - res = getDeviceDescriptor(dev, data); - - if (res != USB_TYPE_OK) { - DBG("GET DEV DESCR FAILED"); - return res; - } - dev->setClass(data[4]); - dev->setSubClass(data[5]); - dev->setProtocol(data[6]); - dev->setVid(data[8] | (data[9] << 8)); - dev->setPid(data[10] | (data[11] << 8)); - DBG("CLASS: %02X \t VID: %04X \t PID: %04X", data[4], data[8] | (data[9] << 8), data[10] | (data[11] << 8)); - - pEnumerator->setVidPid( data[8] | (data[9] << 8), data[10] | (data[11] << 8) ); - - res = getConfigurationDescriptor(dev, data, &total_conf_descr_length); - if (res != USB_TYPE_OK) { - return res; - } - - // Parse the configuration descriptor - parseConfDescr(dev, data, total_conf_descr_length, pEnumerator); - - - // sixth step: set configuration (only 1 supported) - res = setConfiguration(dev, 1); - - if (res != USB_TYPE_OK) { - DBG("SET CONF FAILED"); - freeDevice(dev); - return res; - } - - // Now the device is enumerated! - dev->setEnumerated(); - DBG("device enumerated!!!!"); - - // Some devices may require this delay - Thread::wait(100); - - return USB_TYPE_OK; -} - -// this method fills the USBDeviceConnected object: class,.... . It also add endpoints found in the descriptor. -void USBHost::parseConfDescr(USBDeviceConnected * dev, uint8_t * conf_descr, uint32_t len, IUSBEnumerator* pEnumerator) { - uint32_t index = 0; - uint32_t len_desc = 0; - uint8_t id = 0; - int nb_endpoints_used = 0; - USBEndpoint * ep = NULL; - uint8_t intf_nb = 0; - bool parsing_intf = false; - - while (index < len) { - len_desc = conf_descr[index]; - id = conf_descr[index+1]; - switch (id) { - case CONFIGURATION_DESCRIPTOR: - break; - case INTERFACE_DESCRIPTOR: - if(pEnumerator->parseInterface(intf_nb, conf_descr[index + 5], conf_descr[index + 6], conf_descr[index + 7])) - { - if (intf_nb++ <= NB_MAX_INTF) { - dev->addInterface(intf_nb - 1, conf_descr[index + 5], conf_descr[index + 6], conf_descr[index + 7]); - nb_endpoints_used = 0; - DBG("ADD INTF %d on device %p: class: %d, subclass: %d, proto: %d", intf_nb - 1, (void *)dev, conf_descr[index + 5],conf_descr[index + 6],conf_descr[index + 7]); - } else { - DBG("Drop intf..."); - } - parsing_intf = true; - } - else - { - parsing_intf = false; - } - break; - case ENDPOINT_DESCRIPTOR: - DBG("Ep DESC"); - if (parsing_intf && (intf_nb <= NB_MAX_INTF) ) { - if (nb_endpoints_used < MAX_ENDPOINT_PER_INTERFACE) { - if( pEnumerator->useEndpoint(intf_nb - 1, (ENDPOINT_TYPE)(conf_descr[index + 3] & 0x03), (ENDPOINT_DIRECTION)((conf_descr[index + 2] >> 7) + 1)) ) - { - // if the USBEndpoint is isochronous -> skip it (TODO: fix this) - if ((conf_descr[index + 3] & 0x03) != ISOCHRONOUS_ENDPOINT) { - ep = newEndpoint((ENDPOINT_TYPE)(conf_descr[index+3] & 0x03), - (ENDPOINT_DIRECTION)((conf_descr[index + 2] >> 7) + 1), - conf_descr[index + 4] | (conf_descr[index + 5] << 8), - conf_descr[index + 2] & 0x0f); - DBG("ADD USBEndpoint %p, on interf %d on device %p", (void *)ep, intf_nb - 1, (void *)dev); - if (ep != NULL && dev != NULL) { - addEndpoint(dev, intf_nb - 1, ep); - } else { - DBG("EP NULL"); - } - nb_endpoints_used++; - } else { - DBG("ISO USBEndpoint NOT SUPPORTED"); - } - } - } - } - //DBG("USBEndpoint DESCR"); - break; - case HID_DESCRIPTOR: - lenReportDescr = conf_descr[index + 7] | (conf_descr[index + 8] << 8); - break; - default: - break; - } - index += len_desc; - } -} - - -USB_TYPE USBHost::bulkRead(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking) { - USB_TYPE res; - - if (dev == NULL || ep == NULL) { - return USB_TYPE_ERROR; - } - - if ((ep->getDir() != IN) || (ep->getType() != BULK_ENDPOINT)) { - DBG("wrong dir or bad USBEndpoint type"); - return USB_TYPE_ERROR; - } - if (dev->getAddress() != ep->getDeviceAddress()) { - DBG("USBEndpoint addr and device addr don't match"); - return USB_TYPE_ERROR; - } - addTransfer(ep, buf, len); - if (blocking) { - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; - } - return USB_TYPE_PROCESSING; -} - -USB_TYPE USBHost::bulkWrite(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking) { - USB_TYPE res; - - if (dev == NULL || ep == NULL) { - return USB_TYPE_ERROR; - } - - if ((ep->getDir() != OUT) || (ep->getType() != BULK_ENDPOINT)) { - DBG("wrong dir or bad USBEndpoint type"); - return USB_TYPE_ERROR; - } - if (dev->getAddress() != ep->getDeviceAddress()) { - DBG("USBEndpoint addr and device addr don't match"); - return USB_TYPE_ERROR; - } - addTransfer(ep, buf, len); - if (blocking) { - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING) - { - DBG("!!!!!!!!!!!!!wait bulkwrite"); - Thread::wait(100); - } - lock(); - DBG("!!!!!!!!!!!!! bulkwrite finished"); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; - } - return USB_TYPE_PROCESSING; -} - -USB_TYPE USBHost::interruptWrite(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking) { - USB_TYPE res; - - if (dev == NULL || ep == NULL) { - return USB_TYPE_ERROR; - } - - if (ep->getState() != USB_TYPE_IDLE) { - return ep->getState(); - } - - if ((ep->getDir() != OUT) || (ep->getType() != INTERRUPT_ENDPOINT)) { - ERR("wrong dir or bad USBEndpoint type: %d, %d", ep->getDir(), ep->getType()); - return USB_TYPE_ERROR; - } - if (dev->getAddress() != ep->getDeviceAddress()) { - ERR("USBEndpoint addr and device addr don't match"); - return USB_TYPE_ERROR; - } - addTransfer(ep, buf, len); - if (blocking) { - while ((res = ep->getState()) == USB_TYPE_PROCESSING); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; - } - return USB_TYPE_PROCESSING; -} - -USB_TYPE USBHost::interruptRead(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking) { - USB_TYPE res; - - if (dev == NULL || ep == NULL) { - return USB_TYPE_ERROR; - } - - if (ep->getState() != USB_TYPE_IDLE) { - return ep->getState(); - } - - if ((ep->getDir() != IN) || (ep->getType() != INTERRUPT_ENDPOINT)) { - ERR("wrong dir or bad USBEndpoint type"); - return USB_TYPE_ERROR; - } - - if (dev->getAddress() != ep->getDeviceAddress()) { - ERR("USBEndpoint addr and device addr don't match"); - return USB_TYPE_ERROR; - } - addTransfer(ep, buf, len); - if (blocking) { - while ((res = ep->getState()) == USB_TYPE_PROCESSING); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; - } - return USB_TYPE_PROCESSING; -} - - -USB_TYPE USBHost::controlRead(USBDeviceConnected * dev, uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, uint8_t * buf, uint32_t len) { - int length_transfer = len; - //DBG("want to transfer: %d bytes\r\n", length_transfer); - USB_TYPE res; - control->setSpeed(dev->getSpeed()); - control->setSize(dev->getSizeControlEndpoint()); - if (dev->isActiveAddress()) { - control->setDeviceAddress(dev->getAddress()); - } else { - control->setDeviceAddress(0); - } - fillControlBuf(requestType, request, value, index, len); - /* DBG("will call transfer: "); - for (int i = 0; i < 8; i++) { - DBG("%02X ", setupPacket[i]); - }*/ - control->setNextToken(TD_SETUP); - addTransfer(control, (uint8_t*)setupPacket, 8); - DBG("Now wait for TD to be processed"); - unlock(); - DBG("Unlocked"); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - DBG("TD processed with result %d", res); - if (res != USB_TYPE_IDLE) { - return res; - } - - if (length_transfer) { - DBG("In data to be transfered..."); - control->setNextToken(TD_IN); - addTransfer(control, (uint8_t *)buf, length_transfer); - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - } - - DBG("Transfer NULL packet (OUT)"); - control->setNextToken(TD_OUT); - addTransfer(control, NULL, 0); - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; -} - - -USB_TYPE USBHost::controlWrite(USBDeviceConnected * dev, uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, uint8_t * buf, uint32_t len) { - control->setSpeed(dev->getSpeed()); - - int length_transfer = len; - USB_TYPE res; - - control->setSize(dev->getSizeControlEndpoint()); - if (dev->isActiveAddress()) { - control->setDeviceAddress(dev->getAddress()); - } else { - control->setDeviceAddress(0); - } - fillControlBuf(requestType, request, value, index, len); - /*DBG("will call transfer: "); - for (int i = 0; i < 8; i++) { - printf("%01X ", setupPacket[i]); - } - printf("\r\n");*/ - control->setNextToken(TD_SETUP); - addTransfer(control, (uint8_t*)setupPacket, 8); - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - - if (length_transfer) { - control->setNextToken(TD_OUT); - addTransfer(control, (uint8_t *)buf, length_transfer); - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - } - - control->setNextToken(TD_IN); - addTransfer(control, NULL, 0); - unlock(); - while ((res = control->getState()) == USB_TYPE_PROCESSING); - lock(); - if (res != USB_TYPE_IDLE) { - return res; - } - return USB_TYPE_OK; -} - - -void USBHost::fillControlBuf(uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, int len) { -#ifdef __BIG_ENDIAN -#error "Must implement BE to LE conv here" -#endif - setupPacket[0] = requestType; - setupPacket[1] = request; - //We are in LE so it's fine - *((uint32_t*)&setupPacket[2]) = value; - *((uint32_t*)&setupPacket[4]) = index; - *((uint32_t*)&setupPacket[6]) = (uint32_t) len; -} - diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.h deleted file mode 100644 index f42c438abb..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHost.h +++ /dev/null @@ -1,304 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef USBHOST_H -#define USBHOST_H - -#include "USBHALHost.h" -#include "USBDeviceConnected.h" -#include "USBEndpoint.h" -#include "IUSBEnumerator.h" - -#define MAX_DEVICE_NB 1 - -// singleton class -class USBHost : public USBHALHost { -public: - /* - * Static method to create or retrieve the single USBHost instance - */ - static USBHost * getHostInst(); - - USB_TYPE getDeviceDescriptor(USBDeviceConnected * dev, uint8_t * buf) ; - USB_TYPE getConfigurationDescriptor(USBDeviceConnected * dev, uint8_t * buf, uint16_t * len_conf_descr = NULL) ; - USB_TYPE setConfiguration(USBDeviceConnected * dev, uint8_t conf) ; - USB_TYPE getStringDescriptor(USBDeviceConnected * dev, uint8_t index, uint8_t * buf) ; - USB_TYPE getReportDescriptor(USBDeviceConnected * dev, uint8_t * buf, uint8_t len) ; - - /* - * Control read: setup stage, data stage and status stage - * - * @param dev the control read will be done for this device - * @param requestType request type - * @param request request - * @param value value - * @param index index - * @param buf pointer on a buffer where will be store the data received - * @param len length of the transfer - * - * @returns status of the control read - */ - USB_TYPE controlRead(USBDeviceConnected * dev, uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, uint8_t * buf, uint32_t len) ; - - /* - * Control write: setup stage, data stage and status stage - * - * @param dev the control write will be done for this device - * @param requestType request type - * @param request request - * @param value value - * @param index index - * @param buf pointer on a buffer which will be written - * @param len length of the transfer - * - * @returns status of the control write - */ - USB_TYPE controlWrite(USBDeviceConnected * dev, uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, uint8_t * buf, uint32_t len) ; - - - /* - * Bulk read - * - * @param dev the bulk transfer will be done for this device - * @param ep USBEndpoint which will be used to read a packet - * @param buf pointer on a buffer where will be store the data received - * @param len length of the transfer - * @param blocking if true, the read is blocking (wait for completion) - * - * @returns status of the bulk read - */ - USB_TYPE bulkRead(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking = true) ; - - /* - * Bulk write - * - * @param dev the bulk transfer will be done for this device - * @param ep USBEndpoint which will be used to write a packet - * @param buf pointer on a buffer which will be written - * @param len length of the transfer - * @param blocking if true, the write is blocking (wait for completion) - * - * @returns status of the bulk write - */ - USB_TYPE bulkWrite(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking = true) ; - - /* - * Interrupt read - * - * @param dev the bulk transfer will be done for this device - * @param ep USBEndpoint which will be used to write a packet - * @param buf pointer on a buffer which will be written - * @param len length of the transfer - * @param blocking if true, the read is blocking (wait for completion) - * - * @returns status of the interrupt read - */ - USB_TYPE interruptRead(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking = true) ; - - /* - * Interrupt write - * - * @param dev the bulk transfer will be done for this device - * @param ep USBEndpoint which will be used to write a packet - * @param buf pointer on a buffer which will be written - * @param len length of the transfer - * @param blocking if true, the write is blocking (wait for completion) - * - * @returns status of the interrupt write - */ - USB_TYPE interruptWrite(USBDeviceConnected * dev, USBEndpoint * ep, uint8_t * buf, uint32_t len, bool blocking = true) ; - - /* - * Enumerate a device. This method is responsible for: - * - set the address of the device - * - fill a USBDeviceConnected object: - * - add interfaces, endpoints, ... - * - set a configuration - * - * @param dev device which will be enumerated - * - * @returns status of the enumeration - */ - USB_TYPE enumerate(USBDeviceConnected * dev, IUSBEnumerator* pEnumerator) ; - - /* - * Get a device - * - * @param index index of the device which will be returned - * - * @returns pointer on the "index" device - */ - USBDeviceConnected * getDevice(uint8_t index) ; - - /* - * reset port and hub of a specific device - * - * @param pointer on the device hich will be reseted - */ - USB_TYPE resetDevice(USBDeviceConnected * dev) ; - - /* - * If there is a HID device connected, the host stores the length of the report descriptor. - * This avoid to the driver to re-ask the configuration descriptor to request the report descriptor - * - * @returns length of the report descriptor - */ - uint16_t getLengthReportDescr() { - return lenReportDescr; - }; - - /** - * register a driver into the host associated with a callback function called when the device is disconnected - * - * @param dev device - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - */ - template - void registerDriver(USBDeviceConnected * dev, uint8_t intf, T* tptr, void (T::*mptr)(void)) { - int index = findDevice(dev); - if ((index != -1) && (mptr != NULL) && (tptr != NULL)) { - dev->onDisconnect(intf, tptr, mptr); - } - } - - /** - * register a driver into the host associated with a callback function called when the device is disconnected - * - * @param dev device - * @param fn callback called when the specified device has been disconnected - */ - void registerDriver(USBDeviceConnected * dev, uint8_t intf, void (*fn)(void)) { - int index = findDevice(dev); - if ((index != -1) && (fn != NULL)) { - dev->onDisconnect(intf, fn); - } - } - - -protected: - - /* - * Virtual method called when a device has been connected - * - * @param hub hub number of the device - * @param port port number of the device - * @param lowSpeed 1 if low speed, 0 otherwise - */ - virtual void deviceConnected(int hub, int port, bool lowSpeed) ; - - /* - * Virtuel method called when a device has been disconnected - * - * @param hub hub number of the device - * @param port port number of the device - * @param addr list of the TDs which have been completed to dequeue freed TDs - */ - virtual void deviceDisconnected(int hub, int port, volatile uint32_t addr) ; - - /* - * Virtual method called when a transfer has been completed - * - * @param addr list of the TDs which have been completed - */ - virtual void transferCompleted(volatile uint32_t addr) ; - - -private: - // singleton class -> constructor is private - USBHost(); - - static USBHost * instHost; - - uint8_t nb_devices; - uint16_t lenReportDescr; - - void fillControlBuf(uint8_t requestType, uint8_t request, uint32_t value, uint32_t index, int len) ; - void parseConfDescr(USBDeviceConnected * dev, uint8_t * conf_descr, uint32_t len, IUSBEnumerator* pEnumerator) ; - void freeDevice(USBDeviceConnected * dev) ; - int findDevice(USBDeviceConnected * dev) ; - - - // endpoints - void unqueueEndpoint(USBEndpoint * ep) ; - USBEndpoint endpoints[MAX_ENDPOINT]; - USBEndpoint* volatile control; - - USBEndpoint* volatile headControlEndpoint; - USBEndpoint* volatile headBulkEndpoint; - USBEndpoint* volatile headInterruptEndpoint; - - USBEndpoint* volatile tailControlEndpoint; - USBEndpoint* volatile tailBulkEndpoint; - USBEndpoint* volatile tailInterruptEndpoint; - - bool controlEndpointAllocated; - - - // devices connected - USBDeviceConnected devices[MAX_DEVICE_NB]; - volatile bool deviceInUse[MAX_DEVICE_NB]; - volatile bool deviceReset[MAX_DEVICE_NB]; - - /* - * Add a transfer on the TD linked list associated to an ED - * - * @param ed the transfer is associated to this ed - * @param buf pointer on a buffer where will be read/write data to send or receive - * @param len transfer length - * - * @return status of the transfer - */ - USB_TYPE addTransfer(USBEndpoint * ed, uint8_t * buf, uint32_t len) ; - - /* - * Link the USBEndpoint to the linked list and attach an USBEndpoint this USBEndpoint to a device - * - * @param dev pointer on a USBDeviceConnected object - * @param ep pointer on the USBEndpoint which will be added - * - * return true if successful - */ - bool addEndpoint(USBDeviceConnected * dev, uint8_t intf_nb, USBEndpoint * ep) ; - - /* - * Create an USBEndpoint descriptor. Warning: the USBEndpoint is not linked. - * - * @param type USBEndpoint type (CONTROL_ENDPOINT, BULK_ENDPOINT, INTERRUPT_ENDPOINT) - * @param dir USBEndpoint direction (no meaning for CONTROL_ENDPOINT) - * @param size USBEndpoint max packet size - * @param addr USBEndpoint address - * - * @returns pointer on the USBEndpoint created - */ - USBEndpoint * newEndpoint(ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir, uint32_t size, uint8_t addr) ; - - - // to store a setup packet - uint8_t setupPacket[8]; - - - ///////////////////////// - /// FOR DEBUG - ///////////////////////// - void printBulk(); - void printInt(); - -}; - -#endif diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHostTypes.h b/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHostTypes.h deleted file mode 100644 index cadfc69f3c..0000000000 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/USBHostTypes.h +++ /dev/null @@ -1,191 +0,0 @@ -/* Copyright (c) 2010-2012 mbed.org, MIT License -* -* Permission is hereby granted, free of charge, to any person obtaining a copy of this software -* and associated documentation files (the "Software"), to deal in the Software without -* restriction, including without limitation the rights to use, copy, modify, merge, publish, -* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the -* Software is furnished to do so, subject to the following conditions: -* -* The above copyright notice and this permission notice shall be included in all copies or -* substantial portions of the Software. -* -* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING -* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, -* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -*/ - -#ifndef USB_INC_H -#define USB_INC_H - -#include "mbed.h" - -enum USB_TYPE { - USB_TYPE_DISCONNECTED = -10, - USB_TYPE_NOTFOUND = -9, - USB_TYPE_BADCONFIG = -8, - USB_TYPE_FREE = -7, - USB_TYPE_IDLE = -6, - USB_TYPE_PROCESSING = -5, - USB_TYPE_HALTED = -4, //Transfer on an ep is stalled - USB_TYPE_BUSY = -3, - USB_TYPE_TDFAIL = -2, - USB_TYPE_ERROR = -1, - USB_TYPE_OK = 0 -}; - -#define AUDIO_CLASS 0x01 -#define CDC_CLASS 0x02 -#define MSD_CLASS 0x08 -#define HID_CLASS 0x03 - - -// From NXP's USBHostLite stack's usbhost_lpc17xx.h -// Only the types names have been changed to avoid unecessary typedefs - - -/* -************************************************************************************************************** -* NXP USB Host Stack -* -* (c) Copyright 2008, NXP SemiConductors -* (c) Copyright 2008, OnChip Technologies LLC -* All Rights Reserved -* -* www.nxp.com -* www.onchiptech.com -* -* File : usbhost_lpc17xx.h -* Programmer(s) : Ravikanth.P -* Version : -* -************************************************************************************************************** -*/ - - -// ------------------ HcControl Register --------------------- -#define OR_CONTROL_PLE 0x00000004 -#define OR_CONTROL_CLE 0x00000010 -#define OR_CONTROL_BLE 0x00000020 -#define OR_CONTROL_HCFS 0x000000C0 -#define OR_CONTROL_HC_OPER 0x00000080 -// ----------------- HcCommandStatus Register ----------------- -#define OR_CMD_STATUS_HCR 0x00000001 -#define OR_CMD_STATUS_CLF 0x00000002 -#define OR_CMD_STATUS_BLF 0x00000004 -// --------------- HcInterruptStatus Register ----------------- -#define OR_INTR_STATUS_WDH 0x00000002 -#define OR_INTR_STATUS_RHSC 0x00000040 -#define OR_INTR_STATUS_UE 0x00000010 -// --------------- HcInterruptEnable Register ----------------- -#define OR_INTR_ENABLE_WDH 0x00000002 -#define OR_INTR_ENABLE_RHSC 0x00000040 -#define OR_INTR_ENABLE_MIE 0x80000000 -// ---------------- HcRhDescriptorA Register ------------------ -#define OR_RH_STATUS_LPSC 0x00010000 -#define OR_RH_STATUS_DRWE 0x00008000 -// -------------- HcRhPortStatus[1:NDP] Register -------------- -#define OR_RH_PORT_CCS 0x00000001 -#define OR_RH_PORT_PRS 0x00000010 -#define OR_RH_PORT_CSC 0x00010000 -#define OR_RH_PORT_PRSC 0x00100000 -#define OR_RH_PORT_LSDA 0x00000200 - - -// -//************************************************************************************************************** -//* FRAME INTERVAL -//************************************************************************************************************** -// - -#define FI 0x2EDF // 12000 bits per frame (-1) -#define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) | FI) - -// -//************************************************************************************************************** -//* ENDPOINT DESCRIPTOR CONTROL FIELDS -//************************************************************************************************************** -// - -#define ED_SKIP (uint32_t) (0x00001000) // Skip this ep in queue - -// -//************************************************************************************************************** -//* TRANSFER DESCRIPTOR CONTROL FIELDS -//************************************************************************************************************** -// - -#define TD_ROUNDING (uint32_t) (0x00040000) // Buffer Rounding -#define TD_SETUP (uint32_t)(0) // Direction of Setup Packet -#define TD_IN (uint32_t)(0x00100000) // Direction In -#define TD_OUT (uint32_t)(0x00080000) // Direction Out -#define TD_DELAY_INT(x) (uint32_t)((x) << 21) // Delay Interrupt -#define TD_TOGGLE_0 (uint32_t)(0x02000000) // Toggle 0 -#define TD_TOGGLE_1 (uint32_t)(0x03000000) // Toggle 1 -#define TD_CC (uint32_t)(0xF0000000) // Completion Code - -// -//************************************************************************************************************** -//* USB STANDARD REQUEST DEFINITIONS -//************************************************************************************************************** -// - -#define DEVICE_DESCRIPTOR (1) -#define CONFIGURATION_DESCRIPTOR (2) -#define INTERFACE_DESCRIPTOR (4) -#define ENDPOINT_DESCRIPTOR (5) -#define HID_DESCRIPTOR (33) - -// ----------- Control RequestType Fields ----------- -#define USB_DEVICE_TO_HOST 0x80 -#define USB_HOST_TO_DEVICE 0x00 -#define USB_REQUEST_TYPE_CLASS 0x20 -#define USB_RECIPIENT_DEVICE 0x00 -#define USB_RECIPIENT_INTERFACE 0x01 - -// -------------- USB Standard Requests -------------- -#define SET_ADDRESS 5 -#define GET_DESCRIPTOR 6 -#define SET_CONFIGURATION 9 -#define SET_INTERFACE 11 - -// -------------- USB Descriptor Length -------------- -#define DEVICE_DESCRIPTOR_LENGTH 0x12 -#define CONFIGURATION_DESCRIPTOR_LENGTH 0x09 - - -// -//************************************************************************************************************** -//* TYPE DEFINITIONS -//************************************************************************************************************** -// - -// ----------- HostController EndPoint Descriptor ------------- -typedef struct hcEd { - volatile uint32_t control; // Endpoint descriptor control - volatile uint32_t tailTD; // Physical address of tail in Transfer descriptor list - volatile uint32_t headTD; // Physcial address of head in Transfer descriptor list - volatile uint32_t nextED; // Physical address of next Endpoint descriptor -} HCED; - -// ------------ HostController Transfer Descriptor ------------ -typedef struct hcTd { - volatile uint32_t control; // Transfer descriptor control - volatile uint32_t currBufPtr; // Physical address of current buffer pointer - volatile uint32_t nextTD; // Physical pointer to next Transfer Descriptor - volatile uint32_t bufEnd; // Physical address of end of buffer -} HCTD; - -// ----------- Host Controller Communication Area ------------ -typedef struct hcca { - volatile uint32_t IntTable[32]; // Interrupt Table - volatile uint32_t FrameNumber; // Frame Number - volatile uint32_t DoneHead; // Done Head - volatile uint8_t Reserved[116]; // Reserved for future use - volatile uint8_t Unknown[4]; // Unused -} HCCA; - - - -#endif diff --git a/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.cpp b/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.cpp deleted file mode 100644 index a593587c6e..0000000000 --- a/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.cpp +++ /dev/null @@ -1,253 +0,0 @@ -/* IOSerialStream.cpp */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#define __DEBUG__ 0 //Maximum verbosity -#ifndef __MODULE__ -#define __MODULE__ "IOSerialStream.cpp" -#endif - -#include "core/fwk.h" - -#include - -#include "IOSerialStream.h" - -IOSerialStream::IOSerialStream(mbed::Serial& serial) : m_serial(serial), m_serialTxFifoEmpty(true), -m_availableSphre(1), m_spaceSphre(1), m_inBuf(), m_outBuf() -{ - m_availableSphre.wait(); - m_spaceSphre.wait(); - //Attach interrupts - m_serial.attach(this, &IOSerialStream::readable, mbed::Serial::RxIrq); - m_serial.attach(this, &IOSerialStream::writeable, mbed::Serial::TxIrq); -} - -/*virtual*/ IOSerialStream::~IOSerialStream() -{ - m_serial.attach(NULL, mbed::Serial::RxIrq); - m_serial.attach(NULL, mbed::Serial::TxIrq); -} - -//0 for non-blocking (returns immediately), osWaitForever for infinite blocking -/*virtual*/ int IOSerialStream::read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout/*=osWaitForever*/) -{ - DBG("Trying to read at most %d chars", maxLength); - int ret = waitAvailable(timeout); - if(ret) - { - WARN("Error %d while waiting for incoming data", ret); - return ret; - } - int readLen = MIN( available(), maxLength ); - *pLength = readLen; - setupReadableISR(false); - while(readLen--) - { - m_inBuf.dequeue(buf); - buf++; - } - setupReadableISR(true); - DBG("Read %d chars successfully", *pLength); - return OK; -} - -/*virtual*/ size_t IOSerialStream::available() -{ - setupReadableISR(false); //m_inBuf.available() is not reentrant - size_t len = m_inBuf.available(); - setupReadableISR(true); - return len; -} - -/*virtual*/ int IOSerialStream::waitAvailable(uint32_t timeout/*=osWaitForever*/) //Wait for data to be available -{ - int ret; - if(available()) //Is data already available? - { - m_availableSphre.wait(0); //Clear the queue as data is available - return OK; - } - - DBG("Waiting for data availability %d ms (-1 is infinite)", timeout); - ret = m_availableSphre.wait(timeout); //Wait for data to arrive or for abort - if(ret <= 0) - { - DBG("Timeout"); - return NET_TIMEOUT; - } - if(!available()) //Even if abort has been called, return that data is available - { - DBG("Aborted"); - return NET_INTERRUPTED; - } - DBG("Finished waiting"); - m_availableSphre.wait(0); //Clear the queue as data is available - return OK; -} - -/*virtual*/ int IOSerialStream::abortRead() //Abort current reading (or waiting) operation -{ - if( !available() ) //If there is data pending, no need to abort - { - m_availableSphre.release(); //Force exiting the waiting state; kludge to pass a RC directly - } - else - { - DBG("Serial is readable"); ; - } - return OK; -} - -void IOSerialStream::setupReadableISR(bool en) -{ - if(en) - { - ((LPC_UART_TypeDef *)(UART_3))->IER |= 1 << 0; - } - else - { - ((LPC_UART_TypeDef *)(UART_3))->IER &= ~(1 << 0); - } -} - -void IOSerialStream::readable() //Callback from m_serial when new data is available -{ - do - { - m_inBuf.queue(((LPC_UART_TypeDef *)UART_3)->RBR); //FIXME mbed libraries this is an awful kludge - } while(m_serial.readable()); - m_availableSphre.release(); //Force exiting the waiting state -} - -//0 for non-blocking (returns immediately), osWaitForever for infinite blocking -/*virtual*/ int IOSerialStream::write(uint8_t* buf, size_t length, uint32_t timeout/*=osWaitForever*/) -{ - DBG("Trying to write %d chars", length); - int ret = waitSpace(timeout); - if(ret) - { - WARN("Error %d while waiting for space", ret); - return ret; - } - DBG("Writing %d chars", length); - setupWriteableISR(false); - while(length) - { - m_outBuf.queue(*buf); - buf++; - length--; - if(length && !space()) - { - DBG("Waiting to write remaining %d chars", length); - setupWriteableISR(true); - ret = waitSpace(timeout); - if(ret) - { - WARN("Error %d while waiting for space", ret); - return ret; - } - setupWriteableISR(false); - } - } - //If m_serial tx fifo is empty we need to manually tx a byte in order to trigger the interrupt - if( m_outBuf.available() && m_serialTxFifoEmpty ) - { - m_serialTxFifoEmpty = false; - uint8_t c; - m_outBuf.dequeue(&c); - //m_serial.putc((char)c); - ((LPC_UART_TypeDef *)UART_3)->THR = c; //FIXME awful kludge - } - setupWriteableISR(true); - DBG("Write successful"); - return OK; -} - -/*virtual*/ size_t IOSerialStream::space() -{ - setupWriteableISR(false); //m_outBuf.available() is not reentrant - size_t len = CIRCBUF_SIZE - m_outBuf.available(); - setupWriteableISR(true); - return len; -} - -/*virtual*/ int IOSerialStream::waitSpace(uint32_t timeout/*=osWaitForever*/) //Wait for space to be available -{ - int ret; - if(space()) //Is still space already left? - { - m_spaceSphre.wait(0); //Clear the queue as space is available - return OK; - } - - DBG("Waiting for data space %d ms (-1 is infinite)", timeout); - ret = m_spaceSphre.wait(timeout); //Wait for space to be made or for abort - if(ret <= 0) - { - DBG("Timeout"); - return NET_TIMEOUT; - } - if(!space()) //Even if abort has been called, return that space is available - { - DBG("Aborted"); - return NET_INTERRUPTED; - } - m_spaceSphre.wait(0); //Clear the queue as space is available - return OK; -} - -/*virtual*/ int IOSerialStream::abortWrite() //Abort current writing (or waiting) operation -{ - if( !space() ) //If there is space left, no need to abort - { - m_spaceSphre.release(); //Force exiting the waiting state - } - return OK; -} - -void IOSerialStream::setupWriteableISR(bool en) -{ - if(en) - { - ((LPC_UART_TypeDef *)(UART_3))->IER |= 1 << 1; - } - else - { - ((LPC_UART_TypeDef *)(UART_3))->IER &= ~(1 << 1); - } -} - -void IOSerialStream::writeable() //Callback from m_serial when new space is available -{ - if(m_outBuf.isEmpty()) - { - m_serialTxFifoEmpty = true; - } - else - { - while(m_serial.writeable() && !m_outBuf.isEmpty()) - { - uint8_t c; - m_outBuf.dequeue(&c); - //m_serial.putc((char)c); - ((LPC_UART_TypeDef *)UART_3)->THR = c; //FIXME awful kludge - } - } - m_spaceSphre.release(); //Force exiting the waiting state -} diff --git a/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.h b/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.h deleted file mode 100644 index 28d2fecca7..0000000000 --- a/libraries/net/VodafoneUSBModem/serial/io/IOSerialStream.h +++ /dev/null @@ -1,72 +0,0 @@ -/* IOSerialStream.h */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ -#ifndef IOSERIALSTREAM_H_ -#define IOSERIALSTREAM_H_ - -#include "core/fwk.h" - -#include "Serial.h" - -#include "rtos.h" -#include "core/MtxCircBuffer.h" - -/** Input Serial Stream for physical serial interfaces (UART...) -This class is not thread-safe, except for the *Abort() methods that can be called by any thread/ISR -*/ -#define CIRCBUF_SIZE 255 -class IOSerialStream : public IOStream -{ -public: - IOSerialStream(mbed::Serial& serial); - /*virtual*/ ~IOSerialStream(); - - //0 for non-blocking (returns immediately), osWaitForever for infinite blocking - virtual int read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout=osWaitForever); - virtual size_t available(); - virtual int waitAvailable(uint32_t timeout=osWaitForever); //Wait for data to be available - virtual int abortRead(); //Abort current reading (or waiting) operation - - - //0 for non-blocking (returns immediately), osWaitForever for infinite blocking - virtual int write(uint8_t* buf, size_t length, uint32_t timeout=osWaitForever); - virtual size_t space(); - virtual int waitSpace(uint32_t timeout=osWaitForever); //Wait for space to be available - virtual int abortWrite(); //Abort current writing (or waiting) operation - -private: - - mbed::Serial& m_serial; - volatile bool m_serialTxFifoEmpty; - - void setupReadableISR(bool en); - void readable(); //Callback from m_serial when new data is available - - Semaphore m_availableSphre; //Used for signalling - - void setupWriteableISR(bool en); - void writeable(); //Callback from m_serial when new space is available - - Semaphore m_spaceSphre; //Used for signalling - - MtxCircBuffer m_inBuf; - MtxCircBuffer m_outBuf; - -}; - -#endif /* IOSERIALSTREAM_H_ */ diff --git a/libraries/net/VodafoneUSBModem/socket/bsd_socket.h b/libraries/net/VodafoneUSBModem/socket/bsd_socket.h deleted file mode 100644 index c442d9cf2a..0000000000 --- a/libraries/net/VodafoneUSBModem/socket/bsd_socket.h +++ /dev/null @@ -1,34 +0,0 @@ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef BSD_SOCKET_H_ -#define BSD_SOCKET_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "socket/sys/socket.h" //Must conform to -#include "socket/netinet/in.h" //Must conform to -#include "socket/netdb.h" //Must conform to - -#ifdef __cplusplus -} -#endif - -#endif /* BSD_SOCKET_H_ */ diff --git a/libraries/net/VodafoneUSBModem/socket/netdb.h b/libraries/net/VodafoneUSBModem/socket/netdb.h deleted file mode 100644 index 199891a503..0000000000 --- a/libraries/net/VodafoneUSBModem/socket/netdb.h +++ /dev/null @@ -1,47 +0,0 @@ -/* netdb.h */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef NETDB_H_ -#define NETDB_H_ - -#include "lwip/netdb.h" - -//DNS - -inline struct hostent *gethostbyname(const char *name) -{ - return lwip_gethostbyname(name); -} - -inline int gethostbyname_r(const char *name, struct hostent *ret, char *buf, size_t buflen, struct hostent **result, int *h_errnop) -{ - return lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop); -} - -inline void freeaddrinfo(struct addrinfo *ai) -{ - return lwip_freeaddrinfo(ai); -} - -inline int getaddrinfo(const char *nodename, const char *servname, const struct addrinfo *hints, struct addrinfo **res) -{ - return lwip_getaddrinfo(nodename, servname, hints, res); -} - -#endif /* NETDB_H_ */ diff --git a/libraries/net/VodafoneUSBModem/socket/netinet/in.h b/libraries/net/VodafoneUSBModem/socket/netinet/in.h deleted file mode 100644 index e67114245c..0000000000 --- a/libraries/net/VodafoneUSBModem/socket/netinet/in.h +++ /dev/null @@ -1,25 +0,0 @@ -/* in.h */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef IN_H_ -#define IN_H_ - -#include "lwip/inet.h" - -#endif /* IN_H_ */ diff --git a/libraries/net/VodafoneUSBModem/socket/sys/socket.h b/libraries/net/VodafoneUSBModem/socket/sys/socket.h deleted file mode 100644 index 3db9028250..0000000000 --- a/libraries/net/VodafoneUSBModem/socket/sys/socket.h +++ /dev/null @@ -1,126 +0,0 @@ -/* socket.h */ -/* Copyright (C) 2012 mbed.org, MIT License - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of this software - * and associated documentation files (the "Software"), to deal in the Software without restriction, - * including without limitation the rights to use, copy, modify, merge, publish, distribute, - * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all copies or - * substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING - * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - - -#ifndef SYS_SOCKET_H_ -#define SYS_SOCKET_H_ - -#include "lwip/sockets.h" - -//Sockets - -inline int accept(int s, struct sockaddr *addr, socklen_t *addrlen) -{ - return lwip_accept(s, addr, addrlen); -} - -inline int bind(int s, const struct sockaddr *name, socklen_t namelen) -{ - return lwip_bind(s, name, namelen); -} - -inline int shutdown(int s, int how) -{ - return lwip_shutdown(s, how); -} - -inline int getsockname (int s, struct sockaddr *name, socklen_t *namelen) -{ - return lwip_getsockname(s, name, namelen); -} - -inline int getpeername (int s, struct sockaddr *name, socklen_t *namelen) -{ - return lwip_getpeername(s, name, namelen); -} - -inline int getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen) -{ - return lwip_getsockopt(s, level, optname, optval, optlen); -} - -inline int setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen) -{ - return lwip_setsockopt(s, level, optname, optval, optlen); -} - -inline int connect(int s, const struct sockaddr *name, socklen_t namelen) -{ - return lwip_connect(s, name, namelen); -} - -inline int listen(int s, int backlog) -{ - return lwip_listen(s, backlog); -} - -inline int recv(int s, void *mem, size_t len, int flags) -{ - return lwip_recv(s, mem, len, flags); -} - -inline int recvfrom(int s, void *mem, size_t len, int flags, - struct sockaddr *from, socklen_t *fromlen) -{ - return lwip_recvfrom(s, mem, len, flags, from, fromlen); -} - -inline int send(int s, const void *dataptr, size_t size, int flags) -{ - return lwip_send(s, dataptr, size, flags); -} - -inline int sendto(int s, const void *dataptr, size_t size, int flags, - const struct sockaddr *to, socklen_t tolen) -{ - return lwip_sendto(s, dataptr, size, flags, to, tolen); -} - -inline int socket(int domain, int type, int protocol) -{ - return lwip_socket(domain, type, protocol); -} - -inline int select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, - struct timeval *timeout) -{ - return lwip_select(maxfdp1, readset, writeset, exceptset, timeout); -} - -inline int ioctlsocket(int s, long cmd, void *argp) -{ - return lwip_ioctl(s, cmd, argp); -} - -inline int read(int s, void *mem, size_t len) -{ - return lwip_read(s, mem, len); -} - -inline int write(int s, const void *dataptr, size_t size) -{ - return lwip_write(s, dataptr, size); -} - -inline int close(int s) -{ - return lwip_close(s); -} - -#endif /* SYS_SOCKET_H_ */ diff --git a/libraries/net/VodafoneUSBModem/at/ATCommandsInterface.cpp b/libraries/net/cellular/CellularModem/at/ATCommandsInterface.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/at/ATCommandsInterface.cpp rename to libraries/net/cellular/CellularModem/at/ATCommandsInterface.cpp diff --git a/libraries/net/VodafoneUSBModem/at/ATCommandsInterface.h b/libraries/net/cellular/CellularModem/at/ATCommandsInterface.h similarity index 100% rename from libraries/net/VodafoneUSBModem/at/ATCommandsInterface.h rename to libraries/net/cellular/CellularModem/at/ATCommandsInterface.h diff --git a/libraries/net/VodafoneUSBModem/core/IOStream.h b/libraries/net/cellular/CellularModem/core/IOStream.h similarity index 99% rename from libraries/net/VodafoneUSBModem/core/IOStream.h rename to libraries/net/cellular/CellularModem/core/IOStream.h index c9918b131d..6d411b8e4b 100644 --- a/libraries/net/VodafoneUSBModem/core/IOStream.h +++ b/libraries/net/cellular/CellularModem/core/IOStream.h @@ -20,8 +20,6 @@ #ifndef IOSTREAM_H_ #define IOSTREAM_H_ -#include "fwk.h" - #include "rtos.h" class IStream diff --git a/libraries/net/VodafoneUSBModem/core/MtxCircBuffer.h b/libraries/net/cellular/CellularModem/core/MtxCircBuffer.h similarity index 99% rename from libraries/net/VodafoneUSBModem/core/MtxCircBuffer.h rename to libraries/net/cellular/CellularModem/core/MtxCircBuffer.h index 8b86304719..b011693eb4 100644 --- a/libraries/net/VodafoneUSBModem/core/MtxCircBuffer.h +++ b/libraries/net/cellular/CellularModem/core/MtxCircBuffer.h @@ -20,8 +20,6 @@ #ifndef MTXCIRCBUFFER_H #define MTXCIRCBUFFER_H -#include "fwk.h" - #include "rtos.h" //Mutex protected circualr buffer diff --git a/libraries/net/VodafoneUSBModem/core/config.h b/libraries/net/cellular/CellularModem/core/config.h similarity index 100% rename from libraries/net/VodafoneUSBModem/core/config.h rename to libraries/net/cellular/CellularModem/core/config.h diff --git a/libraries/net/VodafoneUSBModem/core/dbg.cpp b/libraries/net/cellular/CellularModem/core/dbg.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/core/dbg.cpp rename to libraries/net/cellular/CellularModem/core/dbg.cpp diff --git a/libraries/net/VodafoneUSBModem/core/dbg.h b/libraries/net/cellular/CellularModem/core/dbg.h similarity index 100% rename from libraries/net/VodafoneUSBModem/core/dbg.h rename to libraries/net/cellular/CellularModem/core/dbg.h diff --git a/libraries/net/VodafoneUSBModem/core/errors.h b/libraries/net/cellular/CellularModem/core/errors.h similarity index 100% rename from libraries/net/VodafoneUSBModem/core/errors.h rename to libraries/net/cellular/CellularModem/core/errors.h diff --git a/libraries/net/VodafoneUSBModem/core/fwk.h b/libraries/net/cellular/CellularModem/core/fwk.h similarity index 100% rename from libraries/net/VodafoneUSBModem/core/fwk.h rename to libraries/net/cellular/CellularModem/core/fwk.h diff --git a/libraries/net/VodafoneUSBModem/ip/IPInterface.cpp b/libraries/net/cellular/CellularModem/ip/IPInterface.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/ip/IPInterface.cpp rename to libraries/net/cellular/CellularModem/ip/IPInterface.cpp diff --git a/libraries/net/VodafoneUSBModem/ip/IPInterface.h b/libraries/net/cellular/CellularModem/ip/IPInterface.h similarity index 100% rename from libraries/net/VodafoneUSBModem/ip/IPInterface.h rename to libraries/net/cellular/CellularModem/ip/IPInterface.h diff --git a/libraries/net/VodafoneUSBModem/ip/LwIPInterface.cpp b/libraries/net/cellular/CellularModem/ip/LwIPInterface.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/ip/LwIPInterface.cpp rename to libraries/net/cellular/CellularModem/ip/LwIPInterface.cpp diff --git a/libraries/net/VodafoneUSBModem/ip/LwIPInterface.h b/libraries/net/cellular/CellularModem/ip/LwIPInterface.h similarity index 100% rename from libraries/net/VodafoneUSBModem/ip/LwIPInterface.h rename to libraries/net/cellular/CellularModem/ip/LwIPInterface.h diff --git a/libraries/net/VodafoneUSBModem/ip/PPPIPInterface.cpp b/libraries/net/cellular/CellularModem/ip/PPPIPInterface.cpp similarity index 89% rename from libraries/net/VodafoneUSBModem/ip/PPPIPInterface.cpp rename to libraries/net/cellular/CellularModem/ip/PPPIPInterface.cpp index 2b398f0940..f71afea65b 100644 --- a/libraries/net/VodafoneUSBModem/ip/PPPIPInterface.cpp +++ b/libraries/net/cellular/CellularModem/ip/PPPIPInterface.cpp @@ -32,9 +32,10 @@ using std::sscanf; #define MSISDN "*99#" -#define CONNECT_CMD "ATD " MSISDN "\x0D" -#define EXPECTED_RESP CONNECT_CMD "\x0D" "\x0A" "CONNECT" "\x0D" "\x0A" -#define EXPECTED_RESP_DATARATE CONNECT_CMD "\x0D" "\x0A" "CONNECT %d" "\x0D" "\x0A" +#define CONNECT_CMD_PREFIX "ATD " +#define CONNECT_CMD_SUFFIX "\x0D" +#define EXPECTED_RESP_SUFFIX "\x0D" "\x0A" "CONNECT" "\x0D" "\x0A" +#define EXPECTED_RESP_DATARATE_SUFFIX "\x0D" "\x0A" "CONNECT %d" "\x0D" "\x0A" #define EXPECTED_RESP_MIN_LEN 20 #define OK_RESP "\x0D" "\x0A" "OK" "\x0D" "\x0A" #define ESCAPE_SEQ "+++" @@ -49,14 +50,22 @@ extern "C" { #include "netif/ppp/ppp.h" } -PPPIPInterface::PPPIPInterface(IOStream* pStream) : LwIPInterface(), m_linkStatusSphre(1), m_pppErrCode(0), m_pStream(pStream), m_streamAvail(true), m_pppd(-1) +PPPIPInterface::PPPIPInterface(IOStream* pStream, const char* msisdn) : LwIPInterface(), m_linkStatusSphre(1), m_pppErrCode(0), m_pStream(pStream), m_streamAvail(true), m_pppd(-1) { + m_connectCmd = new char[strlen(CONNECT_CMD_PREFIX) + strlen(msisdn) + strlen(CONNECT_CMD_SUFFIX) + 1]; + sprintf(m_connectCmd, "%s%s%s", CONNECT_CMD_PREFIX, msisdn, CONNECT_CMD_SUFFIX); + m_expectedResp = new char[strlen(m_connectCmd) + strlen(EXPECTED_RESP_SUFFIX) + 1]; + sprintf(m_expectedResp, "%s%s", m_connectCmd, EXPECTED_RESP_SUFFIX); + m_expectedRespDatarate = new char[strlen(m_connectCmd) + strlen(EXPECTED_RESP_DATARATE_SUFFIX) + 1]; + sprintf(m_expectedRespDatarate, "%s%s", m_connectCmd, EXPECTED_RESP_DATARATE_SUFFIX); m_linkStatusSphre.wait(); } /*virtual*/ PPPIPInterface::~PPPIPInterface() { - + delete m_connectCmd; + delete m_expectedResp; + delete m_expectedRespDatarate; } /*virtual*/ int PPPIPInterface::init() //Init PPP-specific stuff, create the right bindings, etc @@ -86,15 +95,15 @@ int PPPIPInterface::setup(const char* user, const char* pw) cleanupLink(); - DBG("Sending %s", CONNECT_CMD); + DBG("Sending %s", m_connectCmd); - ret = m_pStream->write((uint8_t*)CONNECT_CMD, strlen(CONNECT_CMD), osWaitForever); + ret = m_pStream->write((uint8_t*)m_connectCmd, strlen(m_connectCmd), osWaitForever); if( ret != OK ) { return NET_UNKNOWN; } - DBG("Expect %s", EXPECTED_RESP); + DBG("Expect %s", m_expectedResp); len = 0; size_t readLen; @@ -119,7 +128,7 @@ int PPPIPInterface::setup(const char* user, const char* pw) DBG("Got %s[len %d]", buf, len); int datarate = 0; - if( (sscanf( buf, EXPECTED_RESP_DATARATE, &datarate ) != 1) && (strcmp(EXPECTED_RESP, buf) != 0) ) + if( (sscanf(buf, m_expectedRespDatarate, &datarate ) != 1) && (strcmp(m_expectedResp, buf) != 0) ) { //Discard buffer do //Clear buf diff --git a/libraries/net/VodafoneUSBModem/ip/PPPIPInterface.h b/libraries/net/cellular/CellularModem/ip/PPPIPInterface.h similarity index 90% rename from libraries/net/VodafoneUSBModem/ip/PPPIPInterface.h rename to libraries/net/cellular/CellularModem/ip/PPPIPInterface.h index ef1518a749..eba30e9461 100644 --- a/libraries/net/VodafoneUSBModem/ip/PPPIPInterface.h +++ b/libraries/net/cellular/CellularModem/ip/PPPIPInterface.h @@ -31,13 +31,16 @@ class Semaphore; } using namespace rtos; +#define DEFAULT_MSISDN_GSM "*99#" +#define DEFAULT_MSISDN_CDMA "#777" + /** Interface using PPP to connect to an IP-based network * */ class PPPIPInterface : public LwIPInterface { public: - PPPIPInterface(IOStream* pStream); + PPPIPInterface(IOStream* pStream, const char* msisdn); virtual ~PPPIPInterface(); int init(); //Init PPP-specific stuff, create the right bindings, etc @@ -60,6 +63,10 @@ private: friend u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len); friend u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len); friend void sio_read_abort(sio_fd_t fd); + + char* m_connectCmd; + char* m_expectedResp; + char* m_expectedRespDatarate; }; #endif /* PPPIPINTERFACE_H_ */ diff --git a/libraries/net/VodafoneUSBModem/link/LinkMonitor.cpp b/libraries/net/cellular/CellularModem/link/LinkMonitor.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/link/LinkMonitor.cpp rename to libraries/net/cellular/CellularModem/link/LinkMonitor.cpp diff --git a/libraries/net/VodafoneUSBModem/link/LinkMonitor.h b/libraries/net/cellular/CellularModem/link/LinkMonitor.h similarity index 100% rename from libraries/net/VodafoneUSBModem/link/LinkMonitor.h rename to libraries/net/cellular/CellularModem/link/LinkMonitor.h diff --git a/libraries/net/VodafoneUSBModem/lwipopts_conf.h b/libraries/net/cellular/CellularModem/lwipopts_conf.h similarity index 99% rename from libraries/net/VodafoneUSBModem/lwipopts_conf.h rename to libraries/net/cellular/CellularModem/lwipopts_conf.h index 065dd79190..5cd84be875 100644 --- a/libraries/net/VodafoneUSBModem/lwipopts_conf.h +++ b/libraries/net/cellular/CellularModem/lwipopts_conf.h @@ -23,3 +23,4 @@ #define LWIP_TRANSPORT_PPP 1 #endif /* LWIPOPTS_CONF_H_ */ + diff --git a/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.cpp b/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.cpp new file mode 100644 index 0000000000..c1a87550b0 --- /dev/null +++ b/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.cpp @@ -0,0 +1,348 @@ +/* CDMASMSInterface.cpp */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "CDMASMSInterface.cpp" +#endif + +#include "core/fwk.h" + +#include "CDMASMSInterface.h" + +#include +#include + +#define DEFAULT_TIMEOUT 10000 + +CDMASMSInterface::CDMASMSInterface(ATCommandsInterface* pIf) : m_pIf(pIf), m_msg(NULL), m_maxMsgLength(0), m_msisdn(NULL) +{ +} + +int CDMASMSInterface::init() +{ + m_state = SMS_IDLE; + + DBG("Get number of messages in the different inboxes"); + int ret = updateInbox(); + if(ret) + { + return NET_PROTOCOL; + } + + DBG("Initialization done"); + return OK; +} + +int CDMASMSInterface::send(const char* number, const char* message) +{ + if( strlen(number) > 16 ) + { + return NET_INVALID; //Number too long + } + + int ret; + + //Prepare infos + m_state = SMS_SEND_CMD_SENT; + + bool intlNumber=(number[0]=='+'); //If the number starts with the + sign, replace it with 011 instead (int'l dialing code in the US) + + DBG("Send SM"); + //Send command + char cmd[32+strlen(message)]; + std::sprintf(cmd, "AT!SSMS=0,%s%s,,\"%s\"",intlNumber?"011":"", intlNumber?(number+1):number, message); //Send with normal priority + ret = m_pIf->execute(cmd, this, NULL, DEFAULT_TIMEOUT); + + if(ret != OK) + { + WARN("ret %d", ret); + m_state = SMS_IDLE; + return NET_PROTOCOL; + } + + DBG("Check status"); + m_txState = SMS_PENDING; + + int tries = 10; + while(tries--) + { + m_state = SMS_GET_TX_STATUS_CMD_SENT; + ret = m_pIf->execute("AT!SSMS?", this, NULL, DEFAULT_TIMEOUT); + if(ret) + { + m_state = SMS_IDLE; + return ret; + } + m_state = SMS_IDLE; + if(m_txState == SMS_PENDING) //Wait more + { + Thread::wait(1000); + continue; + } + else if(m_txState == SMS_FAILED) + { + ERR("The modem could not send the SM"); + return NET_CONN; //Probably a conenction issue, the user can retry + } + else + { + break; + } + } + if(!tries) + { + ERR("The is still trying to send the SM"); + return NET_TIMEOUT; + } + return OK; +} + + +int CDMASMSInterface::get(char* number, char* message, size_t maxLength) +{ + if( maxLength < 1 ) + { + return NET_INVALID; //Buffer too short + } + + int ret; + + DBG("Get next message"); + if( (m_msgInListsCount[0] + m_msgInListsCount[1] + m_msgInListsCount[2]) == 0) + { + DBG("Message list count is 0 and needs updating. Running updateInbox."); + ret = updateInbox(); + if (ret) + { + return ret; + } + } + + if( (m_msgInListsCount[0] + m_msgInListsCount[1] + m_msgInListsCount[2]) == 0) + { + DBG("Message list count is 0"); + return NET_EMPTY; //No message to read + } + + //Determine which index to use : 3 (read), then 1 (urgent), then 2 (regular) + int index; + if(m_msgInListsCount[2]) + { + index = 3; + } + else if(m_msgInListsCount[0]) + { + index = 1; + } + else //if(m_msgInListsCount[1]) + { + index = 2; + } + + //Prepare infos + m_state = SMS_GET_CMD_SENT; + m_msisdn = (char*) number; + m_msg = (char*) message; + m_maxMsgLength = maxLength; + m_headersToRead = 3; + + m_msisdn[0] = '\0'; + + DBG("Get SMS"); + //Read command + char cmd[32]; + std::sprintf(cmd, "AT!GSMS?%d,1", index); //1 is the oldest message + ret = m_pIf->execute(cmd, this, NULL, DEFAULT_TIMEOUT); + if( ret != OK ) + { + WARN("AT!GSMS returned %d", ret); + m_state = SMS_IDLE; + return NET_PROTOCOL; + } + + //If message is not read, it will be put at the end of the read list + int item; + if( index != 3 ) + { + //Decrement count in relevant list + m_msgInListsCount[index-1]--; + //Increment count in read list + m_msgInListsCount[3-1]++; + item = m_msgInListsCount[3-1]; + //Normally item should be equal to 1 as we'd have read any older messages first + if( item != 1 ) + { + WARN("Still some older messages pending in the read inbox"); + } + } + else + { + //The item is still the oldest one + item = 1; + } + + DBG("Deleting message"); + //Delete message from inbox + std::sprintf(cmd, "AT!DSMS=3"/*,%d", item*/); //FIXME why doesn't that work when specifying the index?? + ret = m_pIf->executeSimple(cmd, NULL, DEFAULT_TIMEOUT); + if(ret != OK) + { + ERR("Could not delete message"); + } + else + { + //Now we can decrease the number of read messages + m_msgInListsCount[3-1]--; + } + + if (m_state != SMS_CMD_PROCESSED) + { + WARN("Message could not be retrieved properly"); + m_state = SMS_IDLE; + return NET_EMPTY; + } + + m_state = SMS_IDLE; + + return OK; +} + + +int CDMASMSInterface::getCount(size_t* pCount) +{ + int ret = updateInbox(); + if(ret) + { + return NET_PROTOCOL; + } + + *pCount = m_msgInListsCount[0] + m_msgInListsCount[1] + m_msgInListsCount[2]; //Urgent messages + regular messages + read messages + + return OK; +} + + +/*virtual*/ int CDMASMSInterface::onNewATResponseLine(ATCommandsInterface* pInst, const char* line) +{ + if(m_state == SMS_SEND_CMD_SENT) + { + DBG("SMS Send: %s", line); + } + else if(m_state == SMS_GET_TX_STATUS_CMD_SENT) + { + if(!strcmp(line, "sent")) + { + m_txState = SMS_SENT; + m_state = SMS_CMD_PROCESSED; + } + else if(!strcmp(line, "failed")) + { + m_txState = SMS_FAILED; + m_state = SMS_CMD_PROCESSED; + } + else if(!strcmp(line, "none")) + { + m_txState = SMS_NONE; + m_state = SMS_CMD_PROCESSED; + } + else if(!strcmp(line, "pending")) + { + m_txState = SMS_PENDING; + m_state = SMS_CMD_PROCESSED; + } + } + else if(m_state == SMS_GET_CMD_SENT) + { + DBG("Header: %s", line); + + if(m_msisdn[0]=='\0') + { + sscanf(line, "From: %16s", m_msisdn); + } + + m_headersToRead--; + + if(m_headersToRead==0) //End of headers + { + if(m_msisdn[0]!='\0') //Checks that the incoming number has been retrieved + { + m_state = SMS_GET_HDR_RECEIVED; + } + else + { + m_state = SMS_IDLE; //Error, signal it + } + } + } + else if(m_state == SMS_GET_HDR_RECEIVED) + { + DBG("Message: %s", line); + size_t cpyLen = MIN( std::strlen(line), m_maxMsgLength - 1 ); + std::memcpy( m_msg, line, cpyLen ); + m_msg[cpyLen] = '\0'; + m_state = SMS_CMD_PROCESSED; + } + else if(m_state == SMS_GET_COUNT_CMD_SENT) + { + DBG("Inbox: %s", line); + int index; + size_t count; + if((strlen(line) > 16) && sscanf(line + 16, "{Index = %d}: %d", &index, &count) == 2) + { + if((index > 0) && (index <=4)) + { + m_msgInListsCount[index-1] = count; + } + if(index == 4) + { + m_state = SMS_CMD_PROCESSED; + } + } + } + return OK; +} + +/*virtual*/ int CDMASMSInterface::onNewEntryPrompt(ATCommandsInterface* pInst) +{ + return OK; +} + + +int CDMASMSInterface::updateInbox() +{ + //Get number of unread/read messages + + DBG("Updating inbox"); + m_msgInListsCount[0] = m_msgInListsCount[1] = m_msgInListsCount[2] = m_msgInListsCount[3] = 0; //Reset counts + + //Get counts + m_state = SMS_GET_COUNT_CMD_SENT; + int ret = m_pIf->execute("AT!CNTSMS", this, NULL, DEFAULT_TIMEOUT); + if( ret != OK ) + { + WARN("AT!CNTSMS returned %d", ret); + m_msgInListsCount[0] = m_msgInListsCount[1] = m_msgInListsCount[2] = m_msgInListsCount[3] = 0; //Invalidate counts + m_state = SMS_IDLE; + return NET_PROTOCOL; + } + + return OK; +} + diff --git a/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.h b/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.h new file mode 100644 index 0000000000..6aa4557c36 --- /dev/null +++ b/libraries/net/cellular/CellularModem/sms/CDMASMSInterface.h @@ -0,0 +1,90 @@ +/* SMSInterface.h */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef CDMASMSINTERFACE_H_ +#define CDMASMSINTERFACE_H_ + +#include "SMSInterface.h" + +#define MAX_SM 8 + +/** Component to use the Short Messages Service (SMS) + * + */ +class CDMASMSInterface : public ISMSInterface, protected IATCommandsProcessor +{ +public: + /** Create SMSInterface instance + @param pIf Pointer to the ATCommandsInterface instance to use + */ + CDMASMSInterface(ATCommandsInterface* pIf); + + /** Initialize interface + Configure SMS commands & register for SMS-related unsolicited result codes + */ + virtual int init(); + + /** Send a SM + @param number The receiver's phone number + @param message The message to send + @return 0 on success, error code on failure + */ + virtual int send(const char* number, const char* message); + + + /** Receive a SM + @param number Pointer to a buffer to store the sender's phone number (must be at least 17 characters-long, including the space for the null-terminating char) + @param message Pointer to a buffer to store the the incoming message + @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) + @return 0 on success, error code on failure + */ + virtual int get(char* number, char* message, size_t maxLength); + + + /** Get the number of SMs in the incoming box + @param pCount pointer to store the number of unprocessed SMs on + @return 0 on success, error code on failure + */ + virtual int getCount(size_t* pCount); + +protected: + //IATCommandsProcessor + virtual int onNewATResponseLine(ATCommandsInterface* pInst, const char* line); + virtual int onNewEntryPrompt(ATCommandsInterface* pInst); + + int updateInbox(); //Update messages count in the different inboxes + +private: + ATCommandsInterface* m_pIf; + + //Current message + char* m_msg; + size_t m_maxMsgLength; + char* m_msisdn; + + //Messages list + size_t m_msgInListsCount[4]; //4 lists + + size_t m_headersToRead; + + enum { SMS_NONE, SMS_SENT, SMS_PENDING, SMS_FAILED } m_txState; + enum { SMS_IDLE, SMS_SEND_CMD_SENT, SMS_GET_TX_STATUS_CMD_SENT, SMS_GET_CMD_SENT, SMS_GET_HDR_RECEIVED, SMS_GET_COUNT_CMD_SENT, SMS_CMD_PROCESSED } m_state; +}; + +#endif /* CDMASMSINTERFACE_H_ */ diff --git a/libraries/net/VodafoneUSBModem/sms/SMSInterface.cpp b/libraries/net/cellular/CellularModem/sms/GSMSMSInterface.cpp similarity index 88% rename from libraries/net/VodafoneUSBModem/sms/SMSInterface.cpp rename to libraries/net/cellular/CellularModem/sms/GSMSMSInterface.cpp index 33a33a0bcc..2ed50ad126 100644 --- a/libraries/net/VodafoneUSBModem/sms/SMSInterface.cpp +++ b/libraries/net/cellular/CellularModem/sms/GSMSMSInterface.cpp @@ -1,4 +1,4 @@ -/* SMSInterface.cpp */ +/* GSMSMSInterface.cpp */ /* Copyright (C) 2012 mbed.org, MIT License * * Permission is hereby granted, free of charge, to any person obtaining a copy of this software @@ -19,24 +19,24 @@ #define __DEBUG__ 2 #ifndef __MODULE__ -#define __MODULE__ "SMSInterface.cpp" +#define __MODULE__ "GSMSMSInterface.cpp" #endif #include "core/fwk.h" -#include "SMSInterface.h" +#include "GSMSMSInterface.h" #include #include #define DEFAULT_TIMEOUT 10000 -SMSInterface::SMSInterface(ATCommandsInterface* pIf) : m_pIf(pIf), m_msg(NULL), m_maxMsgLength(0), m_msisdn(NULL) +GSMSMSInterface::GSMSMSInterface(ATCommandsInterface* pIf) : m_pIf(pIf), m_msg(NULL), m_maxMsgLength(0), m_msisdn(NULL) { m_pIf->registerEventsHandler(this); //Add us to the unsolicited result codes handlers } -int SMSInterface::init() +int GSMSMSInterface::init() { m_msgRefListCount = 0; m_needsUpdate = true; @@ -75,7 +75,7 @@ int SMSInterface::init() return OK; } -int SMSInterface::send(const char* number, const char* message) +int GSMSMSInterface::send(const char* number, const char* message) { if( strlen(number) > 16 ) { @@ -107,7 +107,7 @@ int SMSInterface::send(const char* number, const char* message) } -int SMSInterface::get(char* number, char* message, size_t maxLength) +int GSMSMSInterface::get(char* number, char* message, size_t maxLength) { if( maxLength < 1 ) { @@ -197,7 +197,7 @@ int SMSInterface::get(char* number, char* message, size_t maxLength) } -int SMSInterface::getCount(size_t* pCount) +int GSMSMSInterface::getCount(size_t* pCount) { int ret; @@ -219,7 +219,7 @@ int SMSInterface::getCount(size_t* pCount) } -/*virtual*/ int SMSInterface::onNewATResponseLine(ATCommandsInterface* pInst, const char* line) +/*virtual*/ int GSMSMSInterface::onNewATResponseLine(ATCommandsInterface* pInst, const char* line) { if(m_state == SMS_SEND_CMD_SENT) { @@ -269,7 +269,7 @@ int SMSInterface::getCount(size_t* pCount) return OK; } -/*virtual*/ int SMSInterface::onNewEntryPrompt(ATCommandsInterface* pInst) +/*virtual*/ int GSMSMSInterface::onNewEntryPrompt(ATCommandsInterface* pInst) { if(m_state == SMS_SEND_CMD_SENT) { @@ -316,7 +316,7 @@ int SMSInterface::getCount(size_t* pCount) return OK; } -/*virtual*/ bool SMSInterface::isATCodeHandled(const char* atCode) //Is this AT code handled +/*virtual*/ bool GSMSMSInterface::isATCodeHandled(const char* atCode) //Is this AT code handled { DBG("AT code is %s", atCode); if( strcmp("+CMTI", atCode) == 0 ) @@ -328,27 +328,27 @@ int SMSInterface::getCount(size_t* pCount) return false; } -/*virtual*/ void SMSInterface::onDispatchStart() +/*virtual*/ void GSMSMSInterface::onDispatchStart() { } -/*virtual*/ void SMSInterface::onDispatchStop() +/*virtual*/ void GSMSMSInterface::onDispatchStop() { } -/*virtual*/ char* SMSInterface::getEventsEnableCommand() +/*virtual*/ char* GSMSMSInterface::getEventsEnableCommand() { return "AT+CNMI=2,1,0,0,0"; } -/*virtual*/ char* SMSInterface::getEventsDisableCommand() +/*virtual*/ char* GSMSMSInterface::getEventsDisableCommand() { return "AT+CNMI=0,0,0,0,0"; //Indications will be buffered within the modem and flushed back when the former command is executed } -/*virtual*/ void SMSInterface::onEvent(const char* atCode, const char* evt) +/*virtual*/ void GSMSMSInterface::onEvent(const char* atCode, const char* evt) { if( strcmp("+CMTI", atCode) != 0 ) { @@ -359,7 +359,8 @@ int SMSInterface::getCount(size_t* pCount) //Get index int msgRef; - if( std::sscanf(evt, "\"SM\",%d", &msgRef) == 1 ) + if(( std::sscanf(evt, "\"SM\",%d", &msgRef) == 1 ) || + ( std::sscanf(evt, "\"ME\",%d", &msgRef) == 1 )) { DBG("Adding message to list (ref %d)", msgRef); if(m_inboxMtx.trylock()) @@ -380,7 +381,7 @@ int SMSInterface::getCount(size_t* pCount) } } -int SMSInterface::updateInbox() +int GSMSMSInterface::updateInbox() { //Get memory indexes of unread messages diff --git a/libraries/net/VodafoneUSBModem/sms/SMSInterface.h b/libraries/net/cellular/CellularModem/sms/GSMSMSInterface.h similarity index 87% rename from libraries/net/VodafoneUSBModem/sms/SMSInterface.h rename to libraries/net/cellular/CellularModem/sms/GSMSMSInterface.h index b2b5c5e6bc..446a73e518 100644 --- a/libraries/net/VodafoneUSBModem/sms/SMSInterface.h +++ b/libraries/net/cellular/CellularModem/sms/GSMSMSInterface.h @@ -17,39 +17,33 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#ifndef SMSINTERFACE_H_ -#define SMSINTERFACE_H_ +#ifndef GSMSMSINTERFACE_H_ +#define GSMSMSINTERFACE_H_ -#include "core/fwk.h" - -#include "rtos.h" - -#include "at/ATCommandsInterface.h" - -#define MAX_SM 8 +#include "SMSInterface.h" /** Component to use the Short Messages Service (SMS) * */ -class SMSInterface : protected IATCommandsProcessor, IATEventsHandler +class GSMSMSInterface : public ISMSInterface, protected IATCommandsProcessor, IATEventsHandler { public: /** Create SMSInterface instance @param pIf Pointer to the ATCommandsInterface instance to use */ - SMSInterface(ATCommandsInterface* pIf); + GSMSMSInterface(ATCommandsInterface* pIf); /** Initialize interface Configure SMS commands & register for SMS-related unsolicited result codes */ - int init(); + virtual int init(); /** Send a SM @param number The receiver's phone number @param message The message to send @return 0 on success, error code on failure */ - int send(const char* number, const char* message); + virtual int send(const char* number, const char* message); /** Receive a SM @@ -58,14 +52,14 @@ public: @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) @return 0 on success, error code on failure */ - int get(char* number, char* message, size_t maxLength); + virtual int get(char* number, char* message, size_t maxLength); /** Get the number of SMs in the incoming box @param pCount pointer to store the number of unprocessed SMs on @return 0 on success, error code on failure */ - int getCount(size_t* pCount); + virtual int getCount(size_t* pCount); protected: //IATCommandsProcessor @@ -100,4 +94,4 @@ private: enum { SMS_IDLE, SMS_SEND_CMD_SENT, SMS_GET_CMD_SENT, SMS_GET_HDR_RECEIVED, SMS_GET_COUNT_CMD_SENT, SMS_GET_COUNT_HDR_RECEIVED, SMS_CMD_PROCESSED } m_state; }; -#endif /* SMSINTERFACE_H_ */ +#endif /* GSMSMSINTERFACE_H_ */ diff --git a/libraries/net/cellular/CellularModem/sms/SMSInterface.h b/libraries/net/cellular/CellularModem/sms/SMSInterface.h new file mode 100644 index 0000000000..df226709d1 --- /dev/null +++ b/libraries/net/cellular/CellularModem/sms/SMSInterface.h @@ -0,0 +1,67 @@ +/* SMSInterface.h */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef ISMSINTERFACE_H_ +#define ISMSINTERFACE_H_ + +#include "core/fwk.h" + +#include "rtos.h" + +#include "at/ATCommandsInterface.h" + +#define MAX_SM 8 + +/** Component to use the Short Messages Service (SMS) + * + */ +class ISMSInterface +{ +public: + /** Initialize interface + Configure SMS commands & register for SMS-related unsolicited result codes + */ + virtual int init() = 0; + + + /** Send a SM + @param number The receiver's phone number + @param message The message to send + @return 0 on success, error code on failure + */ + virtual int send(const char* number, const char* message) = 0; + + + /** Receive a SM + @param number Pointer to a buffer to store the sender's phone number (must be at least 17 characters-long, including the space for the null-terminating char) + @param message Pointer to a buffer to store the the incoming message + @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) + @return 0 on success, error code on failure + */ + virtual int get(char* number, char* message, size_t maxLength) = 0; + + + /** Get the number of SMs in the incoming box + @param pCount pointer to store the number of unprocessed SMs on + @return 0 on success, error code on failure + */ + virtual int getCount(size_t* pCount) = 0; +}; + +#endif /* ISMSINTERFACE_H_ */ diff --git a/libraries/net/VodafoneUSBModem/ussd/USSDInterface.cpp b/libraries/net/cellular/CellularModem/ussd/USSDInterface.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/ussd/USSDInterface.cpp rename to libraries/net/cellular/CellularModem/ussd/USSDInterface.cpp diff --git a/libraries/net/VodafoneUSBModem/ussd/USSDInterface.h b/libraries/net/cellular/CellularModem/ussd/USSDInterface.h similarity index 100% rename from libraries/net/VodafoneUSBModem/ussd/USSDInterface.h rename to libraries/net/cellular/CellularModem/ussd/USSDInterface.h diff --git a/libraries/net/VodafoneUSBModem/serial/usb/USBSerialStream.cpp b/libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.cpp similarity index 100% rename from libraries/net/VodafoneUSBModem/serial/usb/USBSerialStream.cpp rename to libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.cpp diff --git a/libraries/net/VodafoneUSBModem/serial/usb/USBSerialStream.h b/libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.h similarity index 96% rename from libraries/net/VodafoneUSBModem/serial/usb/USBSerialStream.h rename to libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.h index 0b11dbdc9a..1af5f019db 100644 --- a/libraries/net/VodafoneUSBModem/serial/usb/USBSerialStream.h +++ b/libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.h @@ -23,8 +23,8 @@ #include "core/fwk.h" -#include "USB3GModule/IUSBHostSerial.h" -#include "USB3GModule/IUSBHostSerialListener.h" +#include "USBHost3GModule/IUSBHostSerial.h" +#include "USBHost3GModule/IUSBHostSerialListener.h" #include "rtos.h" #include "core/MtxCircBuffer.h" diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp new file mode 100644 index 0000000000..4ec89d10e5 --- /dev/null +++ b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp @@ -0,0 +1,110 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#define __DEBUG__ 4 +#ifndef __MODULE__ +#define __MODULE__ "UbloxCDMAModemInitializer.cpp" +#endif + +#include "core/dbg.h" + +#include + +#include "UbloxCDMAModemInitializer.h" + +uint16_t UbloxCDMAModemInitializer::getMSDVid() +{ + return 0x05C6; +} +uint16_t UbloxCDMAModemInitializer::getMSDPid() +{ + return 0x0000; //No MSD mode (presumably) +} + +uint16_t UbloxCDMAModemInitializer::getSerialVid() +{ + return 0x05C6; +} +uint16_t UbloxCDMAModemInitializer::getSerialPid() +{ + return 0x9004; +} + +bool UbloxCDMAModemInitializer::switchMode(USBDeviceConnected* pDev) +{ + return true; +} + +int UbloxCDMAModemInitializer::getSerialPortCount() +{ + return 2; +} + +/*virtual*/ void UbloxCDMAModemInitializer::setVidPid(uint16_t vid, uint16_t pid) +{ + m_currentSerialIntf = 0; + m_currentEndpoint = 0; +} + +/*virtual*/ bool UbloxCDMAModemInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); + + if( intf_class == 0xFF ) { + if( m_currentSerialIntf == 0 || m_currentSerialIntf == 1) { + m_serialIntfMap[m_currentSerialIntf++] = intf_nb; + return true; + } + m_currentSerialIntf++; + } + + return false; +} + +/*virtual*/ bool UbloxCDMAModemInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + DBG("USBEndpoint on Interface #%d; Type:%d; Direction:%d Current %d", intf_nb, type, dir, m_currentEndpoint); + if(type == BULK_ENDPOINT) { + if( intf_nb == 1 || intf_nb == 0) { + m_currentEndpoint++; + return true; + } else { + m_currentEndpoint++; + } + } + + /* + if(type == INTERRUPT_ENDPOINT) { + if( intf_nb == 1) { + m_currentEndpoint++; + return true; + } else { + m_currentEndpoint++; + } + } + */ + + return false; +} + + +/*virtual*/ int UbloxCDMAModemInitializer::getType() +{ + return WAN_DONGLE_TYPE_UBLOXC200; +} + diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.h b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.h similarity index 57% rename from libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.h rename to libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.h index 24b9808863..cccec7f8ec 100644 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USB3GModule/WANDongle.h +++ b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.h @@ -16,62 +16,34 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#ifndef WANDONGLE_H -#define WANDONGLE_H +#ifndef UBLOXCDMAMODEMINITIALIZER_H +#define UBLOXCDMAMODEMINITIALIZER_H -#include "USBHost.h" -#include "IUSBHostSerial.h" +#include -#include "rtos.h" - -#include "WANDongleSerialPort.h" #include "WANDongleInitializer.h" +#include "USBHost.h" #include "IUSBEnumerator.h" -#define WANDONGLE_MAX_OUTEP_SIZE 64 -#define WANDONGLE_MAX_INEP_SIZE 64 +enum +{ + WAN_DONGLE_TYPE_UBLOXC200 +}; -#define WANDONGLE_MAX_SERIAL_PORTS 2 - -/** A class to use a WAN (3G/LTE) access dongle - * - */ -class WANDongle : public IUSBEnumerator { +class UbloxCDMAModemInitializer : public WANDongleInitializer +{ public: - /* - * Constructor - * - * @param rootdir mount name - */ - WANDongle(); - - /* - * Check if a serial port device is connected - * - * @return true if a serial device is connected - */ - bool connected(); + UbloxCDMAModemInitializer(USBHost* pHost); - /* - * Try to connect device - * - * * @return true if connection was successful - */ - bool tryConnect(); + virtual uint16_t getMSDVid(); + virtual uint16_t getMSDPid(); - /* - * Disconnect device - * - * * @return true if disconnection was successful - */ - bool disconnect(); - - WAN_DONGLE_TYPE getDongleType(); + virtual uint16_t getSerialVid(); + virtual uint16_t getSerialPid(); - IUSBHostSerial& getSerial(int index); - int getSerialCount(); + virtual bool switchMode(USBDeviceConnected* pDev); - //From IUSBEnumerator + virtual int getSerialPortCount(); virtual void setVidPid(uint16_t vid, uint16_t pid); @@ -79,17 +51,13 @@ public: virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used -protected: - USBHost * host; - USBDeviceConnected * dev; - bool dev_connected; + virtual int getType(); - WANDongleInitializer* m_pInitializer; +private: - void init(); - - WANDongleSerialPort m_serial[WANDONGLE_MAX_SERIAL_PORTS]; - int m_serialCount; + int m_currentSerialIntf; + int m_currentEndpoint; }; #endif + diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.cpp b/libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.cpp new file mode 100644 index 0000000000..a3a89313db --- /dev/null +++ b/libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.cpp @@ -0,0 +1,131 @@ +/* Copyright (c) 2010-2012 mbed.org, MIT License +* +* Permission is hereby granted, free of charge, to any person obtaining a copy of this software +* and associated documentation files (the "Software"), to deal in the Software without +* restriction, including without limitation the rights to use, copy, modify, merge, publish, +* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included in all copies or +* substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING +* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, +* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +#include "UbloxGSMModemInitializer.h" +#include "core/dbg.h" + +#define __DEBUG__ 0 +#ifndef __MODULE__ +#define __MODULE__ "UbloxGSMModemInitializer.cpp" +#endif + +//----------------------------------------------------------------------- +// mamm, u-blox Modem +//----------------------------------------------------------------------- + +UbloxGSMModemInitializer::UbloxGSMModemInitializer(USBHost* pHost) : WANDongleInitializer(pHost) +{ + +} + +uint16_t UbloxGSMModemInitializer::getMSDVid() { return 0x1546; } +uint16_t UbloxGSMModemInitializer::getMSDPid() { return 0x0000; } + +uint16_t UbloxGSMModemInitializer::getSerialVid() { return 0x1546; } +uint16_t UbloxGSMModemInitializer::getSerialPid() { return 0x1102; } + +bool UbloxGSMModemInitializer::switchMode(USBDeviceConnected* pDev) +{ + for (int i = 0; i < pDev->getNbIntf(); i++) + { + if (pDev->getInterface(i)->intf_class == MSD_CLASS) + { + USBEndpoint* pEp = pDev->getEndpoint(i, BULK_ENDPOINT, OUT); + if ( pEp != NULL ) + { + ERR("MSD descriptor found on device %p, intf %d", (void *)pDev, i); + } + } + } + return false; +} + +#define UBX_SERIALCOUNT 7 + +int UbloxGSMModemInitializer::getSerialPortCount() +{ + return UBX_SERIALCOUNT; +} + +/*virtual*/ void UbloxGSMModemInitializer::setVidPid(uint16_t vid, uint16_t pid) +{ + if( (vid == getSerialVid() ) && ( pid == getSerialPid() ) ) + { + m_hasSwitched = true; + m_currentSerialIntf = 0; + m_endpointsToFetch = UBX_SERIALCOUNT*2; + } + else + { + m_hasSwitched = false; + m_endpointsToFetch = 1; + } +} + +/*virtual*/ bool UbloxGSMModemInitializer::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed +{ + if( m_hasSwitched ) + { + DBG("Interface #%d; Class:%02x; SubClass:%02x; Protocol:%02x", intf_nb, intf_class, intf_subclass, intf_protocol); + if( intf_class == 0x0A ) + { + if( (m_currentSerialIntf == 0) || (m_currentSerialIntf == 1) ) + { + m_serialIntfMap[m_currentSerialIntf++] = intf_nb; + return true; + } + m_currentSerialIntf++; + } + } + else + { + if( (intf_nb == 0) && (intf_class == MSD_CLASS) ) + { + return true; + } + } + return false; +} + +/*virtual*/ bool UbloxGSMModemInitializer::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used +{ + if( m_hasSwitched ) + { + DBG("USBEndpoint on Interface #%d; Type:%d; Direction:%d", intf_nb, type, dir); + if( (type == BULK_ENDPOINT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + else + { + if( (type == BULK_ENDPOINT) && (dir == OUT) && m_endpointsToFetch ) + { + m_endpointsToFetch--; + return true; + } + } + return false; +} + +/*virtual*/ int UbloxGSMModemInitializer::getType() +{ + return WAN_DONGLE_TYPE_UBX; +} + diff --git a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/IUSBEnumerator.h b/libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.h similarity index 54% rename from libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/IUSBEnumerator.h rename to libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.h index 65c9e8be15..a1e9e038b4 100644 --- a/libraries/net/VodafoneUSBModem/USBHostWANDongle/USBHost/IUSBEnumerator.h +++ b/libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.h @@ -16,26 +16,48 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#ifndef IUSBENUMERATOR_H_ -#define IUSBENUMERATOR_H_ +#ifndef UBLOXGSMMODEMINITIALIZER_H +#define UBLOXGSNMODEMINITIALIZER_H -#include "stdint.h" - -#include "USBEndpoint.h" - -/* -Generic interface to implement for "smart" USB enumeration -*/ - -class IUSBEnumerator { -public: - - virtual void setVidPid(uint16_t vid, uint16_t pid) = 0; - - virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) = 0; //Must return true if the interface should be parsed - - virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) = 0; //Must return true if the endpoint will be used +#include "WANDongleInitializer.h" +enum +{ + WAN_DONGLE_TYPE_UBX }; -#endif /*IUSBENUMERATOR_H_*/ +//----------------------------------------------------------------------- +// mamm, u-blox Modem +//----------------------------------------------------------------------- + +class UbloxGSMModemInitializer : public WANDongleInitializer +{ +public: + UbloxGSMModemInitializer(USBHost* pHost); + + virtual uint16_t getMSDVid(); + virtual uint16_t getMSDPid(); + + virtual uint16_t getSerialVid(); + virtual uint16_t getSerialPid(); + + virtual bool switchMode(USBDeviceConnected* pDev); + + virtual int getSerialPortCount(); + + virtual void setVidPid(uint16_t vid, uint16_t pid); + + virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed + + virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used + + virtual int getType(); + +private: + + bool m_hasSwitched; + int m_currentSerialIntf; + int m_endpointsToFetch; +}; + +#endif diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.cpp b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.cpp new file mode 100644 index 0000000000..eb7be36fe6 --- /dev/null +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.cpp @@ -0,0 +1,398 @@ +/* UbloxUSBCDMAModem.cpp */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#define __DEBUG__ 4 +#ifndef __MODULE__ +#define __MODULE__ "UbloxUSBCDMAModem.cpp" +#endif + +#include "core/fwk.h" + +#include "UbloxUSBCDMAModem.h" +#include "UbloxCDMAModemInitializer.h" +#include "USBHost.h" + +#define USE_ONE_PORT 1 + +UbloxUSBCDMAModem::UbloxUSBCDMAModem(PinName powerGatingPin /*= NC*/, bool powerGatingOnWhenPinHigh /* = true*/, int serial /* 0 */) : m_dongle(), +m_stream(m_dongle.getSerial(serial)), +m_at(&m_stream), +m_sms(&m_at), m_ppp(&m_stream, DEFAULT_MSISDN_CDMA), +m_dongleConnected(false), m_ipInit(false), m_smsInit(false), m_atOpen(false), +m_powerGatingPin(powerGatingPin), m_powerGatingOnWhenPinHigh(powerGatingOnWhenPinHigh) +{ + USBHost* host = USBHost::getHostInst(); + m_dongle.addInitializer(new UbloxCDMAModemInitializer(host)); + if( m_powerGatingPin != NC ) + { + power(false); //Dongle will have to be powered on manually + } +} + +class CSSProcessor : public IATCommandsProcessor +{ +public: + CSSProcessor() : status(STATUS_REGISTERING) + { + + } + enum REGISTERING_STATUS { STATUS_REGISTERING, STATUS_OK }; + REGISTERING_STATUS getStatus() + { + return status; + } +private: + virtual int onNewATResponseLine(ATCommandsInterface* pInst, const char* line) + { + char b; + char bc[3] = ""; + int sid = 99999; + + //if( sscanf(line, "%*d, %c", &r) == 1 ) + if(sscanf(line, "%*s %c,%2s,%d", &b,bc,&sid)==3) + { + if(strcmp("Z", bc) == 0) + status = STATUS_REGISTERING; + else + status = STATUS_OK; + } + return OK; + } + virtual int onNewEntryPrompt(ATCommandsInterface* pInst) + { + return OK; + } + volatile REGISTERING_STATUS status; +}; + +int UbloxUSBCDMAModem::connect(const char* apn, const char* user, const char* password) +{ + if( !m_ipInit ) + { + m_ipInit = true; + m_ppp.init(); + } + m_ppp.setup(user, password); + + int ret = init(); + if(ret) + { + return ret; + } + + #if USE_ONE_PORT + m_smsInit = false; //SMS status reset + //m_ussdInit = false; //USSD status reset + //m_linkMonitorInit = false; //Link monitor status reset + #endif + + ATCommandsInterface::ATResult result; + + if(apn != NULL) + { + char cmd[48]; + sprintf(cmd, "AT+CGDCONT=1,\"IP\",\"%s\"", apn); + ret = m_at.executeSimple(cmd, &result); + DBG("Result of command: Err code=%d", ret); + DBG("ATResult: AT return=%d (code %d)", result.result, result.code); + DBG("APN set to %s", apn); + } + + + //Connect + DBG("Connecting"); + #if USE_ONE_PORT + m_at.close(); // Closing AT parser + m_atOpen = false; //Will need to be reinitialized afterwards + #endif + + DBG("Connecting PPP"); + + ret = m_ppp.connect(); + DBG("Result of connect: Err code=%d", ret); + return ret; +} + + +int UbloxUSBCDMAModem::disconnect() +{ + DBG("Disconnecting from PPP"); + int ret = m_ppp.disconnect(); + if(ret) + { + ERR("Disconnect returned %d, still trying to disconnect", ret); + } + + //Ugly but leave dongle time to recover + Thread::wait(500); + + #if USE_ONE_PORT + ATCommandsInterface::ATResult result; + DBG("Starting AT thread"); + ret = m_at.open(); + if(ret) + { + return ret; + } + #endif + + DBG("Trying to hangup"); + + #if 0 //Does not appear to work + int tries = 10; + do + { + ret = m_at.executeSimple("+++", &result, 1000); + DBG("Result of command: Err code=%d\n", ret); + DBG("ATResult: AT return=%d (code %d)\n", result.result, result.code); + } while(tries-- && ret); + if(!ret) + { + ret = m_at.executeSimple("ATH", &result); + DBG("Result of command: Err code=%d\n", ret); + DBG("ATResult: AT return=%d (code %d)\n", result.result, result.code); + } + #endif + + #if USE_ONE_PORT + //Reinit AT parser + ret = m_at.init(); + DBG("Result of command: Err code=%d\n", ret); + if(ret) + { + m_at.close(); // Closing AT parser + DBG("AT Parser closed, could not complete disconnection"); + return NET_TIMEOUT; + } + + #if 0 + m_at.close(); // Closing AT parser + DBG("AT Parser closed"); + #endif + #endif + return OK; +} + +int UbloxUSBCDMAModem::sendSM(const char* number, const char* message) +{ + int ret = init(); + if(ret) + { + return ret; + } + + if(!m_smsInit) + { + ret = m_sms.init(); + if(ret) + { + return ret; + } + m_smsInit = true; + } + + ret = m_sms.send(number, message); + if(ret) + { + return ret; + } + + return OK; +} + +int UbloxUSBCDMAModem::getSM(char* number, char* message, size_t maxLength) +{ + int ret = init(); + if(ret) + { + return ret; + } + + if(!m_smsInit) + { + ret = m_sms.init(); + if(ret) + { + return ret; + } + m_smsInit = true; + } + + ret = m_sms.get(number, message, maxLength); + if(ret) + { + return ret; + } + + return OK; +} + +int UbloxUSBCDMAModem::getSMCount(size_t* pCount) +{ + int ret = init(); + if(ret) + { + return ret; + } + + if(!m_smsInit) + { + ret = m_sms.init(); + if(ret) + { + return ret; + } + m_smsInit = true; + } + + ret = m_sms.getCount(pCount); + if(ret) + { + return ret; + } + + return OK; +} + +ATCommandsInterface* UbloxUSBCDMAModem::getATCommandsInterface() +{ + return &m_at; +} + +int UbloxUSBCDMAModem::power(bool enable) +{ + if( m_powerGatingPin == NC ) + { + return NET_INVALID; //A pin name has not been provided in the constructor + } + + if(!enable) //Will force components to re-init + { + cleanup(); + } + + DigitalOut powerGatingOut(m_powerGatingPin); + powerGatingOut = m_powerGatingOnWhenPinHigh?enable:!enable; + + return OK; +} + +bool UbloxUSBCDMAModem::power() +{ + if( m_powerGatingPin == NC ) + { + return true; //Assume power is always on + } + + DigitalOut powerGatingOut(m_powerGatingPin); + return m_powerGatingOnWhenPinHigh?powerGatingOut:!powerGatingOut; +} + +int UbloxUSBCDMAModem::init() +{ + if( !m_dongleConnected ) + { + if(!power()) + { + //Obviously cannot initialize the dongle if it is disconnected... + ERR("Power is off"); + return NET_INVALID; + } + m_dongleConnected = true; + while( !m_dongle.connected() ) + { + m_dongle.tryConnect(); + Thread::wait(100); + } + } + + if(m_atOpen) + { + return OK; + } + + DBG("Starting AT thread if needed"); + int ret = m_at.open(); + if(ret) + { + return ret; + } + + DBG("Sending initialisation commands"); + ret = m_at.init(); + if(ret) + { + return ret; + } + + if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOXC200) + { + INFO("Using a UBLOX C200 Dongle"); + } + else + { + WARN("Using an Unknown Dongle"); + } + + ATCommandsInterface::ATResult result; + + //Wait for network registration + CSSProcessor cssProcessor; + do + { + DBG("Waiting for network registration"); + ret = m_at.execute("AT+CSS?", &cssProcessor, &result); + DBG("Result of command: Err code=%d\n", ret); + DBG("ATResult: AT return=%d (code %d)\n", result.result, result.code); + if(cssProcessor.getStatus() == CSSProcessor::STATUS_REGISTERING) + { + Thread::wait(3000); + } + } while(cssProcessor.getStatus() == CSSProcessor::STATUS_REGISTERING); + + m_atOpen = true; + + return OK; +} + +int UbloxUSBCDMAModem::cleanup() +{ + if(m_ppp.isConnected()) + { + WARN("Data connection is still open"); //Try to encourage good behaviour from the user + m_ppp.disconnect(); + } + + m_smsInit = false; +// m_linkMonitorInit = false; + //We don't reset m_ipInit as PPPIPInterface::init() only needs to be called once + + if(m_atOpen) + { + m_at.close(); + m_atOpen = false; + } + + m_dongle.disconnect(); + m_dongleConnected = false; + + return OK; +} + + diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h new file mode 100644 index 0000000000..d9e4f3133c --- /dev/null +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h @@ -0,0 +1,117 @@ +/* UbloxUSBCDMAModem.h */ +/* Copyright (C) 2012 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef UBLOXUSBCDMAMODEM_H_ +#define UBLOXUSBCDMAMODEM_H_ + +#include "core/fwk.h" + +#include "WANDongle.h" +#include "at/ATCommandsInterface.h" +#include "USBSerialStream.h" +#include "ip/PPPIPInterface.h" +#include "sms/CDMASMSInterface.h" + +/** u-blox LISA-C200 modem + */ +class UbloxUSBCDMAModem +{ +public: + /** Create Sprint USB Modem (Sierra Wireless 598U) API instance + @param powerGatingPin Optional pin commanding a power gating transistor on the modem's power line + @param powerGatingOnWhenPinHigh true if the pin needs to be high to power the dongle, defaults to true + */ + UbloxUSBCDMAModem(PinName powerGatingPin = NC, bool powerGatingOnWhenPinHigh = true, int serial = 0); + + //Internet-related functions + + /** Open a 3G internet connection + @return 0 on success, error code on failure + */ + int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL); + + /** Close the internet connection + @return 0 on success, error code on failure + */ + int disconnect(); + + + /** Send a SM + @param number The receiver's phone number + @param message The message to send + @return 0 on success, error code on failure + */ + int sendSM(const char* number, const char* message); + + + /** Receive a SM + @param number Pointer to a buffer to store the sender's phone number (must be at least 17 characters-long, including the sapce for the null-terminating char) + @param message Pointer to a buffer to store the the incoming message + @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) + @return 0 on success, error code on failure + */ + int getSM(char* number, char* message, size_t maxLength); + + /** Get the number of SMs in the incoming box + @param pCount pointer to store the number of unprocessed SMs on + @return 0 on success, error code on failure + */ + int getSMCount(size_t* pCount); + + /** Get the ATCommandsInterface instance + @return Pointer to the ATCommandsInterface instance + */ + ATCommandsInterface* getATCommandsInterface(); + + /** Switch power on or off + In order to use this function, a pin name must have been entered in the constructor + @param enable true to switch the dongle on, false to switch it off + @return 0 on success, error code on failure + */ + int power(bool enable); + +protected: + bool power(); + + int init(); + int cleanup(); + +private: + WANDongle m_dongle; + + USBSerialStream m_stream; + + ATCommandsInterface m_at; + + CDMASMSInterface m_sms; + + PPPIPInterface m_ppp; + + bool m_dongleConnected; + bool m_ipInit; + bool m_smsInit; + bool m_atOpen; + + PinName m_powerGatingPin; + bool m_powerGatingOnWhenPinHigh; +}; + + +#endif /* UBLOXUSBCDMAMODEM_H_ */ + diff --git a/libraries/net/VodafoneUSBModem/VodafoneUSBModem.cpp b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.cpp similarity index 77% rename from libraries/net/VodafoneUSBModem/VodafoneUSBModem.cpp rename to libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.cpp index 0b7b31c595..56ceacc63e 100644 --- a/libraries/net/VodafoneUSBModem/VodafoneUSBModem.cpp +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.cpp @@ -1,4 +1,4 @@ -/* VodafoneUSBModem.cpp */ +/* UbloxUSBGSMModem.cpp */ /* Copyright (C) 2012 mbed.org, MIT License * * Permission is hereby granted, free of charge, to any person obtaining a copy of this software @@ -19,31 +19,35 @@ #define __DEBUG__ 3 #ifndef __MODULE__ -#define __MODULE__ "VodafoneUSBModem.cpp" +#define __MODULE__ "UbloxUSBGSMModem.cpp" #endif #include "core/fwk.h" -#include "VodafoneUSBModem.h" +#include "UbloxUSBGSMModem.h" +#include "UbloxGSMModemInitializer.h" +#include "USBHost.h" -VodafoneUSBModem::VodafoneUSBModem(PinName powerGatingPin /*= NC*/, bool powerGatingOnWhenPinHigh /* = true*/) : - m_dongle(), // Construct WANDongle: USB interface with two serial channels to the modem (USBSerialStream objects) - m_atStream(m_dongle.getSerial(1)), // AT commands are sent down one serial channel. - m_pppStream(m_dongle.getSerial(0)), // PPP connections are managed via another serial channel. - m_at(&m_atStream), // Construct ATCommandsInterface with the AT serial channel - m_sms(&m_at), // Construct SMSInterface with the ATCommandsInterface - m_ussd(&m_at), // Construct USSDInterface with the ATCommandsInterface - m_linkMonitor(&m_at), // Construct LinkMonitor with the ATCommandsInterface - m_ppp(&m_pppStream), // Construct PPPIPInterface with the PPP serial channel - m_dongleConnected(false), // Dongle is initially not ready for anything - m_ipInit(false), // PPIPInterface connection is initially down - m_smsInit(false), // SMSInterface starts un-initialised - m_ussdInit(false), // USSDInterface starts un-initialised - m_linkMonitorInit(false), // LinkMonitor subsystem starts un-initialised - m_atOpen(false), // ATCommandsInterface starts in a closed state - m_powerGatingPin(powerGatingPin), // set power gating pin +UbloxUSBGSMModem::UbloxUSBGSMModem(PinName powerGatingPin /*= NC*/, bool powerGatingOnWhenPinHigh /* = true*/) : + m_dongle(), // Construct WANDongle: USB interface with two serial channels to the modem (USBSerialStream objects) + m_atStream(m_dongle.getSerial(1)), // AT commands are sent down one serial channel. + m_pppStream(m_dongle.getSerial(0)), // PPP connections are managed via another serial channel. + m_at(&m_atStream), // Construct ATCommandsInterface with the AT serial channel + m_sms(&m_at), // Construct SMSInterface with the ATCommandsInterface + m_ussd(&m_at), // Construct USSDInterface with the ATCommandsInterface + m_linkMonitor(&m_at), // Construct LinkMonitor with the ATCommandsInterface + m_ppp(&m_pppStream, DEFAULT_MSISDN_GSM), // Construct PPPIPInterface with the PPP serial channel + m_dongleConnected(false), // Dongle is initially not ready for anything + m_ipInit(false), // PPIPInterface connection is initially down + m_smsInit(false), // SMSInterface starts un-initialised + m_ussdInit(false), // USSDInterface starts un-initialised + m_linkMonitorInit(false), // LinkMonitor subsystem starts un-initialised + m_atOpen(false), // ATCommandsInterface starts in a closed state + m_powerGatingPin(powerGatingPin), // set power gating pin m_powerGatingOnWhenPinHigh(powerGatingOnWhenPinHigh) // set state semantics for power gating pin { + USBHost* host = USBHost::getHostInst(); + m_dongle.addInitializer(new UbloxGSMModemInitializer(host)); if( m_powerGatingPin != NC ) { power(false); //Dongle will have to be powered on manually @@ -174,7 +178,7 @@ private: }; #endif -int VodafoneUSBModem::connect(const char* apn, const char* user, const char* password) +int UbloxUSBGSMModem::connect(const char* apn, const char* user, const char* password) { if( !m_ipInit ) { @@ -273,7 +277,7 @@ int VodafoneUSBModem::connect(const char* apn, const char* user, const char* pas } -int VodafoneUSBModem::disconnect() +int UbloxUSBGSMModem::disconnect() { DBG("Disconnecting from PPP"); int ret = m_ppp.disconnect(); @@ -332,7 +336,7 @@ int VodafoneUSBModem::disconnect() return OK; } -int VodafoneUSBModem::sendSM(const char* number, const char* message) +int UbloxUSBGSMModem::sendSM(const char* number, const char* message) { int ret = init(); if(ret) @@ -359,7 +363,7 @@ int VodafoneUSBModem::sendSM(const char* number, const char* message) return OK; } -int VodafoneUSBModem::getSM(char* number, char* message, size_t maxLength) +int UbloxUSBGSMModem::getSM(char* number, char* message, size_t maxLength) { int ret = init(); if(ret) @@ -386,7 +390,7 @@ int VodafoneUSBModem::getSM(char* number, char* message, size_t maxLength) return OK; } -int VodafoneUSBModem::getSMCount(size_t* pCount) +int UbloxUSBGSMModem::getSMCount(size_t* pCount) { int ret = init(); if(ret) @@ -413,7 +417,7 @@ int VodafoneUSBModem::getSMCount(size_t* pCount) return OK; } -int VodafoneUSBModem::sendUSSD(const char* command, char* result, size_t maxLength) +int UbloxUSBGSMModem::sendUSSD(const char* command, char* result, size_t maxLength) { int ret = init(); if(ret) @@ -440,7 +444,7 @@ int VodafoneUSBModem::sendUSSD(const char* command, char* result, size_t maxLeng return OK; } -int VodafoneUSBModem::getLinkState(int* pRssi, LinkMonitor::REGISTRATION_STATE* pRegistrationState, LinkMonitor::BEARER* pBearer) +int UbloxUSBGSMModem::getLinkState(int* pRssi, LinkMonitor::REGISTRATION_STATE* pRegistrationState, LinkMonitor::BEARER* pBearer) { int ret = init(); if(ret) @@ -468,12 +472,12 @@ int VodafoneUSBModem::getLinkState(int* pRssi, LinkMonitor::REGISTRATION_STATE* } -ATCommandsInterface* VodafoneUSBModem::getATCommandsInterface() +ATCommandsInterface* UbloxUSBGSMModem::getATCommandsInterface() { return &m_at; } -int VodafoneUSBModem::power(bool enable) +int UbloxUSBGSMModem::power(bool enable) { if( m_powerGatingPin == NC ) { @@ -491,7 +495,7 @@ int VodafoneUSBModem::power(bool enable) return OK; } -bool VodafoneUSBModem::power() +bool UbloxUSBGSMModem::power() { if( m_powerGatingPin == NC ) { @@ -502,7 +506,7 @@ bool VodafoneUSBModem::power() return m_powerGatingOnWhenPinHigh?powerGatingOut:!powerGatingOut; } -int VodafoneUSBModem::init() +int UbloxUSBGSMModem::init() { if( !m_dongleConnected ) { @@ -539,38 +543,9 @@ int VodafoneUSBModem::init() return ret; } - if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_VODAFONEK3770) + if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBX) { - INFO("Using a Vodafone K3770 Dongle"); - #if USE_ONE_PORT - DBG("Configuring unsolicited result codes support properly"); - //Configuring port to enable 3GPP-compliant unsollicited response codes but disable Huawei-specific unsollicited response codes - ret = m_at.executeSimple("AT^CURC=0;^PORTSEL=1", NULL); //Huawei-specific, not 3GPP-compliant - if(ret != OK) - { - return NET_PROTOCOL; - } - #else - //Configuring port to disable Huawei-specific unsollicited response codes - ret = m_at.executeSimple("AT^CURC=0", NULL); //Huawei-specific, not 3GPP-compliant - if(ret != OK) - { - return NET_PROTOCOL; - } - #endif - } - else if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_VODAFONEK3772Z) - { - INFO("Using a Vodafone K3772-Z Dongle"); - //FIXME this returns %USBMODEM: [0] MODEM DRIVEROK which is not a compliant response - /* - //Configuring modem to directly boot into modem mode - ret = m_at.executeSimple("AT%USBMODEM=0", NULL); //Icera-specific, not 3GPP-compliant - if(ret != OK) - { - return NET_PROTOCOL; - } - */ + INFO("Using a u-blox LISA-U"); } else { @@ -603,7 +578,7 @@ int VodafoneUSBModem::init() return OK; } -int VodafoneUSBModem::cleanup() +int UbloxUSBGSMModem::cleanup() { if(m_ppp.isConnected()) { diff --git a/libraries/net/VodafoneUSBModem/VodafoneUSBModem.h b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h similarity index 94% rename from libraries/net/VodafoneUSBModem/VodafoneUSBModem.h rename to libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h index c93d027884..73cc2d0041 100644 --- a/libraries/net/VodafoneUSBModem/VodafoneUSBModem.h +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h @@ -17,8 +17,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#ifndef VODAFONEUSBMODEM_H_ -#define VODAFONEUSBMODEM_H_ +#ifndef UBLOXUSBGSMMODEM_H_ +#define UBLOXUSBGSMMODEM_H_ #include "core/fwk.h" @@ -26,20 +26,20 @@ #include "at/ATCommandsInterface.h" #include "serial/usb/USBSerialStream.h" #include "ip/PPPIPInterface.h" -#include "sms/SMSInterface.h" +#include "sms/GSMSMSInterface.h" #include "ussd/USSDInterface.h" #include "link/LinkMonitor.h" -/** Vodafone USB Modem (K3770/K3772-Z) dongle +/** u-blox WCDMA modem (LISA-U200) */ -class VodafoneUSBModem +class UbloxUSBGSMModem { public: - /** Create Vodafone USB Modem (K3770/K3772-Z) dongle API instance + /** Create u-blox API instance @param powerGatingPin Optional pin commanding a power gating transistor on the modem's power line @param powerGatingOnWhenPinHigh true if the pin needs to be high to power the dongle, defaults to true */ - VodafoneUSBModem(PinName powerGatingPin = NC, bool powerGatingOnWhenPinHigh = true); + UbloxUSBGSMModem(PinName powerGatingPin = NC, bool powerGatingOnWhenPinHigh = true); //Internet-related functions @@ -133,7 +133,7 @@ private: ATCommandsInterface m_at; //< Interface to AT commands processing - SMSInterface m_sms; //< Interface to SMS manager (send/receive etc) + GSMSMSInterface m_sms; //< Interface to SMS manager (send/receive etc) USSDInterface m_ussd; //< Interface to USSD manager (send etc) LinkMonitor m_linkMonitor; //< Interface to link monitor (RSSI) @@ -151,4 +151,4 @@ private: }; -#endif /* VODAFONEUSBMODEM_H_ */ +#endif /* UBLOXMODEM_H_ */ diff --git a/workspace_tools/build.py b/workspace_tools/build.py index d57b54c819..0f9593a3bf 100644 --- a/workspace_tools/build.py +++ b/workspace_tools/build.py @@ -42,8 +42,6 @@ if __name__ == '__main__': default=False, help="Compile the rtos") parser.add_option("-e", "--eth", action="store_true", dest="eth", default=False, help="Compile the ethernet library") - parser.add_option("-V", "--vodafone", action="store_true", dest="vodafone", - default=False, help="Compile the Vodafone library") parser.add_option("-U", "--usb_host", action="store_true", dest="usb_host", default=False, help="Compile the USB Host library") parser.add_option("-u", "--usb", action="store_true", dest="usb", @@ -52,6 +50,8 @@ if __name__ == '__main__': default=False, help="Compile the DSP library") parser.add_option("-v", "--verbose", action="store_true", dest="verbose", default=False, help="Verbose diagnostic output") + parser.add_option("-b", "--ublox", action="store_true", dest="ublox", + default=False, help="Compile the u-blox library") (options, args) = parser.parse_args() # Get target list @@ -74,14 +74,14 @@ if __name__ == '__main__': libraries.extend(["rtx", "rtos"]) if options.eth: libraries.append("eth") - if options.vodafone: - libraries.append("vodafone") if options.usb: libraries.append("usb") if options.usb_host: libraries.append("usb_host") if options.dsp: libraries.extend(["cmsis_dsp", "dsp"]) + if options.ublox: + libraries.extend(["rtx", "rtos", "usb_host", "ublox"]) # Build failures = [] diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py index 5770718129..ea9598f98b 100644 --- a/workspace_tools/build_api.py +++ b/workspace_tools/build_api.py @@ -112,6 +112,7 @@ def build_library(src_paths, build_path, target, toolchain_name, # Copy Headers for resource in resources: toolchain.copy_files(resource.headers, build_path, rel_path=resource.base_path) + dependencies_include_dir.extend(toolchain.scan_resources(build_path).inc_dirs) # Compile Sources objects = [] diff --git a/workspace_tools/libraries.py b/workspace_tools/libraries.py index 915f80e531..1eca5e1413 100644 --- a/workspace_tools/libraries.py +++ b/workspace_tools/libraries.py @@ -70,16 +70,16 @@ LIBRARIES = [ "id": "eth", "source_dir": [ETH_SOURCES, LWIP_SOURCES], "build_dir": ETH_LIBRARY, - "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_SOURCES, LWIP_SOURCES], + "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES] }, { - "id": "vodafone", - "source_dir": [VODAFONE_SOURCES, LWIP_SOURCES], - "build_dir": VODAFONE_LIBRARY, - "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, VODAFONE_SOURCES, LWIP_SOURCES], - "supported": CORTEX_ARM_SUPPORT + "id": "ublox", + "source_dir": [UBLOX_SOURCES, CELLULAR_SOURCES, CELLULAR_USB_SOURCES, LWIP_SOURCES], + "build_dir": UBLOX_LIBRARY, + "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES], }, + ] diff --git a/workspace_tools/paths.py b/workspace_tools/paths.py index 94341a9ba4..57e0e0c95d 100644 --- a/workspace_tools/paths.py +++ b/workspace_tools/paths.py @@ -55,10 +55,14 @@ NET = join(LIB_DIR, "net") ETH_SOURCES = join(NET, "eth") LWIP_SOURCES = join(NET, "lwip") VODAFONE_SOURCES = join(NET, "VodafoneUSBModem") +CELLULAR_SOURCES = join(NET, "cellular", "CellularModem") +CELLULAR_USB_SOURCES = join(NET, "cellular", "CellularUSBModem") +UBLOX_SOURCES = join(NET, "cellular", "UbloxUSBModem") NET_LIBRARIES = join(BUILD_DIR, "net") ETH_LIBRARY = join(NET_LIBRARIES, "eth") VODAFONE_LIBRARY = join(NET_LIBRARIES, "VodafoneUSBModem") +UBLOX_LIBRARY = join(NET_LIBRARIES, "UbloxUSBModem") # FS FS_PATH = join(LIB_DIR, "fs") From ce17e728910c83f5989ef8aa5f55e7ec32b69dfd Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 13:12:05 +0300 Subject: [PATCH 033/117] Added cellular modem libs to sync script --- workspace_tools/synch.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/workspace_tools/synch.py b/workspace_tools/synch.py index afe6ae6a02..51cf81a16e 100644 --- a/workspace_tools/synch.py +++ b/workspace_tools/synch.py @@ -58,6 +58,10 @@ OFFICIAL_CODE = ( ("USBDevice", "USBDevice"), ("USBHost" , "USBHost"), + + ("CellularModem", "net/cellular/CellularModem"), + ("CellularUSBModem", "net/cellular/CellularUSBModem"), + ("UbloxUSBModem", "net/cellular/UbloxUSBModem"), ) From 87fbaa5507d0cd706a25a00412999496a008cc63 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 13:52:34 +0300 Subject: [PATCH 034/117] Added missing constructor for CDMA modem initializer --- .../net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp index 4ec89d10e5..d0a1e52c99 100644 --- a/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp +++ b/libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp @@ -27,6 +27,10 @@ #include "UbloxCDMAModemInitializer.h" +UbloxCDMAModemInitializer::UbloxCDMAModemInitializer(USBHost* pHost) : WANDongleInitializer(pHost) +{ +} + uint16_t UbloxCDMAModemInitializer::getMSDVid() { return 0x05C6; From a34945661d36c1f0f64c4d4b5689d8a800e32778 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 15:40:46 +0300 Subject: [PATCH 035/117] Added CellularModem as an abstract base class for modem implementations Now both UbloxUSBGSMModem and UbloxUSBCDMAModem inherit from CellularModem. --- .../cellular/CellularModem/CellularModem.h | 78 +++++++++++++++++++ .../UbloxUSBModem/UbloxUSBCDMAModem.h | 17 ++-- .../cellular/UbloxUSBModem/UbloxUSBGSMModem.h | 17 ++-- 3 files changed, 96 insertions(+), 16 deletions(-) create mode 100644 libraries/net/cellular/CellularModem/CellularModem.h diff --git a/libraries/net/cellular/CellularModem/CellularModem.h b/libraries/net/cellular/CellularModem/CellularModem.h new file mode 100644 index 0000000000..fd47622c86 --- /dev/null +++ b/libraries/net/cellular/CellularModem/CellularModem.h @@ -0,0 +1,78 @@ +/* CellularModem.h */ +/* Copyright (C) 2013 mbed.org, MIT License + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of this software + * and associated documentation files (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, publish, distribute, + * sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING + * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef CELLULARMODEM_H_ +#define CELLULARMODEM_H_ + +#include "core/fwk.h" +#include "at/ATCommandsInterface.h" + +class CellularModem +{ +public: + //Internet-related functions + + /** Open a 3G internet connection + @return 0 on success, error code on failure + */ + virtual int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL) = 0; + + /** Close the internet connection + @return 0 on success, error code on failure + */ + virtual int disconnect() = 0; + + + /** Send a SM + @param number The receiver's phone number + @param message The message to send + @return 0 on success, error code on failure + */ + virtual int sendSM(const char* number, const char* message) = 0; + + + /** Receive a SM + @param number Pointer to a buffer to store the sender's phone number (must be at least 17 characters-long, including the sapce for the null-terminating char) + @param message Pointer to a buffer to store the the incoming message + @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) + @return 0 on success, error code on failure + */ + virtual int getSM(char* number, char* message, size_t maxLength) = 0; + + /** Get the number of SMs in the incoming box + @param pCount pointer to store the number of unprocessed SMs on + @return 0 on success, error code on failure + */ + virtual int getSMCount(size_t* pCount) = 0; + + /** Get the ATCommandsInterface instance + @return Pointer to the ATCommandsInterface instance + */ + virtual ATCommandsInterface* getATCommandsInterface() = 0; + + /** Switch power on or off + In order to use this function, a pin name must have been entered in the constructor + @param enable true to switch the dongle on, false to switch it off + @return 0 on success, error code on failure + */ + virtual int power(bool enable) = 0; +}; + + +#endif /* CELLULARMODEM_H_ */ diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h index d9e4f3133c..988afb29ad 100644 --- a/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.h @@ -27,10 +27,11 @@ #include "USBSerialStream.h" #include "ip/PPPIPInterface.h" #include "sms/CDMASMSInterface.h" +#include "CellularModem.h" /** u-blox LISA-C200 modem */ -class UbloxUSBCDMAModem +class UbloxUSBCDMAModem: public CellularModem { public: /** Create Sprint USB Modem (Sierra Wireless 598U) API instance @@ -44,12 +45,12 @@ public: /** Open a 3G internet connection @return 0 on success, error code on failure */ - int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL); + virtual int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL); /** Close the internet connection @return 0 on success, error code on failure */ - int disconnect(); + virtual int disconnect(); /** Send a SM @@ -57,7 +58,7 @@ public: @param message The message to send @return 0 on success, error code on failure */ - int sendSM(const char* number, const char* message); + virtual int sendSM(const char* number, const char* message); /** Receive a SM @@ -66,25 +67,25 @@ public: @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) @return 0 on success, error code on failure */ - int getSM(char* number, char* message, size_t maxLength); + virtual int getSM(char* number, char* message, size_t maxLength); /** Get the number of SMs in the incoming box @param pCount pointer to store the number of unprocessed SMs on @return 0 on success, error code on failure */ - int getSMCount(size_t* pCount); + virtual int getSMCount(size_t* pCount); /** Get the ATCommandsInterface instance @return Pointer to the ATCommandsInterface instance */ - ATCommandsInterface* getATCommandsInterface(); + virtual ATCommandsInterface* getATCommandsInterface(); /** Switch power on or off In order to use this function, a pin name must have been entered in the constructor @param enable true to switch the dongle on, false to switch it off @return 0 on success, error code on failure */ - int power(bool enable); + virtual int power(bool enable); protected: bool power(); diff --git a/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h index 73cc2d0041..2cc432a2c2 100644 --- a/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h +++ b/libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.h @@ -29,10 +29,11 @@ #include "sms/GSMSMSInterface.h" #include "ussd/USSDInterface.h" #include "link/LinkMonitor.h" +#include "CellularModem.h" /** u-blox WCDMA modem (LISA-U200) */ -class UbloxUSBGSMModem +class UbloxUSBGSMModem: public CellularModem { public: /** Create u-blox API instance @@ -46,12 +47,12 @@ public: /** Open a 3G internet connection @return 0 on success, error code on failure */ - int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL); + virtual int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL); /** Close the internet connection @return 0 on success, error code on failure */ - int disconnect(); + virtual int disconnect(); /** Send a SM @@ -59,7 +60,7 @@ public: @param message The message to send @return 0 on success, error code on failure */ - int sendSM(const char* number, const char* message); + virtual int sendSM(const char* number, const char* message); /** Receive a SM @@ -68,13 +69,13 @@ public: @param maxLength Maximum message length that can be stored in buffer (including null-terminating character) @return 0 on success, error code on failure */ - int getSM(char* number, char* message, size_t maxLength); + virtual int getSM(char* number, char* message, size_t maxLength); /** Get the number of SMs in the incoming box @param pCount pointer to store the number of unprocessed SMs on @return 0 on success, error code on failure */ - int getSMCount(size_t* pCount); + virtual int getSMCount(size_t* pCount); /** Send a USSD command & wait for its result @param command The command to send @@ -95,14 +96,14 @@ public: /** Get the ATCommandsInterface instance @return Pointer to the ATCommandsInterface instance */ - ATCommandsInterface* getATCommandsInterface(); + virtual ATCommandsInterface* getATCommandsInterface(); /** Switch power on or off In order to use this function, a pin name must have been entered in the constructor @param enable true to switch the dongle on, false to switch it off @return 0 on success, error code on failure */ - int power(bool enable); + virtual int power(bool enable); protected: bool power(); //< Turn power to USB dongle ON. From bdf5d03ba1a5ecf5c467c48736b60bb48bd5abb6 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 17 Oct 2013 18:19:07 +0300 Subject: [PATCH 036/117] Updated tests - Vodafone tests are gone for now - Added u-blox TCP test (UB_1) and SMS test (UB_2). - tests can now have more than a single source directory --- .../http/common}/HTTPClient/HTTPClient.cpp | 0 .../http/common}/HTTPClient/HTTPClient.h | 0 .../http/common}/HTTPClient/IHTTPData.h | 0 .../http/common}/HTTPClient/data/HTTPMap.cpp | 0 .../http/common}/HTTPClient/data/HTTPMap.h | 0 .../http/common}/HTTPClient/data/HTTPText.cpp | 0 .../http/common}/HTTPClient/data/HTTPText.h | 0 .../http/common/httptest.cpp} | 20 ++- .../tests/net/cellular/http/common/httptest.h | 9 ++ .../net/cellular/http/ubloxusbgsm/main.cpp | 25 ++++ .../tests/net/cellular/sms/common/smstest.cpp | 38 +++++ .../tests/net/cellular/sms/common/smstest.h | 9 ++ .../net/cellular/sms/ubloxusbgsm/main.cpp | 10 ++ .../net/vodafone/USSD_SMS_HelloWorld/main.cpp | 138 ------------------ workspace_tools/build_api.py | 11 +- workspace_tools/tests.py | 17 ++- 16 files changed, 116 insertions(+), 161 deletions(-) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/HTTPClient.cpp (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/HTTPClient.h (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/IHTTPData.h (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/data/HTTPMap.cpp (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/data/HTTPMap.h (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/data/HTTPText.cpp (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld => cellular/http/common}/HTTPClient/data/HTTPText.h (100%) rename libraries/tests/net/{vodafone/HTTPClient_HelloWorld/main.cpp => cellular/http/common/httptest.cpp} (74%) create mode 100644 libraries/tests/net/cellular/http/common/httptest.h create mode 100644 libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp create mode 100644 libraries/tests/net/cellular/sms/common/smstest.cpp create mode 100644 libraries/tests/net/cellular/sms/common/smstest.h create mode 100644 libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp delete mode 100644 libraries/tests/net/vodafone/USSD_SMS_HelloWorld/main.cpp diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/HTTPClient.cpp b/libraries/tests/net/cellular/http/common/HTTPClient/HTTPClient.cpp similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/HTTPClient.cpp rename to libraries/tests/net/cellular/http/common/HTTPClient/HTTPClient.cpp diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/HTTPClient.h b/libraries/tests/net/cellular/http/common/HTTPClient/HTTPClient.h similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/HTTPClient.h rename to libraries/tests/net/cellular/http/common/HTTPClient/HTTPClient.h diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/IHTTPData.h b/libraries/tests/net/cellular/http/common/HTTPClient/IHTTPData.h similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/IHTTPData.h rename to libraries/tests/net/cellular/http/common/HTTPClient/IHTTPData.h diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPMap.cpp b/libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPMap.cpp similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPMap.cpp rename to libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPMap.cpp diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPMap.h b/libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPMap.h similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPMap.h rename to libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPMap.h diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPText.cpp b/libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPText.cpp similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPText.cpp rename to libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPText.cpp diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPText.h b/libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPText.h similarity index 100% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/HTTPClient/data/HTTPText.h rename to libraries/tests/net/cellular/http/common/HTTPClient/data/HTTPText.h diff --git a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/main.cpp b/libraries/tests/net/cellular/http/common/httptest.cpp similarity index 74% rename from libraries/tests/net/vodafone/HTTPClient_HelloWorld/main.cpp rename to libraries/tests/net/cellular/http/common/httptest.cpp index cc8aabdc99..379b7e234f 100644 --- a/libraries/tests/net/vodafone/HTTPClient_HelloWorld/main.cpp +++ b/libraries/tests/net/cellular/http/common/httptest.cpp @@ -1,21 +1,20 @@ #include "mbed.h" -#include "VodafoneUSBModem.h" +#include "CellularModem.h" #include "HTTPClient.h" -#include "test_env.h" +#include "httptest.h" -int main() +int httptest(CellularModem& modem, const char* apn, const char* username, const char* password) { printf("Connecting...\n"); - VodafoneUSBModem modem; HTTPClient http; char str[512]; - int ret = modem.connect("internet", "web", "web"); + int ret = modem.connect(apn, username, password); if(ret) { printf("Could not connect\n"); - notify_completion(false); //Blocks indefinitely + return false; } //GET data @@ -30,7 +29,7 @@ int main() { printf("Error - ret = %d - HTTP return code = %d\n", ret, http.getHTTPResponseCode()); modem.disconnect(); - notify_completion(false); //Blocks indefinitely + return false; } //POST data @@ -49,10 +48,9 @@ int main() { printf("Error - ret = %d - HTTP return code = %d\n", ret, http.getHTTPResponseCode()); modem.disconnect(); - notify_completion(false); //Blocks indefinitely + return false; } - modem.disconnect(); - - notify_completion(true); //Blocks indefinitely + modem.disconnect(); + return true; } diff --git a/libraries/tests/net/cellular/http/common/httptest.h b/libraries/tests/net/cellular/http/common/httptest.h new file mode 100644 index 0000000000..affd6d23be --- /dev/null +++ b/libraries/tests/net/cellular/http/common/httptest.h @@ -0,0 +1,9 @@ +#ifndef HTTPTEST_H_ +#define HTTPTEST_H_ + +#include "CellularModem.h" + +int httptest(CellularModem& modem, const char* apn = NULL, const char* username = NULL, const char* password= NULL); + +#endif + diff --git a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp new file mode 100644 index 0000000000..145c9949d8 --- /dev/null +++ b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp @@ -0,0 +1,25 @@ +#include "UBloxUSBGSMModem.h" +#include "test_env.h" +#include "httptest.h" + +#ifndef MODEM_APN +#warning APN not specified, using "internet" +#define APN "internet" +#endif + +#ifndef MODEM_USERNAME +#warning username not specified +#define USERNAME NULL +#endif + +#ifndef MODEM_PASSWORD +#warning password not specified +#define PASSWORD NULL +#endif + +int main() +{ + UbloxUSBGSMModem modem; + + notify_completion(httptest(modem, APN, USERNAME, PASSWORD)); +} diff --git a/libraries/tests/net/cellular/sms/common/smstest.cpp b/libraries/tests/net/cellular/sms/common/smstest.cpp new file mode 100644 index 0000000000..0aa66bda49 --- /dev/null +++ b/libraries/tests/net/cellular/sms/common/smstest.cpp @@ -0,0 +1,38 @@ +#include "CellularModem.h" +#include "smstest.h" + +void smstest(CellularModem& modem) +{ +#ifdef DESTINATION_NUMBER + modem.sendSM(DESINATION_NUMBER, "Hello from mbed:)"); +#endif + + while(true) + { + char num[17]; + char msg[64]; + size_t count; + int ret = modem.getSMCount(&count); + if(ret) + { + printf("getSMCount returned %d\n", ret); + Thread::wait(3000); + continue; + } + if( count > 0) + { + printf("%d SMS to read\n", count); + ret = modem.getSM(num, msg, 64); + if(ret) + { + printf("getSM returned %d\n", ret); + Thread::wait(3000); + continue; + } + + printf("%s : %s\n", num, msg); + } + Thread::wait(3000); + } +} + diff --git a/libraries/tests/net/cellular/sms/common/smstest.h b/libraries/tests/net/cellular/sms/common/smstest.h new file mode 100644 index 0000000000..0d1ea80fc7 --- /dev/null +++ b/libraries/tests/net/cellular/sms/common/smstest.h @@ -0,0 +1,9 @@ +#ifndef SMSTEST_H_ +#define SMSTEST_H_ + +#include "CellularModem.h" + +void smstest(CellularModem&); + +#endif + diff --git a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp new file mode 100644 index 0000000000..4a15d11ef6 --- /dev/null +++ b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp @@ -0,0 +1,10 @@ +#include "UBloxUSBGSMModem.h" +#include "smstest.h" + +int main() +{ + UbloxUSBGSMModem modem; + + smstest(modem); +} + diff --git a/libraries/tests/net/vodafone/USSD_SMS_HelloWorld/main.cpp b/libraries/tests/net/vodafone/USSD_SMS_HelloWorld/main.cpp deleted file mode 100644 index 30aafb2df5..0000000000 --- a/libraries/tests/net/vodafone/USSD_SMS_HelloWorld/main.cpp +++ /dev/null @@ -1,138 +0,0 @@ -#include "mbed.h" -#include "VodafoneUSBModem.h" -#include "test_env.h" - -bool compare_msisdn(char* remote_msisdn, char* local_msisdn) -{ - if( !memcmp(remote_msisdn, "+44", 3) ) //Conver to local number - { - remote_msisdn += 2; - remote_msisdn[0] = '0'; - } - if( !memcmp(local_msisdn, "+44", 3) ) //Conver to local number - { - local_msisdn += 2; - local_msisdn[0] = '0'; - } - return !strcmp(remote_msisdn, local_msisdn); -} - -bool run(VodafoneUSBModem& modem) -{ - char local_msisdn[32]; - char remote_msisdn[32]; - char local_msg[192]; - char remote_msg[192]; - - int ret; - //Clear SMS inbox - size_t count; - do - { - ret = modem.getSMCount(&count); - if(ret) - { - return false; - } - if(count) - { - //Fetch SMS - ret = modem.getSM(remote_msisdn, remote_msg, 192); - if(ret) - { - return false; - } - } - } while(count); - - //Now get MSISDN using USSD - ret = modem.sendUSSD("*#100#", local_msisdn, 32); - if(ret) - { - return false; - } - - printf("Local MSISDN is %s\n", local_msisdn); - - //Makeup a random text message (32 uppper case letters) - for(int i = 0; i < 32; i++) - { - local_msg[i] = 'A' + (rand() % 26); //This is pseudo-random only, but we don't really care anyway - } - local_msg[32] = '\0'; //Terminate string - - printf("Sending '%s'\n", local_msg); - - //Send SM - ret = modem.sendSM(local_msisdn, local_msg); - if(ret) - { - return false; - } - - //Now wait for corresponding message for 15s max - Timer t; - t.start(); - do - { - ret = modem.getSMCount(&count); - if(ret) - { - return false; - } - if(count) - { - //Fetch SM - ret = modem.getSM(remote_msisdn, remote_msg, 192); - if(ret) - { - return false; - } - - printf("Received '%s' from %s\n", remote_msg, remote_msisdn); - - if( compare_msisdn(remote_msisdn, local_msisdn) && !strcmp(remote_msg, local_msg) ) - { - break; - } - } - if(t.read_ms() > 15000) - { - return false; - } - Thread::wait(500); - } while(true); - - //Success :) - return true; -} - -void test(void const*) -{ - VodafoneUSBModem modem; - bool test = run(modem); - if(test) - { - printf("Test successful\n"); - notify_completion(true); - } - else - { - printf("Test failed\n"); - notify_completion(false); - } - //notify_completion() blocks indefinitely -} - -int main() -{ - Thread testTask(test, NULL, osPriorityNormal, 1024 * 5); - DigitalOut led(LED1); - while(1) - { - led=!led; - Thread::wait(1000); - } - - return 0; -} diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py index ea9598f98b..e965435d17 100644 --- a/workspace_tools/build_api.py +++ b/workspace_tools/build_api.py @@ -31,14 +31,17 @@ def build_project(src_path, build_path, target, toolchain_name, toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, notify) toolchain.VERBOSE = verbose toolchain.build_all = clean - + + src_paths = [src_path] if type(src_path) != ListType else src_path if name is None: - name = basename(src_path) + name = basename(src_paths[0]) toolchain.info("\n>>> BUILD PROJECT: %s (%s, %s)" % (name.upper(), target.name, toolchain_name)) # Scan src_path and libraries_paths for resources - resources = toolchain.scan_resources(src_path) - src_paths = [src_path] + resources = toolchain.scan_resources(src_paths[0]) + for path in src_paths[1:]: + print "PATH:", path + resources.add(toolchain.scan_resources(path)) if libraries_paths is not None: src_paths.extend(libraries_paths) for path in libraries_paths: diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py index cd4faec329..dc3009d6a6 100644 --- a/workspace_tools/tests.py +++ b/workspace_tools/tests.py @@ -565,20 +565,21 @@ TESTS = [ "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, ETH_LIBRARY], }, - # Vodafone tests + # u-blox tests { - "id": "VF_1", "description": "HTTP client", - "source_dir": join(TEST_DIR, "net", "vodafone", "HTTPClient_HelloWorld"), - "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, VODAFONE_LIBRARY, TEST_MBED_LIB], + "id": "UB_1", "description": "u-blox USB GSM modem: HTTP client", + "source_dir": [join(TEST_DIR, "net", "cellular", "http", "ubloxusbgsm"), join(TEST_DIR, "net", "cellular", "http", "common")], + "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], "supported": CORTEX_ARM_SUPPORT, + "automated": True, }, { - "id": "VF_2", "description": "USSD & SMS Test", - "source_dir": join(TEST_DIR, "net", "vodafone", "USSD_SMS_HelloWorld"), - "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, VODAFONE_LIBRARY, TEST_MBED_LIB], + "id": "UB_2", "description": "u-blox USB GSM modem: SMS test", + "source_dir": [join(TEST_DIR, "net", "cellular", "sms", "ubloxusbgsm"), join(TEST_DIR, "net", "cellular", "sms", "common")], + "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], "supported": CORTEX_ARM_SUPPORT, }, - + # USB Tests { "id": "USB_1", "description": "Mouse", From d9ed7aba77d34e9ae9ed28783032e37a65bceeaf Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Thu, 17 Oct 2013 19:32:40 +0200 Subject: [PATCH 037/117] CMSIS KL46 files (were KL25 renamed) --- .../TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h | 2107 +++++++++++++++-- .../TARGET_KL46Z/system_MKL46Z4.c | 46 +- .../TARGET_KL46Z/system_MKL46Z4.h | 24 +- .../TARGET_Freescale/TARGET_KL46Z/objects.h | 2 +- .../TARGET_KL46Z/serial_api.c | 6 +- .../TARGET_Freescale/TARGET_KL46Z/spi_api.c | 56 +- 6 files changed, 1964 insertions(+), 277 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h index 560a973b7c..60588932d3 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/MKL46Z4.h @@ -1,35 +1,41 @@ /* ** ################################################################### -** Processor: MKL46Z128VLK4 +** Processors: MKL46Z256VLH4 +** MKL46Z128VLH4 +** MKL46Z256VLL4 +** MKL46Z128VLL4 +** MKL46Z256VMC4 +** MKL46Z128VMC4 +** ** Compilers: ARM Compiler ** Freescale C/C++ for Embedded ARM ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** -** Reference manual: KL25RM, Rev.1, Jun 2012 -** Version: rev. 1.1, 2012-06-21 +** Reference manual: KL46P121M48SF4RM, Rev.1 Draft A, Aug 2012 +** Version: rev. 2.0, 2012-12-12 ** ** Abstract: ** CMSIS Peripheral Access Layer for MKL46Z4 ** -** Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved. +** Copyright: 1997 - 2012 Freescale, Inc. All Rights Reserved. ** ** http: www.freescale.com ** mail: support@freescale.com ** ** Revisions: -** - rev. 1.0 (2012-06-13) +** - rev. 1.0 (2012-10-16) ** Initial version. -** - rev. 1.1 (2012-06-21) -** Update according to reference manual rev. 1. +** - rev. 2.0 (2012-12-12) +** Update to reference manual rev. 1. ** ** ################################################################### */ /** * @file MKL46Z4.h - * @version 1.1 - * @date 2012-06-21 + * @version 2.0 + * @date 2012-12-12 * @brief CMSIS Peripheral Access Layer for MKL46Z4 * * CMSIS Peripheral Access Layer for MKL46Z4 @@ -40,9 +46,9 @@ /** Memory map major version (memory maps with equal major version number are * compatible) */ -#define MCU_MEM_MAP_VERSION 0x0100u +#define MCU_MEM_MAP_VERSION 0x0200u /** Memory map minor version */ -#define MCU_MEM_MAP_VERSION_MINOR 0x0001u +#define MCU_MEM_MAP_VERSION_MINOR 0x0000u /* ---------------------------------------------------------------------------- @@ -64,12 +70,12 @@ typedef enum IRQn { SysTick_IRQn = -1, /**< Cortex-M0 System Tick Interrupt */ /* Device specific interrupts */ - DMA0_IRQn = 0, /**< DMA channel 0 transfer complete interrupt */ - DMA1_IRQn = 1, /**< DMA channel 1 transfer complete interrupt */ - DMA2_IRQn = 2, /**< DMA channel 2 transfer complete interrupt */ - DMA3_IRQn = 3, /**< DMA channel 3 transfer complete interrupt */ + DMA0_IRQn = 0, /**< DMA channel 0 transfer complete/error interrupt */ + DMA1_IRQn = 1, /**< DMA channel 1 transfer complete/error interrupt */ + DMA2_IRQn = 2, /**< DMA channel 2 transfer complete/error interrupt */ + DMA3_IRQn = 3, /**< DMA channel 3 transfer complete/error interrupt */ Reserved20_IRQn = 4, /**< Reserved interrupt 20 */ - FTFA_IRQn = 5, /**< FTFA interrupt */ + FTFA_IRQn = 5, /**< FTFA command complete/read collision interrupt */ LVD_LVW_IRQn = 6, /**< Low Voltage Detect, Low Voltage Warning */ LLW_IRQn = 7, /**< Low Leakage Wakeup */ I2C0_IRQn = 8, /**< I2C0 interrupt */ @@ -87,13 +93,13 @@ typedef enum IRQn { RTC_IRQn = 20, /**< RTC interrupt */ RTC_Seconds_IRQn = 21, /**< RTC seconds interrupt */ PIT_IRQn = 22, /**< PIT timer interrupt */ - Reserved39_IRQn = 23, /**< Reserved interrupt 39 */ + I2S0_IRQn = 23, /**< I2S0 transmit interrupt */ USB0_IRQn = 24, /**< USB0 interrupt */ - DAC0_IRQn = 25, /**< DAC interrupt */ + DAC0_IRQn = 25, /**< DAC0 interrupt */ TSI0_IRQn = 26, /**< TSI0 interrupt */ MCG_IRQn = 27, /**< MCG interrupt */ LPTimer_IRQn = 28, /**< LPTimer interrupt */ - Reserved45_IRQn = 29, /**< Reserved interrupt 45 */ + LCD_IRQn = 29, /**< Segment LCD Interrupt */ PORTA_IRQn = 30, /**< Port A interrupt */ PORTD_IRQn = 31 /**< Port D interrupt */ } IRQn_Type; @@ -447,8 +453,8 @@ typedef struct { #define CMP_MUXCR_PSEL_MASK 0x38u #define CMP_MUXCR_PSEL_SHIFT 3 #define CMP_MUXCR_PSEL(x) (((uint8_t)(((uint8_t)(x))<C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */ MCG->C1 = (uint8_t)0x06U; - /* MCG_C2: LOCRE0=0,??=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */ - MCG->C2 = (uint8_t)0x00U; + /* MCG_C2: LOCRE0=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */ + MCG->C2 &= (uint8_t)~(uint8_t)0xBFU; /* MCG->C4: DMX32=0,DRST_DRS=1 */ MCG->C4 = (uint8_t)((MCG->C4 & (uint8_t)~(uint8_t)0xC0U) | (uint8_t)0x20U); /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */ @@ -124,11 +130,11 @@ void SystemInit (void) { /* PORTA->PCR19: ISF=0,MUX=0 */ PORTA->PCR[19] &= (uint32_t)~0x01000700UL; /* Switch to FBE Mode */ - /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=1 */ - OSC0->CR = (uint8_t)0x89U; - /* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */ - MCG->C2 = (uint8_t)0x24U; - /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ + /* MCG_C2: LOCRE0=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */ + MCG->C2 = (uint8_t)((MCG->C2 & (uint8_t)~(uint8_t)0x9BU) | (uint8_t)0x24U); + /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=0 */ + OSC0->CR = (uint8_t)0x80U; + /* MCG_C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ MCG->C1 = (uint8_t)0x9AU; /* MCG->C4: DMX32=0,DRST_DRS=0 */ MCG->C4 &= (uint8_t)~(uint8_t)0xE0U; @@ -162,10 +168,10 @@ void SystemInit (void) { /* PORTA->PCR19: ISF=0,MUX=0 */ PORTA->PCR[19] &= (uint32_t)~0x01000700UL; /* Switch to FBE Mode */ - /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=1 */ - OSC0->CR = (uint8_t)0x89U; /* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=0,IRCS=0 */ MCG->C2 = (uint8_t)0x24U; + /* OSC0->CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=1,SC4P=0,SC8P=0,SC16P=0 */ + OSC0->CR = (uint8_t)0x80U; /* MCG->C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */ MCG->C1 = (uint8_t)0x9AU; /* MCG->C4: DMX32=0,DRST_DRS=0 */ @@ -179,8 +185,8 @@ void SystemInit (void) { while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ } /* Switch to BLPE Mode */ - /* MCG->C2: LOCRE0=0,??=0,RANGE0=2,HGO0=0,EREFS0=1,LP=1,IRCS=0 */ - MCG->C2 = (uint8_t)0x26U; + /* MCG_C2: LOCRE0=0,RANGE0=2,HGO0=0,EREFS0=1,LP=1,IRCS=0 */ + MCG->C2 = (uint8_t)((MCG->C2 & (uint8_t)~(uint8_t)0x99U) | (uint8_t)0x26U); while((MCG->S & 0x0CU) != 0x08U) { /* Wait until external reference clock is selected as MCG output */ } #endif /* (CLOCK_SETUP == 2) */ diff --git a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.h b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.h index 1f4d8ab644..e88304711a 100644 --- a/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.h +++ b/libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL46Z/system_MKL46Z4.h @@ -1,37 +1,43 @@ /* ** ################################################################### -** Processor: MKL46Z128VLK4 +** Processors: MKL46Z256VLH4 +** MKL46Z128VLH4 +** MKL46Z256VLL4 +** MKL46Z128VLL4 +** MKL46Z256VMC4 +** MKL46Z128VMC4 +** ** Compilers: ARM Compiler ** Freescale C/C++ for Embedded ARM ** GNU C Compiler ** IAR ANSI C/C++ Compiler for ARM ** -** Reference manual: KL25RM, Rev.1, Jun 2012 -** Version: rev. 1.1, 2012-06-21 +** Reference manual: KL46P121M48SF4RM, Rev.1 Draft A, Aug 2012 +** Version: rev. 2.0, 2012-12-12 ** ** Abstract: ** Provides a system configuration function and a global variable that ** contains the system frequency. It configures the device and initializes ** the oscillator (PLL) that is part of the microcontroller device. ** -** Copyright: 2012 Freescale Semiconductor, Inc. All Rights Reserved. +** Copyright: 2012 Freescale, Inc. All Rights Reserved. ** ** http: www.freescale.com ** mail: support@freescale.com ** ** Revisions: -** - rev. 1.0 (2012-06-13) +** - rev. 1.0 (2012-10-16) ** Initial version. -** - rev. 1.1 (2012-06-21) -** Update according to reference manual rev. 1. +** - rev. 2.0 (2012-12-12) +** Update to reference manual rev. 1. ** ** ################################################################### */ /** * @file MKL46Z4 - * @version 1.1 - * @date 2012-06-21 + * @version 2.0 + * @date 2012-12-12 * @brief Device specific configuration file for MKL46Z4 (header file) * * Provides a system configuration function and a global variable that contains diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/objects.h b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/objects.h index a5366deaed..8178967acb 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/objects.h +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/objects.h @@ -46,7 +46,7 @@ struct pwmout_s { }; struct serial_s { - UARTLP_Type *uart; + UART0_Type *uart; int index; }; diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c index 3414e47ee3..f978799de2 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/serial_api.c @@ -71,7 +71,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { error("Serial pinout mapping failed"); } - obj->uart = (UARTLP_Type *)uart; + obj->uart = (UART0_Type *)uart; // enable clk switch (uart) { case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK | (1<index == 0) { - obj->uart->C4 &= ~UARTLP_C4_M10_MASK; - obj->uart->C4 |= (m10 << UARTLP_C4_M10_SHIFT); + obj->uart->C4 &= ~UART0_C4_M10_MASK; + obj->uart->C4 |= (m10 << UART0_C4_M10_SHIFT); } // stop bits diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c index e76c5aa137..c717768b0d 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/spi_api.c @@ -96,7 +96,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel // enable power and clocking switch ((int)obj->spi) { - case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break; + case SPI_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 22; break; case SPI_1: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 23; break; } @@ -110,6 +110,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel // enable SPI obj->spi->C1 |= SPI_C1_SPE_MASK; + obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; //8bit // pin out the spi pins pinmap_pinout(mosi, PinMap_SPI_MOSI); @@ -124,8 +125,8 @@ void spi_free(spi_t *obj) { // [TODO] } void spi_format(spi_t *obj, int bits, int mode, int slave) { - if (bits != 8) { - error("Only 8bits SPI supported"); + if ((bits != 8) && (bits != 16)) { + error("Only 8/16 bits SPI supported"); } if ((mode < 0) || (mode > 3)) { @@ -141,6 +142,11 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) { // write new value obj->spi->C1 |= c1_data; + if (bits == 8) { + obj->spi->C2 &= ~SPI_C2_SPIMODE_MASK; + } else { + obj->spi->C2 |= SPI_C2_SPIMODE_MASK; + } } void spi_frequency(spi_t *obj, int hz) { @@ -184,13 +190,28 @@ static inline int spi_readable(spi_t * obj) { } int spi_master_write(spi_t *obj, int value) { - // wait tx buffer empty - while(!spi_writeable(obj)); - obj->spi->D = (value & 0xff); + int ret; + if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) { + // 16bit + while(!spi_writeable(obj)); + obj->spi->DL = (value & 0xff); + obj->spi->DH = ((value >> 8) & 0xff); - // wait rx buffer full - while (!spi_readable(obj)); - return obj->spi->D & 0xff; + // wait rx buffer full + while (!spi_readable(obj)); + ret = obj->spi->DH; + ret = (ret << 8) | obj->spi->DL; + } else { + //8bit + while(!spi_writeable(obj)); + obj->spi->DL = (value & 0xff); + + // wait rx buffer full + while (!spi_readable(obj)); + ret = (obj->spi->DL & 0xff); + } + + return ret; } int spi_slave_receive(spi_t *obj) { @@ -198,10 +219,23 @@ int spi_slave_receive(spi_t *obj) { } int spi_slave_read(spi_t *obj) { - return obj->spi->D; + int ret; + if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) { + ret = obj->spi->DH; + ret = ((ret << 8) | obj->spi->DL); + } else { + ret = obj->spi->DL; + } + return ret; } void spi_slave_write(spi_t *obj, int value) { while (!spi_writeable(obj)); - obj->spi->D = value; + if (obj->spi->C2 & SPI_C2_SPIMODE_MASK) { + obj->spi->DL = (value & 0xff); + obj->spi->DH = ((value >> 8) & 0xff); + } else { + obj->spi->DL = value; + } + } From 43f4e42681c4bc170cf36f38e61e1b7f03be1c43 Mon Sep 17 00:00:00 2001 From: pbrier Date: Thu, 17 Oct 2013 23:22:26 +0200 Subject: [PATCH 038/117] Added command line source/build directory option --- workspace_tools/make.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/workspace_tools/make.py b/workspace_tools/make.py index 2abca9a22b..30ad2fed36 100644 --- a/workspace_tools/make.py +++ b/workspace_tools/make.py @@ -50,6 +50,10 @@ if __name__ == '__main__': default=False, help="Verbose diagnostic output") # Local run + parser.add_option("--source", dest="input_dir", + default=None, help="The source input directory") + parser.add_option("--build", dest="output_dir", + default=None, help="The binary output directory") parser.add_option("-d", "--disk", dest="disk", default=None, help="The mbed disk") parser.add_option("-s", "--serial", dest="serial", @@ -108,6 +112,10 @@ if __name__ == '__main__': test.dependencies.append(RTOS_LIBRARIES) build_dir = join(BUILD_DIR, "test", mcu, toolchain, test.id) + if options.input_dir is not None: + test.source_dir = options.input_dir + if options.output_dir is not None: + build_dir = options.output_dir target = TARGET_MAP[mcu] try: From e0034f204defa83a3f19d049369e5aab3cbb1bf6 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Fri, 18 Oct 2013 11:10:22 +0100 Subject: [PATCH 039/117] Added first version of setup.py --- setup.py | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 setup.py diff --git a/setup.py b/setup.py new file mode 100644 index 0000000000..560774fe2f --- /dev/null +++ b/setup.py @@ -0,0 +1,13 @@ +from distutils.core import setup + +setup(name='Mbed', + version='0.0.1', + description='Package description', + long_description='Package long description', + author='Author name', + author_email='Author email', + maintainer='Maintainer name', + maintainer_email='Maintainer email', + url='Homepage url', + download_url='Pacjage download url', + license='Apache License string') From bb7088daa50a188045120fba09da3d6c66fffdef Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Fri, 18 Oct 2013 11:12:43 +0100 Subject: [PATCH 040/117] Added license text to setup.py description --- setup.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/setup.py b/setup.py index 560774fe2f..63e8078a4d 100644 --- a/setup.py +++ b/setup.py @@ -1,5 +1,7 @@ from distutils.core import setup +license_text = open('LICENSE').read() + setup(name='Mbed', version='0.0.1', description='Package description', @@ -9,5 +11,5 @@ setup(name='Mbed', maintainer='Maintainer name', maintainer_email='Maintainer email', url='Homepage url', - download_url='Pacjage download url', - license='Apache License string') + download_url='Package download url', + license=license_text) From b270f0fa7c30a4ca251827d388be740132057228 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Fri, 18 Oct 2013 11:15:28 +0100 Subject: [PATCH 041/117] setup.py updates --- setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/setup.py b/setup.py index 63e8078a4d..bcfb38fa19 100644 --- a/setup.py +++ b/setup.py @@ -10,6 +10,6 @@ setup(name='Mbed', author_email='Author email', maintainer='Maintainer name', maintainer_email='Maintainer email', - url='Homepage url', + url='https://github.com/mbedmicro/mbed', download_url='Package download url', license=license_text) From 6e750602ad8dded7f10f4e2208810f2ec5ad249d Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Fri, 18 Oct 2013 11:23:34 +0100 Subject: [PATCH 042/117] Formatted code for 10/10 rating from Pylint --- setup.py | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/setup.py b/setup.py index bcfb38fa19..121b1e77a2 100644 --- a/setup.py +++ b/setup.py @@ -1,6 +1,11 @@ +""" +This module defines the attributes of the +PyPI package for the Mbed SDK +""" + from distutils.core import setup -license_text = open('LICENSE').read() +LICENSE = open('LICENSE').read() setup(name='Mbed', version='0.0.1', @@ -12,4 +17,4 @@ setup(name='Mbed', maintainer_email='Maintainer email', url='https://github.com/mbedmicro/mbed', download_url='Package download url', - license=license_text) + license=LICENSE) From 07e003d783ce253a8e5426005fa1cce55b6bb5ef Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Fri, 18 Oct 2013 18:18:49 +0300 Subject: [PATCH 043/117] Added u-blox test repository Also, allow a repository to synchronize with more than one source directory. --- workspace_tools/synch.py | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/workspace_tools/synch.py b/workspace_tools/synch.py index 51cf81a16e..dcfa0b3473 100644 --- a/workspace_tools/synch.py +++ b/workspace_tools/synch.py @@ -62,6 +62,7 @@ OFFICIAL_CODE = ( ("CellularModem", "net/cellular/CellularModem"), ("CellularUSBModem", "net/cellular/CellularUSBModem"), ("UbloxUSBModem", "net/cellular/UbloxUSBModem"), + ("UbloxModemHTTPClientTest", ["tests/net/cellular/http/common", "tests/net/cellular/http/ubloxusbgsm"]), ) @@ -239,7 +240,7 @@ def visit_files(path, visit): visit(join(root, file)) -def update_repo(repo_name, sdk_path): +def update_repo(repo_name, sdk_paths): repo = MbedOfficialRepository(repo_name) # copy files from mbed SDK to mbed_official repository def visit_mbed_sdk(sdk_file): @@ -250,12 +251,16 @@ def update_repo(repo_name, sdk_path): makedirs(repo_dir) copy_with_line_endings(sdk_file, repo_file) - visit_files(sdk_path, visit_mbed_sdk) + for sdk_path in sdk_paths: + visit_files(sdk_path, visit_mbed_sdk) # remove repository files that do not exist in the mbed SDK def visit_repo(repo_file): - sdk_file = join(sdk_path, relpath(repo_file, repo.path)) - if not exists(sdk_file): + for sdk_path in sdk_paths: + sdk_file = join(sdk_path, relpath(repo_file, repo.path)) + if exists(sdk_file): + break + else: remove(repo_file) print "remove: %s" % repo_file visit_files(repo.path, visit_repo) @@ -267,7 +272,8 @@ def update_repo(repo_name, sdk_path): def update_code(repositories): for repo_name, sdk_dir in repositories: print '\n=== Updating "%s" ===' % repo_name - sdk_path = join(LIB_DIR, sdk_dir) + sdk_dirs = [sdk_dir] if type(sdk_dir) != type([]) else sdk_dir + sdk_path = [join(LIB_DIR, d) for d in sdk_dirs] update_repo(repo_name, sdk_path) From ea9ba23ff50fb4713a35c1b362c700d5b14dff1d Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Sat, 19 Oct 2013 00:54:32 +0300 Subject: [PATCH 044/117] Changed u-blox modem test The test is not automated now, so it can be synced with the official repository. Also changed it to look more like the original VodafoneUSBModem test by adding another thread in the code. --- .../net/cellular/http/ubloxusbgsm/main.cpp | 21 +++++++++++++++---- workspace_tools/tests.py | 3 +-- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp index 145c9949d8..9a98ce077a 100644 --- a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp @@ -1,5 +1,4 @@ #include "UBloxUSBGSMModem.h" -#include "test_env.h" #include "httptest.h" #ifndef MODEM_APN @@ -17,9 +16,23 @@ #define PASSWORD NULL #endif -int main() +void test(void const* data) { UbloxUSBGSMModem modem; - - notify_completion(httptest(modem, APN, USERNAME, PASSWORD)); + httptest(modem, APN, USERNAME, PASSWORD); + while (true); } + +int main() +{ + Thread testTask(test, NULL, osPriorityNormal, 1024 * 4); + DigitalOut led(LED1); + + while (true) + { + led = !led; + Thread::wait(1000); + } + return 0; +} + diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py index dc3009d6a6..d0c727c8f6 100644 --- a/workspace_tools/tests.py +++ b/workspace_tools/tests.py @@ -569,9 +569,8 @@ TESTS = [ { "id": "UB_1", "description": "u-blox USB GSM modem: HTTP client", "source_dir": [join(TEST_DIR, "net", "cellular", "http", "ubloxusbgsm"), join(TEST_DIR, "net", "cellular", "http", "common")], - "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], + "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], "supported": CORTEX_ARM_SUPPORT, - "automated": True, }, { "id": "UB_2", "description": "u-blox USB GSM modem: SMS test", From 5e6262a91a3bb794fc18d2df5351c682c5dac977 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Sat, 19 Oct 2013 14:39:50 +0300 Subject: [PATCH 045/117] Fixed macro definitions in u-blox test --- libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp index 9a98ce077a..030509af83 100644 --- a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp @@ -3,23 +3,23 @@ #ifndef MODEM_APN #warning APN not specified, using "internet" -#define APN "internet" +#define MODEM_APN "internet" #endif #ifndef MODEM_USERNAME #warning username not specified -#define USERNAME NULL +#define MODEM_USERNAME NULL #endif #ifndef MODEM_PASSWORD #warning password not specified -#define PASSWORD NULL +#define MODEM_PASSWORD NULL #endif void test(void const* data) { UbloxUSBGSMModem modem; - httptest(modem, APN, USERNAME, PASSWORD); + httptest(modem, MODEM_APN, MODEM_USERNAME, MODEM_PASSWORD); while (true); } From b0537af7638222750c612bdaaf8e6cdb0eb7f2aa Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Sat, 19 Oct 2013 22:21:45 +0200 Subject: [PATCH 046/117] gpio irq enable/disable - InterruptIn disable_irq/enable_irq --- libraries/mbed/api/InterruptIn.h | 10 ++++- libraries/mbed/common/InterruptIn.cpp | 8 ++++ libraries/mbed/hal/gpio_irq_api.h | 2 + .../TARGET_KL05Z/gpio_irq_api.c | 16 ++++++++ .../TARGET_KL25Z/gpio_irq_api.c | 16 ++++++++ .../TARGET_KL46Z/gpio_irq_api.c | 16 ++++++++ .../TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c | 8 ++++ .../TARGET_LPC11XX_11CXX/gpio_irq_api.c | 40 +++++++++++++++++++ .../TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c | 9 +++++ .../TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c | 9 +++++ .../TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c | 9 +++++ .../TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c | 8 ++++ .../TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c | 16 ++++++++ .../TARGET_LPC81X_COMMON/gpio_irq_api.c | 8 ++++ 14 files changed, 174 insertions(+), 1 deletion(-) diff --git a/libraries/mbed/api/InterruptIn.h b/libraries/mbed/api/InterruptIn.h index c460585fb1..830c1dc402 100644 --- a/libraries/mbed/api/InterruptIn.h +++ b/libraries/mbed/api/InterruptIn.h @@ -167,7 +167,7 @@ public: * * @returns * The function object created for 'fptr' - */ + */ pFunctionPointer_t fall_add(void (*fptr)(void)) { return fall_add_common(fptr); } @@ -240,6 +240,14 @@ public: */ void mode(PinMode pull); + /** Enable IRQ + */ + void enable_irq(); + + /** Disable IRQ + */ + void disable_irq(); + static void _irq_handler(uint32_t id, gpio_irq_event event); protected: diff --git a/libraries/mbed/common/InterruptIn.cpp b/libraries/mbed/common/InterruptIn.cpp index bf91f3cb9b..0dc45f41ad 100644 --- a/libraries/mbed/common/InterruptIn.cpp +++ b/libraries/mbed/common/InterruptIn.cpp @@ -99,6 +99,14 @@ void InterruptIn::_irq_handler(uint32_t id, gpio_irq_event event) { } } +void InterruptIn::enable_irq() { + gpio_irq_enable(&gpio_irq); +} + +void InterruptIn::disable_irq() { + gpio_irq_disable(&gpio_irq); +} + #ifdef MBED_OPERATORS InterruptIn::operator int() { return read(); diff --git a/libraries/mbed/hal/gpio_irq_api.h b/libraries/mbed/hal/gpio_irq_api.h index 2eadb4f584..76c7e927ec 100644 --- a/libraries/mbed/hal/gpio_irq_api.h +++ b/libraries/mbed/hal/gpio_irq_api.h @@ -37,6 +37,8 @@ typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event); int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id); void gpio_irq_free(gpio_irq_t *obj); void gpio_irq_set (gpio_irq_t *obj, gpio_irq_event event, uint32_t enable); +void gpio_irq_enable(gpio_irq_t *obj); +void gpio_irq_disable(gpio_irq_t *obj); #ifdef __cplusplus } diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c index b76a2ed505..e14f0b8ec7 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/gpio_irq_api.c @@ -154,3 +154,19 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { // Interrupt configuration and clear interrupt port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK; } + +void gpio_irq_enable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_EnableIRQ(PORTA_IRQn); + } else if (obj->port == PortB) { + NVIC_EnableIRQ(PORTB_IRQn); + } +} + +void gpio_irq_disable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_DisableIRQ(PORTA_IRQn); + } else if (obj->port == PortB) { + NVIC_DisableIRQ(PORTB_IRQn); + } +} diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c index 44d018d8ef..0af91e80bc 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL25Z/gpio_irq_api.c @@ -143,3 +143,19 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { // Interrupt configuration and clear interrupt port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK; } + +void gpio_irq_enable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_EnableIRQ(PORTA_IRQn); + } else if (obj->port == PortD) { + NVIC_EnableIRQ(PORTD_IRQn); + } +} + +void gpio_irq_disable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_DisableIRQ(PORTA_IRQn); + } else if (obj->port == PortD) { + NVIC_DisableIRQ(PORTD_IRQn); + } +} diff --git a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c index 44d018d8ef..0af91e80bc 100644 --- a/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/gpio_irq_api.c @@ -143,3 +143,19 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { // Interrupt configuration and clear interrupt port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK; } + +void gpio_irq_enable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_EnableIRQ(PORTA_IRQn); + } else if (obj->port == PortD) { + NVIC_EnableIRQ(PORTD_IRQn); + } +} + +void gpio_irq_disable(gpio_irq_t *obj) { + if (obj->port == PortA) { + NVIC_DisableIRQ(PORTA_IRQn); + } else if (obj->port == PortD) { + NVIC_DisableIRQ(PORTD_IRQn); + } +} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c index 4228ac5a6c..0a992633da 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/gpio_irq_api.c @@ -131,3 +131,11 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c index fbd12f8695..a8dc1f6c18 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_irq_api.c @@ -174,3 +174,43 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } + +void gpio_irq_enable(gpio_irq_t *obj) { + uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT); + switch (port_num) { + case 0: + NVIC_EnableIRQ(EINT0_IRQn); + break; + case 1: + NVIC_EnableIRQ(EINT1_IRQn); + break; + case 2: + NVIC_EnableIRQ(EINT2_IRQn); + break; + case 3: + NVIC_EnableIRQ(EINT3_IRQn); + break; + default: + break; + } +} + +void gpio_irq_disable(gpio_irq_t *obj) { + uint32_t port_num = ((obj->pin & 0xF000) >> PORT_SHIFT); + switch (port_num) { + case 0: + NVIC_DisableIRQ(EINT0_IRQn); + break; + case 1: + NVIC_DisableIRQ(EINT1_IRQn); + break; + case 2: + NVIC_DisableIRQ(EINT2_IRQn); + break; + case 3: + NVIC_DisableIRQ(EINT3_IRQn); + break; + default: + break; + } +} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c index 5430e966f8..74b3e280cc 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC13XX/gpio_irq_api.c @@ -131,3 +131,12 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c index acdc3cb718..3cd2418390 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/gpio_irq_api.c @@ -150,3 +150,12 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ(EINT3_IRQn); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ(EINT3_IRQn); +} + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c index 3741605f09..129e1ea5b4 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/gpio_irq_api.c @@ -143,3 +143,12 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ(EINT3_IRQn); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ(EINT3_IRQn); +} + diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c index 605f2d6d87..ececfabe69 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/gpio_irq_api.c @@ -164,3 +164,11 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ(GPIO_IRQn); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ(GPIO_IRQn); +} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c index dda9c147bb..c24fe223e2 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC43XX/gpio_irq_api.c @@ -134,3 +134,19 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { +#if !defined(CORE_M0) + NVIC_EnableIRQ((IRQn_Type)(PIN_INT0_IRQn + obj->ch)); +#else + NVIC_EnableIRQ((IRQn_Type)(PIN_INT4_IRQn + obj->ch)); +#endif +} + +void gpio_irq_disable(gpio_irq_t *obj) { +#if !defined(CORE_M0) + NVIC_DisableIRQ((IRQn_Type)(PIN_INT0_IRQn + obj->ch)); +#else + NVIC_DisableIRQ((IRQn_Type)(PIN_INT4_IRQn + obj->ch)); +#endif +} diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c index c90c31a3da..95186d0228 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c @@ -125,3 +125,11 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) { } } } + +void gpio_irq_enable(gpio_irq_t *obj) { + NVIC_EnableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} + +void gpio_irq_disable(gpio_irq_t *obj) { + NVIC_DisableIRQ((IRQn_Type)(PININT_IRQ + obj->ch)); +} From d0306ca254ff2d96185b1ab4b75f61e86f1793df Mon Sep 17 00:00:00 2001 From: pbrier Date: Sun, 20 Oct 2013 17:17:10 +0200 Subject: [PATCH 047/117] Added additional command line options for the build --- workspace_tools/make.py | 55 +++++++++++++++++++++++++++++-------- workspace_tools/settings.py | 2 +- 2 files changed, 45 insertions(+), 12 deletions(-) diff --git a/workspace_tools/make.py b/workspace_tools/make.py index 30ad2fed36..030c345ebe 100644 --- a/workspace_tools/make.py +++ b/workspace_tools/make.py @@ -42,7 +42,7 @@ except: if __name__ == '__main__': # Parse Options parser = get_default_options_parser() - parser.add_option("-p", type="int", dest="program", + parser.add_option("-p", type="int", dest="program", default=-1, help="The index of the desired test program: [0-%d]" % (len(TESTS)-1)) parser.add_option("-n", dest="program_name", help="The name of the desired test program") @@ -50,10 +50,22 @@ if __name__ == '__main__': default=False, help="Verbose diagnostic output") # Local run - parser.add_option("--source", dest="input_dir", - default=None, help="The source input directory") - parser.add_option("--build", dest="output_dir", - default=None, help="The binary output directory") + parser.add_option("--automated", action="store_true", dest="automated", + default=False, help="Automated test") + parser.add_option("--host", dest="host_test", + default=None, help="Host test") + parser.add_option("--extra", dest="extra", + default=None, help="Extra files") + parser.add_option("--peripherals", dest="peripherals", + default=None, help="Required peripherals") + parser.add_option("--dep", dest="dependencies", + default=None, help="Dependencies") + parser.add_option("--source", dest="source_dir", + default=None, help="The source (input) directory") + parser.add_option("--duration", type="int", dest="duration", + default=None, help="Duration of the test") + parser.add_option("--build", dest="build_dir", + default=None, help="The build (output) directory") parser.add_option("-d", "--disk", dest="disk", default=None, help="The mbed disk") parser.add_option("-s", "--serial", dest="serial", @@ -71,9 +83,15 @@ if __name__ == '__main__': default=None, help="use the specified linker script") (options, args) = parser.parse_args() - + + # force program to "0" if a source dir is specified + if options.source_dir is not None: + p = 0 + n = None + else: # Program Number or name - p, n = options.program, options.program_name + p, n = options.program, options.program_name + if n is not None and p is not None: args_error(parser, "[ERROR] specify either '-n' or '-p', not both") if n: @@ -103,6 +121,19 @@ if __name__ == '__main__': # Test test = Test(p) + if options.automated is not None: + test.automated = options.automated + if options.dependencies is not None: + test.dependencies = options.dependencies + if options.host_test is not None: + test.host_test = options.host_test; + if options.peripherals is not None: + test.peripherals = options.peripherals; + if options.duration is not None: + test.duration = options.duration; + if options.extra is not None: + test.extra_files = options.extra + if not test.is_supported(mcu, toolchain): print 'The selected test is not supported on target %s with toolchain %s' % (mcu, toolchain) sys.exit() @@ -112,10 +143,12 @@ if __name__ == '__main__': test.dependencies.append(RTOS_LIBRARIES) build_dir = join(BUILD_DIR, "test", mcu, toolchain, test.id) - if options.input_dir is not None: - test.source_dir = options.input_dir - if options.output_dir is not None: - build_dir = options.output_dir + if options.source_dir is not None: + test.source_dir = options.source_dir + build_dir = options.source_dir + + if options.build_dir is not None: + build_dir = options.build_dir target = TARGET_MAP[mcu] try: diff --git a/workspace_tools/settings.py b/workspace_tools/settings.py index 9b6d3e9ce8..5158ace2e8 100644 --- a/workspace_tools/settings.py +++ b/workspace_tools/settings.py @@ -53,7 +53,7 @@ ARM_CPPLIB = join(ARM_LIB, "cpplib") MY_ARM_CLIB = join(ARM_PATH, "lib", "microlib") # GCC ARM -GCC_ARM_PATH = "C:/arm-none-eabi-gcc-4_7/bin" +GCC_ARM_PATH = "/opt/gcc4mbed/gcc-arm-none-eabi/bin" # GCC CodeSourcery GCC_CS_PATH = "C:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" From 8fd42e5edae7bd7b2b948f0cbbc56b8f653e01fc Mon Sep 17 00:00:00 2001 From: pbrier Date: Sun, 20 Oct 2013 17:25:58 +0200 Subject: [PATCH 048/117] reset to original settings --- workspace_tools/settings.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/settings.py b/workspace_tools/settings.py index 5158ace2e8..9b6d3e9ce8 100644 --- a/workspace_tools/settings.py +++ b/workspace_tools/settings.py @@ -53,7 +53,7 @@ ARM_CPPLIB = join(ARM_LIB, "cpplib") MY_ARM_CLIB = join(ARM_PATH, "lib", "microlib") # GCC ARM -GCC_ARM_PATH = "/opt/gcc4mbed/gcc-arm-none-eabi/bin" +GCC_ARM_PATH = "C:/arm-none-eabi-gcc-4_7/bin" # GCC CodeSourcery GCC_CS_PATH = "C:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" From 1bb844c842b35e0672597a00c45020fcb7363f7a Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 21 Oct 2013 11:11:06 +0300 Subject: [PATCH 049/117] Added macro definition from command line build_api.py now support macros defined at compile time, so build.py and make.py can be used like this: $ make.py/build.py -DMACRO1 -DMACRO2=VALUE2 ... --- workspace_tools/build.py | 8 ++++++-- workspace_tools/build_api.py | 14 ++++++------- workspace_tools/make.py | 7 +++++-- workspace_tools/toolchains/__init__.py | 5 +++-- workspace_tools/toolchains/arm.py | 12 +++++------ workspace_tools/toolchains/gcc.py | 28 +++++++++++++------------- workspace_tools/toolchains/iar.py | 4 ++-- 7 files changed, 43 insertions(+), 35 deletions(-) diff --git a/workspace_tools/build.py b/workspace_tools/build.py index 0f9593a3bf..1cf2eb4acb 100644 --- a/workspace_tools/build.py +++ b/workspace_tools/build.py @@ -52,6 +52,8 @@ if __name__ == '__main__': default=False, help="Verbose diagnostic output") parser.add_option("-b", "--ublox", action="store_true", dest="ublox", default=False, help="Compile the u-blox library") + parser.add_option("-D", "", action="append", dest="macros", + help="Add a macro definition") (options, args) = parser.parse_args() # Get target list @@ -92,10 +94,12 @@ if __name__ == '__main__': try: mcu = TARGET_MAP[target] build_mbed_libs(mcu, toolchain, options=options.options, - verbose=options.verbose, clean=options.clean) + verbose=options.verbose, clean=options.clean, + macros=options.macros) for lib_id in libraries: build_lib(lib_id, mcu, toolchain, options=options.options, - verbose=options.verbose, clean=options.clean) + verbose=options.verbose, clean=options.clean, + macros=options.macros) successes.append(id) except Exception, e: if options.verbose: diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py index e965435d17..2c95d92366 100644 --- a/workspace_tools/build_api.py +++ b/workspace_tools/build_api.py @@ -26,9 +26,9 @@ from workspace_tools.libraries import Library def build_project(src_path, build_path, target, toolchain_name, libraries_paths=None, options=None, linker_script=None, - clean=False, notify=None, verbose=False, name=None): + clean=False, notify=None, verbose=False, name=None, macros=None): # Toolchain instance - toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, notify) + toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, notify, macros) toolchain.VERBOSE = verbose toolchain.build_all = clean @@ -40,7 +40,6 @@ def build_project(src_path, build_path, target, toolchain_name, # Scan src_path and libraries_paths for resources resources = toolchain.scan_resources(src_paths[0]) for path in src_paths[1:]: - print "PATH:", path resources.add(toolchain.scan_resources(path)) if libraries_paths is not None: src_paths.extend(libraries_paths) @@ -78,7 +77,7 @@ verbose: Write the actual tools command lines if True """ def build_library(src_paths, build_path, target, toolchain_name, dependencies_paths=None, options=None, name=None, clean=False, - notify=None, verbose=False): + notify=None, verbose=False, macros=None): if type(src_paths) != ListType: src_paths = [src_paths] for src_path in src_paths: @@ -86,7 +85,7 @@ def build_library(src_paths, build_path, target, toolchain_name, raise Exception("The library source folder does not exist: %s", src_path) # Toolchain instance - toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, notify) + toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, notify, macros) toolchain.VERBOSE = verbose toolchain.build_all = clean @@ -136,14 +135,14 @@ def build_lib(lib_id, target, toolchain, options=None, verbose=False, clean=Fals # We do have unique legacy conventions about how we build and package the mbed library -def build_mbed_libs(target, toolchain_name, options=None, verbose=False, clean=False): +def build_mbed_libs(target, toolchain_name, options=None, verbose=False, clean=False, macros=None): # Check toolchain support if toolchain_name not in target.supported_toolchains: print '\n%s target is not yet supported by toolchain %s' % (target.name, toolchain_name) return # Toolchain - toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options) + toolchain = TOOLCHAIN_CLASSES[toolchain_name](target, options, macros=macros) toolchain.VERBOSE = verbose toolchain.build_all = clean @@ -192,3 +191,4 @@ def build_mbed_libs(target, toolchain_name, options=None, verbose=False, clean=F objects.remove(retargeting) toolchain.build_library(objects, BUILD_TOOLCHAIN, "mbed") toolchain.copy_files(retargeting, BUILD_TOOLCHAIN) + diff --git a/workspace_tools/make.py b/workspace_tools/make.py index 2abca9a22b..99d5d5272b 100644 --- a/workspace_tools/make.py +++ b/workspace_tools/make.py @@ -48,7 +48,9 @@ if __name__ == '__main__': help="The name of the desired test program") parser.add_option("-v", "--verbose", action="store_true", dest="verbose", default=False, help="Verbose diagnostic output") - + parser.add_option("-D", "", action="append", dest="macros", + help="Add a macro definition") + # Local run parser.add_option("-d", "--disk", dest="disk", default=None, help="The mbed disk") @@ -114,7 +116,8 @@ if __name__ == '__main__': bin = build_project(test.source_dir, build_dir, target, toolchain, test.dependencies, options.options, linker_script=options.linker_script, - clean=options.clean, verbose=options.verbose) + clean=options.clean, verbose=options.verbose, + macros=options.macros) print 'Image: %s' % bin if options.disk: diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py index 29fbf34f15..a5ee60d497 100644 --- a/workspace_tools/toolchains/__init__.py +++ b/workspace_tools/toolchains/__init__.py @@ -146,7 +146,7 @@ class mbedToolchain: GOANNA_FORMAT = "[Goanna] warning [%FILENAME%:%LINENO%] - [%CHECKNAME%(%SEVERITY%)] %MESSAGE%" GOANNA_DIAGNOSTIC_PATTERN = re.compile(r'"\[Goanna\] (?Pwarning) \[(?P[^:]+):(?P\d+)\] \- (?P.*)"') - def __init__(self, target, options=None, notify=None): + def __init__(self, target, options=None, notify=None, macros=None): self.target = target self.name = self.__class__.__name__ self.hook = hooks.Hook(target, self) @@ -162,6 +162,7 @@ class mbedToolchain: self.options = [] else: self.options = options + self.macros = macros or [] self.options.extend(BUILD_OPTIONS) if self.options: self.info("Build Options: %s" % (', '.join(self.options))) @@ -347,7 +348,7 @@ class mbedToolchain: self.progress("compile", source, build_update=True) # Compile - command = cc + ['-D%s' % s for s in self.get_symbols()] + ["-I%s" % i for i in includes] + ["-o", object, source] + command = cc + ['-D%s' % s for s in self.get_symbols() + self.macros] + ["-I%s" % i for i in includes] + ["-o", object, source] if hasattr(self, "get_dep_opt"): command.extend(self.get_dep_opt(dep_path)) diff --git a/workspace_tools/toolchains/arm.py b/workspace_tools/toolchains/arm.py index 902d84edef..5c96c9778b 100644 --- a/workspace_tools/toolchains/arm.py +++ b/workspace_tools/toolchains/arm.py @@ -30,8 +30,8 @@ class ARM(mbedToolchain): DIAGNOSTIC_PATTERN = re.compile('"(?P[^"]+)", line (?P\d+): (?PWarning|Error): (?P.+)') DEP_PATTERN = re.compile('\S+:\s(?P.+)\n') - def __init__(self, target, options=None, notify=None): - mbedToolchain.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None): + mbedToolchain.__init__(self, target, options, notify, macros) if target.core == "Cortex-M0+": cpu = "Cortex-M0" @@ -123,16 +123,16 @@ class ARM(mbedToolchain): class ARM_STD(ARM): - def __init__(self, target, options=None, notify=None): - ARM.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None): + ARM.__init__(self, target, options, notify, macros) self.ld.append("--libpath=%s" % ARM_LIB) class ARM_MICRO(ARM): PATCHED_LIBRARY = False - def __init__(self, target, options=None, notify=None): - ARM.__init__(self, target, notify) + def __init__(self, target, options=None, notify=None, macros=None): + ARM.__init__(self, target, options, notify, macros) # Compiler self.asm += ["-D__MICROLIB"] diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py index fef4c03fe7..b74c1bd638 100644 --- a/workspace_tools/toolchains/gcc.py +++ b/workspace_tools/toolchains/gcc.py @@ -29,8 +29,8 @@ class GCC(mbedToolchain): CIRCULAR_DEPENDENCIES = True DIAGNOSTIC_PATTERN = re.compile('((?P\d+):)(\d+:)? (?Pwarning|error): (?P.+)') - def __init__(self, target, options=None, notify=None, tool_path=""): - mbedToolchain.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None, tool_path=""): + mbedToolchain.__init__(self, target, options, notify, macros) if target.core == "Cortex-M0+": cpu = "cortex-m0" @@ -162,8 +162,8 @@ class GCC(mbedToolchain): class GCC_ARM(GCC): - def __init__(self, target, options=None, notify=None): - GCC.__init__(self, target, options, notify, GCC_ARM_PATH) + def __init__(self, target, options=None, notify=None, macros=None): + GCC.__init__(self, target, options, notify, macros, GCC_ARM_PATH) # Use latest gcc nanolib self.ld.append("--specs=nano.specs") @@ -174,8 +174,8 @@ class GCC_ARM(GCC): class GCC_CR(GCC): - def __init__(self, target, options=None, notify=None): - GCC.__init__(self, target, options, notify, GCC_CR_PATH) + def __init__(self, target, options=None, notify=None, macros=None): + GCC.__init__(self, target, options, notify, macros, GCC_CR_PATH) additional_compiler_flags = [ "-D__NEWLIB__", "-D__CODE_RED", "-D__USE_CMSIS", "-DCPP_USE_HEAP", @@ -187,8 +187,8 @@ class GCC_CR(GCC): class GCC_CS(GCC): - def __init__(self, target, options=None, notify=None): - GCC.__init__(self, target, options, notify, GCC_CS_PATH) + def __init__(self, target, options=None, notify=None, macros=None): + GCC.__init__(self, target, options, notify, macros, GCC_CS_PATH) class GCC_CW(GCC): @@ -196,13 +196,13 @@ class GCC_CW(GCC): "Cortex-M0+": "armv6-m", } - def __init__(self, target, options=None, notify=None): - GCC.__init__(self, target, options, notify, CW_GCC_PATH) + def __init__(self, target, options=None, notify=None, macros=None): + GCC.__init__(self, target, options, notify, macros, CW_GCC_PATH) class GCC_CW_EWL(GCC_CW): - def __init__(self, target, options=None, notify=None): - GCC_CW.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None): + GCC_CW.__init__(self, target, options, notify, macros) # Compiler common = [ @@ -230,5 +230,5 @@ class GCC_CW_EWL(GCC_CW): class GCC_CW_NEWLIB(GCC_CW): - def __init__(self, target, options=None, notify=None): - GCC_CW.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None): + GCC_CW.__init__(self, target, options, notify, macros) diff --git a/workspace_tools/toolchains/iar.py b/workspace_tools/toolchains/iar.py index 8f935b6f3f..f6a6741d84 100644 --- a/workspace_tools/toolchains/iar.py +++ b/workspace_tools/toolchains/iar.py @@ -29,8 +29,8 @@ class IAR(mbedToolchain): DIAGNOSTIC_PATTERN = re.compile('"(?P[^"]+)",(?P[\d]+)\s+(?PWarning|Error)(?P.+)') - def __init__(self, target, options=None, notify=None): - mbedToolchain.__init__(self, target, options, notify) + def __init__(self, target, options=None, notify=None, macros=None): + mbedToolchain.__init__(self, target, options, notify, macros) c_flags = [ "-Oh", From a4ac8a734add877bfc18f89132dd3a3bd945a94d Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 10:27:53 +0100 Subject: [PATCH 050/117] Added long description --- description.rst | 3 +++ setup.py | 6 +++--- 2 files changed, 6 insertions(+), 3 deletions(-) create mode 100644 description.rst diff --git a/description.rst b/description.rst new file mode 100644 index 0000000000..bb6ed8686e --- /dev/null +++ b/description.rst @@ -0,0 +1,3 @@ +A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles). + +.. _mbed framework: http://mbed.org diff --git a/setup.py b/setup.py index 121b1e77a2..ac068d2e04 100644 --- a/setup.py +++ b/setup.py @@ -6,15 +6,15 @@ PyPI package for the Mbed SDK from distutils.core import setup LICENSE = open('LICENSE').read() +DESCRIPTION = open('description.rst') setup(name='Mbed', version='0.0.1', - description='Package description', - long_description='Package long description', + description='Build and test system for mbed', + long_description=DESCRIPTION, author='Author name', author_email='Author email', maintainer='Maintainer name', maintainer_email='Maintainer email', url='https://github.com/mbedmicro/mbed', - download_url='Package download url', license=LICENSE) From d903e6ae1c6d1a18ebb9b468bfedb61d22468078 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 10:54:17 +0100 Subject: [PATCH 051/117] Added Author and Maintainer names --- setup.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/setup.py b/setup.py index ac068d2e04..13d6561b8e 100644 --- a/setup.py +++ b/setup.py @@ -12,9 +12,9 @@ setup(name='Mbed', version='0.0.1', description='Build and test system for mbed', long_description=DESCRIPTION, - author='Author name', + author='Emilio Monti', author_email='Author email', - maintainer='Maintainer name', + maintainer='Bogdan Marinescu', maintainer_email='Maintainer email', url='https://github.com/mbedmicro/mbed', license=LICENSE) From 35359d3f0a28e6f4ff058677ac864800e5cae804 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 11:22:19 +0100 Subject: [PATCH 052/117] Added proper authors and maintainers --- setup.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/setup.py b/setup.py index 13d6561b8e..e793de5558 100644 --- a/setup.py +++ b/setup.py @@ -7,14 +7,16 @@ from distutils.core import setup LICENSE = open('LICENSE').read() DESCRIPTION = open('description.rst') +OWNER_NAMES = 'emilmont, bogdanm' +OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='Mbed', version='0.0.1', description='Build and test system for mbed', long_description=DESCRIPTION, - author='Emilio Monti', - author_email='Author email', - maintainer='Bogdan Marinescu', - maintainer_email='Maintainer email', + author=OWNER_NAMES, + author_email=OWNER_EMAILS, + maintainer=OWNER_NAMES, + maintainer_email=OWNER_EMAILS, url='https://github.com/mbedmicro/mbed', license=LICENSE) From a73db1091ad6dfb68cc15a89307a61c60876e3f8 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 11:22:57 +0100 Subject: [PATCH 053/117] Lowercased name --- setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/setup.py b/setup.py index e793de5558..e71bccd7f0 100644 --- a/setup.py +++ b/setup.py @@ -10,7 +10,7 @@ DESCRIPTION = open('description.rst') OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' -setup(name='Mbed', +setup(name='mbed', version='0.0.1', description='Build and test system for mbed', long_description=DESCRIPTION, From 7932ccd4f66508a356c4f70ee39afee848f63adc Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 11:33:39 +0100 Subject: [PATCH 054/117] Updated version to 0.1 --- setup.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/setup.py b/setup.py index e71bccd7f0..500b34a2b0 100644 --- a/setup.py +++ b/setup.py @@ -11,7 +11,7 @@ OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.0.1', + version='0.1', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From fc39aaa42d2d7027971cd07bcdb77729ff012b31 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 11:40:11 +0100 Subject: [PATCH 055/117] Fixed description --- setup.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/setup.py b/setup.py index 500b34a2b0..6a38792137 100644 --- a/setup.py +++ b/setup.py @@ -6,12 +6,12 @@ PyPI package for the Mbed SDK from distutils.core import setup LICENSE = open('LICENSE').read() -DESCRIPTION = open('description.rst') +DESCRIPTION = open('description.rst').read() OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.1', + version='0.1.1', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From ceb103b7b2dc72df4acbff7adab05a1f9be3c70d Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 11:54:28 +0100 Subject: [PATCH 056/117] Added version 0.1.2 --- .gitignore | 5 ++++- setup.py | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/.gitignore b/.gitignore index 241c7708fd..3ee238383d 100644 --- a/.gitignore +++ b/.gitignore @@ -1,5 +1,8 @@ *.py[cod] +# Distribution dir +dist + # Private settings private_settings.py @@ -53,4 +56,4 @@ uVision Project/ debug.log # Ignore OS X Desktop Services Store files -.DS_Store \ No newline at end of file +.DS_Store diff --git a/setup.py b/setup.py index 6a38792137..2bb6981661 100644 --- a/setup.py +++ b/setup.py @@ -11,7 +11,7 @@ OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.1.1', + version='0.1.2', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From a826819ae944c7d91339e61016d1db7c36eaf545 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 12:01:53 +0100 Subject: [PATCH 057/117] Version 0.1.4 --- MANIFEST | 5 +++++ MANIFEST.in | 2 ++ __init__.py | 0 setup.py | 2 +- 4 files changed, 8 insertions(+), 1 deletion(-) create mode 100644 MANIFEST create mode 100644 MANIFEST.in create mode 100644 __init__.py diff --git a/MANIFEST b/MANIFEST new file mode 100644 index 0000000000..f9b216779d --- /dev/null +++ b/MANIFEST @@ -0,0 +1,5 @@ +# file GENERATED by distutils, do NOT edit +LICENSE +__init__.py +description.rst +setup.py diff --git a/MANIFEST.in b/MANIFEST.in new file mode 100644 index 0000000000..dc51a33e01 --- /dev/null +++ b/MANIFEST.in @@ -0,0 +1,2 @@ +include __init__.py LICENSE description.rst +graft workspace_tools libraries diff --git a/__init__.py b/__init__.py new file mode 100644 index 0000000000..e69de29bb2 diff --git a/setup.py b/setup.py index 2bb6981661..7913195110 100644 --- a/setup.py +++ b/setup.py @@ -11,7 +11,7 @@ OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.1.2', + version='0.1.4', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From 8aaa1b76a6bc7e4ee0b7728ae3f5f643604fe9f8 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 21 Oct 2013 14:21:42 +0300 Subject: [PATCH 058/117] Added auto synchronization for the u-blox GSM modem test Also changed the test to look more like the original VodafoneUSBModem SMS test (added another thread). --- .../tests/net/cellular/sms/ubloxusbgsm/main.cpp | 16 +++++++++++++++- workspace_tools/synch.py | 1 + 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp index 4a15d11ef6..7887ef3d96 100644 --- a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp @@ -1,10 +1,24 @@ #include "UBloxUSBGSMModem.h" #include "smstest.h" -int main() +void test(const void* data) { UbloxUSBGSMModem modem; smstest(modem); + while (true); +} + +int main() +{ + Thread testTask(test, NULL, osPriorityNormal, 1024 * 4); + DigitalOut led(LED1); + + while (true) + { + led = !led; + Thread::wait(1000); + } + return 0; } diff --git a/workspace_tools/synch.py b/workspace_tools/synch.py index dcfa0b3473..9dc1f7313c 100644 --- a/workspace_tools/synch.py +++ b/workspace_tools/synch.py @@ -63,6 +63,7 @@ OFFICIAL_CODE = ( ("CellularUSBModem", "net/cellular/CellularUSBModem"), ("UbloxUSBModem", "net/cellular/UbloxUSBModem"), ("UbloxModemHTTPClientTest", ["tests/net/cellular/http/common", "tests/net/cellular/http/ubloxusbgsm"]), + ("UbloxModemSMSTest", ["tests/net/cellular/sms/common", "tests/net/cellular/sms/ubloxusbgsm"]), ) From dfb472ceaf71380e3ea1f548e37b218f5d7afb41 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Mon, 21 Oct 2013 14:43:46 +0300 Subject: [PATCH 059/117] fixed invalid include name --- libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp index 7887ef3d96..550855fd86 100644 --- a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp @@ -1,4 +1,4 @@ -#include "UBloxUSBGSMModem.h" +#include "UbloxUSBGSMModem.h" #include "smstest.h" void test(const void* data) From 69d823fcc1e6cf52ddc2cba82223fea1d643ff76 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Mon, 21 Oct 2013 14:49:00 +0100 Subject: [PATCH 060/117] Issued version 0.1.5 --- MANIFEST | 132 ++++++++++++++++++++++++++++++++++++++++++++++++++++ MANIFEST.in | 2 +- setup.py | 2 +- 3 files changed, 134 insertions(+), 2 deletions(-) diff --git a/MANIFEST b/MANIFEST index f9b216779d..e1398a5a9b 100644 --- a/MANIFEST +++ b/MANIFEST @@ -3,3 +3,135 @@ LICENSE __init__.py description.rst setup.py +workspace_tools/__init__.py +workspace_tools/autotest.py +workspace_tools/build.py +workspace_tools/build_api.py +workspace_tools/build_release.py +workspace_tools/client.py +workspace_tools/export_test.py +workspace_tools/hooks.py +workspace_tools/libraries.py +workspace_tools/make.py +workspace_tools/options.py +workspace_tools/patch.py +workspace_tools/paths.py +workspace_tools/project.py +workspace_tools/server.py +workspace_tools/settings.py +workspace_tools/size.py +workspace_tools/syms.py +workspace_tools/synch.py +workspace_tools/targets.py +workspace_tools/tests.py +workspace_tools/utils.py +workspace_tools/data/__init__.py +workspace_tools/data/example_test_spec.json +workspace_tools/data/support.py +workspace_tools/data/rpc/RPCClasses.h +workspace_tools/data/rpc/class.cpp +workspace_tools/debugger/README.md +workspace_tools/debugger/__init__.py +workspace_tools/debugger/setup.py +workspace_tools/debugger/binaries/l1_kl25z.bin +workspace_tools/debugger/binaries/l1_lpc11u24.bin +workspace_tools/debugger/binaries/l1_lpc1768.bin +workspace_tools/debugger/binaries/l1_lpc800.bin +workspace_tools/debugger/elf_files/lpc11u24_l1_gcc_arm.elf +workspace_tools/debugger/elf_files/lpc1768_l1_gcc_arm.elf +workspace_tools/debugger/pyOCD/__init__.py +workspace_tools/debugger/pyOCD/board/__init__.py +workspace_tools/debugger/pyOCD/board/board.py +workspace_tools/debugger/pyOCD/board/mbed_board.py +workspace_tools/debugger/pyOCD/flash/__init__.py +workspace_tools/debugger/pyOCD/flash/flash.py +workspace_tools/debugger/pyOCD/flash/flash_kl25z.py +workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py +workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py +workspace_tools/debugger/pyOCD/flash/flash_lpc800.py +workspace_tools/debugger/pyOCD/gdbserver/__init__.py +workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py +workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py +workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py +workspace_tools/debugger/pyOCD/interface/__init__.py +workspace_tools/debugger/pyOCD/interface/interface.py +workspace_tools/debugger/pyOCD/interface/pyusb_backend.py +workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py +workspace_tools/debugger/pyOCD/target/__init__.py +workspace_tools/debugger/pyOCD/target/cortex_m.py +workspace_tools/debugger/pyOCD/target/target.py +workspace_tools/debugger/pyOCD/target/target_kl25z.py +workspace_tools/debugger/pyOCD/target/target_lpc11u24.py +workspace_tools/debugger/pyOCD/target/target_lpc1768.py +workspace_tools/debugger/pyOCD/target/target_lpc800.py +workspace_tools/debugger/pyOCD/transport/__init__.py +workspace_tools/debugger/pyOCD/transport/cmsis_dap.py +workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py +workspace_tools/debugger/pyOCD/transport/transport.py +workspace_tools/debugger/test/basic_test.py +workspace_tools/debugger/test/gdb_test.py +workspace_tools/dev/__init__.py +workspace_tools/dev/dsp_fir.py +workspace_tools/dev/rpc_classes.py +workspace_tools/export/__init__.py +workspace_tools/export/codered.py +workspace_tools/export/codered_lpc1768_cproject.tmpl +workspace_tools/export/codered_lpc1768_project.tmpl +workspace_tools/export/codered_lpc4088_cproject.tmpl +workspace_tools/export/codered_lpc4088_project.tmpl +workspace_tools/export/codesourcery.py +workspace_tools/export/codesourcery_lpc1768.tmpl +workspace_tools/export/ds5_5.py +workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl +workspace_tools/export/ds5_5_lpc11u24.launch.tmpl +workspace_tools/export/ds5_5_lpc11u24.project.tmpl +workspace_tools/export/ds5_5_lpc1768.cproject.tmpl +workspace_tools/export/ds5_5_lpc1768.launch.tmpl +workspace_tools/export/ds5_5_lpc1768.project.tmpl +workspace_tools/export/exporters.py +workspace_tools/export/gcc_arm_lpc1768.tmpl +workspace_tools/export/gccarm.py +workspace_tools/export/iar.ewp.tmpl +workspace_tools/export/iar.eww.tmpl +workspace_tools/export/iar.py +workspace_tools/export/uvision4.py +workspace_tools/export/uvision4_kl25z.uvopt.tmpl +workspace_tools/export/uvision4_kl25z.uvproj.tmpl +workspace_tools/export/uvision4_lpc1114.uvopt.tmpl +workspace_tools/export/uvision4_lpc1114.uvproj.tmpl +workspace_tools/export/uvision4_lpc11c24.uvopt.tmpl +workspace_tools/export/uvision4_lpc11c24.uvproj.tmpl +workspace_tools/export/uvision4_lpc11u24.uvopt.tmpl +workspace_tools/export/uvision4_lpc11u24.uvproj.tmpl +workspace_tools/export/uvision4_lpc1347.uvopt.tmpl +workspace_tools/export/uvision4_lpc1347.uvproj.tmpl +workspace_tools/export/uvision4_lpc1768.uvopt.tmpl +workspace_tools/export/uvision4_lpc1768.uvproj.tmpl +workspace_tools/export/uvision4_lpc4088.uvopt.tmpl +workspace_tools/export/uvision4_lpc4088.uvproj.tmpl +workspace_tools/export/uvision4_lpc812.uvopt.tmpl +workspace_tools/export/uvision4_lpc812.uvproj.tmpl +workspace_tools/host_tests/__init__.py +workspace_tools/host_tests/echo.py +workspace_tools/host_tests/host_test.py +workspace_tools/host_tests/mbedrpc.py +workspace_tools/host_tests/net_test.py +workspace_tools/host_tests/rpc.py +workspace_tools/host_tests/tcpecho_client.py +workspace_tools/host_tests/tcpecho_server.py +workspace_tools/host_tests/tcpecho_server_loop.py +workspace_tools/host_tests/udpecho_client.py +workspace_tools/host_tests/udpecho_server.py +workspace_tools/host_tests/example/BroadcastReceive.py +workspace_tools/host_tests/example/BroadcastSend.py +workspace_tools/host_tests/example/MulticastReceive.py +workspace_tools/host_tests/example/MulticastSend.py +workspace_tools/host_tests/example/TCPEchoClient.py +workspace_tools/host_tests/example/TCPEchoServer.py +workspace_tools/host_tests/example/UDPEchoClient.py +workspace_tools/host_tests/example/UDPEchoServer.py +workspace_tools/host_tests/example/__init__.py +workspace_tools/toolchains/__init__.py +workspace_tools/toolchains/arm.py +workspace_tools/toolchains/gcc.py +workspace_tools/toolchains/iar.py diff --git a/MANIFEST.in b/MANIFEST.in index dc51a33e01..2d5cb97854 100644 --- a/MANIFEST.in +++ b/MANIFEST.in @@ -1,2 +1,2 @@ include __init__.py LICENSE description.rst -graft workspace_tools libraries +graft workspace_tools diff --git a/setup.py b/setup.py index 7913195110..2365e404d6 100644 --- a/setup.py +++ b/setup.py @@ -11,7 +11,7 @@ OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.1.4', + version='0.1.5', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From 6b6bc938c51269a272e29cab256a15bc9ab0e34f Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Mon, 21 Oct 2013 16:59:08 +0100 Subject: [PATCH 061/117] pyOCD development moved to https://github.com/OpenHDK/pyOCD --- workspace_tools/debugger/README.md | 148 ----- workspace_tools/debugger/__init__.py | 16 - .../debugger/binaries/l1_kl25z.bin | Bin 1904 -> 0 bytes .../debugger/binaries/l1_lpc11u24.bin | Bin 3828 -> 0 bytes .../debugger/binaries/l1_lpc1768.bin | Bin 4132 -> 0 bytes .../debugger/binaries/l1_lpc800.bin | Bin 2592 -> 0 bytes .../elf_files/lpc11u24_l1_gcc_arm.elf | Bin 143556 -> 0 bytes .../debugger/elf_files/lpc1768_l1_gcc_arm.elf | Bin 154417 -> 0 bytes workspace_tools/debugger/pyOCD/__init__.py | 16 - .../debugger/pyOCD/board/__init__.py | 18 - workspace_tools/debugger/pyOCD/board/board.py | 60 -- .../debugger/pyOCD/board/mbed_board.py | 160 ----- .../debugger/pyOCD/flash/__init__.py | 27 - workspace_tools/debugger/pyOCD/flash/flash.py | 145 ----- .../debugger/pyOCD/flash/flash_kl25z.py | 92 --- .../debugger/pyOCD/flash/flash_lpc11u24.py | 57 -- .../debugger/pyOCD/flash/flash_lpc1768.py | 61 -- .../debugger/pyOCD/flash/flash_lpc800.py | 56 -- .../debugger/pyOCD/gdbserver/__init__.py | 18 - .../debugger/pyOCD/gdbserver/gdb_socket.py | 55 -- .../debugger/pyOCD/gdbserver/gdb_websocket.py | 51 -- .../debugger/pyOCD/gdbserver/gdbserver.py | 594 ------------------ .../debugger/pyOCD/interface/__init__.py | 23 - .../debugger/pyOCD/interface/interface.py | 45 -- .../debugger/pyOCD/interface/pyusb_backend.py | 138 ---- .../pyOCD/interface/pywinusb_backend.py | 116 ---- .../debugger/pyOCD/target/__init__.py | 29 - .../debugger/pyOCD/target/cortex_m.py | 554 ---------------- .../debugger/pyOCD/target/target.py | 82 --- .../debugger/pyOCD/target/target_kl25z.py | 57 -- .../debugger/pyOCD/target/target_lpc11u24.py | 24 - .../debugger/pyOCD/target/target_lpc1768.py | 40 -- .../debugger/pyOCD/target/target_lpc800.py | 24 - .../debugger/pyOCD/transport/__init__.py | 21 - .../debugger/pyOCD/transport/cmsis_dap.py | 229 ------- .../pyOCD/transport/cmsis_dap_core.py | 315 ---------- .../debugger/pyOCD/transport/transport.py | 64 -- workspace_tools/debugger/setup.py | 33 - workspace_tools/debugger/test/basic_test.py | 165 ----- workspace_tools/debugger/test/gdb_test.py | 36 -- 40 files changed, 3569 deletions(-) delete mode 100644 workspace_tools/debugger/README.md delete mode 100644 workspace_tools/debugger/__init__.py delete mode 100644 workspace_tools/debugger/binaries/l1_kl25z.bin delete mode 100644 workspace_tools/debugger/binaries/l1_lpc11u24.bin delete mode 100644 workspace_tools/debugger/binaries/l1_lpc1768.bin delete mode 100644 workspace_tools/debugger/binaries/l1_lpc800.bin delete mode 100644 workspace_tools/debugger/elf_files/lpc11u24_l1_gcc_arm.elf delete mode 100644 workspace_tools/debugger/elf_files/lpc1768_l1_gcc_arm.elf delete mode 100644 workspace_tools/debugger/pyOCD/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/board/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/board/board.py delete mode 100644 workspace_tools/debugger/pyOCD/board/mbed_board.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/flash.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/flash_kl25z.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py delete mode 100644 workspace_tools/debugger/pyOCD/flash/flash_lpc800.py delete mode 100644 workspace_tools/debugger/pyOCD/gdbserver/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py delete mode 100644 workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py delete mode 100644 workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py delete mode 100644 workspace_tools/debugger/pyOCD/interface/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/interface/interface.py delete mode 100644 workspace_tools/debugger/pyOCD/interface/pyusb_backend.py delete mode 100644 workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py delete mode 100644 workspace_tools/debugger/pyOCD/target/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/target/cortex_m.py delete mode 100644 workspace_tools/debugger/pyOCD/target/target.py delete mode 100644 workspace_tools/debugger/pyOCD/target/target_kl25z.py delete mode 100644 workspace_tools/debugger/pyOCD/target/target_lpc11u24.py delete mode 100644 workspace_tools/debugger/pyOCD/target/target_lpc1768.py delete mode 100644 workspace_tools/debugger/pyOCD/target/target_lpc800.py delete mode 100644 workspace_tools/debugger/pyOCD/transport/__init__.py delete mode 100644 workspace_tools/debugger/pyOCD/transport/cmsis_dap.py delete mode 100644 workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py delete mode 100644 workspace_tools/debugger/pyOCD/transport/transport.py delete mode 100644 workspace_tools/debugger/setup.py delete mode 100644 workspace_tools/debugger/test/basic_test.py delete mode 100644 workspace_tools/debugger/test/gdb_test.py diff --git a/workspace_tools/debugger/README.md b/workspace_tools/debugger/README.md deleted file mode 100644 index 4155499d6d..0000000000 --- a/workspace_tools/debugger/README.md +++ /dev/null @@ -1,148 +0,0 @@ -pyOCD -===== -pyOCD is an Open Source python library in order to program and -debug ARM Cortex-M microcontrollers using CMSIS-DAP. You can either -use a python interpreter to control your target or start a GDB server. - - -What allows this library? -------------------------- -1. From a python interpretor: - * halt, step, resume execution - * read/write memory - * read/write block memory - * read-write core register - * set/remove hardware breakpoints - * flash new binary - * reset - -2. From a GDB client, you have all the features provided by gdb: - * load a .elf file - * read/write memory - * read/write core register - * set/remove hardware breakpoints - * high level stepping - * ... - - -DEPENDANCIES: -------------- -pyOCD relies on external libraries: -* pyOCD has been tested with python 2.7 -* distutils -* Windows: [pyWinUSB](https://github.com/rene-aguirre/pywinusb): - ``` - $ cd /path-to-pywinusb/ - $ python setup.py install - ``` -* Linux: [pyUSB](https://github.com/walac/pyusb): - ``` - $ sudo apt-get install python libusb-1.0-0-dev - $ cd /path-to-pyusb/ - $ sudo python setup.py install - ``` -* Mac: - - So far Mac OS X is not supported - - -Installation: -------------- - - $ cd /path-to-pyOCD/ - $ python setup.py install - - -Examples: ---------- -## Tests -A series of tests are on the test directory: -* basic_test.py: simple test that checks: - 1. read/write core registers - 2. read/write memory - 3. stop/resume/step the execution - 4. reset the target - 5. flash a binary -* gdb_test.py: launch a gdbserver - -## Hello World example: - - from pyOCD.board import MbedBoard - - import logging - logging.basicConfig(level=logging.INFO) - - board = MbedBoard.chooseBoard() - - target = board.target - flash = board.flash - target.resume() - target.halt() - print "pc: 0x%X" % target.readCoreRegister("pc") - pc: 0xA64 - target.step() - print "pc: 0x%X" % target.readCoreRegister("pc") - pc: 0xA30 - target.step() - print "pc: 0x%X" % target.readCoreRegister("pc") - pc: 0xA32 - flash.flashBinary("binaries/l1_lpc1768.bin") - print "pc: 0x%X" % target.readCoreRegister("pc") - pc: 0x10000000 - target.reset() - target.halt() - print "pc: 0x%X" % target.readCoreRegister("pc") - pc: 0xAAC - board.uninit() - -##GDB server example: -Python: - - from pyOCD.gdbserver import GDBServer - from pyOCD.board import MbedBoard - - import logging - logging.basicConfig(level=logging.INFO) - - board = MbedBoard.chooseBoard() - - # start gdbserver - gdb = GDBServer(board, 3333) - -gdb server: - - arm-none-eabi-gdb basic.elf - - target remote localhost:3333 - load - continue - - -Architecture: -------------- - -# interface: -An interface does the link between the target and the computer. -This package contains basic functions to write and read data to and from -an interface. You can inherit from Interface and overwrite read(), write(),... -Then declare your interface in INTERFACE (in pyOCD.interface.__init__.py) - -# target: -A target defines basic functionalities such as step, resume, halt, readMemory,... -You can inherit from Target to implement your own functions. -Then declare your target in TARGET (in pyOCD.target.__init__.py) - -# transport: -Defines the transport used to communicate. In particular, you can find CMSIS-DAP. -Defines functions such as memWriteAP, memReadAP, writeDP, readDP,... -You can inherit from Transport and implement your own functions. -Then declare your transport in TRANSPORT (in pyOCD.transport.__init__.py) - -# flash: -Contains flash algorithm in order to flash a new binary into the target. - -# gdbserver: -Start a GDB server. The server listens on a specific port. You can then -connect a GDB client to it and debug/program the target - -Then you can debug a board which is composed by an interface, a target, a transport and a flash \ No newline at end of file diff --git a/workspace_tools/debugger/__init__.py b/workspace_tools/debugger/__init__.py deleted file mode 100644 index 74a91f20af..0000000000 --- a/workspace_tools/debugger/__init__.py +++ /dev/null @@ -1,16 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - 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return mbed_boards - - if (first == True): - logging.info("Waiting for a USB device connected") - first = False - - @staticmethod - def chooseBoard(transport = "cmsis_dap", blocking = True, return_first = False): - """ - Allow you to select a board among all boards connected - """ - all_mbeds = MbedBoard.getAllConnectedBoards(transport, False, blocking) - - if all_mbeds == None: - return None - - index = 0 - for mbed in all_mbeds: - print "%d => %s" % (index, mbed.getInfo()) - index += 1 - - if len(all_mbeds) == 1: - all_mbeds[0].init() - return all_mbeds[0] - - try: - ch = 0 - if not return_first: - while True: - ch = sys.stdin.readline() - sys.stdin.flush() - if (int(ch) < 0) or (int(ch) >= len(all_mbeds)): - logging.info("BAD CHOICE: %d", int(ch)) - index = 0 - for mbed in all_mbeds: - print "%d => %s" % ( index, mbed.getInfo()) - index += 1 - else: - break - # close all others mbed connected - for mbed in all_mbeds: - if mbed != all_mbeds[int(ch)]: - mbed.interface.close() - - all_mbeds[int(ch)].init() - return all_mbeds[int(ch)] - except Exception as e: - try: - print e - except: - pass - finally: - for mbed in all_mbeds: - mbed.interface.close() diff --git a/workspace_tools/debugger/pyOCD/flash/__init__.py b/workspace_tools/debugger/pyOCD/flash/__init__.py deleted file mode 100644 index bb29a295ba..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/__init__.py +++ /dev/null @@ -1,27 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from flash_lpc1768 import Flash_lpc1768 -from flash_kl25z import Flash_kl25z -from flash_lpc11u24 import Flash_lpc11u24 -from flash_lpc800 import Flash_lpc800 - -FLASH = {'flash_lpc1768': Flash_lpc1768, - 'flash_kl25z': Flash_kl25z, - 'flash_lpc11u24': Flash_lpc11u24, - 'flash_lpc800': Flash_lpc800 - } \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/flash/flash.py b/workspace_tools/debugger/pyOCD/flash/flash.py deleted file mode 100644 index 761e19e572..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/flash.py +++ /dev/null @@ -1,145 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from pyOCD.target.target import TARGET_RUNNING -import logging -from struct import unpack -from time import time -""" -import os,sys -parentdir = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) -sys.path.insert(0,parentdir) -""" - -class Flash(): - """ - This class is responsible to flash a new binary in a target - """ - - def __init__(self, target, flash_algo, memoryMapXML): - self.target = target - self.flash_algo = flash_algo - self.end_flash_algo = flash_algo['load_address'] + len(flash_algo)*4 - self.begin_stack = flash_algo['begin_stack'] - self.begin_data = flash_algo['begin_data'] - self.static_base = flash_algo['static_base'] - self.page_size = flash_algo['page_size'] - self.memoryMapXML = memoryMapXML - - def init(self): - """ - Download the flash algorithm in RAM - """ - self.target.halt() - self.target.setTargetState("PROGRAM") - - # download flash algo in RAM - self.target.writeBlockMemoryAligned32(self.flash_algo['load_address'], self.flash_algo['instructions']) - - # update core register to execute the init subroutine - self.updateCoreRegister(0, 0, 0, 0, self.flash_algo['pc_init']) - # resume and wait until the breakpoint is hit - self.target.resume() - while(self.target.getState() == TARGET_RUNNING): - pass - - return - - def eraseAll(self): - """ - Erase all the flash - """ - - # update core register to execute the eraseAll subroutine - self.updateCoreRegister(0, 0, 0, 0, self.flash_algo['pc_eraseAll']) - - # resume and wait until the breakpoint is hit - self.target.resume() - while(self.target.getState() == TARGET_RUNNING): - pass - - return - - def programPage(self, flashPtr, bytes): - """ - Flash one page - """ - # first transfer in RAM - self.target.writeBlockMemoryUnaligned8(self.begin_data, bytes) - - # update core register to execute the program_page subroutine - self.updateCoreRegister(flashPtr, self.page_size, self.begin_data, 0, self.flash_algo['pc_program_page']) - - # resume and wait until the breakpoint is hit - self.target.resume() - while(self.target.getState() == TARGET_RUNNING): - pass - return - - def flashBinary(self, path_file): - """ - Flash a binary - """ - f = open(path_file, "rb") - - start = time() - self.init() - logging.debug("flash init OK: pc: 0x%X", self.target.readCoreRegister('pc')) - self.eraseAll() - logging.debug("eraseAll OK: pc: 0x%X", self.target.readCoreRegister('pc')) - - """ - bin = open(os.path.join(parentdir, 'res', 'good_bin.txt'), "w+") - """ - - flashPtr = 0 - nb_bytes = 0 - try: - bytes_read = f.read(1024) - while bytes_read: - bytes_read = unpack(str(len(bytes_read)) + 'B', bytes_read) - nb_bytes += len(bytes_read) - # page download - self.programPage(flashPtr, bytes_read) - """ - i = 0 - while (i < len(bytes_read)): - bin.write(str(list(bytes_read[i:i+16])) + "\n") - i += 16 - """ - flashPtr += 1024 - - bytes_read = f.read(1024) - finally: - f.close() - """ - bin.close() - """ - end = time() - logging.info("%f kbytes flashed in %f seconds ===> %f kbytes/s" %(nb_bytes/1000, end-start, nb_bytes/(1000*(end - start)))) - - def updateCoreRegister(self, r0, r1, r2, r3, pc): - self.target.writeCoreRegister('pc', pc) - self.target.writeCoreRegister('r0', r0) - self.target.writeCoreRegister('r1', r1) - self.target.writeCoreRegister('r2', r2) - self.target.writeCoreRegister('r3', r3) - self.target.writeCoreRegister('r9', self.static_base) - self.target.writeCoreRegister('sp', self.begin_stack) - self.target.writeCoreRegister('lr', self.flash_algo['load_address'] + 1) - return - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/flash/flash_kl25z.py b/workspace_tools/debugger/pyOCD/flash/flash_kl25z.py deleted file mode 100644 index 805fa544b3..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/flash_kl25z.py +++ /dev/null @@ -1,92 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from flash import Flash - -flash_algo = { 'load_address' : 0x20000000, - 'instructions' : [ - 0xE00ABE00, 0x062D780D, 0x24084068, 0xD3000040, 0x1E644058, 0x1C49D1FA, 0x2A001E52, 0x4770D1F2, - 0xb510492f, 0x60084449, 0x2100482e, 0x482f6001, 0x44484a2d, 0x22016002, 0x04926041, 0x02926082, - 0x220560c2, 0x61420692, 0x03122201, 0x46026182, 0x70113220, 0x62411e49, 0xf929f000, 0xd0002800, - 0xbd102001, 0x47702000, 0xb5084a21, 0x0349447a, 0x0c0a9200, 0x481d4601, 0x44482300, 0xf9b7f000, - 0xd0002800, 0xbd082001, 0x4919b510, 0x48174479, 0x44483920, 0xf891f000, 0xd0002800, 0xbd102001, - 0x4b13b510, 0x4601447b, 0x22014810, 0x02923b38, 0xf0004448, 0x2800f8b4, 0x2001d000, 0xb538bd10, - 0x490b460c, 0x39584479, 0x46019100, 0x46134807, 0x44484622, 0xf948f000, 0xd0002800, 0xbd382001, - 0x00000004, 0x40048100, 0x40020000, 0x00000008, 0x00000085, 0x4604b570, 0x25006800, 0x061b7803, - 0x2370d5fc, 0x20007003, 0x0003e03a, 0xfa60f000, 0x0f0b070c, 0x1f1b1713, 0x2f2b2723, 0x68263633, - 0x71f37813, 0x6826e02a, 0x71b37853, 0x6826e026, 0x71737893, 0x6826e022, 0x713378d3, 0x6826e01e, - 0x72f37913, 0x6826e01a, 0x72b37953, 0x6826e016, 0x72737993, 0x6826e012, 0x723379d3, 0x6826e00e, - 0x73f37a13, 0x6826e00a, 0x73b37a53, 0x6826e006, 0x73737a93, 0x6826e002, 0x73337ad3, 0xb2c01c40, - 0xd9c24288, 0x20806821, 0xe0037008, 0x1c416a60, 0x4780d000, 0x78006820, 0xd5f70600, 0x78006820, - 0xd5010681, 0xe0062504, 0xd50106c1, 0xe0022508, 0xd00007c0, 0x46282510, 0xb508bd70, 0x2244460b, - 0x700a4669, 0x2100466a, 0xbd084798, 0x4614b538, 0xd002078a, 0x300120ff, 0x6843bd38, 0xd803428b, - 0x189a6882, 0xd80d428a, 0x428a68c2, 0x6903d803, 0x428b18d3, 0x2002d801, 0x1a89bd38, 0x05d22201, - 0xe0001889, 0x22081ac9, 0x701a466b, 0x705a0c0a, 0x709a0a0a, 0x466a70d9, 0x47a02103, 0xb5ffbd38, - 0x4615b081, 0x27019a01, 0x26006852, 0x02bf1948, 0xd804428a, 0x689b9b01, 0x428318d3, 0x9a01d20f, - 0x428a68d2, 0x9b01d804, 0x18d3691b, 0xd2014283, 0xe0292602, 0x21011a88, 0x184405c9, 0x1a8ce000, - 0x46204639, 0xf907f000, 0xd0022900, 0x360126ff, 0x4639e01a, 0xf0004628, 0x2900f8fe, 0x2601d012, - 0x2009e012, 0x70084669, 0x70480c20, 0x70880a20, 0x9b0470cc, 0x2103466a, 0x47989801, 0xd1030006, - 0x19e41bed, 0xd1ec2d00, 0xb0054630, 0xb5f0bdf0, 0x24006801, 0x0612780a, 0x2270d5fc, 0x6802700a, - 0x71d12103, 0x22806801, 0x6803718a, 0x71592100, 0x23fc6805, 0x6803712b, 0x680373d9, 0x6802701a, - 0x061b7813, 0x7a55d5fc, 0x07177a12, 0x0f3f2201, 0x105603d2, 0xf000003b, 0x0910f96b, 0x09100e0b, - 0x10090909, 0x09090e1f, 0x11090909, 0xe0056102, 0x03522203, 0x6106e7fa, 0x6101e000, 0x0f12072a, - 0xf0000013, 0x0c10f955, 0x120f0c0c, 0x1d1b1815, 0x0c0c0c1f, 0x0d0c0c0c, 0x03522201, 0x61c1e7e6, - 0xbdf04620, 0x02c92101, 0x2101e7f9, 0xe7f60289, 0x02492101, 0x21ffe7f3, 0xe7f03101, 0xe7ee2180, - 0xe7ec2140, 0xe7ea2120, 0x4607b5fe, 0x461d4616, 0x198a2000, 0xd002078b, 0x300120ff, 0x07b3bdfe, - 0x2001d001, 0x687bbdfe, 0xd803428b, 0x191c68bc, 0xd20d4294, 0x428b68fb, 0x693cd803, 0x4294191c, - 0x2002d201, 0x2201bdfe, 0x05d21ac9, 0xe01b188c, 0xe0191acc, 0x46692006, 0x0c207008, 0x0a207048, - 0x70cc7088, 0x710878e8, 0x714878a8, 0x71887868, 0x71c87828, 0x466a9b08, 0x46382107, 0x28004798, - 0x1d24d1e0, 0x1d2d1f36, 0xd1e32e00, 0xb5febdfe, 0x46044615, 0x00a86842, 0x461e1840, 0xd803428a, - 0x18d368a3, 0xd808428b, 0x428b68e3, 0x6927d803, 0x428b19db, 0x2002d801, 0x4282bdfe, 0x68a3d805, - 0x428318d3, 0x1a8fd301, 0x68e2e00a, 0xd9034282, 0x18d36923, 0xd3ee4283, 0x21011a88, 0x184705c9, - 0x46382104, 0xf817f000, 0xd0022900, 0x300120ff, 0x2001bdfe, 0x70084669, 0x70480c38, 0x70880a38, - 0x0a2870cf, 0x714d7108, 0x9b08718e, 0x2106466a, 0x47984620, 0x2200bdfe, 0x428b0903, 0x0a03d32c, - 0xd311428b, 0x469c2300, 0x4603e04e, 0xd43c430b, 0x08432200, 0xd331428b, 0x428b0903, 0x0a03d31c, - 0xd301428b, 0xe03f4694, 0x428b09c3, 0x01cbd301, 0x41521ac0, 0x428b0983, 0x018bd301, 0x41521ac0, - 0x428b0943, 0x014bd301, 0x41521ac0, 0x428b0903, 0x010bd301, 0x41521ac0, 0x428b08c3, 0x00cbd301, - 0x41521ac0, 0x428b0883, 0x008bd301, 0x41521ac0, 0x428b0843, 0x004bd301, 0x41521ac0, 0xd2001a41, - 0x41524601, 0x47704610, 0x0fcae05d, 0x4249d000, 0xd3001003, 0x40534240, 0x469c2200, 0x428b0903, - 0x0a03d32d, 0xd312428b, 0x018922fc, 0x0a03ba12, 0xd30c428b, 0x11920189, 0xd308428b, 0x11920189, - 0xd304428b, 0xd03a0189, 0xe0001192, 0x09c30989, 0xd301428b, 0x1ac001cb, 0x09834152, 0xd301428b, - 0x1ac0018b, 0x09434152, 0xd301428b, 0x1ac0014b, 0x09034152, 0xd301428b, 0x1ac0010b, 0x08c34152, - 0xd301428b, 0x1ac000cb, 0x08834152, 0xd301428b, 0x1ac0008b, 0xd2d94152, 0x428b0843, 0x004bd301, - 0x41521ac0, 0xd2001a41, 0x46634601, 0x105b4152, 0xd3014610, 0x2b004240, 0x4249d500, 0x46634770, - 0xd300105b, 0xb5014240, 0x46c02000, 0xbd0246c0, 0x4674b430, 0x78251e64, 0x42ab1c64, 0x461dd200, - 0x005b5d63, 0xbc3018e3, 0x00004718, 0xfffffffe - ], - 'pc_init' : 0x20000020, - 'pc_eraseAll' : 0x20000088, - 'pc_program_page' : 0x200000be, - 'begin_stack' : 0x20001000, - 'begin_data' : 0x20002000, - 'static_base' : 0x200005ec, - 'page_size' : 1024 - }; - -memoryMapXML = "" \ - "" \ - "" \ - " 0x400" \ - " " \ - "" - - -class Flash_kl25z(Flash): - - def __init__(self, target): - Flash.__init__(self, target, flash_algo, memoryMapXML) - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py b/workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py deleted file mode 100644 index 5d056c0892..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py +++ /dev/null @@ -1,57 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from flash import Flash - -flash_algo = { 'load_address' : 0x10000000, - 'instructions' : [ - 0xe00abe00, 0x062d780d, 0x24084068, 0xd3000040, 0x1e644058, 0x1c49d1fa, 0x2a001e52, 0x4770d1f2, - 0x7803e005, 0x42931c40, 0x2001d001, 0x1e494770, 0x2000d2f7, 0x00004770, 0x47700b00, 0x484e494f, - 0x60084449, 0x2100484e, 0x22016301, 0x63416342, 0x6b416342, 0xd0fc07c9, 0x49496382, 0x39402002, - 0x20007008, 0x20004770, 0xb5f84770, 0x20324c45, 0x2500444c, 0x46222607, 0x4621c261, 0x4f423114, - 0x91004620, 0x696047b8, 0xd10c2800, 0x46212034, 0x483ac161, 0x68004448, 0x462060e0, 0x47b89900, - 0x28006960, 0x2001d000, 0xb5f8bdf8, 0x0b044d35, 0x2032444d, 0x4629606c, 0x311460ac, 0x4e326028, - 0x4628460f, 0x696847b0, 0xd10d2800, 0x2034606c, 0x602860ac, 0x46394829, 0x68004448, 0x462860e8, - 0x696847b0, 0xd0002800, 0xbdf82001, 0x0006b5f8, 0xd11e4614, 0x0180200b, 0x6bc11820, 0x42814823, - 0x4823d038, 0xd0354281, 0x42814822, 0x4822d032, 0xd02f4281, 0x68206861, 0x184068e2, 0x188968a1, - 0x69211840, 0x69611840, 0x69a11840, 0x42401840, 0x4d1461e0, 0x444d0b30, 0x60682132, 0x60a86029, - 0x31144629, 0x46284f10, 0x47b89100, 0x28006968, 0x606ed110, 0x60ac2033, 0x20016028, 0x60e80280, - 0x44484806, 0x61286800, 0x99004628, 0x696847b8, 0xd0002800, 0xbdf82001, 0x00002ee0, 0x00000004, - 0x40048040, 0x00000008, 0x1fff1ff1, 0x4e697370, 0x12345678, 0x87654321, 0x43218765, 0x00000000, - 0x00000000 - ], - 'pc_init' : 0x1000003d, - 'pc_eraseAll' : 0x1000006b, - 'pc_program_page' : 0x100000ed, - 'begin_data' : 0x100001c4, - 'begin_stack' : 0x10001000, - 'static_base' : 0x1000019c, - 'page_size' : 1024 - }; - -memoryMapXML = "" \ - "" \ - "" \ - " 0x400" \ - " " \ - "" - - -class Flash_lpc11u24(Flash): - - def __init__(self, target): - Flash.__init__(self, target, flash_algo, memoryMapXML) \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py b/workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py deleted file mode 100644 index e48738f3ac..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py +++ /dev/null @@ -1,61 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from flash import Flash - -flash_algo = { 'load_address' : 0x10000000, - 'instructions' : [ - 0xe00abe00, 0x062d780d, 0x24084068, 0xd3000040, 0x1e644058, 0x1c49d1fa, 0x2a001e52, 0x4770d1f2, - 0x7803e005, 0x42931c40, 0x2001d001, 0x1e494770, 0x2000d2f7, 0x00004770, 0x28100b00, 0x210ed302, - 0x00d0eb01, 0x486c4770, 0x7801b510, 0x0102f021, 0x22aa7001, 0x23557302, 0x78017303, 0x0101f021, - 0x73027001, 0xf8d07303, 0xf0411120, 0xf8c00120, 0xf1a01120, 0xf8d00080, 0x064911a0, 0xf100d5fb, - 0x24010080, 0x408cf880, 0x0113f04f, 0x73026041, 0x78017303, 0x0101f041, 0x73027001, 0xf1a07303, - 0xf8d00080, 0x01491088, 0xf100d5fb, 0x2107006d, 0x1097f880, 0x0109f04f, 0x109bf880, 0xf0417cc1, - 0x74c10102, 0x77c377c2, 0x4c2df800, 0xf64e494b, 0x44492060, 0xf04f6008, 0xbd100000, 0x47702000, - 0x41f0e92d, 0x20324c46, 0x2500444c, 0xe884271d, 0xf10400a1, 0x4e430114, 0x46204688, 0x696047b0, - 0x2034b960, 0x00a1e884, 0x4641483c, 0x68004448, 0x462060e0, 0x696047b0, 0xd0002800, 0xe8bd2001, - 0xe92d81f0, 0xf7ff41f0, 0x4d35ff87, 0x444d4604, 0xe9c52032, 0xf1050400, 0x4e320114, 0x4628460f, - 0x47b060ac, 0xb9686968, 0xe9c52034, 0x482b0400, 0x444860ac, 0x68004639, 0x462860e8, 0x696847b0, - 0xd0dc2800, 0xe7da2001, 0x41f0e92d, 0x46140006, 0x4925d11d, 0x02fcf8d4, 0xd03a4288, 0x42884923, - 0x4923d037, 0xd0344288, 0x4131ea4f, 0xd0304288, 0x0100e9d4, 0xe9d44408, 0x44111202, 0x69214408, - 0x69614408, 0x69a14408, 0x42404408, 0x463061e0, 0xff42f7ff, 0x21324d12, 0x4f12444d, 0x1000e9c5, - 0x0114f105, 0x468860a8, 0x47b84628, 0xb9806968, 0xe9c52033, 0xf44f0600, 0xe9c56080, 0x48074002, - 0x44484641, 0x61286800, 0x47b84628, 0x28006968, 0x2001d095, 0x0000e793, 0x400fc080, 0x00000004, - 0x00000008, 0x1fff1ff1, 0x4e697370, 0x12345678, 0x87654321, 0x00000000, 0x00000000 - ], - 'pc_init' : 0x10000047, - 'pc_eraseAll' : 0x100000e1, - 'pc_program_page' : 0x10000169, - 'begin_data' : 0x1000023c, - 'begin_stack' : 0x10001000, - 'static_base' : 0x10000214, - 'page_size' : 1024 - }; - -memoryMapXML = "" \ - "" \ - "" \ - " 0x400" \ - " " \ - " " \ - "" - - -class Flash_lpc1768(Flash): - - def __init__(self, target): - Flash.__init__(self, target, flash_algo, memoryMapXML) \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/flash/flash_lpc800.py b/workspace_tools/debugger/pyOCD/flash/flash_lpc800.py deleted file mode 100644 index 40da42a7c4..0000000000 --- a/workspace_tools/debugger/pyOCD/flash/flash_lpc800.py +++ /dev/null @@ -1,56 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from flash import Flash - -flash_algo = { 'load_address' : 0x10000000, - 'instructions' : [ - 0xE00ABE00, 0x062D780D, 0x24084068, 0xD3000040, 0x1E644058, 0x1C49D1FA, 0x2A001E52, 0x4770D1F2, - 0x47700a80, 0x484e494f, 0x60084449, 0x2100484e, 0x22016301, 0x63416342, 0x6b416342, 0xd0fc07c9, - 0x49496382, 0x39402002, 0x20007008, 0x20004770, 0xb5f84770, 0x20324c45, 0x2500444c, 0x4622260f, - 0x4621c261, 0x4f423114, 0x91004620, 0x696047b8, 0xd10c2800, 0x46212034, 0x483ac161, 0x68004448, - 0x462060e0, 0x47b89900, 0x28006960, 0x2001d000, 0xb5f8bdf8, 0x0a844d35, 0x2032444d, 0x4629606c, - 0x311460ac, 0x4e326028, 0x4628460f, 0x696847b0, 0xd10d2800, 0x2034606c, 0x602860ac, 0x46394829, - 0x68004448, 0x462860e8, 0x696847b0, 0xd0002800, 0xbdf82001, 0x4614b5f8, 0xd11e0006, 0x0180200b, - 0x6bc11820, 0x42814823, 0x4823d038, 0xd0354281, 0x42814822, 0x4822d032, 0xd02f4281, 0x68206861, - 0x184068e2, 0x188968a1, 0x69211840, 0x69611840, 0x69a11840, 0x42401840, 0x4d1461e0, 0x444d0ab0, - 0x60682132, 0x60a86029, 0x31144629, 0x46284f10, 0x47b89100, 0x28006968, 0x606ed110, 0x60ac2033, - 0x20016028, 0x60e80280, 0x44484806, 0x61286800, 0x99004628, 0x696847b8, 0xd0002800, 0xbdf82001, - 0x00002ee0, 0x00000004, 0x40048040, 0x00000008, 0x1fff1ff1, 0x4e697370, 0x12345678, 0x87654321, - 0x43218765 - ], - 'pc_init' : 0x10000024, - 'pc_eraseAll' : 0x10000052, - 'pc_program_page' : 0x100000d4, - 'begin_data' : 0x10000400, - 'begin_stack' : 0x10001000, - 'static_base' : 0x10000300, - 'page_size' : 1024 - }; - -memoryMapXML = "" \ - "" \ - "" \ - " 0x400" \ - " " \ - "" - - -class Flash_lpc800(Flash): - - def __init__(self, target): - Flash.__init__(self, target, flash_algo, memoryMapXML) \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/gdbserver/__init__.py b/workspace_tools/debugger/pyOCD/gdbserver/__init__.py deleted file mode 100644 index 9c54e524f0..0000000000 --- a/workspace_tools/debugger/pyOCD/gdbserver/__init__.py +++ /dev/null @@ -1,18 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from gdbserver import GDBServer \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py b/workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py deleted file mode 100644 index 1ed4a6d34e..0000000000 --- a/workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py +++ /dev/null @@ -1,55 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import socket, select - -class GDBSocket(): - def __init__(self, port, packet_size): - self.packet_size = packet_size - self.s = None - self.conn = None - self.port = port - return - - def init(self): - self.s = socket.socket(socket.AF_INET, socket.SOCK_STREAM) - self.s.setsockopt(socket.SOL_SOCKET, socket.SO_REUSEADDR, 1) - self.s.bind(('', self.port)) - self.s.listen(5) - - def connect(self): - self.conn = None - self.init() - rr,_,_ = select.select([self.s],[],[], 0.5) - if rr: - self.conn, _ = self.s.accept() - - return self.conn - - def read(self): - return self.conn.recv(self.packet_size) - - def write(self, data): - return self.conn.send(data) - - def close(self): - if self.conn != None: - self.conn.close() - return self.s.close() - - def setBlocking(self, blocking): - return self.conn.setblocking(blocking) \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py b/workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py deleted file mode 100644 index f6ec479972..0000000000 --- a/workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py +++ /dev/null @@ -1,51 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -try: - from websocket import create_connection -except: - pass - -class GDBWebSocket(): - def __init__(self, url): - self.url = url - self.wss = None - return - - def connect(self): - self.wss = None - try: - self.wss = create_connection(self.url) - except: - pass - return self.wss - - def read(self): - return self.wss.recv() - - def write(self, data): - return self.wss.send(data) - - def close(self): - return self.wss.close() - - def setBlocking(self, blocking): - if blocking != 0: - self.wss.settimeout(None) - else: - self.wss.settimeout(0) - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py b/workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py deleted file mode 100644 index e17947be9c..0000000000 --- a/workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py +++ /dev/null @@ -1,594 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import logging, threading, socket -from pyOCD.target.cortex_m import CORE_REGISTER -from pyOCD.target.target import TARGET_HALTED -from struct import unpack -from time import sleep -import sys -from gdb_socket import GDBSocket -from gdb_websocket import GDBWebSocket - -""" -import os -parentdir = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) -sys.path.insert(0,parentdir) -""" - -SIGINT = (2) -SIGSEGV = (11) -SIGILL = (4) -SIGSTOP = (17) -SIGTRAP = (5) -SIGBUS = (10) - -FAULT = {0: "17", #SIGSTOP - 1: "17", - 2: "02", #SIGINT - 3: "11", #SIGSEGV - 4: "11", - 5: "10", #SIGBUS - 6: "04", #SIGILL - 7: "17", - 8: "17", - 9: "17", - 10: "17", - 11: "17", - 12: "17", - 13: "17", - 14: "17", - 15: "17", - } - -class GDBServer(threading.Thread): - """ - This class start a GDB server listening a gdb connection on a specific port. - It implements the RSP (Remote Serial Protocol). - """ - def __init__(self, board, port_urlWSS): - threading.Thread.__init__(self) - self.board = board - self.target = board.target - self.flash = board.flash - self.abstract_socket = None - self.wss_server = None - self.port = 0 - if isinstance(port_urlWSS, str) == True: - self.wss_server = port_urlWSS - else: - self.port = port_urlWSS - self.packet_size = 2048 - self.flashData = "" - self.conn = None - self.lock = threading.Lock() - self.shutdown_event = threading.Event() - self.detach_event = threading.Event() - self.quit = False - if self.wss_server == None: - self.abstract_socket = GDBSocket(self.port, self.packet_size) - else: - self.abstract_socket = GDBWebSocket(self.wss_server) - self.start() - - def restart(self): - if self.isAlive(): - self.detach_event.set() - - def stop(self): - if self.isAlive(): - self.shutdown_event.set() - while self.isAlive(): - pass - logging.info("GDB server thread killed") - self.board.uninit() - - def setBoard(self, board, stop = True): - self.lock.acquire() - if stop: - self.restart() - self.board = board - self.target = board.target - self.flash = board.flash - self.lock.release() - return - - def run(self): - while True: - new_command = False - data = [] - logging.info('GDB server started') - - self.shutdown_event.clear() - self.detach_event.clear() - - while not self.shutdown_event.isSet() and not self.detach_event.isSet(): - connected = self.abstract_socket.connect() - if connected != None: - break - - if self.shutdown_event.isSet(): - return - - if self.detach_event.isSet(): - continue - - logging.info("One client connected!") - - while True: - - if self.shutdown_event.isSet(): - return - - if self.detach_event.isSet(): - continue - - # read command - while True: - if (new_command == True): - new_command = False - break - try: - if self.shutdown_event.isSet() or self.detach_event.isSet(): - break - self.abstract_socket.setBlocking(0) - data = self.abstract_socket.read() - if data.index("$") >= 0 and data.index("#") >= 0: - break - except (ValueError, socket.error): - pass - - if self.shutdown_event.isSet(): - return - - if self.detach_event.isSet(): - continue - - self.abstract_socket.setBlocking(1) - - data = data[data.index("$"):] - - self.lock.acquire() - - if len(data) != 0: - # decode and prepare resp - [resp, ack, detach] = self.handleMsg(data) - - if resp is not None: - # ack - if ack: - resp = "+" + resp - # send resp - self.abstract_socket.write(resp) - # wait a '+' from the client - try: - data = self.abstract_socket.read() - if data[0] != '+': - logging.debug('gdb client has not ack!') - else: - logging.debug('gdb client has ack!') - if data.index("$") >= 0 and data.index("#") >= 0: - new_command = True - except: - pass - - if detach: - self.abstract_socket.close() - self.lock.release() - break - - self.lock.release() - - - def handleMsg(self, msg): - - if msg[0] != '$': - logging.debug('msg ignored: first char != $') - return None, 0, 0 - - #logging.debug('-->>>>>>>>>>>> GDB rsp packet: %s', msg) - - # query command - if msg[1] == 'q': - return self.handleQuery(msg[2:]), 1, 0 - - elif msg[1] == 'H': - return self.createRSPPacket(''), 1, 0 - - elif msg[1] == '?': - return self.lastSignal(), 1, 0 - - elif msg[1] == 'g': - return self.getRegister(), 1, 0 - - elif msg[1] == 'p': - return self.readRegister(msg[2:]), 1, 0 - - elif msg[1] == 'P': - return self.writeRegister(msg[2:]), 1, 0 - - elif msg[1] == 'm': - return self.getMemory(msg[2:]), 1, 0 - - elif msg[1] == 'X': - return self.writeMemory(msg[2:]), 1, 0 - - elif msg[1] == 'v': - return self.flashOp(msg[2:]), 1, 0 - - # we don't send immediately the response for C and S commands - elif msg[1] == 'C' or msg[1] == 'c': - return self.resume() - - elif msg[1] == 'S' or msg[1] == 's': - return self.step() - - elif msg[1] == 'Z' or msg[1] == 'z': - return self.breakpoint(msg[1:]), 1, 0 - - elif msg[1] == 'D': - return self.detach(msg[1:]), 1, 1 - - elif msg[1] == 'k': - return self.kill(), 1, 1 - - else: - logging.error("Unknown RSP packet: %s", msg) - return None - - def detach(self, data): - resp = "OK" - return self.createRSPPacket(resp) - - def kill(self): - return self.createRSPPacket("") - - def breakpoint(self, data): - # handle Z1/z1 commands - addr = int(data.split(',')[1], 16) - if data[1] == '1': - if data[0] == 'Z': - if self.target.setBreakpoint(addr) == False: - resp = "ENN" - return self.createRSPPacket(resp) - else: - self.target.removeBreakpoint(addr) - resp = "OK" - return self.createRSPPacket(resp) - - return None - - def resume(self): - self.ack() - self.target.resume() - self.abstract_socket.setBlocking(0) - - val = '' - - while True: - sleep(0.01) - - try: - data = self.abstract_socket.read() - if (data[0] == '\x03'): - self.target.halt() - val = 'S05' - logging.debug("receive CTRL-C") - break - except: - pass - - if self.target.getState() == TARGET_HALTED: - logging.debug("state halted") - val = 'S05' - break - - self.target.halt() - ipsr = self.target.readCoreRegister('xpsr') - logging.debug("GDB resume xpsr: 0x%X", ipsr) - if (ipsr & 0x1f) == 3: - val = "S" + FAULT[3] - break - self.target.resume() - - self.abstract_socket.setBlocking(1) - return self.createRSPPacket(val), 0, 0 - - def step(self): - self.ack() - self.target.step() - return self.createRSPPacket("S05"), 0, 0 - - def halt(self): - self.ack() - self.target.halt() - return self.createRSPPacket("S05"), 0, 0 - - def flashOp(self, data): - ops = data.split(':')[0] - #logging.debug("flash op: %s", ops) - - if ops == 'FlashErase': - self.flash.init() - self.flash.eraseAll() - return self.createRSPPacket("OK") - - elif ops == 'FlashWrite': - logging.debug("flash write addr: 0x%s", data.split(':')[1]) - # search for second ':' (beginning of data encoded in the message) - second_colon = 0 - idx_begin = 0 - while second_colon != 2: - if data[idx_begin] == ':': - second_colon += 1 - idx_begin += 1 - - self.flashData += data[idx_begin:len(data) - 3] - return self.createRSPPacket("OK") - - # we need to flash everything - elif 'FlashDone' in ops : - flashPtr = 0 - - unescaped_data = self.unescape(self.flashData) - - bytes_to_be_written = len(unescaped_data) - - """ - bin = open(os.path.join(parentdir, 'res', 'bad_bin.txt'), "w+") - - i = 0 - while (i < bytes_to_be_written): - bin.write(str(unescaped_data[i:i+16]) + "\n") - i += 16 - """ - - - logging.info("flashing %d bytes", bytes_to_be_written) - - while len(unescaped_data) > 0: - size_to_write = min(self.flash.page_size, len(unescaped_data)) - self.flash.programPage(flashPtr, unescaped_data[:size_to_write]) - flashPtr += size_to_write - - unescaped_data = unescaped_data[size_to_write:] - - # print progress bar - sys.stdout.write('\r') - i = int((float(flashPtr)/float(bytes_to_be_written))*20.0) - # the exact output you're looking for: - sys.stdout.write("[%-20s] %d%%" % ('='*i, 5*i)) - sys.stdout.flush() - - sys.stdout.write("\n\r") - - self.flashData = "" - - """ - bin.close() - """ - - # reset and stop on reset handler - self.target.resetStopOnReset() - - return self.createRSPPacket("OK") - - elif 'Cont' in ops: - if 'Cont?' in ops: - return self.createRSPPacket("vCont;c;s;t") - - return None - - def unescape(self, data): - data_idx = 0 - - # unpack the data into binary array - str_unpack = str(len(data)) + 'B' - data = unpack(str_unpack, data) - data = list(data) - - # check for escaped characters - while data_idx < len(data): - if data[data_idx] == 0x7d: - data.pop(data_idx) - data[data_idx] = data[data_idx] ^ 0x20 - data_idx += 1 - - return data - - - def getMemory(self, data): - split = data.split(',') - addr = int(split[0], 16) - length = split[1] - length = int(length[:len(length)-3],16) - - val = '' - - mem = self.target.readBlockMemoryUnaligned8(addr, length) - for x in mem: - if x >= 0x10: - val += hex(x)[2:4] - else: - val += '0' + hex(x)[2:3] - - return self.createRSPPacket(val) - - def writeMemory(self, data): - split = data.split(',') - addr = int(split[0], 16) - length = int(split[1].split(':')[0], 16) - - idx_begin = 0 - for i in range(len(data)): - if data[i] == ':': - idx_begin += 1 - break - idx_begin += 1 - - data = data[idx_begin:len(data) - 3] - data = self.unescape(data) - - if length > 0: - self.target.writeBlockMemoryUnaligned8(addr, data) - - return self.createRSPPacket("OK") - - def readRegister(self, data): - num = int(data.split('#')[0], 16) - reg = self.target.readCoreRegister(num) - logging.debug("GDB: read reg %d: 0x%X", num, reg) - val = self.intToHexGDB(reg) - return self.createRSPPacket(val) - - def writeRegister(self, data): - num = int(data.split('=')[0], 16) - val = data.split('=')[1].split('#')[0] - val = val[6:8] + val[4:6] + val[2:4] + val[0:2] - logging.debug("GDB: write reg %d: 0x%X", num, int(val, 16)) - self.target.writeCoreRegister(num, int(val, 16)) - return self.createRSPPacket("OK") - - def intToHexGDB(self, val): - val = hex(int(val))[2:] - size = len(val) - r = '' - for i in range(8-size): - r += '0' - r += str(val) - - resp = '' - for i in range(4): - resp += r[8 - 2*i - 2: 8 - 2*i] - - return resp - - def getRegister(self): - resp = '' - for i in range(len(CORE_REGISTER)): - reg = self.target.readCoreRegister(i) - resp += self.intToHexGDB(reg) - logging.debug("GDB reg: %s = 0x%X", i, reg) - return self.createRSPPacket(resp) - - def lastSignal(self): - fault = self.target.readCoreRegister('xpsr') & 0xff - fault = FAULT[fault] - logging.debug("GDB lastSignal: %s", fault) - return self.createRSPPacket('S' + fault) - - def handleQuery(self, msg): - query = msg.split(':') - logging.debug('GDB received query: %s', query) - - if query is None: - logging.error('GDB received query packet malformed') - return None - - if query[0] == 'Supported': - resp = "qXfer:memory-map:read+;qXfer:features:read+;PacketSize=" - resp += hex(self.packet_size)[2:] - return self.createRSPPacket(resp) - - elif query[0] == 'Xfer': - - if query[1] == 'features' and query[2] == 'read' and \ - query[3] == 'target.xml': - data = query[4].split(',') - resp = self.handleQueryXML('read_feature', int(data[0], 16), int(data[1].split('#')[0], 16)) - return self.createRSPPacket(resp) - - elif query[1] == 'memory-map' and query[2] == 'read': - data = query[4].split(',') - resp = self.handleQueryXML('momery_map', int(data[0], 16), int(data[1].split('#')[0], 16)) - return self.createRSPPacket(resp) - - else: - return None - - elif query[0] == 'C#b4': - return self.createRSPPacket("") - - elif query[0].find('Attached') != -1: - return self.createRSPPacket("1") - - elif query[0].find('TStatus') != -1: - return self.createRSPPacket("") - - elif query[0].find('Tf') != -1: - return self.createRSPPacket("") - - elif 'Offsets' in query[0]: - resp = "Text=0;Data=0;Bss=0" - return self.createRSPPacket(resp) - - elif 'Symbol' in query[0]: - resp = "OK" - return self.createRSPPacket(resp) - - else: - return None - - def handleQueryXML(self, query, offset, size): - logging.debug('GDB query %s: offset: %s, size: %s', query, offset, size) - xml = '' - if query == 'momery_map': - xml = self.flash.memoryMapXML - elif query == 'read_feature': - xml = self.target.targetXML - - size_xml = len(xml) - - prefix = 'm' - - if offset > size_xml: - logging.error('GDB: offset target.xml > size!') - return - - if size > (self.packet_size - 4): - size = self.packet_size - 4 - - nbBytesAvailable = size_xml - offset - - if size > nbBytesAvailable: - prefix = 'l' - size = nbBytesAvailable - - resp = prefix + xml[offset:offset + size] - - return resp - - - def createRSPPacket(self, data): - resp = '$' + data + '#' - - c = 0 - checksum = 0 - for c in data: - checksum += ord(c) - checksum = checksum % 256 - checksum = hex(checksum) - - if int(checksum[2:], 16) < 0x10: - resp += '0' - resp += checksum[2:] - - #logging.debug('--<<<<<<<<<<<< GDB rsp packet: %s', resp) - return resp - - def ack(self): - self.abstract_socket.write("+") \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/interface/__init__.py b/workspace_tools/debugger/pyOCD/interface/__init__.py deleted file mode 100644 index e093ce16a7..0000000000 --- a/workspace_tools/debugger/pyOCD/interface/__init__.py +++ /dev/null @@ -1,23 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from pyusb_backend import PyUSB -from pywinusb_backend import PyWinUSB - -INTERFACE = {'pyusb': PyUSB, - 'pywinusb': PyWinUSB - } \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/interface/interface.py b/workspace_tools/debugger/pyOCD/interface/interface.py deleted file mode 100644 index d051bd31d9..0000000000 --- a/workspace_tools/debugger/pyOCD/interface/interface.py +++ /dev/null @@ -1,45 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -class Interface: - - def __init__(self): - self.vid = 0 - self.pid = 0 - self.vendor_name = "" - self.product_name = "" - return - - def init(self): - return - - def write(self, data): - return - - def read(self, size = -1, timeout = -1): - return - - def getInfo(self): - return self.vendor_name + " " + \ - self.product_name + " (" + \ - str(hex(self.vid)) + ", " + \ - str(hex(self.pid)) + ")" - - def close(self): - return - - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/interface/pyusb_backend.py b/workspace_tools/debugger/pyOCD/interface/pyusb_backend.py deleted file mode 100644 index de7ca7bbf1..0000000000 --- a/workspace_tools/debugger/pyOCD/interface/pyusb_backend.py +++ /dev/null @@ -1,138 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from interface import Interface -import logging, os - -try: - import usb.core - import usb.util -except: - if os.name == "posix": - logging.error("PyUSB is required on a Linux Machine") - -class PyUSB(Interface): - """ - This class provides basic functions to access - a USB HID device using pyusb: - - write/read an endpoint - """ - - vid = 0 - pid = 0 - - def __init__(self): - self.ep_out = None - self.ep_in = None - self.dev = None - - @staticmethod - def getAllConnectedInterface(vid, pid): - """ - returns all the connected devices which matches PyUSB.vid/PyUSB.pid. - returns an array of PyUSB (Interface) objects - """ - # find all devices matching the vid/pid specified - all_devices = usb.core.find(find_all=True, idVendor=vid, idProduct=pid) - - if all_devices is None: - logging.debug("No device connected") - return None - - boards = [] - - # iterate on all devices found - for board in all_devices: - intf_number = 0 - found = False - - # get active config - config = board.get_active_configuration() - - # iterate on all interfaces: - # - if we found a HID interface -> CMSIS-DAP - for interface in config: - if interface.bInterfaceClass == 0x03: - intf_number = interface.bInterfaceNumber - found = True - break - - if found == False: - continue - - try: - if board.is_kernel_driver_active(intf_number) is True: - board.detach_kernel_driver(intf_number) - except Exception as e: - print e - pass - - intf = usb.util.find_descriptor(config, bInterfaceNumber = intf_number) - ep_out = usb.util.find_descriptor(intf, - # match the first OUT endpoint - custom_match = \ - lambda e: \ - usb.util.endpoint_direction(e.bEndpointAddress) == \ - usb.util.ENDPOINT_OUT - ) - ep_in = usb.util.find_descriptor(intf, - # match the first IN endpoint - custom_match = \ - lambda e: \ - usb.util.endpoint_direction(e.bEndpointAddress) == \ - usb.util.ENDPOINT_IN - ) - product_name = usb.util.get_string(board, 256, 2) - vendor_name = usb.util.get_string(board, 256, 1) - if ep_out is None or ep_in is None: - logging.error('Endpoints not found') - return None - - new_board = PyUSB() - new_board.ep_in = ep_in - new_board.ep_out = ep_out - new_board.dev = board - new_board.vid = vid - new_board.pid = pid - new_board.product_name = product_name - new_board.vendor_name = vendor_name - boards.append(new_board) - - return boards - - def write(self, data): - """ - write data on the OUT endpoint associated to the HID interface - """ - if self.ep_out is None: - raise ValueError('EP_OUT endpoint is NULL') - - self.ep_out.write(data) - #logging.debug('sent: %s', data) - return - - - def read(self, timeout = -1): - """ - read data on the IN endpoint associated to the HID interface - """ - if self.ep_in is None: - raise ValueError('EP_IN endpoint is NULL') - - data = self.ep_in.read(self.ep_in.wMaxPacketSize, timeout) - #logging.debug('received: %s', data) - return data diff --git a/workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py b/workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py deleted file mode 100644 index 90689039dd..0000000000 --- a/workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py +++ /dev/null @@ -1,116 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from interface import Interface -import logging, os - -try: - import pywinusb.hid as hid -except: - if os.name == "nt": - logging.error("PyWinUSB is required on a Windows Machine") - -class PyWinUSB(Interface): - """ - This class provides basic functions to access - a USB HID device using pywinusb: - - write/read an endpoint - """ - vid = 0 - pid = 0 - - def __init__(self): - # Vendor page and usage_id = 2 - self.report = [] - self.rcv_data = [] - self.device = None - return - - # handler called when a report is received - def rx_handler(self, data): - #logging.debug("rcv: %s", data[1:]) - self.rcv_data.append(data[1:]) - - def open(self): - self.device.set_raw_data_handler(self.rx_handler) - self.device.open() - - @staticmethod - def getAllConnectedInterface(vid, pid): - """ - returns all the connected devices which matches PyWinUSB.vid/PyWinUSB.pid. - returns an array of PyWinUSB (Interface) objects - """ - all_devices = hid.find_all_hid_devices() - - # find devices with good vid/pid - all_mbed_devices = [] - for d in all_devices: - if (d.vendor_id == vid) and (d.product_id == pid): - all_mbed_devices.append(d) - - if not all_mbed_devices: - logging.debug("No Mbed device connected") - return - - boards = [] - for dev in all_mbed_devices: - try: - dev.open() - report = dev.find_output_reports() - if (len(report) == 1): - new_board = PyWinUSB() - new_board.report = report[0] - new_board.vendor_name = dev.vendor_name - new_board.product_name = dev.product_name - new_board.vid = dev.vendor_id - new_board.pid = dev.product_id - new_board.device = dev - new_board.device.set_raw_data_handler(new_board.rx_handler) - - boards.append(new_board) - except Exception as e: - logging.error("Receiving Exception: %s", e) - dev.close() - - return boards - - def write(self, data): - """ - write data on the OUT endpoint associated to the HID interface - """ - for _ in range(64 - len(data)): - data.append(0) - #logging.debug("send: %s", data) - self.report.send([0] + data) - return - - - def read(self, timeout = -1): - """ - read data on the IN endpoint associated to the HID interface - """ - while len(self.rcv_data) == 0: - pass - return self.rcv_data.pop(0) - - def close(self): - """ - close the interface - """ - logging.debug("closing interface") - self.device.close() diff --git a/workspace_tools/debugger/pyOCD/target/__init__.py b/workspace_tools/debugger/pyOCD/target/__init__.py deleted file mode 100644 index 9f7fd9ecca..0000000000 --- a/workspace_tools/debugger/pyOCD/target/__init__.py +++ /dev/null @@ -1,29 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import cortex_m -import target_lpc1768 -import target_kl25z -import target_lpc11u24 -import target_lpc800 - -TARGET = {'cortex_m': cortex_m.CortexM, - 'target_lpc1768': target_lpc1768.LPC1768, - 'target_kl25z': target_kl25z.KL25Z, - 'target_lpc11u24': target_lpc11u24.LPC11U24, - 'target_lpc800': target_lpc800.LPC800, - } \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/target/cortex_m.py b/workspace_tools/debugger/pyOCD/target/cortex_m.py deleted file mode 100644 index 24606654b4..0000000000 --- a/workspace_tools/debugger/pyOCD/target/cortex_m.py +++ /dev/null @@ -1,554 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from pyOCD.target.target import Target -from pyOCD.target.target import TARGET_RUNNING, TARGET_HALTED -from pyOCD.transport.cmsis_dap import DP_REG -import logging - -# Debug Halting Control and Status Register -DHCSR = 0xE000EDF0 -# Debug Core Register Selector Register -DCRSR = 0xE000EDF4 -REGWnR = (1 << 16) -# Debug Core Register Data Register -DCRDR = 0xE000EDF8 -# Debug Exception and Monitor Control Register -DEMCR = 0xE000EDFC -TRACE_ENA = (1 << 24) -VC_HARDERR = (1 << 9) -VC_BUSERR = (1 << 8) -VC_CORERESET = (1 << 0) - -NVIC_AIRCR = (0xE000ED0C) -NVIC_AIRCR_VECTKEY = (0x5FA << 16) -NVIC_AIRCR_VECTRESET = (1 << 0) -NVIC_AIRCR_SYSRESETREQ = (1 << 2) - -CSYSPWRUPACK = 0x80000000 -CDBGPWRUPACK = 0x20000000 -CSYSPWRUPREQ = 0x40000000 -CDBGPWRUPREQ = 0x10000000 - -TRNNORMAL = 0x00000000 -MASKLANE = 0x00000f00 - -C_DEBUGEN = (1 << 0) -C_HALT = (1 << 1) -C_STEP = (1 << 2) -C_MASKINTS = (1 << 3) -C_SNAPSTALL = (1 << 4) -DBGKEY = (0xA05F << 16) - -# FPB (breakpoint) -FP_CTRL = (0xE0002000) -FP_CTRL_KEY = (1 << 1) -FP_COMP0 = (0xE0002008) - -CORE_REGISTER = {'r0': 0, - 'r1': 1, - 'r2': 2, - 'r3': 3, - 'r4': 4, - 'r5': 5, - 'r6': 6, - 'r7': 7, - 'r8': 8, - 'r9': 9, - 'r10': 10, - 'r11': 11, - 'r12': 12, - 'sp': 13, - 'lr': 14, - 'pc': 15, - 'xpsr': 16, - } - -targetXML = "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" \ - "\n" - -""" -convert a byte array into a word array -""" -def byte2word(data): - res = [] - for i in range(len(data)/4): - res.append(data[i*4 + 0] << 0 | - data[i*4 + 1] << 8 | - data[i*4 + 2] << 16 | - data[i*4 + 3] << 24) - return res - -""" -convert a word array into a byte array -""" -def word2byte(data): - res = [] - for x in data: - res.append((x >> 0) & 0xff) - res.append((x >> 8) & 0xff) - res.append((x >> 16) & 0xff) - res.append((x >> 24) & 0xff) - return res - - -class Breakpoint(): - def __init__(self, comp_register_addr): - self.comp_register_addr = comp_register_addr - self.enabled = False - self.addr = 0 - - -class CortexM(Target): - - """ - This class has basic functions to access a Cortex M core: - - init - - read/write memory - - read/write core registers - - set/remove hardware breakpoints - """ - - def __init__(self, transport): - self.transport = transport - self.auto_increment_page_size = 0 - self.idcode = 0 - self.breakpoints = [] - self.nb_code = 0 - self.num_breakpoint_used = 0 - self.nb_lit = 0 - self.fpb_enabled = False - self.targetXML = targetXML - return - - def init(self, setup_fpb = True): - """ - Cortex M initialization - """ - self.idcode = self.readIDCode() - # select bank 0 (to access DRW and TAR) - self.transport.writeDP(DP_REG['SELECT'], 0) - self.transport.writeDP(DP_REG['CTRL_STAT'], CSYSPWRUPREQ | CDBGPWRUPREQ) - - while True: - r = self.transport.readDP(DP_REG['CTRL_STAT']) - if (r & (CDBGPWRUPACK | CSYSPWRUPACK)) == (CDBGPWRUPACK | CSYSPWRUPACK): - break - - self.transport.writeDP(DP_REG['CTRL_STAT'], CSYSPWRUPREQ | CDBGPWRUPREQ | TRNNORMAL | MASKLANE) - self.transport.writeDP(DP_REG['SELECT'], 0) - - if setup_fpb: - self.halt() - self.setupFPB() - - return - - def setupFPB(self): - """ - Reads the number of hardware breakpoints available on the core - and disable the FPB (Flash Patch and Breakpoint Unit) - which will be enabled when a first breakpoint will be set - """ - # setup FPB (breakpoint) - fpcr = self.readMemory(FP_CTRL) - self.nb_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF) - logging.info("%d hardware breakpoints", self.nb_code) - for i in range(self.nb_code): - self.breakpoints.append(Breakpoint(FP_COMP0 + 4*i)) - - # disable FPB (will be enabled on first bp set) - self.disableFPB() - for bp in self.breakpoints: - self.writeMemory(bp.comp_register_addr, 0) - - def info(self, request): - return self.transport.info(request) - - def readIDCode(self): - """ - return the IDCODE of the core - """ - if self.idcode == 0: - self.idcode = self.transport.readDP(DP_REG['IDCODE']) - return self.idcode - - def writeMemory(self, addr, value, transfer_size = 32): - """ - write a memory location. - By default the transfer size is a word - """ - self.transport.writeMem(addr, value, transfer_size) - return - - def readMemory(self, addr, transfer_size = 32): - """ - read a memory location. By default, a word will - be read - """ - return self.transport.readMem(addr, transfer_size) - - def readBlockMemoryUnaligned8(self, addr, size): - """ - read a block of unaligned bytes in memory. Returns - an array of byte values - """ - res = [] - - # try to read 8bits data - if (size > 0) and (addr & 0x01): - mem = self.readMemory(addr, 8) - logging.debug("get 1 byte at %s: 0x%X", hex(addr), mem) - res.append(mem) - size -= 1 - addr += 1 - - # try to read 16bits data - if (size > 1) and (addr & 0x02): - mem = self.readMemory(addr, 16) - logging.debug("get 2 bytes at %s: 0x%X", hex(addr), mem) - res.append(mem & 0xff) - res.append((mem >> 8) & 0xff) - size -= 2 - addr += 2 - - # try to read aligned block of 32bits - if (size >= 4): - logging.debug("read blocks aligned at 0x%X, size: 0x%X", addr, (size/4)*4) - mem = self.readBlockMemoryAligned32(addr, size/4) - res += word2byte(mem) - size -= 4*len(mem) - addr += 4*len(mem) - - if (size > 1): - mem = self.readMemory(addr, 16) - logging.debug("get 2 bytes at %s: 0x%X", hex(addr), mem) - res.append(mem & 0xff) - res.append((mem >> 8) & 0xff) - size -= 2 - addr += 2 - - if (size > 0): - mem = self.readMemory(addr, 8) - logging.debug("get 1 byte remaining at %s: 0x%X", hex(addr), mem) - res.append(mem) - size -= 1 - addr += 1 - - return res - - - def writeBlockMemoryUnaligned8(self, addr, data): - """ - write a block of unaligned bytes in memory. - """ - size = len(data) - idx = 0 - - #try to write 8 bits data - if (size > 0) and (addr & 0x01): - logging.debug("write 1 byte at 0x%X: 0x%X", addr, data[idx]) - self.writeMemory(addr, data[idx], 8) - size -= 1 - addr += 1 - idx += 1 - - # try to write 16 bits data - if (size > 1) and (addr & 0x02): - logging.debug("write 2 bytes at 0x%X: 0x%X", addr, data[idx] | (data[idx+1] << 8)) - self.writeMemory(addr, data[idx] | (data[idx+1] << 8), 16) - size -= 2 - addr += 2 - idx += 2 - - # write aligned block of 32 bits - if (size >= 4): - logging.debug("write blocks aligned at 0x%X, size: 0x%X", addr, (size/4)*4) - data32 = byte2word(data[idx:idx + (size & ~0x03)]) - self.writeBlockMemoryAligned32(addr, data32) - addr += size & ~0x03 - idx += size & ~0x03 - size -= size & ~0x03 - - # try to write 16 bits data - if (size > 1): - logging.debug("write 2 bytes at 0x%X: 0x%X", addr, data[idx] | (data[idx+1] << 8)) - self.writeMemory(addr, data[idx] | (data[idx+1] << 8), 16) - size -= 2 - addr += 2 - idx += 2 - - #try to write 8 bits data - if (size > 0): - logging.debug("write 1 byte at 0x%X: 0x%X", addr, data[idx]) - self.writeMemory(addr, data[idx], 8) - size -= 1 - addr += 1 - idx += 1 - - return - - def writeBlockMemoryAligned32(self, addr, data): - """ - write a block of aligned words in memory. - """ - size = len(data) - while size > 0: - n = self.auto_increment_page_size - (addr & (self.auto_increment_page_size - 1)) - if size*4 < n: - n = (size*4) & 0xfffffffc - self.transport.writeBlock32(addr, data[:n/4]) - data = data[n/4:] - size -= n/4 - addr += n - return - - def readBlockMemoryAligned32(self, addr, size): - """ - read a block of aligned words in memory. Returns - an array of word values - """ - resp = [] - while size > 0: - n = self.auto_increment_page_size - (addr & (self.auto_increment_page_size - 1)) - if size*4 < n: - n = (size*4) & 0xfffffffc - resp += self.transport.readBlock32(addr, n/4) - size -= n/4 - addr += n - return resp - - def halt(self): - """ - halt the core - """ - self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN | C_HALT) - return - - def step(self): - """ - perform an instruction level step - """ - if self.getState() != TARGET_HALTED: - logging.debug('cannot step: target not halted') - return - if self.maybeSkipBreakpoint() is None: - self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN | C_STEP) - return - - def reset(self): - """ - reset a core. After a call to this function, the core - is running - """ - self.transport.reset() - - def resetStopOnReset(self): - """ - perform a reset and stop the core on the reset handler - """ - logging.debug("reset stop on Reset") - # read address of reset handler - reset_handler = self.readMemory(4) - - # reset and halt the target - self.transport.reset() - self.halt() - - # set a breakpoint to the reset handler and reset the target - self.setBreakpoint(reset_handler) - self.transport.reset() - - # wait until the bp is reached - while (self.getState() == TARGET_RUNNING): - pass - - # remove the breakpoint - self.removeBreakpoint(reset_handler) - - logging.debug("stopped on reset handler: 0x%X", reset_handler) - - def setTargetState(self, state): - if state == "PROGRAM": - self.reset() - self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN) - self.writeMemory(DEMCR, VC_CORERESET) - self.writeMemory(NVIC_AIRCR, NVIC_AIRCR_VECTKEY | NVIC_AIRCR_SYSRESETREQ) - while self.getState() == TARGET_RUNNING: - pass - self.writeMemory(DEMCR, 0) - - - def getState(self): - dhcsr = self.readMemory(DHCSR) - if dhcsr & (C_STEP | C_HALT): - return TARGET_HALTED - return TARGET_RUNNING - - def resume(self): - """ - resume the execution - """ - if self.getState() != TARGET_HALTED: - logging.debug('cannot resume: target not halted') - return - self.maybeSkipBreakpoint() - self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN) - return - - def maybeSkipBreakpoint(self): - pc = self.readCoreRegister('pc') - bp = self.findBreakpoint(pc) - if bp is not None: - logging.debug('skip/resume breakpoint: pc 0x%X', pc) - self.removeBreakpoint(pc) - self.writeMemory(DHCSR, DBGKEY | C_DEBUGEN | C_STEP) - self.setBreakpoint(pc) - logging.debug('step over breakpoint: now pc0x%X', self.readCoreRegister('pc')) - return bp - return None - - def findBreakpoint(self, addr): - for bp in self.breakpoints: - if bp.enabled and bp.addr == addr: - return bp - return None - - def readCoreRegister(self, reg): - """ - read a core register (r0 .. r16). - If reg is a string, find the number associated to this register - in the lookup table CORE_REGISTER - """ - if isinstance(reg, str): - try: - reg = CORE_REGISTER[reg] - except KeyError: - logging.error('cannot find %s core register', id) - return - - if (reg < 0) or (reg > len(CORE_REGISTER)): - logging.error("unknown reg: %d", reg) - return - - # write id in DCRSR - self.writeMemory(DCRSR, reg) - # read DCRDR - return self.readMemory(DCRDR) - - - def writeCoreRegister(self, reg, data): - """ - write a core register (r0 .. r16) - If reg is a string, find the number associated to this register - in the lookup table CORE_REGISTER - """ - if isinstance(reg, str): - try: - reg = CORE_REGISTER[reg] - except KeyError: - logging.error('cannot find %s core register', id) - return - - if (reg < 0) or (reg > len(CORE_REGISTER)): - logging.error("unknown reg: %d", reg) - return - - # write id in DCRSR - self.writeMemory(DCRDR, data) - # read DCRDR - self.writeMemory(DCRSR, reg | REGWnR) - return - - - def setBreakpoint(self, addr): - """ - set a hardware breakpoint at a specific location in flash - """ - if self.fpb_enabled is False: - self.enableFPB() - - if self.availableBreakpoint() == 0: - logging.error('No more available breakpoint!!, dropped bp at 0x%X', addr) - return False - - for bp in self.breakpoints: - if not bp.enabled: - bp.enabled = True - bp_match = (1 << 30) - if addr & 0x2: - bp_match = (2 << 30) - self.writeMemory(bp.comp_register_addr, addr & 0x1ffffffc | bp_match | 1) - bp.addr = addr - self.num_breakpoint_used += 1 - return True - return False - - - def availableBreakpoint(self): - return len(self.breakpoints) - self.num_breakpoint_used - - def enableFPB(self): - self.writeMemory(FP_CTRL, FP_CTRL_KEY | 1) - self.fpb_enabled = True - logging.debug('fpb has been enabled') - return - - def disableFPB(self): - self.writeMemory(FP_CTRL, FP_CTRL_KEY | 0) - self.fpb_enabled = False - logging.debug('fpb has been disabled') - return - - def removeBreakpoint(self, addr): - """ - remove a hardware breakpoint at a specific location in flash - """ - for bp in self.breakpoints: - if bp.enabled and bp.addr == addr: - bp.enabled = False - self.writeMemory(bp.comp_register_addr, 0) - bp.addr = addr - self.num_breakpoint_used -= 1 - return - return - - # GDB functions - def getTargetXML(self): - return self.targetXML, len(self.targetXML) - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/target/target.py b/workspace_tools/debugger/pyOCD/target/target.py deleted file mode 100644 index 9c09892d32..0000000000 --- a/workspace_tools/debugger/pyOCD/target/target.py +++ /dev/null @@ -1,82 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -TARGET_RUNNING = (1 << 0) -TARGET_HALTED = (1 << 1) - -class Target(): - - def __init__(self, transport): - return - - def init(self): - return - - def info(self, request): - return - - def readIDCode(self): - return - - def halt(self): - return - - def step(self): - return - - def resume(self): - return - - def writeMemory(self, addr, value, transfer_size = 32): - return - - def readMemory(self, addr, transfer_size = 32): - return - - def writeBlockMemoryUnaligned8(self, addr, value): - return - - def writeBlockMemoryAligned32(self, addr, data): - return - - def readBlockMemoryUnaligned8(self, addr, size): - return - - def readBlockMemoryAligned32(self, addr, size): - return - - def readCoreRegister(self, id): - return - - def writeCoreRegister(self, id): - return - - def setBreakpoint(self, addr): - return - - def removeBreakpoint(self, addr): - return - - def reset(self): - return - - def getState(self): - return - - # GDB functions - def getTargetXML(self): - return \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/target/target_kl25z.py b/workspace_tools/debugger/pyOCD/target/target_kl25z.py deleted file mode 100644 index f2f98f69c9..0000000000 --- a/workspace_tools/debugger/pyOCD/target/target_kl25z.py +++ /dev/null @@ -1,57 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cortex_m import CortexM -import logging - - -MDM_STATUS = 0x01000000 -MDM_CTRL = 0x01000004 -MDM_IDR = 0x010000fc - -class KL25Z(CortexM): - - def __init__(self, transport): - CortexM.__init__(self, transport) - self.auto_increment_page_size = 0x400 - - def init(self): - CortexM.init(self, False) - - # check for flash security - val = self.transport.readAP(MDM_IDR) - if val != 0x001c0020: - logging.error("KL25Z: bad flash ID") - val = self.transport.readAP(MDM_STATUS) - if (val & (1 << 2)): - logging.warning("KL25Z secure state: will try to unlock") - self.transport.assertReset(True) - while True: - self.transport.writeAP(MDM_CTRL, 1) - val = self.transport.readAP(MDM_STATUS) - logging.info(val) - if (val & 1): - break - while True: - self.transport.writeAP(MDM_CTRL, 0) - val = self.transport.readAP(MDM_CTRL) - if (val == 0): - break - - logging.info("KL25Z not in secure state") - self.halt() - self.setupFPB() diff --git a/workspace_tools/debugger/pyOCD/target/target_lpc11u24.py b/workspace_tools/debugger/pyOCD/target/target_lpc11u24.py deleted file mode 100644 index 5bd3e06d15..0000000000 --- a/workspace_tools/debugger/pyOCD/target/target_lpc11u24.py +++ /dev/null @@ -1,24 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cortex_m import CortexM - -class LPC11U24(CortexM): - - def __init__(self, transport): - CortexM.__init__(self, transport) - self.auto_increment_page_size = 0x400 \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/target/target_lpc1768.py b/workspace_tools/debugger/pyOCD/target/target_lpc1768.py deleted file mode 100644 index 8d0d1deb21..0000000000 --- a/workspace_tools/debugger/pyOCD/target/target_lpc1768.py +++ /dev/null @@ -1,40 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cortex_m import CortexM - -class LPC1768(CortexM): - - def __init__(self, transport): - CortexM.__init__(self, transport) - self.auto_increment_page_size = 0x1000 - - - def reset(self): - # halt processor - self.halt() - # not remap 0x0000-0x0020 to anything but the flash - self.writeMemory(0x400FC040, 1) - CortexM.reset(self) - - def resetStopOnReset(self): - # halt processor - self.halt() - # not remap 0x0000-0x0020 to anything but the flash - self.writeMemory(0x400FC040, 1) - CortexM.resetStopOnReset(self) - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/target/target_lpc800.py b/workspace_tools/debugger/pyOCD/target/target_lpc800.py deleted file mode 100644 index 4ef73db9b9..0000000000 --- a/workspace_tools/debugger/pyOCD/target/target_lpc800.py +++ /dev/null @@ -1,24 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cortex_m import CortexM - -class LPC800(CortexM): - - def __init__(self, transport): - CortexM.__init__(self, transport) - self.auto_increment_page_size = 0x400 diff --git a/workspace_tools/debugger/pyOCD/transport/__init__.py b/workspace_tools/debugger/pyOCD/transport/__init__.py deleted file mode 100644 index c657d37349..0000000000 --- a/workspace_tools/debugger/pyOCD/transport/__init__.py +++ /dev/null @@ -1,21 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cmsis_dap import CMSIS_DAP - -TRANSPORT = {'cmsis_dap': CMSIS_DAP - } \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/transport/cmsis_dap.py b/workspace_tools/debugger/pyOCD/transport/cmsis_dap.py deleted file mode 100644 index 9c50d542da..0000000000 --- a/workspace_tools/debugger/pyOCD/transport/cmsis_dap.py +++ /dev/null @@ -1,229 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from cmsis_dap_core import dapTransferBlock, dapWriteAbort, dapSWJPins, dapConnect, dapDisconnect, dapTransfer, dapSWJSequence, dapSWDConfigure, dapSWJClock, dapTransferConfigure, dapInfo -from transport import Transport -import logging -from time import sleep - -# !! This value are A[2:3] and not A[3:2] -DP_REG = {'IDCODE' : 0x00, - 'ABORT' : 0x00, - 'CTRL_STAT': 0x04, - 'SELECT': 0x08 - } -AP_REG = {'CSW' : 0x00, - 'TAR' : 0x04, - 'DRW' : 0x0C - } - -IDCODE = 0 << 2 -AP_ACC = 1 << 0 -DP_ACC = 0 << 0 -READ = 1 << 1 -WRITE = 0 << 1 -VALUE_MATCH = 1 << 4 -MATCH_MASK = 1 << 5 - -APBANKSEL = 0x000000f0 - -# AP Control and Status Word definitions -CSW_SIZE = 0x00000007 -CSW_SIZE8 = 0x00000000 -CSW_SIZE16 = 0x00000001 -CSW_SIZE32 = 0x00000002 -CSW_ADDRINC = 0x00000030 -CSW_NADDRINC = 0x00000000 -CSW_SADDRINC = 0x00000010 -CSW_PADDRINC = 0x00000020 -CSW_DBGSTAT = 0x00000040 -CSW_TINPROG = 0x00000080 -CSW_HPROT = 0x02000000 -CSW_MSTRTYPE = 0x20000000 -CSW_MSTRCORE = 0x00000000 -CSW_MSTRDBG = 0x20000000 -CSW_RESERVED = 0x01000000 - -CSW_VALUE = (CSW_RESERVED | CSW_MSTRDBG | CSW_HPROT | CSW_DBGSTAT | CSW_SADDRINC) - -TRANSFER_SIZE = {8: CSW_SIZE8, - 16: CSW_SIZE16, - 32: CSW_SIZE32 - } - - -def JTAG2SWD(interface): - data = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff] - dapSWJSequence(interface, data) - - data = [0x9e, 0xe7] - dapSWJSequence(interface, data) - - data = [0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff] - dapSWJSequence(interface, data) - - data = [0x00] - dapSWJSequence(interface, data) - -class CMSIS_DAP(Transport): - """ - This class implements the CMSIS-DAP protocol - """ - def __init__(self, interface): - self.interface = interface - self.packet_max_count = 0 - self.packet_max_size = 0 - self.csw = -1 - self.dp_select = -1 - return - - def init(self): - # init dap IO - dapConnect(self.interface) - # set clock freq at 1000000Hz - dapSWJClock(self.interface) - # configure transfer - dapTransferConfigure(self.interface) - # configure swd protocol - dapSWDConfigure(self.interface) - # switch from jtag to swd - JTAG2SWD(self.interface) - # read ID code - logging.info('IDCODE: 0x%X', self.readDP(DP_REG['IDCODE'])) - # clear abort err - dapWriteAbort(self.interface, 0x1e); - return - - def uninit(self): - dapDisconnect(self.interface) - return - - def info(self, request): - resp = None - try: - resp = dapInfo(self.interface, request) - except KeyError: - logging.error('request %s not supported', request) - return resp - - def writeMem(self, addr, data, transfer_size = 32): - self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) - - if transfer_size == 8: - data = data << ((addr & 0x03) << 3) - elif transfer_size == 16: - data = data << ((addr & 0x02) << 3) - - dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], - WRITE | AP_ACC | AP_REG['DRW']], - [addr, data]) - - def readMem(self, addr, transfer_size = 32): - self.writeAP(AP_REG['CSW'], CSW_VALUE | TRANSFER_SIZE[transfer_size]) - - resp = dapTransfer(self.interface, 2, [WRITE | AP_ACC | AP_REG['TAR'], - READ | AP_ACC | AP_REG['DRW']], - [addr]) - - res = (resp[0] << 0) | \ - (resp[1] << 8) | \ - (resp[2] << 16) | \ - (resp[3] << 24) - - if transfer_size == 8: - res = (res >> ((addr & 0x03) << 3) & 0xff) - elif transfer_size == 16: - res = (res >> ((addr & 0x02) << 3) & 0xffff) - - return res - - # write aligned word ("data" are words) - def writeBlock32(self, addr, data): - # put address in TAR - self.writeAP(AP_REG['CSW'], CSW_VALUE | CSW_SIZE32) - self.writeAP(AP_REG['TAR'], addr) - dapTransferBlock(self.interface, len(data), WRITE | AP_ACC | AP_REG['DRW'], data) - return - - # read aligned word (the size is in words) - def readBlock32(self, addr, size): - # put address in TAR - self.writeAP(AP_REG['CSW'], CSW_VALUE | CSW_SIZE32) - self.writeAP(AP_REG['TAR'], addr) - data = [] - resp = dapTransferBlock(self.interface, size, READ | AP_ACC | AP_REG['DRW']) - for i in range(len(resp)/4): - data.append( (resp[i*4 + 0] << 0) | \ - (resp[i*4 + 1] << 8) | \ - (resp[i*4 + 2] << 16) | \ - (resp[i*4 + 3] << 24)) - return data - - - def readDP(self, addr): - resp = dapTransfer(self.interface, 1, [READ | DP_ACC | (addr & 0x0c)]) - return (resp[0] << 0) | \ - (resp[1] << 8) | \ - (resp[2] << 16) | \ - (resp[3] << 24) - - def writeDP(self, addr, data): - if addr == DP_REG['SELECT']: - if data == self.dp_select: - return - self.dp_select = data - - dapTransfer(self.interface, 1, [WRITE | DP_ACC | (addr & 0x0c)], [data]) - return True - - def writeAP(self, addr, data): - if addr == AP_REG['CSW']: - if data == self.csw: - return - self.csw = data - - ap_sel = addr & 0xff000000 - bank_sel = addr & APBANKSEL - - self.writeDP(DP_REG['SELECT'], ap_sel | bank_sel) - dapTransfer(self.interface, 1, [WRITE | AP_ACC | (addr & 0x0c)], [data]) - return True - - def readAP(self, addr): - ap_sel = addr & 0xff000000 - bank_sel = addr & APBANKSEL - - self.writeDP(DP_REG['SELECT'], ap_sel | bank_sel) - resp = dapTransfer(self.interface, 1, [READ | AP_ACC | (addr & 0x0c)]) - return (resp[0] << 0) | \ - (resp[1] << 8) | \ - (resp[2] << 16) | \ - (resp[3] << 24) - - def reset(self): - dapSWJPins(self.interface, 0, 'nRESET') - sleep(0.1) - dapSWJPins(self.interface, 0x80, 'nRESET') - sleep(0.1) - - def assertReset(self, asserted): - if asserted: - dapSWJPins(self.interface, 0, 'nRESET') - else: - dapSWJPins(self.interface, 0x80, 'nRESET') - - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py b/workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py deleted file mode 100644 index 49e281213d..0000000000 --- a/workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py +++ /dev/null @@ -1,315 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import logging -import array - -COMMAND_ID = {'DAP_INFO': 0x00, - 'DAP_LED': 0x01, - 'DAP_CONNECT': 0x02, - 'DAP_DISCONNECT': 0x03, - 'DAP_TRANSFER_CONFIGURE': 0x04, - 'DAP_TRANSFER': 0x05, - 'DAP_TRANSFER_BLOCK': 0x06, - 'DAP_TRANSFER_ABORT': 0x07, - 'DAP_WRITE_ABORT': 0x08, - 'DAP_DELAY': 0x09, - 'DAP_RESET_TARGET': 0x0a, - 'DAP_SWJ_PINS': 0x10, - 'DAP_SWJ_CLOCK': 0x11, - 'DAP_SWJ_SEQUENCE': 0x12, - 'DAP_SWD_CONFIGURE': 0x13, - } - -ID_INFO = {'VENDOR_ID': 0x01, - 'PRODUCT_ID': 0x02, - 'SERIAL_NUMBER': 0x03, - 'CMSIS_DAP_FW_VERSION': 0x04, - 'TARGET_DEVICE_VENDOR': 0x05, - 'TARGET_DEVICE_NAME': 0x06, - 'CAPABILITIES': 0xf0, - 'PACKET_COUNT': 0xfe, - 'PACKET_SIZE': 0xff - } - -PINS = {'None': 0x00, - 'SWCLK_TCK': (1 << 0), - 'SWDIO_TMS': (1 << 1), - 'TDI': (1 << 2), - 'TDO': (1 << 3), - 'nTRST': (1 << 5), - 'nRESET': (1 << 7), - } - -DAP_DEFAULT_PORT = 0 -DAP_SWD_PORT = 1 -DAP_JTAG_POR = 2 - -DAP_OK = 0 -DAP_ERROR = 0xff - -MAX_PACKET_SIZE = 0x0E - -def dapInfo(interface, id_): - cmd = [] - cmd.append(COMMAND_ID['DAP_INFO']) - cmd.append(ID_INFO[id_]) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_INFO']: - raise ValueError('DAP_INFO response error') - - if resp[1] == 0: - return - - if resp[1] == 1: - return resp[2] - - if resp[1] == 2: - return (resp[3] << 8) | resp[2] - - x = array.array('B', [i for i in resp[2:2+resp[1]]]) - - return x.tostring() - - -def dapLed(interface): - #not yet implemented - return - -def dapConnect(interface, mode = DAP_DEFAULT_PORT): - cmd = [] - cmd.append(COMMAND_ID['DAP_CONNECT']) - cmd.append(mode) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_CONNECT']: - raise ValueError('DAP_CONNECT response error') - - if resp[1] == 0: - raise ValueError('DAP Connect failed') - - if resp[1] == 1: - logging.info('DAP SWD MODE initialised') - - if resp[1] == 2: - logging.info('DAP JTAG MODE initialised') - - return resp[1] - -def dapDisconnect(interface): - cmd = [] - cmd.append(COMMAND_ID['DAP_DISCONNECT']) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_DISCONNECT']: - raise ValueError('DAP_DISCONNECT response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP Disconnect failed') - - return resp[1] - - -def dapWriteAbort(interface, data, dap_index = 0): - cmd = [] - cmd.append(COMMAND_ID['DAP_WRITE_ABORT']) - cmd.append(dap_index) - cmd.append((data >> 0) & 0xff) - cmd.append((data >> 8) & 0xff) - cmd.append((data >> 16) & 0xff) - cmd.append((data >> 24) & 0xff) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_WRITE_ABORT']: - raise ValueError('DAP_WRITE_ABORT response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP Write Abort failed') - - return True - -def dapResetTarget(interface): - cmd = [] - cmd.append(COMMAND_ID['DAP_RESET_TARGET']) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_RESET_TARGET']: - raise ValueError('DAP_RESET_TARGET response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP Reset target failed') - - return resp[1] - -def dapTransferConfigure(interface, idle_cycles = 0x00, wait_retry = 0x0050, match_retry = 0x0000): - cmd = [] - cmd.append(COMMAND_ID['DAP_TRANSFER_CONFIGURE']) - cmd.append(idle_cycles) - cmd.append(wait_retry & 0xff) - cmd.append(wait_retry >> 8) - cmd.append(match_retry & 0xff) - cmd.append(match_retry >> 8) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_TRANSFER_CONFIGURE']: - raise ValueError('DAP_TRANSFER_CONFIGURE response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP Transfer Configure failed') - - return resp[1] - -def dapTransfer(interface, count, request, data = [0], dap_index = 0): - cmd = [] - cmd.append(COMMAND_ID['DAP_TRANSFER']) - cmd.append(dap_index) - cmd.append(count) - count_write = count - for i in range(count): - cmd.append(request[i]) - if not ( request[i] & ((1 << 1) | (1 << 4))): - cmd.append(data[i] & 0xff) - cmd.append((data[i] >> 8) & 0xff) - cmd.append((data[i] >> 16) & 0xff) - cmd.append((data[i] >> 24) & 0xff) - count_write -= 1 - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_TRANSFER']: - raise ValueError('DAP_TRANSFER response error') - - if resp[1] != count: - raise ValueError('Transfer not completed') - - if resp[2] != 0x01: - raise ValueError('SWD Fault') - - return resp[3:3+count_write*4] - -def dapTransferBlock(interface, count, request, data = [0], dap_index = 0): - packet_count = count - nb = 0 - resp = [] - # we send successfully several packets if the size is bigger than MAX_PACKET_COUNT - while packet_count > 0: - cmd = [] - cmd.append(COMMAND_ID['DAP_TRANSFER_BLOCK']) - cmd.append(dap_index) - packet_written = min(packet_count, MAX_PACKET_SIZE) - cmd.append(packet_written & 0xff) - cmd.append((packet_written >> 8) & 0xff) - cmd.append(request) - if not (request & ((1 << 1))): - for i in range(packet_written): - cmd.append(data[i + nb*MAX_PACKET_SIZE] & 0xff) - cmd.append((data[i + nb*MAX_PACKET_SIZE] >> 8) & 0xff) - cmd.append((data[i + nb*MAX_PACKET_SIZE] >> 16) & 0xff) - cmd.append((data[i + nb*MAX_PACKET_SIZE] >> 24) & 0xff) - interface.write(cmd) - packet_count = packet_count - MAX_PACKET_SIZE - nb = nb + 1 - - # we then read - tmp = interface.read() - if tmp[0] != COMMAND_ID['DAP_TRANSFER_BLOCK'] or tmp[3] != 0x01: - raise ValueError('DAP_TRANSFER_BLOCK response error') - size_transfer = tmp[1] | (tmp[2] << 8) - resp.extend(tmp[4:4+size_transfer*4]) - - return resp - -def dapSWJClock(interface, clock = 1000000): - cmd = [] - cmd.append(COMMAND_ID['DAP_SWJ_CLOCK']) - cmd.append(clock & 0xff) - cmd.append((clock >> 8) & 0xff) - cmd.append((clock >> 16) & 0xff) - cmd.append((clock >> 24) & 0xff) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_SWJ_CLOCK']: - raise ValueError('DAP_SWJ_CLOCK response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP SWJ Clock failed') - - return resp[1] - -def dapSWJPins(interface, output, pin, wait = 0): - cmd = [] - cmd.append(COMMAND_ID['DAP_SWJ_PINS']) - try: - p = PINS[pin] - except KeyError: - logging.error('cannot find %s pin', pin) - return - cmd.append(output & 0xff) - cmd.append(p) - cmd.append(wait & 0xff) - cmd.append((wait >> 8) & 0xff) - cmd.append((wait >> 16) & 0xff) - cmd.append((wait >> 24) & 0xff) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_SWJ_PINS']: - raise ValueError('DAP_SWJ_PINS response error') - - return resp[1] - - -def dapSWDConfigure(interface, conf = 0): - cmd = [] - cmd.append(COMMAND_ID['DAP_SWD_CONFIGURE']) - cmd.append(conf) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_SWD_CONFIGURE']: - raise ValueError('DAP_SWD_CONFIGURE response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP SWD Configure failed') - - return resp[1] - -def dapSWJSequence(interface, data): - cmd = [] - cmd.append(COMMAND_ID['DAP_SWJ_SEQUENCE']) - cmd.append(len(data)*8) - for i in range(len(data)): - cmd.append(data[i]) - interface.write(cmd) - - resp = interface.read() - if resp[0] != COMMAND_ID['DAP_SWJ_SEQUENCE']: - raise ValueError('DAP_SWJ_SEQUENCE response error') - - if resp[1] != DAP_OK: - raise ValueError('DAP SWJ Sequence failed') - - return resp[1] - \ No newline at end of file diff --git a/workspace_tools/debugger/pyOCD/transport/transport.py b/workspace_tools/debugger/pyOCD/transport/transport.py deleted file mode 100644 index b0dae47f07..0000000000 --- a/workspace_tools/debugger/pyOCD/transport/transport.py +++ /dev/null @@ -1,64 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -class Transport(): - - def __init__(self, interface): - self.interface = interface - return - - def init(self): - return - - def uninit(self): - return - - def info(self, request): - return - - def readDP(self, addr): - return - - def writeDP(self, addr, data): - return - - def writeAP(self, addr, data): - return - - def readAP(self, addr): - return - - def writeMem(self, addr, data, transfer_size = 32): - return - - def readMem(self, addr, transfer_size = 32): - return - - def writeBlock32(self, addr, data): - return - - def readBlock32(self, addr, data): - return - - def assertReset(self, asserted): - return - - def getUniqueID(self): - return - - def reset(self): - return \ No newline at end of file diff --git a/workspace_tools/debugger/setup.py b/workspace_tools/debugger/setup.py deleted file mode 100644 index f61df3abaf..0000000000 --- a/workspace_tools/debugger/setup.py +++ /dev/null @@ -1,33 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -from distutils.core import setup - -setup( - name="pyOCD", - version="0.1", - description="CMSIS-DAP debugger for python", - author="samux", - author_email="samuel.mokrani@gmail.com", - license="Apache 2.0", - classifiers = [ - "Development Status :: 4 - Beta", - "License :: Apache 2.0", - "Programming Language :: Python", - ], - packages=["pyOCD", "pyOCD.flash", "pyOCD.gdbserver", "pyOCD.interface", "pyOCD.target", "pyOCD.transport", "pyOCD.board"] -) diff --git a/workspace_tools/debugger/test/basic_test.py b/workspace_tools/debugger/test/basic_test.py deleted file mode 100644 index 69ab407bf8..0000000000 --- a/workspace_tools/debugger/test/basic_test.py +++ /dev/null @@ -1,165 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import argparse, os -from time import sleep -from random import randrange - -parentdir = os.path.dirname(os.path.dirname(os.path.abspath(__file__))) - -from pyOCD.board import MbedBoard - -addr = 0 -size = 0 -f = None -binary_file = "l1_" - -interface = None - -import logging - -logging.basicConfig(level=logging.INFO) - -parser = argparse.ArgumentParser(description='A CMSIS-DAP python debugger') -parser.add_argument('-f', help='binary file', dest = "file") -args = parser.parse_args() - -try: - - board = MbedBoard.chooseBoard() - target_type = board.getTargetType() - - if args.file is None: - binary_file += target_type + ".bin" - binary_file = os.path.join(parentdir, 'binaries', binary_file) - else: - binary_file = args.file - - print "binary file: %s" % binary_file - - if target_type == "lpc1768": - addr = 0x10000001 - size = 0x1102 - elif target_type == "lpc11u24": - addr = 0x10000001 - size = 0x502 - elif target_type == "kl25z": - addr = 0x20000001 - size = 0x502 - elif target_type == "lpc800": - addr = 0x10000001 - size = 0x502 - - target = board.target - transport = board.transport - flash = board.flash - interface = board.interface - - - print "\r\n\r\n------ GET Unique ID ------" - print "Unique ID: %s" % board.getUniqueID() - - print "\r\n\r\n------ TEST READ / WRITE CORE REGISTER ------" - pc = target.readCoreRegister('pc') - print "initial pc: 0x%X" % target.readCoreRegister('pc') - # write in pc dummy value - target.writeCoreRegister('pc', 0x3D82) - print "now pc: 0x%X" % target.readCoreRegister('pc') - # write initial pc value - target.writeCoreRegister('pc', pc) - print "initial pc value rewritten: 0x%X" % target.readCoreRegister('pc') - - - print "\r\n\r\n------ TEST HALT / RESUME ------" - - print "resume" - target.resume() - sleep(0.2) - - print "halt" - target.halt() - print "HALT: pc: 0x%X" % target.readCoreRegister('pc') - sleep(0.2) - - - - print "\r\n\r\n------ TEST READ / WRITE MEMORY ------" - target.halt() - print "READ32/WRITE32" - val = randrange(0, 0xffffffff) - print "write32 0x%X at 0x%X" % (val, addr) - target.writeMemory(addr, val) - res = target.readMemory(addr) - print "read32 at 0x%X: 0x%X" % (addr, res) - if res != val: - print "ERROR in READ/WRITE 32" - - print "\r\nREAD16/WRITE316" - val = randrange(0, 0xffff) - print "write16 0x%X at 0x%X" % (val, addr + 2) - target.writeMemory(addr + 2, val, 16) - res = target.readMemory(addr + 2, 16) - print "read16 at 0x%X: 0x%X" % (addr + 2, res) - if res != val: - print "ERROR in READ/WRITE 16" - - print "\r\nREAD8/WRITE8" - val = randrange(0, 0xff) - print "write8 0x%X at 0x%X" % (val, addr + 1) - target.writeMemory(addr + 1, val, 8) - res = target.readMemory(addr + 1, 8) - print "read8 at 0x%X: 0x%X" % (addr + 1, res) - if res != val: - print "ERROR in READ/WRITE 8" - - - print "\r\n\r\n------ TEST READ / WRITE MEMORY BLOCK ------" - data = [randrange(1, 50) for x in range(size)] - target.writeBlockMemoryUnaligned8(addr, data) - block = target.readBlockMemoryUnaligned8(addr, size) - error = False - for i in range(len(block)): - if (block[i] != data[i]): - error = True - print "ERROR: 0x%X, 0x%X, 0x%X!!!" % ((addr + i), block[i], data[i]) - if error: - print "TEST FAILED" - else: - print "TEST PASSED" - - - print "\r\n\r\n------ TEST RESET ------" - target.reset() - sleep(0.1) - target.halt() - - for i in range(5): - target.step() - print "pc: 0x%X" % target.readCoreRegister('pc') - - - print "\r\n\r\n----- FLASH NEW BINARY -----" - flash.flashBinary(binary_file) - - target.reset() - -except Exception as e: - print "Unknown exception: %s" % e - -finally: - if board != None: - board.uninit() \ No newline at end of file diff --git a/workspace_tools/debugger/test/gdb_test.py b/workspace_tools/debugger/test/gdb_test.py deleted file mode 100644 index dd04436fed..0000000000 --- a/workspace_tools/debugger/test/gdb_test.py +++ /dev/null @@ -1,36 +0,0 @@ -""" - mbed CMSIS-DAP debugger - Copyright (c) 2006-2013 ARM Limited - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -""" - -import logging - -from pyOCD.gdbserver import GDBServer -from pyOCD.board import MbedBoard - -logging.basicConfig(level=logging.INFO) - -try: - board_selected = MbedBoard.chooseBoard() - if board_selected != None: - gdb = GDBServer(board_selected, 3333) - while gdb.isAlive(): - gdb.join(timeout = 0.5) - -except KeyboardInterrupt: - gdb.stop() -except Exception as e: - print "uncaught exception: %s" % e - gdb.stop() \ No newline at end of file From 77326cd553bbc5b81f616139862f63e44e7b1ed7 Mon Sep 17 00:00:00 2001 From: Austin Mullins Date: Mon, 21 Oct 2013 11:05:46 -0500 Subject: [PATCH 062/117] Added 'macros' keyword to build_api.py to allow building USB libraries. --- workspace_tools/build_api.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/workspace_tools/build_api.py b/workspace_tools/build_api.py index 2c95d92366..6a34ed47de 100644 --- a/workspace_tools/build_api.py +++ b/workspace_tools/build_api.py @@ -124,12 +124,12 @@ def build_library(src_paths, build_path, target, toolchain_name, toolchain.build_library(objects, bin_path, name) -def build_lib(lib_id, target, toolchain, options=None, verbose=False, clean=False): +def build_lib(lib_id, target, toolchain, options=None, verbose=False, clean=False, macros=None): lib = Library(lib_id) if lib.is_supported(target, toolchain): build_library(lib.source_dir, lib.build_dir, target, toolchain, lib.dependencies, options, - verbose=verbose, clean=clean) + verbose=verbose, clean=clean, macros=macros) else: print '\n\nLibrary "%s" is not yet supported on target %s with toolchain %s' % (lib_id, target.name, toolchain) From cabc4b6b9d39dc57527961ae487a337ec3b1ec68 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Tue, 22 Oct 2013 11:50:52 +0300 Subject: [PATCH 063/117] Remove invalid default value for '-p' in make.py This prevented make.py from running properly. --- workspace_tools/make.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/make.py b/workspace_tools/make.py index 37f76c77cf..9366db922a 100644 --- a/workspace_tools/make.py +++ b/workspace_tools/make.py @@ -42,7 +42,7 @@ except: if __name__ == '__main__': # Parse Options parser = get_default_options_parser() - parser.add_option("-p", type="int", dest="program", default=-1, + parser.add_option("-p", type="int", dest="program", help="The index of the desired test program: [0-%d]" % (len(TESTS)-1)) parser.add_option("-n", dest="program_name", help="The name of the desired test program") From 7f35fc4b76955ccdd36d52e376c18d9108e5d9bf Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Tue, 22 Oct 2013 11:57:55 +0300 Subject: [PATCH 064/117] Added support for CMDA modem in HTTPClientTest Also remove unnecessary thread from main --- .../net/cellular/http/common/httptest.cpp | 2 ++ .../net/cellular/http/ubloxusbgsm/main.cpp | 27 +++++++++---------- 2 files changed, 14 insertions(+), 15 deletions(-) diff --git a/libraries/tests/net/cellular/http/common/httptest.cpp b/libraries/tests/net/cellular/http/common/httptest.cpp index 379b7e234f..3bbc4673ea 100644 --- a/libraries/tests/net/cellular/http/common/httptest.cpp +++ b/libraries/tests/net/cellular/http/common/httptest.cpp @@ -10,6 +10,8 @@ int httptest(CellularModem& modem, const char* apn, const char* username, const HTTPClient http; char str[512]; + modem.power(true); + Thread::wait(1000); int ret = modem.connect(apn, username, password); if(ret) { diff --git a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp index 030509af83..3454114579 100644 --- a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp @@ -1,6 +1,12 @@ -#include "UBloxUSBGSMModem.h" +#include "UbloxUSBGSMModem.h" +#include "UbloxUSBCDMAModem.h" #include "httptest.h" +#if !defined(MODEM_UBLOX_GSM) && !defined(MODEM_UBLOX_CDMA) +#warning No modem defined, using GSM by default +#define MODEM_UBLOX_GSM +#endif + #ifndef MODEM_APN #warning APN not specified, using "internet" #define MODEM_APN "internet" @@ -16,23 +22,14 @@ #define MODEM_PASSWORD NULL #endif -void test(void const* data) +int main() { +#ifdef MODEM_UBLOX_GSM UbloxUSBGSMModem modem; +#else + UbloxUSBCDMAModem modem(p18, true, 1); +#endif httptest(modem, MODEM_APN, MODEM_USERNAME, MODEM_PASSWORD); while (true); } -int main() -{ - Thread testTask(test, NULL, osPriorityNormal, 1024 * 4); - DigitalOut led(LED1); - - while (true) - { - led = !led; - Thread::wait(1000); - } - return 0; -} - From ae0bc41693f13be19ae43bf97e7fb91c55e99d08 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Tue, 22 Oct 2013 12:27:18 +0300 Subject: [PATCH 065/117] Added support for CDMA modem in SMSTest Also remove unnecessary thread from main --- .../tests/net/cellular/sms/common/smstest.cpp | 3 +++ .../net/cellular/sms/ubloxusbgsm/main.cpp | 25 ++++++++----------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/libraries/tests/net/cellular/sms/common/smstest.cpp b/libraries/tests/net/cellular/sms/common/smstest.cpp index 0aa66bda49..ca55e88543 100644 --- a/libraries/tests/net/cellular/sms/common/smstest.cpp +++ b/libraries/tests/net/cellular/sms/common/smstest.cpp @@ -3,6 +3,9 @@ void smstest(CellularModem& modem) { + modem.power(true); + Thread::wait(1000); + #ifdef DESTINATION_NUMBER modem.sendSM(DESINATION_NUMBER, "Hello from mbed:)"); #endif diff --git a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp index 550855fd86..a493be7bfe 100644 --- a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp +++ b/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp @@ -1,24 +1,21 @@ #include "UbloxUSBGSMModem.h" +#include "UbloxUSBCDMAModem.h" #include "smstest.h" -void test(const void* data) +#if !defined(MODEM_UBLOX_GSM) && !defined(MODEM_UBLOX_CDMA) +#warning No modem defined, using GSM by default +#define MODEM_UBLOX_GSM +#endif + +int main() { +#ifdef MODEM_UBLOX_GSM UbloxUSBGSMModem modem; +#else + UbloxUSBCDMAModem modem(p18, true, 1); +#endif smstest(modem); while (true); } -int main() -{ - Thread testTask(test, NULL, osPriorityNormal, 1024 * 4); - DigitalOut led(LED1); - - while (true) - { - led = !led; - Thread::wait(1000); - } - return 0; -} - From fe7021d4333c54f327aa60e775a292e82ee63cac Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Tue, 22 Oct 2013 12:41:01 +0300 Subject: [PATCH 066/117] Renamed ubloxusbgsm in main to ubloxusb Since the tests are now generic (both GSM and CDMA), rename the directory to reflect this. --- .../net/cellular/http/{ubloxusbgsm => ubloxusb}/main.cpp | 0 .../net/cellular/sms/{ubloxusbgsm => ubloxusb}/main.cpp | 0 workspace_tools/synch.py | 4 ++-- workspace_tools/tests.py | 8 ++++---- 4 files changed, 6 insertions(+), 6 deletions(-) rename libraries/tests/net/cellular/http/{ubloxusbgsm => ubloxusb}/main.cpp (100%) rename libraries/tests/net/cellular/sms/{ubloxusbgsm => ubloxusb}/main.cpp (100%) diff --git a/libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/http/ubloxusb/main.cpp similarity index 100% rename from libraries/tests/net/cellular/http/ubloxusbgsm/main.cpp rename to libraries/tests/net/cellular/http/ubloxusb/main.cpp diff --git a/libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp b/libraries/tests/net/cellular/sms/ubloxusb/main.cpp similarity index 100% rename from libraries/tests/net/cellular/sms/ubloxusbgsm/main.cpp rename to libraries/tests/net/cellular/sms/ubloxusb/main.cpp diff --git a/workspace_tools/synch.py b/workspace_tools/synch.py index 9dc1f7313c..b89bb53b5c 100644 --- a/workspace_tools/synch.py +++ b/workspace_tools/synch.py @@ -62,8 +62,8 @@ OFFICIAL_CODE = ( ("CellularModem", "net/cellular/CellularModem"), ("CellularUSBModem", "net/cellular/CellularUSBModem"), ("UbloxUSBModem", "net/cellular/UbloxUSBModem"), - ("UbloxModemHTTPClientTest", ["tests/net/cellular/http/common", "tests/net/cellular/http/ubloxusbgsm"]), - ("UbloxModemSMSTest", ["tests/net/cellular/sms/common", "tests/net/cellular/sms/ubloxusbgsm"]), + ("UbloxModemHTTPClientTest", ["tests/net/cellular/http/common", "tests/net/cellular/http/ubloxusb"]), + ("UbloxModemSMSTest", ["tests/net/cellular/sms/common", "tests/net/cellular/sms/ubloxusb"]), ) diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py index d0c727c8f6..92aa5b4039 100644 --- a/workspace_tools/tests.py +++ b/workspace_tools/tests.py @@ -567,14 +567,14 @@ TESTS = [ # u-blox tests { - "id": "UB_1", "description": "u-blox USB GSM modem: HTTP client", - "source_dir": [join(TEST_DIR, "net", "cellular", "http", "ubloxusbgsm"), join(TEST_DIR, "net", "cellular", "http", "common")], + "id": "UB_1", "description": "u-blox USB modem: HTTP client", + "source_dir": [join(TEST_DIR, "net", "cellular", "http", "ubloxusb"), join(TEST_DIR, "net", "cellular", "http", "common")], "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], "supported": CORTEX_ARM_SUPPORT, }, { - "id": "UB_2", "description": "u-blox USB GSM modem: SMS test", - "source_dir": [join(TEST_DIR, "net", "cellular", "sms", "ubloxusbgsm"), join(TEST_DIR, "net", "cellular", "sms", "common")], + "id": "UB_2", "description": "u-blox USB modem: SMS test", + "source_dir": [join(TEST_DIR, "net", "cellular", "sms", "ubloxusb"), join(TEST_DIR, "net", "cellular", "sms", "common")], "dependencies": [MBED_LIBRARIES, RTOS_LIBRARIES, USB_HOST_LIBRARIES, UBLOX_LIBRARY], "supported": CORTEX_ARM_SUPPORT, }, From d2318804f10c80440ae8394d2a36ed02c0d3a1d5 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Tue, 22 Oct 2013 12:13:04 +0100 Subject: [PATCH 067/117] Restructuring --- .gitignore | 3 ++ MANIFEST | 134 ------------------------------------------------ MANIFEST.in | 2 +- __init__.py | 0 description.rst | 3 -- setup.py | 6 ++- 6 files changed, 8 insertions(+), 140 deletions(-) delete mode 100644 __init__.py delete mode 100644 description.rst diff --git a/.gitignore b/.gitignore index 3ee238383d..850758cf1e 100644 --- a/.gitignore +++ b/.gitignore @@ -3,6 +3,9 @@ # Distribution dir dist +# MANIFEST file +MANIFEST + # Private settings private_settings.py diff --git a/MANIFEST b/MANIFEST index e1398a5a9b..fd9c09e241 100644 --- a/MANIFEST +++ b/MANIFEST @@ -1,137 +1,3 @@ # file GENERATED by distutils, do NOT edit LICENSE -__init__.py -description.rst setup.py -workspace_tools/__init__.py -workspace_tools/autotest.py -workspace_tools/build.py -workspace_tools/build_api.py -workspace_tools/build_release.py -workspace_tools/client.py -workspace_tools/export_test.py -workspace_tools/hooks.py -workspace_tools/libraries.py -workspace_tools/make.py -workspace_tools/options.py -workspace_tools/patch.py -workspace_tools/paths.py -workspace_tools/project.py -workspace_tools/server.py -workspace_tools/settings.py -workspace_tools/size.py -workspace_tools/syms.py -workspace_tools/synch.py -workspace_tools/targets.py -workspace_tools/tests.py -workspace_tools/utils.py -workspace_tools/data/__init__.py -workspace_tools/data/example_test_spec.json -workspace_tools/data/support.py -workspace_tools/data/rpc/RPCClasses.h -workspace_tools/data/rpc/class.cpp -workspace_tools/debugger/README.md -workspace_tools/debugger/__init__.py -workspace_tools/debugger/setup.py -workspace_tools/debugger/binaries/l1_kl25z.bin -workspace_tools/debugger/binaries/l1_lpc11u24.bin -workspace_tools/debugger/binaries/l1_lpc1768.bin -workspace_tools/debugger/binaries/l1_lpc800.bin -workspace_tools/debugger/elf_files/lpc11u24_l1_gcc_arm.elf -workspace_tools/debugger/elf_files/lpc1768_l1_gcc_arm.elf -workspace_tools/debugger/pyOCD/__init__.py -workspace_tools/debugger/pyOCD/board/__init__.py -workspace_tools/debugger/pyOCD/board/board.py -workspace_tools/debugger/pyOCD/board/mbed_board.py -workspace_tools/debugger/pyOCD/flash/__init__.py -workspace_tools/debugger/pyOCD/flash/flash.py -workspace_tools/debugger/pyOCD/flash/flash_kl25z.py -workspace_tools/debugger/pyOCD/flash/flash_lpc11u24.py -workspace_tools/debugger/pyOCD/flash/flash_lpc1768.py -workspace_tools/debugger/pyOCD/flash/flash_lpc800.py -workspace_tools/debugger/pyOCD/gdbserver/__init__.py -workspace_tools/debugger/pyOCD/gdbserver/gdb_socket.py -workspace_tools/debugger/pyOCD/gdbserver/gdb_websocket.py -workspace_tools/debugger/pyOCD/gdbserver/gdbserver.py -workspace_tools/debugger/pyOCD/interface/__init__.py -workspace_tools/debugger/pyOCD/interface/interface.py -workspace_tools/debugger/pyOCD/interface/pyusb_backend.py -workspace_tools/debugger/pyOCD/interface/pywinusb_backend.py -workspace_tools/debugger/pyOCD/target/__init__.py -workspace_tools/debugger/pyOCD/target/cortex_m.py -workspace_tools/debugger/pyOCD/target/target.py -workspace_tools/debugger/pyOCD/target/target_kl25z.py -workspace_tools/debugger/pyOCD/target/target_lpc11u24.py -workspace_tools/debugger/pyOCD/target/target_lpc1768.py -workspace_tools/debugger/pyOCD/target/target_lpc800.py -workspace_tools/debugger/pyOCD/transport/__init__.py -workspace_tools/debugger/pyOCD/transport/cmsis_dap.py -workspace_tools/debugger/pyOCD/transport/cmsis_dap_core.py -workspace_tools/debugger/pyOCD/transport/transport.py -workspace_tools/debugger/test/basic_test.py -workspace_tools/debugger/test/gdb_test.py -workspace_tools/dev/__init__.py -workspace_tools/dev/dsp_fir.py -workspace_tools/dev/rpc_classes.py -workspace_tools/export/__init__.py -workspace_tools/export/codered.py -workspace_tools/export/codered_lpc1768_cproject.tmpl -workspace_tools/export/codered_lpc1768_project.tmpl -workspace_tools/export/codered_lpc4088_cproject.tmpl -workspace_tools/export/codered_lpc4088_project.tmpl -workspace_tools/export/codesourcery.py -workspace_tools/export/codesourcery_lpc1768.tmpl -workspace_tools/export/ds5_5.py -workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl -workspace_tools/export/ds5_5_lpc11u24.launch.tmpl -workspace_tools/export/ds5_5_lpc11u24.project.tmpl -workspace_tools/export/ds5_5_lpc1768.cproject.tmpl -workspace_tools/export/ds5_5_lpc1768.launch.tmpl -workspace_tools/export/ds5_5_lpc1768.project.tmpl -workspace_tools/export/exporters.py -workspace_tools/export/gcc_arm_lpc1768.tmpl -workspace_tools/export/gccarm.py -workspace_tools/export/iar.ewp.tmpl -workspace_tools/export/iar.eww.tmpl -workspace_tools/export/iar.py -workspace_tools/export/uvision4.py -workspace_tools/export/uvision4_kl25z.uvopt.tmpl -workspace_tools/export/uvision4_kl25z.uvproj.tmpl -workspace_tools/export/uvision4_lpc1114.uvopt.tmpl -workspace_tools/export/uvision4_lpc1114.uvproj.tmpl -workspace_tools/export/uvision4_lpc11c24.uvopt.tmpl -workspace_tools/export/uvision4_lpc11c24.uvproj.tmpl -workspace_tools/export/uvision4_lpc11u24.uvopt.tmpl -workspace_tools/export/uvision4_lpc11u24.uvproj.tmpl -workspace_tools/export/uvision4_lpc1347.uvopt.tmpl -workspace_tools/export/uvision4_lpc1347.uvproj.tmpl -workspace_tools/export/uvision4_lpc1768.uvopt.tmpl -workspace_tools/export/uvision4_lpc1768.uvproj.tmpl -workspace_tools/export/uvision4_lpc4088.uvopt.tmpl -workspace_tools/export/uvision4_lpc4088.uvproj.tmpl -workspace_tools/export/uvision4_lpc812.uvopt.tmpl -workspace_tools/export/uvision4_lpc812.uvproj.tmpl -workspace_tools/host_tests/__init__.py -workspace_tools/host_tests/echo.py -workspace_tools/host_tests/host_test.py -workspace_tools/host_tests/mbedrpc.py -workspace_tools/host_tests/net_test.py -workspace_tools/host_tests/rpc.py -workspace_tools/host_tests/tcpecho_client.py -workspace_tools/host_tests/tcpecho_server.py -workspace_tools/host_tests/tcpecho_server_loop.py -workspace_tools/host_tests/udpecho_client.py -workspace_tools/host_tests/udpecho_server.py -workspace_tools/host_tests/example/BroadcastReceive.py -workspace_tools/host_tests/example/BroadcastSend.py -workspace_tools/host_tests/example/MulticastReceive.py -workspace_tools/host_tests/example/MulticastSend.py -workspace_tools/host_tests/example/TCPEchoClient.py -workspace_tools/host_tests/example/TCPEchoServer.py -workspace_tools/host_tests/example/UDPEchoClient.py -workspace_tools/host_tests/example/UDPEchoServer.py -workspace_tools/host_tests/example/__init__.py -workspace_tools/toolchains/__init__.py -workspace_tools/toolchains/arm.py -workspace_tools/toolchains/gcc.py -workspace_tools/toolchains/iar.py diff --git a/MANIFEST.in b/MANIFEST.in index 2d5cb97854..8294764a5c 100644 --- a/MANIFEST.in +++ b/MANIFEST.in @@ -1,2 +1,2 @@ -include __init__.py LICENSE description.rst graft workspace_tools +include __init__.py LICENSE diff --git a/__init__.py b/__init__.py deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/description.rst b/description.rst deleted file mode 100644 index bb6ed8686e..0000000000 --- a/description.rst +++ /dev/null @@ -1,3 +0,0 @@ -A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles). - -.. _mbed framework: http://mbed.org diff --git a/setup.py b/setup.py index 2365e404d6..9ecbcfef05 100644 --- a/setup.py +++ b/setup.py @@ -6,12 +6,14 @@ PyPI package for the Mbed SDK from distutils.core import setup LICENSE = open('LICENSE').read() -DESCRIPTION = open('description.rst').read() +DESCRIPTION = """A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles). + +.. _mbed framework: http://mbed.org""" OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' setup(name='mbed', - version='0.1.5', + version='0.1.6', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From 067e446ae22351d6c4614aba96ba2a5517b996ef Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Tue, 22 Oct 2013 10:57:28 -0700 Subject: [PATCH 068/117] Add CAN->filter to API and add placeholders to hal's Add filter function and modify CAN->read definition to allow reading specific messages. --- libraries/mbed/api/CAN.h | 16 +++++++++- libraries/mbed/api/can_helper.h | 3 +- libraries/mbed/common/CAN.cpp | 30 +++++++++++-------- libraries/mbed/hal/can_api.h | 3 +- .../hal/TARGET_NXP/TARGET_LPC176X/can_api.c | 9 ++++-- .../hal/TARGET_NXP/TARGET_LPC23XX/can_api.c | 10 ++++++- .../hal/TARGET_NXP/TARGET_LPC408X/can_api.c | 6 +++- 7 files changed, 56 insertions(+), 21 deletions(-) diff --git a/libraries/mbed/api/CAN.h b/libraries/mbed/api/CAN.h index 25b7620c02..f494e77523 100644 --- a/libraries/mbed/api/CAN.h +++ b/libraries/mbed/api/CAN.h @@ -131,12 +131,13 @@ public: /** Read a CANMessage from the bus. * * @param msg A CANMessage to read to. + * @param handle message filter handle (0 for any message) * * @returns * 0 if no message arrived, * 1 if message arrived */ - int read(CANMessage &msg); + int read(CANMessage &msg, int handle = 0); /** Reset CAN interface. * @@ -169,6 +170,19 @@ public: */ int mode(Mode mode); + /** Filter out incomming messages + * + * @param id the id to filter on + * @param mask the mask applied to the id + * @param format format to filter on (Default CANAny) + * @param handle message filter handle (Optional) + * + * @returns + * 0 if filter change failed or unsupported, + * new filter handle if successful + */ + int filter(unsigned int id, unsigned int mask, CANFormat format = CANAny, int handle = 0); + /** Returns number of read errors to detect read overflow errors. */ unsigned char rderror(); diff --git a/libraries/mbed/api/can_helper.h b/libraries/mbed/api/can_helper.h index 45aa231dc5..e427250e07 100644 --- a/libraries/mbed/api/can_helper.h +++ b/libraries/mbed/api/can_helper.h @@ -24,7 +24,8 @@ extern "C" { enum CANFormat { CANStandard = 0, - CANExtended = 1 + CANExtended = 1, + CANAny = 2 }; typedef enum CANFormat CANFormat; diff --git a/libraries/mbed/common/CAN.cpp b/libraries/mbed/common/CAN.cpp index 2b1fd4fdac..b33ca9f80f 100644 --- a/libraries/mbed/common/CAN.cpp +++ b/libraries/mbed/common/CAN.cpp @@ -39,8 +39,8 @@ int CAN::write(CANMessage msg) { return can_write(&_can, msg, 0); } -int CAN::read(CANMessage &msg) { - return can_read(&_can, &msg); +int CAN::read(CANMessage &msg, int handle) { + return can_read(&_can, &msg, handle); } void CAN::reset() { @@ -63,19 +63,23 @@ int CAN::mode(Mode mode) { return can_mode(&_can, (CanMode)mode); } - void CAN::attach(void (*fptr)(void), IrqType type) { - if (fptr) { - _irq[(CanIrqType)type].attach(fptr); - can_irq_set(&_can, (CanIrqType)type, 1); - } else { - can_irq_set(&_can, (CanIrqType)type, 0); - } - } +int CAN::filter(unsigned int id, unsigned int mask, CANFormat format, int handle) { + return can_filter(&_can, id, mask, format, handle); +} - void CAN::_irq_handler(uint32_t id, CanIrqType type) { - CAN *handler = (CAN*)id; - handler->_irq[type].call(); +void CAN::attach(void (*fptr)(void), IrqType type) { + if (fptr) { + _irq[(CanIrqType)type].attach(fptr); + can_irq_set(&_can, (CanIrqType)type, 1); + } else { + can_irq_set(&_can, (CanIrqType)type, 0); } +} + +void CAN::_irq_handler(uint32_t id, CanIrqType type) { + CAN *handler = (CAN*)id; + handler->_irq[type].call(); +} } // namespace mbed diff --git a/libraries/mbed/hal/can_api.h b/libraries/mbed/hal/can_api.h index 5f2179cded..bb90367cff 100644 --- a/libraries/mbed/hal/can_api.h +++ b/libraries/mbed/hal/can_api.h @@ -63,8 +63,9 @@ void can_irq_free (can_t *obj); void can_irq_set (can_t *obj, CanIrqType irq, uint32_t enable); int can_write (can_t *obj, CAN_Message, int cc); -int can_read (can_t *obj, CAN_Message *msg); +int can_read (can_t *obj, CAN_Message *msg, int handle); int can_mode (can_t *obj, CanMode mode); +int can_filter (can_t *obj, unsigned int id, unsigned int mask, CANFormat format, int handle); void can_reset (can_t *obj); unsigned char can_rderror (can_t *obj); unsigned char can_tderror (can_t *obj); diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/can_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/can_api.c index 62c0db2331..35b62ba241 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/can_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/can_api.c @@ -78,8 +78,11 @@ static inline void can_enable(can_t *obj) { } } -int can_mode(can_t *obj, CanMode mode) -{ +int can_mode(can_t *obj, CanMode mode) { + return 0; // not implemented +} + +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) { return 0; // not implemented } @@ -355,7 +358,7 @@ int can_write(can_t *obj, CAN_Message msg, int cc) { return 0; } -int can_read(can_t *obj, CAN_Message *msg) { +int can_read(can_t *obj, CAN_Message *msg, int handle) { CANMsg x; unsigned int *i = (unsigned int *)&x; diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/can_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/can_api.c index 79aaadc35a..f7ddf5278d 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/can_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC23XX/can_api.c @@ -72,6 +72,14 @@ static inline void can_enable(can_t *obj) { } } +int can_mode(can_t *obj, CanMode mode) { + return 0; // not implemented +} + +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) { + return 0; // not implemented +} + static int can_pclk(can_t *obj) { int value = 0; switch ((int)obj->dev) { @@ -247,7 +255,7 @@ int can_write(can_t *obj, CAN_Message msg, int cc) { return 0; } -int can_read(can_t *obj, CAN_Message *msg) { +int can_read(can_t *obj, CAN_Message *msg, int handle) { CANMsg x; unsigned int *i = (unsigned int *)&x; diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c index 8d09fad8b2..0ff86f93bf 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC408X/can_api.c @@ -83,6 +83,10 @@ int can_mode(can_t *obj, CanMode mode) return 0; // not implemented } +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) { + return 0; // not implemented +} + static inline void can_irq(uint32_t icr, uint32_t index) { uint32_t i; @@ -340,7 +344,7 @@ int can_write(can_t *obj, CAN_Message msg, int cc) { return 0; } -int can_read(can_t *obj, CAN_Message *msg) { +int can_read(can_t *obj, CAN_Message *msg, int handle) { CANMsg x; unsigned int *i = (unsigned int *)&x; From 08c1483eb3fe1e5769c50d06c6bcaa4faf784a8d Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Tue, 22 Oct 2013 11:00:17 -0700 Subject: [PATCH 069/117] Add bitfields definition to LPC11XX target Generated from UM10398 --- .../TARGET_LPC11XX_11CXX/bitfields.h | 1768 +++++++++++++++++ .../TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h | 1 + 2 files changed, 1769 insertions(+) create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/bitfields.h diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/bitfields.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/bitfields.h new file mode 100644 index 0000000000..59ea738645 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/bitfields.h @@ -0,0 +1,1768 @@ +#ifndef MBED_BITFIELDS_H +#define MBED_BITFIELDS_H + +//! Massage  x for use in bitfield  name. +#define BFN_PREP(x, name) ( ((x)<>name##_SHIFT ) + +//! Set bitfield  name from  y to  x: y.name= x. +#define BFN_SET(y, x, name) (y = ((y)&~name##_MASK) | BFN_PREP(x,name) ) + + +/* SYSMEMREMAP, address 0x4004 8000 */ +#define SYSMEMREMAP_MAP_MASK 0x0003 // System memory remap +#define SYSMEMREMAP_MAP_SHIFT 0 + +/* PRESETCTRL, address 0x4004 8004 */ +#define PRESETCTRL_SSP0_RST_N (1 << 0) // SPI0 reset control +#define PRESETCTRL_I2C_RST_N (1 << 1) // I2C reset control +#define PRESETCTRL_SSP1_RST_N (1 << 2) // SPI1 reset control +#define PRESETCTRL_CAN_RST_N (1 << 3) // C_CAN reset control. See Section 3.1 for part specific details. + +/* SYSPLLCTRL, address 0x4004 8008 */ +#define SYSPLLCTRL_MSEL_MASK 0x001F // Feedback divider value. The division value M is the programmed MSEL value + 1. 00000: Division ratio M = 1 to 11111: Division ratio M = 32. +#define SYSPLLCTRL_MSEL_SHIFT 0 +#define SYSPLLCTRL_PSEL_MASK 0x0060 // Post divider ratio P. The division ratio is 2 P. +#define SYSPLLCTRL_PSEL_SHIFT 5 + +/* SYSPLLSTAT, address 0x4004 800C */ +#define SYSPLLSTAT_LOCK (1 << 0) // PLL lock status + +/* SYSOSCCTRL, address 0x4004 8020 */ +#define SYSOSCCTRL_BYPASS (1 << 0) // Bypass system oscillator +#define SYSOSCCTRL_FREQRANGE (1 << 1) // Determines frequency range for Low-power oscillator. + +/* WDTOSCCTRL, address 0x4004 8024 */ +#define WDTOSCCTRL_DIVSEL_MASK 0x001F // Select divider for Fclkana. wdt_osc_clk = Fclkana/ (2 (1 + DIVSEL)) 00000: 2 (1 + DIVSEL) = 2 00001: 2 (1 + DIVSEL) = 4 to 11111: 2 (1 + DIVSEL) = 64 +#define WDTOSCCTRL_DIVSEL_SHIFT 0 +#define WDTOSCCTRL_FREQSEL_MASK 0x01E0 // Select watchdog oscillator analog output frequency (Fclkana). +#define WDTOSCCTRL_FREQSEL_SHIFT 5 + +/* IRCCTRL, address 0x4004 8028 */ +#define IRCCTRL_TRIM_MASK 0x00FF // Trim value +#define IRCCTRL_TRIM_SHIFT 0 + +/* SYSRSTSTAT, address 0x4004 8030 */ +#define SYSRSTSTAT_POR (1 << 0) // POR reset status +#define SYSRSTSTAT_EXTRST (1 << 1) // Status of the external RESET pin. +#define SYSRSTSTAT_WDT (1 << 2) // Status of the Watchdog reset +#define SYSRSTSTAT_BOD (1 << 3) // Status of the Brown-out detect reset +#define SYSRSTSTAT_SYSRST (1 << 4) // Status of the software system reset + +/* SYSPLLCLKSEL, address 0x4004 8040 */ +#define SYSPLLCLKSEL_SEL_MASK 0x0003 // System PLL clock source +#define SYSPLLCLKSEL_SEL_SHIFT 0 + +/* SYSPLLCLKUEN, address 0x4004 8044 */ +#define SYSPLLCLKUEN_ENA (1 << 0) // Enable system PLL clock source update + +/* MAINCLKSEL, address 0x4004 8070 */ +#define MAINCLKSEL_SEL_MASK 0x0003 // Clock source for main clock +#define MAINCLKSEL_SEL_SHIFT 0 + +/* MAINCLKUEN, address 0x4004 8074 */ +#define MAINCLKUEN_ENA (1 << 0) // Enable main clock source update 0 + +/* SYSAHBCLKDIV, address 0x4004 8078 */ +#define SYSAHBCLKDIV_DIV_MASK 0x00FF // System AHB clock divider values 0: System clock disabled. 1: Divide by 1. to 255: Divide by 255. +#define SYSAHBCLKDIV_DIV_SHIFT 0 + +/* SYSAHBCLKCTRL, address 0x4004 8080 */ +#define SYSAHBCLKCTRL_SYS (1 << 0) // Enables clock for AHB to APB bridge, to the AHB matrix, to the Cortex-M0 FCLK and HCLK, to the SysCon, and to the PMU. This bit is read only. +#define SYSAHBCLKCTRL_ROM (1 << 1) // Enables clock for ROM. +#define SYSAHBCLKCTRL_RAM (1 << 2) // Enables clock for RAM. +#define SYSAHBCLKCTRL_FLASHREG (1 << 3) // Enables clock for flash register interface. +#define SYSAHBCLKCTRL_FLASHARRAY (1 << 4) // Enables clock for flash array access. +#define SYSAHBCLKCTRL_I2C (1 << 5) // Enables clock for I2C. +#define SYSAHBCLKCTRL_GPIO (1 << 6) // Enables clock for GPIO. +#define SYSAHBCLKCTRL_CT16B0 (1 << 7) // Enables clock for 16-bit counter/timer 0. +#define SYSAHBCLKCTRL_CT16B1 (1 << 8) // Enables clock for 16-bit counter/timer 1. +#define SYSAHBCLKCTRL_CT32B0 (1 << 9) // Enables clock for 32-bit counter/timer 0. +#define SYSAHBCLKCTRL_CT32B1 (1 << 10) // Enables clock for 32-bit counter/timer 1. +#define SYSAHBCLKCTRL_SSP0 (1 << 11) // Enables clock for SPI0. +#define SYSAHBCLKCTRL_UART (1 << 12) // Enables clock for UART. See Section 3.1 for part specific details. +#define SYSAHBCLKCTRL_ADC (1 << 13) // Enables clock for ADC. +#define SYSAHBCLKCTRL_WDT (1 << 15) // Enables clock for WDT. +#define SYSAHBCLKCTRL_IOCON (1 << 16) // Enables clock for I/O configuration block. +#define SYSAHBCLKCTRL_CAN (1 << 17) // Enables clock for C_CAN. See Section 3.1 for part specific details. +#define SYSAHBCLKCTRL_SSP1 (1 << 18) // Enables clock for SPI1. + +/* SSP0CLKDIV, address 0x4004 8094 */ +#define SSP0CLKDIV_DIV_MASK 0x00FF // SPI0_PCLK clock divider values 0: Disable SPI0_PCLK. 1: Divide by 1. to 255: Divide by 255. +#define SSP0CLKDIV_DIV_SHIFT 0 + +/* UARTCLKDIV, address 0x4004 8098 */ +#define UARTCLKDIV_DIV_MASK 0x00FF // UART_PCLK clock divider values 0: Disable UART_PCLK. 1: Divide by 1. to 255: Divide by 255. +#define UARTCLKDIV_DIV_SHIFT 0 + +/* SSP1CLKDIV, address 0x4004 809C */ +#define SSP1CLKDIV_DIV_MASK 0x00FF // SPI1_PCLK clock divider values 0: Disable SPI1_PCLK. 1: Divide by 1. to 255: Divide by 255. +#define SSP1CLKDIV_DIV_SHIFT 0 + +/* WDTCLKSEL, address 0x4004 80D0 */ +#define WDTCLKSEL_SEL_MASK 0x0003 // WDT clock source +#define WDTCLKSEL_SEL_SHIFT 0 + +/* WDTCLKUEN, address 0x4004 80D4 */ +#define WDTCLKUEN_ENA (1 << 0) // Enable WDT clock source update + +/* WDTCLKDIV, address 0x4004 80D8 */ +#define WDTCLKDIV_DIV_MASK 0x00FF // WDT clock divider values 0: Disable WDCLK. 1: Divide by 1. to 255: Divide by 255. +#define WDTCLKDIV_DIV_SHIFT 0 + +/* CLKOUTCLKSEL, address 0x4004 80E0 */ +#define CLKOUTCLKSEL_SEL_MASK 0x0003 // CLKOUT clock source +#define CLKOUTCLKSEL_SEL_SHIFT 0 + +/* CLKOUTUEN, address 0x4004 80E4 */ +#define CLKOUTUEN_ENA (1 << 0) // Enable CLKOUT clock source update 0 + +/* CLKOUTCLKDIV, address 0x4004 80E8 */ +#define CLKOUTCLKDIV_DIV_MASK 0x00FF // Clock output divider values 0: Disable CLKOUT. 1: Divide by 1. to 255: Divide by 255. +#define CLKOUTCLKDIV_DIV_SHIFT 0 + +/* PIOPORCAP0, address 0x4004 8100 */ +#define PIOPORCAP0_CAPPIO0_N_MASK 0x0FFF // Raw reset status input PIO0_n: PIO0_11 to PIO0_0 +#define PIOPORCAP0_CAPPIO0_N_SHIFT 0 +#define PIOPORCAP0_CAPPIO1_N_MASK 0xFFF000 // Raw reset status input PIO1_n: PIO1_11 to PIO1_0 +#define PIOPORCAP0_CAPPIO1_N_SHIFT 12 +#define PIOPORCAP0_CAPPIO2_N_MASK 0xFF000000 // Raw reset status input PIO2_n: PIO2_7 to PIO2_0 +#define PIOPORCAP0_CAPPIO2_N_SHIFT 24 + +/* PIOPORCAP1, address 0x4004 8104 */ +#define PIOPORCAP1_CAPPIO2_8 (1 << 0) // Raw reset status input PIO2_8 +#define PIOPORCAP1_CAPPIO2_9 (1 << 1) // Raw reset status input PIO2_9 +#define PIOPORCAP1_CAPPIO2_10 (1 << 2) // Raw reset status input PIO2_10 +#define PIOPORCAP1_CAPPIO2_11 (1 << 3) // Raw reset status input PIO2_11 +#define PIOPORCAP1_CAPPIO3_0 (1 << 4) // Raw reset status input PIO3_0 +#define PIOPORCAP1_CAPPIO3_1 (1 << 5) // Raw reset status input PIO3_1 +#define PIOPORCAP1_CAPPIO3_2 (1 << 6) // Raw reset status input PIO3_2 +#define PIOPORCAP1_CAPPIO3_3 (1 << 7) // Raw reset status input PIO3_3 +#define PIOPORCAP1_CAPPIO3_4 (1 << 8) // Raw reset status input PIO3_4 +#define PIOPORCAP1_CAPPIO3_5 (1 << 9) // Raw reset status input PIO3_5 + +/* BODCTRL, address 0x4004 8150 */ +#define BODCTRL_BODRSTLEV_MASK 0x0003 // BOD reset level +#define BODCTRL_BODRSTLEV_SHIFT 0 +#define BODCTRL_BODINTVAL_MASK 0x000C // BOD interrupt level +#define BODCTRL_BODINTVAL_SHIFT 2 +#define BODCTRL_BODRSTENA (1 << 4) // BOD reset enable + +/* SYSTCKCAL, address 0x4004 8154 */ +#define SYSTCKCAL_CAL_MASK 0x3FFFFFF // System tick timer calibration value +#define SYSTCKCAL_CAL_SHIFT 0 + +/* NMISRC, address 0x4004 8174 */ +#define NMISRC_IRQNO_MASK 0x001F // The IRQ number of the interrupt that acts as the Non-Maskable Interrupt 0 (NMI) if bit 31 in this register is 1. See Table 54 for the list of interrupt sources and their IRQ numbers. +#define NMISRC_IRQNO_SHIFT 0 +#define NMISRC_NMIEN (1 << 31) // Write a 1 to this bit to enable the Non-Maskable Interrupt (NMI) source selected by bits 4:0. + +/* STARTAPRP0, address 0x4004 8200 */ +#define STARTAPRP0_APRPIO0_N_MASK 0x0FFF // Edge select for start logic input PIO0_n: PIO0_11 to PIO0_0 0 = Falling edge 1 = Rising edge +#define STARTAPRP0_APRPIO0_N_SHIFT 0 +#define STARTAPRP0_APRPIO1_0 (1 << 12) // Edge select for start logic input PIO1_0 0 = Falling edge 1 = Rising edge Reserved. Do not write a 1 to reserved bits in this register. + +/* STARTERP0, address 0x4004 8204 */ +#define STARTERP0_ERPIO0_N_MASK 0x0FFF // Enable start signal for start logic input PIO0_n: PIO0_11 to PIO0_0 0 = Disabled 1 = Enabled +#define STARTERP0_ERPIO0_N_SHIFT 0 +#define STARTERP0_ERPIO1_0 (1 << 12) // Enable start signal for start logic input PIO1_0 0 = Disabled 1 = Enabled Reserved. Do not write a 1 to reserved bits in this register. + +/* STARTRSRP0CLR, address 0x4004 8208 */ +#define STARTRSRP0CLR_RSRPIO0_N_MASK 0x0FFF // Start signal reset for start logic input PIO0_n:PIO0_11 to PIO0_0 0 = Do nothing. 1 = Writing 1 resets the start signal. +#define STARTRSRP0CLR_RSRPIO0_N_SHIFT 0 +#define STARTRSRP0CLR_RSRPIO1_0 (1 << 12) // Start signal reset for start logic input PIO1_0 0 = Do nothing. 1 = Writing 1 resets the start signal. + +/* STARTSRP0, address 0x4004 820C */ +#define STARTSRP0_SRPIO0_N_MASK 0x0FFF // Start signal status for start logic input PIO0_n: PIO0_11 to PIO0_0 0 = No start signal received. 1 = Start signal pending. +#define STARTSRP0_SRPIO0_N_SHIFT 0 +#define STARTSRP0_SRPIO1_0 (1 << 12) // Start signal status for start logic input PIO1_0 0 = No start signal received. 1 = Start signal pending. + +/* PDSLEEPCFG, address 0x4004 8230 */ +#define PDSLEEPCFG_BOD_PD (1 << 3) // BOD power-down control in Deep-sleep mode, see Table 40. +#define PDSLEEPCFG_WDTOSC_PD (1 << 6) // Watchdog oscillator power control in Deep-sleep mode, see Table 40. + +/* PDAWAKECFG, address 0x4004 8234 */ +#define PDAWAKECFG_IRCOUT_PD (1 << 0) // IRC oscillator output wake-up configuration +#define PDAWAKECFG_IRC_PD (1 << 1) // IRC oscillator power-down wake-up configuration +#define PDAWAKECFG_FLASH_PD (1 << 2) // Flash wake-up configuration +#define PDAWAKECFG_BOD_PD (1 << 3) // BOD wake-up configuration +#define PDAWAKECFG_ADC_PD (1 << 4) // ADC wake-up configuration +#define PDAWAKECFG_SYSOSC_PD (1 << 5) // System oscillator wake-up configuration +#define PDAWAKECFG_WDTOSC_PD (1 << 6) // Watchdog oscillator wake-up configuration +#define PDAWAKECFG_SYSPLL_PD (1 << 7) // System PLL wake-up configuration + +/* PDRUNCFG, address 0x4004 8238 */ +#define PDRUNCFG_IRCOUT_PD (1 << 0) // IRC oscillator output power-down +#define PDRUNCFG_IRC_PD (1 << 1) // IRC oscillator power-down +#define PDRUNCFG_FLASH_PD (1 << 2) // Flash power-down +#define PDRUNCFG_BOD_PD (1 << 3) // BOD power-down +#define PDRUNCFG_ADC_PD (1 << 4) // ADC power-down +#define PDRUNCFG_SYSOSC_PD (1 << 5) // System oscillator power-down +#define PDRUNCFG_WDTOSC_PD (1 << 6) // Watchdog oscillator power-down +#define PDRUNCFG_SYSPLL_PD (1 << 7) // System PLL power-down + +/* DEVICE_ID, address 0x4004 83F4 */ +#define DEVICE_ID_DEVICEID_MASK 0xFFFFFFFF // Part ID numbers for LPC111x/LPC11Cxx parts +#define DEVICE_ID_DEVICEID_SHIFT 0 + +/* FLASHCFG, address 0x4003 C010 */ +#define FLASHCFG_FLASHTIM_MASK 0x0003 // Flash memory access time. FLASHTIM +1 is equal to the number of system clocks used for flash access. +#define FLASHCFG_FLASHTIM_SHIFT 0 + +/* PCON, address 0x4003 8000 */ +#define PCON_DPDEN (1 << 1) // Deep power-down mode enable +#define PCON_SLEEPFLAG (1 << 8) // Sleep mode flag +#define PCON_DPDFLAG (1 << 11) // Deep power-down flag + +/* GPREG0 - GPREG3, address 0x4003 8004 to 0x4003 8010 */ +#define GPREGn_GPDATA_MASK 0xFFFFFFFF // Data retained during Deep power-down mode. +#define GPREGn_GPDATA_SHIFT 0 + +/* GPREG4, address 0x4003 8014 */ +#define GPREG4_WAKEUPHYS (1 << 10) // WAKEUP pin hysteresis enable +#define GPREG4_GPDATA_MASK 0xFFFFF800 // Data retained during Deep power-down mode. +#define GPREG4_GPDATA_SHIFT 11 + +/* IOCON_PIO2_6, address 0x4004 4000 */ +#define IOCON_PIO2_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_6_FUNC_SHIFT 0 +#define IOCON_PIO2_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_6_MODE_SHIFT 3 +#define IOCON_PIO2_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_6_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_0, address 0x4004 4008 */ +#define IOCON_PIO2_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_0_FUNC_SHIFT 0 +#define IOCON_PIO2_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_0_MODE_SHIFT 3 +#define IOCON_PIO2_0_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_0_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_RESET_PIO0_0, address 0x4004 400C */ +#define IOCON_RESET_PIO0_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_RESET_PIO0_0_FUNC_SHIFT 0 +#define IOCON_RESET_PIO0_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_RESET_PIO0_0_MODE_SHIFT 3 +#define IOCON_RESET_PIO0_0_HYS (1 << 5) // Hysteresis. +#define IOCON_RESET_PIO0_0_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_1, address 0x4004 4010 */ +#define IOCON_PIO0_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_1_FUNC_SHIFT 0 +#define IOCON_PIO0_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_1_MODE_SHIFT 3 +#define IOCON_PIO0_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_1_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO1_8, address 0x4004 4014 */ +#define IOCON_PIO1_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_8_FUNC_SHIFT 0 +#define IOCON_PIO1_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_8_MODE_SHIFT 3 +#define IOCON_PIO1_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_8_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_2, address 0x4004 401C */ +#define IOCON_PIO0_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_2_FUNC_SHIFT 0 +#define IOCON_PIO0_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_2_MODE_SHIFT 3 +#define IOCON_PIO0_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_2_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_7, address 0x4004 4020 */ +#define IOCON_PIO2_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_7_FUNC_SHIFT 0 +#define IOCON_PIO2_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_7_MODE_SHIFT 3 +#define IOCON_PIO2_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_7_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_8, address 0x4004 4024 */ +#define IOCON_PIO2_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_8_FUNC_SHIFT 0 +#define IOCON_PIO2_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_8_MODE_SHIFT 3 +#define IOCON_PIO2_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_8_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_1, address 0x4004 4028 */ +#define IOCON_PIO2_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_1_FUNC_SHIFT 0 +#define IOCON_PIO2_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_1_MODE_SHIFT 3 +#define IOCON_PIO2_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_1_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_3, address 0x4004 402C */ +#define IOCON_PIO0_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_3_FUNC_SHIFT 0 +#define IOCON_PIO0_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_3_MODE_SHIFT 3 +#define IOCON_PIO0_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_4, address 0x4004 4030 */ +#define IOCON_PIO0_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_4_FUNC_SHIFT 0 +#define IOCON_PIO0_4_I2CMODE_MASK 0x0300 // Selects I2C mode. Select Standard mode (I2CMODE = 00, 00 default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000). +#define IOCON_PIO0_4_I2CMODE_SHIFT 8 + +/* IOCON_PIO0_5, address 0x4004 4034 */ +#define IOCON_PIO0_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_5_FUNC_SHIFT 0 +#define IOCON_PIO0_5_I2CMODE_MASK 0x0300 // Selects I2C mode. Select Standard mode (I2CMODE = 00, default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000). +#define IOCON_PIO0_5_I2CMODE_SHIFT 8 + +/* IOCON_PIO1_9, address 0x4004 4038 */ +#define IOCON_PIO1_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_9_FUNC_SHIFT 0 +#define IOCON_PIO1_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_9_MODE_SHIFT 3 +#define IOCON_PIO1_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_9_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO3_4, address 0x4004 403C */ +#define IOCON_PIO3_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_4_FUNC_SHIFT 0 +#define IOCON_PIO3_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_4_MODE_SHIFT 3 +#define IOCON_PIO3_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_4_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_4, address 0x4004 4040 */ +#define IOCON_PIO2_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_4_FUNC_SHIFT 0 +#define IOCON_PIO2_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_4_MODE_SHIFT 3 +#define IOCON_PIO2_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_4_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_5, address 0x4004 4044 */ +#define IOCON_PIO2_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_5_FUNC_SHIFT 0 +#define IOCON_PIO2_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_5_MODE_SHIFT 3 +#define IOCON_PIO2_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_5_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_5, address 0x4004 4048 */ +#define IOCON_PIO3_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_5_FUNC_SHIFT 0 +#define IOCON_PIO3_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_5_MODE_SHIFT 3 +#define IOCON_PIO3_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_5_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_6, address 0x4004 404C */ +#define IOCON_PIO0_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_6_FUNC_SHIFT 0 +#define IOCON_PIO0_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_6_MODE_SHIFT 3 +#define IOCON_PIO0_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_6_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_7, address 0x4004 4050 */ +#define IOCON_PIO0_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_7_FUNC_SHIFT 0 +#define IOCON_PIO0_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_7_MODE_SHIFT 3 +#define IOCON_PIO0_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_7_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_9, address 0x4004 4054 */ +#define IOCON_PIO2_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_9_FUNC_SHIFT 0 +#define IOCON_PIO2_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_9_MODE_SHIFT 3 +#define IOCON_PIO2_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_9_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_10, address 0x4004 4058 */ +#define IOCON_PIO2_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_10_FUNC_SHIFT 0 +#define IOCON_PIO2_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_10_MODE_SHIFT 3 +#define IOCON_PIO2_10_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_10_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_2, address 0x4004 405C */ +#define IOCON_PIO2_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_2_FUNC_SHIFT 0 +#define IOCON_PIO2_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_2_MODE_SHIFT 3 +#define IOCON_PIO2_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_8, address 0x4004 4060 */ +#define IOCON_PIO0_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_8_FUNC_SHIFT 0 +#define IOCON_PIO0_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_8_MODE_SHIFT 3 +#define IOCON_PIO0_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_8_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO0_9, address 0x4004 4064 */ +#define IOCON_PIO0_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_9_FUNC_SHIFT 0 +#define IOCON_PIO0_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_9_MODE_SHIFT 3 +#define IOCON_PIO0_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_9_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_SWCLK_PIO0_10, address 0x4004 4068 */ +#define IOCON_SWCLK_PIO0_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_SWCLK_PIO0_10_FUNC_SHIFT 0 +#define IOCON_SWCLK_PIO0_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_SWCLK_PIO0_10_MODE_SHIFT 3 +#define IOCON_SWCLK_PIO0_10_HYS (1 << 5) // Hysteresis. +#define IOCON_SWCLK_PIO0_10_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_10, address 0x4004 406C */ +#define IOCON_PIO1_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_10_FUNC_SHIFT 0 +#define IOCON_PIO1_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_10_MODE_SHIFT 3 +#define IOCON_PIO1_10_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_10_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_10_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_11, address 0x4004 4070 */ +#define IOCON_PIO2_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_11_FUNC_SHIFT 0 +#define IOCON_PIO2_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_11_MODE_SHIFT 3 +#define IOCON_PIO2_11_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_11_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_R_PIO0_11, address 0x4004 4074 */ +#define IOCON_R_PIO0_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO0_11_FUNC_SHIFT 0 +#define IOCON_R_PIO0_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO0_11_MODE_SHIFT 3 +#define IOCON_R_PIO0_11_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO0_11_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO0_11_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_R_PIO1_0, address 0x4004 4078 */ +#define IOCON_R_PIO1_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_0_FUNC_SHIFT 0 +#define IOCON_R_PIO1_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_0_MODE_SHIFT 3 +#define IOCON_R_PIO1_0_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_0_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_0_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_R_PIO1_1, address 0x4004 407C */ +#define IOCON_R_PIO1_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_1_FUNC_SHIFT 0 +#define IOCON_R_PIO1_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_1_MODE_SHIFT 3 +#define IOCON_R_PIO1_1_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_1_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_1_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_R_PIO1_2, address 0x4004 4080 */ +#define IOCON_R_PIO1_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_2_FUNC_SHIFT 0 +#define IOCON_R_PIO1_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_2_MODE_SHIFT 3 +#define IOCON_R_PIO1_2_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_2_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_2_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO3_0, address 0x4004 4084 */ +#define IOCON_PIO3_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_0_FUNC_SHIFT 0 +#define IOCON_PIO3_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_0_MODE_SHIFT 3 +#define IOCON_PIO3_0_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_0_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_1, address 0x4004 4088 */ +#define IOCON_PIO3_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_1_FUNC_SHIFT 0 +#define IOCON_PIO3_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_1_MODE_SHIFT 3 +#define IOCON_PIO3_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_1_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO2_3, address 0x4004 408C */ +#define IOCON_PIO2_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_3_FUNC_SHIFT 0 +#define IOCON_PIO2_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_3_MODE_SHIFT 3 +#define IOCON_PIO2_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_3_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_SWDIO_PIO1_3, address 0x4004 4090 */ +#define IOCON_SWDIO_PIO1_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_SWDIO_PIO1_3_FUNC_SHIFT 0 +#define IOCON_SWDIO_PIO1_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_SWDIO_PIO1_3_MODE_SHIFT 3 +#define IOCON_SWDIO_PIO1_3_HYS (1 << 5) // Hysteresis. +#define IOCON_SWDIO_PIO1_3_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_SWDIO_PIO1_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_4, address 0x4004 4094 */ +#define IOCON_PIO1_4_FUNC_MASK 0x0007 // Selects pin function. This pin functions as WAKEUP pin if the 000 LPC111x/LPC11Cxx is in Deep power-down mode regardless of the value of FUNC. All other values are reserved. +#define IOCON_PIO1_4_FUNC_SHIFT 0 +#define IOCON_PIO1_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_4_MODE_SHIFT 3 +#define IOCON_PIO1_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_4_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_4_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO1_11, address 0x4004 4098 */ +#define IOCON_PIO1_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_11_FUNC_SHIFT 0 +#define IOCON_PIO1_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_11_MODE_SHIFT 3 +#define IOCON_PIO1_11_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_11_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_11_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO3_2, address 0x4004 409C */ +#define IOCON_PIO3_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_2_FUNC_SHIFT 0 +#define IOCON_PIO3_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_2_MODE_SHIFT 3 +#define IOCON_PIO3_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_5, address 0x4004 40A0 */ +#define IOCON_PIO1_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_5_FUNC_SHIFT 0 +#define IOCON_PIO1_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_5_MODE_SHIFT 3 +#define IOCON_PIO1_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_5_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO1_6, address 0x4004 40A4 */ +#define IOCON_PIO1_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_6_FUNC_SHIFT 0 +#define IOCON_PIO1_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_6_MODE_SHIFT 3 +#define IOCON_PIO1_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_6_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO1_7, address 0x4004 40A8 */ +#define IOCON_PIO1_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_7_FUNC_SHIFT 0 +#define IOCON_PIO1_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_7_MODE_SHIFT 3 +#define IOCON_PIO1_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_7_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_PIO3_3, address 0x4004 40AC */ +#define IOCON_PIO3_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_3_FUNC_SHIFT 0 +#define IOCON_PIO3_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_3_MODE_SHIFT 3 +#define IOCON_PIO3_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_3_OD (1 << 10) // Selects pseudo open-drain mode. See Section 7.1 for part specific details. + +/* IOCON_SCK_LOC, address 0x4004 40B0 */ +#define IOCON_SCK_LOC_SCKLOC_MASK 0x0003 // Selects pin location for SCK0 function. +#define IOCON_SCK_LOC_SCKLOC_SHIFT 0 + +/* IOCON_DSR_LOC, address 0x4004 40B4 */ +#define IOCON_DSR_LOC_DSRLOC_MASK 0x0003 // elects pin location for DSR function. +#define IOCON_DSR_LOC_DSRLOC_SHIFT 0 + +/* IOCON_DCD_LOC, address 0x4004 40B8 */ +#define IOCON_DCD_LOC_DCDLOC_MASK 0x0003 // Selects pin location for DCD function. +#define IOCON_DCD_LOC_DCDLOC_SHIFT 0 + +/* IOCON_RI_LOC, address 0x4004 40BC */ +#define IOCON_RI_LOC_RILOC_MASK 0x0003 // Selects pin location for RI function. +#define IOCON_RI_LOC_RILOC_SHIFT 0 + +/* IOCON_PIO2_6, address 0x4004 4000 */ +#define IOCON_PIO2_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_6_FUNC_SHIFT 0 +#define IOCON_PIO2_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_6_MODE_SHIFT 3 +#define IOCON_PIO2_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_6_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_0, address 0x4004 4008 */ +#define IOCON_PIO2_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_0_FUNC_SHIFT 0 +#define IOCON_PIO2_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_0_MODE_SHIFT 3 +#define IOCON_PIO2_0_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_0_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_RESET_PIO0_0, address 0x4004 400C */ +#define IOCON_RESET_PIO0_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_RESET_PIO0_0_FUNC_SHIFT 0 +#define IOCON_RESET_PIO0_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_RESET_PIO0_0_MODE_SHIFT 3 +#define IOCON_RESET_PIO0_0_HYS (1 << 5) // Hysteresis. +#define IOCON_RESET_PIO0_0_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_1, address 0x4004 4010 */ +#define IOCON_PIO0_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_1_FUNC_SHIFT 0 +#define IOCON_PIO0_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_1_MODE_SHIFT 3 +#define IOCON_PIO0_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_1_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_8, address 0x4004 4014 */ +#define IOCON_PIO1_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_8_FUNC_SHIFT 0 +#define IOCON_PIO1_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_8_MODE_SHIFT 3 +#define IOCON_PIO1_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_8_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_2, address 0x4004 401C */ +#define IOCON_PIO0_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_2_FUNC_SHIFT 0 +#define IOCON_PIO0_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_2_MODE_SHIFT 3 +#define IOCON_PIO0_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_7, address 0x4004 4020 */ +#define IOCON_PIO2_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_7_FUNC_SHIFT 0 +#define IOCON_PIO2_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_7_MODE_SHIFT 3 +#define IOCON_PIO2_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_7_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_8, address 0x4004 4024 */ +#define IOCON_PIO2_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_8_FUNC_SHIFT 0 +#define IOCON_PIO2_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_8_MODE_SHIFT 3 +#define IOCON_PIO2_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_8_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_1, address 0x4004 4028 */ +#define IOCON_PIO2_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_1_FUNC_SHIFT 0 +#define IOCON_PIO2_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_1_MODE_SHIFT 3 +#define IOCON_PIO2_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_1_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_3, address 0x4004 402C */ +#define IOCON_PIO0_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_3_FUNC_SHIFT 0 +#define IOCON_PIO0_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_3_MODE_SHIFT 3 +#define IOCON_PIO0_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_4, address 0x4004 4030 */ +#define IOCON_PIO0_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_4_FUNC_SHIFT 0 +#define IOCON_PIO0_4_I2CMODE_MASK 0x0300 // Selects I2C mode. Select Standard mode (I2CMODE = 00, 00 default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000). +#define IOCON_PIO0_4_I2CMODE_SHIFT 8 + +/* IOCON_PIO0_5, address 0x4004 4034 */ +#define IOCON_PIO0_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_5_FUNC_SHIFT 0 +#define IOCON_PIO0_5_I2CMODE_MASK 0x0300 // Selects I2C mode. Select Standard mode (I2CMODE = 00, default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000). +#define IOCON_PIO0_5_I2CMODE_SHIFT 8 + +/* IOCON_PIO1_9, address 0x4004 4038 */ +#define IOCON_PIO1_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_9_FUNC_SHIFT 0 +#define IOCON_PIO1_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_9_MODE_SHIFT 3 +#define IOCON_PIO1_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_9_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_4, address 0x4004 403C */ +#define IOCON_PIO3_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_4_FUNC_SHIFT 0 +#define IOCON_PIO3_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_4_MODE_SHIFT 3 +#define IOCON_PIO3_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_4_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_4, address 0x4004 4040 */ +#define IOCON_PIO2_4_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_4_FUNC_SHIFT 0 +#define IOCON_PIO2_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_4_MODE_SHIFT 3 +#define IOCON_PIO2_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_4_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_5, address 0x4004 4044 */ +#define IOCON_PIO2_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_5_FUNC_SHIFT 0 +#define IOCON_PIO2_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_5_MODE_SHIFT 3 +#define IOCON_PIO2_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_5_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_5, address 0x4004 4048 */ +#define IOCON_PIO3_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_5_FUNC_SHIFT 0 +#define IOCON_PIO3_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_5_MODE_SHIFT 3 +#define IOCON_PIO3_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_5_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_6, address 0x4004 404C */ +#define IOCON_PIO0_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_6_FUNC_SHIFT 0 +#define IOCON_PIO0_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_6_MODE_SHIFT 3 +#define IOCON_PIO0_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_6_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_7, address 0x4004 4050 */ +#define IOCON_PIO0_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_7_FUNC_SHIFT 0 +#define IOCON_PIO0_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_7_MODE_SHIFT 3 +#define IOCON_PIO0_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_7_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_9, address 0x4004 4054 */ +#define IOCON_PIO2_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_9_FUNC_SHIFT 0 +#define IOCON_PIO2_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_9_MODE_SHIFT 3 +#define IOCON_PIO2_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_9_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_10, address 0x4004 4058 */ +#define IOCON_PIO2_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_10_FUNC_SHIFT 0 +#define IOCON_PIO2_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_10_MODE_SHIFT 3 +#define IOCON_PIO2_10_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_10_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_2, address 0x4004 405C */ +#define IOCON_PIO2_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_2_FUNC_SHIFT 0 +#define IOCON_PIO2_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_2_MODE_SHIFT 3 +#define IOCON_PIO2_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_8, address 0x4004 4060 */ +#define IOCON_PIO0_8_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_8_FUNC_SHIFT 0 +#define IOCON_PIO0_8_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_8_MODE_SHIFT 3 +#define IOCON_PIO0_8_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_8_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO0_9, address 0x4004 4064 */ +#define IOCON_PIO0_9_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO0_9_FUNC_SHIFT 0 +#define IOCON_PIO0_9_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO0_9_MODE_SHIFT 3 +#define IOCON_PIO0_9_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO0_9_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_SWCLK_PIO0_10, address 0x4004 4068 */ +#define IOCON_SWCLK_PIO0_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_SWCLK_PIO0_10_FUNC_SHIFT 0 +#define IOCON_SWCLK_PIO0_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_SWCLK_PIO0_10_MODE_SHIFT 3 +#define IOCON_SWCLK_PIO0_10_HYS (1 << 5) // Hysteresis. +#define IOCON_SWCLK_PIO0_10_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_10, address 0x4004 406C */ +#define IOCON_PIO1_10_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_10_FUNC_SHIFT 0 +#define IOCON_PIO1_10_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_10_MODE_SHIFT 3 +#define IOCON_PIO1_10_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_10_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_10_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_11, address 0x4004 4070 */ +#define IOCON_PIO2_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_11_FUNC_SHIFT 0 +#define IOCON_PIO2_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_11_MODE_SHIFT 3 +#define IOCON_PIO2_11_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_11_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_R_PIO0_11, address 0x4004 4074 */ +#define IOCON_R_PIO0_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO0_11_FUNC_SHIFT 0 +#define IOCON_R_PIO0_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO0_11_MODE_SHIFT 3 +#define IOCON_R_PIO0_11_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO0_11_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO0_11_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_R_PIO1_0, address 0x4004 4078 */ +#define IOCON_R_PIO1_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_0_FUNC_SHIFT 0 +#define IOCON_R_PIO1_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_0_MODE_SHIFT 3 +#define IOCON_R_PIO1_0_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_0_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_0_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_R_PIO1_1, address 0x4004 407C */ +#define IOCON_R_PIO1_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_1_FUNC_SHIFT 0 +#define IOCON_R_PIO1_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_1_MODE_SHIFT 3 +#define IOCON_R_PIO1_1_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_1_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_1_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_R_PIO1_2, address 0x4004 4080 */ +#define IOCON_R_PIO1_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_R_PIO1_2_FUNC_SHIFT 0 +#define IOCON_R_PIO1_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_R_PIO1_2_MODE_SHIFT 3 +#define IOCON_R_PIO1_2_HYS (1 << 5) // Hysteresis. +#define IOCON_R_PIO1_2_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_R_PIO1_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_0, address 0x4004 4084 */ +#define IOCON_PIO3_0_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_0_FUNC_SHIFT 0 +#define IOCON_PIO3_0_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_0_MODE_SHIFT 3 +#define IOCON_PIO3_0_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_0_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_1, address 0x4004 4088 */ +#define IOCON_PIO3_1_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_1_FUNC_SHIFT 0 +#define IOCON_PIO3_1_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_1_MODE_SHIFT 3 +#define IOCON_PIO3_1_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_1_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO2_3, address 0x4004 408C */ +#define IOCON_PIO2_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO2_3_FUNC_SHIFT 0 +#define IOCON_PIO2_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO2_3_MODE_SHIFT 3 +#define IOCON_PIO2_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO2_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_SWDIO_PIO1_3, address 0x4004 4090 */ +#define IOCON_SWDIO_PIO1_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_SWDIO_PIO1_3_FUNC_SHIFT 0 +#define IOCON_SWDIO_PIO1_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_SWDIO_PIO1_3_MODE_SHIFT 3 +#define IOCON_SWDIO_PIO1_3_HYS (1 << 5) // Hysteresis. +#define IOCON_SWDIO_PIO1_3_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_SWDIO_PIO1_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_4, address 0x4004 4094 */ +#define IOCON_PIO1_4_FUNC_MASK 0x0007 // Selects pin function. This pin functions as WAKEUP pin if the 000 LPC111x/LPC11Cxx is in Deep power-down mode regardless of the value of FUNC. All other values are reserved. +#define IOCON_PIO1_4_FUNC_SHIFT 0 +#define IOCON_PIO1_4_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_4_MODE_SHIFT 3 +#define IOCON_PIO1_4_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_4_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_4_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_11, address 0x4004 4098 */ +#define IOCON_PIO1_11_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_11_FUNC_SHIFT 0 +#define IOCON_PIO1_11_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_11_MODE_SHIFT 3 +#define IOCON_PIO1_11_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_11_ADMODE (1 << 7) // Selects Analog/Digital mode +#define IOCON_PIO1_11_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_2, address 0x4004 409C */ +#define IOCON_PIO3_2_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_2_FUNC_SHIFT 0 +#define IOCON_PIO3_2_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_2_MODE_SHIFT 3 +#define IOCON_PIO3_2_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_2_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_5, address 0x4004 40A0 */ +#define IOCON_PIO1_5_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_5_FUNC_SHIFT 0 +#define IOCON_PIO1_5_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_5_MODE_SHIFT 3 +#define IOCON_PIO1_5_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_5_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_6, address 0x4004 40A4 */ +#define IOCON_PIO1_6_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_6_FUNC_SHIFT 0 +#define IOCON_PIO1_6_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_6_MODE_SHIFT 3 +#define IOCON_PIO1_6_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_6_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO1_7, address 0x4004 40A8 */ +#define IOCON_PIO1_7_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO1_7_FUNC_SHIFT 0 +#define IOCON_PIO1_7_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO1_7_MODE_SHIFT 3 +#define IOCON_PIO1_7_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO1_7_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_PIO3_3, address 0x4004 40AC */ +#define IOCON_PIO3_3_FUNC_MASK 0x0007 // Selects pin function. All other values are reserved. +#define IOCON_PIO3_3_FUNC_SHIFT 0 +#define IOCON_PIO3_3_MODE_MASK 0x0018 // Selects function mode (on-chip pull-up/pull-down resistor control). +#define IOCON_PIO3_3_MODE_SHIFT 3 +#define IOCON_PIO3_3_HYS (1 << 5) // Hysteresis. +#define IOCON_PIO3_3_OD (1 << 10) // Selects pseudo open-drain mode. + +/* IOCON_SCK0_LOC, address 0x4004 40B0 */ +#define IOCON_SCK0_LOC_SCKLOC_MASK 0x0003 // Selects pin location for SCK0 function. +#define IOCON_SCK0_LOC_SCKLOC_SHIFT 0 + +/* IOCON_DSR_LOC, address 0x4004 40B4 */ +#define IOCON_DSR_LOC_DSRLOC_MASK 0x0003 // elects pin location for DSR function. +#define IOCON_DSR_LOC_DSRLOC_SHIFT 0 + +/* IOCON_DCD_LOC, address 0x4004 40B8 */ +#define IOCON_DCD_LOC_DCDLOC_MASK 0x0003 // Selects pin location for DCD function. +#define IOCON_DCD_LOC_DCDLOC_SHIFT 0 + +/* IOCON_RI_LOC, address 0x4004 40BC */ +#define IOCON_RI_LOC_RILOC_MASK 0x0003 // Selects pin location for RI function. +#define IOCON_RI_LOC_RILOC_SHIFT 0 + +/* IOCON_SSEL1_LOC, address 0x4004 4018 */ +#define IOCON_SSEL1_LOC_SSEL1LOC_MASK 0x0003 // Selects pin location for SSEL1 function. +#define IOCON_SSEL1_LOC_SSEL1LOC_SHIFT 0 + +/* IOCON_CT16B0_CAP0_LOC, address 0x4004 40C0 */ +#define IOCON_CT16B0_CAP0_LOC_CT16B0_CAP0LOC_MASK 0x0003 // Selects pin location for CT16B0_CAP0 function. +#define IOCON_CT16B0_CAP0_LOC_CT16B0_CAP0LOC_SHIFT 0 + +/* IOCON_SCK1_LOC, address 0x4004 40C4 */ +#define IOCON_SCK1_LOC_SCK1LOC_MASK 0x0003 // Selects pin location for SCK1 function. +#define IOCON_SCK1_LOC_SCK1LOC_SHIFT 0 + +/* IOCON_MISO1_LOC, address 0x4004 40C8 */ +#define IOCON_MISO1_LOC_MISO1LOC_MASK 0x0003 // Selects pin location for the MISO1 function. +#define IOCON_MISO1_LOC_MISO1LOC_SHIFT 0 + +/* IOCON_MOSI1_LOC, address 0x4004 40CC */ +#define IOCON_MOSI1_LOC_MOSI1LOC_MASK 0x0003 // Selects pin location for the MOSI1 function. +#define IOCON_MOSI1_LOC_MOSI1LOC_SHIFT 0 + +/* IOCON_CT32B0_CAP0_LOC, address 0x4004 40D0 */ +#define IOCON_CT32B0_CAP0_LOC_CT32B0_CAP0LOC_MASK 0x0003 // Selects pin location for the CT32B0_CAP0 function. +#define IOCON_CT32B0_CAP0_LOC_CT32B0_CAP0LOC_SHIFT 0 + +/* IOCON_RXD_LOC, address 0x4004 40D4 */ +#define IOCON_RXD_LOC_RXDLOC_MASK 0x0003 // Selects pin location for the RXD function. +#define IOCON_RXD_LOC_RXDLOC_SHIFT 0 + +/* GPIO0DIR, address 0x5000 8000 to GPIO3DIR, address 0x5003 8000 */ +#define GPIO0DIR_IO_MASK 0x0FFF // Selects pin x as input or output (x = 0 to 11). 0 = Pin PIOn_x is configured as input. 1 = Pin PIOn_x is configured as output. +#define GPIO0DIR_IO_SHIFT 0 + +/* GPIO0IS, address 0x5000 8004 to GPIO3IS, address 0x5003 8004 */ +#define GPIO0IS_ISENSE_MASK 0x0FFF // Selects interrupt on pin x as level or edge sensitive (x = 0 to 0x00 11). 0 = Interrupt on pin PIOn_x is configured as edge sensitive. 1 = Interrupt on pin PIOn_x is configured as level sensitive. +#define GPIO0IS_ISENSE_SHIFT 0 + +/* GPIO0IBE, address 0x5000 8008 to GPIO3IBE, address 0x5003 8008 */ +#define GPIO0IBE_IBE_MASK 0x0FFF // Selects interrupt on pin x to be triggered on both edges (x = 0 0x00 to 11). 0 = Interrupt on pin PIOn_x is controlled through register GPIOnIEV. 1 = Both edges on pin PIOn_x trigger an interrupt. +#define GPIO0IBE_IBE_SHIFT 0 + +/* GPIO0IEV, address 0x5000 800C to GPIO3IEV, address 0x5003 800C */ +#define GPIO0IEV_IEV_MASK 0x0FFF // Selects interrupt on pin x to be triggered rising or falling edges (x = 0 to 11). 0 = Depending on setting in register GPIOnIS (see Table 175), falling edges or LOW level on pin PIOn_x trigger an interrupt. 1 = Depending on setting in register GPIOnIS (see Table 175), rising edges or HIGH level on pin PIOn_x trigger an interrupt. +#define GPIO0IEV_IEV_SHIFT 0 + +/* GPIO0IE, address 0x5000 8010 to GPIO3IE, address 0x5003 8010 */ +#define GPIO0IE_MASK_MASK 0x0FFF // Selects interrupt on pin x to be masked (x = 0 to 11). 0 = Interrupt on pin PIOn_x is masked. 1 = Interrupt on pin PIOn_x is not masked. +#define GPIO0IE_MASK_SHIFT 0 + +/* GPIO0RIS, address 0x5000 8014 to GPIO3RIS, address 0x5003 8014 */ +#define GPIO0RIS_RAWST_MASK 0x0FFF // Raw interrupt status (x = 0 to 11). 0 = No interrupt on pin PIOn_x. 1 = Interrupt requirements met on PIOn_x. +#define GPIO0RIS_RAWST_SHIFT 0 + +/* GPIO0MIS, address 0x5000 8018 to GPIO3MIS, address 0x5003 8018 */ +#define GPIO0MIS_MASK_MASK 0x0FFF // Selects interrupt on pin x to be masked (x = 0 to 11). 0 = No interrupt or interrupt masked on pin PIOn_x. 1 = Interrupt on PIOn_x. +#define GPIO0MIS_MASK_SHIFT 0 + +/* GPIO0IC, address 0x5000 801C to GPIO3IC, address 0x5003 801C */ +#define GPIO0IC_CLR_MASK 0x0FFF // Selects interrupt on pin x to be cleared (x = 0 to 11). Clears 0x00 the interrupt edge detection logic. This register is write-only. Remark: The synchronizer between the GPIO and the NVIC blocks causes a delay of 2 clocks. It is recommended to add two NOPs after the clear of the interrupt edge detection logic before the exit of the interrupt service routine. 0 = No effect. 1 = Clears edge detection logic for pin PIOn_x. +#define GPIO0IC_CLR_SHIFT 0 + +/* U0IIR - address 0x4004 8008, Read Only */ +#define U0IIR_INTSTATUS (1 << 0) // Interrupt status. Note that U0IIR[0] is active low. The pending interrupt can be determined by evaluating U0IIR[3:1]. +#define U0IIR_INTID_MASK 0x000E // Interrupt identification. U0IER[3:1] identifies an interrupt 0 corresponding to the UART Rx FIFO. All other combinations of U0IER[3:1] not listed below are reserved (100,101,111). +#define U0IIR_INTID_SHIFT 1 +#define U0IIR_FIFOENABLE_MASK 0x00C0 // These bits are equivalent to U0FCR[0]. +#define U0IIR_FIFOENABLE_SHIFT 6 +#define U0IIR_ABEOINT (1 << 8) // End of auto-baud interrupt. True if auto-baud has finished successfully and interrupt is enabled. +#define U0IIR_ABTOINT (1 << 9) // Auto-baud time-out interrupt. True if auto-baud has timed out and interrupt is enabled. Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. + +/* U0FCR - address 0x4000 8008, Write Only */ +#define U0FCR_FIFOEN (1 << 0) // FIFO Enable +#define U0FCR_RXFIFORES (1 << 1) // RX FIFO Reset +#define U0FCR_TXFIFORES (1 << 2) // TX FIFO Reset +#define U0FCR_RXTL_MASK 0x00C0 // RX Trigger Level. These two bits determine how many 0 receiver UART FIFO characters must be written before an interrupt is activated. +#define U0FCR_RXTL_SHIFT 6 + +/* U0LCR - address 0x4000 800C */ +#define U0LCR_WLS_MASK 0x0003 // Word Length Select +#define U0LCR_WLS_SHIFT 0 +#define U0LCR_SBS (1 << 2) // Stop Bit Select +#define U0LCR_PE (1 << 3) // Parity Enable +#define U0LCR_PS_MASK 0x0030 // Parity Select 0x0 Odd parity. Number of 1s in the transmitted character and the attached parity bit will be odd. 0x1 Even Parity. Number of 1s in the transmitted character and the attached parity bit will be even. 0x2 Forced 1 stick parity. 0x3 Forced 0 stick parity. +#define U0LCR_PS_SHIFT 4 +#define U0LCR_BC (1 << 6) // Break Control +#define U0LCR_DLAB (1 << 7) // Divisor Latch Access Bit + +/* U0MCR - address 0x4000 8010 */ +#define U0MCR_DTRC (1 << 0) // DTR Control. Source for modem output pin, DTR. This bit reads as 0 when modem loopback mode is active. +#define U0MCR_RTSC (1 << 1) // RTS Control. Source for modem output pin RTS. This bit reads as 0 0 when modem loopback mode is active. +#define U0MCR_LMS (1 << 4) // Loopback Mode Select. The modem loopback mode provides a 0 mechanism to perform diagnostic loopback testing. Serial data from the transmitter is connected internally to serial input of the receiver. Input pin, RXD, has no effect on loopback and output pin, TXD is held in marking state. The four modem inputs (CTS, DSR, RI and DCD) are disconnected externally. Externally, the modem outputs (RTS, DTR) are set inactive. Internally, the four modem outputs are connected to the four modem inputs. As a result of these connections, the upper four bits of the U0MSR will be driven by the lower four bits of the U0MCR rather than the four modem inputs in normal mode. This permits modem status interrupts to be generated in loopback mode by writing the lower four bits of U0MCR. +#define U0MCR_RTSEN (1 << 6) // RTS flow control +#define U0MCR_CTSEN (1 << 7) // CTS flow control + +/* U0LSR - address 0x4000 8014, Read Only */ +#define U0LSR_RDR (1 << 0) // Receiver Data Ready. U0LSR[0] is set when the U0RBR holds 0 an unread character and is cleared when the UART RBR FIFO is empty. +#define U0LSR_OE (1 << 1) // Overrun Error. The overrun error condition is set as soon as it 0 occurs. A U0LSR read clears U0LSR[1]. U0LSR[1] is set when UART RSR has a new character assembled and the UART RBR FIFO is full. In this case, the UART RBR FIFO will not be overwritten and the character in the UART RSR will be lost. +#define U0LSR_PE (1 << 2) // Parity Error. When the parity bit of a received character is in the wrong state, a parity error occurs. A U0LSR read clears U0LSR[2]. Time of parity error detection is dependent on U0FCR[0]. Note: A parity error is associated with the character at the top of the UART RBR FIFO. +#define U0LSR_FE (1 << 3) // Framing Error. When the stop bit of a received character is a 0 logic 0, a framing error occurs. A U0LSR read clears U0LSR[3]. The time of the framing error detection is dependent on U0FCR0. Upon detection of a framing error, the RX will attempt to re-synchronize to the data and assume that the bad stop bit is actually an early start bit. However, it cannot be assumed that the next received byte will be correct even if there is no Framing Error. Note: A framing error is associated with the character at the top of the UART RBR FIFO. +#define U0LSR_BI (1 << 4) // Break Interrupt. When RXD1 is held in the spacing state (all zeros) for one full character transmission (start, data, parity, stop), a break interrupt occurs. Once the break condition has been detected, the receiver goes idle until RXD1 goes to marking state (all ones). A U0LSR read clears this status bit. The time of break detection is dependent on U0FCR[0]. Note: The break interrupt is associated with the character at the top of the UART RBR FIFO. +#define U0LSR_THRE (1 << 5) // Transmitter Holding Register Empty. THRE is set immediately 1 upon detection of an empty UART THR and is cleared on a U0THR write. +#define U0LSR_TEMT (1 << 6) // Transmitter Empty. TEMT is set when both U0THR and 1 U0TSR are empty; TEMT is cleared when either the U0TSR or the U0THR contain valid data. This bit is updated as soon as 50 % of the first stop bit has been transmitted or a byte has been written into the THR. +#define U0LSR_RXFE (1 << 7) // Error in RX FIFO. U0LSR[7] is set when a character with a RX 0 error such as framing error, parity error or break interrupt, is loaded into the U0RBR. This bit is cleared when the U0LSR register is read and there are no subsequent errors in the UART FIFO. + +/* U0MSR - address 0x4000 8018 */ +#define U0MSR_DCTS (1 << 0) // Delta CTS. Set upon state change of input CTS. Cleared on a U0MSR read. 0 No change detected on modem input CTS. 1 State change detected on modem input CTS. +#define U0MSR_DDSR (1 << 1) // Delta DSR. Set upon state change of input DSR. Cleared on a U0MSR read. 0 No change detected on modem input DSR. 1 State change detected on modem input DSR. +#define U0MSR_TERI (1 << 2) // Trailing Edge RI. Set upon low to high transition of input RI. Cleared 0 on a U0MSR read. 0 No change detected on modem input, RI. 1 Low-to-high transition detected on RI. +#define U0MSR_DDCD (1 << 3) // Delta DCD. Set upon state change of input DCD. Cleared on a U0MSR read. 0 No change detected on modem input DCD. 1 State change detected on modem input DCD. +#define U0MSR_CTS (1 << 4) // Clear To Send State. Complement of input signal CTS. This bit is connected to U0MCR[1] in modem loopback mode. +#define U0MSR_DSR (1 << 5) // Data Set Ready State. Complement of input signal DSR. This bit is connected to U0MCR[0] in modem loopback mode. +#define U0MSR_RI (1 << 6) // Ring Indicator State. Complement of input RI. This bit is connected to U0MCR[2] in modem loopback mode. +#define U0MSR_DCD (1 << 7) // Data Carrier Detect State. Complement of input DCD. This bit is connected to U0MCR[3] in modem loopback mode. + +/* U0SCR - address 0x4000 801C */ +#define U0SCR_PAD_MASK 0x00FF // A readable, writable byte. +#define U0SCR_PAD_SHIFT 0 + +/* U0ACR - address 0x4000 8020 */ +#define U0ACR_START (1 << 0) // Start bit. This bit is automatically cleared after auto-baud completion. +#define U0ACR_MODE (1 << 1) // Auto-baud mode select +#define U0ACR_AUTORESTART (1 << 2) // Restart enable +#define U0ACR_ABEOINTCLR (1 << 8) // End of auto-baud interrupt clear (write only accessible) +#define U0ACR_ABTOINTCLR (1 << 9) // Auto-baud time-out interrupt clear (write only accessible) + +/* U0TER - address 0x4000 8030 */ +#define U0TER_TXEN (1 << 7) // When this bit is 1, as it is after a Reset, data written to the THR 1 is output on the TXD pin as soon as any preceding data has been sent. If this bit cleared to 0 while a character is being sent, the transmission of that character is completed, but no further characters are sent until this bit is set again. In other words, a 0 in this bit blocks the transfer of characters from the THR or TX FIFO into the transmit shift register. Software can clear this bit when it detects that the a hardware-handshaking TX-permit signal (CTS) has gone false, or with software handshaking, when it receives an XOFF character (DC3). Software can set this bit again when it detects that the TX-permit signal has gone true, or when it receives an XON (DC1) character. Reserved + +/* U0RS485CTRL - address 0x4000 804C */ +#define U0RS485CTRL_NMMEN (1 << 0) // NMM enable. +#define U0RS485CTRL_RXDIS (1 << 1) // Receiver enable. +#define U0RS485CTRL_AADEN (1 << 2) // AAD enable. +#define U0RS485CTRL_SEL (1 << 3) // Select direction control pin +#define U0RS485CTRL_DCTRL (1 << 4) // Auto direction control enable. +#define U0RS485CTRL_OINV (1 << 5) // Polarity control. This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin. + +/* U0RS485ADRMATCH - address 0x4000 8050 */ +#define U0RS485ADRMATCH_ADRMATCH_MASK 0x00FF // Contains the address match value. 0 +#define U0RS485ADRMATCH_ADRMATCH_SHIFT 0 + +/* U0RS485DLY - address 0x4000 8054 */ +#define U0RS485DLY_DLY_MASK 0x00FF // Contains the direction control (RTS or DTR) delay value. This register works in conjunction with an 8-bit counter. +#define U0RS485DLY_DLY_SHIFT 0 + +/* SSP0CR0 - address 0x4004 0000, SSP1CR0 - address 0x4005 8000 */ +#define SSP0CR0_DSS_MASK 0x000F // Data Size Select. This field controls the number of bits transferred in each frame. Values 0000-0010 are not supported and should not be used. +#define SSP0CR0_DSS_SHIFT 0 +#define SSP0CR0_FRF_MASK 0x0030 // Frame Format. +#define SSP0CR0_FRF_SHIFT 4 +#define SSP0CR0_CPOL (1 << 6) // Clock Out Polarity. This bit is only used in SPI mode. +#define SSP0CR0_CPHA (1 << 7) // Clock Out Phase. This bit is only used in SPI mode. +#define SSP0CR0_SCR_MASK 0xFF00 // Serial Clock Rate. The number of prescaler output clocks per 0x00 bit on the bus, minus one. Given that CPSDVSR is the prescale divider, and the APB clock PCLK clocks the prescaler, the bit frequency is PCLK / (CPSDVSR [SCR+1]). Reserved +#define SSP0CR0_SCR_SHIFT 8 + +/* SSP0CR1 - address 0x4004 0004, SSP1CR1 - address 0x4005 8004 */ +#define SSP0CR1_LBM (1 << 0) // Loop Back Mode. +#define SSP0CR1_SSE (1 << 1) // SPI Enable. +#define SSP0CR1_MS (1 << 2) // Master/Slave Mode.This bit can only be written when the SSE bit is 0. +#define SSP0CR1_SOD (1 << 3) // Slave Output Disable. This bit is relevant only in slave 0 mode (MS = 1). If it is 1, this blocks this SPI controller from driving the transmit data line (MISO). + +/* SSP0DR - address 0x4004 0008, SSP1DR - address 0x4005 8008 */ +#define SSP0DR_DATA_MASK 0xFFFF // Write: software can write data to be sent in a future frame to this 0x0000 register whenever the TNF bit in the Status register is 1, indicating that the Tx FIFO is not full. If the Tx FIFO was previously empty and the SPI controller is not busy on the bus, transmission of the data will begin immediately. Otherwise the data written to this register will be sent as soon as all previous data has been sent (and received). If the data length is less than 16 bit, software must right-justify the data written to this register. Read: software can read data from this register whenever the RNE bit in the Status register is 1, indicating that the Rx FIFO is not empty. When software reads this register, the SPI controller returns data from the least recent frame in the Rx FIFO. If the data length is less than 16 bit, the data is right-justified in this field with higher order bits filled with 0s. Reserved. +#define SSP0DR_DATA_SHIFT 0 + +/* SSP0SR - address 0x4004 000C, SSP1SR - address 0x4005 800C */ +#define SSP0SR_TFE (1 << 0) // Transmit FIFO Empty. This bit is 1 is the Transmit FIFO is empty, 0 if not. +#define SSP0SR_TNF (1 << 1) // Transmit FIFO Not Full. This bit is 0 if the Tx FIFO is full, 1 if not. 1 +#define SSP0SR_RNE (1 << 2) // Receive FIFO Not Empty. This bit is 0 if the Receive FIFO is empty, 1 if not. +#define SSP0SR_RFF (1 << 3) // Receive FIFO Full. This bit is 1 if the Receive FIFO is full, 0 if not. +#define SSP0SR_BSY (1 << 4) // Busy. This bit is 0 if the SPI controller is idle, 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty. + +/* SSP0CPSR - address 0x4004 0010, SSP1CPSR - address 0x4005 8010 */ +#define SSP0CPSR_CPSDVSR_MASK 0x00FF // This even value between 2 and 254, by which SPI_PCLK is divided to yield the prescaler output clock. Bit 0 always reads as 0. +#define SSP0CPSR_CPSDVSR_SHIFT 0 + +/* SSP0IMSC - address 0x4004 0014, SSP1IMSC - address 0x4005 8014 */ +#define SSP0IMSC_RORIM (1 << 0) // Software should set this bit to enable interrupt when a Receive 0 Overrun occurs, that is, when the Rx FIFO is full and another frame is completely received. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs. +#define SSP0IMSC_RTIM (1 << 1) // Software should set this bit to enable interrupt when a Receive Time-out condition occurs. A Receive Time-out occurs when the Rx FIFO is not empty, and no has not been read for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR [SCR+1]). +#define SSP0IMSC_RXIM (1 << 2) // Software should set this bit to enable interrupt when the Rx FIFO is at 0 least half full. +#define SSP0IMSC_TXIM (1 << 3) // Software should set this bit to enable interrupt when the Tx FIFO is at 0 least half empty. + +/* SSP0RIS - address 0x4004 0018, SSP1RIS - address 0x4005 8018 */ +#define SSP0RIS_RORRIS (1 << 0) // This bit is 1 if another frame was completely received while the 0 RxFIFO was full. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs. +#define SSP0RIS_RTRIS (1 << 1) // This bit is 1 if the Rx FIFO is not empty, and has not been read 0 for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR [SCR+1]). +#define SSP0RIS_RXRIS (1 << 2) // This bit is 1 if the Rx FIFO is at least half full. +#define SSP0RIS_TXRIS (1 << 3) // This bit is 1 if the Tx FIFO is at least half empty. + +/* SSP0MIS - address 0x4004 001C, SSP1MIS - address 0x4005 801C */ +#define SSP0MIS_RORMIS (1 << 0) // This bit is 1 if another frame was completely received while the 0 RxFIFO was full, and this interrupt is enabled. +#define SSP0MIS_RTMIS (1 << 1) // This bit is 1 if the Rx FIFO is not empty, has not been read for a time-out period, and this interrupt is enabled. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR [SCR+1]). +#define SSP0MIS_RXMIS (1 << 2) // This bit is 1 if the Rx FIFO is at least half full, and this interrupt 0 is enabled. +#define SSP0MIS_TXMIS (1 << 3) // This bit is 1 if the Tx FIFO is at least half empty, and this interrupt is enabled. + +/* SSP0ICR - address 0x4004 0020, SSP1ICR - address 0x4005 8020 */ +#define SSP0ICR_RORIC (1 << 0) // Writing a 1 to this bit clears the "frame was received when RxFIFO was full" interrupt. +#define SSP0ICR_RTIC (1 << 1) // Writing a 1 to this bit clears the Rx FIFO was not empty and has not been read for a timeout period interrupt. The timeout period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR [SCR+1]). + +/* I2C0CONSET - address 0x4000 0000 */ +#define I2C0CONSET_AA (1 << 2) // Assert acknowledge flag. +#define I2C0CONSET_SI (1 << 3) // I2C interrupt flag. +#define I2C0CONSET_STO (1 << 4) // STOP flag. +#define I2C0CONSET_STA (1 << 5) // START flag. +#define I2C0CONSET_I2EN (1 << 6) // I2C interface enable. Reserved. The value read from a reserved bit is not defined. + +/* I2C0STAT - 0x4000 0004 */ +#define I2C0STAT_STATUS_MASK 0x00F8 // These bits give the actual status information about the I2 C interface. Reserved. The value read from a reserved bit is not defined. +#define I2C0STAT_STATUS_SHIFT 3 + +/* I2C0DAT - 0x4000 0008 */ +#define I2C0DAT_DATA_MASK 0x00FF // This register holds data values that have been received or are to 0 be transmitted. Reserved. The value read from a reserved bit is not defined. +#define I2C0DAT_DATA_SHIFT 0 + +/* I2C0ADR0 - 0x4000 000C */ +#define I2C0ADR0_GC (1 << 0) // General Call enable bit. +#define I2C0ADR0_ADDRESS_MASK 0x00FE // The I2C device address for slave mode. Reserved. The value read from a reserved bit is not defined. +#define I2C0ADR0_ADDRESS_SHIFT 1 + +/* I2C0SCLH - address 0x4000 0010 */ +#define I2C0SCLH_SCLH_MASK 0xFFFF // Count for SCL HIGH time period selection. +#define I2C0SCLH_SCLH_SHIFT 0 + +/* I2C0SCLL - 0x4000 0014 */ +#define I2C0SCLL_SCLL_MASK 0xFFFF // Count for SCL low time period selection. +#define I2C0SCLL_SCLL_SHIFT 0 + +/* I2C0CONCLR - 0x4000 0018 */ +#define I2C0CONCLR_AAC (1 << 2) // Assert acknowledge Clear bit. +#define I2C0CONCLR_SIC (1 << 3) // I2C interrupt Clear bit. +#define I2C0CONCLR_STAC (1 << 5) // START flag Clear bit. +#define I2C0CONCLR_I2ENC (1 << 6) // I2C interface Disable bit. Reserved. The value read from a reserved bit is not defined. + +/* I2C0MMCTRL - 0x4000 001C */ +#define I2C0MMCTRL_MM_ENA (1 << 0) // Monitor mode enable. +#define I2C0MMCTRL_ENA_SCL (1 << 1) // SCL output enable. + +/* I2C0DATA_BUFFER - 0x4000 002C */ +#define I2C0DATA_BUFFER_DATA_MASK 0x00FF // This register holds contents of the 8 MSBs of the DAT shift register. Reserved. The value read from a reserved bit is not defined. +#define I2C0DATA_BUFFER_DATA_SHIFT 0 + +/* CANCNTL, address 0x4005 0000 */ +#define CANCNTL_INIT (1 << 0) // Initialization +#define CANCNTL_IE (1 << 1) // Module interrupt enable +#define CANCNTL_SIE (1 << 2) // Status change interrupt enable +#define CANCNTL_EIE (1 << 3) // Error interrupt enable +#define CANCNTL_DAR (1 << 5) // Disable automatic retransmission +#define CANCNTL_CCE (1 << 6) // Configuration change enable +#define CANCNTL_TEST (1 << 7) // Test mode enable + +/* CANSTAT, address 0x4005 0004 */ +#define CANSTAT_LEC_MASK 0x0007 // Last error code Type of the last error to occur on the CAN bus.The LEC field holds a code which indicates the type of the last error to occur on the CAN bus. This field will be cleared to `0' when a message has been transferred (reception or transmission) without error. The unused code `111' may be written by the CPU to check for updates. +#define CANSTAT_LEC_SHIFT 0 +#define CANSTAT_TXOK (1 << 3) // Transmitted a message successfully This bit must be reset by the CPU. It is never reset by the CAN controller. +#define CANSTAT_RXOK (1 << 4) // Received a message successfully This bit must be reset by the CPU. It is never reset by the CAN controller. +#define CANSTAT_EPASS (1 << 5) // Error passive +#define CANSTAT_EWARN (1 << 6) // Warning status +#define CANSTAT_BOFF (1 << 7) // Busoff status + +/* CANEC, address 0x4005 0008 */ +#define CANEC_TEC_MASK 0x00FF // Transmit error counter Current value of the transmit error counter (maximum value 255) +#define CANEC_TEC_SHIFT 0 +#define CANEC_REC_MASK 0x7F00 // Receive error counter Current value of the receive error counter (maximum value 127). +#define CANEC_REC_SHIFT 8 +#define CANEC_RP (1 << 15) // Receive error passive + +/* CANBT, address 0x4005 000C */ +#define CANBT_BRP_MASK 0x003F // Baud rate prescaler The value by which the oscillator frequency is divided for generating the bit time quanta. The bit time is built up from a multiple of this quanta. Valid values for the Baud Rate Prescaler are 0 to 63.[1] +#define CANBT_BRP_SHIFT 0 +#define CANBT_SJW_MASK 0x00C0 // (Re)synchronization jump width Valid programmed values are 0 to 3.[1] +#define CANBT_SJW_SHIFT 6 +#define CANBT_TSEG1_MASK 0x0F00 // Time segment before the sample point Valid values are 1 to 15.[1] +#define CANBT_TSEG1_SHIFT 8 +#define CANBT_TSEG2_MASK 0x7000 // Time segment after the sample point Valid values are 0 to 7.[1] +#define CANBT_TSEG2_SHIFT 12 + +/* CANINT, address 0x4005 0010 */ +#define CANINT_INTID_MASK 0xFFFF // 0x0000 = No interrupt is pending. 0 0x0001 - 0x0020 = Number of message object which caused the interrupt. 0x0021 - 0x7FFF = Unused 0x8000 = Status interrupt 0x8001 - 0xFFFF = Unused +#define CANINT_INTID_SHIFT 0 + +/* CANTEST, address 0x4005 0014 */ +#define CANTEST_BASIC (1 << 2) // Basic mode +#define CANTEST_SILENT (1 << 3) // Silent mode +#define CANTEST_LBACK (1 << 4) // Loop back mode +#define CANTEST_TX_MASK 0x0060 // Control of CAN_TXD pins +#define CANTEST_TX_SHIFT 5 +#define CANTEST_RX (1 << 7) // Monitors the actual value of the CAN_RXD pin. + +/* CANBRPE, address 0x4005 0018 */ +#define CANBRPE_BRPE_MASK 0x000F // Baud rate prescaler extension By programming BRPE the Baud Rate Prescaler can be extended to values up to 1023. Hardware interprets the value as the value of BRPE (MSBs) and BRP (LSBs) plus one. Allowed values are 0 to 15. +#define CANBRPE_BRPE_SHIFT 0 + +/* CANIF1_CMDREQ, address 0x4005 0020 and CANIF2_CMDREQ, address 0x4005 0080 */ +#define CANIFn_CMDREQ_MN_MASK 0x003F // Message number 0x01 - 0x20 = Valid message numbers. The message object in the message RAM is selected for data transfer. 0x00 = Not a valid message number. This value is interpreted as 0x20.[1] 0x21 - 0x3F = Not a valid message number. This value is interpreted as 0x01 - 0x1F.[1] +#define CANIFn_CMDREQ_MN_SHIFT 0 +#define CANIFn_CMDREQ_BUSY (1 << 15) // BUSY flag + +/* CANIF1_CMDMSK, address 0x4005 0024 and CANIF2_CMDMSK, address 0x4005 0084 */ +#define CANIFn_CMDMSK_DATA_B (1 << 0) // Access data bytes 4-7 +#define CANIFn_CMDMSK_DATA_A (1 << 1) // Access data bytes 0-3 +#define CANIFn_CMDMSK_TXRQST (1 << 2) // Access transmission request bit (Write direction) +#define CANIFn_CMDMSK_NEWDAT (1 << 2) // Access new data bit (Read direction) +#define CANIFn_CMDMSK_CLRINTPND (1 << 3) // This bit is ignored in the write direction. +#define CANIFn_CMDMSK_CTRL (1 << 4) // Access control bits +#define CANIFn_CMDMSK_ARB (1 << 5) // Access arbitration bits +#define CANIFn_CMDMSK_MASK (1 << 6) // Access mask bits +#define CANIFn_CMDMSK_WR (1 << 7) // Write transfer Transfer data from the selected message buffer registers to the message object addressed by the command request register CANIFn_CMDREQ. +#define CANIFn_CMDMSK_RD (0 << 7) // Read transfer Read data from the selected message buffer registers to the message object addressed by the command request register CANIFn_CMDREQ. + +/* CANIF1_MSK1, address 0x4005 0028 and CANIF2_MASK1, address 0x4005 0088 */ +#define CANIFn_MSK1_MSK_MASK 0xFFFF // Identifier mask +#define CANIFn_MSK1_MSK_SHIFT 0 + +/* CANIF1_MSK2, address 0x4005 002C and CANIF2_MASK2, address 0x4005 008C */ +#define CANIFn_MSK2_MSK_MASK 0x1FFF // Identifier mask +#define CANIFn_MSK2_MSK_SHIFT 0 +#define CANIFn_MSK2_MDIR (1 << 14) // Mask message direction +#define CANIFn_MSK2_MXTD (1 << 15) // Mask extend identifier + +/* CANIF1_ARB1, address 0x4005 0030 and CANIF2_ARB1, address 0x4005 0090 */ +#define CANIFn_ARB1_ID_MASK 0xFFFF // Message identifier 29-bit identifier (extended frame) 11-bit identifier (standard frame) +#define CANIFn_ARB1_ID_SHIFT 0 + +/* CANIF1_ARB2, address 0x4005 0034 and CANIF2_ARB2, address 0x4005 0094 */ +#define CANIFn_ARB2_ID_MASK 0x1FFF // Message identifier 29-bit identifier (extended frame) 11-bit identifier (standard frame) +#define CANIFn_ARB2_ID_SHIFT 0 +#define CANIFn_ARB2_DIR (1 << 13) // Message direction +#define CANIFn_ARB2_XTD (1 << 14) // Extend identifier +#define CANIFn_ARB2_MSGVAL (1 << 15) // Message valid Remark: The CPU must reset the MSGVAL bit of all unused Messages Objects during the initialization before it resets bit INIT in the CAN Control Register. This bit must also be reset before the identifier ID28:0, the control bits XTD, DIR, or the Data Length Code DLC3:0 are modified, or if the Messages Object is no longer required. + +/* CANIF1_MCTRL, address 0x4005 0038 and CANIF2_MCTRL, address 0x4005 0098 */ +#define CANIFn_MCTRL_DLC_MASK 0x000F // Data length code Remark: The Data Length Code of a Message Object must be defined the same as in all the corresponding objects with the same identifier at other nodes. When the Message Handler stores a data frame, it will write the DLC to the value given by the received message. 0000 - 1000 = Data frame has 0 - 8 data bytes. 1001 - 1111 = Data frame has 8 data bytes. +#define CANIFn_MCTRL_DLC_SHIFT 0 +#define CANIFn_MCTRL_EOB (1 << 7) // End of buffer +#define CANIFn_MCTRL_TXRQST (1 << 8) // Transmit request +#define CANIFn_MCTRL_RMTEN (1 << 9) // Remote enable +#define CANIFn_MCTRL_RXIE (1 << 10) // Receive interrupt enable +#define CANIFn_MCTRL_TXIE (1 << 11) // Transmit interrupt enable +#define CANIFn_MCTRL_UMASK (1 << 12) // Use acceptance mask Remark: If UMASK is set to 1, the message object's mask bits have to be programmed during initialization of the message object before MAGVAL is set to 1. +#define CANIFn_MCTRL_INTPND (1 << 13) // Interrupt pending +#define CANIFn_MCTRL_MSGLST (1 << 14) // Message lost (only valid for message objects in the direction receive). +#define CANIFn_MCTRL_NEWDAT (1 << 15) // New data + +/* CANIF1_DA1, address 0x4005 003C and CANIF2_DA1, address 0x4005 009C */ +#define CANIFn_DA1_DATA0_MASK 0x00FF // Data byte 0 +#define CANIFn_DA1_DATA0_SHIFT 0 +#define CANIFn_DA1_DATA1_MASK 0xFF00 // Data byte 1 +#define CANIFn_DA1_DATA1_SHIFT 8 + +/* CANIF1_DA2, address 0x4005 0040 and CANIF2_DA2, address 0x4005 00A0 */ +#define CANIFn_DA2_DATA2_MASK 0x00FF // Data byte 2 +#define CANIFn_DA2_DATA2_SHIFT 0 +#define CANIFn_DA2_DATA3_MASK 0xFF00 // Data byte 3 +#define CANIFn_DA2_DATA3_SHIFT 8 + +/* CANIF1_DB1, address 0x4005 0044 and CANIF2_DB1, address 0x4005 00A4 */ +#define CANIFn_DB1_DATA4_MASK 0x00FF // Data byte 4 +#define CANIFn_DB1_DATA4_SHIFT 0 +#define CANIFn_DB1_DATA5_MASK 0xFF00 // Data byte 5 +#define CANIFn_DB1_DATA5_SHIFT 8 + +/* CANIF1_DB2, address 0x4005 0048 and CANIF2_DB2, address 0x4005 00A8 */ +#define CANIFn_DB2_DATA6_MASK 0x00FF // Data byte 6 +#define CANIFn_DB2_DATA6_SHIFT 0 +#define CANIFn_DB2_DATA7_MASK 0xFF00 // Data byte 7 +#define CANIFn_DB2_DATA7_SHIFT 8 + +/* CANTXREQ1, address 0x4005 0100 */ +#define CANTXREQ1_TXRQST_MASK 0xFFFF // Transmission request bit of message objects 16 to 1. 0 = This message object is not waiting for transmission. 1 = The transmission of this message object is requested and not yet done. Reserved +#define CANTXREQ1_TXRQST_SHIFT 0 + +/* CANTXREQ2, address 0x4005 0104 */ +#define CANTXREQ2_TXRQST_MASK 0xFFFF // Transmission request bit of message objects 32 to 17. 0 = This message object is not waiting for transmission. 1 = The transmission of this message object is requested and not yet done. Reserved +#define CANTXREQ2_TXRQST_SHIFT 0 + +/* CANND1, address 0x4005 0120 */ +#define CANND1_NEWDAT_MASK 0xFFFF // New data bits of message objects 16 to 1. 0 = No new data has been written into the data portion of this Message Object by the Message Handler since last time this flag was cleared by the CPU. 1 = The Message Handler or the CPU has written new data into the data portion of this Message Object. +#define CANND1_NEWDAT_SHIFT 0 + +/* CANND2, address 0x4005 0124 */ +#define CANND2_NEWDAT_MASK 0xFFFF // New data bits of message objects 32 to 17. 0 = No new data has been written into the data portion of this Message Object by the Message Handler since last time this flag was cleared by the CPU. 1 = The Message Handler or the CPU has written new data into the data portion of this Message Object. +#define CANND2_NEWDAT_SHIFT 0 + +/* CANIR1, address 0x4005 0140 */ +#define CANIR1_INTPND_INTERRUPT_MASK 0xFFFF // pending bits of message objects 16 to 1. essage object is ignored by the message essage object is the source of an interrupt. Reserved +#define CANIR1_INTPND_INTERRUPT_SHIFT 0 + +/* CANIR2, addresses 0x4005 0144 */ +#define CANIR2_INTPND_MASK 0xFFFF // Interrupt pending bits of message objects 32 to 17. 0 = This message object is ignored by the message handler. 1 = This message object is the source of an interrupt. Reserved +#define CANIR2_INTPND_SHIFT 0 + +/* CANMSGV1, addresses 0x4005 0160 */ +#define CANMSGV1_MSGVAL_MASK 0xFFFF // Message valid bits of message objects 16 to 1. 0 = This message object is ignored by the message handler. 1 = This message object is configured and should be considered by the message handler. Reserved +#define CANMSGV1_MSGVAL_SHIFT 0 + +/* CANMSGV2, address 0x4005 0164 */ +#define CANMSGV2_MSGVAL_MASK 0xFFFF // Message valid bits of message objects 32 to 17. 0 = This message object is ignored by the message handler. 1 = This message object is configured and should be considered by the message handler. Reserved +#define CANMSGV2_MSGVAL_SHIFT 0 + +/* CANCLKDIV, address 0x4005 0180 */ +#define CANCLKDIV_CLKDIVVAL_MASK 0x000F // Clock divider value. CAN_CLK = PCLK/(CLKDIVVAL +1) 0000: CAN_CLK = PCLK divided by 1. 0001: CAN_CLK = PCLK divided by 2. 0010: CAN_CLK = PCLK divided by 3 0011: CAN_CLK = PCLK divided by 4. ... 1111: CAN_CLK = PCLK divided by 16. +#define CANCLKDIV_CLKDIVVAL_SHIFT 0 + +/* TMR16B0IR - address 0x4000 C000 and TMR16B1IR - address 0x4001 0000 */ +#define TMR16B0IR_MR0 (1 << 0) // Interrupt flag for match channel 0. +#define TMR16B0IR_MR1 (1 << 1) // Interrupt flag for match channel 1. +#define TMR16B0IR_MR2 (1 << 2) // Interrupt flag for match channel 2. +#define TMR16B0IR_MR3 (1 << 3) // Interrupt flag for match channel 3. +#define TMR16B0IR_CR0 (1 << 4) // Interrupt flag for capture channel 0 event. + +/* TMR16B0TCR - address 0x4000 C004 and TMR16B1TCR - address 0x4001 0004 */ +#define TMR16B0TCR_CEN (1 << 0) // Counter Enable. When one, the Timer Counter and Prescale Counter are enabled for counting. When zero, the counters are disabled. +#define TMR16B0TCR_CRST (1 << 1) // Counter Reset. When one, the Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero. + +/* TMR16B0TC, address 0x4000 C008 and TMR16B1TC 0x4001 0008 */ +#define TMR16B0TC_TC_MASK 0xFFFF // Timer counter value. +#define TMR16B0TC_TC_SHIFT 0 + +/* TMR16B0PR, address 0x4000 C00C and TMR16B1PR 0x4001 000C */ +#define TMR16B0PR_PR_MASK 0xFFFF // Prescale max value. +#define TMR16B0PR_PR_SHIFT 0 + +/* TMR16B0PC, address 0x4001 C010 and TMR16B1PC 0x4000 0010 */ +#define TMR16B0PC_PC_MASK 0xFFFF // Prescale counter value. +#define TMR16B0PC_PC_SHIFT 0 + +/* TMR16B0MCR - address 0x4000 C014 and TMR16B1MCR - address 0x4001 0014 */ +#define TMR16B0MCR_MR0I (1 << 0) // Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC. +#define TMR16B0MCR_MR0R (1 << 1) // Reset on MR0: the TC will be reset if MR0 matches it. +#define TMR16B0MCR_MR0S (1 << 2) // Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches 0 the TC. +#define TMR16B0MCR_MR1I (1 << 3) // Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC. +#define TMR16B0MCR_MR1R (1 << 4) // Reset on MR1: the TC will be reset if MR1 matches it. +#define TMR16B0MCR_MR1S (1 << 5) // Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches 0 the TC. +#define TMR16B0MCR_MR2I (1 << 6) // Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC. +#define TMR16B0MCR_MR2R (1 << 7) // Reset on MR2: the TC will be reset if MR2 matches it. +#define TMR16B0MCR_MR2S (1 << 8) // Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches 0 the TC. +#define TMR16B0MCR_MR3I (1 << 9) // Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC. +#define TMR16B0MCR_MR3R (1 << 10) // Reset on MR3: the TC will be reset if MR3 matches it. +#define TMR16B0MCR_MR3S (1 << 11) // Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches 0 the TC. + +/* TMR16B0MR0 to 3, addresses 0x4000 C018 to 24 and TMR16B1MR0 to 3, addresses 0x4001 0018 to 24 */ +#define TMR16B0MR0_to_3_MATCH_MASK 0xFFFF // Timer counter match value. +#define TMR16B0MR0_to_3_MATCH_SHIFT 0 + +/* TMR16B0CCR - address 0x4000 C028 and TMR16B1CCR - address 0x4001 0028 */ +#define TMR16B0CCR_CAP0RE (1 << 0) // Capture on CT16Bn_CAP0 rising edge: a sequence of 0 then 1 on CT16Bn_CAP0 will cause CR0 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP0FE (1 << 1) // Capture on CT16Bn_CAP0 falling edge: a sequence of 1 then 0 on CT16Bn_CAP0 will 0 cause CR0 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP0I (1 << 2) // Interrupt on CT16Bn_CAP0 event: a CR0 load due to a CT16Bn_CAP0 event will generate an interrupt. + +/* TMR16B0CR0, address 0x4000 C02C and TMR16B1CR0, address 0x4001 002C */ +#define TMR16B0CR0_CAP_MASK 0xFFFF // Timer counter capture value. +#define TMR16B0CR0_CAP_SHIFT 0 + +/* TMR16B0EMR - address 0x4000 C03C and TMR16B1EMR - address 0x4001 003C */ +#define TMR16B0EMR_EM0 (1 << 0) // External Match 0. This bit reflects the state of output CT16B0_MAT0/CT16B1_MAT0, 0 whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM1 (1 << 1) // External Match 1. This bit reflects the state of output CT16B0_MAT1/CT16B1_MAT1, 0 whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT16B0_MAT1/CT16B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM2 (1 << 2) // External Match 2. This bit reflects the state of output match channel 2, whether or not 0 this output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. Note that on counter/timer 0 this match channel is not pinned out. This bit is driven to the CT16B1_MAT2 pin if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM3 (1 << 3) // External Match 3. This bit reflects the state of output of match channel 3. When a match 0 occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. There is no output pin available for this channel on either of the 16-bit timers. +#define TMR16B0EMR_EMC0_MASK 0x0030 // External Match Control 0. Determines the functionality of External Match 0. +#define TMR16B0EMR_EMC0_SHIFT 4 +#define TMR16B0EMR_EMC1_MASK 0x00C0 // External Match Control 1. Determines the functionality of External Match 1. +#define TMR16B0EMR_EMC1_SHIFT 6 +#define TMR16B0EMR_EMC2_MASK 0x0300 // External Match Control 2. Determines the functionality of External Match 2. +#define TMR16B0EMR_EMC2_SHIFT 8 +#define TMR16B0EMR_EMC3_MASK 0x0C00 // External Match Control 3. Determines the functionality of External Match 3. +#define TMR16B0EMR_EMC3_SHIFT 10 + +/* TMR16B0CTCR - address 0x4000 C070 and TMR16B1CTCR - address 0x4001 0070 */ +#define TMR16B0CTCR_CTM_MASK 0x0003 // Counter/Timer Mode. This field selects which rising PCLK 00 edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). +#define TMR16B0CTCR_CTM_SHIFT 0 + +/* TMR16B0PWMC - address 0x4000 C074 and TMR16B1PWMC- address 0x4001 0074 */ +#define TMR16B0PWMC_PWMEN0 (1 << 0) // PWM channel0 enable +#define TMR16B0PWMC_PWMEN1 (1 << 1) // PWM channel1 enable +#define TMR16B0PWMC_PWMEN2 (1 << 2) // PWM channel2 enable +#define TMR16B0PWMC_PWMEN3 (1 << 3) // PWM channel3 enable Note: It is recommended to use match channel 3 to set the PWM cycle because it is not pinned out. + +/* TMR16B0IR - address 0x4000 C000 and TMR16B1IR - address 0x4001 0000 */ +#define TMR16B0IR_MR0INT (1 << 0) // Interrupt flag for match channel 0. +#define TMR16B0IR_MR1INT (1 << 1) // Interrupt flag for match channel 1. +#define TMR16B0IR_MR2INT (1 << 2) // Interrupt flag for match channel 2. +#define TMR16B0IR_MR3INT (1 << 3) // Interrupt flag for match channel 3. +#define TMR16B0IR_CR0INT (1 << 4) // Interrupt flag for capture channel 0 event. +#define TMR16B0IR_CR1INT (1 << 5) // Interrupt flag for capture channel 1 event. + +/* TMR16B0TCR - address 0x4000 C004 and TMR16B1TCR - address 0x4001 0004 */ +#define TMR16B0TCR_CEN (1 << 0) // Counter Enable. When one, the Timer Counter and Prescale Counter are enabled for counting. When zero, the counters are disabled. +#define TMR16B0TCR_CRST (1 << 1) // Counter Reset. When one, the Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero. + +/* TMR16B0TC, address 0x4000 C008 and TMR16B1TC 0x4001 0008 */ +#define TMR16B0TC_TC_MASK 0xFFFF // Timer counter value. +#define TMR16B0TC_TC_SHIFT 0 + +/* TMR16B0PR, address 0x4000 C00C and TMR16B1PR 0x4001 000C */ +#define TMR16B0PR_PR_MASK 0xFFFF // Prescale max value. +#define TMR16B0PR_PR_SHIFT 0 + +/* TMR16B0PC, address 0x4001 C010 and TMR16B1PC 0x4000 0010 */ +#define TMR16B0PC_PC_MASK 0xFFFF // Prescale counter value. +#define TMR16B0PC_PC_SHIFT 0 + +/* TMR16B0MCR - address 0x4000 C014 and TMR16B1MCR - address 0x4001 0014 */ +#define TMR16B0MCR_MR0I (1 << 0) // Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC. +#define TMR16B0MCR_MR0R (1 << 1) // Reset on MR0: the TC will be reset if MR0 matches it. +#define TMR16B0MCR_MR0S (1 << 2) // Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches 0 the TC. +#define TMR16B0MCR_MR1I (1 << 3) // Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC. +#define TMR16B0MCR_MR1R (1 << 4) // Reset on MR1: the TC will be reset if MR1 matches it. +#define TMR16B0MCR_MR1S (1 << 5) // Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches 0 the TC. +#define TMR16B0MCR_MR2I (1 << 6) // Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC. +#define TMR16B0MCR_MR2R (1 << 7) // Reset on MR2: the TC will be reset if MR2 matches it. +#define TMR16B0MCR_MR2S (1 << 8) // Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches 0 the TC. +#define TMR16B0MCR_MR3I (1 << 9) // Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC. +#define TMR16B0MCR_MR3R (1 << 10) // Reset on MR3: the TC will be reset if MR3 matches it. +#define TMR16B0MCR_MR3S (1 << 11) // Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches 0 the TC. + +/* TMR16B0MR0 to 3, addresses 0x4000 C018 to 24 and TMR16B1MR0 to 3, addresses 0x4001 0018 to 24 */ +#define TMR16B0MR0_to_3_MATCH_MASK 0xFFFF // Timer counter match value. +#define TMR16B0MR0_to_3_MATCH_SHIFT 0 + +/* TMR16B0CCR - address 0x4000 C028 and TMR16B1CCR - address 0x4001 0028 */ +#define TMR16B0CCR_CAP0RE (1 << 0) // Capture on CT16Bn_CAP0 rising edge: a sequence of 0 then 1 on CT16Bn_CAP0 will cause CR0 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP0FE (1 << 1) // Capture on CT16Bn_CAP0 falling edge: a sequence of 1 then 0 on CT16Bn_CAP0 will 0 cause CR0 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP0I (1 << 2) // Interrupt on CT16Bn_CAP0 event: a CR0 load due to a CT16Bn_CAP0 event will generate an interrupt. +#define TMR16B0CCR_CAP1RE (1 << 3) // Capture on CT16Bn_CAP1 rising edge: a sequence of 0 then 1 on CT16Bn_CAP1 will cause CR1 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP1FE (1 << 4) // Capture on CT16Bn_CAP1 falling edge: a sequence of 1 then 0 on CT16Bn_CAP1 will 0 cause CR1 to be loaded with the contents of TC. +#define TMR16B0CCR_CAP1I (1 << 5) // Interrupt on CT16Bn_CAP1 event: a CR1 load due to a CT16Bn_CAP1 event will generate an interrupt. + +/* TMR16B0EMR - address 0x4000 C03C and TMR16B1EMR - address 0x4001 003C */ +#define TMR16B0EMR_EM0 (1 << 0) // External Match 0. This bit reflects the state of output CT16B0_MAT0/CT16B1_MAT0, 0 whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM1 (1 << 1) // External Match 1. This bit reflects the state of output CT16B0_MAT1/CT16B1_MAT1, 0 whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT16B0_MAT1/CT16B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM2 (1 << 2) // External Match 2. This bit reflects the state of output match channel 2, whether or not 0 this output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. Note that on counter/timer 0 this match channel is not pinned out. This bit is driven to the CT16B1_MAT2 pin if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR16B0EMR_EM3 (1 << 3) // External Match 3. This bit reflects the state of output of match channel 3. When a match 0 occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. There is no output pin available for this channel on either of the 16-bit timers. +#define TMR16B0EMR_EMC0_MASK 0x0030 // External Match Control 0. Determines the functionality of External Match 0. +#define TMR16B0EMR_EMC0_SHIFT 4 +#define TMR16B0EMR_EMC1_MASK 0x00C0 // External Match Control 1. Determines the functionality of External Match 1. +#define TMR16B0EMR_EMC1_SHIFT 6 +#define TMR16B0EMR_EMC2_MASK 0x0300 // External Match Control 2. Determines the functionality of External Match 2. +#define TMR16B0EMR_EMC2_SHIFT 8 +#define TMR16B0EMR_EMC3_MASK 0x0C00 // External Match Control 3. Determines the functionality of External Match 3. +#define TMR16B0EMR_EMC3_SHIFT 10 + +/* TMR16B0CTCR - address 0x4000 C070 and TMR16B1CTCR - address 0x4001 0070 */ +#define TMR16B0CTCR_CTM_MASK 0x0003 // Counter/Timer Mode. This field selects which rising PCLK 00 edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). +#define TMR16B0CTCR_CTM_SHIFT 0 +#define TMR16B0CTCR_SELCC_MASK 0x00E0 // When bit 4 is one, these bits select which capture input edge 0 will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is zero. +#define TMR16B0CTCR_SELCC_SHIFT 5 + +/* TMR16B0PWMC - address 0x4000 C074 and TMR16B1PWMC- address 0x4001 0074 */ +#define TMR16B0PWMC_PWMEN0 (1 << 0) // PWM channel0 enable +#define TMR16B0PWMC_PWMEN1 (1 << 1) // PWM channel1 enable +#define TMR16B0PWMC_PWMEN2 (1 << 2) // PWM channel2 enable +#define TMR16B0PWMC_PWMEN3 (1 << 3) // PWM channel3 enable Note: It is recommended to use match channel 3 to set the PWM cycle because it is not pinned out. + +/* TMR32B0IR - address 0x4001 4000 and TMR32B1IR - address 0x4001 8000 */ +#define TMR32B0IR_MR0_INTERRUPT (1 << 0) // Interrupt flag for match channel 0. +#define TMR32B0IR_MR1_INTERRUPT (1 << 1) // Interrupt flag for match channel 1. +#define TMR32B0IR_MR2_INTERRUPT (1 << 2) // Interrupt flag for match channel 2. +#define TMR32B0IR_MR3_INTERRUPT (1 << 3) // Interrupt flag for match channel 3. +#define TMR32B0IR_CR0_INTERRUPT (1 << 4) // Interrupt flag for capture channel 0 event. + +/* TMR32B0TCR - address 0x4001 4004 and TMR32B1TCR - address 0x4001 8004 */ +#define TMR32B0TCR_CEN (1 << 0) // When one, the Timer Counter and Prescale Counter are 0 enabled for counting. When zero, the counters are disabled. +#define TMR32B0TCR_CRST (1 << 1) // When one, the Timer Counter and the Prescale Counter 0 are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero. + +/* TMR32B0TC, address 0x4001 4008 and TMR32B1TC 0x4001 8008 */ +#define TMR32B0TC_TC_MASK 0xFFFFFFFF // Timer counter value. +#define TMR32B0TC_TC_SHIFT 0 + +/* TMR32B0PR, address 0x4001 400C and TMR32B1PR 0x4001 800C */ +#define TMR32B0PR_PR_MASK 0xFFFFFFFF // Prescale value. +#define TMR32B0PR_PR_SHIFT 0 + +/* TMR32B0PC, address 0x4001 4010 and TMR32B1PC 0x4001 8010 */ +#define TMR32B0PC_PC_MASK 0xFFFFFFFF // Prescale counter value. +#define TMR32B0PC_PC_SHIFT 0 + +/* TMR32B0MCR - address 0x4001 4014 and TMR32B1MCR - address 0x4001 8014 */ +#define TMR32B0MCR_MR0I (1 << 0) // Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC. +#define TMR32B0MCR_MR0R (1 << 1) // Reset on MR0: the TC will be reset if MR0 matches it. +#define TMR32B0MCR_MR0S (1 << 2) // Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches 0 the TC. +#define TMR32B0MCR_MR1I (1 << 3) // Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC. +#define TMR32B0MCR_MR1R (1 << 4) // Reset on MR1: the TC will be reset if MR1 matches it. +#define TMR32B0MCR_MR1S (1 << 5) // Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches 0 the TC. +#define TMR32B0MCR_MR2I (1 << 6) // Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC. +#define TMR32B0MCR_MR2R (1 << 7) // Reset on MR2: the TC will be reset if MR2 matches it. +#define TMR32B0MCR_MR2S (1 << 8) // Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches 0 the TC. +#define TMR32B0MCR_MR3I (1 << 9) // Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC. +#define TMR32B0MCR_MR3R (1 << 10) // Reset on MR3: the TC will be reset if MR3 matches it. +#define TMR32B0MCR_MR3S (1 << 11) // Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches 0 the TC. + +/* TMR32B0MR0 to 3, addresses 0x4001 4018 to 24 and TMR32B1MR0 to 3, addresses 0x4001 8018 to 24 */ +#define TMR32B0MRn_MATCH_MASK 0xFFFFFFFF // Timer counter match value. +#define TMR32B0MRn_MATCH_SHIFT 0 + +/* TMR32B0CCR - address 0x4001 4028 and TMR32B1CCR - address 0x4001 8028 */ +#define TMR32B0CCR_CAP0RE (1 << 0) // Capture on CT32Bn_CAP0 rising edge: a sequence of 0 then 1 on CT32Bn_CAP0 will cause CR0 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP0FE (1 << 1) // Capture on CT32Bn_CAP0 falling edge: a sequence of 1 then 0 on CT32Bn_CAP0 will 0 cause CR0 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP0I (1 << 2) // Interrupt on CT32Bn_CAP0 event: a CR0 load due to a CT32Bn_CAP0 event will generate an interrupt. + +/* TMR32B0CR0, addresses 0x4001 402C and TMR32B1CR0, addresses 0x4001 802C */ +#define TMR32B0CR0_CAP_MASK 0xFFFFFFFF // Timer counter capture value. +#define TMR32B0CR0_CAP_SHIFT 0 + +/* TMR32B0EMR - address 0x4001 403C and TMR32B1EMR - address0x4001 803C */ +#define TMR32B0EMR_EM0 (1 << 0) // External Match 0. This bit reflects the state of output CT32Bn_MAT0, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT32B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM1 (1 << 1) // External Match 1. This bit reflects the state of output CT32Bn_MAT1, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT32B0_MAT1/CT16B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM2 (1 << 2) // External Match 2. This bit reflects the state of output CT32Bn_MAT2, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. This bit is driven to the CT32B0_MAT2/CT16B1_MAT2 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM3 (1 << 3) // External Match 3. This bit reflects the state of output CT32Bn_MAT3, whether or not this output is connected to its pin. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. This bit is driven to the CT32B0_MAT3/CT16B1_MAT3 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EMC0_MASK 0x0030 // External Match Control 0. Determines the functionality of External Match 0. +#define TMR32B0EMR_EMC0_SHIFT 4 +#define TMR32B0EMR_EMC1_MASK 0x00C0 // External Match Control 1. Determines the functionality of External Match 1. +#define TMR32B0EMR_EMC1_SHIFT 6 +#define TMR32B0EMR_EMC2_MASK 0x0300 // External Match Control 2. Determines the functionality of External Match 2. +#define TMR32B0EMR_EMC2_SHIFT 8 +#define TMR32B0EMR_EMC3_MASK 0x0C00 // External Match Control 3. Determines the functionality of External Match 3. +#define TMR32B0EMR_EMC3_SHIFT 10 + +/* TMR32B0CTCR - address 0x4001 4070 and TMR32B1TCR - address 0x4001 8070 */ +#define TMR32B0CTCR_CTM_MASK 0x0003 // Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). Timer Mode: every rising PCLK edge +#define TMR32B0CTCR_CTM_SHIFT 0 +#define TMR32B0CTCR_CIS_MASK 0x000C // Count Input Select. When bits 1:0 in this register are not 00, these bits select which CAP pin is sampled for clocking: +#define TMR32B0CTCR_CIS_SHIFT 2 + +/* TMR32B0PWMC - 0x4001 4074 and TMR32B1PWMC - 0x4001 8074 */ +#define TMR32B0PWMC_PWMEN0 (1 << 0) // PWM channel 0 enable +#define TMR32B0PWMC_PWMEN1 (1 << 1) // PWM channel 1 enable +#define TMR32B0PWMC_PWMEN2 (1 << 2) // PWM channel 2 enable +#define TMR32B0PWMC_PWMEN3 (1 << 3) // PWM channel 3 enable Note: It is recommended to use match channel 3 to set the PWM cycle. + +/* TMR32B0IR - address 0x4001 4000 and TMR32B1IR - address 0x4001 8000 */ +#define TMR32B0IR_MR0INT (1 << 0) // Interrupt flag for match channel 0. +#define TMR32B0IR_MR1INT (1 << 1) // Interrupt flag for match channel 1. +#define TMR32B0IR_MR2INT (1 << 2) // Interrupt flag for match channel 2. +#define TMR32B0IR_MR3INT (1 << 3) // Interrupt flag for match channel 3. +#define TMR32B0IR_CR0INT (1 << 4) // Interrupt flag for capture channel 0 event. +#define TMR32B0IR_CR1INT (1 << 5) // Interrupt flag for capture channel 1 event. + +/* TMR32B0TCR - address 0x4001 4004 and TMR32B1TCR - address 0x4001 8004 */ +#define TMR32B0TCR_CEN (1 << 0) // When one, the Timer Counter and Prescale Counter are 0 enabled for counting. When zero, the counters are disabled. +#define TMR32B0TCR_CRST (1 << 1) // When one, the Timer Counter and the Prescale Counter 0 are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero. + +/* TMR32B0TC, address 0x4001 4008 and TMR32B1TC 0x4001 8008 */ +#define TMR32B0TC_TC_MASK 0xFFFFFFFF // Timer counter value. +#define TMR32B0TC_TC_SHIFT 0 + +/* TMR32B0PR, address 0x4001 400C and TMR32B1PR 0x4001 800C */ +#define TMR32B0PR_PR_MASK 0xFFFFFFFF // Prescale value. +#define TMR32B0PR_PR_SHIFT 0 + +/* TMR32B0PC, address 0x4001 4010 and TMR32B1PC 0x4001 8010 */ +#define TMR32B0PC_PC_MASK 0xFFFFFFFF // Prescale counter value. +#define TMR32B0PC_PC_SHIFT 0 + +/* TMR32B0MCR - address 0x4001 4014 and TMR32B1MCR - address 0x4001 8014 */ +#define TMR32B0MCR_MR0I (1 << 0) // Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC. +#define TMR32B0MCR_MR0R (1 << 1) // Reset on MR0: the TC will be reset if MR0 matches it. +#define TMR32B0MCR_MR0S (1 << 2) // Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches 0 the TC. +#define TMR32B0MCR_MR1I (1 << 3) // Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC. +#define TMR32B0MCR_MR1R (1 << 4) // Reset on MR1: the TC will be reset if MR1 matches it. +#define TMR32B0MCR_MR1S (1 << 5) // Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches 0 the TC. +#define TMR32B0MCR_MR2I (1 << 6) // Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC. +#define TMR32B0MCR_MR2R (1 << 7) // Reset on MR2: the TC will be reset if MR2 matches it. +#define TMR32B0MCR_MR2S (1 << 8) // Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches 0 the TC. +#define TMR32B0MCR_MR3I (1 << 9) // Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC. +#define TMR32B0MCR_MR3R (1 << 10) // Reset on MR3: the TC will be reset if MR3 matches it. +#define TMR32B0MCR_MR3S (1 << 11) // Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches 0 the TC. + +/* TMR32B0MR0 to 3, addresses 0x4001 4018 to 24 and TMR32B1MR0 to 3, addresses 0x4001 8018 to 24 */ +#define TMR32B0MRn_MATCH_MASK 0xFFFFFFFF // Timer counter match value. +#define TMR32B0MRn_MATCH_SHIFT 0 + +/* TMR32B0CCR - address 0x4001 4028 and TMR32B1CCR - address 0x4001 8028 */ +#define TMR32B0CCR_CAP0RE (1 << 0) // Capture on CT32Bn_CAP0 rising edge: a sequence of 0 then 1 on CT32Bn_CAP0 will cause CR0 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP0FE (1 << 1) // Capture on CT32Bn_CAP0 falling edge: a sequence of 1 then 0 on CT32Bn_CAP0 will 0 cause CR0 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP0I (1 << 2) // Interrupt on CT32Bn_CAP0 event: a CR0 load due to a CT32Bn_CAP0 event will generate an interrupt. +#define TMR32B0CCR_CAP1RE (1 << 3) // Capture on CT32Bn_CAP1 rising edge: a sequence of 0 then 1 on CT32Bn_CAP1 will cause CR1 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP1FE (1 << 4) // Capture on CT32Bn_CAP1 falling edge: a sequence of 1 then 0 on CT32Bn_CAP1 will 0 cause CR1 to be loaded with the contents of TC. +#define TMR32B0CCR_CAP1I (1 << 5) // Interrupt on CT32Bn_CAP1 event: a CR1 load due to a CT32Bn_CAP1 event will generate an interrupt. + +/* TMR32B0EMR - address 0x4001 403C and TMR32B1EMR - address0x4001 803C */ +#define TMR32B0EMR_EM0 (1 << 0) // External Match 0. This bit reflects the state of output CT32Bn_MAT0, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT32B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM1 (1 << 1) // External Match 1. This bit reflects the state of output CT32Bn_MAT1, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT32B0_MAT1/CT16B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM2 (1 << 2) // External Match 2. This bit reflects the state of output CT32Bn_MAT2, whether or not this 0 output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. This bit is driven to the CT32B0_MAT2/CT16B1_MAT2 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EM3 (1 << 3) // External Match 3. This bit reflects the state of output CT32Bn_MAT3, whether or not this output is connected to its pin. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. This bit is driven to the CT32B0_MAT3/CT16B1_MAT3 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH). +#define TMR32B0EMR_EMC0_MASK 0x0030 // External Match Control 0. Determines the functionality of External Match 0. +#define TMR32B0EMR_EMC0_SHIFT 4 +#define TMR32B0EMR_EMC1_MASK 0x00C0 // External Match Control 1. Determines the functionality of External Match 1. +#define TMR32B0EMR_EMC1_SHIFT 6 +#define TMR32B0EMR_EMC2_MASK 0x0300 // External Match Control 2. Determines the functionality of External Match 2. +#define TMR32B0EMR_EMC2_SHIFT 8 +#define TMR32B0EMR_EMC3_MASK 0x0C00 // External Match Control 3. Determines the functionality of External Match 3. +#define TMR32B0EMR_EMC3_SHIFT 10 + +/* TMR32B0CTCR - address 0x4001 4070 and TMR32B1TCR - address 0x4001 8070 */ +#define TMR32B0CTCR_CTM_MASK 0x0003 // Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). Timer Mode: every rising PCLK edge +#define TMR32B0CTCR_CTM_SHIFT 0 +#define TMR32B0CTCR_CIS_MASK 0x000C // Count Input Select. When bits 1:0 in this register are not 00, these bits select which CAP pin is sampled for clocking: +#define TMR32B0CTCR_CIS_SHIFT 2 +#define TMR32B0CTCR_ENCC (1 << 4) // Setting this bit to one enables clearing of the timer and the prescaler when the capture-edge event specified in bits 7:5 occurs. +#define TMR32B0CTCR_SELCC_MASK 0x00E0 // When bit 4 is one, these bits select which capture input edge 0 will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is zero. +#define TMR32B0CTCR_SELCC_SHIFT 5 + +/* TMR32B0PWMC - 0x4001 4074 and TMR32B1PWMC - 0x4001 8074 */ +#define TMR32B0PWMC_PWMEN0 (1 << 0) // PWM channel 0 enable +#define TMR32B0PWMC_PWMEN1 (1 << 1) // PWM channel 1 enable +#define TMR32B0PWMC_PWMEN2 (1 << 2) // PWM channel 2 enable +#define TMR32B0PWMC_PWMEN3 (1 << 3) // PWM channel 3 enable Note: It is recommended to use match channel 3 to set the PWM cycle. + +/* WDMOD - 0x4000 4000 */ +#define WDMOD_WDEN (1 << 0) // Watchdog enable bit. This bit is Set Only. Remark: Setting this bit to one also locks the watchdog clock source. Once the watchdog timer is enabled, the watchdog timer clock source cannot be changed. If the watchdog timer is needed in Deep-sleep mode, the watchdog clock source must be changed to the watchdog oscillator before setting this bit to one. +#define WDMOD_WDRESET (1 << 1) // Watchdog reset enable bit. This bit is Set Only. +#define WDMOD_WDTOF (1 << 2) // Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT, cleared by software. Causes a chip reset if WDRESET = 1. +#define WDMOD_WDINT (1 << 3) // Watchdog interrupt flag. Set when the timer reaches the value in WDWARNINT. Cleared by software. +#define WDMOD_WDPROTECT (1 << 4) // Watchdog update mode. This bit is Set Only. + +/* WDTC - 0x4000 4004 */ +#define WDTC_COUNT_MASK 0xFFFFFF // Watchdog time-out interval. +#define WDTC_COUNT_SHIFT 0 + +/* WDFEED - 0x4000 4008 */ +#define WDFEED_FEED_MASK 0x00FF // Feed value should be 0xAA followed by 0x55. +#define WDFEED_FEED_SHIFT 0 + +/* WDTV - 0x4000 400C */ +#define WDTV_COUNT_MASK 0xFFFFFF // Counter timer value. +#define WDTV_COUNT_SHIFT 0 + +/* WDWARNINT - 0x4000 4014 */ +#define WDWARNINT_WARNINT_MASK 0x03FF // Watchdog warning interrupt compare value. +#define WDWARNINT_WARNINT_SHIFT 0 + +/* WDWINDOW - 0x4000 4018 */ +#define WDWINDOW_WINDOW_MASK 0xFFFFFF // Watchdog window value. +#define WDWINDOW_WINDOW_SHIFT 0 + +/* WDMOD - address 0x4000 4000 */ +#define WDMOD_WDEN (1 << 0) // WDEN Watchdog enable bit (Set Only). When 1, the watchdog timer is running. Remark: Setting this bit to one also locks the watchdog clock source. Once the watchdog timer is enabled, the watchdog timer clock source cannot be changed. If the watchdog timer is needed in Deep-sleep mode, the watchdog clock source must be changed to the watchdog oscillator before setting this bit to one. The clock source lock feature is not available on all parts, see Section 23.1). +#define WDMOD_WDRESET_WDRESET (1 << 1) // Watchdog reset enable bit (Set Only). When 1, og time-out will cause a chip reset. +#define WDMOD_WDTOF (1 << 2) // WDTOF Watchdog time-out flag. Set when the watchdog +#define WDMOD_WDINT (1 << 3) // WDINT Watchdog interrupt flag (Read Only, not clearable by software). + +/* WDTC - address 0x4000 4004 */ +#define WDTC_COUNT_MASK 0xFFFFFF // Watchdog time-out interval. +#define WDTC_COUNT_SHIFT 0 + +/* WDFEED - address 0x4000 4008 */ +#define WDFEED_FEED_MASK 0x00FF // Feed value should be 0xAA followed by 0x55. +#define WDFEED_FEED_SHIFT 0 + +/* WDTV - address 0x4000 000C */ +#define WDTV_COUNT_MASK 0xFFFFFF // Counter timer value. +#define WDTV_COUNT_SHIFT 0 + +/* SYST_CSR - 0xE000 E010 */ +#define SYST_CSR_ENABLE (1 << 0) // System Tick counter enable. When 1, the counter is enabled. When 0, the counter is disabled. +#define SYST_CSR_TICKINT (1 << 1) // System Tick interrupt enable. When 1, the System Tick interrupt 0 is enabled. When 0, the System Tick interrupt is disabled. When enabled, the interrupt is generated when the System Tick counter counts down to 0. +#define SYST_CSR_CLKSOURCE (1 << 2) // System Tick clock source selection. When 1, the system clock (CPU) clock is selected. When 0, the system clock/2 is selected as the reference clock. +#define SYST_CSR_COUNTFLAG (1 << 16) // Returns 1 if the SysTick timer counted to 0 since the last read of this register. Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. + +/* SYST_RVR - 0xE000 E014 */ +#define SYST_RVR_RELOAD_MASK 0xFFFFFF // This is the value that is loaded into the System Tick counter when it 0 counts down to 0. +#define SYST_RVR_RELOAD_SHIFT 0 + +/* SYST_CVR - 0xE000 E018 */ +#define SYST_CVR_CURRENT_MASK 0xFFFFFF // Reading this register returns the current value of the System Tick counter. Writing any value clears the System Tick counter and the COUNTFLAG bit in STCTRL. +#define SYST_CVR_CURRENT_SHIFT 0 + +/* SYST_CALIB - 0xE000 E01C */ +#define SYST_CALIB_TENMS_MASK 0xFFFFFF // See Table 461. +#define SYST_CALIB_TENMS_SHIFT 0 +#define SYST_CALIB_SKEW (1 << 30) // See Table 461. +#define SYST_CALIB_NOREF (1 << 31) // See Table 461. + +/* AD0CR - address 0x4001 C000 */ +#define AD0CR_SEL_MASK 0x00FF // Selects which of the AD7:0 pins is (are) to be sampled and converted. Bit 0 selects Pin 0x00 AD0, bit 1 selects pin AD1,..., and bit 7 selects pin AD7. In software-controlled mode (BURST = 0), only one channel can be selected, i.e. only one of these bits should be 1. In hardware scan mode (BURST = 1), any numbers of channels can be selected, i.e any or all bits can be set to 1. If all bits are set to 0, channel 0 is selected automatically (SEL = 0x01). +#define AD0CR_SEL_SHIFT 0 +#define AD0CR_CLKDIV_MASK 0xFF00 // The APB clock (PCLK) is divided by CLKDIV +1 to produce the clock for the ADC, which 0 should be less than or equal to 4.5 MHz. Typically, software should program the smallest value in this field that yields a clock of 4.5 MHz or slightly less, but in certain cases (such as a high-impedance analog source) a slower clock may be desirable. +#define AD0CR_CLKDIV_SHIFT 8 +#define AD0CR_BURST (1 << 16) // Burst mode Remark: If BURST is set to 1, the ADGINTEN bit in the AD0INTEN register (Table 365) must be set to 0. +#define AD0CR_CLKS_MASK 0xE0000 // This field selects the number of clocks used for each conversion in Burst mode, and the number of bits of accuracy of the result in the LS bits of ADDR, between 11 clocks (10 bits) and 4 clocks (3 bits). +#define AD0CR_CLKS_SHIFT 17 +#define AD0CR_START_MASK 0x7000000 // When the BURST bit is 0, these bits control whether and when an A/D conversion is started: +#define AD0CR_START_SHIFT 24 +#define AD0CR_EDGE (1 << 27) // This bit is significant only when the START field contains 010-111. In these cases: + +/* AD0GDR - address 0x4001 C004 */ +#define AD0GDR_V_VREF_MASK 0xFFC0 // When DONE is 1, this field contains a binary fraction representing X the voltage on the ADn pin selected by the SEL field, divided by the voltage on the VDD pin. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VSS, while 0x3FF indicates that the voltage on ADn was close to, equal to, or greater than that on VREF. +#define AD0GDR_V_VREF_SHIFT 6 +#define AD0GDR_CHN_MASK 0x7000000 // These bits contain the channel from which the result bits V_VREF X were converted. +#define AD0GDR_CHN_SHIFT 24 +#define AD0GDR_OVERRUN (1 << 30) // This bit is 1 in burst mode if the results of one or more conversions 0 was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits. +#define AD0GDR_DONE (1 << 31) // This bit is set to 1 when an A/D conversion completes. It is cleared 0 when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started. + +/* AD0INTEN - address 0x4001 C00C */ +#define AD0INTEN_ADINTEN_MASK 0x00FF // These bits allow control over which A/D channels generate 0x00 interrupts for conversion completion. When bit 0 is one, completion of a conversion on A/D channel 0 will generate an interrupt, when bit 1 is one, completion of a conversion on A/D channel 1 will generate an interrupt, etc. +#define AD0INTEN_ADINTEN_SHIFT 0 +#define AD0INTEN_ADGINTEN (1 << 8) // When 1, enables the global DONE flag in ADDR to generate an interrupt. When 0, only the individual A/D channels enabled by ADINTEN 7:0 will generate interrupts. Remark: This bit must be set to 0 in burst mode (BURST = 1 in the AD0CR register). Reserved. Unused, always 0. + +/* AD0DR0 to AD0DR7 - addresses 0x4001 C010 to 0x4001 C02C */ +#define AD0DRn_V_VREF_MASK 0xFFC0 // When DONE is 1, this field contains a binary fraction representing the NA voltage on the ADn pin, divided by the voltage on the VREF pin. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREF, while 0x3FF indicates that the voltage on AD input was close to, equal to, or greater than that on VREF. Reserved. +#define AD0DRn_V_VREF_SHIFT 6 +#define AD0DRn_OVERRUN (1 << 30) // This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register. +#define AD0DRn_DONE (1 << 31) // This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read. + +/* AD0STAT - address 0x4001 C030 */ +#define AD0STAT_DONE_MASK 0x00FF // These bits mirror the DONE status flags that appear in the result register for each A/D channel n. +#define AD0STAT_DONE_SHIFT 0 +#define AD0STAT_OVERRUN_MASK 0xFF00 // These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel n. Reading ADSTAT allows checking the status of all A/D channels simultaneously. +#define AD0STAT_OVERRUN_SHIFT 8 +#define AD0STAT_ADINT (1 << 16) // This bit is the A/D interrupt flag. It is one when any of the individual A/D channel Done flags is asserted and enabled to contribute to the A/D interrupt via the ADINTEN register. Reserved. Unused, always 0. + +/* FLASHCFG, address 0x4003 C010 */ +#define FLASHCFG_FLASHTIM_MASK 0x0003 // Flash memory access time. FLASHTIM +1 is equal to the number of system clocks used for flash access. +#define FLASHCFG_FLASHTIM_SHIFT 0 + +/* FMSSTART - 0x4003 C020 */ +#define FMSSTART_START_MASK 0x1FFFF // Signature generation start address (corresponds to AHB byte address bits[20:4]). +#define FMSSTART_START_SHIFT 0 + +/* FMSSTOP - 0x4003 C024 */ +#define FMSSTOP_STOP_MASK 0x1FFFF // BIST stop address divided by 16 (corresponds to AHB byte address [20:4]). +#define FMSSTOP_STOP_SHIFT 0 +#define FMSSTOP_SIG_START (1 << 17) // Start control bit for signature generation. + +/* FMSTAT - 0x4003 CFE0 */ +#define FMSTAT_SIG_DONE (1 << 2) // When 1, a previously started signature generation has 0 completed. See FMSTATCLR register description for clearing this flag. + +/* FMSTATCLR - 0x0x4003 CFE8 */ +#define FMSTATCLR_SIG_DONE_CLR (1 << 2) // Writing a 1 to this bits clears the signature generation completion flag (SIG_DONE) in the FMSTAT register. + + +#endif diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h index 6e00f1e26b..4b9e4353c6 100644 --- a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC11XX_11CXX/cmsis.h @@ -9,5 +9,6 @@ #include "LPC11xx.h" #include "cmsis_nvic.h" +#include "bitfields.h" #endif From 739f2a6375fdfebeb135bbdddbfceccc6c9997ef Mon Sep 17 00:00:00 2001 From: Joris Aerts Date: Tue, 22 Oct 2013 11:02:10 -0700 Subject: [PATCH 070/117] Add can_api hal implementation to LPC11CXX target Most of the functionality works, interrupts might need a little more work. --- .../TARGET_LPC11CXX/can_api.c | 411 ++++++++++++++++++ 1 file changed, 411 insertions(+) create mode 100644 libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c new file mode 100644 index 0000000000..509957e4c3 --- /dev/null +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/TARGET_LPC11CXX/can_api.c @@ -0,0 +1,411 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "can_api.h" + +#include "cmsis.h" +#include "error.h" + +#include +#include + +/* Handy defines */ +#define MSG_OBJ_MAX 32 +#define DLC_MAX 8 + +#define ID_STD_MASK 0x07FF +#define ID_EXT_MASK 0x1FFFFFFF +#define DLC_MASK 0x0F + +static uint32_t can_irq_id = 0; +static can_irq_handler irq_handler; + +static uint32_t can_disable(can_t *obj) { + uint32_t sm = LPC_CAN->CNTL; + LPC_CAN->CNTL |= CANCNTL_INIT; + return sm; +} + +static inline void can_enable(can_t *obj) { + if (LPC_CAN->CNTL & CANCNTL_INIT) { + LPC_CAN->CNTL &= ~CANCNTL_INIT; + } +} + +int can_mode(can_t *obj, CanMode mode) { + return 0; // not implemented +} + +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle) { + uint16_t i; + + // Find first free message object + if(handle == 0) { + uint32_t msgval = LPC_CAN->MSGV1 | (LPC_CAN->MSGV2 << 16); + // Find first free messagebox + for(i = 0; i < 32; i++) { + if((msgval & (1 << i)) == 0) { + handle = i+1; + break; + } + } + } + + if(handle > 0 && handle < 32) { + if(format == CANExtended) { + // Mark message valid, Direction = TX, Extended Frame, Set Identifier and mask everything + LPC_CAN->IF1_ARB1 = BFN_PREP(id, CANIFn_ARB1_ID); + LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | CANIFn_ARB2_XTD | BFN_PREP(id >> 16, CANIFn_ARB2_ID); + LPC_CAN->IF1_MSK1 = BFN_PREP(mask, CANIFn_MSK1_MSK); + LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MXTD | CANIFn_MSK2_MDIR | BFN_PREP(mask >> 16, CANIFn_MSK2_MSK); + } + else { + // Mark message valid, Direction = TX, Set Identifier and mask everything + LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | BFN_PREP(id << 2, CANIFn_ARB2_ID); + LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MDIR | BFN_PREP(mask << 2, CANIFn_MSK2_MSK); + } + + // Use mask, single message object and set DLC + LPC_CAN->IF1_MCTRL = CANIFn_MCTRL_UMASK | CANIFn_MCTRL_EOB | CANIFn_MCTRL_RXIE | BFN_PREP(DLC_MAX, CANIFn_MCTRL_DLC); + + // Transfer all fields to message object + LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL; + + // Start Transfer to given message number + LPC_CAN->IF1_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN); + + // Wait until transfer to message ram complete - TODO: maybe not block?? + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + } + + return handle; +} + +static inline void can_irq() { + irq_handler(can_irq_id, IRQ_RX); +} + +// Register CAN object's irq handler +void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id) { + irq_handler = handler; + can_irq_id = id; +} + +// Unregister CAN object's irq handler +void can_irq_free(can_t *obj) { + LPC_CAN->CNTL &= ~CANCNTL_IE; // Disable Interrupts :) + + can_irq_id = 0; + NVIC_DisableIRQ(CAN_IRQn); +} + +// Clear or set a irq +void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable) { + // Put CAN in Reset Mode and enable interrupt + can_disable(obj); + if(enable == 0) { + LPC_CAN->CNTL &= ~(CANCNTL_IE | CANCNTL_SIE); + } + else { + LPC_CAN->CNTL |= CANCNTL_IE | CANCNTL_SIE; + } + // Take it out of reset... + can_enable(obj); + + // Enable NVIC if at least 1 interrupt is active + NVIC_SetVector(CAN_IRQn, (uint32_t) &can_irq); + NVIC_EnableIRQ(CAN_IRQn); +} + +// This table has the sampling points as close to 75% as possible. The first +// value is TSEG1, the second TSEG2. +static const int timing_pts[23][2] = { + {0x0, 0x0}, // 2, 50% + {0x1, 0x0}, // 3, 67% + {0x2, 0x0}, // 4, 75% + {0x3, 0x0}, // 5, 80% + {0x3, 0x1}, // 6, 67% + {0x4, 0x1}, // 7, 71% + {0x5, 0x1}, // 8, 75% + {0x6, 0x1}, // 9, 78% + {0x6, 0x2}, // 10, 70% + {0x7, 0x2}, // 11, 73% + {0x8, 0x2}, // 12, 75% + {0x9, 0x2}, // 13, 77% + {0x9, 0x3}, // 14, 71% + {0xA, 0x3}, // 15, 73% + {0xB, 0x3}, // 16, 75% + {0xC, 0x3}, // 17, 76% + {0xD, 0x3}, // 18, 78% + {0xD, 0x4}, // 19, 74% + {0xE, 0x4}, // 20, 75% + {0xF, 0x4}, // 21, 76% + {0xF, 0x5}, // 22, 73% + {0xF, 0x6}, // 23, 70% + {0xF, 0x7}, // 24, 67% +}; + +static unsigned int can_speed(unsigned int sclk, unsigned int cclk, unsigned char psjw) { + uint32_t btr; + uint32_t clkdiv = 1; + uint16_t brp = 0; + uint32_t calcbit; + uint32_t bitwidth; + int hit = 0; + int bits = 0; + + bitwidth = sclk / cclk; + + brp = bitwidth / 0x18; + while ((!hit) && (brp < bitwidth / 4)) { + brp++; + for (bits = 22; bits > 0; bits--) { + calcbit = (bits + 3) * (brp + 1); + if (calcbit == bitwidth) { + hit = 1; + break; + } + } + } + + /* This might be funky + while(btr > 63 && clkdiv < 16) { + btr = btr / 2; + clkdiv = clkdiv * 2; + } + */ + clkdiv = clkdiv - 1; + + if (hit) { + btr = BFN_PREP(timing_pts[bits][1], CANBT_TSEG2) + | BFN_PREP(timing_pts[bits][0], CANBT_TSEG1) + | BFN_PREP(psjw, CANBT_SJW) + | BFN_PREP(brp, CANBT_BRP); + btr = btr | (clkdiv << 16); + + } else { + btr = 0; + } + + return btr; +} + + +int can_config_rxmsgobj(can_t *obj) { + uint16_t i = 0; + + // Make sure the interface is available + //while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + + // Mark message valid, Direction = RX, Don't care about anything else + LPC_CAN->IF1_ARB1 = 0; + LPC_CAN->IF1_ARB2 = 0; + LPC_CAN->IF1_MCTRL = 0; + + for ( i = 0; i < MSG_OBJ_MAX; i++ ) + { + // Transfer arb and control fields to message object + LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_TXRQST; + + // Start Transfer to given message number + LPC_CAN->IF1_CMDREQ = BFN_PREP(i, CANIFn_CMDREQ_MN); + + // Wait until transfer to message ram complete - TODO: maybe not block?? + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + } + + // Accept all messages + can_filter(obj, 0, 0, CANStandard, 1); + + return 1; +} + + +void can_init(can_t *obj, PinName rd, PinName td) { + // Enable power and clock + LPC_SYSCON->PRESETCTRL |= PRESETCTRL_CAN_RST_N; + LPC_SYSCON->SYSAHBCLKCTRL |= SYSAHBCLKCTRL_CAN; + + // Enable Initialization mode + if (!(LPC_CAN->CNTL & CANCNTL_INIT)) { + LPC_CAN->CNTL |= CANCNTL_INIT; + } + + can_frequency(obj, 125000); + + // Resume operation + LPC_CAN->CNTL &= ~CANCNTL_INIT; + while ( LPC_CAN->CNTL & CANCNTL_INIT ); + + // Initialize RX message object + can_config_rxmsgobj(obj); +} + +void can_free(can_t *obj) { + LPC_SYSCON->SYSAHBCLKCTRL &= ~(SYSAHBCLKCTRL_CAN); + LPC_SYSCON->PRESETCTRL &= ~(PRESETCTRL_CAN_RST_N); +} + +int can_frequency(can_t *obj, int f) { + int btr = can_speed(SystemCoreClock, (unsigned int)f, 1); + int clkdiv = (btr >> 16) & 0x0F; + btr = btr & 0xFFFF; + + if (btr > 0) { + // Set the bit clock + LPC_CAN->CNTL |= CANCNTL_CCE; + LPC_CAN->CLKDIV = clkdiv; + LPC_CAN->BT = btr; + LPC_CAN->BRPE = 0x0000; + LPC_CAN->CNTL &= ~CANCNTL_CCE; + return 1; + } + return 0; +} + +int can_write(can_t *obj, CAN_Message msg, int cc) { + uint16_t msgnum = 0; + + // Make sure controller is enabled + can_enable(obj); + + // Make sure the interface is available + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY ); + + if(msg.format == CANExtended) { + // Mark message valid, Direction = TX, Extended Frame, Set Identifier and mask everything + LPC_CAN->IF1_ARB1 = BFN_PREP(msg.id, CANIFn_ARB1_ID); + LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | CANIFn_ARB2_XTD | CANIFn_ARB2_DIR | BFN_PREP(msg.id >> 16, CANIFn_ARB2_ID); + LPC_CAN->IF1_MSK1 = BFN_PREP(ID_EXT_MASK, CANIFn_MSK1_MSK); + LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MXTD | CANIFn_MSK2_MDIR | BFN_PREP(ID_EXT_MASK >> 16, CANIFn_MSK2_MSK); + } + else { + // Mark message valid, Direction = TX, Set Identifier and mask everything + LPC_CAN->IF1_ARB2 = CANIFn_ARB2_MSGVAL | CANIFn_ARB2_DIR | BFN_PREP(msg.id << 2, CANIFn_ARB2_ID); + LPC_CAN->IF1_MSK2 = CANIFn_MSK2_MDIR | BFN_PREP(ID_STD_MASK << 2, CANIFn_MSK2_MSK); + } + + // Use mask, request transmission, single message object and set DLC + LPC_CAN->IF1_MCTRL = CANIFn_MCTRL_UMASK | CANIFn_MCTRL_TXRQST | CANIFn_MCTRL_EOB | BFN_PREP(msg.len, CANIFn_MCTRL_DLC); + + LPC_CAN->IF1_DA1 = BFN_PREP(msg.data[1], CANIFn_DA1_DATA1) | BFN_PREP(msg.data[0], CANIFn_DA1_DATA0); + LPC_CAN->IF1_DA2 = BFN_PREP(msg.data[3], CANIFn_DA2_DATA3) | BFN_PREP(msg.data[2], CANIFn_DA2_DATA2); + LPC_CAN->IF1_DB1 = BFN_PREP(msg.data[5], CANIFn_DB1_DATA5) | BFN_PREP(msg.data[4], CANIFn_DB1_DATA4); + LPC_CAN->IF1_DB2 = BFN_PREP(msg.data[7], CANIFn_DB2_DATA7) | BFN_PREP(msg.data[6], CANIFn_DB2_DATA6); + + // Transfer all fields to message object + LPC_CAN->IF1_CMDMSK = CANIFn_CMDMSK_WR | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_TXRQST | CANIFn_CMDMSK_DATA_A | CANIFn_CMDMSK_DATA_B; + + // Start Transfer to given message number + LPC_CAN->IF1_CMDREQ = BFN_PREP(msgnum, CANIFn_CMDREQ_MN); + + // Wait until transfer to message ram complete - TODO: maybe not block?? + while( LPC_CAN->IF1_CMDREQ & CANIFn_CMDREQ_BUSY); + + // Wait until TXOK is set, then clear it - TODO: maybe not block + //while( !(LPC_CAN->STAT & CANSTAT_TXOK) ); + LPC_CAN->STAT &= ~(CANSTAT_TXOK); + + return 1; +} + +int can_read(can_t *obj, CAN_Message *msg, int handle) { + uint16_t i; + + // Make sure controller is enabled + can_enable(obj); + + // Find first message object with new data + if(handle == 0) { + uint32_t newdata = LPC_CAN->ND1 | (LPC_CAN->ND2 << 16); + // Find first free messagebox + for(i = 0; i < 32; i++) { + if(newdata & (1 << i)) { + handle = i+1; + break; + } + } + } + + if(handle > 0 && handle < 32) { + // Wait until message interface is free + while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY ); + + // Transfer all fields to message object + LPC_CAN->IF2_CMDMSK = CANIFn_CMDMSK_RD | CANIFn_CMDMSK_MASK | CANIFn_CMDMSK_ARB | CANIFn_CMDMSK_CTRL | CANIFn_CMDMSK_CLRINTPND | CANIFn_CMDMSK_TXRQST | CANIFn_CMDMSK_DATA_A | CANIFn_CMDMSK_DATA_B; + + // Start Transfer from given message number + LPC_CAN->IF2_CMDREQ = BFN_PREP(handle, CANIFn_CMDREQ_MN); + + // Wait until transfer to message ram complete + while( LPC_CAN->IF2_CMDREQ & CANIFn_CMDREQ_BUSY ); + + if (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_XTD) { + msg->format = CANExtended; + msg->id = (LPC_CAN->IF2_ARB1 & CANIFn_ARB2_ID_MASK) << 16; + msg->id |= (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK); + } + else { + msg->format = CANStandard; + msg->id = (LPC_CAN->IF2_ARB2 & CANIFn_ARB2_ID_MASK) >> 2; + } + + // TODO: Remote frame support + msg->type = CANData; + msg->len = BFN_GET(LPC_CAN->IF2_MCTRL, CANIFn_MCTRL_DLC); // TODO: If > 8, len = 8 + msg->data[0] = BFN_GET(LPC_CAN->IF2_DA1, CANIFn_DA1_DATA0); + msg->data[1] = BFN_GET(LPC_CAN->IF2_DA1, CANIFn_DA1_DATA1); + msg->data[2] = BFN_GET(LPC_CAN->IF2_DA2, CANIFn_DA2_DATA2); + msg->data[3] = BFN_GET(LPC_CAN->IF2_DA2, CANIFn_DA2_DATA3); + msg->data[4] = BFN_GET(LPC_CAN->IF2_DB1, CANIFn_DB1_DATA4); + msg->data[5] = BFN_GET(LPC_CAN->IF2_DB1, CANIFn_DB1_DATA5); + msg->data[6] = BFN_GET(LPC_CAN->IF2_DB2, CANIFn_DB2_DATA6); + msg->data[7] = BFN_GET(LPC_CAN->IF2_DB2, CANIFn_DB2_DATA7); + + LPC_CAN->STAT &= ~(CANSTAT_RXOK); + return 1; + } + + return 0; +} + +void can_reset(can_t *obj) { + LPC_SYSCON->PRESETCTRL &= ~PRESETCTRL_CAN_RST_N; + LPC_CAN->STAT = 0; + + can_config_rxmsgobj(obj); +} + +unsigned char can_rderror(can_t *obj) { + return BFN_GET(LPC_CAN->EC, CANEC_REC); +} + +unsigned char can_tderror(can_t *obj) { + return BFN_GET(LPC_CAN->EC, CANEC_TEC); +} + +void can_monitor(can_t *obj, int silent) { + if (silent) { + LPC_CAN->CNTL |= CANCNTL_TEST; + LPC_CAN->TEST |= CANTEST_SILENT; + } else { + LPC_CAN->CNTL &= ~(CANCNTL_TEST); + LPC_CAN->TEST &= ~CANTEST_SILENT; + } + + if (!(LPC_CAN->CNTL & CANCNTL_INIT)) { + LPC_CAN->CNTL |= CANCNTL_INIT; + } +} From 2404dc0092fa583d899df3d9021a4ddb4510b011 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 23 Oct 2013 15:49:07 +0300 Subject: [PATCH 071/117] Added new serial class, remove interrupt chaining The new RawSerial class is a simple wrapper over the serial HAL that can be safely used from an interrupt handler. Interrupt chaining code was removed from InterruptIn, Serial and Ticker because it caused lots of issues with the RTOS. Interrupt chaining is still possible using the InterruptManager class. --- libraries/mbed/api/InterruptIn.h | 164 +---------------- libraries/mbed/api/RawSerial.h | 80 +++++++++ libraries/mbed/api/Serial.h | 165 +----------------- libraries/mbed/api/SerialBase.h | 120 +++++++++++++ libraries/mbed/api/Ticker.h | 105 +---------- libraries/mbed/common/CallChain.cpp | 8 - libraries/mbed/common/InterruptIn.cpp | 44 +---- libraries/mbed/common/RawSerial.cpp | 36 ++++ libraries/mbed/common/Serial.cpp | 74 +------- libraries/mbed/common/SerialBase.cpp | 86 +++++++++ libraries/mbed/common/Ticker.cpp | 10 +- libraries/mbed/common/Timeout.cpp | 2 +- .../interrupt_chaining/interruptin/main.cpp | 121 ------------- .../interrupt_chaining/{ticker => }/main.cpp | 2 - .../serial_interrupt/main.cpp | 41 ----- workspace_tools/tests.py | 22 +-- 16 files changed, 358 insertions(+), 722 deletions(-) create mode 100644 libraries/mbed/api/RawSerial.h create mode 100644 libraries/mbed/api/SerialBase.h create mode 100644 libraries/mbed/common/RawSerial.cpp create mode 100644 libraries/mbed/common/SerialBase.cpp delete mode 100644 libraries/tests/mbed/interrupt_chaining/interruptin/main.cpp rename libraries/tests/mbed/interrupt_chaining/{ticker => }/main.cpp (96%) delete mode 100644 libraries/tests/mbed/interrupt_chaining/serial_interrupt/main.cpp diff --git a/libraries/mbed/api/InterruptIn.h b/libraries/mbed/api/InterruptIn.h index 830c1dc402..45eb2ffc54 100644 --- a/libraries/mbed/api/InterruptIn.h +++ b/libraries/mbed/api/InterruptIn.h @@ -22,9 +22,7 @@ #include "gpio_api.h" #include "gpio_irq_api.h" - #include "FunctionPointer.h" -#include "CallChain.h" namespace mbed { @@ -73,167 +71,37 @@ public: /** Attach a function to call when a rising edge occurs on the input * * @param fptr A pointer to a void function, or 0 to set as none - * - * @returns - * The function object created for 'fptr' */ - pFunctionPointer_t rise(void (*fptr)(void)); - - /** Add a function to be called when a rising edge occurs at the end of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t rise_add(void (*fptr)(void)) { - return rise_add_common(fptr); - } - - /** Add a function to be called when a rising edge occurs at the beginning of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t rise_add_front(void (*fptr)(void)) { - return rise_add_common(fptr, true); - } + void rise(void (*fptr)(void)); /** Attach a member function to call when a rising edge occurs on the input * * @param tptr pointer to the object to call the member function on * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' */ template - pFunctionPointer_t rise(T* tptr, void (T::*mptr)(void)) { - _rise.clear(); - pFunctionPointer_t pf = _rise.add(tptr, mptr); + void rise(T* tptr, void (T::*mptr)(void)) { + _rise.attach(tptr, mptr); gpio_irq_set(&gpio_irq, IRQ_RISE, 1); - return pf; } - /** Add a function to be called when a rising edge occurs at the end of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t rise_add(T* tptr, void (T::*mptr)(void)) { - return rise_add_common(tptr, mptr); - } - - /** Add a function to be called when a rising edge occurs at the beginning of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t rise_add_front(T* tptr, void (T::*mptr)(void)) { - return rise_add_common(tptr, mptr, true); - } - - /** Remove a function from the list of functions to be called when a rising edge occurs - * - * @param pf the function object to remove - * - * @returns - * true if the function was found and removed, false otherwise - */ - bool rise_remove(pFunctionPointer_t pf); - /** Attach a function to call when a falling edge occurs on the input * * @param fptr A pointer to a void function, or 0 to set as none - * - * @returns - * The function object created for 'fptr' */ - pFunctionPointer_t fall(void (*fptr)(void)); - - /** Add a function to be called when a falling edge occurs at the end of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t fall_add(void (*fptr)(void)) { - return fall_add_common(fptr); - } - - /** Add a function to be called when a falling edge occurs at the beginning of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t fall_add_front(void (*fptr)(void)) { - return fall_add_common(fptr, true); - } + void fall(void (*fptr)(void)); /** Attach a member function to call when a falling edge occurs on the input * * @param tptr pointer to the object to call the member function on * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' */ template - pFunctionPointer_t fall(T* tptr, void (T::*mptr)(void)) { - _fall.clear(); - pFunctionPointer_t pf = _fall.add(tptr, mptr); + void fall(T* tptr, void (T::*mptr)(void)) { + _fall.attach(tptr, mptr); gpio_irq_set(&gpio_irq, IRQ_FALL, 1); - return pf; } - /** Add a function to be called when a falling edge occurs at the end of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t fall_add(T* tptr, void (T::*mptr)(void)) { - return fall_add_common(tptr, mptr); - } - - /** Add a function to be called when a falling edge occurs at the beginning of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t fall_add_front(T* tptr, void (T::*mptr)(void)) { - return fall_add_common(tptr, mptr, true); - } - - /** Remove a function from the list of functions to be called when a falling edge occurs - * - * @param pf the function object to remove - * - * @returns - * true if the function was found and removed, false otherwise - */ - bool fall_remove(pFunctionPointer_t pf); - /** Set the input pin mode * * @param mode PullUp, PullDown, PullNone @@ -251,27 +119,11 @@ public: static void _irq_handler(uint32_t id, gpio_irq_event event); protected: - pFunctionPointer_t rise_add_common(void (*fptr)(void), bool front=false); - pFunctionPointer_t fall_add_common(void (*fptr)(void), bool front=false); - - template - pFunctionPointer_t rise_add_common(T* tptr, void (T::*mptr)(void), bool front=false) { - pFunctionPointer_t pf = front ? _rise.add_front(tptr, mptr) : _rise.add(tptr, mptr); - gpio_irq_set(&gpio_irq, IRQ_RISE, 1); - return pf; - } - template - pFunctionPointer_t fall_add_common(T* tptr, void (T::*mptr)(void), bool front=false) { - pFunctionPointer_t pf = front ? _fall.add_front(tptr, mptr) : _fall.add(tptr, mptr); - gpio_irq_set(&gpio_irq, IRQ_FALL, 1); - return pf; - } - gpio_t gpio; gpio_irq_t gpio_irq; - CallChain _rise; - CallChain _fall; + FunctionPointer _rise; + FunctionPointer _fall; }; } // namespace mbed diff --git a/libraries/mbed/api/RawSerial.h b/libraries/mbed/api/RawSerial.h new file mode 100644 index 0000000000..83c3ecc129 --- /dev/null +++ b/libraries/mbed/api/RawSerial.h @@ -0,0 +1,80 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_RAW_SERIAL_H +#define MBED_RAW_SERIAL_H + +#include "platform.h" + +#if DEVICE_SERIAL + +#include "SerialBase.h" +#include "serial_api.h" + +namespace mbed { + +/** A serial port (UART) for communication with other serial devices + * This is a variation of the Serial class that doesn't use streams, + * thus making it safe to use in interrupt handlers with the RTOS. + * + * Can be used for Full Duplex communication, or Simplex by specifying + * one pin as NC (Not Connected) + * + * Example: + * @code + * // Send a char to the PC + * + * #include "mbed.h" + * + * RawSerial pc(USBTX, USBRX); + * + * int main() { + * pc.putc('A'); + * } + * @endcode + */ +class RawSerial: public SerialBase { + +public: + /** Create a RawSerial port, connected to the specified transmit and receive pins + * + * @param tx Transmit pin + * @param rx Receive pin + * + * @note + * Either tx or rx may be specified as NC if unused + */ + RawSerial(PinName tx, PinName rx); + + /** Write a char to the serial port + * + * @param c The char to write + * + * @returns The written char or -1 if an error occured + */ + int putc(int c); + + /** Read a char from the serial port + * + * @returns The char read from the serial port + */ + int getc(); +}; + +} // namespace mbed + +#endif + +#endif diff --git a/libraries/mbed/api/Serial.h b/libraries/mbed/api/Serial.h index 92785b476f..d9fb6954f7 100644 --- a/libraries/mbed/api/Serial.h +++ b/libraries/mbed/api/Serial.h @@ -21,9 +21,8 @@ #if DEVICE_SERIAL #include "Stream.h" -#include "FunctionPointer.h" +#include "SerialBase.h" #include "serial_api.h" -#include "CallChain.h" namespace mbed { @@ -45,7 +44,7 @@ namespace mbed { * } * @endcode */ -class Serial : public Stream { +class Serial : public SerialBase, public Stream { public: /** Create a Serial port, connected to the specified transmit and receive pins @@ -58,167 +57,9 @@ public: */ Serial(PinName tx, PinName rx, const char *name=NULL); - /** Set the baud rate of the serial port - * - * @param baudrate The baudrate of the serial port (default = 9600). - */ - void baud(int baudrate); - - enum Parity { - None = 0, - Odd, - Even, - Forced1, - Forced0 - }; - - enum IrqType { - RxIrq = 0, - TxIrq - }; - - /** Set the transmission format used by the Serial port - * - * @param bits The number of bits in a word (5-8; default = 8) - * @param parity The parity used (Serial::None, Serial::Odd, Serial::Even, Serial::Forced1, Serial::Forced0; default = Serial::None) - * @param stop The number of stop bits (1 or 2; default = 1) - */ - void format(int bits=8, Parity parity=Serial::None, int stop_bits=1); - - /** Determine if there is a character available to read - * - * @returns - * 1 if there is a character available to read, - * 0 otherwise - */ - int readable(); - - /** Determine if there is space available to write a character - * - * @returns - * 1 if there is space to write a character, - * 0 otherwise - */ - int writeable(); - - /** Attach a function to call whenever a serial interrupt is generated - * - * @param fptr A pointer to a void function, or 0 to set as none - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t attach(void (*fptr)(void), IrqType type=RxIrq); - - /** Add a function to be called when a serial interrupt is generated at the end of the call chain - * - * @param fptr the function to add - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t add_handler(void (*fptr)(void), IrqType type=RxIrq) { - return add_handler_helper(fptr, type); - } - - /** Add a function to be called when a serial interrupt is generated at the beginning of the call chain - * - * @param fptr the function to add - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t add_handler_front(void (*fptr)(void), IrqType type=RxIrq) { - return add_handler_helper(fptr, type, true); - } - - /** Attach a member function to call whenever a serial interrupt is generated - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @param - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t attach(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) { - if((mptr != NULL) && (tptr != NULL)) { - _irq[type].clear(); - pFunctionPointer_t pf = _irq[type].add(tptr, mptr); - serial_irq_set(&_serial, (SerialIrq)type, 1); - return pf; - } - else - return NULL; - } - - /** Add a function to be called when a serial interrupt is generated at the end of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * The function object created for 'fptr' - */ - template - pFunctionPointer_t add_handler(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) { - return add_handler_helper(tptr, mptr, type); - } - - /** Add a function to be called when a serial interrupt is generated at the beginning of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * The function object created for 'fptr' - */ - template - pFunctionPointer_t add_handler_front(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) { - return add_handler_helper(tptr, mptr, type, true); - } - - /** Remove a function from the list of functions to be called when a serial interrupt is generated - * - * @param pf the function object to remove - * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) - * - * @returns - * true if the function was found and removed, false otherwise - */ - bool remove_handler(pFunctionPointer_t pf, IrqType type=RxIrq); - - /** Generate a break condition on the serial line - */ - void send_break(); - - static void _irq_handler(uint32_t id, SerialIrq irq_type); - protected: virtual int _getc(); - virtual int _putc(int c); - pFunctionPointer_t add_handler_helper(void (*function)(void), IrqType type, bool front=false); - - template - pFunctionPointer_t add_handler_helper(T* tptr, void (T::*mptr)(void), IrqType type, bool front=false) { - if ((mptr != NULL) && (tptr != NULL)) { - pFunctionPointer_t pf = front ? _irq[type].add_front(tptr, mptr) : _irq[type].add(tptr, mptr); - serial_irq_set(&_serial, (SerialIrq)type, 1); - return pf; - } - else - return NULL; - } - - serial_t _serial; - CallChain _irq[2]; - int _baud; + virtual int _putc(int c); }; } // namespace mbed diff --git a/libraries/mbed/api/SerialBase.h b/libraries/mbed/api/SerialBase.h new file mode 100644 index 0000000000..77c0d006be --- /dev/null +++ b/libraries/mbed/api/SerialBase.h @@ -0,0 +1,120 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef MBED_SERIALBASE_H +#define MBED_SERIALBASE_H + +#include "platform.h" + +#if DEVICE_SERIAL + +#include "Stream.h" +#include "FunctionPointer.h" +#include "serial_api.h" + +namespace mbed { + +/** A base class for serial port implementations + * Can't be instantiated directly (use Serial or RawSerial) + */ +class SerialBase { + +public: + /** Set the baud rate of the serial port + * + * @param baudrate The baudrate of the serial port (default = 9600). + */ + void baud(int baudrate); + + enum Parity { + None = 0, + Odd, + Even, + Forced1, + Forced0 + }; + + enum IrqType { + RxIrq = 0, + TxIrq + }; + + /** Set the transmission format used by the serial port + * + * @param bits The number of bits in a word (5-8; default = 8) + * @param parity The parity used (SerialBase::None, SerialBase::Odd, SerialBase::Even, SerialBase::Forced1, SerialBase::Forced0; default = SerialBase::None) + * @param stop The number of stop bits (1 or 2; default = 1) + */ + void format(int bits=8, Parity parity=SerialBase::None, int stop_bits=1); + + /** Determine if there is a character available to read + * + * @returns + * 1 if there is a character available to read, + * 0 otherwise + */ + int readable(); + + /** Determine if there is space available to write a character + * + * @returns + * 1 if there is space to write a character, + * 0 otherwise + */ + int writeable(); + + /** Attach a function to call whenever a serial interrupt is generated + * + * @param fptr A pointer to a void function, or 0 to set as none + * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) + */ + void attach(void (*fptr)(void), IrqType type=RxIrq); + + /** Attach a member function to call whenever a serial interrupt is generated + * + * @param tptr pointer to the object to call the member function on + * @param mptr pointer to the member function to be called + * @param type Which serial interrupt to attach the member function to (Seriall::RxIrq for receive, TxIrq for transmit buffer empty) + */ + template + void attach(T* tptr, void (T::*mptr)(void), IrqType type=RxIrq) { + if((mptr != NULL) && (tptr != NULL)) { + _irq[type].attach(tptr, mptr); + serial_irq_set(&_serial, (SerialIrq)type, 1); + } + } + + /** Generate a break condition on the serial line + */ + void send_break(); + + static void _irq_handler(uint32_t id, SerialIrq irq_type); + +protected: + SerialBase(PinName tx, PinName rx); + + int _base_getc(); + int _base_putc(int c); + + serial_t _serial; + FunctionPointer _irq[2]; + int _baud; +}; + +} // namespace mbed + +#endif + +#endif diff --git a/libraries/mbed/api/Ticker.h b/libraries/mbed/api/Ticker.h index 835de930f6..73da8a5fbe 100644 --- a/libraries/mbed/api/Ticker.h +++ b/libraries/mbed/api/Ticker.h @@ -18,7 +18,6 @@ #include "TimerEvent.h" #include "FunctionPointer.h" -#include "CallChain.h" namespace mbed { @@ -63,34 +62,9 @@ public: * * @param fptr pointer to the function to be called * @param t the time between calls in seconds - * - * @returns - * The function object created for 'fptr' */ - pFunctionPointer_t attach(void (*fptr)(void), float t) { - return attach_us(fptr, t * 1000000.0f); - } - - /** Add a function to be called by the Ticker at the end of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t add_function(void (*fptr)(void)) { - return add_function_helper(fptr); - } - - /** Add a function to be called by the Ticker at the beginning of the call chain - * - * @param fptr the function to add - * - * @returns - * The function object created for 'fptr' - */ - pFunctionPointer_t add_function_front(void (*fptr)(void)) { - return add_function_helper(fptr, true); + void attach(void (*fptr)(void), float t) { + attach_us(fptr, t * 1000000.0f); } /** Attach a member function to be called by the Ticker, specifiying the interval in seconds @@ -98,54 +72,20 @@ public: * @param tptr pointer to the object to call the member function on * @param mptr pointer to the member function to be called * @param t the time between calls in seconds - * - * @returns - * The function object created for 'tptr' and 'mptr' */ template - pFunctionPointer_t attach(T* tptr, void (T::*mptr)(void), float t) { - return attach_us(tptr, mptr, t * 1000000.0f); - } - - /** Add a function to be called by the Ticker at the end of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t add_function(T* tptr, void (T::*mptr)(void)) { - return add_function_helper(tptr, mptr); - } - - /** Add a function to be called by the Ticker at the beginning of the call chain - * - * @param tptr pointer to the object to call the member function on - * @param mptr pointer to the member function to be called - * - * @returns - * The function object created for 'tptr' and 'mptr' - */ - template - pFunctionPointer_t add_function_front(T* tptr, void (T::*mptr)(void)) { - return add_function_helper(tptr, mptr, true); + void attach(T* tptr, void (T::*mptr)(void), float t) { + attach_us(tptr, mptr, t * 1000000.0f); } /** Attach a function to be called by the Ticker, specifiying the interval in micro-seconds * * @param fptr pointer to the function to be called * @param t the time between calls in micro-seconds - * - * @returns - * The function object created for 'fptr' */ - pFunctionPointer_t attach_us(void (*fptr)(void), unsigned int t) { - _chain.clear(); - pFunctionPointer_t pf = _chain.add(fptr); + void attach_us(void (*fptr)(void), unsigned int t) { + _function.attach(fptr); setup(t); - return pf; } /** Attach a member function to be called by the Ticker, specifiying the interval in micro-seconds @@ -153,50 +93,23 @@ public: * @param tptr pointer to the object to call the member function on * @param mptr pointer to the member function to be called * @param t the time between calls in micro-seconds - * - * @returns - * The function object created for 'tptr' and 'mptr' */ template - pFunctionPointer_t attach_us(T* tptr, void (T::*mptr)(void), unsigned int t) { - _chain.clear(); - pFunctionPointer_t pf = _chain.add(tptr, mptr); + void attach_us(T* tptr, void (T::*mptr)(void), unsigned int t) { + _function.attach(tptr, mptr); setup(t); - return pf; } /** Detach the function */ void detach(); - /** Remove a function from the Ticker's call chain - * - * @param pf the function object to remove - * - * @returns - * true if the function was found and removed, false otherwise - */ - bool remove_function(pFunctionPointer_t pf) { - bool res = _chain.remove(pf); - if (res && _chain.size() == 0) - detach(); - return res; - } - protected: void setup(unsigned int t); - pFunctionPointer_t add_function_helper(void (*fptr)(void), bool front=false); virtual void handler(); - template - pFunctionPointer_t add_function_helper(T* tptr, void (T::*mptr)(void), bool front=false) { - if (_chain.size() == 0) - return NULL; - return front ? _chain.add_front(tptr, mptr) : _chain.add(tptr, mptr); - } - unsigned int _delay; - CallChain _chain; + FunctionPointer _function; }; } // namespace mbed diff --git a/libraries/mbed/common/CallChain.cpp b/libraries/mbed/common/CallChain.cpp index 76526f1256..d91bdbe8a8 100644 --- a/libraries/mbed/common/CallChain.cpp +++ b/libraries/mbed/common/CallChain.cpp @@ -38,13 +38,11 @@ int CallChain::find(pFunctionPointer_t f) const { } void CallChain::clear() { - __disable_irq(); for(int i = 0; i < _elements; i ++) { delete _chain[i]; _chain[i] = NULL; } _elements = 0; - __enable_irq(); } bool CallChain::remove(pFunctionPointer_t f) { @@ -52,12 +50,10 @@ bool CallChain::remove(pFunctionPointer_t f) { if ((i = find(f)) == -1) return false; - __disable_irq(); if (i != _elements - 1) memmove(_chain + i, _chain + i + 1, (_elements - i - 1) * sizeof(pFunctionPointer_t)); delete f; _elements --; - __enable_irq(); return true; } @@ -69,13 +65,11 @@ void CallChain::call() { void CallChain::_check_size() { if (_elements < _size) return; - __disable_irq(); _size = (_size < 4) ? 4 : _size + 4; pFunctionPointer_t* new_chain = new pFunctionPointer_t[_size](); memcpy(new_chain, _chain, _elements * sizeof(pFunctionPointer_t)); delete _chain; _chain = new_chain; - __enable_irq(); } pFunctionPointer_t CallChain::common_add(pFunctionPointer_t pf) { @@ -87,11 +81,9 @@ pFunctionPointer_t CallChain::common_add(pFunctionPointer_t pf) { pFunctionPointer_t CallChain::common_add_front(pFunctionPointer_t pf) { _check_size(); - __disable_irq(); memmove(_chain + 1, _chain, _elements * sizeof(pFunctionPointer_t)); _chain[0] = pf; _elements ++; - __enable_irq(); return pf; } diff --git a/libraries/mbed/common/InterruptIn.cpp b/libraries/mbed/common/InterruptIn.cpp index 0dc45f41ad..f553a0a020 100644 --- a/libraries/mbed/common/InterruptIn.cpp +++ b/libraries/mbed/common/InterruptIn.cpp @@ -36,58 +36,22 @@ void InterruptIn::mode(PinMode pull) { gpio_mode(&gpio, pull); } -pFunctionPointer_t InterruptIn::rise(void (*fptr)(void)) { - pFunctionPointer_t pf = NULL; - _rise.clear(); +void InterruptIn::rise(void (*fptr)(void)) { if (fptr) { - pf = _rise.add(fptr); + _rise.attach(fptr); gpio_irq_set(&gpio_irq, IRQ_RISE, 1); } else { gpio_irq_set(&gpio_irq, IRQ_RISE, 0); } - return pf; } -pFunctionPointer_t InterruptIn::rise_add_common(void (*fptr)(void), bool front) { - if (NULL == fptr) - return NULL; - pFunctionPointer_t pf = front ? _rise.add_front(fptr) : _rise.add(fptr); - gpio_irq_set(&gpio_irq, IRQ_RISE, 1); - return pf; -} - -bool InterruptIn::rise_remove(pFunctionPointer_t pf) { - bool res = _rise.remove(pf); - if (res && _rise.size() == 0) - gpio_irq_set(&gpio_irq, IRQ_RISE, 0); - return res; -} - -pFunctionPointer_t InterruptIn::fall(void (*fptr)(void)) { - pFunctionPointer_t pf = NULL; - _fall.clear(); +void InterruptIn::fall(void (*fptr)(void)) { if (fptr) { - pf = _fall.add(fptr); + _fall.attach(fptr); gpio_irq_set(&gpio_irq, IRQ_FALL, 1); } else { gpio_irq_set(&gpio_irq, IRQ_FALL, 0); } - return pf; -} - -pFunctionPointer_t InterruptIn::fall_add_common(void (*fptr)(void), bool front) { - if (NULL == fptr) - return NULL; - pFunctionPointer_t pf = front ? _fall.add_front(fptr) : _fall.add(fptr); - gpio_irq_set(&gpio_irq, IRQ_FALL, 1); - return pf; -} - -bool InterruptIn::fall_remove(pFunctionPointer_t pf) { - bool res = _fall.remove(pf); - if (res && _fall.size() == 0) - gpio_irq_set(&gpio_irq, IRQ_FALL, 0); - return res; } void InterruptIn::_irq_handler(uint32_t id, gpio_irq_event event) { diff --git a/libraries/mbed/common/RawSerial.cpp b/libraries/mbed/common/RawSerial.cpp new file mode 100644 index 0000000000..09225d520d --- /dev/null +++ b/libraries/mbed/common/RawSerial.cpp @@ -0,0 +1,36 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "RawSerial.h" +#include "wait_api.h" + +#if DEVICE_SERIAL + +namespace mbed { + +RawSerial::RawSerial(PinName tx, PinName rx) : SerialBase(tx, rx) { +} + +int RawSerial::getc() { + return _base_getc(); +} + +int RawSerial::putc(int c) { + return _base_putc(c); +} + +} // namespace mbed + +#endif diff --git a/libraries/mbed/common/Serial.cpp b/libraries/mbed/common/Serial.cpp index 27f300eaee..602c87a0a7 100644 --- a/libraries/mbed/common/Serial.cpp +++ b/libraries/mbed/common/Serial.cpp @@ -20,83 +20,15 @@ namespace mbed { -Serial::Serial(PinName tx, PinName rx, const char *name) : Stream(name) { - serial_init(&_serial, tx, rx); - _baud = 9600; - serial_irq_handler(&_serial, Serial::_irq_handler, (uint32_t)this); -} - -void Serial::baud(int baudrate) { - serial_baud(&_serial, baudrate); - _baud = baudrate; -} - -void Serial::format(int bits, Parity parity, int stop_bits) { - serial_format(&_serial, bits, (SerialParity)parity, stop_bits); -} - -int Serial::readable() { - return serial_readable(&_serial); -} - - -int Serial::writeable() { - return serial_writable(&_serial); -} - -pFunctionPointer_t Serial::attach(void (*fptr)(void), IrqType type) { - pFunctionPointer_t pf = NULL; - _irq[type].clear(); - if (fptr) { - pf = _irq[type].add(fptr); - serial_irq_set(&_serial, (SerialIrq)type, 1); - } else { - serial_irq_set(&_serial, (SerialIrq)type, 0); - } - return pf; -} - -pFunctionPointer_t Serial::add_handler_helper(void (*fptr)(void), IrqType type, bool front) { - if (NULL == fptr) - return NULL; - pFunctionPointer_t pf = front ? _irq[type].add_front(fptr) : _irq[type].add(fptr); - serial_irq_set(&_serial, (SerialIrq)type, 1); - return pf; -} - -bool Serial::remove_handler(pFunctionPointer_t pf, IrqType type) { - bool res = _irq[type].remove(pf); - if (res && _irq[type].size() == 0) - serial_irq_set(&_serial, (SerialIrq)type, 0); - return res; -} - -void Serial::_irq_handler(uint32_t id, SerialIrq irq_type) { - Serial *handler = (Serial*)id; - handler->_irq[irq_type].call(); +Serial::Serial(PinName tx, PinName rx, const char *name) : SerialBase(tx, rx), Stream(name) { } int Serial::_getc() { - return serial_getc(&_serial); + return _base_getc(); } int Serial::_putc(int c) { - serial_putc(&_serial, c); - return c; -} - -void Serial::send_break() { - // Wait for 1.5 frames before clearing the break condition - // This will have different effects on our platforms, but should - // ensure that we keep the break active for at least one frame. - // We consider a full frame (1 start bit + 8 data bits bits + - // 1 parity bit + 2 stop bits = 12 bits) for computation. - // One bit time (in us) = 1000000/_baud - // Twelve bits: 12000000/baud delay - // 1.5 frames: 18000000/baud delay - serial_break_set(&_serial); - wait_us(18000000/_baud); - serial_break_clear(&_serial); + return _base_putc(c); } } // namespace mbed diff --git a/libraries/mbed/common/SerialBase.cpp b/libraries/mbed/common/SerialBase.cpp new file mode 100644 index 0000000000..9026080a4f --- /dev/null +++ b/libraries/mbed/common/SerialBase.cpp @@ -0,0 +1,86 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "SerialBase.h" +#include "wait_api.h" + +#if DEVICE_SERIAL + +namespace mbed { + +SerialBase::SerialBase(PinName tx, PinName rx) { + serial_init(&_serial, tx, rx); + _baud = 9600; + serial_irq_handler(&_serial, SerialBase::_irq_handler, (uint32_t)this); +} + +void SerialBase::baud(int baudrate) { + serial_baud(&_serial, baudrate); + _baud = baudrate; +} + +void SerialBase::format(int bits, Parity parity, int stop_bits) { + serial_format(&_serial, bits, (SerialParity)parity, stop_bits); +} + +int SerialBase::readable() { + return serial_readable(&_serial); +} + + +int SerialBase::writeable() { + return serial_writable(&_serial); +} + +void SerialBase::attach(void (*fptr)(void), IrqType type) { + if (fptr) { + _irq[type].attach(fptr); + serial_irq_set(&_serial, (SerialIrq)type, 1); + } else { + serial_irq_set(&_serial, (SerialIrq)type, 0); + } +} + +void SerialBase::_irq_handler(uint32_t id, SerialIrq irq_type) { + SerialBase *handler = (SerialBase*)id; + handler->_irq[irq_type].call(); +} + +int SerialBase::_base_getc() { + return serial_getc(&_serial); +} + +int SerialBase::_base_putc(int c) { + serial_putc(&_serial, c); + return c; +} + +void SerialBase::send_break() { + // Wait for 1.5 frames before clearing the break condition + // This will have different effects on our platforms, but should + // ensure that we keep the break active for at least one frame. + // We consider a full frame (1 start bit + 8 data bits bits + + // 1 parity bit + 2 stop bits = 12 bits) for computation. + // One bit time (in us) = 1000000/_baud + // Twelve bits: 12000000/baud delay + // 1.5 frames: 18000000/baud delay + serial_break_set(&_serial); + wait_us(18000000/_baud); + serial_break_clear(&_serial); +} + +} // namespace mbed + +#endif diff --git a/libraries/mbed/common/Ticker.cpp b/libraries/mbed/common/Ticker.cpp index c23b4dbb29..7ae73ef089 100644 --- a/libraries/mbed/common/Ticker.cpp +++ b/libraries/mbed/common/Ticker.cpp @@ -22,7 +22,7 @@ namespace mbed { void Ticker::detach() { remove(); - _chain.clear(); + _function.attach(0); } void Ticker::setup(unsigned int t) { @@ -33,13 +33,7 @@ void Ticker::setup(unsigned int t) { void Ticker::handler() { insert(event.timestamp + _delay); - _chain.call(); -} - -pFunctionPointer_t Ticker::add_function_helper(void (*fptr)(void), bool front) { - if (_chain.size() == 0) - return NULL; - return front ? _chain.add_front(fptr) : _chain.add(fptr); + _function.call(); } } // namespace mbed diff --git a/libraries/mbed/common/Timeout.cpp b/libraries/mbed/common/Timeout.cpp index b71d446db7..ed7950212b 100644 --- a/libraries/mbed/common/Timeout.cpp +++ b/libraries/mbed/common/Timeout.cpp @@ -18,7 +18,7 @@ namespace mbed { void Timeout::handler() { - _chain.call(); + _function.call(); } } // namespace mbed diff --git a/libraries/tests/mbed/interrupt_chaining/interruptin/main.cpp b/libraries/tests/mbed/interrupt_chaining/interruptin/main.cpp deleted file mode 100644 index 65c3b6fdcf..0000000000 --- a/libraries/tests/mbed/interrupt_chaining/interruptin/main.cpp +++ /dev/null @@ -1,121 +0,0 @@ -#include "test_env.h" - -DigitalOut myled(LED1); -DigitalOut led2(LED2); -DigitalOut led3(LED3); - -volatile int checks = 0; -volatile int total = 0; -void in_handler() { - checks++; - led2 = !led2; -} - -#if defined(TARGET_KL25Z) -#define PIN_OUT PTC6 -#define PIN_IN PTA5 - -#elif defined(TARGET_KL05Z) -#define PIN_OUT PTB11 -#define PIN_IN PTB1 - -#elif defined(TARGET_LPC812) -#define PIN_OUT D10 -#define PIN_IN D11 - -#elif defined(TARGET_LPC4088) -#define PIN_IN (p11) -#define PIN_OUT (p12) - -#elif defined(TARGET_LPC1114) -#define PIN_IN (dp1) -#define PIN_OUT (dp2) - -#else -#define PIN_IN (p5) -#define PIN_OUT (p25) - -#endif - -DigitalOut out(PIN_OUT); -InterruptIn in(PIN_IN); - -void flipper() { - for (int i = 0; i < 5; i++) { - out = 1; myled = 1; wait(0.2); - - out = 0; myled = 0; wait(0.2); - } -} - -void flipper2() { - led3 = !led3; -} - -void handler2() { - total++; -} - -int object_cnt = 0; - -class Incrementer { -public: - Incrementer() : _cnt(0) {} - void inc() { _cnt++; } - int get() const { return _cnt; } -private: - int _cnt; -}; - -int main() { - out = 0; myled = 0; - - //Test falling edges first - Incrementer i1; - in.rise(NULL); - in.fall(in_handler); - in.fall_add(handler2); - in.fall_add(flipper2); - in.fall_add_front(&i1, &Incrementer::inc); - flipper(); - - if(checks != 5 || i1.get() != 5) { - printf("falling edges test failed\n"); - notify_completion(false); - } - - //Now test rising edges - Incrementer i2; - in.rise(in_handler); - in.rise_add(handler2); - in.rise_add(&i2, &Incrementer::inc); - in.rise_add_front(flipper2); - in.fall(NULL); - flipper(); - - if (checks != 10 || i2.get() != 5) { - printf("raising edges test failed\n"); - notify_completion(false); - } - - //Finally test both - in.rise(in_handler); - in.rise_add(handler2); - pFunctionPointer_t rise_led = in.rise_add(flipper2); - in.fall(in_handler); - in.fall_add(handler2); - pFunctionPointer_t fall_led = in.fall_add(flipper2); - if (!in.rise_remove(rise_led) || !in.fall_remove(fall_led)) { - printf("remove handler failed\n"); - notify_completion(false); - } - flipper(); - - if (checks != 20) { - printf("Simultaneous rising and falling edges failed! check=%d\n", checks); - notify_completion(false); - } - printf("Total: %d\n", total); - notify_completion(true); - return 0; -} diff --git a/libraries/tests/mbed/interrupt_chaining/ticker/main.cpp b/libraries/tests/mbed/interrupt_chaining/main.cpp similarity index 96% rename from libraries/tests/mbed/interrupt_chaining/ticker/main.cpp rename to libraries/tests/mbed/interrupt_chaining/main.cpp index 3068aed584..65bc3ef699 100644 --- a/libraries/tests/mbed/interrupt_chaining/ticker/main.cpp +++ b/libraries/tests/mbed/interrupt_chaining/main.cpp @@ -84,9 +84,7 @@ int main() { // Test chaining inside Serial class flipper_1.attach(&flip_1, 1.0); // the address of the function to be attached (flip) and the interval (1 second) - flipper_1.add_function_front(&s1, &Sender::send); flipper_2.attach(&flip_2, 2.0); // the address of the function to be attached (flip) and the interval (2 seconds) - flipper_2.add_function(&s2, &Sender::send); // Test global chaining (InterruptManager) printf("Handler initially: %08X\n", initial_handler = NVIC_GetVector(TIMER_IRQ)); diff --git a/libraries/tests/mbed/interrupt_chaining/serial_interrupt/main.cpp b/libraries/tests/mbed/interrupt_chaining/serial_interrupt/main.cpp deleted file mode 100644 index 924f262229..0000000000 --- a/libraries/tests/mbed/interrupt_chaining/serial_interrupt/main.cpp +++ /dev/null @@ -1,41 +0,0 @@ -#include "mbed.h" - -DigitalOut led1(LED1); -DigitalOut led2(LED2); - -Serial computer(USBTX, USBRX); - -// This function is called when a character goes into the TX buffer. -void txCallback() { - led1 = !led1; -} - -// This function is called when a character goes into the RX buffer. -void rxCallback() { - led2 = !led2; - computer.putc(computer.getc()); -} - -class Counter { -public: - Counter(const char* name): _name(name), _cnt(0) {} - void inc() { _cnt++; } - void show() const { printf("%s: %d\n", _name, _cnt); } - int get() const { return _cnt; } - ~Counter() { show(); } -private: - const char *_name; - volatile int _cnt; -}; - -int main() { - printf("start test\n"); - Counter rx("RX bytes"), tx("TX bytes"); - - computer.attach(&txCallback, Serial::TxIrq); - computer.add_handler(&tx, &Counter::inc, Serial::TxIrq); - computer.attach(&rxCallback, Serial::RxIrq); - computer.add_handler_front(&rx, &Counter::inc, Serial::RxIrq); - - while (rx.get() < 40); -} diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py index 92aa5b4039..f649ce4375 100644 --- a/workspace_tools/tests.py +++ b/workspace_tools/tests.py @@ -198,13 +198,7 @@ TESTS = [ "peripherals": ["i2c_loop"] }, { - "id": "MBED_A21", "description": "Interrupt chaining (InterruptIn)", - "source_dir": join(TEST_DIR, "mbed", "interrupt_chaining", "interruptin"), - "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB], - "peripherals": ["digital_loop"] - }, - { - "id": "MBED_A22", "description": "Call function before main (mbed_main)", + "id": "MBED_A21", "description": "Call function before main (mbed_main)", "source_dir": join(TEST_DIR, "mbed", "call_before_main"), "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB], "automated": True, @@ -382,23 +376,18 @@ TESTS = [ "peripherals": ["ADXL345"] }, { - "id": "MBED_28", "description": "Interrupt chaining (serial)", - "source_dir": join(TEST_DIR, "mbed", "interrupt_chaining", "serial_interrupt"), + "id": "MBED_28", "description": "Interrupt chaining (InterruptManager)", + "source_dir": join(TEST_DIR, "mbed", "interrupt_chaining"), "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB], }, { - "id": "MBED_29", "description": "Interrupt chaining (ticker + InterruptManager)", - "source_dir": join(TEST_DIR, "mbed", "interrupt_chaining", "ticker"), - "dependencies": [MBED_LIBRARIES, TEST_MBED_LIB], - }, - { - "id": "MBED_30", "description": "CAN network test", + "id": "MBED_29", "description": "CAN network test", "source_dir": join(TEST_DIR, "mbed", "can"), "dependencies": [MBED_LIBRARIES], "mcu": ["LPC1768", "LPC4088"] }, { - "id": "MBED_31", "description": "CAN network test using interrupts", + "id": "MBED_30", "description": "CAN network test using interrupts", "source_dir": join(TEST_DIR, "mbed", "can_interrupt"), "dependencies": [MBED_LIBRARIES], "mcu": ["LPC1768", "LPC4088"] @@ -690,6 +679,7 @@ GROUPS = { } GROUPS["rtos"] = [test["id"] for test in TESTS if test["id"].startswith("RTOS_")] GROUPS["net"] = [test["id"] for test in TESTS if test["id"].startswith("NET_")] +GROUPS["automated"] = [test["id"] for test in TESTS if test.get("automated", False)] # Look for 'TEST_GROUPS' in private_settings.py and update the GROUPS dictionary # with the information in test_groups if found try: From 6af18d0946f64ed74952e221e6a9f5f6d3c5204b Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 23 Oct 2013 17:27:36 +0300 Subject: [PATCH 072/117] Fix error in 'update_repo' call --- workspace_tools/synch.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/synch.py b/workspace_tools/synch.py index b89bb53b5c..d3936a5048 100644 --- a/workspace_tools/synch.py +++ b/workspace_tools/synch.py @@ -296,7 +296,7 @@ def update_dependencies(repositories): def update_mbed(): - update_repo("mbed", join(BUILD_DIR, "mbed")) + update_repo("mbed", [join(BUILD_DIR, "mbed")]) def do_sync(options): global push_remote, quiet, commit_msg, changed From 5742abe6d9771e0bbfb5477645d7357c7d595702 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Wed, 23 Oct 2013 17:28:05 +0300 Subject: [PATCH 073/117] Added the new RawSerial.h in mbed.h --- libraries/mbed/api/mbed.h | 1 + 1 file changed, 1 insertion(+) diff --git a/libraries/mbed/api/mbed.h b/libraries/mbed/api/mbed.h index bba24a76db..2beef24150 100644 --- a/libraries/mbed/api/mbed.h +++ b/libraries/mbed/api/mbed.h @@ -48,6 +48,7 @@ #include "I2CSlave.h" #include "Ethernet.h" #include "CAN.h" +#include "RawSerial.h" // mbed Internal components #include "Timer.h" From 1de931b04a73351c65090e9a7f6ab1790f0973e0 Mon Sep 17 00:00:00 2001 From: Paris Kasidiaris Date: Thu, 24 Oct 2013 10:17:17 +0100 Subject: [PATCH 074/117] Updated package name --- MANIFEST | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ setup.py | 4 +-- 2 files changed, 95 insertions(+), 2 deletions(-) diff --git a/MANIFEST b/MANIFEST index fd9c09e241..3d917d208a 100644 --- a/MANIFEST +++ b/MANIFEST @@ -1,3 +1,96 @@ # file GENERATED by distutils, do NOT edit LICENSE setup.py +workspace_tools/__init__.py +workspace_tools/__init__.pyc +workspace_tools/autotest.py +workspace_tools/build.py +workspace_tools/build_api.py +workspace_tools/build_release.py +workspace_tools/client.py +workspace_tools/export_test.py +workspace_tools/hooks.py +workspace_tools/libraries.py +workspace_tools/make.py +workspace_tools/options.py +workspace_tools/patch.py +workspace_tools/paths.py +workspace_tools/project.py +workspace_tools/server.py +workspace_tools/settings.py +workspace_tools/size.py +workspace_tools/syms.py +workspace_tools/synch.py +workspace_tools/targets.py +workspace_tools/tests.py +workspace_tools/utils.py +workspace_tools/data/__init__.py +workspace_tools/data/example_test_spec.json +workspace_tools/data/support.py +workspace_tools/data/rpc/RPCClasses.h +workspace_tools/data/rpc/class.cpp +workspace_tools/dev/__init__.py +workspace_tools/dev/dsp_fir.py +workspace_tools/dev/rpc_classes.py +workspace_tools/export/__init__.py +workspace_tools/export/codered.py +workspace_tools/export/codered_lpc1768_cproject.tmpl +workspace_tools/export/codered_lpc1768_project.tmpl +workspace_tools/export/codered_lpc4088_cproject.tmpl +workspace_tools/export/codered_lpc4088_project.tmpl +workspace_tools/export/codesourcery.py +workspace_tools/export/codesourcery_lpc1768.tmpl +workspace_tools/export/ds5_5.py +workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl +workspace_tools/export/ds5_5_lpc11u24.launch.tmpl +workspace_tools/export/ds5_5_lpc11u24.project.tmpl +workspace_tools/export/ds5_5_lpc1768.cproject.tmpl +workspace_tools/export/ds5_5_lpc1768.launch.tmpl +workspace_tools/export/ds5_5_lpc1768.project.tmpl +workspace_tools/export/exporters.py +workspace_tools/export/gcc_arm_lpc1768.tmpl +workspace_tools/export/gccarm.py +workspace_tools/export/iar.ewp.tmpl +workspace_tools/export/iar.eww.tmpl +workspace_tools/export/iar.py +workspace_tools/export/uvision4.py +workspace_tools/export/uvision4_kl25z.uvopt.tmpl +workspace_tools/export/uvision4_kl25z.uvproj.tmpl +workspace_tools/export/uvision4_lpc1114.uvopt.tmpl +workspace_tools/export/uvision4_lpc1114.uvproj.tmpl +workspace_tools/export/uvision4_lpc11c24.uvopt.tmpl +workspace_tools/export/uvision4_lpc11c24.uvproj.tmpl +workspace_tools/export/uvision4_lpc11u24.uvopt.tmpl +workspace_tools/export/uvision4_lpc11u24.uvproj.tmpl +workspace_tools/export/uvision4_lpc1347.uvopt.tmpl +workspace_tools/export/uvision4_lpc1347.uvproj.tmpl +workspace_tools/export/uvision4_lpc1768.uvopt.tmpl +workspace_tools/export/uvision4_lpc1768.uvproj.tmpl +workspace_tools/export/uvision4_lpc4088.uvopt.tmpl +workspace_tools/export/uvision4_lpc4088.uvproj.tmpl +workspace_tools/export/uvision4_lpc812.uvopt.tmpl +workspace_tools/export/uvision4_lpc812.uvproj.tmpl +workspace_tools/host_tests/__init__.py +workspace_tools/host_tests/echo.py +workspace_tools/host_tests/host_test.py +workspace_tools/host_tests/mbedrpc.py +workspace_tools/host_tests/net_test.py +workspace_tools/host_tests/rpc.py +workspace_tools/host_tests/tcpecho_client.py +workspace_tools/host_tests/tcpecho_server.py +workspace_tools/host_tests/tcpecho_server_loop.py +workspace_tools/host_tests/udpecho_client.py +workspace_tools/host_tests/udpecho_server.py +workspace_tools/host_tests/example/BroadcastReceive.py +workspace_tools/host_tests/example/BroadcastSend.py +workspace_tools/host_tests/example/MulticastReceive.py +workspace_tools/host_tests/example/MulticastSend.py +workspace_tools/host_tests/example/TCPEchoClient.py +workspace_tools/host_tests/example/TCPEchoServer.py +workspace_tools/host_tests/example/UDPEchoClient.py +workspace_tools/host_tests/example/UDPEchoServer.py +workspace_tools/host_tests/example/__init__.py +workspace_tools/toolchains/__init__.py +workspace_tools/toolchains/arm.py +workspace_tools/toolchains/gcc.py +workspace_tools/toolchains/iar.py diff --git a/setup.py b/setup.py index 9ecbcfef05..c63fadee2e 100644 --- a/setup.py +++ b/setup.py @@ -12,8 +12,8 @@ DESCRIPTION = """A set of Python scripts that can be used to compile programs wr OWNER_NAMES = 'emilmont, bogdanm' OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com' -setup(name='mbed', - version='0.1.6', +setup(name='mbed-tools', + version='0.1.7', description='Build and test system for mbed', long_description=DESCRIPTION, author=OWNER_NAMES, From 544ac9e7280834eafb2153b0ff2de9fcededdce9 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Fri, 25 Oct 2013 14:50:36 +0300 Subject: [PATCH 075/117] Disable DEVICE_STDIO_MESSAGES for LPC81X Because the LPC81X HAL implementation calls error(), which in turn calls fprintf(), quite a bit of code is added to the image, which is not a good idea on such resource constrained targets. --- .../hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h index ddb923bb83..f8699b5426 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h @@ -48,7 +48,7 @@ #define DEVICE_DEBUG_AWARENESS 0 -#define DEVICE_STDIO_MESSAGES 1 +#define DEVICE_STDIO_MESSAGES 0 #define DEVICE_ERROR_RED 1 From 0ef49057288d5903a975b05f9bb45762c9823ece Mon Sep 17 00:00:00 2001 From: Joe Turner Date: Fri, 25 Oct 2013 13:09:06 +0100 Subject: [PATCH 076/117] Fix relocation of vector on STM32. --- .../targets/cmsis/TARGET_STM/TARGET_STM32F4XX/cmsis_nvic.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/cmsis_nvic.c index 18f98617de..1088accb35 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/cmsis_nvic.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4XX/cmsis_nvic.c @@ -6,20 +6,22 @@ #include "cmsis_nvic.h" #define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Location of vectors in RAM -#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash + +static unsigned char vtor_relocated; void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) { uint32_t *vectors = (uint32_t*)SCB->VTOR; uint32_t i; // Copy and switch to dynamic vectors if the first time called - if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) { + if (!vtor_relocated) { uint32_t *old_vectors = vectors; vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS; for (i=0; iVTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; + vtor_relocated = 1; } vectors[IRQn + 16] = vector; } From 969733ae8f640e6655a7a8889de1defe1f88d762 Mon Sep 17 00:00:00 2001 From: Adam Green Date: Sat, 7 Sep 2013 01:20:52 -0700 Subject: [PATCH 077/117] serial_putc() to make better use of Tx FIFO If don't know if this is an issue that anyone cares about. I am also not sure what the best way to solve it is either. I just thought I would issue a pull request with this commit to bring the issue to light and show a possible solution that I have tested on my mbed-1768 device. Previously the serial_putc() API didn't make any use of the Tx FIFO since the serial_writable() API it utilizes only returns true when the FIFO is completely empty. This is due to the fact that the THRE bit of the UART's LSR (Line Status Register) only goes high when the whole FIFO is empty. I noticed this when doing some performance testing with the network stack. I went from calling printf() to output 3 bytes every 10 seconds (with packet drop stats) to instead output 4 bytes every 10 seconds. I thought these should easily fit in the 16 byte FIFO but outputting one extra byte caused an additional three 550 byte UDP packets to be dropped. This should only happen if the additional character being sent to the UART was taking away extra CPU cycles from the network stack. My solution is to keep track of the number of bytes that have been placed in the Tx FIFO since it was last detected as being completely empty (via the THRE bit). Only once this count hits 16 does the code then block, waiting for the THRE bit to go high. Each time the THRE bit does go high, the count is reset to 0 again and it is incremented for each byte that is loaded into the THR. --- .../targets/hal/TARGET_NXP/TARGET_LPC176X/objects.h | 1 + .../targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c | 10 +++++++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/objects.h index 86736c1ecd..ace5371b46 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/objects.h +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/objects.h @@ -47,6 +47,7 @@ struct pwmout_s { struct serial_s { LPC_UART_TypeDef *uart; int index; + uint8_t count; }; struct analogin_s { diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c index 475af90454..96baef5689 100644 --- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c +++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c @@ -106,6 +106,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) { case UART_2: obj->index = 2; break; case UART_3: obj->index = 3; break; } + obj->count = 0; is_stdio_uart = (uart == STDIO_UART) ? (1) : (0); @@ -283,6 +284,7 @@ int serial_getc(serial_t *obj) { void serial_putc(serial_t *obj, int c) { while (!serial_writable(obj)); obj->uart->THR = c; + obj->count++; } int serial_readable(serial_t *obj) { @@ -290,7 +292,13 @@ int serial_readable(serial_t *obj) { } int serial_writable(serial_t *obj) { - return obj->uart->LSR & 0x20; + int isWritable = 1; + if (obj->uart->LSR & 0x20) + obj->count = 0; + else if (obj->count >= 16) + isWritable = 0; + + return isWritable; } void serial_clear(serial_t *obj) { From b1d88905a91c153400678276cc1d63c837661938 Mon Sep 17 00:00:00 2001 From: pbrier Date: Sat, 26 Oct 2013 17:02:29 +0200 Subject: [PATCH 078/117] fixed can_filter() prototype (prevents build of LPC1768) --- libraries/mbed/hal/can_api.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/mbed/hal/can_api.h b/libraries/mbed/hal/can_api.h index bb90367cff..48bc104695 100644 --- a/libraries/mbed/hal/can_api.h +++ b/libraries/mbed/hal/can_api.h @@ -65,7 +65,7 @@ void can_irq_set (can_t *obj, CanIrqType irq, uint32_t enable); int can_write (can_t *obj, CAN_Message, int cc); int can_read (can_t *obj, CAN_Message *msg, int handle); int can_mode (can_t *obj, CanMode mode); -int can_filter (can_t *obj, unsigned int id, unsigned int mask, CANFormat format, int handle); +int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle); void can_reset (can_t *obj); unsigned char can_rderror (can_t *obj); unsigned char can_tderror (can_t *obj); From ca5a5a4f5fa46689c7f47f61ea295b2b37ef2e1e Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 09:23:39 +0000 Subject: [PATCH 079/117] mbedmicro/mbed#87 Added some travis support, I hope. Only currently supports GCC_ARM and untested so far... --- .travis.yml | 6 ++++++ travis/install_dependencies.sh | 6 ++++++ 2 files changed, 12 insertions(+) create mode 100644 .travis.yml create mode 100644 travis/install_dependencies.sh diff --git a/.travis.yml b/.travis.yml new file mode 100644 index 0000000000..de101b1266 --- /dev/null +++ b/.travis.yml @@ -0,0 +1,6 @@ +--- +install: travis/install_dependencies.sh +python: + - "2.7" +script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" + diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh new file mode 100644 index 0000000000..c7c858a170 --- /dev/null +++ b/travis/install_dependencies.sh @@ -0,0 +1,6 @@ +echo "Installing compilation dependencies." + +# Install GCC-ARM Compiler. +sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded +sudo apt-get update +sudo apt-get install gcc-arm-none-eabi From ea181069b0c2fcf64418b895026de2deb7f38ba6 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 09:27:03 +0000 Subject: [PATCH 080/117] Now using sudo in the travis install commands --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index de101b1266..b860597fc0 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,5 +1,5 @@ --- -install: travis/install_dependencies.sh +install: sudo travis/install_dependencies.sh python: - "2.7" script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" From d5cc572df112f642a6adf565891aaa42ea07c834 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 09:29:07 +0000 Subject: [PATCH 081/117] Added travis image to readme. --- README.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/README.md b/README.md index 595e1855aa..c5ccf4b976 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,8 @@ mbed SDK ======== +[![Build Status](https://travis-ci.org/matthewelse/mbed.png)](https://travis-ci.org/matthewelse/mbed) + The mbed Software Development Kit (SDK) is a C/C++ microcontroller software platform relied upon by tens of thousands of developers to build projects fast. From 56de616b93dfd0d2a757be13f4c73d944a28ae1a Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 09:32:25 +0000 Subject: [PATCH 082/117] Updated travis :D --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index b860597fc0..c2f4042073 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,5 +1,5 @@ --- -install: sudo travis/install_dependencies.sh +install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh" python: - "2.7" script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" From 3da254960fad5b334f48d0554823a208debfab0e Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 09:35:14 +0000 Subject: [PATCH 083/117] Fixed file permissions for install_dependencies.sh --- travis/install_dependencies.sh | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 travis/install_dependencies.sh diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh old mode 100644 new mode 100755 From cb87dbc7428dc5c04a0f481e7b8e974acd1d1dfe Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 18:13:29 +0000 Subject: [PATCH 084/117] I think, I've added support for ARM_CC using wine... --- .travis.yml | 3 +-- travis/install_dependencies.sh | 28 +++++++++++++++++++++++++++- 2 files changed, 28 insertions(+), 3 deletions(-) diff --git a/.travis.yml b/.travis.yml index c2f4042073..9a32bf0ffb 100644 --- a/.travis.yml +++ b/.travis.yml @@ -2,5 +2,4 @@ install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh" python: - "2.7" -script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" - +script: "python workspace_tools/build.py -r -e -U -u -d -b -t ARM_CC;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index c7c858a170..5a606f7bfc 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -2,5 +2,31 @@ echo "Installing compilation dependencies." # Install GCC-ARM Compiler. sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded +sudo add-apt-repository -y ppa:ubuntu-wine/ppa + sudo apt-get update -sudo apt-get install gcc-arm-none-eabi +sudo apt-get install -y gcc-arm-none-eabi +sudo apt-get install -y wine1.5 + +# Download ARMCC (Testing Purposes only at the moment) +wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz +tar xvfz ARMCC.tar.gz + +# Setup ARMCC environment variables + +printf "#%s/bin/bash\nwine armcc.exe" ! > ARMCC/bin/armcc +chmod a+x ARMCC/bin/armcc + +printf "#%s/bin/bash\nwine armar.exe" ! > ARMCC/bin/armar +chmod a+x ARMCC/bin/armar + +printf "#%s/bin/bash\nwine armasm.exe" ! > ARMCC/bin/armasm +chmod a+x ARMCC/bin/armasm + +printf "#%s/bin/bash\nwine armlink.exe" ! > ARMCC/bin/armlink +chmod a+x ARMCC/bin/armlink + +printf "#%s/bin/bash\nwine fromelf.exe" ! > ARMCC/bin/fromelf +chmod a+x ARMCC/bin/fromelf + +PATH = "$PATH:$TRAVIS_BUILD_DIR/ARMCC/bin" From 0a9019bd324f711e5a25607d75c5b884215886d8 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 18:20:32 +0000 Subject: [PATCH 085/117] Fixed install_dependencies.sh --- travis/install_dependencies.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index 5a606f7bfc..1a97049bdb 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -29,4 +29,4 @@ chmod a+x ARMCC/bin/armlink printf "#%s/bin/bash\nwine fromelf.exe" ! > ARMCC/bin/fromelf chmod a+x ARMCC/bin/fromelf -PATH = "$PATH:$TRAVIS_BUILD_DIR/ARMCC/bin" +export PATH = $PATH:$TRAVIS_BUILD_DIR"/ARMCC/bin" From 8786cbf17addef35728359268400a9650301f958 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Mon, 28 Oct 2013 18:35:10 +0000 Subject: [PATCH 086/117] Hopefully fixed install_dependencies.sh --- travis/install_dependencies.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index 1a97049bdb..710fcb1dd5 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -29,4 +29,4 @@ chmod a+x ARMCC/bin/armlink printf "#%s/bin/bash\nwine fromelf.exe" ! > ARMCC/bin/fromelf chmod a+x ARMCC/bin/fromelf -export PATH = $PATH:$TRAVIS_BUILD_DIR"/ARMCC/bin" +export PATH=$PATH:$TRAVIS_BUILD_DIR"/ARMCC/bin" From 43eeaa338f07ad1d861a33c2f6f6e36d16abda10 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Tue, 29 Oct 2013 10:35:15 +0000 Subject: [PATCH 087/117] Fix DS5 11U24 exporter --- workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl b/workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl index 17714e3789..32adc51b8d 100644 --- a/workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl +++ b/workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl @@ -13,7 +13,7 @@ - + From 1054f86806753c65474f91c075ea13b1c4906319 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 29 Oct 2013 12:02:03 +0000 Subject: [PATCH 088/117] Added support for microlib compilation. --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 9a32bf0ffb..4a6938e1aa 100644 --- a/.travis.yml +++ b/.travis.yml @@ -2,4 +2,4 @@ install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh" python: - "2.7" -script: "python workspace_tools/build.py -r -e -U -u -d -b -t ARM_CC;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" +script: "python workspace_tools/build.py -r -e -U -u -d -b -t uARM;python workspace_tools/build.py -r -e -U -u -d -b -t ARM;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" From 9ef1fdec455a3636640813ab753ac05b4ae94894 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 29 Oct 2013 12:07:21 +0000 Subject: [PATCH 089/117] Update .travis.yml --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index 4a6938e1aa..87cf37c331 100644 --- a/.travis.yml +++ b/.travis.yml @@ -2,4 +2,4 @@ install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh" python: - "2.7" -script: "python workspace_tools/build.py -r -e -U -u -d -b -t uARM;python workspace_tools/build.py -r -e -U -u -d -b -t ARM;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" +script: "python workspace_tools/build.py -r -e -U -u -d -b -t ARM_MICRO;python workspace_tools/build.py -r -e -U -u -d -b -t ARM_CC;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" From 73d8eb426c8b414f5121504753e7e15445637df4 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 29 Oct 2013 12:19:09 +0000 Subject: [PATCH 090/117] Redirected some commands in Travis setup to go to /dev/null Now, we don't get all of the verbose output from the tar command, etc. --- travis/install_dependencies.sh | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index 710fcb1dd5..82f7ffa488 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -1,19 +1,28 @@ echo "Installing compilation dependencies." # Install GCC-ARM Compiler. -sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded -sudo add-apt-repository -y ppa:ubuntu-wine/ppa -sudo apt-get update -sudo apt-get install -y gcc-arm-none-eabi -sudo apt-get install -y wine1.5 +echo "Adding apt repositories." +sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded > /dev/null +sudo add-apt-repository -y ppa:ubuntu-wine/ppa > /dev/null + +echo "Installing gcc_arm software" +sudo apt-get update > /dev/null +sudo apt-get install -y gcc-arm-none-eabi > /dev/null + +echo "Setting up Wine." +sudo apt-get install -y wine1.5 > /dev/null + # Download ARMCC (Testing Purposes only at the moment) -wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz -tar xvfz ARMCC.tar.gz + +echo "Installing ARMCC" +wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz > /dev/null +tar xvfz ARMCC.tar.gz > /dev/null # Setup ARMCC environment variables +echo "Setting up Environment Variables" printf "#%s/bin/bash\nwine armcc.exe" ! > ARMCC/bin/armcc chmod a+x ARMCC/bin/armcc From 908c0da4714906e0ac4a98b40c899b1170ead4c2 Mon Sep 17 00:00:00 2001 From: Matthew Else Date: Tue, 29 Oct 2013 12:29:57 +0000 Subject: [PATCH 091/117] (Hopefully) got rid of all of the setup output --- .travis.yml | 2 +- travis/install_dependencies.sh | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/.travis.yml b/.travis.yml index 87cf37c331..44ff52f03a 100644 --- a/.travis.yml +++ b/.travis.yml @@ -1,5 +1,5 @@ --- -install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh" +install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null" python: - "2.7" script: "python workspace_tools/build.py -r -e -U -u -d -b -t ARM_MICRO;python workspace_tools/build.py -r -e -U -u -d -b -t ARM_CC;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index 82f7ffa488..c685fc3d2d 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -3,22 +3,22 @@ echo "Installing compilation dependencies." # Install GCC-ARM Compiler. echo "Adding apt repositories." -sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded > /dev/null -sudo add-apt-repository -y ppa:ubuntu-wine/ppa > /dev/null +sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded +sudo add-apt-repository -y ppa:ubuntu-wine/ppa echo "Installing gcc_arm software" -sudo apt-get update > /dev/null -sudo apt-get install -y gcc-arm-none-eabi > /dev/null +sudo apt-get update +sudo apt-get install -y gcc-arm-none-eabi echo "Setting up Wine." -sudo apt-get install -y wine1.5 > /dev/null +sudo apt-get install -y wine1.5 # Download ARMCC (Testing Purposes only at the moment) echo "Installing ARMCC" -wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz > /dev/null -tar xvfz ARMCC.tar.gz > /dev/null +wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz +tar xvfz ARMCC.tar.gz # Setup ARMCC environment variables From 692cbd11f6309afabc67d4e33f8ca190744e3d8a Mon Sep 17 00:00:00 2001 From: Adam Green Date: Mon, 7 Oct 2013 22:42:27 -0700 Subject: [PATCH 092/117] lwip: Fix invalid checksum bug tcp_write() would incorrectly byte swap the checksum 1 too many times when concatenating a pbuf to an existing TCP segment if the number of bytes in the concatenated data was odd. I hit this issue when I tried to reproduce a lost segment issue reported by a mbed user in this forum thread: http://mbed.org/forum/mbed/topic/4354/?page=2#comment-22657 --- libraries/net/lwip/lwip/core/tcp_out.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/libraries/net/lwip/lwip/core/tcp_out.c b/libraries/net/lwip/lwip/core/tcp_out.c index 86e0919531..0cc48b1cdb 100644 --- a/libraries/net/lwip/lwip/core/tcp_out.c +++ b/libraries/net/lwip/lwip/core/tcp_out.c @@ -646,6 +646,9 @@ tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags) last_unsent->len += concat_p->tot_len; #if TCP_CHECKSUM_ON_COPY if (concat_chksummed) { + if (concat_chksum_swapped) { + concat_chksum = SWAP_BYTES_IN_WORD(concat_chksum); + } tcp_seg_add_chksum(concat_chksum, concat_chksummed, &last_unsent->chksum, &last_unsent->chksum_swapped); last_unsent->flags |= TF_SEG_DATA_CHECKSUMMED; From 64620e2e789dd37a60d652f1208e3087955571bf Mon Sep 17 00:00:00 2001 From: Adam Green Date: Sat, 26 Oct 2013 18:26:09 -0700 Subject: [PATCH 093/117] lwip: Stop dropping long TCP segments If lwIP placed more than 2 pbufs in a TCP segment, the ethernet driver would fail to send it as it didn't have enough Tx descriptors. The maximum number of pbufs outstanding for transmit that lwIP keeps is defined by the TCP_SND_QUEUELEN macro. I modifed the value of LPC_NUM_BUFF_TXDESCS to take advantage of this lwIP value. The +1 takes into account that LPC_EMAC->TxProduceIndex == LPC->TxConsumeIndex is reserved for indicating that the queue is empty so a full queue uses one less than the maximum count. --- libraries/net/eth/lwip-eth/arch/lpc_emac_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/net/eth/lwip-eth/arch/lpc_emac_config.h b/libraries/net/eth/lwip-eth/arch/lpc_emac_config.h index 048f08b8a9..831b3d76d0 100644 --- a/libraries/net/eth/lwip-eth/arch/lpc_emac_config.h +++ b/libraries/net/eth/lwip-eth/arch/lpc_emac_config.h @@ -86,7 +86,7 @@ extern "C" /** \brief Defines the number of descriptors used for TX. Must * be a minimum value of 2. */ -#define LPC_NUM_BUFF_TXDESCS 3 +#define LPC_NUM_BUFF_TXDESCS (TCP_SND_QUEUELEN + 1) /** \brief Set this define to 1 to enable bounce buffers for transmit pbufs * that cannot be sent via the zero-copy method. Some chained pbufs From 83d4facb0efa8c8c05014f0d34cadaefa262477d Mon Sep 17 00:00:00 2001 From: Andreas Rebert Date: Thu, 31 Oct 2013 13:25:58 +0100 Subject: [PATCH 094/117] Added support for GCC_ARM --- workspace_tools/export/gccarm.py | 2 +- workspace_tools/targets.py | 2 +- workspace_tools/toolchains/gcc.py | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py index 8718e3a45c..daca507a8c 100644 --- a/workspace_tools/export/gccarm.py +++ b/workspace_tools/export/gccarm.py @@ -21,7 +21,7 @@ from os.path import splitext, basename class GccArm(Exporter): NAME = 'GccArm' TOOLCHAIN = 'GCC_ARM' - TARGETS = ['LPC1768'] + TARGETS = ['LPC1768', 'LPC4088'] DOT_IN_RELATIVE_PATH = True def generate(self): diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py index 6e2f33d78e..33669de513 100644 --- a/workspace_tools/targets.py +++ b/workspace_tools/targets.py @@ -167,7 +167,7 @@ class LPC4088(Target): self.extra_labels = ['NXP', 'LPC408X'] - self.supported_toolchains = ["ARM", "GCC_CR"] + self.supported_toolchains = ["ARM", "GCC_CR", "GCC_ARM"] # Use this target to generate the custom binary image for LPC4088 EA boards class LPC4088_EA(LPC4088): diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py index b74c1bd638..9644648039 100644 --- a/workspace_tools/toolchains/gcc.py +++ b/workspace_tools/toolchains/gcc.py @@ -167,7 +167,7 @@ class GCC_ARM(GCC): # Use latest gcc nanolib self.ld.append("--specs=nano.specs") - if target.name in ["LPC1768"]: + if target.name in ["LPC1768", "LPC4088"]: self.ld.extend(["-u", "_printf_float", "-u", "_scanf_float"]) self.sys_libs.append("nosys") From 09cf4ef12886d26cb761e40108bdf8d278e841ff Mon Sep 17 00:00:00 2001 From: Andreas Rebert Date: Thu, 31 Oct 2013 13:28:05 +0100 Subject: [PATCH 095/117] Support for exporting to GCC_ARM --- .../TOOLCHAIN_GCC_ARM/LPC4088.ld | 172 +++++++++++++ .../TOOLCHAIN_GCC_ARM/startup_LPC408x.s | 231 ++++++++++++++++++ workspace_tools/export/gcc_arm_lpc4088.tmpl | 46 ++++ 3 files changed, 449 insertions(+) create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld create mode 100644 libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.s create mode 100644 workspace_tools/export/gcc_arm_lpc4088.tmpl diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld new file mode 100644 index 0000000000..364154d143 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/LPC4088.ld @@ -0,0 +1,172 @@ +/* Linker script for mbed LPC1768 */ + +/* Linker script to configure memory regions. */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K + RAM (rwx) : ORIGIN = 0x100000E8, LENGTH = (32K - 0xE8) + + USB_RAM(rwx) : ORIGIN = 0x20000000, LENGTH = 16K + ETH_RAM(rwx) : ORIGIN = 0x20004000, LENGTH = 16K +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.isr_vector)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + Image$$RW_IRAM1$$Base = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE (__fini_array_end = .); + + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + + .bss : + { + __bss_start__ = .; + *(.bss*) + *(COMMON) + __bss_end__ = .; + Image$$RW_IRAM1$$ZI$$Limit = . ; + } > RAM + + + .heap : + { + __end__ = .; + end = __end__; + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy : + { + *(.stack) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + + /* Code can explicitly ask for data to be + placed in these higher RAM banks where + they will be left uninitialized. + */ + .AHBSRAM0 (NOLOAD): + { + Image$$RW_IRAM2$$Base = . ; + *(AHBSRAM0) + Image$$RW_IRAM2$$ZI$$Limit = .; + } > USB_RAM + + .AHBSRAM1 (NOLOAD): + { + Image$$RW_IRAM3$$Base = . ; + *(AHBSRAM1) + Image$$RW_IRAM3$$ZI$$Limit = .; + } > ETH_RAM +} diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.s b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.s new file mode 100644 index 0000000000..83a7583570 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_GCC_ARM/startup_LPC408x.s @@ -0,0 +1,231 @@ +/* File: startup_ARMCM3.s + * Purpose: startup file for Cortex-M3/M4 devices. Should use with + * GNU Tools for ARM Embedded Processors + * Version: V1.1 + * Date: 17 June 2011 + * + * Copyright (C) 2011 ARM Limited. All rights reserved. + * ARM Limited (ARM) is supplying this software for use with Cortex-M3/M4 + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + */ + .syntax unified + .arch armv7-m + +/* Memory Model + The HEAP starts at the end of the DATA section and grows upward. + + The STACK starts at the end of the RAM and grows downward. + + The HEAP and stack STACK are only checked at compile time: + (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE + + This is just a check for the bare minimum for the Heap+Stack area before + aborting compilation, it is not the run time limit: + Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100 + */ + .section .stack + .align 3 +#ifdef __STACK_SIZE + .equ Stack_Size, __STACK_SIZE +#else + .equ Stack_Size, 0xc00 +#endif + .globl __StackTop + .globl __StackLimit +__StackLimit: + .space Stack_Size + .size __StackLimit, . - __StackLimit +__StackTop: + .size __StackTop, . - __StackTop + + .section .heap + .align 3 +#ifdef __HEAP_SIZE + .equ Heap_Size, __HEAP_SIZE +#else + .equ Heap_Size, 0x800 +#endif + .globl __HeapBase + .globl __HeapLimit +__HeapBase: + .space Heap_Size + .size __HeapBase, . - __HeapBase +__HeapLimit: + .size __HeapLimit, . - __HeapLimit + + .section .isr_vector + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler */ + .long HardFault_Handler /* Hard Fault Handler */ + .long MemManage_Handler /* MPU Fault Handler */ + .long BusFault_Handler /* Bus Fault Handler */ + .long UsageFault_Handler /* Usage Fault Handler */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long 0 /* Reserved */ + .long SVC_Handler /* SVCall Handler */ + .long DebugMon_Handler /* Debug Monitor Handler */ + .long 0 /* Reserved */ + .long PendSV_Handler /* PendSV Handler */ + .long SysTick_Handler /* SysTick Handler */ + + /* External interrupts */ + .long WDT_IRQHandler /* 16: Watchdog Timer */ + .long TIMER0_IRQHandler /* 17: Timer0 */ + .long TIMER1_IRQHandler /* 18: Timer1 */ + .long TIMER2_IRQHandler /* 19: Timer2 */ + .long TIMER3_IRQHandler /* 20: Timer3 */ + .long UART0_IRQHandler /* 21: UART0 */ + .long UART1_IRQHandler /* 22: UART1 */ + .long UART2_IRQHandler /* 23: UART2 */ + .long UART3_IRQHandler /* 24: UART3 */ + .long PWM1_IRQHandler /* 25: PWM1 */ + .long I2C0_IRQHandler /* 26: I2C0 */ + .long I2C1_IRQHandler /* 27: I2C1 */ + .long I2C2_IRQHandler /* 28: I2C2 */ + .long 0 /* 29: Reserved */ + .long SSP0_IRQHandler /* 30: SSP0 */ + .long SSP1_IRQHandler /* 31: SSP1 */ + .long PLL0_IRQHandler /* 32: PLL0 Lock (Main PLL) */ + .long RTC_IRQHandler /* 33: Real Time Clock */ + .long EINT0_IRQHandler /* 34: External Interrupt 0 */ + .long EINT1_IRQHandler /* 35: External Interrupt 1 */ + .long EINT2_IRQHandler /* 36: External Interrupt 2 */ + .long EINT3_IRQHandler /* 37: External Interrupt 3 */ + .long ADC_IRQHandler /* 38: A/D Converter */ + .long BOD_IRQHandler /* 39: Brown-Out Detect */ + .long USB_IRQHandler /* 40: USB */ + .long CAN_IRQHandler /* 41: CAN */ + .long DMA_IRQHandler /* 42: General Purpose DMA */ + .long I2S_IRQHandler /* 43: I2S */ + .long ENET_IRQHandler /* 44: Ethernet */ + .long MCI_IRQHandler /* 45: SD/MMC carf I/F */ + .long MCPWM_IRQHandler /* 46: Motor Control PWM */ + .long QEI_IRQHandler /* 47: Quadrature Encoder Interface */ + .long PLL1_IRQHandler /* 48: PLL1 Lock (USB PLL) */ + .long USBActivity_IRQHandler /* 49: USB Activity */ + .long CANActivity_IRQHandler /* 50: CAN Activity */ + .long UART4_IRQHandler /* 51: UART4 */ + .long SSP2_IRQHandler /* 52: SSP2 */ + .long LCD_IRQHandler /* 53: LCD */ + .long GPIO_IRQHandler /* 54: GPIO */ + .long PWM0_IRQHandler /* 55: PWM0 */ + .long EEPROM_IRQHandler /* 56: EEPROM */ + + .size __isr_vector, . - __isr_vector + + .text + .thumb + .thumb_func + .align 2 + .globl Reset_Handler + .type Reset_Handler, %function +Reset_Handler: +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * _etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + +.flash_to_ram_loop: + cmp r2, r3 + ittt lt + ldrlt r0, [r1], #4 + strlt r0, [r2], #4 + blt .flash_to_ram_loop + + ldr r0, =SystemInit + blx r0 + ldr r0, =_start + bx r0 + .pool + .size Reset_Handler, . - Reset_Handler + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_default_handler handler_name + .align 1 + .thumb_func + .weak \handler_name + .type \handler_name, %function +\handler_name : + b . + .size \handler_name, . - \handler_name + .endm + + def_default_handler NMI_Handler + def_default_handler HardFault_Handler + def_default_handler MemManage_Handler + def_default_handler BusFault_Handler + def_default_handler UsageFault_Handler + def_default_handler SVC_Handler + def_default_handler DebugMon_Handler + def_default_handler PendSV_Handler + def_default_handler SysTick_Handler + def_default_handler Default_Handler + + def_default_handler WDT_IRQHandler + def_default_handler TIMER0_IRQHandler + def_default_handler TIMER1_IRQHandler + def_default_handler TIMER2_IRQHandler + def_default_handler TIMER3_IRQHandler + def_default_handler UART0_IRQHandler + def_default_handler UART1_IRQHandler + def_default_handler UART2_IRQHandler + def_default_handler UART3_IRQHandler + def_default_handler PWM1_IRQHandler + def_default_handler I2C0_IRQHandler + def_default_handler I2C1_IRQHandler + def_default_handler I2C2_IRQHandler +/* def_default_handler SPI_IRQHandler */ + def_default_handler SSP0_IRQHandler + def_default_handler SSP1_IRQHandler + def_default_handler PLL0_IRQHandler + def_default_handler RTC_IRQHandler + def_default_handler EINT0_IRQHandler + def_default_handler EINT1_IRQHandler + def_default_handler EINT2_IRQHandler + def_default_handler EINT3_IRQHandler + def_default_handler ADC_IRQHandler + def_default_handler BOD_IRQHandler + def_default_handler USB_IRQHandler + def_default_handler CAN_IRQHandler + def_default_handler DMA_IRQHandler + def_default_handler I2S_IRQHandler + def_default_handler ENET_IRQHandler + def_default_handler MCI_IRQHandler + def_default_handler MCPWM_IRQHandler + def_default_handler QEI_IRQHandler + def_default_handler PLL1_IRQHandler + def_default_handler USBActivity_IRQHandler + def_default_handler CANActivity_IRQHandler + def_default_handler UART4_IRQHandler + def_default_handler SSP2_IRQHandler + def_default_handler LCD_IRQHandler + def_default_handler GPIO_IRQHandler + def_default_handler PWM0_IRQHandler + def_default_handler EEPROM_IRQHandler + + .weak DEF_IRQHandler + .set DEF_IRQHandler, Default_Handler + + .end + diff --git a/workspace_tools/export/gcc_arm_lpc4088.tmpl b/workspace_tools/export/gcc_arm_lpc4088.tmpl new file mode 100644 index 0000000000..4f40755f51 --- /dev/null +++ b/workspace_tools/export/gcc_arm_lpc4088.tmpl @@ -0,0 +1,46 @@ +# This file was automagically generated by mbed.org. For more information, +# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded + +GCC_BIN = +PROJECT = {{name}} +OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %} +SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %} +INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %} +LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %} +LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %} +LINKER_SCRIPT = {{linker_script}} + +############################################################################### +AS = $(GCC_BIN)arm-none-eabi-as +CC = $(GCC_BIN)arm-none-eabi-gcc +CPP = $(GCC_BIN)arm-none-eabi-g++ +LD = $(GCC_BIN)arm-none-eabi-gcc +OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy + +CPU = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=softfp +CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections +CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} + +LD_FLAGS = -mcpu=cortex-m4 -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float +LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys + +all: $(PROJECT).bin + +clean: + rm -f $(PROJECT).bin $(PROJECT).elf $(OBJECTS) + +.s.o: + $(AS) $(CPU) -o $@ $< + +.c.o: + $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< + +.cpp.o: + $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $< + + +$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) + $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) + +$(PROJECT).bin: $(PROJECT).elf + $(OBJCOPY) -O binary $< $@ From 8ae57ce8dbdc98ab96767913af9919ccc9ecd6b9 Mon Sep 17 00:00:00 2001 From: 0xc0170 Date: Thu, 31 Oct 2013 16:00:50 -0400 Subject: [PATCH 096/117] KL25Z GCC_ARM export --- workspace_tools/export/gcc_arm_kl25z.tmpl | 46 +++++++++++++++++++++++ workspace_tools/export/gccarm.py | 2 +- 2 files changed, 47 insertions(+), 1 deletion(-) create mode 100644 workspace_tools/export/gcc_arm_kl25z.tmpl diff --git a/workspace_tools/export/gcc_arm_kl25z.tmpl b/workspace_tools/export/gcc_arm_kl25z.tmpl new file mode 100644 index 0000000000..f4dd633871 --- /dev/null +++ b/workspace_tools/export/gcc_arm_kl25z.tmpl @@ -0,0 +1,46 @@ +# This file was automagically generated by mbed.org. For more information, +# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded + +GCC_BIN = +PROJECT = {{name}} +OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %} +SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %} +INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %} +LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %} +LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %} +LINKER_SCRIPT = {{linker_script}} + +############################################################################### +AS = $(GCC_BIN)arm-none-eabi-as +CC = $(GCC_BIN)arm-none-eabi-gcc +CPP = $(GCC_BIN)arm-none-eabi-g++ +LD = $(GCC_BIN)arm-none-eabi-gcc +OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy + +CPU = -mcpu=cortex-m0plus -mthumb +CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections +CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %} + +LD_FLAGS = -mcpu=cortex-m0plus -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float +LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys + +all: $(PROJECT).bin + +clean: + rm -f $(PROJECT).bin $(PROJECT).elf $(OBJECTS) + +.s.o: + $(AS) $(CPU) -o $@ $< + +.c.o: + $(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $< + +.cpp.o: + $(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $< + + +$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) + $(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS) + +$(PROJECT).bin: $(PROJECT).elf + $(OBJCOPY) -O binary $< $@ diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py index 8718e3a45c..c995449a2f 100644 --- a/workspace_tools/export/gccarm.py +++ b/workspace_tools/export/gccarm.py @@ -21,7 +21,7 @@ from os.path import splitext, basename class GccArm(Exporter): NAME = 'GccArm' TOOLCHAIN = 'GCC_ARM' - TARGETS = ['LPC1768'] + TARGETS = ['LPC1768','KL25Z'] DOT_IN_RELATIVE_PATH = True def generate(self): From d3ca81890523e865d0264f40a469770a07671a5d Mon Sep 17 00:00:00 2001 From: Yihui Xiong Date: Fri, 1 Nov 2013 12:38:27 +0800 Subject: [PATCH 097/117] add readable(), writeable() and settings changed callback to USBSerial --- libraries/USBDevice/USBSerial/USBCDC.cpp | 26 +++++++++++++++ libraries/USBDevice/USBSerial/USBCDC.h | 12 +++++++ libraries/USBDevice/USBSerial/USBSerial.h | 40 ++++++++++++++++++++--- 3 files changed, 74 insertions(+), 4 deletions(-) diff --git a/libraries/USBDevice/USBSerial/USBCDC.cpp b/libraries/USBDevice/USBSerial/USBCDC.cpp index 29ea68a62e..5dff9f1a4f 100644 --- a/libraries/USBDevice/USBSerial/USBCDC.cpp +++ b/libraries/USBDevice/USBSerial/USBCDC.cpp @@ -52,6 +52,7 @@ bool USBCDC::USBCallback_request(void) { break; case CDC_SET_LINE_CODING: transfer->remaining = 7; + transfer->notify = true; success = true; terminal_connected = true; break; @@ -67,6 +68,31 @@ bool USBCDC::USBCallback_request(void) { return success; } +void USBCDC::USBCallback_requestCompleted(uint8_t *buf, uint32_t length) { + // Request of setting line coding has 7 bytes + if (length != 7) { + return; + } + + CONTROL_TRANSFER * transfer = getTransferPtr(); + + /* Process class-specific requests */ + if (transfer->setup.bmRequestType.Type == CLASS_TYPE) { + if (transfer->setup.bRequest == CDC_SET_LINE_CODING) { + if (memcmp(cdc_line_coding, buf, 7)) { + memcpy(cdc_line_coding, buf, 7); + + int baud = buf[0] + (buf[1] << 8) + + (buf[2] << 16) + (buf[3] << 24); + int stop = buf[4]; + int bits = buf[6]; + int parity = buf[5]; + + lineCodingChanged(baud, bits, parity, stop); + } + } + } +} // Called in ISR context // Set configuration. Return false if the diff --git a/libraries/USBDevice/USBSerial/USBCDC.h b/libraries/USBDevice/USBSerial/USBCDC.h index 9d810f8ff8..c2f14e5b1e 100644 --- a/libraries/USBDevice/USBSerial/USBCDC.h +++ b/libraries/USBDevice/USBSerial/USBCDC.h @@ -99,9 +99,21 @@ protected: * @returns true if successful */ bool readEP_NB(uint8_t * buffer, uint32_t * size); + + /* + * Called by USBCallback_requestCompleted when CDC line coding is changed + * Warning: Called in ISR + * + * @param baud The baud rate + * @param bits The number of bits in a word (5-8) + * @param parity The parity + * @param stop The number of stop bits (1 or 2) + */ + virtual void lineCodingChanged(int baud, int bits, int parity, int stop) {}; protected: virtual bool USBCallback_request(); + virtual void USBCallback_requestCompleted(uint8_t *buf, uint32_t length); virtual bool USBCallback_setConfiguration(uint8_t configuration); volatile bool terminal_connected; diff --git a/libraries/USBDevice/USBSerial/USBSerial.h b/libraries/USBDevice/USBSerial/USBSerial.h index 49fab116f8..7a73c8a93b 100644 --- a/libraries/USBDevice/USBSerial/USBSerial.h +++ b/libraries/USBDevice/USBSerial/USBSerial.h @@ -55,7 +55,9 @@ public: * @param product_release Your preoduct_release (default: 0x0001) * */ - USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001): USBCDC(vendor_id, product_id, product_release), buf(128){ }; + USBSerial(uint16_t vendor_id = 0x1f00, uint16_t product_id = 0x2012, uint16_t product_release = 0x0001): USBCDC(vendor_id, product_id, product_release), buf(128){ + settingsChangedCallback = 0; + }; /** @@ -79,6 +81,22 @@ public: * @returns the number of bytes available */ uint8_t available(); + + /** Determine if there is a character available to read + * + * @returns + * 1 if there is a character available to read, + * 0 otherwise + */ + int readable() { return available() ? 1 : 0; } + + /** Determine if there is space available to write a character + * + * @returns + * 1 if there is space to write a character, + * 0 otherwise + */ + int writeable() { return 1; } // always return 1, for write operation is blocking /** * Write a block of data. @@ -110,19 +128,33 @@ public: * * @param fptr function pointer */ - void attach(void (*fn)(void)) { - if(fn != NULL) { - rx.attach(fn); + void attach(void (*fptr)(void)) { + if(fptr != NULL) { + rx.attach(fptr); } } + /** + * Attach a callback to call when serial's settings are changed. + * + * @param fptr function pointer + */ + void attach(void (*fptr)(int baud, int bits, int parity, int stop)) { + settingsChangedCallback = fptr; + } protected: virtual bool EP2_OUT_callback(); + virtual void lineCodingChanged(int baud, int bits, int parity, int stop){ + if (settingsChangedCallback) { + settingsChangedCallback(baud, bits, parity, stop); + } + } private: FunctionPointer rx; CircBuffer buf; + void (*settingsChangedCallback)(int baud, int bits, int parity, int stop); }; #endif From e0d0dddc784a8fa12c8161ca666c5fc5d111371f Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Tue, 5 Nov 2013 14:58:47 +0000 Subject: [PATCH 098/117] Additional toolchains to the official builds for the KL25Z and LPC4088 --- workspace_tools/build_release.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py index be64859a6c..1c3adeb742 100644 --- a/workspace_tools/build_release.py +++ b/workspace_tools/build_release.py @@ -27,13 +27,13 @@ from workspace_tools.targets import TARGET_MAP OFFICIAL_MBED_LIBRARY_BUILD = ( - ('KL25Z', ('ARM',)), + ('KL25Z', ('ARM', 'GCC_ARM')), ('LPC11U24', ('ARM', 'uARM')), ('LPC1768', ('ARM', 'GCC_ARM', 'GCC_CR', 'GCC_CS', 'IAR')), ('LPC2368', ('ARM',)), ('LPC812', ('uARM',)), ('LPC1347', ('ARM',)), - ('LPC4088', ('ARM',)), + ('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR')), ('LPC1114', ('uARM',)), ) From 250610e13cd373e3e263dd0cb78f0749c73f6a5b Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Tue, 5 Nov 2013 23:39:49 +0000 Subject: [PATCH 099/117] Add expoter README Includes table of exporter supported toolchains by platform. --- workspace_tools/export/README.md | 77 ++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 workspace_tools/export/README.md diff --git a/workspace_tools/export/README.md b/workspace_tools/export/README.md new file mode 100644 index 0000000000..822e2482ea --- /dev/null +++ b/workspace_tools/export/README.md @@ -0,0 +1,77 @@ +Exporter Toolchain/Platform Support +----------------------------------- + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Code RedCode SourceryDS-5GCC ARMIARKEIL uVision
NXP LPC1768✓✓✓✓✓✓
NXP LPC11U24✓✓
NXP LPC812✓
NXP LPC4088✓✓✓
NXP LPC1347✓
NXP LPC1114✓
Freescale KL25Z✓✓
From 1a1dafe44c643000c941ad9fef6bfc55dd22b0c3 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Thu, 7 Nov 2013 13:48:34 +0200 Subject: [PATCH 100/117] Added configuration mechanism If the build system finds a file named mbed_config.h, it will automatically define a HAVE_MBED_CONFIG_H macro. Various libraries/components can use this mechanism to provide compile-time configuration for user projects. --- workspace_tools/toolchains/__init__.py | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py index a5ee60d497..ea8ae58f23 100644 --- a/workspace_tools/toolchains/__init__.py +++ b/workspace_tools/toolchains/__init__.py @@ -171,6 +171,7 @@ class mbedToolchain: self.symbols = None self.labels = None + self.has_config = False self.build_all = False @@ -186,6 +187,8 @@ class mbedToolchain: labels = self.get_labels() self.symbols = ["TARGET_%s" % t for t in labels['TARGET']] self.symbols.extend(["TOOLCHAIN_%s" % t for t in labels['TOOLCHAIN']]) + if self.has_config: + self.symbols.append('HAVE_MBED_CONFIG_H') # Cortex CPU symbols if self.target.core in mbedToolchain.CORTEX_SYMBOLS: @@ -226,6 +229,7 @@ class mbedToolchain: def scan_resources(self, path): labels = self.get_labels() resources = Resources(path) + self.has_config = False """ os.walk(top[, topdown=True[, onerror=None[, followlinks=False]]]) When topdown is True, the caller can modify the dirnames list in-place @@ -263,6 +267,8 @@ class mbedToolchain: resources.cpp_sources.append(file_path) elif ext == '.h': + if basename(file_path) == "mbed_config.h": + self.has_config = True resources.headers.append(file_path) elif ext == '.o': @@ -314,7 +320,6 @@ class mbedToolchain: inc_paths.extend(inc_dirs) base_path = resources.base_path - for source in resources.s_sources: self.compiled += 1 object = self.relative_object_path(build_path, base_path, source) From 10ef3d610e8cf0fe0bff462d7f654e89060ce916 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 7 Nov 2013 17:33:50 +0000 Subject: [PATCH 101/117] Add LPC812 exporter for DS5 --- workspace_tools/export/README.md | 2 +- workspace_tools/export/ds5_5.py | 7 +- .../export/ds5_5_lpc812.cproject.tmpl | 103 ++++++++++++++++ .../export/ds5_5_lpc812.launch.tmpl | 111 ++++++++++++++++++ .../export/ds5_5_lpc812.project.tmpl | 83 +++++++++++++ 5 files changed, 303 insertions(+), 3 deletions(-) create mode 100644 workspace_tools/export/ds5_5_lpc812.cproject.tmpl create mode 100644 workspace_tools/export/ds5_5_lpc812.launch.tmpl create mode 100644 workspace_tools/export/ds5_5_lpc812.project.tmpl diff --git a/workspace_tools/export/README.md b/workspace_tools/export/README.md index 822e2482ea..70fa7cf3e5 100644 --- a/workspace_tools/export/README.md +++ b/workspace_tools/export/README.md @@ -32,7 +32,7 @@ Exporter Toolchain/Platform Support NXP LPC812 - + ✓ diff --git a/workspace_tools/export/ds5_5.py b/workspace_tools/export/ds5_5.py index 2be63ab02d..e5a11a3682 100644 --- a/workspace_tools/export/ds5_5.py +++ b/workspace_tools/export/ds5_5.py @@ -20,13 +20,16 @@ from os.path import basename class DS5_5(Exporter): NAME = 'DS5' - TOOLCHAIN = 'ARM' - TARGETS = ['LPC1768', 'LPC11U24'] + TARGETS = ['LPC1768', 'LPC11U24', 'LPC812'] FILE_TYPES = { 'c_sources':'1', 'cpp_sources':'8', 's_sources':'2' } + USING_MICROLIB = ['LPC812'] + + def get_toolchain(self): + return 'uARM' if (self.target in self.USING_MICROLIB) else 'ARM' def generate(self): source_files = [] diff --git a/workspace_tools/export/ds5_5_lpc812.cproject.tmpl b/workspace_tools/export/ds5_5_lpc812.cproject.tmpl new file mode 100644 index 0000000000..96f0dc958e --- /dev/null +++ b/workspace_tools/export/ds5_5_lpc812.cproject.tmpl @@ -0,0 +1,103 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/workspace_tools/export/ds5_5_lpc812.launch.tmpl b/workspace_tools/export/ds5_5_lpc812.launch.tmpl new file mode 100644 index 0000000000..57ab0bac89 --- /dev/null +++ b/workspace_tools/export/ds5_5_lpc812.launch.tmpl @@ -0,0 +1,111 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/workspace_tools/export/ds5_5_lpc812.project.tmpl b/workspace_tools/export/ds5_5_lpc812.project.tmpl new file mode 100644 index 0000000000..2e9c358ff9 --- /dev/null +++ b/workspace_tools/export/ds5_5_lpc812.project.tmpl @@ -0,0 +1,83 @@ + + + {{name}}_ds5_lpc812 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/ds5_lpc812/Build} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + From 8d9375022f1adbcb5c9ae7524f43b5c7ef30bda9 Mon Sep 17 00:00:00 2001 From: Stephen Paulger Date: Thu, 7 Nov 2013 22:53:08 +0000 Subject: [PATCH 102/117] Correct LPC812 exporters list in README --- workspace_tools/export/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/export/README.md b/workspace_tools/export/README.md index 70fa7cf3e5..1f8c40fcf0 100644 --- a/workspace_tools/export/README.md +++ b/workspace_tools/export/README.md @@ -32,8 +32,8 @@ Exporter Toolchain/Platform Support NXP LPC812 - ✓ + ✓ ✓ From 0aeabe419fec1d97281b2d9ea13a8359f21f28a2 Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Fri, 8 Nov 2013 11:20:23 +0000 Subject: [PATCH 103/117] Use only GCC_ARM toolcahin for Travis CI --- .travis.yml | 2 +- README.md | 2 +- travis/install_dependencies.sh | 35 ---------------------------------- 3 files changed, 2 insertions(+), 37 deletions(-) diff --git a/.travis.yml b/.travis.yml index 44ff52f03a..4cad481375 100644 --- a/.travis.yml +++ b/.travis.yml @@ -2,4 +2,4 @@ install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null" python: - "2.7" -script: "python workspace_tools/build.py -r -e -U -u -d -b -t ARM_MICRO;python workspace_tools/build.py -r -e -U -u -d -b -t ARM_CC;python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" +script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM" diff --git a/README.md b/README.md index c5ccf4b976..b382bd0e71 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ mbed SDK ======== -[![Build Status](https://travis-ci.org/matthewelse/mbed.png)](https://travis-ci.org/matthewelse/mbed) +[![Build Status](https://api.travis-ci.org/emilmont/mbed.png)](https://api.travis-ci.org/emilmont/mbed) The mbed Software Development Kit (SDK) is a C/C++ microcontroller software platform relied upon by tens of thousands of developers to build projects fast. diff --git a/travis/install_dependencies.sh b/travis/install_dependencies.sh index c685fc3d2d..a66579cd81 100755 --- a/travis/install_dependencies.sh +++ b/travis/install_dependencies.sh @@ -1,41 +1,6 @@ -echo "Installing compilation dependencies." - -# Install GCC-ARM Compiler. - echo "Adding apt repositories." sudo add-apt-repository -y ppa:terry.guo/gcc-arm-embedded -sudo add-apt-repository -y ppa:ubuntu-wine/ppa echo "Installing gcc_arm software" sudo apt-get update sudo apt-get install -y gcc-arm-none-eabi - -echo "Setting up Wine." -sudo apt-get install -y wine1.5 - - -# Download ARMCC (Testing Purposes only at the moment) - -echo "Installing ARMCC" -wget https://dl.dropboxusercontent.com/u/15449666/ARMCC.tar.gz -tar xvfz ARMCC.tar.gz - -# Setup ARMCC environment variables - -echo "Setting up Environment Variables" -printf "#%s/bin/bash\nwine armcc.exe" ! > ARMCC/bin/armcc -chmod a+x ARMCC/bin/armcc - -printf "#%s/bin/bash\nwine armar.exe" ! > ARMCC/bin/armar -chmod a+x ARMCC/bin/armar - -printf "#%s/bin/bash\nwine armasm.exe" ! > ARMCC/bin/armasm -chmod a+x ARMCC/bin/armasm - -printf "#%s/bin/bash\nwine armlink.exe" ! > ARMCC/bin/armlink -chmod a+x ARMCC/bin/armlink - -printf "#%s/bin/bash\nwine fromelf.exe" ! > ARMCC/bin/fromelf -chmod a+x ARMCC/bin/fromelf - -export PATH=$PATH:$TRAVIS_BUILD_DIR"/ARMCC/bin" From 3e8f11d7ed5406b6a5fb9e51757e1d53ef195963 Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Fri, 8 Nov 2013 11:31:53 +0000 Subject: [PATCH 104/117] Update README.md --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index b382bd0e71..552a2e8737 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ mbed SDK ======== -[![Build Status](https://api.travis-ci.org/emilmont/mbed.png)](https://api.travis-ci.org/emilmont/mbed) +[![Build Status](https://travis-ci.org/mbedmicro/mbed.png)](https://travis-ci.org/mbedmicro/mbed/builds) The mbed Software Development Kit (SDK) is a C/C++ microcontroller software platform relied upon by tens of thousands of developers to build projects fast. From 600e9ecc46114676515423d0e10811f26d35008a Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Fri, 8 Nov 2013 11:46:00 +0000 Subject: [PATCH 105/117] Default to ARM GCC tools in the system path --- workspace_tools/settings.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/workspace_tools/settings.py b/workspace_tools/settings.py index 738c2a4394..ea452334bb 100644 --- a/workspace_tools/settings.py +++ b/workspace_tools/settings.py @@ -53,7 +53,7 @@ ARM_CPPLIB = join(ARM_LIB, "cpplib") MY_ARM_CLIB = join(ARM_PATH, "lib", "microlib") # GCC ARM -GCC_ARM_PATH = "C:/arm-none-eabi-gcc-4_7/bin" +GCC_ARM_PATH = "" # GCC CodeSourcery GCC_CS_PATH = "C:/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" From d7d5954f59fe54425eab25df52a91e1e899a0e11 Mon Sep 17 00:00:00 2001 From: Emilio Monti Date: Fri, 8 Nov 2013 11:54:12 +0000 Subject: [PATCH 106/117] Add correct return code to build script --- workspace_tools/build.py | 1 + 1 file changed, 1 insertion(+) diff --git a/workspace_tools/build.py b/workspace_tools/build.py index 1cf2eb4acb..bcd11c6138 100644 --- a/workspace_tools/build.py +++ b/workspace_tools/build.py @@ -120,3 +120,4 @@ if __name__ == '__main__': if failures: print "\n\nBuild failures:" print "\n".join([" * %s" % f for f in failures]) + sys.exit(1) From e69956aba2f68a2a26ac26b051f8d349deaa1ce8 Mon Sep 17 00:00:00 2001 From: Bogdan Marinescu Date: Fri, 8 Nov 2013 15:32:31 +0200 Subject: [PATCH 107/117] Updated DSP library + build system changes Updated CMSIS DSP to latest version (CMSIS-SP-00300-r3p2-00rel1.zip) Build system changes to be able to preprocess assembler sources before compiling them: - GCC: use gcc '-x assembler-with-cpp' - ARM: preprocess first, then assemble (two separate commands) - IAR: added macro definitions and include directories to the assembler command line Removed CORTEX_ARM_SUPPORT restriction for the DSP libraries. Tested: LPC1768 with ARM, GCC_ARM and IAR, LPC11U24 with ARM. --- .../BasicMathFunctions/arm_abs_f32.c | 62 +- .../BasicMathFunctions/arm_abs_q15.c | 88 +- .../BasicMathFunctions/arm_abs_q31.c | 65 +- .../cmsis_dsp/BasicMathFunctions/arm_abs_q7.c | 63 +- .../BasicMathFunctions/arm_add_f32.c | 55 +- .../BasicMathFunctions/arm_add_q15.c | 55 +- .../BasicMathFunctions/arm_add_q31.c | 55 +- .../cmsis_dsp/BasicMathFunctions/arm_add_q7.c | 55 +- .../BasicMathFunctions/arm_dot_prod_f32.c | 72 +- .../BasicMathFunctions/arm_dot_prod_q15.c | 55 +- .../BasicMathFunctions/arm_dot_prod_q31.c | 55 +- .../BasicMathFunctions/arm_dot_prod_q7.c | 55 +- .../BasicMathFunctions/arm_mult_f32.c | 58 +- .../BasicMathFunctions/arm_mult_q15.c | 58 +- .../BasicMathFunctions/arm_mult_q31.c | 58 +- .../BasicMathFunctions/arm_mult_q7.c | 61 +- .../BasicMathFunctions/arm_negate_f32.c | 59 +- .../BasicMathFunctions/arm_negate_q15.c | 55 +- .../BasicMathFunctions/arm_negate_q31.c | 57 +- .../BasicMathFunctions/arm_negate_q7.c | 55 +- .../BasicMathFunctions/arm_offset_f32.c | 59 +- .../BasicMathFunctions/arm_offset_q15.c | 55 +- .../BasicMathFunctions/arm_offset_q31.c | 55 +- .../BasicMathFunctions/arm_offset_q7.c | 55 +- .../BasicMathFunctions/arm_scale_f32.c | 58 +- .../BasicMathFunctions/arm_scale_q15.c | 55 +- .../BasicMathFunctions/arm_scale_q31.c | 180 +- .../BasicMathFunctions/arm_scale_q7.c | 55 +- .../BasicMathFunctions/arm_shift_q15.c | 55 +- .../BasicMathFunctions/arm_shift_q31.c | 58 +- .../BasicMathFunctions/arm_shift_q7.c | 55 +- .../BasicMathFunctions/arm_sub_f32.c | 55 +- .../BasicMathFunctions/arm_sub_q15.c | 55 +- .../BasicMathFunctions/arm_sub_q31.c | 55 +- .../cmsis_dsp/BasicMathFunctions/arm_sub_q7.c | 55 +- .../CommonTables/arm_common_tables.c | 15580 +++++++++++++--- .../ComplexMathFunctions/arm_cmplx_conj_f32.c | 52 +- .../ComplexMathFunctions/arm_cmplx_conj_q15.c | 52 +- .../ComplexMathFunctions/arm_cmplx_conj_q31.c | 54 +- .../arm_cmplx_dot_prod_f32.c | 52 +- .../arm_cmplx_dot_prod_q15.c | 52 +- .../arm_cmplx_dot_prod_q31.c | 52 +- .../ComplexMathFunctions/arm_cmplx_mag_f32.c | 52 +- .../ComplexMathFunctions/arm_cmplx_mag_q15.c | 52 +- .../ComplexMathFunctions/arm_cmplx_mag_q31.c | 52 +- .../arm_cmplx_mag_squared_f32.c | 52 +- .../arm_cmplx_mag_squared_q15.c | 52 +- .../arm_cmplx_mag_squared_q31.c | 52 +- .../arm_cmplx_mult_cmplx_f32.c | 52 +- .../arm_cmplx_mult_cmplx_q15.c | 52 +- .../arm_cmplx_mult_cmplx_q31.c | 52 +- .../arm_cmplx_mult_real_f32.c | 52 +- .../arm_cmplx_mult_real_q15.c | 52 +- .../arm_cmplx_mult_real_q31.c | 52 +- .../ControllerFunctions/arm_pid_init_f32.c | 48 +- .../ControllerFunctions/arm_pid_init_q15.c | 52 +- .../ControllerFunctions/arm_pid_init_q31.c | 52 +- .../ControllerFunctions/arm_pid_reset_f32.c | 48 +- .../ControllerFunctions/arm_pid_reset_q15.c | 48 +- .../ControllerFunctions/arm_pid_reset_q31.c | 48 +- .../ControllerFunctions/arm_sin_cos_f32.c | 48 +- .../ControllerFunctions/arm_sin_cos_q31.c | 56 +- .../cmsis_dsp/FastMathFunctions/arm_cos_f32.c | 56 +- .../cmsis_dsp/FastMathFunctions/arm_cos_q15.c | 81 +- .../cmsis_dsp/FastMathFunctions/arm_cos_q31.c | 62 +- .../cmsis_dsp/FastMathFunctions/arm_sin_f32.c | 56 +- .../cmsis_dsp/FastMathFunctions/arm_sin_q15.c | 72 +- .../cmsis_dsp/FastMathFunctions/arm_sin_q31.c | 70 +- .../FastMathFunctions/arm_sqrt_q15.c | 56 +- .../FastMathFunctions/arm_sqrt_q31.c | 56 +- .../arm_biquad_cascade_df1_32x64_init_q31.c | 51 +- .../arm_biquad_cascade_df1_32x64_q31.c | 58 +- .../arm_biquad_cascade_df1_f32.c | 60 +- .../arm_biquad_cascade_df1_fast_q15.c | 53 +- .../arm_biquad_cascade_df1_fast_q31.c | 136 +- .../arm_biquad_cascade_df1_init_f32.c | 54 +- .../arm_biquad_cascade_df1_init_q15.c | 54 +- .../arm_biquad_cascade_df1_init_q31.c | 54 +- .../arm_biquad_cascade_df1_q15.c | 59 +- .../arm_biquad_cascade_df1_q31.c | 58 +- .../arm_biquad_cascade_df2T_f32.c | 596 +- .../arm_biquad_cascade_df2T_init_f32.c | 51 +- .../FilteringFunctions/arm_conv_f32.c | 59 +- .../arm_conv_fast_opt_q15.c | 51 +- .../FilteringFunctions/arm_conv_fast_q15.c | 49 +- .../FilteringFunctions/arm_conv_fast_q31.c | 51 +- .../FilteringFunctions/arm_conv_opt_q15.c | 55 +- .../FilteringFunctions/arm_conv_opt_q7.c | 55 +- .../FilteringFunctions/arm_conv_partial_f32.c | 59 +- .../arm_conv_partial_fast_opt_q15.c | 51 +- .../arm_conv_partial_fast_q15.c | 49 +- .../arm_conv_partial_fast_q31.c | 51 +- .../arm_conv_partial_opt_q15.c | 55 +- .../arm_conv_partial_opt_q7.c | 55 +- .../FilteringFunctions/arm_conv_partial_q15.c | 53 +- .../FilteringFunctions/arm_conv_partial_q31.c | 59 +- .../FilteringFunctions/arm_conv_partial_q7.c | 57 +- .../FilteringFunctions/arm_conv_q15.c | 53 +- .../FilteringFunctions/arm_conv_q31.c | 59 +- .../FilteringFunctions/arm_conv_q7.c | 57 +- .../FilteringFunctions/arm_correlate_f32.c | 59 +- .../arm_correlate_fast_opt_q15.c | 51 +- .../arm_correlate_fast_q15.c | 49 +- .../arm_correlate_fast_q31.c | 53 +- .../arm_correlate_opt_q15.c | 55 +- .../FilteringFunctions/arm_correlate_opt_q7.c | 55 +- .../FilteringFunctions/arm_correlate_q15.c | 53 +- .../FilteringFunctions/arm_correlate_q31.c | 59 +- .../FilteringFunctions/arm_correlate_q7.c | 57 +- .../FilteringFunctions/arm_fir_decimate_f32.c | 58 +- .../arm_fir_decimate_fast_q15.c | 48 +- .../arm_fir_decimate_fast_q31.c | 48 +- .../arm_fir_decimate_init_f32.c | 51 +- .../arm_fir_decimate_init_q15.c | 51 +- .../arm_fir_decimate_init_q31.c | 51 +- .../FilteringFunctions/arm_fir_decimate_q15.c | 55 +- .../FilteringFunctions/arm_fir_decimate_q31.c | 55 +- .../FilteringFunctions/arm_fir_f32.c | 1011 +- .../FilteringFunctions/arm_fir_fast_q15.c | 52 +- .../FilteringFunctions/arm_fir_fast_q31.c | 124 +- .../FilteringFunctions/arm_fir_init_f32.c | 54 +- .../FilteringFunctions/arm_fir_init_q15.c | 58 +- .../FilteringFunctions/arm_fir_init_q31.c | 54 +- .../FilteringFunctions/arm_fir_init_q7.c | 54 +- .../arm_fir_interpolate_f32.c | 57 +- .../arm_fir_interpolate_init_f32.c | 51 +- .../arm_fir_interpolate_init_q15.c | 51 +- .../arm_fir_interpolate_init_q31.c | 51 +- .../arm_fir_interpolate_q15.c | 55 +- .../arm_fir_interpolate_q31.c | 55 +- .../FilteringFunctions/arm_fir_lattice_f32.c | 57 +- .../arm_fir_lattice_init_f32.c | 51 +- .../arm_fir_lattice_init_q15.c | 51 +- .../arm_fir_lattice_init_q31.c | 51 +- .../FilteringFunctions/arm_fir_lattice_q15.c | 55 +- .../FilteringFunctions/arm_fir_lattice_q31.c | 55 +- .../FilteringFunctions/arm_fir_q15.c | 60 +- .../FilteringFunctions/arm_fir_q31.c | 58 +- .../cmsis_dsp/FilteringFunctions/arm_fir_q7.c | 58 +- .../FilteringFunctions/arm_fir_sparse_f32.c | 57 +- .../arm_fir_sparse_init_f32.c | 51 +- .../arm_fir_sparse_init_q15.c | 51 +- .../arm_fir_sparse_init_q31.c | 51 +- .../arm_fir_sparse_init_q7.c | 51 +- .../FilteringFunctions/arm_fir_sparse_q15.c | 55 +- .../FilteringFunctions/arm_fir_sparse_q31.c | 55 +- .../FilteringFunctions/arm_fir_sparse_q7.c | 55 +- .../FilteringFunctions/arm_iir_lattice_f32.c | 59 +- .../arm_iir_lattice_init_f32.c | 51 +- .../arm_iir_lattice_init_q15.c | 51 +- .../arm_iir_lattice_init_q31.c | 51 +- .../FilteringFunctions/arm_iir_lattice_q15.c | 61 +- .../FilteringFunctions/arm_iir_lattice_q31.c | 55 +- .../FilteringFunctions/arm_lms_f32.c | 58 +- .../FilteringFunctions/arm_lms_init_f32.c | 51 +- .../FilteringFunctions/arm_lms_init_q15.c | 51 +- .../FilteringFunctions/arm_lms_init_q31.c | 51 +- .../FilteringFunctions/arm_lms_norm_f32.c | 60 +- .../arm_lms_norm_init_f32.c | 51 +- .../arm_lms_norm_init_q15.c | 51 +- .../arm_lms_norm_init_q31.c | 51 +- .../FilteringFunctions/arm_lms_norm_q15.c | 55 +- .../FilteringFunctions/arm_lms_norm_q31.c | 55 +- .../FilteringFunctions/arm_lms_q15.c | 55 +- .../FilteringFunctions/arm_lms_q31.c | 55 +- .../MatrixFunctions/arm_mat_add_f32.c | 62 +- .../MatrixFunctions/arm_mat_add_q15.c | 58 +- .../MatrixFunctions/arm_mat_add_q31.c | 62 +- .../MatrixFunctions/arm_mat_init_f32.c | 54 +- .../MatrixFunctions/arm_mat_init_q15.c | 54 +- .../MatrixFunctions/arm_mat_init_q31.c | 54 +- .../MatrixFunctions/arm_mat_inverse_f32.c | 102 +- .../MatrixFunctions/arm_mat_mult_f32.c | 58 +- .../MatrixFunctions/arm_mat_mult_fast_q15.c | 48 +- .../MatrixFunctions/arm_mat_mult_fast_q31.c | 48 +- .../MatrixFunctions/arm_mat_mult_q15.c | 60 +- .../MatrixFunctions/arm_mat_mult_q31.c | 56 +- .../MatrixFunctions/arm_mat_scale_f32.c | 62 +- .../MatrixFunctions/arm_mat_scale_q15.c | 62 +- .../MatrixFunctions/arm_mat_scale_q31.c | 61 +- .../MatrixFunctions/arm_mat_sub_f32.c | 62 +- .../MatrixFunctions/arm_mat_sub_q15.c | 58 +- .../MatrixFunctions/arm_mat_sub_q31.c | 62 +- .../MatrixFunctions/arm_mat_trans_f32.c | 58 +- .../MatrixFunctions/arm_mat_trans_q15.c | 58 +- .../MatrixFunctions/arm_mat_trans_q31.c | 58 +- .../StatisticsFunctions/arm_max_f32.c | 52 +- .../StatisticsFunctions/arm_max_q15.c | 52 +- .../StatisticsFunctions/arm_max_q31.c | 52 +- .../StatisticsFunctions/arm_max_q7.c | 52 +- .../StatisticsFunctions/arm_mean_f32.c | 52 +- .../StatisticsFunctions/arm_mean_q15.c | 52 +- .../StatisticsFunctions/arm_mean_q31.c | 52 +- .../StatisticsFunctions/arm_mean_q7.c | 52 +- .../StatisticsFunctions/arm_min_f32.c | 52 +- .../StatisticsFunctions/arm_min_q15.c | 52 +- .../StatisticsFunctions/arm_min_q31.c | 52 +- .../StatisticsFunctions/arm_min_q7.c | 52 +- .../StatisticsFunctions/arm_power_f32.c | 55 +- .../StatisticsFunctions/arm_power_q15.c | 52 +- .../StatisticsFunctions/arm_power_q31.c | 52 +- .../StatisticsFunctions/arm_power_q7.c | 52 +- .../StatisticsFunctions/arm_rms_f32.c | 52 +- .../StatisticsFunctions/arm_rms_q15.c | 61 +- .../StatisticsFunctions/arm_rms_q31.c | 52 +- .../StatisticsFunctions/arm_std_f32.c | 52 +- .../StatisticsFunctions/arm_std_q15.c | 52 +- .../StatisticsFunctions/arm_std_q31.c | 52 +- .../StatisticsFunctions/arm_var_f32.c | 52 +- .../StatisticsFunctions/arm_var_q15.c | 52 +- .../StatisticsFunctions/arm_var_q31.c | 52 +- .../cmsis_dsp/SupportFunctions/arm_copy_f32.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_copy_q15.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_copy_q31.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_copy_q7.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_fill_f32.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_fill_q15.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_fill_q31.c | 55 +- .../cmsis_dsp/SupportFunctions/arm_fill_q7.c | 55 +- .../SupportFunctions/arm_float_to_q15.c | 52 +- .../SupportFunctions/arm_float_to_q31.c | 52 +- .../SupportFunctions/arm_float_to_q7.c | 52 +- .../SupportFunctions/arm_q15_to_float.c | 52 +- .../SupportFunctions/arm_q15_to_q31.c | 52 +- .../SupportFunctions/arm_q15_to_q7.c | 52 +- .../SupportFunctions/arm_q31_to_float.c | 52 +- .../SupportFunctions/arm_q31_to_q15.c | 52 +- .../SupportFunctions/arm_q31_to_q7.c | 52 +- .../SupportFunctions/arm_q7_to_float.c | 52 +- .../SupportFunctions/arm_q7_to_q15.c | 52 +- .../SupportFunctions/arm_q7_to_q31.c | 52 +- .../cmsis_dsp/SupportFunctions/math_helper.c | 49 +- .../TransformFunctions/arm_bitreversal.c | 340 +- .../TransformFunctions/arm_bitreversal2.S | 148 + .../TransformFunctions/arm_cfft_f32.c | 616 + .../TransformFunctions/arm_cfft_radix2_f32.c | 806 +- .../arm_cfft_radix2_init_f32.c | 57 +- .../arm_cfft_radix2_init_q15.c | 58 +- .../arm_cfft_radix2_init_q31.c | 38 +- .../TransformFunctions/arm_cfft_radix2_q15.c | 91 +- .../TransformFunctions/arm_cfft_radix2_q31.c | 548 +- .../TransformFunctions/arm_cfft_radix4_f32.c | 1990 +- .../arm_cfft_radix4_init_f32.c | 60 +- .../arm_cfft_radix4_init_q15.c | 58 +- .../arm_cfft_radix4_init_q31.c | 58 +- .../TransformFunctions/arm_cfft_radix4_q15.c | 85 +- .../TransformFunctions/arm_cfft_radix4_q31.c | 76 +- .../TransformFunctions/arm_cfft_radix8_f32.c | 384 + .../TransformFunctions/arm_dct4_f32.c | 52 +- .../TransformFunctions/arm_dct4_init_f32.c | 48 +- .../TransformFunctions/arm_dct4_init_q15.c | 48 +- .../TransformFunctions/arm_dct4_init_q31.c | 48 +- .../TransformFunctions/arm_dct4_q15.c | 52 +- .../TransformFunctions/arm_dct4_q31.c | 52 +- .../TransformFunctions/arm_rfft_f32.c | 155 +- .../TransformFunctions/arm_rfft_fast_f32.c | 354 + .../arm_rfft_fast_init_f32.c | 139 + .../TransformFunctions/arm_rfft_init_f32.c | 57 +- .../TransformFunctions/arm_rfft_init_q15.c | 55 +- .../TransformFunctions/arm_rfft_init_q31.c | 55 +- .../TransformFunctions/arm_rfft_q15.c | 84 +- .../TransformFunctions/arm_rfft_q31.c | 73 +- libraries/dsp/cmsis_dsp/arm_common_tables.h | 97 +- libraries/dsp/cmsis_dsp/arm_math.h | 1473 +- libraries/dsp/cmsis_dsp/math_helper.h | 50 +- libraries/tests/dsp/cmsis/fir_f32/main.cpp | 2 +- workspace_tools/libraries.py | 2 - workspace_tools/tests.py | 2 - workspace_tools/toolchains/__init__.py | 4 +- workspace_tools/toolchains/arm.py | 9 +- workspace_tools/toolchains/gcc.py | 7 +- workspace_tools/toolchains/iar.py | 4 +- 272 files changed, 26389 insertions(+), 12002 deletions(-) create mode 100644 libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal2.S create mode 100644 libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_f32.c create mode 100644 libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix8_f32.c create mode 100644 libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_f32.c create mode 100644 libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_init_f32.c diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c index 3c9d360c66..90613e712b 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_abs_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -46,11 +51,12 @@ * Computes the absolute value of a vector on an element-by-element basis. * * 

        
- *     pDst[n] = abs(pSrcA[n]),   0 <= n < blockSize.        
+ *     pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.        
  *
* - * The operation can be done in-place by setting the input and output pointers to the same buffer. - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. + * The functions support in-place computation allowing the source and + * destination pointers to reference the same memory buffer. + * There are separate functions for floating-point, Q7, Q15, and Q31 data types. */ /** @@ -73,7 +79,7 @@ void arm_abs_f32( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t in1, in2, in3, in4; /* temporary variables */ @@ -141,7 +147,7 @@ void arm_abs_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c index 6b6fdf4ef4..c7822da513 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_abs_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -64,7 +69,8 @@ void arm_abs_q15( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY + __SIMD32_TYPE *simd; /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -77,6 +83,7 @@ void arm_abs_q15( /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ + simd = __SIMD32_CONST(pDst); while(blkCnt > 0u) { /* C = |A| */ @@ -86,19 +93,17 @@ void arm_abs_q15( /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */ - #ifndef ARM_MATH_BIG_ENDIAN - - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); + *simd++ = + __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), + ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); #else - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); + *simd++ = + __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), + ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ @@ -108,23 +113,24 @@ void arm_abs_q15( #ifndef ARM_MATH_BIG_ENDIAN - *__SIMD32(pDst)++ = - __PKHBT(((in1 > 0) ? in1 : __QSUB16(0, in1)), - ((in2 > 0) ? in2 : __QSUB16(0, in2)), 16); + *simd++ = + __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), + ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16); #else - *__SIMD32(pDst)++ = - __PKHBT(((in2 > 0) ? in2 : __QSUB16(0, in2)), - ((in1 > 0) ? in1 : __QSUB16(0, in1)), 16); + *simd++ = + __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), + ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16); #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ /* Decrement the loop counter */ blkCnt--; } - + pDst = (q15_t *)simd; + /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = blockSize % 0x4u; @@ -136,7 +142,7 @@ void arm_abs_q15( in1 = *pSrc++; /* Calculate absolute value of input and then store the result in the destination buffer. */ - *pDst++ = (in1 > 0) ? in1 : __QSUB16(0, in1); + *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1); /* Decrement the loop counter */ blkCnt--; @@ -164,7 +170,7 @@ void arm_abs_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c index 5c3d56f749..f375bf1821 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_abs_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_abs_q31( uint32_t blkCnt; /* loop counter */ q31_t in; /* Input value */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in1, in2, in3, in4; @@ -85,10 +90,10 @@ void arm_abs_q31( in3 = *pSrc++; in4 = *pSrc++; - *pDst++ = (in1 > 0) ? in1 : __QSUB(0, in1); - *pDst++ = (in2 > 0) ? in2 : __QSUB(0, in2); - *pDst++ = (in3 > 0) ? in3 : __QSUB(0, in3); - *pDst++ = (in4 > 0) ? in4 : __QSUB(0, in4); + *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1); + *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2); + *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3); + *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4); /* Decrement the loop counter */ blkCnt--; @@ -105,14 +110,14 @@ void arm_abs_q31( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { /* C = |A| */ /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */ in = *pSrc++; - *pDst++ = (in > 0) ? in : ((in == 0x80000000) ? 0x7fffffff : -in); + *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in); /* Decrement the loop counter */ blkCnt--; diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c index 0ae0a2f5b3..125374c0c3 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_abs_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_abs_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -69,7 +74,7 @@ void arm_abs_q7( uint32_t blkCnt; /* loop counter */ q7_t in; /* Input value1 */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in1, in2, in3, in4; /* temporary input variables */ @@ -89,22 +94,22 @@ void arm_abs_q7( in3 = (q31_t) * (pSrc + 2); /* find absolute value */ - out1 = (in1 > 0) ? in1 : __QSUB8(0, in1); + out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1); /* read input */ in4 = (q31_t) * (pSrc + 3); /* find absolute value */ - out2 = (in2 > 0) ? in2 : __QSUB8(0, in2); + out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2); /* store result to destination */ *pDst = (q7_t) out1; /* find absolute value */ - out3 = (in3 > 0) ? in3 : __QSUB8(0, in3); + out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3); /* find absolute value */ - out4 = (in4 > 0) ? in4 : __QSUB8(0, in4); + out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4); /* store result to destination */ *(pDst + 1) = (q7_t) out2; @@ -131,7 +136,7 @@ void arm_abs_q7( /* Run the below code for Cortex-M0 */ blkCnt = blockSize; -#endif // #define ARM_MATH_CM0 +#endif // #define ARM_MATH_CM0_FAMILY while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_f32.c index 29425373f2..7ae25d8338 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_add_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -73,7 +78,7 @@ void arm_add_f32( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ @@ -127,7 +132,7 @@ void arm_add_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q15.c index 6de4a03368..7af88664e8 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_add_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_add_q15( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inB1, inB2; @@ -125,7 +130,7 @@ void arm_add_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q31.c index 576efe6c74..c5b9ac2622 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_add_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -67,7 +72,7 @@ void arm_add_q31( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inA3, inA4; @@ -134,7 +139,7 @@ void arm_add_q31( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q7.c index 6f75e1d42f..a5bb07fc0c 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_add_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_add_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_add_q7( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -119,7 +124,7 @@ void arm_add_q7( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c index 933b001703..870672ba36 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_dot_prod_f32.c @@ -11,39 +11,49 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" /** - * @ingroup groupMath + * @ingroup groupMath */ -/** - * @defgroup dot_prod Vector Dot Product - * - * Computes the dot product of two vectors. - * The vectors are multiplied element-by-element and then summed. +/** + * @defgroup dot_prod Vector Dot Product + * + * Computes the dot product of two vectors. + * The vectors are multiplied element-by-element and then summed. + * + * 
+ *     sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+ *
+ * * There are separate functions for floating-point, Q7, Q15, and Q31 data types. */ @@ -72,7 +82,7 @@ void arm_dot_prod_f32( uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ /*loop Unrolling */ @@ -104,7 +114,7 @@ void arm_dot_prod_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c index 865e4c4331..3eb0a10ef2 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_dot_prod_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -70,7 +75,7 @@ void arm_dot_prod_q15( q63_t sum = 0; /* Temporary result storage */ uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -123,7 +128,7 @@ void arm_dot_prod_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ /* Store the result in the destination buffer in 34.30 format */ *result = sum; diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c index 1f98e41d6c..3712a0a908 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_dot_prod_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -72,7 +77,7 @@ void arm_dot_prod_q31( uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inA3, inA4; @@ -116,7 +121,7 @@ void arm_dot_prod_q31( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c index 9cf0bf4034..bbf4dd61a7 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_dot_prod_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_dot_prod_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -71,7 +76,7 @@ void arm_dot_prod_q7( q31_t sum = 0; /* Temporary variables to store output */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -142,7 +147,7 @@ void arm_dot_prod_q7( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ /* Store the result in the destination buffer in 18.14 format */ diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c index 682931eacd..32532e15cc 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_mult_f32.c @@ -11,29 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -75,7 +77,7 @@ void arm_mult_f32( uint32_t blockSize) { uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t inA1, inA2, inA3, inA4; /* temporary input variables */ @@ -154,7 +156,7 @@ void arm_mult_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c index 00a522d97a..ac4266ca66 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_mult_q15.c @@ -11,29 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -70,7 +72,7 @@ void arm_mult_q15( { uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ @@ -133,7 +135,7 @@ void arm_mult_q15( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c index 4697a80626..9210c337ea 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_mult_q31.c @@ -11,29 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 -* Initial version +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -69,7 +71,7 @@ void arm_mult_q31( { uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inA3, inA4; /* temporary input variables */ @@ -124,7 +126,7 @@ void arm_mult_q31( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c index 1e65a77a9c..b8cb2002a0 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_mult_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_mult_q7.c @@ -11,32 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done -* -* Version 0.0.5 2010/04/26 -* incorporated review comments and updated with latest CMSIS layer -* -* Version 0.0.3 2010/03/10 DP -* Initial version +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -72,7 +71,7 @@ void arm_mult_q7( { uint32_t blkCnt; /* loop counters */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q7_t out1, out2, out3, out4; /* Temporary variables to store the product */ @@ -109,7 +108,7 @@ void arm_mult_q7( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c index b0f82896db..d887b8cdc0 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_negate_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -47,6 +52,10 @@ * 
        
  *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
  *
+ * + * The functions support in-place computation allowing the source and + * destination pointers to reference the same memory buffer. + * There are separate functions for floating-point, Q7, Q15, and Q31 data types. */ /** @@ -70,7 +79,7 @@ void arm_negate_f32( uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t in1, in2, in3, in4; /* temporary variables */ @@ -119,7 +128,7 @@ void arm_negate_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c index c47e03eeff..b55e0cd602 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_negate_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -68,7 +73,7 @@ void arm_negate_q15( uint32_t blkCnt; /* loop counter */ q15_t in; -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -118,7 +123,7 @@ void arm_negate_q15( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c index 362b54ecbc..b0332e0cf0 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_negate_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -65,7 +70,7 @@ void arm_negate_q31( q31_t in; /* Temporary variable */ uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in1, in2, in3, in4; @@ -104,7 +109,7 @@ void arm_negate_q31( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) @@ -112,7 +117,7 @@ void arm_negate_q31( /* C = -A */ /* Negate and then store the result in the destination buffer. */ in = *pSrc++; - *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in; + *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in; /* Decrement the loop counter */ blkCnt--; diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c index 64914d291e..9786c20d0d 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_negate_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_negate_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -65,7 +70,7 @@ void arm_negate_q7( uint32_t blkCnt; /* loop counter */ q7_t in; -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t input; /* Input values1-4 */ @@ -101,7 +106,7 @@ void arm_negate_q7( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c index d7ca663bbd..5efb45290e 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_offset_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -47,7 +52,9 @@ * pDst[n] = pSrc[n] + offset, 0 <= n < blockSize. * * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. + * The functions support in-place computation allowing the source and + * destination pointers to reference the same memory buffer. + * There are separate functions for floating-point, Q7, Q15, and Q31 data types. */ /** @@ -73,7 +80,7 @@ void arm_offset_f32( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t in1, in2, in3, in4; @@ -140,7 +147,7 @@ void arm_offset_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c index 0a06f4c9c1..d64ae4962c 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_offset_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_offset_q15( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t offset_packed; /* Offset packed to 32 bit */ @@ -122,7 +127,7 @@ void arm_offset_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c index 4c2997ce6d..9962419695 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_offset_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_offset_q31( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t in1, in2, in3, in4; @@ -126,7 +131,7 @@ void arm_offset_q31( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c index e54dba9dab..1e68841d53 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_offset_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_offset_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_offset_q7( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t offset_packed; /* Offset packed to 32 bit */ @@ -121,7 +126,7 @@ void arm_offset_q7( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c index 0baf3863fe..3e61ce563c 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_scale_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -61,6 +66,9 @@ * 
        
  *     scale = scaleFract * 2^shift.        
  *
+ * + * The functions support in-place computation allowing the source and destination + * pointers to reference the same memory buffer. */ /** @@ -85,7 +93,7 @@ void arm_scale_f32( uint32_t blockSize) { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t in1, in2, in3, in4; /* temporary variabels */ @@ -143,7 +151,7 @@ void arm_scale_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c index 9b35ffec66..9b60a02c85 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_scale_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -70,7 +75,7 @@ void arm_scale_q15( int8_t kShift = 15 - shift; /* shift to apply after scaling */ uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q15_t in1, in2, in3, in4; @@ -148,7 +153,7 @@ void arm_scale_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c index 3a0032a3cf..dec26f3378 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q31.c @@ -1,62 +1,67 @@ -/* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. -* -* $Date: 15. May 2012 -* $Revision: V1.1.0 -* -* Project: CMSIS DSP Library -* Title: arm_scale_q31.c -* -* Description: Multiplies a Q31 vector by a scalar. -* +/* ---------------------------------------------------------------------- +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. +* +* $Date: 17. January 2013 +* $Revision: V1.4.1 +* +* Project: CMSIS DSP Library +* Title: arm_scale_q31.c +* +* Description: Multiplies a Q31 vector by a scalar. +* * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" -/** - * @ingroup groupMath +/** + * @ingroup groupMath */ -/** - * @addtogroup scale - * @{ +/** + * @addtogroup scale + * @{ */ -/** - * @brief Multiplies a Q31 vector by a scalar. - * @param[in] *pSrc points to the input vector - * @param[in] scaleFract fractional portion of the scale value - * @param[in] shift number of bits to shift the result by - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in the vector - * @return none. - * - * Scaling and Overflow Behavior: - * \par - * The input data *pSrc and scaleFract are in 1.31 format. - * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. +/** + * @brief Multiplies a Q31 vector by a scalar. + * @param[in] *pSrc points to the input vector + * @param[in] scaleFract fractional portion of the scale value + * @param[in] shift number of bits to shift the result by + * @param[out] *pDst points to the output vector + * @param[in] blockSize number of samples in the vector + * @return none. + * + * Scaling and Overflow Behavior: + * \par + * The input data *pSrc and scaleFract are in 1.31 format. + * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format. */ void arm_scale_q31( @@ -71,7 +76,7 @@ void arm_scale_q31( uint32_t blkCnt; /* loop counter */ q31_t in, out; -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -84,7 +89,7 @@ void arm_scale_q31( if(sign == 0u) { - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. + /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { @@ -138,9 +143,7 @@ void arm_scale_q31( } else { - kShift = -kShift; - - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. + /* First part of the processing with loop unrolling. Compute 4 outputs at a time. ** a second loop below computes the remaining 1 to 3 samples. */ while(blkCnt > 0u) { @@ -157,11 +160,11 @@ void arm_scale_q31( in4 = ((q63_t) in4 * scaleFract) >> 32; /* apply shifting */ - out1 = in1 >> kShift; - out2 = in2 >> kShift; + out1 = in1 >> -kShift; + out2 = in2 >> -kShift; - out3 = in3 >> kShift; - out4 = in4 >> kShift; + out3 = in3 >> -kShift; + out4 = in4 >> -kShift; /* Store result destination */ *pDst = out1; @@ -178,46 +181,59 @@ void arm_scale_q31( blkCnt--; } } - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. + /* If the blockSize is not a multiple of 4, compute any remaining output samples here. ** No loop unrolling is used. */ blkCnt = blockSize % 0x4u; #else /* Run the below code for Cortex-M0 */ - if(sign != 0u) - kShift = -kShift; /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ - while(blkCnt > 0u) + if(sign == 0) { - /* C = A * scale */ - /* Scale the input and then store the result in the destination buffer. */ - in = *pSrc++; - in = ((q63_t) in * scaleFract) >> 32; + while(blkCnt > 0u) + { + /* C = A * scale */ + /* Scale the input and then store the result in the destination buffer. */ + in = *pSrc++; + in = ((q63_t) in * scaleFract) >> 32; - if(sign == 0) - { - out = in << kShift; - if(in != (out >> kShift)) - out = 0x7FFFFFFF ^ (in >> 31); - } - else - { - out = in >> kShift; - } + out = in << kShift; + + if(in != (out >> kShift)) + out = 0x7FFFFFFF ^ (in >> 31); - *pDst++ = out; + *pDst++ = out; - /* Decrement the loop counter */ - blkCnt--; + /* Decrement the loop counter */ + blkCnt--; + } + } + else + { + while(blkCnt > 0u) + { + /* C = A * scale */ + /* Scale the input and then store the result in the destination buffer. */ + in = *pSrc++; + in = ((q63_t) in * scaleFract) >> 32; + + out = in >> -kShift; + + *pDst++ = out; + + /* Decrement the loop counter */ + blkCnt--; + } + } } -/** - * @} end of scale group +/** + * @} end of scale group */ diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c index c899d91044..04e61b2e08 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_scale_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_scale_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -69,7 +74,7 @@ void arm_scale_q7( int8_t kShift = 7 - shift; /* shift to apply after scaling */ uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q7_t in1, in2, in3, in4, out1, out2, out3, out4; /* Temporary variables to store input & output */ @@ -135,7 +140,7 @@ void arm_scale_q7( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c index b2ee2a5a41..d04d79d59e 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_shift_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -67,7 +72,7 @@ void arm_shift_q15( uint32_t blkCnt; /* loop counter */ uint8_t sign; /* Sign of shiftBits */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -234,7 +239,7 @@ void arm_shift_q15( } } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c index 799035e80c..bf7d6006e3 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_shift_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -51,6 +56,9 @@ * * If shift is positive then the elements of the vector are shifted to the left. * If shift is negative then the elements of the vector are shifted to the right. + * + * The functions support in-place computation allowing the source and destination + * pointers to reference the same memory buffer. */ /** @@ -82,7 +90,7 @@ void arm_shift_q31( uint32_t blkCnt; /* loop counter */ uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY q31_t in1, in2, in3, in4; /* Temporary input variables */ q31_t out1, out2, out3, out4; /* Temporary output variables */ @@ -173,7 +181,7 @@ void arm_shift_q31( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c index 687a333234..3d7752afa7 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_shift_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_shift_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -72,7 +77,7 @@ void arm_shift_q7( uint32_t blkCnt; /* loop counter */ uint8_t sign; /* Sign of shiftBits */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q7_t in1; /* Input value1 */ @@ -207,7 +212,7 @@ void arm_shift_q7( } } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } /** diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c index 0fcd328693..b981f4e48c 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_f32.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_sub_f32.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- */ #include "arm_math.h" @@ -74,7 +79,7 @@ void arm_sub_f32( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ float32_t inA1, inA2, inA3, inA4; /* temporary variables */ @@ -127,7 +132,7 @@ void arm_sub_f32( /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ while(blkCnt > 0u) { diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c index c372c12357..76f418368a 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q15.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_sub_q15.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -67,7 +72,7 @@ void arm_sub_q15( uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2; @@ -125,7 +130,7 @@ void arm_sub_q15( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c index 829f25db0b..62e1d4f9b0 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q31.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_sub_q31.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -67,7 +72,7 @@ void arm_sub_q31( uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ q31_t inA1, inA2, inA3, inA4; @@ -132,7 +137,7 @@ void arm_sub_q31( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c index 0bbaf8f055..c24fd86914 100644 --- a/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c +++ b/libraries/dsp/cmsis_dsp/BasicMathFunctions/arm_sub_q7.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_sub_q7.c @@ -11,26 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. -* -* Version 0.0.7 2010/06/10 -* Misra-C changes done +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ #include "arm_math.h" @@ -66,7 +71,7 @@ void arm_sub_q7( { uint32_t blkCnt; /* loop counter */ -#ifndef ARM_MATH_CM0 +#ifndef ARM_MATH_CM0_FAMILY /* Run the below code for Cortex-M4 and Cortex-M3 */ @@ -116,7 +121,7 @@ void arm_sub_q7( blkCnt--; } -#endif /* #ifndef ARM_MATH_CM0 */ +#endif /* #ifndef ARM_MATH_CM0_FAMILY */ } diff --git a/libraries/dsp/cmsis_dsp/CommonTables/arm_common_tables.c b/libraries/dsp/cmsis_dsp/CommonTables/arm_common_tables.c index eeea42387f..a4e784d182 100644 --- a/libraries/dsp/cmsis_dsp/CommonTables/arm_common_tables.c +++ b/libraries/dsp/cmsis_dsp/CommonTables/arm_common_tables.c @@ -1,8 +1,8 @@ /* ---------------------------------------------------------------------- -* Copyright (C) 2010 ARM Limited. All rights reserved. +* Copyright (C) 2010-2013 ARM Limited. All rights reserved. * -* $Date: 15. February 2012 -* $Revision: V1.1.0 +* $Date: 17. January 2013 +* $Revision: V1.4.1 * * Project: CMSIS DSP Library * Title: arm_common_tables.c @@ -11,23 +11,31 @@ * * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 * -* Version 1.1.0 2012/02/15 -* Updated with more optimizations, bug fixes and minor API changes. -* -* Version 1.0.10 2011/7/15 -* Big Endian support added and Merged M0 and M3/M4 Source code. -* -* Version 1.0.3 2010/11/29 -* Re-organized the CMSIS folders and updated documentation. -* -* Version 1.0.2 2010/11/11 -* Documentation updated. -* -* Version 1.0.1 2010/10/05 -* Production release and review comments incorporated. -* -* Version 1.0.0 2010/09/20 -* Production release and review comments incorporated. +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* - Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* - Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in +* the documentation and/or other materials provided with the +* distribution. +* - Neither the name of ARM LIMITED nor the names of its contributors +* may be used to endorse or promote products derived from this +* software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. * -------------------------------------------------------------------- */ @@ -224,12 +232,11 @@ const uint16_t armBitRevTable[1024] = { * @brief Floating-point Twiddle factors Table Generation */ - /** * \par * Example code for Floating-point Twiddle factors Generation: * \par -* 
for(i = 0; i< 3N/4; i++)    
+* 
for(i = 0; i< N/; i++)    
 * {    
 *	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
 *	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
@@ -240,2055 +247,8327 @@ const uint16_t armBitRevTable[1024] = {
 * Cos and Sin values are in interleaved fashion    
 *     
 */
-const float32_t twiddleCoef[6144] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999998823451701880f,
-    0.001533980186284766f, 0.999995293809576190f, 0.003067956762965976f,
-  0.999989411081928400f, 0.004601926120448571f, 0.999981175282601110f,
-    0.006135884649154475f, 0.999970586430974140f, 0.007669828739531097f,
-  0.999957644551963900f, 0.009203754782059819f, 0.999942349676023910f,
-    0.010737659167264491f, 0.999924701839144500f, 0.012271538285719925f,
-  0.999904701082852900f, 0.013805388528060391f, 0.999882347454212560f,
-    0.015339206284988100f, 0.999857641005823860f, 0.016872987947281710f,
-  0.999830581795823400f, 0.018406729905804820f, 0.999801169887884260f,
-    0.019940428551514441f, 0.999769405351215280f, 0.021474080275469508f,
-  0.999735288260561680f, 0.023007681468839369f, 0.999698818696204250f,
-    0.024541228522912288f, 0.999659996743959220f, 0.026074717829103901f,
-  0.999618822495178640f, 0.027608145778965740f, 0.999575296046749220f,
-    0.029141508764193722f, 0.999529417501093140f, 0.030674803176636626f,
-  0.999481186966166950f, 0.032208025408304586f, 0.999430604555461730f,
-    0.033741171851377580f, 0.999377670388002850f, 0.035274238898213947f,
-  0.999322384588349540f, 0.036807222941358832f, 0.999264747286594420f,
-    0.038340120373552694f, 0.999204758618363890f, 0.039872927587739811f,
-  0.999142418724816910f, 0.041405640977076739f, 0.999077727752645360f,
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-  -0.101069862754827990f, -0.994879330794805620f, -0.099543618660069347f,
-    -0.995033199438118630f, -0.098017140329560451f, -0.995184726672196930f,
-  -0.096490431355253162f, -0.995333912140482170f, -0.094963495329639408f,
-    -0.995480755491926940f, -0.093436335845748036f, -0.995625256380994310f,
-  -0.091908956497132821f, -0.995767414467659820f, -0.090381360877864914f,
-    -0.995907229417411720f, -0.088853552582524364f, -0.996044700901251970f,
-  -0.087325535206192559f, -0.996179828595696870f, -0.085797312344440227f,
-    -0.996312612182778000f, -0.084268887593324238f, -0.996443051350042630f,
-  -0.082740264549375706f, -0.996571145790554840f, -0.081211446809592289f,
-    -0.996696895202896060f, -0.079682437971430695f, -0.996820299291165670f,
-  -0.078153241632794648f, -0.996941357764982050f, -0.076623861392031742f,
-    -0.997060070339482960f, -0.075094300847921402f, -0.997176436735326080f,
-  -0.073564563599667357f, -0.997290456678690210f, -0.072034653246889097f,
-    -0.997402129901275300f, -0.070504573389614356f, -0.997511456140303450f,
-  -0.068974327628267079f, -0.997618435138519550f, -0.067443919563664231f,
-    -0.997723066644191640f, -0.065913352797003832f, -0.997825350411111640f,
-  -0.064382630929857312f, -0.997925286198596000f, -0.062851757564161989f,
-    -0.998022873771486130f, -0.061320736302208995f, -0.998118112900149180f,
-  -0.059789570746640132f, -0.998211003360478190f, -0.058258264500435857f,
-    -0.998301544933892780f, -0.056726821166907686f, -0.998389737407340160f,
-  -0.055195244349689712f, -0.998475580573294770f, -0.053663537652731026f,
-    -0.998559074229759310f, -0.052131704680283657f, -0.998640218180265160f,
-  -0.050599749036899455f, -0.998719012233872940f, -0.049067674327418029f,
-    -0.998795456205172410f, -0.047535484156959157f, -0.998869549914283560f,
-  -0.046003182130915206f, -0.998941293186856870f, -0.044470771854939084f,
-    -0.999010685854073270f, -0.042938256934941084f, -0.999077727752645360f,
-  -0.041405640977076837f, -0.999142418724816910f, -0.039872927587739748f,
-    -0.999204758618363890f, -0.038340120373552472f, -0.999264747286594420f,
-  -0.036807222941359331f, -0.999322384588349430f, -0.035274238898214294f,
-    -0.999377670388002850f, -0.033741171851377760f, -0.999430604555461730f,
-  -0.032208025408304600f, -0.999481186966166950f, -0.030674803176636484f,
-    -0.999529417501093140f, -0.029141508764194309f, -0.999575296046749220f,
-  -0.027608145778966163f, -0.999618822495178640f, -0.026074717829104161f,
-    -0.999659996743959220f, -0.024541228522912389f, -0.999698818696204250f,
-  -0.023007681468839310f, -0.999735288260561680f, -0.021474080275469286f,
-    -0.999769405351215280f, -0.019940428551514944f, -0.999801169887884260f,
-  -0.018406729905805164f, -0.999830581795823400f, -0.016872987947281894f,
-    -0.999857641005823860f, -0.015339206284988121f, -0.999882347454212560f,
-  -0.013805388528060250f, -0.999904701082852900f, -0.012271538285720512f,
-    -0.999924701839144500f, -0.010737659167264916f, -0.999942349676023910f,
-  -0.009203754782060083f, -0.999957644551963900f, -0.007669828739531199f,
-    -0.999970586430974140f, -0.006135884649154416f, -0.999981175282601110f,
-  -0.004601926120448350f, -0.999989411081928400f, -0.003067956762966483f,
-    -0.999995293809576190f, -0.001533980186285111f, -0.999998823451701880f,
+const float32_t twiddleCoef_16[32] = {
+    1.000000000f,  0.000000000f,
+    0.923879533f,  0.382683432f,
+    0.707106781f,  0.707106781f,
+    0.382683432f,  0.923879533f,
+    0.000000000f,  1.000000000f,
+   -0.382683432f,  0.923879533f,
+   -0.707106781f,  0.707106781f,
+   -0.923879533f,  0.382683432f,
+   -1.000000000f,  0.000000000f,
+   -0.923879533f, -0.382683432f,
+   -0.707106781f, -0.707106781f,
+   -0.382683432f, -0.923879533f,
+   -0.000000000f, -1.000000000f,
+    0.382683432f, -0.923879533f,
+    0.707106781f, -0.707106781f,
+    0.923879533f, -0.382683432f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_32[64] = {
+    1.000000000f,  0.000000000f,
+    0.980785280f,  0.195090322f,
+    0.923879533f,  0.382683432f,
+    0.831469612f,  0.555570233f,
+    0.707106781f,  0.707106781f,
+    0.555570233f,  0.831469612f,
+    0.382683432f,  0.923879533f,
+    0.195090322f,  0.980785280f,
+    0.000000000f,  1.000000000f,
+   -0.195090322f,  0.980785280f,
+   -0.382683432f,  0.923879533f,
+   -0.555570233f,  0.831469612f,
+   -0.707106781f,  0.707106781f,
+   -0.831469612f,  0.555570233f,
+   -0.923879533f,  0.382683432f,
+   -0.980785280f,  0.195090322f,
+   -1.000000000f,  0.000000000f,
+   -0.980785280f, -0.195090322f,
+   -0.923879533f, -0.382683432f,
+   -0.831469612f, -0.555570233f,
+   -0.707106781f, -0.707106781f,
+   -0.555570233f, -0.831469612f,
+   -0.382683432f, -0.923879533f,
+   -0.195090322f, -0.980785280f,
+   -0.000000000f, -1.000000000f,
+    0.195090322f, -0.980785280f,
+    0.382683432f, -0.923879533f,
+    0.555570233f, -0.831469612f,
+    0.707106781f, -0.707106781f,
+    0.831469612f, -0.555570233f,
+    0.923879533f, -0.382683432f,
+    0.980785280f, -0.195090322f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_64[128] = {
+    1.000000000f,  0.000000000f,
+    0.995184727f,  0.098017140f,
+    0.980785280f,  0.195090322f,
+    0.956940336f,  0.290284677f,
+    0.923879533f,  0.382683432f,
+    0.881921264f,  0.471396737f,
+    0.831469612f,  0.555570233f,
+    0.773010453f,  0.634393284f,
+    0.707106781f,  0.707106781f,
+    0.634393284f,  0.773010453f,
+    0.555570233f,  0.831469612f,
+    0.471396737f,  0.881921264f,
+    0.382683432f,  0.923879533f,
+    0.290284677f,  0.956940336f,
+    0.195090322f,  0.980785280f,
+    0.098017140f,  0.995184727f,
+    0.000000000f,  1.000000000f,
+   -0.098017140f,  0.995184727f,
+   -0.195090322f,  0.980785280f,
+   -0.290284677f,  0.956940336f,
+   -0.382683432f,  0.923879533f,
+   -0.471396737f,  0.881921264f,
+   -0.555570233f,  0.831469612f,
+   -0.634393284f,  0.773010453f,
+   -0.707106781f,  0.707106781f,
+   -0.773010453f,  0.634393284f,
+   -0.831469612f,  0.555570233f,
+   -0.881921264f,  0.471396737f,
+   -0.923879533f,  0.382683432f,
+   -0.956940336f,  0.290284677f,
+   -0.980785280f,  0.195090322f,
+   -0.995184727f,  0.098017140f,
+   -1.000000000f,  0.000000000f,
+   -0.995184727f, -0.098017140f,
+   -0.980785280f, -0.195090322f,
+   -0.956940336f, -0.290284677f,
+   -0.923879533f, -0.382683432f,
+   -0.881921264f, -0.471396737f,
+   -0.831469612f, -0.555570233f,
+   -0.773010453f, -0.634393284f,
+   -0.707106781f, -0.707106781f,
+   -0.634393284f, -0.773010453f,
+   -0.555570233f, -0.831469612f,
+   -0.471396737f, -0.881921264f,
+   -0.382683432f, -0.923879533f,
+   -0.290284677f, -0.956940336f,
+   -0.195090322f, -0.980785280f,
+   -0.098017140f, -0.995184727f,
+   -0.000000000f, -1.000000000f,
+    0.098017140f, -0.995184727f,
+    0.195090322f, -0.980785280f,
+    0.290284677f, -0.956940336f,
+    0.382683432f, -0.923879533f,
+    0.471396737f, -0.881921264f,
+    0.555570233f, -0.831469612f,
+    0.634393284f, -0.773010453f,
+    0.707106781f, -0.707106781f,
+    0.773010453f, -0.634393284f,
+    0.831469612f, -0.555570233f,
+    0.881921264f, -0.471396737f,
+    0.923879533f, -0.382683432f,
+    0.956940336f, -0.290284677f,
+    0.980785280f, -0.195090322f,
+    0.995184727f, -0.098017140f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+
+const float32_t twiddleCoef_128[256] = {
+1.000000000f	,	0.000000000f	,
+0.998795456f	,	0.049067674f	,
+0.995184727f	,	0.098017140f	,
+0.989176510f	,	0.146730474f	,
+0.980785280f	,	0.195090322f	,
+0.970031253f	,	0.242980180f	,
+0.956940336f	,	0.290284677f	,
+0.941544065f	,	0.336889853f	,
+0.923879533f	,	0.382683432f	,
+0.903989293f	,	0.427555093f	,
+0.881921264f	,	0.471396737f	,
+0.857728610f	,	0.514102744f	,
+0.831469612f	,	0.555570233f	,
+0.803207531f	,	0.595699304f	,
+0.773010453f	,	0.634393284f	,
+0.740951125f	,	0.671558955f	,
+0.707106781f	,	0.707106781f	,
+0.671558955f	,	0.740951125f	,
+0.634393284f	,	0.773010453f	,
+0.595699304f	,	0.803207531f	,
+0.555570233f	,	0.831469612f	,
+0.514102744f	,	0.857728610f	,
+0.471396737f	,	0.881921264f	,
+0.427555093f	,	0.903989293f	,
+0.382683432f	,	0.923879533f	,
+0.336889853f	,	0.941544065f	,
+0.290284677f	,	0.956940336f	,
+0.242980180f	,	0.970031253f	,
+0.195090322f	,	0.980785280f	,
+0.146730474f	,	0.989176510f	,
+0.098017140f	,	0.995184727f	,
+0.049067674f	,	0.998795456f	,
+0.000000000f	,	1.000000000f	,
+-0.049067674f	,	0.998795456f	,
+-0.098017140f	,	0.995184727f	,
+-0.146730474f	,	0.989176510f	,
+-0.195090322f	,	0.980785280f	,
+-0.242980180f	,	0.970031253f	,
+-0.290284677f	,	0.956940336f	,
+-0.336889853f	,	0.941544065f	,
+-0.382683432f	,	0.923879533f	,
+-0.427555093f	,	0.903989293f	,
+-0.471396737f	,	0.881921264f	,
+-0.514102744f	,	0.857728610f	,
+-0.555570233f	,	0.831469612f	,
+-0.595699304f	,	0.803207531f	,
+-0.634393284f	,	0.773010453f	,
+-0.671558955f	,	0.740951125f	,
+-0.707106781f	,	0.707106781f	,
+-0.740951125f	,	0.671558955f	,
+-0.773010453f	,	0.634393284f	,
+-0.803207531f	,	0.595699304f	,
+-0.831469612f	,	0.555570233f	,
+-0.857728610f	,	0.514102744f	,
+-0.881921264f	,	0.471396737f	,
+-0.903989293f	,	0.427555093f	,
+-0.923879533f	,	0.382683432f	,
+-0.941544065f	,	0.336889853f	,
+-0.956940336f	,	0.290284677f	,
+-0.970031253f	,	0.242980180f	,
+-0.980785280f	,	0.195090322f	,
+-0.989176510f	,	0.146730474f	,
+-0.995184727f	,	0.098017140f	,
+-0.998795456f	,	0.049067674f	,
+-1.000000000f	,	0.000000000f	,
+-0.998795456f	,	-0.049067674f	,
+-0.995184727f	,	-0.098017140f	,
+-0.989176510f	,	-0.146730474f	,
+-0.980785280f	,	-0.195090322f	,
+-0.970031253f	,	-0.242980180f	,
+-0.956940336f	,	-0.290284677f	,
+-0.941544065f	,	-0.336889853f	,
+-0.923879533f	,	-0.382683432f	,
+-0.903989293f	,	-0.427555093f	,
+-0.881921264f	,	-0.471396737f	,
+-0.857728610f	,	-0.514102744f	,
+-0.831469612f	,	-0.555570233f	,
+-0.803207531f	,	-0.595699304f	,
+-0.773010453f	,	-0.634393284f	,
+-0.740951125f	,	-0.671558955f	,
+-0.707106781f	,	-0.707106781f	,
+-0.671558955f	,	-0.740951125f	,
+-0.634393284f	,	-0.773010453f	,
+-0.595699304f	,	-0.803207531f	,
+-0.555570233f	,	-0.831469612f	,
+-0.514102744f	,	-0.857728610f	,
+-0.471396737f	,	-0.881921264f	,
+-0.427555093f	,	-0.903989293f	,
+-0.382683432f	,	-0.923879533f	,
+-0.336889853f	,	-0.941544065f	,
+-0.290284677f	,	-0.956940336f	,
+-0.242980180f	,	-0.970031253f	,
+-0.195090322f	,	-0.980785280f	,
+-0.146730474f	,	-0.989176510f	,
+-0.098017140f	,	-0.995184727f	,
+-0.049067674f	,	-0.998795456f	,
+-0.000000000f	,	-1.000000000f	,
+0.049067674f	,	-0.998795456f	,
+0.098017140f	,	-0.995184727f	,
+0.146730474f	,	-0.989176510f	,
+0.195090322f	,	-0.980785280f	,
+0.242980180f	,	-0.970031253f	,
+0.290284677f	,	-0.956940336f	,
+0.336889853f	,	-0.941544065f	,
+0.382683432f	,	-0.923879533f	,
+0.427555093f	,	-0.903989293f	,
+0.471396737f	,	-0.881921264f	,
+0.514102744f	,	-0.857728610f	,
+0.555570233f	,	-0.831469612f	,
+0.595699304f	,	-0.803207531f	,
+0.634393284f	,	-0.773010453f	,
+0.671558955f	,	-0.740951125f	,
+0.707106781f	,	-0.707106781f	,
+0.740951125f	,	-0.671558955f	,
+0.773010453f	,	-0.634393284f	,
+0.803207531f	,	-0.595699304f	,
+0.831469612f	,	-0.555570233f	,
+0.857728610f	,	-0.514102744f	,
+0.881921264f	,	-0.471396737f	,
+0.903989293f	,	-0.427555093f	,
+0.923879533f	,	-0.382683432f	,
+0.941544065f	,	-0.336889853f	,
+0.956940336f	,	-0.290284677f	,
+0.970031253f	,	-0.242980180f	,
+0.980785280f	,	-0.195090322f	,
+0.989176510f	,	-0.146730474f	,
+0.995184727f	,	-0.098017140f	,
+0.998795456f	,	-0.049067674f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_256[512] = {
+    1.000000000f,  0.000000000f,
+    0.999698819f,  0.024541229f,
+    0.998795456f,  0.049067674f,
+    0.997290457f,  0.073564564f,
+    0.995184727f,  0.098017140f,
+    0.992479535f,  0.122410675f,
+    0.989176510f,  0.146730474f,
+    0.985277642f,  0.170961889f,
+    0.980785280f,  0.195090322f,
+    0.975702130f,  0.219101240f,
+    0.970031253f,  0.242980180f,
+    0.963776066f,  0.266712757f,
+    0.956940336f,  0.290284677f,
+    0.949528181f,  0.313681740f,
+    0.941544065f,  0.336889853f,
+    0.932992799f,  0.359895037f,
+    0.923879533f,  0.382683432f,
+    0.914209756f,  0.405241314f,
+    0.903989293f,  0.427555093f,
+    0.893224301f,  0.449611330f,
+    0.881921264f,  0.471396737f,
+    0.870086991f,  0.492898192f,
+    0.857728610f,  0.514102744f,
+    0.844853565f,  0.534997620f,
+    0.831469612f,  0.555570233f,
+    0.817584813f,  0.575808191f,
+    0.803207531f,  0.595699304f,
+    0.788346428f,  0.615231591f,
+    0.773010453f,  0.634393284f,
+    0.757208847f,  0.653172843f,
+    0.740951125f,  0.671558955f,
+    0.724247083f,  0.689540545f,
+    0.707106781f,  0.707106781f,
+    0.689540545f,  0.724247083f,
+    0.671558955f,  0.740951125f,
+    0.653172843f,  0.757208847f,
+    0.634393284f,  0.773010453f,
+    0.615231591f,  0.788346428f,
+    0.595699304f,  0.803207531f,
+    0.575808191f,  0.817584813f,
+    0.555570233f,  0.831469612f,
+    0.534997620f,  0.844853565f,
+    0.514102744f,  0.857728610f,
+    0.492898192f,  0.870086991f,
+    0.471396737f,  0.881921264f,
+    0.449611330f,  0.893224301f,
+    0.427555093f,  0.903989293f,
+    0.405241314f,  0.914209756f,
+    0.382683432f,  0.923879533f,
+    0.359895037f,  0.932992799f,
+    0.336889853f,  0.941544065f,
+    0.313681740f,  0.949528181f,
+    0.290284677f,  0.956940336f,
+    0.266712757f,  0.963776066f,
+    0.242980180f,  0.970031253f,
+    0.219101240f,  0.975702130f,
+    0.195090322f,  0.980785280f,
+    0.170961889f,  0.985277642f,
+    0.146730474f,  0.989176510f,
+    0.122410675f,  0.992479535f,
+    0.098017140f,  0.995184727f,
+    0.073564564f,  0.997290457f,
+    0.049067674f,  0.998795456f,
+    0.024541229f,  0.999698819f,
+    0.000000000f,  1.000000000f,
+   -0.024541229f,  0.999698819f,
+   -0.049067674f,  0.998795456f,
+   -0.073564564f,  0.997290457f,
+   -0.098017140f,  0.995184727f,
+   -0.122410675f,  0.992479535f,
+   -0.146730474f,  0.989176510f,
+   -0.170961889f,  0.985277642f,
+   -0.195090322f,  0.980785280f,
+   -0.219101240f,  0.975702130f,
+   -0.242980180f,  0.970031253f,
+   -0.266712757f,  0.963776066f,
+   -0.290284677f,  0.956940336f,
+   -0.313681740f,  0.949528181f,
+   -0.336889853f,  0.941544065f,
+   -0.359895037f,  0.932992799f,
+   -0.382683432f,  0.923879533f,
+   -0.405241314f,  0.914209756f,
+   -0.427555093f,  0.903989293f,
+   -0.449611330f,  0.893224301f,
+   -0.471396737f,  0.881921264f,
+   -0.492898192f,  0.870086991f,
+   -0.514102744f,  0.857728610f,
+   -0.534997620f,  0.844853565f,
+   -0.555570233f,  0.831469612f,
+   -0.575808191f,  0.817584813f,
+   -0.595699304f,  0.803207531f,
+   -0.615231591f,  0.788346428f,
+   -0.634393284f,  0.773010453f,
+   -0.653172843f,  0.757208847f,
+   -0.671558955f,  0.740951125f,
+   -0.689540545f,  0.724247083f,
+   -0.707106781f,  0.707106781f,
+   -0.724247083f,  0.689540545f,
+   -0.740951125f,  0.671558955f,
+   -0.757208847f,  0.653172843f,
+   -0.773010453f,  0.634393284f,
+   -0.788346428f,  0.615231591f,
+   -0.803207531f,  0.595699304f,
+   -0.817584813f,  0.575808191f,
+   -0.831469612f,  0.555570233f,
+   -0.844853565f,  0.534997620f,
+   -0.857728610f,  0.514102744f,
+   -0.870086991f,  0.492898192f,
+   -0.881921264f,  0.471396737f,
+   -0.893224301f,  0.449611330f,
+   -0.903989293f,  0.427555093f,
+   -0.914209756f,  0.405241314f,
+   -0.923879533f,  0.382683432f,
+   -0.932992799f,  0.359895037f,
+   -0.941544065f,  0.336889853f,
+   -0.949528181f,  0.313681740f,
+   -0.956940336f,  0.290284677f,
+   -0.963776066f,  0.266712757f,
+   -0.970031253f,  0.242980180f,
+   -0.975702130f,  0.219101240f,
+   -0.980785280f,  0.195090322f,
+   -0.985277642f,  0.170961889f,
+   -0.989176510f,  0.146730474f,
+   -0.992479535f,  0.122410675f,
+   -0.995184727f,  0.098017140f,
+   -0.997290457f,  0.073564564f,
+   -0.998795456f,  0.049067674f,
+   -0.999698819f,  0.024541229f,
+   -1.000000000f,  0.000000000f,
+   -0.999698819f, -0.024541229f,
+   -0.998795456f, -0.049067674f,
+   -0.997290457f, -0.073564564f,
+   -0.995184727f, -0.098017140f,
+   -0.992479535f, -0.122410675f,
+   -0.989176510f, -0.146730474f,
+   -0.985277642f, -0.170961889f,
+   -0.980785280f, -0.195090322f,
+   -0.975702130f, -0.219101240f,
+   -0.970031253f, -0.242980180f,
+   -0.963776066f, -0.266712757f,
+   -0.956940336f, -0.290284677f,
+   -0.949528181f, -0.313681740f,
+   -0.941544065f, -0.336889853f,
+   -0.932992799f, -0.359895037f,
+   -0.923879533f, -0.382683432f,
+   -0.914209756f, -0.405241314f,
+   -0.903989293f, -0.427555093f,
+   -0.893224301f, -0.449611330f,
+   -0.881921264f, -0.471396737f,
+   -0.870086991f, -0.492898192f,
+   -0.857728610f, -0.514102744f,
+   -0.844853565f, -0.534997620f,
+   -0.831469612f, -0.555570233f,
+   -0.817584813f, -0.575808191f,
+   -0.803207531f, -0.595699304f,
+   -0.788346428f, -0.615231591f,
+   -0.773010453f, -0.634393284f,
+   -0.757208847f, -0.653172843f,
+   -0.740951125f, -0.671558955f,
+   -0.724247083f, -0.689540545f,
+   -0.707106781f, -0.707106781f,
+   -0.689540545f, -0.724247083f,
+   -0.671558955f, -0.740951125f,
+   -0.653172843f, -0.757208847f,
+   -0.634393284f, -0.773010453f,
+   -0.615231591f, -0.788346428f,
+   -0.595699304f, -0.803207531f,
+   -0.575808191f, -0.817584813f,
+   -0.555570233f, -0.831469612f,
+   -0.534997620f, -0.844853565f,
+   -0.514102744f, -0.857728610f,
+   -0.492898192f, -0.870086991f,
+   -0.471396737f, -0.881921264f,
+   -0.449611330f, -0.893224301f,
+   -0.427555093f, -0.903989293f,
+   -0.405241314f, -0.914209756f,
+   -0.382683432f, -0.923879533f,
+   -0.359895037f, -0.932992799f,
+   -0.336889853f, -0.941544065f,
+   -0.313681740f, -0.949528181f,
+   -0.290284677f, -0.956940336f,
+   -0.266712757f, -0.963776066f,
+   -0.242980180f, -0.970031253f,
+   -0.219101240f, -0.975702130f,
+   -0.195090322f, -0.980785280f,
+   -0.170961889f, -0.985277642f,
+   -0.146730474f, -0.989176510f,
+   -0.122410675f, -0.992479535f,
+   -0.098017140f, -0.995184727f,
+   -0.073564564f, -0.997290457f,
+   -0.049067674f, -0.998795456f,
+   -0.024541229f, -0.999698819f,
+   -0.000000000f, -1.000000000f,
+    0.024541229f, -0.999698819f,
+    0.049067674f, -0.998795456f,
+    0.073564564f, -0.997290457f,
+    0.098017140f, -0.995184727f,
+    0.122410675f, -0.992479535f,
+    0.146730474f, -0.989176510f,
+    0.170961889f, -0.985277642f,
+    0.195090322f, -0.980785280f,
+    0.219101240f, -0.975702130f,
+    0.242980180f, -0.970031253f,
+    0.266712757f, -0.963776066f,
+    0.290284677f, -0.956940336f,
+    0.313681740f, -0.949528181f,
+    0.336889853f, -0.941544065f,
+    0.359895037f, -0.932992799f,
+    0.382683432f, -0.923879533f,
+    0.405241314f, -0.914209756f,
+    0.427555093f, -0.903989293f,
+    0.449611330f, -0.893224301f,
+    0.471396737f, -0.881921264f,
+    0.492898192f, -0.870086991f,
+    0.514102744f, -0.857728610f,
+    0.534997620f, -0.844853565f,
+    0.555570233f, -0.831469612f,
+    0.575808191f, -0.817584813f,
+    0.595699304f, -0.803207531f,
+    0.615231591f, -0.788346428f,
+    0.634393284f, -0.773010453f,
+    0.653172843f, -0.757208847f,
+    0.671558955f, -0.740951125f,
+    0.689540545f, -0.724247083f,
+    0.707106781f, -0.707106781f,
+    0.724247083f, -0.689540545f,
+    0.740951125f, -0.671558955f,
+    0.757208847f, -0.653172843f,
+    0.773010453f, -0.634393284f,
+    0.788346428f, -0.615231591f,
+    0.803207531f, -0.595699304f,
+    0.817584813f, -0.575808191f,
+    0.831469612f, -0.555570233f,
+    0.844853565f, -0.534997620f,
+    0.857728610f, -0.514102744f,
+    0.870086991f, -0.492898192f,
+    0.881921264f, -0.471396737f,
+    0.893224301f, -0.449611330f,
+    0.903989293f, -0.427555093f,
+    0.914209756f, -0.405241314f,
+    0.923879533f, -0.382683432f,
+    0.932992799f, -0.359895037f,
+    0.941544065f, -0.336889853f,
+    0.949528181f, -0.313681740f,
+    0.956940336f, -0.290284677f,
+    0.963776066f, -0.266712757f,
+    0.970031253f, -0.242980180f,
+    0.975702130f, -0.219101240f,
+    0.980785280f, -0.195090322f,
+    0.985277642f, -0.170961889f,
+    0.989176510f, -0.146730474f,
+    0.992479535f, -0.122410675f,
+    0.995184727f, -0.098017140f,
+    0.997290457f, -0.073564564f,
+    0.998795456f, -0.049067674f,
+    0.999698819f, -0.024541229f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_512[1024] = {
+    1.000000000f,  0.000000000f,
+    0.999924702f,  0.012271538f,
+    0.999698819f,  0.024541229f,
+    0.999322385f,  0.036807223f,
+    0.998795456f,  0.049067674f,
+    0.998118113f,  0.061320736f,
+    0.997290457f,  0.073564564f,
+    0.996312612f,  0.085797312f,
+    0.995184727f,  0.098017140f,
+    0.993906970f,  0.110222207f,
+    0.992479535f,  0.122410675f,
+    0.990902635f,  0.134580709f,
+    0.989176510f,  0.146730474f,
+    0.987301418f,  0.158858143f,
+    0.985277642f,  0.170961889f,
+    0.983105487f,  0.183039888f,
+    0.980785280f,  0.195090322f,
+    0.978317371f,  0.207111376f,
+    0.975702130f,  0.219101240f,
+    0.972939952f,  0.231058108f,
+    0.970031253f,  0.242980180f,
+    0.966976471f,  0.254865660f,
+    0.963776066f,  0.266712757f,
+    0.960430519f,  0.278519689f,
+    0.956940336f,  0.290284677f,
+    0.953306040f,  0.302005949f,
+    0.949528181f,  0.313681740f,
+    0.945607325f,  0.325310292f,
+    0.941544065f,  0.336889853f,
+    0.937339012f,  0.348418680f,
+    0.932992799f,  0.359895037f,
+    0.928506080f,  0.371317194f,
+    0.923879533f,  0.382683432f,
+    0.919113852f,  0.393992040f,
+    0.914209756f,  0.405241314f,
+    0.909167983f,  0.416429560f,
+    0.903989293f,  0.427555093f,
+    0.898674466f,  0.438616239f,
+    0.893224301f,  0.449611330f,
+    0.887639620f,  0.460538711f,
+    0.881921264f,  0.471396737f,
+    0.876070094f,  0.482183772f,
+    0.870086991f,  0.492898192f,
+    0.863972856f,  0.503538384f,
+    0.857728610f,  0.514102744f,
+    0.851355193f,  0.524589683f,
+    0.844853565f,  0.534997620f,
+    0.838224706f,  0.545324988f,
+    0.831469612f,  0.555570233f,
+    0.824589303f,  0.565731811f,
+    0.817584813f,  0.575808191f,
+    0.810457198f,  0.585797857f,
+    0.803207531f,  0.595699304f,
+    0.795836905f,  0.605511041f,
+    0.788346428f,  0.615231591f,
+    0.780737229f,  0.624859488f,
+    0.773010453f,  0.634393284f,
+    0.765167266f,  0.643831543f,
+    0.757208847f,  0.653172843f,
+    0.749136395f,  0.662415778f,
+    0.740951125f,  0.671558955f,
+    0.732654272f,  0.680600998f,
+    0.724247083f,  0.689540545f,
+    0.715730825f,  0.698376249f,
+    0.707106781f,  0.707106781f,
+    0.698376249f,  0.715730825f,
+    0.689540545f,  0.724247083f,
+    0.680600998f,  0.732654272f,
+    0.671558955f,  0.740951125f,
+    0.662415778f,  0.749136395f,
+    0.653172843f,  0.757208847f,
+    0.643831543f,  0.765167266f,
+    0.634393284f,  0.773010453f,
+    0.624859488f,  0.780737229f,
+    0.615231591f,  0.788346428f,
+    0.605511041f,  0.795836905f,
+    0.595699304f,  0.803207531f,
+    0.585797857f,  0.810457198f,
+    0.575808191f,  0.817584813f,
+    0.565731811f,  0.824589303f,
+    0.555570233f,  0.831469612f,
+    0.545324988f,  0.838224706f,
+    0.534997620f,  0.844853565f,
+    0.524589683f,  0.851355193f,
+    0.514102744f,  0.857728610f,
+    0.503538384f,  0.863972856f,
+    0.492898192f,  0.870086991f,
+    0.482183772f,  0.876070094f,
+    0.471396737f,  0.881921264f,
+    0.460538711f,  0.887639620f,
+    0.449611330f,  0.893224301f,
+    0.438616239f,  0.898674466f,
+    0.427555093f,  0.903989293f,
+    0.416429560f,  0.909167983f,
+    0.405241314f,  0.914209756f,
+    0.393992040f,  0.919113852f,
+    0.382683432f,  0.923879533f,
+    0.371317194f,  0.928506080f,
+    0.359895037f,  0.932992799f,
+    0.348418680f,  0.937339012f,
+    0.336889853f,  0.941544065f,
+    0.325310292f,  0.945607325f,
+    0.313681740f,  0.949528181f,
+    0.302005949f,  0.953306040f,
+    0.290284677f,  0.956940336f,
+    0.278519689f,  0.960430519f,
+    0.266712757f,  0.963776066f,
+    0.254865660f,  0.966976471f,
+    0.242980180f,  0.970031253f,
+    0.231058108f,  0.972939952f,
+    0.219101240f,  0.975702130f,
+    0.207111376f,  0.978317371f,
+    0.195090322f,  0.980785280f,
+    0.183039888f,  0.983105487f,
+    0.170961889f,  0.985277642f,
+    0.158858143f,  0.987301418f,
+    0.146730474f,  0.989176510f,
+    0.134580709f,  0.990902635f,
+    0.122410675f,  0.992479535f,
+    0.110222207f,  0.993906970f,
+    0.098017140f,  0.995184727f,
+    0.085797312f,  0.996312612f,
+    0.073564564f,  0.997290457f,
+    0.061320736f,  0.998118113f,
+    0.049067674f,  0.998795456f,
+    0.036807223f,  0.999322385f,
+    0.024541229f,  0.999698819f,
+    0.012271538f,  0.999924702f,
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+    0.999698819f, -0.024541229f,
+    0.999924702f, -0.012271538f
+};
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_1024[2048] = {
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+0.993211949f	,	-0.116318631f	,
+0.993906970f	,	-0.110222207f	,
+0.994564571f	,	-0.104121634f	,
+0.995184727f	,	-0.098017140f	,
+0.995767414f	,	-0.091908956f	,
+0.996312612f	,	-0.085797312f	,
+0.996820299f	,	-0.079682438f	,
+0.997290457f	,	-0.073564564f	,
+0.997723067f	,	-0.067443920f	,
+0.998118113f	,	-0.061320736f	,
+0.998475581f	,	-0.055195244f	,
+0.998795456f	,	-0.049067674f	,
+0.999077728f	,	-0.042938257f	,
+0.999322385f	,	-0.036807223f	,
+0.999529418f	,	-0.030674803f	,
+0.999698819f	,	-0.024541229f	,
+0.999830582f	,	-0.018406730f	,
+0.999924702f	,	-0.012271538f	,
+0.999981175f	,	-0.006135885f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_2048[4096] = {
+    1.000000000f,  0.000000000f,
+    0.999995294f,  0.003067957f,
+    0.999981175f,  0.006135885f,
+    0.999957645f,  0.009203755f,
+    0.999924702f,  0.012271538f,
+    0.999882347f,  0.015339206f,
+    0.999830582f,  0.018406730f,
+    0.999769405f,  0.021474080f,
+    0.999698819f,  0.024541229f,
+    0.999618822f,  0.027608146f,
+    0.999529418f,  0.030674803f,
+    0.999430605f,  0.033741172f,
+    0.999322385f,  0.036807223f,
+    0.999204759f,  0.039872928f,
+    0.999077728f,  0.042938257f,
+    0.998941293f,  0.046003182f,
+    0.998795456f,  0.049067674f,
+    0.998640218f,  0.052131705f,
+    0.998475581f,  0.055195244f,
+    0.998301545f,  0.058258265f,
+    0.998118113f,  0.061320736f,
+    0.997925286f,  0.064382631f,
+    0.997723067f,  0.067443920f,
+    0.997511456f,  0.070504573f,
+    0.997290457f,  0.073564564f,
+    0.997060070f,  0.076623861f,
+    0.996820299f,  0.079682438f,
+    0.996571146f,  0.082740265f,
+    0.996312612f,  0.085797312f,
+    0.996044701f,  0.088853553f,
+    0.995767414f,  0.091908956f,
+    0.995480755f,  0.094963495f,
+    0.995184727f,  0.098017140f,
+    0.994879331f,  0.101069863f,
+    0.994564571f,  0.104121634f,
+    0.994240449f,  0.107172425f,
+    0.993906970f,  0.110222207f,
+    0.993564136f,  0.113270952f,
+    0.993211949f,  0.116318631f,
+    0.992850414f,  0.119365215f,
+    0.992479535f,  0.122410675f,
+    0.992099313f,  0.125454983f,
+    0.991709754f,  0.128498111f,
+    0.991310860f,  0.131540029f,
+    0.990902635f,  0.134580709f,
+    0.990485084f,  0.137620122f,
+    0.990058210f,  0.140658239f,
+    0.989622017f,  0.143695033f,
+    0.989176510f,  0.146730474f,
+    0.988721692f,  0.149764535f,
+    0.988257568f,  0.152797185f,
+    0.987784142f,  0.155828398f,
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+    0.966190003f, -0.257831102f,
+    0.966976471f, -0.254865660f,
+    0.967753837f, -0.251897818f,
+    0.968522094f, -0.248927606f,
+    0.969281235f, -0.245955050f,
+    0.970031253f, -0.242980180f,
+    0.970772141f, -0.240003022f,
+    0.971503891f, -0.237023606f,
+    0.972226497f, -0.234041959f,
+    0.972939952f, -0.231058108f,
+    0.973644250f, -0.228072083f,
+    0.974339383f, -0.225083911f,
+    0.975025345f, -0.222093621f,
+    0.975702130f, -0.219101240f,
+    0.976369731f, -0.216106797f,
+    0.977028143f, -0.213110320f,
+    0.977677358f, -0.210111837f,
+    0.978317371f, -0.207111376f,
+    0.978948175f, -0.204108966f,
+    0.979569766f, -0.201104635f,
+    0.980182136f, -0.198098411f,
+    0.980785280f, -0.195090322f,
+    0.981379193f, -0.192080397f,
+    0.981963869f, -0.189068664f,
+    0.982539302f, -0.186055152f,
+    0.983105487f, -0.183039888f,
+    0.983662419f, -0.180022901f,
+    0.984210092f, -0.177004220f,
+    0.984748502f, -0.173983873f,
+    0.985277642f, -0.170961889f,
+    0.985797509f, -0.167938295f,
+    0.986308097f, -0.164913120f,
+    0.986809402f, -0.161886394f,
+    0.987301418f, -0.158858143f,
+    0.987784142f, -0.155828398f,
+    0.988257568f, -0.152797185f,
+    0.988721692f, -0.149764535f,
+    0.989176510f, -0.146730474f,
+    0.989622017f, -0.143695033f,
+    0.990058210f, -0.140658239f,
+    0.990485084f, -0.137620122f,
+    0.990902635f, -0.134580709f,
+    0.991310860f, -0.131540029f,
+    0.991709754f, -0.128498111f,
+    0.992099313f, -0.125454983f,
+    0.992479535f, -0.122410675f,
+    0.992850414f, -0.119365215f,
+    0.993211949f, -0.116318631f,
+    0.993564136f, -0.113270952f,
+    0.993906970f, -0.110222207f,
+    0.994240449f, -0.107172425f,
+    0.994564571f, -0.104121634f,
+    0.994879331f, -0.101069863f,
+    0.995184727f, -0.098017140f,
+    0.995480755f, -0.094963495f,
+    0.995767414f, -0.091908956f,
+    0.996044701f, -0.088853553f,
+    0.996312612f, -0.085797312f,
+    0.996571146f, -0.082740265f,
+    0.996820299f, -0.079682438f,
+    0.997060070f, -0.076623861f,
+    0.997290457f, -0.073564564f,
+    0.997511456f, -0.070504573f,
+    0.997723067f, -0.067443920f,
+    0.997925286f, -0.064382631f,
+    0.998118113f, -0.061320736f,
+    0.998301545f, -0.058258265f,
+    0.998475581f, -0.055195244f,
+    0.998640218f, -0.052131705f,
+    0.998795456f, -0.049067674f,
+    0.998941293f, -0.046003182f,
+    0.999077728f, -0.042938257f,
+    0.999204759f, -0.039872928f,
+    0.999322385f, -0.036807223f,
+    0.999430605f, -0.033741172f,
+    0.999529418f, -0.030674803f,
+    0.999618822f, -0.027608146f,
+    0.999698819f, -0.024541229f,
+    0.999769405f, -0.021474080f,
+    0.999830582f, -0.018406730f,
+    0.999882347f, -0.015339206f,
+    0.999924702f, -0.012271538f,
+    0.999957645f, -0.009203755f,
+    0.999981175f, -0.006135885f,
+    0.999995294f, -0.003067957f
+};
+
+/**    
+* \par    
+* Example code for Floating-point Twiddle factors Generation:    
+* \par    
+* 
for(i = 0; i< N/; i++)    
+* {    
+*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
+*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
+* } 
    
+* \par    
+* where N = 4096	and PI = 3.14159265358979    
+* \par    
+* Cos and Sin values are in interleaved fashion    
+*     
+*/
+const float32_t twiddleCoef_4096[8192] = {
+    1.000000000f,  0.000000000f,
+    0.999998823f,  0.001533980f,
+    0.999995294f,  0.003067957f,
+    0.999989411f,  0.004601926f,
+    0.999981175f,  0.006135885f,
+    0.999970586f,  0.007669829f,
+    0.999957645f,  0.009203755f,
+    0.999942350f,  0.010737659f,
+    0.999924702f,  0.012271538f,
+    0.999904701f,  0.013805389f,
+    0.999882347f,  0.015339206f,
+    0.999857641f,  0.016872988f,
+    0.999830582f,  0.018406730f,
+    0.999801170f,  0.019940429f,
+    0.999769405f,  0.021474080f,
+    0.999735288f,  0.023007681f,
+    0.999698819f,  0.024541229f,
+    0.999659997f,  0.026074718f,
+    0.999618822f,  0.027608146f,
+    0.999575296f,  0.029141509f,
+    0.999529418f,  0.030674803f,
+    0.999481187f,  0.032208025f,
+    0.999430605f,  0.033741172f,
+    0.999377670f,  0.035274239f,
+    0.999322385f,  0.036807223f,
+    0.999264747f,  0.038340120f,
+    0.999204759f,  0.039872928f,
+    0.999142419f,  0.041405641f,
+    0.999077728f,  0.042938257f,
+    0.999010686f,  0.044470772f,
+    0.998941293f,  0.046003182f,
+    0.998869550f,  0.047535484f,
+    0.998795456f,  0.049067674f,
+    0.998719012f,  0.050599749f,
+    0.998640218f,  0.052131705f,
+    0.998559074f,  0.053663538f,
+    0.998475581f,  0.055195244f,
+    0.998389737f,  0.056726821f,
+    0.998301545f,  0.058258265f,
+    0.998211003f,  0.059789571f,
+    0.998118113f,  0.061320736f,
+    0.998022874f,  0.062851758f,
+    0.997925286f,  0.064382631f,
+    0.997825350f,  0.065913353f,
+    0.997723067f,  0.067443920f,
+    0.997618435f,  0.068974328f,
+    0.997511456f,  0.070504573f,
+    0.997402130f,  0.072034653f,
+    0.997290457f,  0.073564564f,
+    0.997176437f,  0.075094301f,
+    0.997060070f,  0.076623861f,
+    0.996941358f,  0.078153242f,
+    0.996820299f,  0.079682438f,
+    0.996696895f,  0.081211447f,
+    0.996571146f,  0.082740265f,
+    0.996443051f,  0.084268888f,
+    0.996312612f,  0.085797312f,
+    0.996179829f,  0.087325535f,
+    0.996044701f,  0.088853553f,
+    0.995907229f,  0.090381361f,
+    0.995767414f,  0.091908956f,
+    0.995625256f,  0.093436336f,
+    0.995480755f,  0.094963495f,
+    0.995333912f,  0.096490431f,
+    0.995184727f,  0.098017140f,
+    0.995033199f,  0.099543619f,
+    0.994879331f,  0.101069863f,
+    0.994723121f,  0.102595869f,
+    0.994564571f,  0.104121634f,
+    0.994403680f,  0.105647154f,
+    0.994240449f,  0.107172425f,
+    0.994074879f,  0.108697444f,
+    0.993906970f,  0.110222207f,
+    0.993736722f,  0.111746711f,
+    0.993564136f,  0.113270952f,
+    0.993389211f,  0.114794927f,
+    0.993211949f,  0.116318631f,
+    0.993032350f,  0.117842062f,
+    0.992850414f,  0.119365215f,
+    0.992666142f,  0.120888087f,
+    0.992479535f,  0.122410675f,
+    0.992290591f,  0.123932975f,
+    0.992099313f,  0.125454983f,
+    0.991905700f,  0.126976696f,
+    0.991709754f,  0.128498111f,
+    0.991511473f,  0.130019223f,
+    0.991310860f,  0.131540029f,
+    0.991107914f,  0.133060525f,
+    0.990902635f,  0.134580709f,
+    0.990695025f,  0.136100575f,
+    0.990485084f,  0.137620122f,
+    0.990272812f,  0.139139344f,
+    0.990058210f,  0.140658239f,
+    0.989841278f,  0.142176804f,
+    0.989622017f,  0.143695033f,
+    0.989400428f,  0.145212925f,
+    0.989176510f,  0.146730474f,
+    0.988950265f,  0.148247679f,
+    0.988721692f,  0.149764535f,
+    0.988490793f,  0.151281038f,
+    0.988257568f,  0.152797185f,
+    0.988022017f,  0.154312973f,
+    0.987784142f,  0.155828398f,
+    0.987543942f,  0.157343456f,
+    0.987301418f,  0.158858143f,
+    0.987056571f,  0.160372457f,
+    0.986809402f,  0.161886394f,
+    0.986559910f,  0.163399949f,
+    0.986308097f,  0.164913120f,
+    0.986053963f,  0.166425904f,
+    0.985797509f,  0.167938295f,
+    0.985538735f,  0.169450291f,
+    0.985277642f,  0.170961889f,
+    0.985014231f,  0.172473084f,
+    0.984748502f,  0.173983873f,
+    0.984480455f,  0.175494253f,
+    0.984210092f,  0.177004220f,
+    0.983937413f,  0.178513771f,
+    0.983662419f,  0.180022901f,
+    0.983385110f,  0.181531608f,
+    0.983105487f,  0.183039888f,
+    0.982823551f,  0.184547737f,
+    0.982539302f,  0.186055152f,
+    0.982252741f,  0.187562129f,
+    0.981963869f,  0.189068664f,
+    0.981672686f,  0.190574755f,
+    0.981379193f,  0.192080397f,
+    0.981083391f,  0.193585587f,
+    0.980785280f,  0.195090322f,
+    0.980484862f,  0.196594598f,
+    0.980182136f,  0.198098411f,
+    0.979877104f,  0.199601758f,
+    0.979569766f,  0.201104635f,
+    0.979260123f,  0.202607039f,
+    0.978948175f,  0.204108966f,
+    0.978633924f,  0.205610413f,
+    0.978317371f,  0.207111376f,
+    0.977998515f,  0.208611852f,
+    0.977677358f,  0.210111837f,
+    0.977353900f,  0.211611327f,
+    0.977028143f,  0.213110320f,
+    0.976700086f,  0.214608811f,
+    0.976369731f,  0.216106797f,
+    0.976037079f,  0.217604275f,
+    0.975702130f,  0.219101240f,
+    0.975364885f,  0.220597690f,
+    0.975025345f,  0.222093621f,
+    0.974683511f,  0.223589029f,
+    0.974339383f,  0.225083911f,
+    0.973992962f,  0.226578264f,
+    0.973644250f,  0.228072083f,
+    0.973293246f,  0.229565366f,
+    0.972939952f,  0.231058108f,
+    0.972584369f,  0.232550307f,
+    0.972226497f,  0.234041959f,
+    0.971866337f,  0.235533059f,
+    0.971503891f,  0.237023606f,
+    0.971139158f,  0.238513595f,
+    0.970772141f,  0.240003022f,
+    0.970402839f,  0.241491885f,
+    0.970031253f,  0.242980180f,
+    0.969657385f,  0.244467903f,
+    0.969281235f,  0.245955050f,
+    0.968902805f,  0.247441619f,
+    0.968522094f,  0.248927606f,
+    0.968139105f,  0.250413007f,
+    0.967753837f,  0.251897818f,
+    0.967366292f,  0.253382037f,
+    0.966976471f,  0.254865660f,
+    0.966584374f,  0.256348682f,
+    0.966190003f,  0.257831102f,
+    0.965793359f,  0.259312915f,
+    0.965394442f,  0.260794118f,
+    0.964993253f,  0.262274707f,
+    0.964589793f,  0.263754679f,
+    0.964184064f,  0.265234030f,
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+    0.963365800f,  0.268190857f,
+    0.962953267f,  0.269668326f,
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+    0.962121404f,  0.272621355f,
+    0.961702077f,  0.274096910f,
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+    0.902012144f,  0.431710658f,
+    0.901348847f,  0.433093819f,
+    0.900683429f,  0.434475961f,
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 };
 
 /*    
@@ -4630,45 +10909,45 @@ const q15_t ALIGN4 twiddleCoefQ15[6144] = {
   0xef8d, 0x8110, 0xefbf, 0x8109, 0xeff1, 0x8103, 0xf023, 0x80fd,
   0xf055, 0x80f6, 0xf087, 0x80f0, 0xf0b9, 0x80ea, 0xf0eb, 0x80e4,
   0xf11c, 0x80de, 0xf14e, 0x80d9, 0xf180, 0x80d3, 0xf1b2, 0x80cd,
-  0xf1e4, 0x80c8, 0xf216, 0x80c2, 0xf248, 0x80bd, 0xf27a, 0x80b7,
-  0xf2ac, 0x80b2, 0xf2de, 0x80ad, 0xf310, 0x80a8, 0xf342, 0x80a3,
-  0xf374, 0x809e, 0xf3a6, 0x8099, 0xf3d8, 0x8094, 0xf40a, 0x808f,
-  0xf43c, 0x808b, 0xf46e, 0x8086, 0xf4a0, 0x8082, 0xf4d3, 0x807d,
-  0xf505, 0x8079, 0xf537, 0x8075, 0xf569, 0x8070, 0xf59b, 0x806c,
-  0xf5cd, 0x8068, 0xf5ff, 0x8064, 0xf631, 0x8060, 0xf663, 0x805d,
-  0xf695, 0x8059, 0xf6c8, 0x8055, 0xf6fa, 0x8052, 0xf72c, 0x804e,
-  0xf75e, 0x804b, 0xf790, 0x8047, 0xf7c2, 0x8044, 0xf7f4, 0x8041,
-  0xf827, 0x803e, 0xf859, 0x803b, 0xf88b, 0x8038, 0xf8bd, 0x8035,
-  0xf8ef, 0x8032, 0xf922, 0x802f, 0xf954, 0x802d, 0xf986, 0x802a,
-  0xf9b8, 0x8027, 0xf9ea, 0x8025, 0xfa1d, 0x8023, 0xfa4f, 0x8020,
-  0xfa81, 0x801e, 0xfab3, 0x801c, 0xfae5, 0x801a, 0xfb18, 0x8018,
-  0xfb4a, 0x8016, 0xfb7c, 0x8014, 0xfbae, 0x8013, 0xfbe1, 0x8011,
-  0xfc13, 0x800f, 0xfc45, 0x800e, 0xfc77, 0x800c, 0xfcaa, 0x800b,
-  0xfcdc, 0x800a, 0xfd0e, 0x8009, 0xfd40, 0x8008, 0xfd73, 0x8007,
-  0xfda5, 0x8006, 0xfdd7, 0x8005, 0xfe09, 0x8004, 0xfe3c, 0x8003,
-  0xfe6e, 0x8002, 0xfea0, 0x8002, 0xfed2, 0x8001, 0xff05, 0x8001,
-  0xff37, 0x8001, 0xff69, 0x8000, 0xff9b, 0x8000, 0xffce, 0x8000,
+ 0xf1e4, 0x80c8, 0xf216, 0x80c2, 0xf248, 0x80bd, 0xf27a, 0x80b7,
+ 0xf2ac, 0x80b2, 0xf2de, 0x80ad, 0xf310, 0x80a8, 0xf342, 0x80a3,
+ 0xf374, 0x809e, 0xf3a6, 0x8099, 0xf3d8, 0x8094, 0xf40a, 0x808f,
+ 0xf43c, 0x808b, 0xf46e, 0x8086, 0xf4a0, 0x8082, 0xf4d3, 0x807d,
+ 0xf505, 0x8079, 0xf537, 0x8075, 0xf569, 0x8070, 0xf59b, 0x806c,
+ 0xf5cd, 0x8068, 0xf5ff, 0x8064, 0xf631, 0x8060, 0xf663, 0x805d,
+ 0xf695, 0x8059, 0xf6c8, 0x8055, 0xf6fa, 0x8052, 0xf72c, 0x804e,
+ 0xf75e, 0x804b, 0xf790, 0x8047, 0xf7c2, 0x8044, 0xf7f4, 0x8041,
+ 0xf827, 0x803e, 0xf859, 0x803b, 0xf88b, 0x8038, 0xf8bd, 0x8035,
+ 0xf8ef, 0x8032, 0xf922, 0x802f, 0xf954, 0x802d, 0xf986, 0x802a,
+ 0xf9b8, 0x8027, 0xf9ea, 0x8025, 0xfa1d, 0x8023, 0xfa4f, 0x8020,
+ 0xfa81, 0x801e, 0xfab3, 0x801c, 0xfae5, 0x801a, 0xfb18, 0x8018,
+ 0xfb4a, 0x8016, 0xfb7c, 0x8014, 0xfbae, 0x8013, 0xfbe1, 0x8011,
+ 0xfc13, 0x800f, 0xfc45, 0x800e, 0xfc77, 0x800c, 0xfcaa, 0x800b,
+ 0xfcdc, 0x800a, 0xfd0e, 0x8009, 0xfd40, 0x8008, 0xfd73, 0x8007,
+ 0xfda5, 0x8006, 0xfdd7, 0x8005, 0xfe09, 0x8004, 0xfe3c, 0x8003,
+ 0xfe6e, 0x8002, 0xfea0, 0x8002, 0xfed2, 0x8001, 0xff05, 0x8001,
+ 0xff37, 0x8001, 0xff69, 0x8000, 0xff9b, 0x8000, 0xffce, 0x8000,
 };
 
 /**    
- * @} end of CFFT_CIFFT group    
- */
+* @} end of CFFT_CIFFT group    
+*/
 
 /*    
 * @brief  Q15 table for reciprocal    
 */
 const q15_t ALIGN4 armRecipTableQ15[64] = {
-  0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
-  0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
-  0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
-  0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
-  0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
-  0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
-  0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
-  0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
-  0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
-  0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
-  0x41CC, 0x4146, 0x40C2, 0x4040
+ 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
+ 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
+ 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
+ 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
+ 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
+ 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
+ 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
+ 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
+ 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
+ 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
+ 0x41CC, 0x4146, 0x40C2, 0x4040
 };
 
 /*    
@@ -4687,3 +10966,5100 @@ const q31_t armRecipTableQ31[64] = {
   0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
   0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
 };
+
+const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH] = 
+{
+   //8x2, size 20
+   8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
+};
+
+const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH] = 
+{
+   //8x4, size 48
+   8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
+   80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
+   152,224, 176,208, 184,232, 216,240, 200,224, 232,240
+};
+
+const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH] = 
+{   
+   //radix 8, size 56
+   8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200, 
+   96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400, 
+   184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480, 
+   368,424, 376,488, 440,496
+};
+
+const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = 
+{
+   //8x2, size 208
+   8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768, 
+   80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520, 
+   144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776, 
+   208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320, 
+   280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400, 
+   360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584, 
+   424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600, 
+   488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608, 
+   568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864, 
+   632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808, 
+   720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832, 
+   792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008, 
+   904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
+};
+
+const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = 
+{
+   //8x4, size 440
+   8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640, 
+   80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768, 
+   144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384, 
+   200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984, 
+   256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608, 
+   320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736, 
+   384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864, 
+   448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992, 
+   520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104, 
+   568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720, 
+   624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160, 
+   680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936, 
+   736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048, 
+   792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808, 
+   848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544, 
+   904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880, 
+   960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496, 
+   1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120, 
+   1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552, 
+   1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824, 
+   1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672, 
+   1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016, 
+   1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640, 
+   1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432, 
+   1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936, 
+   1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960, 
+   1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648, 
+   1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936, 
+   1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928, 
+   1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840, 
+   1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888, 
+   1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032,
+   1960,1968, 2008,2032, 1992,2016, 2024,2032
+};
+
+const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = 
+{
+   //radix 8, size 448
+   8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576, 
+   80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152, 
+   152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216, 
+   216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280, 
+   280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344, 
+   344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408, 
+   408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472, 
+   472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544, 
+   544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120, 
+   616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696, 
+   688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272, 
+   760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848, 
+   848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416, 
+   920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992, 
+   992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576, 
+   1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152, 
+   1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728, 
+   1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808, 
+   1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384, 
+   1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960, 
+   1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536, 
+   1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136, 
+   1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224, 
+   1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328, 
+   1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416, 
+   1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520, 
+   2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616, 
+   2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744, 
+   2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872, 
+   2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000, 
+   2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176, 
+   2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368, 
+   2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560, 
+   3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888, 
+   3448,3952, 3512,4016, 3576,4080
+};
+
+const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH] = 
+{
+   //8x2, size 1800
+   8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048, 
+   72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048, 
+   136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696, 
+   192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648, 
+   248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248, 
+   304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200, 
+   360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800, 
+   416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752, 
+   472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352, 
+   528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304, 
+   584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936, 
+   640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856, 
+   696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488, 
+   752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408, 
+   808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040, 
+   864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960, 
+   920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592, 
+   976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096, 
+   1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544, 
+   1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080, 
+   1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400, 
+   1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120, 
+   1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656, 
+   1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168, 
+   1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696, 
+   1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208, 
+   1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736, 
+   1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272, 
+   1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480, 
+   1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312, 
+   1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848, 
+   1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280, 
+   1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888, 
+   1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288, 
+   1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928, 
+   1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464, 
+   1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592, 
+   1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504, 
+   1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040, 
+   2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136, 
+   2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088, 
+   2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816, 
+   2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576, 
+   2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664, 
+   2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264, 
+   2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800, 
+   2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304, 
+   2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840, 
+   2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376, 
+   2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392, 
+   2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344, 
+   2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944, 
+   2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480, 
+   2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016, 
+   2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032, 
+   2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984, 
+   2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584, 
+   2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632, 
+   3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632, 
+   3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168, 
+   3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704, 
+   3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208, 
+   3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744, 
+   3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248, 
+   3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784, 
+   3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320, 
+   3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824, 
+   3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360, 
+   3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896, 
+   3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400, 
+   3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936, 
+   3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440, 
+   3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976, 
+   3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512, 
+   3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016, 
+   3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552, 
+   3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088, 
+   3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592, 
+   4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128, 
+   4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160, 
+   4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176, 
+   4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712, 
+   4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216, 
+   4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752, 
+   4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416, 
+   4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304, 
+   4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624, 
+   4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296, 
+   4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680, 
+   4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208, 
+   4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400, 
+   4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808, 
+   4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688, 
+   4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976, 
+   4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160, 
+   4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344, 
+   4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728, 
+   4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736, 
+   5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928, 
+   5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872, 
+   5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672, 
+   5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208, 
+   5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456, 
+   5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248, 
+   5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784, 
+   5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448, 
+   5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824, 
+   5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240, 
+   5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504, 
+   5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168, 
+   5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264, 
+   5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456, 
+   5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552, 
+   5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312, 
+   5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576, 
+   5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248, 
+   5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504, 
+   5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360, 
+   6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624, 
+   6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384, 
+   6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264, 
+   6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664, 
+   6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520, 
+   6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280, 
+   6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536, 
+   6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048, 
+   6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752, 
+   6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992, 
+   6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280, 
+   6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856, 
+   6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024, 
+   6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624, 
+   6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104, 
+   7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664, 
+   7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280, 
+   7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688, 
+   7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952, 
+   7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456, 
+   7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864, 
+   7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784, 
+   7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048, 
+   7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728, 
+   7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096, 
+   7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112, 
+   7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984, 
+   8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160, 
+   8112,8136, 8120,8168, 8136,8160, 8152,8176
+};
+
+const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH] = 
+{
+   //8x2, size 3808
+   8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024, 
+   72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824, 
+   128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752, 
+   184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680, 
+   240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576, 
+   296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376, 
+   352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304, 
+   408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232, 
+   464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048, 
+   520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928, 
+   576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856, 
+   632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784, 
+   688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712, 
+   744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480, 
+   800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408, 
+   856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336, 
+   912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264, 
+   968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064, 
+   1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960, 
+   1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792, 
+   1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496, 
+   1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328, 
+   1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032, 
+   1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928, 
+   1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856, 
+   1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560, 
+   1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392, 
+   1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096, 
+   1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240, 
+   1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600, 
+   1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432, 
+   1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136, 
+   1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968, 
+   1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640, 
+   1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392, 
+   1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176, 
+   1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008, 
+   1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712, 
+   2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096, 
+   2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712, 
+   2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480, 
+   2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248, 
+   2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080, 
+   2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784, 
+   2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248, 
+   2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288, 
+   2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128, 
+   2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824, 
+   2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656, 
+   2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328, 
+   2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400, 
+   2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864, 
+   2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280, 
+   2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400, 
+   2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168, 
+   2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904, 
+   2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552, 
+   2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440, 
+   2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272, 
+   3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976, 
+   3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288, 
+   3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480, 
+   3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168, 
+   3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016, 
+   3256,15112, 3264,3336, 3272,7432, 3280,11528, 3288,15624, 3296,3848, 
+   3304,7944, 3312,12040, 3320,16136, 3328,5184, 3336,4424, 3344,8520, 
+   3352,12616, 3360,5312, 3368,4936, 3376,9032, 3384,13128, 3392,5440, 
+   3400,5448, 3408,9544, 3416,13640, 3424,5568, 3432,5960, 3440,10056, 
+   3448,14152, 3456,5192, 3464,6472, 3472,10568, 3480,14664, 3488,5320, 
+   3496,6984, 3504,11080, 3512,15176, 3520,5448, 3528,7496, 3536,11592, 
+   3544,15688, 3552,3912, 3560,8008, 3568,12104, 3576,16200, 3584,6208, 
+   3592,4488, 3600,8584, 3608,12680, 3616,6336, 3624,5000, 3632,9096, 
+   3640,13192, 3648,6464, 3656,5512, 3664,9608, 3672,13704, 3680,6592, 
+   3688,6024, 3696,10120, 3704,14216, 3712,6216, 3720,6536, 3728,10632, 
+   3736,14728, 3744,6344, 3752,7048, 3760,11144, 3768,15240, 3776,6472, 
+   3784,7560, 3792,11656, 3800,15752, 3808,3976, 3816,8072, 3824,12168, 
+   3832,16264, 3840,7232, 3848,4552, 3856,8648, 3864,12744, 3872,7360, 
+   3880,5064, 3888,9160, 3896,13256, 3904,7488, 3912,5576, 3920,9672, 
+   3928,13768, 3936,7616, 3944,6088, 3952,10184, 3960,14280, 3968,7240, 
+   3976,6600, 3984,10696, 3992,14792, 4000,7368, 4008,7112, 4016,11208, 
+   4024,15304, 4032,7496, 4040,7624, 4048,11720, 4056,15816, 4064,7624, 
+   4072,8136, 4080,12232, 4088,16328, 4096,8192, 4104,4112, 4112,8208, 
+   4120,12304, 4128,8320, 4136,4624, 4144,8720, 4152,12816, 4160,8448, 
+   4168,5136, 4176,9232, 4184,13328, 4192,8576, 4200,5648, 4208,9744, 
+   4216,13840, 4224,8200, 4232,6160, 4240,10256, 4248,14352, 4256,8328, 
+   4264,6672, 4272,10768, 4280,14864, 4288,8456, 4296,7184, 4304,11280, 
+   4312,15376, 4320,8584, 4328,7696, 4336,11792, 4344,15888, 4352,9216, 
+   4360,9232, 4368,8272, 4376,12368, 4384,9344, 4392,4688, 4400,8784, 
+   4408,12880, 4416,9472, 4424,5200, 4432,9296, 4440,13392, 4448,9600, 
+   4456,5712, 4464,9808, 4472,13904, 4480,9224, 4488,6224, 4496,10320, 
+   4504,14416, 4512,9352, 4520,6736, 4528,10832, 4536,14928, 4544,9480, 
+   4552,7248, 4560,11344, 4568,15440, 4576,9608, 4584,7760, 4592,11856, 
+   4600,15952, 4608,10240, 4616,10256, 4624,8336, 4632,12432, 4640,10368, 
+   4648,4752, 4656,8848, 4664,12944, 4672,10496, 4680,5264, 4688,9360, 
+   4696,13456, 4704,10624, 4712,5776, 4720,9872, 4728,13968, 4736,10248, 
+   4744,6288, 4752,10384, 4760,14480, 4768,10376, 4776,6800, 4784,10896, 
+   4792,14992, 4800,10504, 4808,7312, 4816,11408, 4824,15504, 4832,10632, 
+   4840,7824, 4848,11920, 4856,16016, 4864,11264, 4872,11280, 4880,8400, 
+   4888,12496, 4896,11392, 4904,11408, 4912,8912, 4920,13008, 4928,11520, 
+   4936,5328, 4944,9424, 4952,13520, 4960,11648, 4968,5840, 4976,9936, 
+   4984,14032, 4992,11272, 5000,6352, 5008,10448, 5016,14544, 5024,11400, 
+   5032,6864, 5040,10960, 5048,15056, 5056,11528, 5064,7376, 5072,11472, 
+   5080,15568, 5088,11656, 5096,7888, 5104,11984, 5112,16080, 5120,8256, 
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+   15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632, 
+   15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768, 
+   15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760, 
+   15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184, 
+   15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856, 
+   15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000, 
+   15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160, 
+   15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264, 
+   15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048, 
+   16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184, 
+   16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264, 
+   16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208, 
+   16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352, 
+   16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
+   16328,16352, 16360,16368
+};
+
+const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH] = 
+{
+   //radix 8, size 4032
+   8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512, 
+   72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184, 
+   128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600, 
+   184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016, 
+   240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432, 
+   296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848, 
+   352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264, 
+   408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680, 
+   464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160, 
+   528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672, 
+   592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088, 
+   648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760, 
+   704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176, 
+   760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592, 
+   816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008, 
+   872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424, 
+   928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840, 
+   984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224, 
+   1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800, 
+   1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216, 
+   1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632, 
+   1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952, 
+   1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272, 
+   1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848, 
+   1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168, 
+   1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488, 
+   1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808, 
+   1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384, 
+   1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768, 
+   1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184, 
+   1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600, 
+   1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016, 
+   1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336, 
+   1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912, 
+   1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232, 
+   1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552, 
+   1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872, 
+   2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448, 
+   2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832, 
+   2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248, 
+   2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664, 
+   2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080, 
+   2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496, 
+   2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816, 
+   2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392, 
+   2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712, 
+   2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032, 
+   2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416, 
+   2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992, 
+   2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408, 
+   2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824, 
+   2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240, 
+   2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656, 
+   2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072, 
+   2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392, 
+   2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968, 
+   3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288, 
+   3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672, 
+   3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088, 
+   3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504, 
+   3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080, 
+   3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496, 
+   3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912, 
+   3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328, 
+   3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744, 
+   3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064, 
+   3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640, 
+   3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024, 
+   3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440, 
+   3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856, 
+   3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272, 
+   3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688, 
+   3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104, 
+   3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680, 
+   3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096, 
+   4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512, 
+   4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488, 
+   4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904, 
+   4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320, 
+   4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736, 
+   4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152, 
+   4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728, 
+   4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144, 
+   4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560, 
+   4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976, 
+   4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456, 
+   4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968, 
+   4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384, 
+   4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800, 
+   4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216, 
+   4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792, 
+   4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208, 
+   4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624, 
+   5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040, 
+   5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520, 
+   5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032, 
+   5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544, 
+   5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960, 
+   5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376, 
+   5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792, 
+   5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368, 
+   5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784, 
+   5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200, 
+   5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680, 
+   5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192, 
+   5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704, 
+   5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216, 
+   5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632, 
+   5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048, 
+   5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464, 
+   6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880, 
+   6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456, 
+   6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936, 
+   6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448, 
+   6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960, 
+   6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472, 
+   6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984, 
+   6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400, 
+   6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816, 
+   6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232, 
+   6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712, 
+   6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224, 
+   6760,21320, 6768,25416, 6776,29512, 6800,9544, 6808,13640, 6816,17736, 
+   6824,21832, 6832,25928, 6840,30024, 6864,10056, 6872,14152, 6880,18248, 
+   6888,22344, 6896,26440, 6904,30536, 6928,10568, 6936,14664, 6944,18760, 
+   6952,22856, 6960,26952, 6968,31048, 6992,11080, 7000,15176, 7008,19272, 
+   7016,23368, 7024,27464, 7032,31560, 7048,7496, 7056,11592, 7064,15688, 
+   7072,19784, 7080,23880, 7088,27976, 7096,32072, 7112,8008, 7120,12104, 
+   7128,16200, 7136,20296, 7144,24392, 7152,28488, 7160,32584, 7184,8584, 
+   7192,12680, 7200,16776, 7208,20872, 7216,24968, 7224,29064, 7248,9096, 
+   7256,13192, 7264,17288, 7272,21384, 7280,25480, 7288,29576, 7312,9608, 
+   7320,13704, 7328,17800, 7336,21896, 7344,25992, 7352,30088, 7376,10120, 
+   7384,14216, 7392,18312, 7400,22408, 7408,26504, 7416,30600, 7440,10632, 
+   7448,14728, 7456,18824, 7464,22920, 7472,27016, 7480,31112, 7504,11144, 
+   7512,15240, 7520,19336, 7528,23432, 7536,27528, 7544,31624, 7568,11656, 
+   7576,15752, 7584,19848, 7592,23944, 7600,28040, 7608,32136, 7624,8072, 
+   7632,12168, 7640,16264, 7648,20360, 7656,24456, 7664,28552, 7672,32648, 
+   7696,8648, 7704,12744, 7712,16840, 7720,20936, 7728,25032, 7736,29128, 
+   7760,9160, 7768,13256, 7776,17352, 7784,21448, 7792,25544, 7800,29640, 
+   7824,9672, 7832,13768, 7840,17864, 7848,21960, 7856,26056, 7864,30152, 
+   7888,10184, 7896,14280, 7904,18376, 7912,22472, 7920,26568, 7928,30664, 
+   7952,10696, 7960,14792, 7968,18888, 7976,22984, 7984,27080, 7992,31176, 
+   8016,11208, 8024,15304, 8032,19400, 8040,23496, 8048,27592, 8056,31688, 
+   8080,11720, 8088,15816, 8096,19912, 8104,24008, 8112,28104, 8120,32200, 
+   8144,12232, 8152,16328, 8160,20424, 8168,24520, 8176,28616, 8184,32712, 
+   8216,12304, 8224,16400, 8232,20496, 8240,24592, 8248,28688, 8272,8720, 
+   8280,12816, 8288,16912, 8296,21008, 8304,25104, 8312,29200, 8336,9232, 
+   8344,13328, 8352,17424, 8360,21520, 8368,25616, 8376,29712, 8400,9744, 
+   8408,13840, 8416,17936, 8424,22032, 8432,26128, 8440,30224, 8464,10256, 
+   8472,14352, 8480,18448, 8488,22544, 8496,26640, 8504,30736, 8528,10768, 
+   8536,14864, 8544,18960, 8552,23056, 8560,27152, 8568,31248, 8592,11280, 
+   8600,15376, 8608,19472, 8616,23568, 8624,27664, 8632,31760, 8656,11792, 
+   8664,15888, 8672,19984, 8680,24080, 8688,28176, 8696,32272, 8728,12368, 
+   8736,16464, 8744,20560, 8752,24656, 8760,28752, 8792,12880, 8800,16976, 
+   8808,21072, 8816,25168, 8824,29264, 8848,9296, 8856,13392, 8864,17488, 
+   8872,21584, 8880,25680, 8888,29776, 8912,9808, 8920,13904, 8928,18000, 
+   8936,22096, 8944,26192, 8952,30288, 8976,10320, 8984,14416, 8992,18512, 
+   9000,22608, 9008,26704, 9016,30800, 9040,10832, 9048,14928, 9056,19024, 
+   9064,23120, 9072,27216, 9080,31312, 9104,11344, 9112,15440, 9120,19536, 
+   9128,23632, 9136,27728, 9144,31824, 9168,11856, 9176,15952, 9184,20048, 
+   9192,24144, 9200,28240, 9208,32336, 9240,12432, 9248,16528, 9256,20624, 
+   9264,24720, 9272,28816, 9304,12944, 9312,17040, 9320,21136, 9328,25232, 
+   9336,29328, 9368,13456, 9376,17552, 9384,21648, 9392,25744, 9400,29840, 
+   9424,9872, 9432,13968, 9440,18064, 9448,22160, 9456,26256, 9464,30352, 
+   9488,10384, 9496,14480, 9504,18576, 9512,22672, 9520,26768, 9528,30864, 
+   9552,10896, 9560,14992, 9568,19088, 9576,23184, 9584,27280, 9592,31376, 
+   9616,11408, 9624,15504, 9632,19600, 9640,23696, 9648,27792, 9656,31888, 
+   9680,11920, 9688,16016, 9696,20112, 9704,24208, 9712,28304, 9720,32400, 
+   9752,12496, 9760,16592, 9768,20688, 9776,24784, 9784,28880, 9816,13008, 
+   9824,17104, 9832,21200, 9840,25296, 9848,29392, 9880,13520, 9888,17616, 
+   9896,21712, 9904,25808, 9912,29904, 9944,14032, 9952,18128, 9960,22224, 
+   9968,26320, 9976,30416, 10000,10448, 10008,14544, 10016,18640, 10024,22736, 
+   10032,26832, 10040,30928, 10064,10960, 10072,15056, 10080,19152, 
+   10088,23248, 10096,27344, 10104,31440, 10128,11472, 10136,15568, 
+   10144,19664, 10152,23760, 10160,27856, 10168,31952, 10192,11984, 
+   10200,16080, 10208,20176, 10216,24272, 10224,28368, 10232,32464, 
+   10264,12560, 10272,16656, 10280,20752, 10288,24848, 10296,28944, 
+   10328,13072, 10336,17168, 10344,21264, 10352,25360, 10360,29456, 
+   10392,13584, 10400,17680, 10408,21776, 10416,25872, 10424,29968, 
+   10456,14096, 10464,18192, 10472,22288, 10480,26384, 10488,30480, 
+   10520,14608, 10528,18704, 10536,22800, 10544,26896, 10552,30992, 
+   10576,11024, 10584,15120, 10592,19216, 10600,23312, 10608,27408, 
+   10616,31504, 10640,11536, 10648,15632, 10656,19728, 10664,23824, 
+   10672,27920, 10680,32016, 10704,12048, 10712,16144, 10720,20240, 
+   10728,24336, 10736,28432, 10744,32528, 10776,12624, 10784,16720, 
+   10792,20816, 10800,24912, 10808,29008, 10840,13136, 10848,17232, 
+   10856,21328, 10864,25424, 10872,29520, 10904,13648, 10912,17744, 
+   10920,21840, 10928,25936, 10936,30032, 10968,14160, 10976,18256, 
+   10984,22352, 10992,26448, 11000,30544, 11032,14672, 11040,18768, 
+   11048,22864, 11056,26960, 11064,31056, 11096,15184, 11104,19280, 
+   11112,23376, 11120,27472, 11128,31568, 11152,11600, 11160,15696, 
+   11168,19792, 11176,23888, 11184,27984, 11192,32080, 11216,12112, 
+   11224,16208, 11232,20304, 11240,24400, 11248,28496, 11256,32592, 
+   11288,12688, 11296,16784, 11304,20880, 11312,24976, 11320,29072, 
+   11352,13200, 11360,17296, 11368,21392, 11376,25488, 11384,29584, 
+   11416,13712, 11424,17808, 11432,21904, 11440,26000, 11448,30096, 
+   11480,14224, 11488,18320, 11496,22416, 11504,26512, 11512,30608, 
+   11544,14736, 11552,18832, 11560,22928, 11568,27024, 11576,31120, 
+   11608,15248, 11616,19344, 11624,23440, 11632,27536, 11640,31632, 
+   11672,15760, 11680,19856, 11688,23952, 11696,28048, 11704,32144, 
+   11728,12176, 11736,16272, 11744,20368, 11752,24464, 11760,28560, 
+   11768,32656, 11800,12752, 11808,16848, 11816,20944, 11824,25040, 
+   11832,29136, 11864,13264, 11872,17360, 11880,21456, 11888,25552, 
+   11896,29648, 11928,13776, 11936,17872, 11944,21968, 11952,26064, 
+   11960,30160, 11992,14288, 12000,18384, 12008,22480, 12016,26576, 
+   12024,30672, 12056,14800, 12064,18896, 12072,22992, 12080,27088, 
+   12088,31184, 12120,15312, 12128,19408, 12136,23504, 12144,27600, 
+   12152,31696, 12184,15824, 12192,19920, 12200,24016, 12208,28112, 
+   12216,32208, 12248,16336, 12256,20432, 12264,24528, 12272,28624, 
+   12280,32720, 12320,16408, 12328,20504, 12336,24600, 12344,28696, 
+   12376,12824, 12384,16920, 12392,21016, 12400,25112, 12408,29208, 
+   12440,13336, 12448,17432, 12456,21528, 12464,25624, 12472,29720, 
+   12504,13848, 12512,17944, 12520,22040, 12528,26136, 12536,30232, 
+   12568,14360, 12576,18456, 12584,22552, 12592,26648, 12600,30744, 
+   12632,14872, 12640,18968, 12648,23064, 12656,27160, 12664,31256, 
+   12696,15384, 12704,19480, 12712,23576, 12720,27672, 12728,31768, 
+   12760,15896, 12768,19992, 12776,24088, 12784,28184, 12792,32280, 
+   12832,16472, 12840,20568, 12848,24664, 12856,28760, 12896,16984, 
+   12904,21080, 12912,25176, 12920,29272, 12952,13400, 12960,17496, 
+   12968,21592, 12976,25688, 12984,29784, 13016,13912, 13024,18008, 
+   13032,22104, 13040,26200, 13048,30296, 13080,14424, 13088,18520, 
+   13096,22616, 13104,26712, 13112,30808, 13144,14936, 13152,19032, 
+   13160,23128, 13168,27224, 13176,31320, 13208,15448, 13216,19544, 
+   13224,23640, 13232,27736, 13240,31832, 13272,15960, 13280,20056, 
+   13288,24152, 13296,28248, 13304,32344, 13344,16536, 13352,20632, 
+   13360,24728, 13368,28824, 13408,17048, 13416,21144, 13424,25240, 
+   13432,29336, 13472,17560, 13480,21656, 13488,25752, 13496,29848, 
+   13528,13976, 13536,18072, 13544,22168, 13552,26264, 13560,30360, 
+   13592,14488, 13600,18584, 13608,22680, 13616,26776, 13624,30872, 
+   13656,15000, 13664,19096, 13672,23192, 13680,27288, 13688,31384, 
+   13720,15512, 13728,19608, 13736,23704, 13744,27800, 13752,31896, 
+   13784,16024, 13792,20120, 13800,24216, 13808,28312, 13816,32408, 
+   13856,16600, 13864,20696, 13872,24792, 13880,28888, 13920,17112, 
+   13928,21208, 13936,25304, 13944,29400, 13984,17624, 13992,21720, 
+   14000,25816, 14008,29912, 14048,18136, 14056,22232, 14064,26328, 
+   14072,30424, 14104,14552, 14112,18648, 14120,22744, 14128,26840, 
+   14136,30936, 14168,15064, 14176,19160, 14184,23256, 14192,27352, 
+   14200,31448, 14232,15576, 14240,19672, 14248,23768, 14256,27864, 
+   14264,31960, 14296,16088, 14304,20184, 14312,24280, 14320,28376, 
+   14328,32472, 14368,16664, 14376,20760, 14384,24856, 14392,28952, 
+   14432,17176, 14440,21272, 14448,25368, 14456,29464, 14496,17688, 
+   14504,21784, 14512,25880, 14520,29976, 14560,18200, 14568,22296, 
+   14576,26392, 14584,30488, 14624,18712, 14632,22808, 14640,26904, 
+   14648,31000, 14680,15128, 14688,19224, 14696,23320, 14704,27416, 
+   14712,31512, 14744,15640, 14752,19736, 14760,23832, 14768,27928, 
+   14776,32024, 14808,16152, 14816,20248, 14824,24344, 14832,28440, 
+   14840,32536, 14880,16728, 14888,20824, 14896,24920, 14904,29016, 
+   14944,17240, 14952,21336, 14960,25432, 14968,29528, 15008,17752, 
+   15016,21848, 15024,25944, 15032,30040, 15072,18264, 15080,22360, 
+   15088,26456, 15096,30552, 15136,18776, 15144,22872, 15152,26968, 
+   15160,31064, 15200,19288, 15208,23384, 15216,27480, 15224,31576, 
+   15256,15704, 15264,19800, 15272,23896, 15280,27992, 15288,32088, 
+   15320,16216, 15328,20312, 15336,24408, 15344,28504, 15352,32600, 
+   15392,16792, 15400,20888, 15408,24984, 15416,29080, 15456,17304, 
+   15464,21400, 15472,25496, 15480,29592, 15520,17816, 15528,21912, 
+   15536,26008, 15544,30104, 15584,18328, 15592,22424, 15600,26520, 
+   15608,30616, 15648,18840, 15656,22936, 15664,27032, 15672,31128, 
+   15712,19352, 15720,23448, 15728,27544, 15736,31640, 15776,19864, 
+   15784,23960, 15792,28056, 15800,32152, 15832,16280, 15840,20376, 
+   15848,24472, 15856,28568, 15864,32664, 15904,16856, 15912,20952, 
+   15920,25048, 15928,29144, 15968,17368, 15976,21464, 15984,25560, 
+   15992,29656, 16032,17880, 16040,21976, 16048,26072, 16056,30168, 
+   16096,18392, 16104,22488, 16112,26584, 16120,30680, 16160,18904, 
+   16168,23000, 16176,27096, 16184,31192, 16224,19416, 16232,23512, 
+   16240,27608, 16248,31704, 16288,19928, 16296,24024, 16304,28120, 
+   16312,32216, 16352,20440, 16360,24536, 16368,28632, 16376,32728, 
+   16424,20512, 16432,24608, 16440,28704, 16480,16928, 16488,21024, 
+   16496,25120, 16504,29216, 16544,17440, 16552,21536, 16560,25632, 
+   16568,29728, 16608,17952, 16616,22048, 16624,26144, 16632,30240, 
+   16672,18464, 16680,22560, 16688,26656, 16696,30752, 16736,18976, 
+   16744,23072, 16752,27168, 16760,31264, 16800,19488, 16808,23584, 
+   16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192, 
+   16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088, 
+   17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696, 
+   17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304, 
+   17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040, 
+   17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648, 
+   17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256, 
+   17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152, 
+   17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856, 
+   17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592, 
+   17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200, 
+   17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808, 
+   17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416, 
+   17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312, 
+   18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240, 
+   18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848, 
+   18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456, 
+   18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192, 
+   18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864, 
+   18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792, 
+   18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496, 
+   18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328, 
+   18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936, 
+   18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544, 
+   18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440, 
+   19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368, 
+   19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072, 
+   19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904, 
+   19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512, 
+   19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408, 
+   19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112, 
+   19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040, 
+   19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968, 
+   19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576, 
+   19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472, 
+   20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176, 
+   20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104, 
+   20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032, 
+   20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736, 
+   20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224, 
+   20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152, 
+   20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080, 
+   20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784, 
+   20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776, 
+   21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800, 
+   21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728, 
+   21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656, 
+   21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360, 
+   21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768, 
+   21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696, 
+   21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400, 
+   21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328, 
+   22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416, 
+   22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760, 
+   22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464, 
+   22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392, 
+   22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480, 
+   22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920, 
+   22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848, 
+   22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552, 
+   23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960, 
+   23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080, 
+   23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104, 
+   23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096, 
+   23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536, 
+   23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656, 
+   23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680, 
+   24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088, 
+   24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208, 
+   24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648, 
+   24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648, 
+   24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768, 
+   24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208, 
+   25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808, 
+   25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248, 
+   25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368, 
+   25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384, 
+   25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824, 
+   26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424, 
+   26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376, 
+   26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496, 
+   26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024, 
+   26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464, 
+   27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576, 
+   27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528, 
+   27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640, 
+   27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688, 
+   28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216, 
+   28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752, 
+   28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312, 
+   29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864, 
+   29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928, 
+   30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504, 
+   31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632, 
+   32248,32696
+};
+
+
+/**    
+* \par    
+* Example code for Floating-point RFFT Twiddle factors Generation:    
+* \par    
+* 
TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' 
    
+* \par    
+* Real and Imag values are in interleaved fashion    
+*/
+const float32_t twiddleCoef_rfft_32[32] = {
+0.0f			,	1.0f			,
+0.195090322f	,	0.98078528f 	,
+0.382683432f	,	0.923879533f	,
+0.555570233f	,	0.831469612f	,
+0.707106781f	,	0.707106781f	,
+0.831469612f	,	0.555570233f	,
+0.923879533f	,	0.382683432f    ,	
+0.98078528f		,	0.195090322f	,
+1.0f			,	0.0f			,
+0.98078528f		,	-0.195090322f	,
+0.923879533f	,	-0.382683432f	,
+0.831469612f	,	-0.555570233f	,
+0.707106781f	,	-0.707106781f	,
+0.555570233f	,	-0.831469612f	,
+0.382683432f	,	-0.923879533f	,
+0.195090322f	,	-0.98078528f	
+};
+
+const float32_t twiddleCoef_rfft_64[64] = {
+0.0f,	1.0f,
+0.098017140329561f,	0.995184726672197f,
+0.195090322016128f,	0.98078528040323f,
+0.290284677254462f,	0.956940335732209f,
+0.38268343236509f,	0.923879532511287f,
+0.471396736825998f,	0.881921264348355f,
+0.555570233019602f,	0.831469612302545f,
+0.634393284163645f,	0.773010453362737f,
+0.707106781186547f,	0.707106781186548f,
+0.773010453362737f,	0.634393284163645f,
+0.831469612302545f,	0.555570233019602f,
+0.881921264348355f,	0.471396736825998f,
+0.923879532511287f,	0.38268343236509f,
+0.956940335732209f,	0.290284677254462f,
+0.98078528040323f,	0.195090322016128f,
+0.995184726672197f,	0.098017140329561f,
+1.0f,	0.0f,
+0.995184726672197f,	-0.098017140329561f,
+0.98078528040323f,	-0.195090322016128f,
+0.956940335732209f,	-0.290284677254462f,
+0.923879532511287f,	-0.38268343236509f,
+0.881921264348355f,	-0.471396736825998f,
+0.831469612302545f,	-0.555570233019602f,
+0.773010453362737f,	-0.634393284163645f,
+0.707106781186548f,	-0.707106781186547f,
+0.634393284163645f,	-0.773010453362737f,
+0.555570233019602f,	-0.831469612302545f,
+0.471396736825998f,	-0.881921264348355f,
+0.38268343236509f,	-0.923879532511287f,
+0.290284677254462f,	-0.956940335732209f,
+0.195090322016129f,	-0.98078528040323f,
+0.098017140329561f,	-0.995184726672197f
+};
+
+const float32_t twiddleCoef_rfft_128[128] = {
+    0.000000000f,  1.000000000f,
+    0.049067674f,  0.998795456f,
+    0.098017140f,  0.995184727f,
+    0.146730474f,  0.989176510f,
+    0.195090322f,  0.980785280f,
+    0.242980180f,  0.970031253f,
+    0.290284677f,  0.956940336f,
+    0.336889853f,  0.941544065f,
+    0.382683432f,  0.923879533f,
+    0.427555093f,  0.903989293f,
+    0.471396737f,  0.881921264f,
+    0.514102744f,  0.857728610f,
+    0.555570233f,  0.831469612f,
+    0.595699304f,  0.803207531f,
+    0.634393284f,  0.773010453f,
+    0.671558955f,  0.740951125f,
+    0.707106781f,  0.707106781f,
+    0.740951125f,  0.671558955f,
+    0.773010453f,  0.634393284f,
+    0.803207531f,  0.595699304f,
+    0.831469612f,  0.555570233f,
+    0.857728610f,  0.514102744f,
+    0.881921264f,  0.471396737f,
+    0.903989293f,  0.427555093f,
+    0.923879533f,  0.382683432f,
+    0.941544065f,  0.336889853f,
+    0.956940336f,  0.290284677f,
+    0.970031253f,  0.242980180f,
+    0.980785280f,  0.195090322f,
+    0.989176510f,  0.146730474f,
+    0.995184727f,  0.098017140f,
+    0.998795456f,  0.049067674f,
+    1.000000000f,  0.000000000f,
+    0.998795456f, -0.049067674f,
+    0.995184727f, -0.098017140f,
+    0.989176510f, -0.146730474f,
+    0.980785280f, -0.195090322f,
+    0.970031253f, -0.242980180f,
+    0.956940336f, -0.290284677f,
+    0.941544065f, -0.336889853f,
+    0.923879533f, -0.382683432f,
+    0.903989293f, -0.427555093f,
+    0.881921264f, -0.471396737f,
+    0.857728610f, -0.514102744f,
+    0.831469612f, -0.555570233f,
+    0.803207531f, -0.595699304f,
+    0.773010453f, -0.634393284f,
+    0.740951125f, -0.671558955f,
+    0.707106781f, -0.707106781f,
+    0.671558955f, -0.740951125f,
+    0.634393284f, -0.773010453f,
+    0.595699304f, -0.803207531f,
+    0.555570233f, -0.831469612f,
+    0.514102744f, -0.857728610f,
+    0.471396737f, -0.881921264f,
+    0.427555093f, -0.903989293f,
+    0.382683432f, -0.923879533f,
+    0.336889853f, -0.941544065f,
+    0.290284677f, -0.956940336f,
+    0.242980180f, -0.970031253f,
+    0.195090322f, -0.980785280f,
+    0.146730474f, -0.989176510f,
+    0.098017140f, -0.995184727f,
+    0.049067674f, -0.998795456f
+};
+
+const float32_t twiddleCoef_rfft_256[256] = {
+    0.000000000f,  1.000000000f,
+    0.024541229f,  0.999698819f,
+    0.049067674f,  0.998795456f,
+    0.073564564f,  0.997290457f,
+    0.098017140f,  0.995184727f,
+    0.122410675f,  0.992479535f,
+    0.146730474f,  0.989176510f,
+    0.170961889f,  0.985277642f,
+    0.195090322f,  0.980785280f,
+    0.219101240f,  0.975702130f,
+    0.242980180f,  0.970031253f,
+    0.266712757f,  0.963776066f,
+    0.290284677f,  0.956940336f,
+    0.313681740f,  0.949528181f,
+    0.336889853f,  0.941544065f,
+    0.359895037f,  0.932992799f,
+    0.382683432f,  0.923879533f,
+    0.405241314f,  0.914209756f,
+    0.427555093f,  0.903989293f,
+    0.449611330f,  0.893224301f,
+    0.471396737f,  0.881921264f,
+    0.492898192f,  0.870086991f,
+    0.514102744f,  0.857728610f,
+    0.534997620f,  0.844853565f,
+    0.555570233f,  0.831469612f,
+    0.575808191f,  0.817584813f,
+    0.595699304f,  0.803207531f,
+    0.615231591f,  0.788346428f,
+    0.634393284f,  0.773010453f,
+    0.653172843f,  0.757208847f,
+    0.671558955f,  0.740951125f,
+    0.689540545f,  0.724247083f,
+    0.707106781f,  0.707106781f,
+    0.724247083f,  0.689540545f,
+    0.740951125f,  0.671558955f,
+    0.757208847f,  0.653172843f,
+    0.773010453f,  0.634393284f,
+    0.788346428f,  0.615231591f,
+    0.803207531f,  0.595699304f,
+    0.817584813f,  0.575808191f,
+    0.831469612f,  0.555570233f,
+    0.844853565f,  0.534997620f,
+    0.857728610f,  0.514102744f,
+    0.870086991f,  0.492898192f,
+    0.881921264f,  0.471396737f,
+    0.893224301f,  0.449611330f,
+    0.903989293f,  0.427555093f,
+    0.914209756f,  0.405241314f,
+    0.923879533f,  0.382683432f,
+    0.932992799f,  0.359895037f,
+    0.941544065f,  0.336889853f,
+    0.949528181f,  0.313681740f,
+    0.956940336f,  0.290284677f,
+    0.963776066f,  0.266712757f,
+    0.970031253f,  0.242980180f,
+    0.975702130f,  0.219101240f,
+    0.980785280f,  0.195090322f,
+    0.985277642f,  0.170961889f,
+    0.989176510f,  0.146730474f,
+    0.992479535f,  0.122410675f,
+    0.995184727f,  0.098017140f,
+    0.997290457f,  0.073564564f,
+    0.998795456f,  0.049067674f,
+    0.999698819f,  0.024541229f,
+    1.000000000f,  0.000000000f,
+    0.999698819f, -0.024541229f,
+    0.998795456f, -0.049067674f,
+    0.997290457f, -0.073564564f,
+    0.995184727f, -0.098017140f,
+    0.992479535f, -0.122410675f,
+    0.989176510f, -0.146730474f,
+    0.985277642f, -0.170961889f,
+    0.980785280f, -0.195090322f,
+    0.975702130f, -0.219101240f,
+    0.970031253f, -0.242980180f,
+    0.963776066f, -0.266712757f,
+    0.956940336f, -0.290284677f,
+    0.949528181f, -0.313681740f,
+    0.941544065f, -0.336889853f,
+    0.932992799f, -0.359895037f,
+    0.923879533f, -0.382683432f,
+    0.914209756f, -0.405241314f,
+    0.903989293f, -0.427555093f,
+    0.893224301f, -0.449611330f,
+    0.881921264f, -0.471396737f,
+    0.870086991f, -0.492898192f,
+    0.857728610f, -0.514102744f,
+    0.844853565f, -0.534997620f,
+    0.831469612f, -0.555570233f,
+    0.817584813f, -0.575808191f,
+    0.803207531f, -0.595699304f,
+    0.788346428f, -0.615231591f,
+    0.773010453f, -0.634393284f,
+    0.757208847f, -0.653172843f,
+    0.740951125f, -0.671558955f,
+    0.724247083f, -0.689540545f,
+    0.707106781f, -0.707106781f,
+    0.689540545f, -0.724247083f,
+    0.671558955f, -0.740951125f,
+    0.653172843f, -0.757208847f,
+    0.634393284f, -0.773010453f,
+    0.615231591f, -0.788346428f,
+    0.595699304f, -0.803207531f,
+    0.575808191f, -0.817584813f,
+    0.555570233f, -0.831469612f,
+    0.534997620f, -0.844853565f,
+    0.514102744f, -0.857728610f,
+    0.492898192f, -0.870086991f,
+    0.471396737f, -0.881921264f,
+    0.449611330f, -0.893224301f,
+    0.427555093f, -0.903989293f,
+    0.405241314f, -0.914209756f,
+    0.382683432f, -0.923879533f,
+    0.359895037f, -0.932992799f,
+    0.336889853f, -0.941544065f,
+    0.313681740f, -0.949528181f,
+    0.290284677f, -0.956940336f,
+    0.266712757f, -0.963776066f,
+    0.242980180f, -0.970031253f,
+    0.219101240f, -0.975702130f,
+    0.195090322f, -0.980785280f,
+    0.170961889f, -0.985277642f,
+    0.146730474f, -0.989176510f,
+    0.122410675f, -0.992479535f,
+    0.098017140f, -0.995184727f,
+    0.073564564f, -0.997290457f,
+    0.049067674f, -0.998795456f,
+    0.024541229f, -0.999698819f
+};
+
+const float32_t twiddleCoef_rfft_512[512] = {
+    0.000000000f,  1.000000000f,
+    0.012271538f,  0.999924702f,
+    0.024541229f,  0.999698819f,
+    0.036807223f,  0.999322385f,
+    0.049067674f,  0.998795456f,
+    0.061320736f,  0.998118113f,
+    0.073564564f,  0.997290457f,
+    0.085797312f,  0.996312612f,
+    0.098017140f,  0.995184727f,
+    0.110222207f,  0.993906970f,
+    0.122410675f,  0.992479535f,
+    0.134580709f,  0.990902635f,
+    0.146730474f,  0.989176510f,
+    0.158858143f,  0.987301418f,
+    0.170961889f,  0.985277642f,
+    0.183039888f,  0.983105487f,
+    0.195090322f,  0.980785280f,
+    0.207111376f,  0.978317371f,
+    0.219101240f,  0.975702130f,
+    0.231058108f,  0.972939952f,
+    0.242980180f,  0.970031253f,
+    0.254865660f,  0.966976471f,
+    0.266712757f,  0.963776066f,
+    0.278519689f,  0.960430519f,
+    0.290284677f,  0.956940336f,
+    0.302005949f,  0.953306040f,
+    0.313681740f,  0.949528181f,
+    0.325310292f,  0.945607325f,
+    0.336889853f,  0.941544065f,
+    0.348418680f,  0.937339012f,
+    0.359895037f,  0.932992799f,
+    0.371317194f,  0.928506080f,
+    0.382683432f,  0.923879533f,
+    0.393992040f,  0.919113852f,
+    0.405241314f,  0.914209756f,
+    0.416429560f,  0.909167983f,
+    0.427555093f,  0.903989293f,
+    0.438616239f,  0.898674466f,
+    0.449611330f,  0.893224301f,
+    0.460538711f,  0.887639620f,
+    0.471396737f,  0.881921264f,
+    0.482183772f,  0.876070094f,
+    0.492898192f,  0.870086991f,
+    0.503538384f,  0.863972856f,
+    0.514102744f,  0.857728610f,
+    0.524589683f,  0.851355193f,
+    0.534997620f,  0.844853565f,
+    0.545324988f,  0.838224706f,
+    0.555570233f,  0.831469612f,
+    0.565731811f,  0.824589303f,
+    0.575808191f,  0.817584813f,
+    0.585797857f,  0.810457198f,
+    0.595699304f,  0.803207531f,
+    0.605511041f,  0.795836905f,
+    0.615231591f,  0.788346428f,
+    0.624859488f,  0.780737229f,
+    0.634393284f,  0.773010453f,
+    0.643831543f,  0.765167266f,
+    0.653172843f,  0.757208847f,
+    0.662415778f,  0.749136395f,
+    0.671558955f,  0.740951125f,
+    0.680600998f,  0.732654272f,
+    0.689540545f,  0.724247083f,
+    0.698376249f,  0.715730825f,
+    0.707106781f,  0.707106781f,
+    0.715730825f,  0.698376249f,
+    0.724247083f,  0.689540545f,
+    0.732654272f,  0.680600998f,
+    0.740951125f,  0.671558955f,
+    0.749136395f,  0.662415778f,
+    0.757208847f,  0.653172843f,
+    0.765167266f,  0.643831543f,
+    0.773010453f,  0.634393284f,
+    0.780737229f,  0.624859488f,
+    0.788346428f,  0.615231591f,
+    0.795836905f,  0.605511041f,
+    0.803207531f,  0.595699304f,
+    0.810457198f,  0.585797857f,
+    0.817584813f,  0.575808191f,
+    0.824589303f,  0.565731811f,
+    0.831469612f,  0.555570233f,
+    0.838224706f,  0.545324988f,
+    0.844853565f,  0.534997620f,
+    0.851355193f,  0.524589683f,
+    0.857728610f,  0.514102744f,
+    0.863972856f,  0.503538384f,
+    0.870086991f,  0.492898192f,
+    0.876070094f,  0.482183772f,
+    0.881921264f,  0.471396737f,
+    0.887639620f,  0.460538711f,
+    0.893224301f,  0.449611330f,
+    0.898674466f,  0.438616239f,
+    0.903989293f,  0.427555093f,
+    0.909167983f,  0.416429560f,
+    0.914209756f,  0.405241314f,
+    0.919113852f,  0.393992040f,
+    0.923879533f,  0.382683432f,
+    0.928506080f,  0.371317194f,
+    0.932992799f,  0.359895037f,
+    0.937339012f,  0.348418680f,
+    0.941544065f,  0.336889853f,
+    0.945607325f,  0.325310292f,
+    0.949528181f,  0.313681740f,
+    0.953306040f,  0.302005949f,
+    0.956940336f,  0.290284677f,
+    0.960430519f,  0.278519689f,
+    0.963776066f,  0.266712757f,
+    0.966976471f,  0.254865660f,
+    0.970031253f,  0.242980180f,
+    0.972939952f,  0.231058108f,
+    0.975702130f,  0.219101240f,
+    0.978317371f,  0.207111376f,
+    0.980785280f,  0.195090322f,
+    0.983105487f,  0.183039888f,
+    0.985277642f,  0.170961889f,
+    0.987301418f,  0.158858143f,
+    0.989176510f,  0.146730474f,
+    0.990902635f,  0.134580709f,
+    0.992479535f,  0.122410675f,
+    0.993906970f,  0.110222207f,
+    0.995184727f,  0.098017140f,
+    0.996312612f,  0.085797312f,
+    0.997290457f,  0.073564564f,
+    0.998118113f,  0.061320736f,
+    0.998795456f,  0.049067674f,
+    0.999322385f,  0.036807223f,
+    0.999698819f,  0.024541229f,
+    0.999924702f,  0.012271538f,
+    1.000000000f,  0.000000000f,
+    0.999924702f, -0.012271538f,
+    0.999698819f, -0.024541229f,
+    0.999322385f, -0.036807223f,
+    0.998795456f, -0.049067674f,
+    0.998118113f, -0.061320736f,
+    0.997290457f, -0.073564564f,
+    0.996312612f, -0.085797312f,
+    0.995184727f, -0.098017140f,
+    0.993906970f, -0.110222207f,
+    0.992479535f, -0.122410675f,
+    0.990902635f, -0.134580709f,
+    0.989176510f, -0.146730474f,
+    0.987301418f, -0.158858143f,
+    0.985277642f, -0.170961889f,
+    0.983105487f, -0.183039888f,
+    0.980785280f, -0.195090322f,
+    0.978317371f, -0.207111376f,
+    0.975702130f, -0.219101240f,
+    0.972939952f, -0.231058108f,
+    0.970031253f, -0.242980180f,
+    0.966976471f, -0.254865660f,
+    0.963776066f, -0.266712757f,
+    0.960430519f, -0.278519689f,
+    0.956940336f, -0.290284677f,
+    0.953306040f, -0.302005949f,
+    0.949528181f, -0.313681740f,
+    0.945607325f, -0.325310292f,
+    0.941544065f, -0.336889853f,
+    0.937339012f, -0.348418680f,
+    0.932992799f, -0.359895037f,
+    0.928506080f, -0.371317194f,
+    0.923879533f, -0.382683432f,
+    0.919113852f, -0.393992040f,
+    0.914209756f, -0.405241314f,
+    0.909167983f, -0.416429560f,
+    0.903989293f, -0.427555093f,
+    0.898674466f, -0.438616239f,
+    0.893224301f, -0.449611330f,
+    0.887639620f, -0.460538711f,
+    0.881921264f, -0.471396737f,
+    0.876070094f, -0.482183772f,
+    0.870086991f, -0.492898192f,
+    0.863972856f, -0.503538384f,
+    0.857728610f, -0.514102744f,
+    0.851355193f, -0.524589683f,
+    0.844853565f, -0.534997620f,
+    0.838224706f, -0.545324988f,
+    0.831469612f, -0.555570233f,
+    0.824589303f, -0.565731811f,
+    0.817584813f, -0.575808191f,
+    0.810457198f, -0.585797857f,
+    0.803207531f, -0.595699304f,
+    0.795836905f, -0.605511041f,
+    0.788346428f, -0.615231591f,
+    0.780737229f, -0.624859488f,
+    0.773010453f, -0.634393284f,
+    0.765167266f, -0.643831543f,
+    0.757208847f, -0.653172843f,
+    0.749136395f, -0.662415778f,
+    0.740951125f, -0.671558955f,
+    0.732654272f, -0.680600998f,
+    0.724247083f, -0.689540545f,
+    0.715730825f, -0.698376249f,
+    0.707106781f, -0.707106781f,
+    0.698376249f, -0.715730825f,
+    0.689540545f, -0.724247083f,
+    0.680600998f, -0.732654272f,
+    0.671558955f, -0.740951125f,
+    0.662415778f, -0.749136395f,
+    0.653172843f, -0.757208847f,
+    0.643831543f, -0.765167266f,
+    0.634393284f, -0.773010453f,
+    0.624859488f, -0.780737229f,
+    0.615231591f, -0.788346428f,
+    0.605511041f, -0.795836905f,
+    0.595699304f, -0.803207531f,
+    0.585797857f, -0.810457198f,
+    0.575808191f, -0.817584813f,
+    0.565731811f, -0.824589303f,
+    0.555570233f, -0.831469612f,
+    0.545324988f, -0.838224706f,
+    0.534997620f, -0.844853565f,
+    0.524589683f, -0.851355193f,
+    0.514102744f, -0.857728610f,
+    0.503538384f, -0.863972856f,
+    0.492898192f, -0.870086991f,
+    0.482183772f, -0.876070094f,
+    0.471396737f, -0.881921264f,
+    0.460538711f, -0.887639620f,
+    0.449611330f, -0.893224301f,
+    0.438616239f, -0.898674466f,
+    0.427555093f, -0.903989293f,
+    0.416429560f, -0.909167983f,
+    0.405241314f, -0.914209756f,
+    0.393992040f, -0.919113852f,
+    0.382683432f, -0.923879533f,
+    0.371317194f, -0.928506080f,
+    0.359895037f, -0.932992799f,
+    0.348418680f, -0.937339012f,
+    0.336889853f, -0.941544065f,
+    0.325310292f, -0.945607325f,
+    0.313681740f, -0.949528181f,
+    0.302005949f, -0.953306040f,
+    0.290284677f, -0.956940336f,
+    0.278519689f, -0.960430519f,
+    0.266712757f, -0.963776066f,
+    0.254865660f, -0.966976471f,
+    0.242980180f, -0.970031253f,
+    0.231058108f, -0.972939952f,
+    0.219101240f, -0.975702130f,
+    0.207111376f, -0.978317371f,
+    0.195090322f, -0.980785280f,
+    0.183039888f, -0.983105487f,
+    0.170961889f, -0.985277642f,
+    0.158858143f, -0.987301418f,
+    0.146730474f, -0.989176510f,
+    0.134580709f, -0.990902635f,
+    0.122410675f, -0.992479535f,
+    0.110222207f, -0.993906970f,
+    0.098017140f, -0.995184727f,
+    0.085797312f, -0.996312612f,
+    0.073564564f, -0.997290457f,
+    0.061320736f, -0.998118113f,
+    0.049067674f, -0.998795456f,
+    0.036807223f, -0.999322385f,
+    0.024541229f, -0.999698819f,
+    0.012271538f, -0.999924702f
+};
+
+const float32_t twiddleCoef_rfft_1024[1024] = {
+    0.000000000f,  1.000000000f,
+    0.006135885f,  0.999981175f,
+    0.012271538f,  0.999924702f,
+    0.018406730f,  0.999830582f,
+    0.024541229f,  0.999698819f,
+    0.030674803f,  0.999529418f,
+    0.036807223f,  0.999322385f,
+    0.042938257f,  0.999077728f,
+    0.049067674f,  0.998795456f,
+    0.055195244f,  0.998475581f,
+    0.061320736f,  0.998118113f,
+    0.067443920f,  0.997723067f,
+    0.073564564f,  0.997290457f,
+    0.079682438f,  0.996820299f,
+    0.085797312f,  0.996312612f,
+    0.091908956f,  0.995767414f,
+    0.098017140f,  0.995184727f,
+    0.104121634f,  0.994564571f,
+    0.110222207f,  0.993906970f,
+    0.116318631f,  0.993211949f,
+    0.122410675f,  0.992479535f,
+    0.128498111f,  0.991709754f,
+    0.134580709f,  0.990902635f,
+    0.140658239f,  0.990058210f,
+    0.146730474f,  0.989176510f,
+    0.152797185f,  0.988257568f,
+    0.158858143f,  0.987301418f,
+    0.164913120f,  0.986308097f,
+    0.170961889f,  0.985277642f,
+    0.177004220f,  0.984210092f,
+    0.183039888f,  0.983105487f,
+    0.189068664f,  0.981963869f,
+    0.195090322f,  0.980785280f,
+    0.201104635f,  0.979569766f,
+    0.207111376f,  0.978317371f,
+    0.213110320f,  0.977028143f,
+    0.219101240f,  0.975702130f,
+    0.225083911f,  0.974339383f,
+    0.231058108f,  0.972939952f,
+    0.237023606f,  0.971503891f,
+    0.242980180f,  0.970031253f,
+    0.248927606f,  0.968522094f,
+    0.254865660f,  0.966976471f,
+    0.260794118f,  0.965394442f,
+    0.266712757f,  0.963776066f,
+    0.272621355f,  0.962121404f,
+    0.278519689f,  0.960430519f,
+    0.284407537f,  0.958703475f,
+    0.290284677f,  0.956940336f,
+    0.296150888f,  0.955141168f,
+    0.302005949f,  0.953306040f,
+    0.307849640f,  0.951435021f,
+    0.313681740f,  0.949528181f,
+    0.319502031f,  0.947585591f,
+    0.325310292f,  0.945607325f,
+    0.331106306f,  0.943593458f,
+    0.336889853f,  0.941544065f,
+    0.342660717f,  0.939459224f,
+    0.348418680f,  0.937339012f,
+    0.354163525f,  0.935183510f,
+    0.359895037f,  0.932992799f,
+    0.365612998f,  0.930766961f,
+    0.371317194f,  0.928506080f,
+    0.377007410f,  0.926210242f,
+    0.382683432f,  0.923879533f,
+    0.388345047f,  0.921514039f,
+    0.393992040f,  0.919113852f,
+    0.399624200f,  0.916679060f,
+    0.405241314f,  0.914209756f,
+    0.410843171f,  0.911706032f,
+    0.416429560f,  0.909167983f,
+    0.422000271f,  0.906595705f,
+    0.427555093f,  0.903989293f,
+    0.433093819f,  0.901348847f,
+    0.438616239f,  0.898674466f,
+    0.444122145f,  0.895966250f,
+    0.449611330f,  0.893224301f,
+    0.455083587f,  0.890448723f,
+    0.460538711f,  0.887639620f,
+    0.465976496f,  0.884797098f,
+    0.471396737f,  0.881921264f,
+    0.476799230f,  0.879012226f,
+    0.482183772f,  0.876070094f,
+    0.487550160f,  0.873094978f,
+    0.492898192f,  0.870086991f,
+    0.498227667f,  0.867046246f,
+    0.503538384f,  0.863972856f,
+    0.508830143f,  0.860866939f,
+    0.514102744f,  0.857728610f,
+    0.519355990f,  0.854557988f,
+    0.524589683f,  0.851355193f,
+    0.529803625f,  0.848120345f,
+    0.534997620f,  0.844853565f,
+    0.540171473f,  0.841554977f,
+    0.545324988f,  0.838224706f,
+    0.550457973f,  0.834862875f,
+    0.555570233f,  0.831469612f,
+    0.560661576f,  0.828045045f,
+    0.565731811f,  0.824589303f,
+    0.570780746f,  0.821102515f,
+    0.575808191f,  0.817584813f,
+    0.580813958f,  0.814036330f,
+    0.585797857f,  0.810457198f,
+    0.590759702f,  0.806847554f,
+    0.595699304f,  0.803207531f,
+    0.600616479f,  0.799537269f,
+    0.605511041f,  0.795836905f,
+    0.610382806f,  0.792106577f,
+    0.615231591f,  0.788346428f,
+    0.620057212f,  0.784556597f,
+    0.624859488f,  0.780737229f,
+    0.629638239f,  0.776888466f,
+    0.634393284f,  0.773010453f,
+    0.639124445f,  0.769103338f,
+    0.643831543f,  0.765167266f,
+    0.648514401f,  0.761202385f,
+    0.653172843f,  0.757208847f,
+    0.657806693f,  0.753186799f,
+    0.662415778f,  0.749136395f,
+    0.666999922f,  0.745057785f,
+    0.671558955f,  0.740951125f,
+    0.676092704f,  0.736816569f,
+    0.680600998f,  0.732654272f,
+    0.685083668f,  0.728464390f,
+    0.689540545f,  0.724247083f,
+    0.693971461f,  0.720002508f,
+    0.698376249f,  0.715730825f,
+    0.702754744f,  0.711432196f,
+    0.707106781f,  0.707106781f,
+    0.711432196f,  0.702754744f,
+    0.715730825f,  0.698376249f,
+    0.720002508f,  0.693971461f,
+    0.724247083f,  0.689540545f,
+    0.728464390f,  0.685083668f,
+    0.732654272f,  0.680600998f,
+    0.736816569f,  0.676092704f,
+    0.740951125f,  0.671558955f,
+    0.745057785f,  0.666999922f,
+    0.749136395f,  0.662415778f,
+    0.753186799f,  0.657806693f,
+    0.757208847f,  0.653172843f,
+    0.761202385f,  0.648514401f,
+    0.765167266f,  0.643831543f,
+    0.769103338f,  0.639124445f,
+    0.773010453f,  0.634393284f,
+    0.776888466f,  0.629638239f,
+    0.780737229f,  0.624859488f,
+    0.784556597f,  0.620057212f,
+    0.788346428f,  0.615231591f,
+    0.792106577f,  0.610382806f,
+    0.795836905f,  0.605511041f,
+    0.799537269f,  0.600616479f,
+    0.803207531f,  0.595699304f,
+    0.806847554f,  0.590759702f,
+    0.810457198f,  0.585797857f,
+    0.814036330f,  0.580813958f,
+    0.817584813f,  0.575808191f,
+    0.821102515f,  0.570780746f,
+    0.824589303f,  0.565731811f,
+    0.828045045f,  0.560661576f,
+    0.831469612f,  0.555570233f,
+    0.834862875f,  0.550457973f,
+    0.838224706f,  0.545324988f,
+    0.841554977f,  0.540171473f,
+    0.844853565f,  0.534997620f,
+    0.848120345f,  0.529803625f,
+    0.851355193f,  0.524589683f,
+    0.854557988f,  0.519355990f,
+    0.857728610f,  0.514102744f,
+    0.860866939f,  0.508830143f,
+    0.863972856f,  0.503538384f,
+    0.867046246f,  0.498227667f,
+    0.870086991f,  0.492898192f,
+    0.873094978f,  0.487550160f,
+    0.876070094f,  0.482183772f,
+    0.879012226f,  0.476799230f,
+    0.881921264f,  0.471396737f,
+    0.884797098f,  0.465976496f,
+    0.887639620f,  0.460538711f,
+    0.890448723f,  0.455083587f,
+    0.893224301f,  0.449611330f,
+    0.895966250f,  0.444122145f,
+    0.898674466f,  0.438616239f,
+    0.901348847f,  0.433093819f,
+    0.903989293f,  0.427555093f,
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+    0.909167983f,  0.416429560f,
+    0.911706032f,  0.410843171f,
+    0.914209756f,  0.405241314f,
+    0.916679060f,  0.399624200f,
+    0.919113852f,  0.393992040f,
+    0.921514039f,  0.388345047f,
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+    0.928506080f,  0.371317194f,
+    0.930766961f,  0.365612998f,
+    0.932992799f,  0.359895037f,
+    0.935183510f,  0.354163525f,
+    0.937339012f,  0.348418680f,
+    0.939459224f,  0.342660717f,
+    0.941544065f,  0.336889853f,
+    0.943593458f,  0.331106306f,
+    0.945607325f,  0.325310292f,
+    0.947585591f,  0.319502031f,
+    0.949528181f,  0.313681740f,
+    0.951435021f,  0.307849640f,
+    0.953306040f,  0.302005949f,
+    0.955141168f,  0.296150888f,
+    0.956940336f,  0.290284677f,
+    0.958703475f,  0.284407537f,
+    0.960430519f,  0.278519689f,
+    0.962121404f,  0.272621355f,
+    0.963776066f,  0.266712757f,
+    0.965394442f,  0.260794118f,
+    0.966976471f,  0.254865660f,
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+    0.728464390f, -0.685083668f,
+    0.724247083f, -0.689540545f,
+    0.720002508f, -0.693971461f,
+    0.715730825f, -0.698376249f,
+    0.711432196f, -0.702754744f,
+    0.707106781f, -0.707106781f,
+    0.702754744f, -0.711432196f,
+    0.698376249f, -0.715730825f,
+    0.693971461f, -0.720002508f,
+    0.689540545f, -0.724247083f,
+    0.685083668f, -0.728464390f,
+    0.680600998f, -0.732654272f,
+    0.676092704f, -0.736816569f,
+    0.671558955f, -0.740951125f,
+    0.666999922f, -0.745057785f,
+    0.662415778f, -0.749136395f,
+    0.657806693f, -0.753186799f,
+    0.653172843f, -0.757208847f,
+    0.648514401f, -0.761202385f,
+    0.643831543f, -0.765167266f,
+    0.639124445f, -0.769103338f,
+    0.634393284f, -0.773010453f,
+    0.629638239f, -0.776888466f,
+    0.624859488f, -0.780737229f,
+    0.620057212f, -0.784556597f,
+    0.615231591f, -0.788346428f,
+    0.610382806f, -0.792106577f,
+    0.605511041f, -0.795836905f,
+    0.600616479f, -0.799537269f,
+    0.595699304f, -0.803207531f,
+    0.590759702f, -0.806847554f,
+    0.585797857f, -0.810457198f,
+    0.580813958f, -0.814036330f,
+    0.575808191f, -0.817584813f,
+    0.570780746f, -0.821102515f,
+    0.565731811f, -0.824589303f,
+    0.560661576f, -0.828045045f,
+    0.555570233f, -0.831469612f,
+    0.550457973f, -0.834862875f,
+    0.545324988f, -0.838224706f,
+    0.540171473f, -0.841554977f,
+    0.534997620f, -0.844853565f,
+    0.529803625f, -0.848120345f,
+    0.524589683f, -0.851355193f,
+    0.519355990f, -0.854557988f,
+    0.514102744f, -0.857728610f,
+    0.508830143f, -0.860866939f,
+    0.503538384f, -0.863972856f,
+    0.498227667f, -0.867046246f,
+    0.492898192f, -0.870086991f,
+    0.487550160f, -0.873094978f,
+    0.482183772f, -0.876070094f,
+    0.476799230f, -0.879012226f,
+    0.471396737f, -0.881921264f,
+    0.465976496f, -0.884797098f,
+    0.460538711f, -0.887639620f,
+    0.455083587f, -0.890448723f,
+    0.449611330f, -0.893224301f,
+    0.444122145f, -0.895966250f,
+    0.438616239f, -0.898674466f,
+    0.433093819f, -0.901348847f,
+    0.427555093f, -0.903989293f,
+    0.422000271f, -0.906595705f,
+    0.416429560f, -0.909167983f,
+    0.410843171f, -0.911706032f,
+    0.405241314f, -0.914209756f,
+    0.399624200f, -0.916679060f,
+    0.393992040f, -0.919113852f,
+    0.388345047f, -0.921514039f,
+    0.382683432f, -0.923879533f,
+    0.377007410f, -0.926210242f,
+    0.371317194f, -0.928506080f,
+    0.365612998f, -0.930766961f,
+    0.359895037f, -0.932992799f,
+    0.354163525f, -0.935183510f,
+    0.348418680f, -0.937339012f,
+    0.342660717f, -0.939459224f,
+    0.336889853f, -0.941544065f,
+    0.331106306f, -0.943593458f,
+    0.325310292f, -0.945607325f,
+    0.319502031f, -0.947585591f,
+    0.313681740f, -0.949528181f,
+    0.307849640f, -0.951435021f,
+    0.302005949f, -0.953306040f,
+    0.296150888f, -0.955141168f,
+    0.290284677f, -0.956940336f,
+    0.284407537f, -0.958703475f,
+    0.278519689f, -0.960430519f,
+    0.272621355f, -0.962121404f,
+    0.266712757f, -0.963776066f,
+    0.260794118f, -0.965394442f,
+    0.254865660f, -0.966976471f,
+    0.248927606f, -0.968522094f,
+    0.242980180f, -0.970031253f,
+    0.237023606f, -0.971503891f,
+    0.231058108f, -0.972939952f,
+    0.225083911f, -0.974339383f,
+    0.219101240f, -0.975702130f,
+    0.213110320f, -0.977028143f,
+    0.207111376f, -0.978317371f,
+    0.201104635f, -0.979569766f,
+    0.195090322f, -0.980785280f,
+    0.189068664f, -0.981963869f,
+    0.183039888f, -0.983105487f,
+    0.177004220f, -0.984210092f,
+    0.170961889f, -0.985277642f,
+    0.164913120f, -0.986308097f,
+    0.158858143f, -0.987301418f,
+    0.152797185f, -0.988257568f,
+    0.146730474f, -0.989176510f,
+    0.140658239f, -0.990058210f,
+    0.134580709f, -0.990902635f,
+    0.128498111f, -0.991709754f,
+    0.122410675f, -0.992479535f,
+    0.116318631f, -0.993211949f,
+    0.110222207f, -0.993906970f,
+    0.104121634f, -0.994564571f,
+    0.098017140f, -0.995184727f,
+    0.091908956f, -0.995767414f,
+    0.085797312f, -0.996312612f,
+    0.079682438f, -0.996820299f,
+    0.073564564f, -0.997290457f,
+    0.067443920f, -0.997723067f,
+    0.061320736f, -0.998118113f,
+    0.055195244f, -0.998475581f,
+    0.049067674f, -0.998795456f,
+    0.042938257f, -0.999077728f,
+    0.036807223f, -0.999322385f,
+    0.030674803f, -0.999529418f,
+    0.024541229f, -0.999698819f,
+    0.018406730f, -0.999830582f,
+    0.012271538f, -0.999924702f,
+    0.006135885f, -0.999981175f
+};
+
+const float32_t twiddleCoef_rfft_2048[2048] = {
+    0.000000000f,  1.000000000f,
+    0.003067957f,  0.999995294f,
+    0.006135885f,  0.999981175f,
+    0.009203755f,  0.999957645f,
+    0.012271538f,  0.999924702f,
+    0.015339206f,  0.999882347f,
+    0.018406730f,  0.999830582f,
+    0.021474080f,  0.999769405f,
+    0.024541229f,  0.999698819f,
+    0.027608146f,  0.999618822f,
+    0.030674803f,  0.999529418f,
+    0.033741172f,  0.999430605f,
+    0.036807223f,  0.999322385f,
+    0.039872928f,  0.999204759f,
+    0.042938257f,  0.999077728f,
+    0.046003182f,  0.998941293f,
+    0.049067674f,  0.998795456f,
+    0.052131705f,  0.998640218f,
+    0.055195244f,  0.998475581f,
+    0.058258265f,  0.998301545f,
+    0.061320736f,  0.998118113f,
+    0.064382631f,  0.997925286f,
+    0.067443920f,  0.997723067f,
+    0.070504573f,  0.997511456f,
+    0.073564564f,  0.997290457f,
+    0.076623861f,  0.997060070f,
+    0.079682438f,  0.996820299f,
+    0.082740265f,  0.996571146f,
+    0.085797312f,  0.996312612f,
+    0.088853553f,  0.996044701f,
+    0.091908956f,  0.995767414f,
+    0.094963495f,  0.995480755f,
+    0.098017140f,  0.995184727f,
+    0.101069863f,  0.994879331f,
+    0.104121634f,  0.994564571f,
+    0.107172425f,  0.994240449f,
+    0.110222207f,  0.993906970f,
+    0.113270952f,  0.993564136f,
+    0.116318631f,  0.993211949f,
+    0.119365215f,  0.992850414f,
+    0.122410675f,  0.992479535f,
+    0.125454983f,  0.992099313f,
+    0.128498111f,  0.991709754f,
+    0.131540029f,  0.991310860f,
+    0.134580709f,  0.990902635f,
+    0.137620122f,  0.990485084f,
+    0.140658239f,  0.990058210f,
+    0.143695033f,  0.989622017f,
+    0.146730474f,  0.989176510f,
+    0.149764535f,  0.988721692f,
+    0.152797185f,  0.988257568f,
+    0.155828398f,  0.987784142f,
+    0.158858143f,  0.987301418f,
+    0.161886394f,  0.986809402f,
+    0.164913120f,  0.986308097f,
+    0.167938295f,  0.985797509f,
+    0.170961889f,  0.985277642f,
+    0.173983873f,  0.984748502f,
+    0.177004220f,  0.984210092f,
+    0.180022901f,  0.983662419f,
+    0.183039888f,  0.983105487f,
+    0.186055152f,  0.982539302f,
+    0.189068664f,  0.981963869f,
+    0.192080397f,  0.981379193f,
+    0.195090322f,  0.980785280f,
+    0.198098411f,  0.980182136f,
+    0.201104635f,  0.979569766f,
+    0.204108966f,  0.978948175f,
+    0.207111376f,  0.978317371f,
+    0.210111837f,  0.977677358f,
+    0.213110320f,  0.977028143f,
+    0.216106797f,  0.976369731f,
+    0.219101240f,  0.975702130f,
+    0.222093621f,  0.975025345f,
+    0.225083911f,  0.974339383f,
+    0.228072083f,  0.973644250f,
+    0.231058108f,  0.972939952f,
+    0.234041959f,  0.972226497f,
+    0.237023606f,  0.971503891f,
+    0.240003022f,  0.970772141f,
+    0.242980180f,  0.970031253f,
+    0.245955050f,  0.969281235f,
+    0.248927606f,  0.968522094f,
+    0.251897818f,  0.967753837f,
+    0.254865660f,  0.966976471f,
+    0.257831102f,  0.966190003f,
+    0.260794118f,  0.965394442f,
+    0.263754679f,  0.964589793f,
+    0.266712757f,  0.963776066f,
+    0.269668326f,  0.962953267f,
+    0.272621355f,  0.962121404f,
+    0.275571819f,  0.961280486f,
+    0.278519689f,  0.960430519f,
+    0.281464938f,  0.959571513f,
+    0.284407537f,  0.958703475f,
+    0.287347460f,  0.957826413f,
+    0.290284677f,  0.956940336f,
+    0.293219163f,  0.956045251f,
+    0.296150888f,  0.955141168f,
+    0.299079826f,  0.954228095f,
+    0.302005949f,  0.953306040f,
+    0.304929230f,  0.952375013f,
+    0.307849640f,  0.951435021f,
+    0.310767153f,  0.950486074f,
+    0.313681740f,  0.949528181f,
+    0.316593376f,  0.948561350f,
+    0.319502031f,  0.947585591f,
+    0.322407679f,  0.946600913f,
+    0.325310292f,  0.945607325f,
+    0.328209844f,  0.944604837f,
+    0.331106306f,  0.943593458f,
+    0.333999651f,  0.942573198f,
+    0.336889853f,  0.941544065f,
+    0.339776884f,  0.940506071f,
+    0.342660717f,  0.939459224f,
+    0.345541325f,  0.938403534f,
+    0.348418680f,  0.937339012f,
+    0.351292756f,  0.936265667f,
+    0.354163525f,  0.935183510f,
+    0.357030961f,  0.934092550f,
+    0.359895037f,  0.932992799f,
+    0.362755724f,  0.931884266f,
+    0.365612998f,  0.930766961f,
+    0.368466830f,  0.929640896f,
+    0.371317194f,  0.928506080f,
+    0.374164063f,  0.927362526f,
+    0.377007410f,  0.926210242f,
+    0.379847209f,  0.925049241f,
+    0.382683432f,  0.923879533f,
+    0.385516054f,  0.922701128f,
+    0.388345047f,  0.921514039f,
+    0.391170384f,  0.920318277f,
+    0.393992040f,  0.919113852f,
+    0.396809987f,  0.917900776f,
+    0.399624200f,  0.916679060f,
+    0.402434651f,  0.915448716f,
+    0.405241314f,  0.914209756f,
+    0.408044163f,  0.912962190f,
+    0.410843171f,  0.911706032f,
+    0.413638312f,  0.910441292f,
+    0.416429560f,  0.909167983f,
+    0.419216888f,  0.907886116f,
+    0.422000271f,  0.906595705f,
+    0.424779681f,  0.905296759f,
+    0.427555093f,  0.903989293f,
+    0.430326481f,  0.902673318f,
+    0.433093819f,  0.901348847f,
+    0.435857080f,  0.900015892f,
+    0.438616239f,  0.898674466f,
+    0.441371269f,  0.897324581f,
+    0.444122145f,  0.895966250f,
+    0.446868840f,  0.894599486f,
+    0.449611330f,  0.893224301f,
+    0.452349587f,  0.891840709f,
+    0.455083587f,  0.890448723f,
+    0.457813304f,  0.889048356f,
+    0.460538711f,  0.887639620f,
+    0.463259784f,  0.886222530f,
+    0.465976496f,  0.884797098f,
+    0.468688822f,  0.883363339f,
+    0.471396737f,  0.881921264f,
+    0.474100215f,  0.880470889f,
+    0.476799230f,  0.879012226f,
+    0.479493758f,  0.877545290f,
+    0.482183772f,  0.876070094f,
+    0.484869248f,  0.874586652f,
+    0.487550160f,  0.873094978f,
+    0.490226483f,  0.871595087f,
+    0.492898192f,  0.870086991f,
+    0.495565262f,  0.868570706f,
+    0.498227667f,  0.867046246f,
+    0.500885383f,  0.865513624f,
+    0.503538384f,  0.863972856f,
+    0.506186645f,  0.862423956f,
+    0.508830143f,  0.860866939f,
+    0.511468850f,  0.859301818f,
+    0.514102744f,  0.857728610f,
+    0.516731799f,  0.856147328f,
+    0.519355990f,  0.854557988f,
+    0.521975293f,  0.852960605f,
+    0.524589683f,  0.851355193f,
+    0.527199135f,  0.849741768f,
+    0.529803625f,  0.848120345f,
+    0.532403128f,  0.846490939f,
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+    0.537587076f,  0.843208240f,
+    0.540171473f,  0.841554977f,
+    0.542750785f,  0.839893794f,
+    0.545324988f,  0.838224706f,
+    0.547894059f,  0.836547727f,
+    0.550457973f,  0.834862875f,
+    0.553016706f,  0.833170165f,
+    0.555570233f,  0.831469612f,
+    0.558118531f,  0.829761234f,
+    0.560661576f,  0.828045045f,
+    0.563199344f,  0.826321063f,
+    0.565731811f,  0.824589303f,
+    0.568258953f,  0.822849781f,
+    0.570780746f,  0.821102515f,
+    0.573297167f,  0.819347520f,
+    0.575808191f,  0.817584813f,
+    0.578313796f,  0.815814411f,
+    0.580813958f,  0.814036330f,
+    0.583308653f,  0.812250587f,
+    0.585797857f,  0.810457198f,
+    0.588281548f,  0.808656182f,
+    0.590759702f,  0.806847554f,
+    0.593232295f,  0.805031331f,
+    0.595699304f,  0.803207531f,
+    0.598160707f,  0.801376172f,
+    0.600616479f,  0.799537269f,
+    0.603066599f,  0.797690841f,
+    0.605511041f,  0.795836905f,
+    0.607949785f,  0.793975478f,
+    0.610382806f,  0.792106577f,
+    0.612810082f,  0.790230221f,
+    0.615231591f,  0.788346428f,
+    0.617647308f,  0.786455214f,
+    0.620057212f,  0.784556597f,
+    0.622461279f,  0.782650596f,
+    0.624859488f,  0.780737229f,
+    0.627251815f,  0.778816512f,
+    0.629638239f,  0.776888466f,
+    0.632018736f,  0.774953107f,
+    0.634393284f,  0.773010453f,
+    0.636761861f,  0.771060524f,
+    0.639124445f,  0.769103338f,
+    0.641481013f,  0.767138912f,
+    0.643831543f,  0.765167266f,
+    0.646176013f,  0.763188417f,
+    0.648514401f,  0.761202385f,
+    0.650846685f,  0.759209189f,
+    0.653172843f,  0.757208847f,
+    0.655492853f,  0.755201377f,
+    0.657806693f,  0.753186799f,
+    0.660114342f,  0.751165132f,
+    0.662415778f,  0.749136395f,
+    0.664710978f,  0.747100606f,
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+    0.669282588f,  0.743007952f,
+    0.671558955f,  0.740951125f,
+    0.673829000f,  0.738887324f,
+    0.676092704f,  0.736816569f,
+    0.678350043f,  0.734738878f,
+    0.680600998f,  0.732654272f,
+    0.682845546f,  0.730562769f,
+    0.685083668f,  0.728464390f,
+    0.687315341f,  0.726359155f,
+    0.689540545f,  0.724247083f,
+    0.691759258f,  0.722128194f,
+    0.693971461f,  0.720002508f,
+    0.696177131f,  0.717870045f,
+    0.698376249f,  0.715730825f,
+    0.700568794f,  0.713584869f,
+    0.702754744f,  0.711432196f,
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+    0.091908956f, -0.995767414f,
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+    0.064382631f, -0.997925286f,
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+    0.049067674f, -0.998795456f,
+    0.046003182f, -0.998941293f,
+    0.042938257f, -0.999077728f,
+    0.039872928f, -0.999204759f,
+    0.036807223f, -0.999322385f,
+    0.033741172f, -0.999430605f,
+    0.030674803f, -0.999529418f,
+    0.027608146f, -0.999618822f,
+    0.024541229f, -0.999698819f,
+    0.021474080f, -0.999769405f,
+    0.018406730f, -0.999830582f,
+    0.015339206f, -0.999882347f,
+    0.012271538f, -0.999924702f,
+    0.009203755f, -0.999957645f,
+    0.006135885f, -0.999981175f,
+    0.003067957f, -0.999995294f
+};
+
+const float32_t twiddleCoef_rfft_4096[4096] = {
+    0.000000000f,  1.000000000f,
+    0.001533980f,  0.999998823f,
+    0.003067957f,  0.999995294f,
+    0.004601926f,  0.999989411f,
+    0.006135885f,  0.999981175f,
+    0.007669829f,  0.999970586f,
+    0.009203755f,  0.999957645f,
+    0.010737659f,  0.999942350f,
+    0.012271538f,  0.999924702f,
+    0.013805389f,  0.999904701f,
+    0.015339206f,  0.999882347f,
+    0.016872988f,  0.999857641f,
+    0.018406730f,  0.999830582f,
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+    0.117842062f, -0.993032350f,
+    0.116318631f, -0.993211949f,
+    0.114794927f, -0.993389211f,
+    0.113270952f, -0.993564136f,
+    0.111746711f, -0.993736722f,
+    0.110222207f, -0.993906970f,
+    0.108697444f, -0.994074879f,
+    0.107172425f, -0.994240449f,
+    0.105647154f, -0.994403680f,
+    0.104121634f, -0.994564571f,
+    0.102595869f, -0.994723121f,
+    0.101069863f, -0.994879331f,
+    0.099543619f, -0.995033199f,
+    0.098017140f, -0.995184727f,
+    0.096490431f, -0.995333912f,
+    0.094963495f, -0.995480755f,
+    0.093436336f, -0.995625256f,
+    0.091908956f, -0.995767414f,
+    0.090381361f, -0.995907229f,
+    0.088853553f, -0.996044701f,
+    0.087325535f, -0.996179829f,
+    0.085797312f, -0.996312612f,
+    0.084268888f, -0.996443051f,
+    0.082740265f, -0.996571146f,
+    0.081211447f, -0.996696895f,
+    0.079682438f, -0.996820299f,
+    0.078153242f, -0.996941358f,
+    0.076623861f, -0.997060070f,
+    0.075094301f, -0.997176437f,
+    0.073564564f, -0.997290457f,
+    0.072034653f, -0.997402130f,
+    0.070504573f, -0.997511456f,
+    0.068974328f, -0.997618435f,
+    0.067443920f, -0.997723067f,
+    0.065913353f, -0.997825350f,
+    0.064382631f, -0.997925286f,
+    0.062851758f, -0.998022874f,
+    0.061320736f, -0.998118113f,
+    0.059789571f, -0.998211003f,
+    0.058258265f, -0.998301545f,
+    0.056726821f, -0.998389737f,
+    0.055195244f, -0.998475581f,
+    0.053663538f, -0.998559074f,
+    0.052131705f, -0.998640218f,
+    0.050599749f, -0.998719012f,
+    0.049067674f, -0.998795456f,
+    0.047535484f, -0.998869550f,
+    0.046003182f, -0.998941293f,
+    0.044470772f, -0.999010686f,
+    0.042938257f, -0.999077728f,
+    0.041405641f, -0.999142419f,
+    0.039872928f, -0.999204759f,
+    0.038340120f, -0.999264747f,
+    0.036807223f, -0.999322385f,
+    0.035274239f, -0.999377670f,
+    0.033741172f, -0.999430605f,
+    0.032208025f, -0.999481187f,
+    0.030674803f, -0.999529418f,
+    0.029141509f, -0.999575296f,
+    0.027608146f, -0.999618822f,
+    0.026074718f, -0.999659997f,
+    0.024541229f, -0.999698819f,
+    0.023007681f, -0.999735288f,
+    0.021474080f, -0.999769405f,
+    0.019940429f, -0.999801170f,
+    0.018406730f, -0.999830582f,
+    0.016872988f, -0.999857641f,
+    0.015339206f, -0.999882347f,
+    0.013805389f, -0.999904701f,
+    0.012271538f, -0.999924702f,
+    0.010737659f, -0.999942350f,
+    0.009203755f, -0.999957645f,
+    0.007669829f, -0.999970586f,
+    0.006135885f, -0.999981175f,
+    0.004601926f, -0.999989411f,
+    0.003067957f, -0.999995294f,
+    0.001533980f, -0.999998823f
+};
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c
index cdaf4c84e1..83d7fe7f94 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_conj_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -78,7 +86,7 @@ void arm_cmplx_conj_f32(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t inR1, inR2, inR3, inR4;
@@ -155,7 +163,7 @@ void arm_cmplx_conj_f32(
   /* Run the below code for Cortex-M0 */
   blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c
index 92905fdf49..5f13ca3cb7 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_conj_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -60,7 +68,7 @@ void arm_cmplx_conj_q15(
   uint32_t numSamples)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -144,7 +152,7 @@ void arm_cmplx_conj_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c
index 5f874aa690..496107352d 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_conj_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_conj_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -61,7 +69,7 @@ void arm_cmplx_conj_q31(
   uint32_t blkCnt;                               /* loop counter */
   q31_t in;                                      /* Input value */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
@@ -151,7 +159,7 @@ void arm_cmplx_conj_q31(
   blkCnt = numSamples;
 
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
@@ -160,7 +168,7 @@ void arm_cmplx_conj_q31(
     /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
     *pDst++ = *pSrc++;
     in = *pSrc++;
-    *pDst++ = (in == 0x80000000) ? 0x7fffffff : -in;
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
 
     /* Decrement the loop counter */
     blkCnt--;
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
index 200b309aae..da7c5517c5 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_dot_prod_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -86,7 +94,7 @@ void arm_cmplx_dot_prod_f32(
 {
   float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -148,7 +156,7 @@ void arm_cmplx_dot_prod_f32(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Store the real and imaginary results in the destination buffers */
   *realResult = real_sum;
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
index db7fbae527..1d168d7c97 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_dot_prod_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -68,7 +76,7 @@ void arm_cmplx_dot_prod_q15(
 {
   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -130,7 +138,7 @@ void arm_cmplx_dot_prod_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Store the real and imaginary results in 8.24 format  */
   /* Convert real data in 34.30 to 8.24 by 6 right shifts */
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
index 1acc49dc2c..f7e2363bcc 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_dot_prod_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -69,7 +77,7 @@ void arm_cmplx_dot_prod_q31(
 {
   q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -133,7 +141,7 @@ void arm_cmplx_dot_prod_q31(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Store the real and imaginary results in 16.48 format  */
   *realResult = real_sum;
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c
index 043e002a84..2dc16b1a72 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -80,7 +88,7 @@ void arm_cmplx_mag_f32(
 {
   float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -148,7 +156,7 @@ void arm_cmplx_mag_f32(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c
index 13b862b5a2..89decf2b57 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -61,7 +69,7 @@ void arm_cmplx_mag_q15(
 {
   q31_t acc0, acc1;                              /* Accumulators */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -136,7 +144,7 @@ void arm_cmplx_mag_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c
index bf1af75e6b..c92fcb46fe 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -63,7 +71,7 @@ void arm_cmplx_mag_q31(
   q31_t acc0, acc1;                              /* Accumulators */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
@@ -155,7 +163,7 @@ void arm_cmplx_mag_q31(
   /* Run the below code for Cortex-M0 */
   blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
index c49d006a19..abc36976d9 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_squared_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -81,7 +89,7 @@ void arm_cmplx_mag_squared_f32(
   float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
   float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
   float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
   float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
@@ -185,7 +193,7 @@ void arm_cmplx_mag_squared_f32(
 
   blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
index 42694058ae..2dfce2ca1f 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_squared_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -60,7 +68,7 @@ void arm_cmplx_mag_squared_q15(
 {
   q31_t acc0, acc1;                              /* Accumulators */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -131,7 +139,7 @@ void arm_cmplx_mag_squared_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
index 7670c88497..3d14080692 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cmplx_mag_squared_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -63,7 +71,7 @@ void arm_cmplx_mag_squared_q31(
   q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
   q31_t acc0, acc1;                              /* Accumulators */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counter */
@@ -144,7 +152,7 @@ void arm_cmplx_mag_squared_q31(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
index 15109f231c..1fe0f36b76 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_cmplx_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -81,7 +89,7 @@ void arm_cmplx_mult_cmplx_f32(
   float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
   uint32_t blkCnt;                               /* loop counters */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
@@ -174,7 +182,7 @@ void arm_cmplx_mult_cmplx_f32(
   /* Run the below code for Cortex-M0 */
   blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
index 89412f5ba1..a775d9831c 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_cmplx_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -62,7 +70,7 @@ void arm_cmplx_mult_cmplx_q15(
 {
   q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counters */
@@ -176,7 +184,7 @@ void arm_cmplx_mult_cmplx_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
index 668cbfa610..7b91b35ea8 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_cmplx_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -67,7 +75,7 @@ void arm_cmplx_mult_cmplx_q31(
   q31_t mul1, mul2, mul3, mul4;
   q31_t out1, out2;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -309,7 +317,7 @@ void arm_cmplx_mult_cmplx_q31(
     blkCnt--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
index bbd7cf6746..10d3f512c0 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_real_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -83,7 +91,7 @@ void arm_cmplx_mult_real_f32(
   float32_t in;                                  /* Temporary variable to store input value */
   uint32_t blkCnt;                               /* loop counters */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
@@ -196,7 +204,7 @@ void arm_cmplx_mult_real_f32(
   /* Run the below code for Cortex-M0 */
   blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
index 2e56b0f3f6..0bba423630 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_real_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -64,7 +72,7 @@ void arm_cmplx_mult_real_q15(
 {
   q15_t in;                                      /* Temporary variable to store input value */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counters */
@@ -186,7 +194,7 @@ void arm_cmplx_mult_real_q15(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
index 94483f62b0..44641ea2b2 100644
--- a/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ b/libraries/dsp/cmsis_dsp/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cmplx_mult_real_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -64,7 +72,7 @@ void arm_cmplx_mult_real_q31(
 {
   q31_t inA1;                                    /* Temporary variable to store input value */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   uint32_t blkCnt;                               /* loop counters */
@@ -206,7 +214,7 @@ void arm_cmplx_mult_real_q31(
     numSamples--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c
index 9ae46d9ae8..cc1fc99a0d 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_init_f32.c    
@@ -12,23 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c
index a10b1e1cfe..8f293f6e32 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_init_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -55,7 +63,7 @@ void arm_pid_init_q15(
   int32_t resetStateFlag)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -105,7 +113,7 @@ void arm_pid_init_q15(
     memset(S->state, 0, 3u * sizeof(q15_t));
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c
index 0afd13bb78..b492cf79ff 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_init_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -55,7 +63,7 @@ void arm_pid_init_q31(
   int32_t resetStateFlag)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -80,7 +88,7 @@ void arm_pid_init_q31(
   temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
   S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Derived coefficient A2 */
   S->A2 = S->Kd;
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c
index 739812e97f..c6753b1b5e 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_reset_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c
index 588e2b8694..410339e596 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_reset_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c
index 4b63f410d0..fd8208008f 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_pid_reset_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_pid_reset_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c
index 8ee5f359dd..4658f9a2a7 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_sin_cos_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c
index e4c8373672..370b7b6ef1 100644
--- a/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c
+++ b/libraries/dsp/cmsis_dsp/ControllerFunctions/arm_sin_cos_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_sin_cos_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -272,7 +280,7 @@ void arm_sin_cos_q31(
   q31_t x0;                                      /* Nearest input value */
   q31_t y0, y1;                                  /* Nearest output values */
   q31_t xSpacing = INPUT_SPACING;                /* Spaing between inputs */
-  int32_t i;                                     /* Index */
+  uint32_t i;                                    /* Index */
   q31_t oneByXSpacing;                           /* 1/ xSpacing value */
   q31_t out;                                     /* temporary variable */
   uint32_t sign_bits;                            /* No.of sign bits */
@@ -282,11 +290,7 @@ void arm_sin_cos_q31(
   i = ((uint32_t) theta - firstX) / (uint32_t) xSpacing;
 
   /* Checking min and max index of table */
-  if(i < 0)
-  {
-    i = 0;
-  }
-  else if(i >= 359)
+  if(i >= 359)
   {
     i = 358;
   }
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_f32.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_f32.c
index b04aa02f54..20a9f3657b 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_f32.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cos_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -43,7 +51,8 @@
  * Q15, Q31, and floating-point data types.   
  * The input to the floating-point version is in radians while the   
  * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi.   
+ * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+ * value of 2*pi wraps around to 0.
  *   
  * The implementation is based on table lookup using 256 values together with cubic interpolation.   
  * The steps used are:   
@@ -77,9 +86,10 @@
 
 /**    
 * \par    
-* Example code for Generation of Cos Table:   
+* Example code for Generation of Cos Table:
+* 
 * tableSize = 256;    
-* 
for(n = -1; n < (tableSize + 2); n++)    
+* for(n = -1; n < (tableSize + 2); n++)    
 * {    
 *	cosTable[n+1]= cos(2*pi*n/tableSize);    
 * } 
    
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q15.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q15.c
index 12339fd75e..ffc0929f72 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q15.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cos_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -43,21 +51,21 @@
 
 /**   
 * \par    
-* Table Values are in Q15(1.15 Fixed point format) and generation is done in three steps    
-* \par    
-* First Generate cos values in floating point:    
-* tableSize = 256;     
-* 
for(n = -1; n < (tableSize + 1); n++)    
-* {    
-*	cosTable[n+1]= cos(2*pi*n/tableSize);    
-* }
   
-* where pi value is  3.14159265358979    
-* \par    
-* Secondly Convert Floating point to Q15(Fixed point):    
-*	(cosTable[i] * pow(2, 15))    
-* \par    
-* Finally Rounding to nearest integer is done    
-* 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
+ * Table values are in Q15 (1.15 fixed-point format) and generation is done in 
+ * three steps.  First,  generate cos values in floating point:    
+ * 
+ * tableSize = 256;
+ * for(n = -1; n < (tableSize + 1); n++)    
+ * {    
+ *	cosTable[n+1]= cos(2*pi*n/tableSize);    
+ * } 
     
+ * where pi value is  3.14159265358979    
+ * \par    
+ * Second, convert floating-point to Q15 (fixed-point):    
+ *	(cosTable[i] * pow(2, 15))    
+ * \par    
+ * Finally, round to the nearest integer value:
+ * 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
 */
 
 static const q15_t cosTableQ15[259] = {
@@ -102,7 +110,8 @@ static const q15_t cosTableQ15[259] = {
  * @param[in] x Scaled input value in radians.   
  * @return  cos(x).   
  *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
+ * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
+ * value in the range [0 2*pi).
  */
 
 q15_t arm_cos_q15(
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q31.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q31.c
index 10ecedb41a..9ae4b5f80d 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q31.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_cos_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_cos_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -43,19 +51,20 @@
 
 /**    
  * \par    
- * Table Values are in Q31(1.31 Fixed point format) and generation is done in three steps    
- * First Generate cos values in floating point:    
+ * Table values are in Q31 (1.31 fixed-point format) and generation is done in 
+ * three steps.  First,  generate cos values in floating point:    
+ * 
  * tableSize = 256;      
- * 
for(n = -1; n < (tableSize + 1); n++)    
+ * for(n = -1; n < (tableSize + 1); n++)    
  * {    
  *	cosTable[n+1]= cos(2*pi*n/tableSize);    
  * } 
     
  * where pi value is  3.14159265358979    
  * \par    
- * Secondly Convert Floating point to Q31(Fixed point):    
+ * Second, convert floating-point to Q31 (Fixed point):
  *	(cosTable[i] * pow(2, 31))    
  * \par    
- * Finally Rounding to nearest integer is done    
+ * Finally, round to the nearest integer value:
  * 	cosTable[i] += (cosTable[i] > 0 ? 0.5 :-0.5);    
  */
 
@@ -133,7 +142,8 @@ static const q31_t cosTableQ31[259] = {
  * @param[in] x Scaled input value in radians.   
  * @return  cos(x).   
  *   
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
+ * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
+ * value in the range [0 2*pi).
  */
 
 q31_t arm_cos_q31(
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_f32.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_f32.c
index bbbdd6c6c9..038229f067 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_f32.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_sin_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -44,7 +52,8 @@
  * Q15, Q31, and floating-point data types.   
  * The input to the floating-point version is in radians while the   
  * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi), Where range excludes 2*pi.   
+ * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+ * value of 2*pi wraps around to 0.
  *   
  * The implementation is based on table lookup using 256 values together with cubic interpolation.   
  * The steps used are:   
@@ -78,9 +87,10 @@
 
 /**   
  * \par    
- * Example code for Generation of Floating-point Sin Table:   
+ * Example code for the generation of the floating-point sine table:
+ * 
  * tableSize = 256;    
- * 
for(n = -1; n < (tableSize + 1); n++)    
+ * for(n = -1; n < (tableSize + 1); n++)    
  * {    
  *	sinTable[n+1]=sin(2*pi*n/tableSize);    
  * }
    
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q15.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q15.c
index 5eb35652ca..6bbacc634a 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q15.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_sin_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -42,24 +50,24 @@
  */
 
 
-/**    
- * \par    
- * Example code for Generation of Q15 Sin Table:   
- * \par    
- * 
tableSize = 256;    
+/**   
+* \par    
+ * Table values are in Q15 (1.15 fixed-point format) and generation is done in 
+ * three steps.  First,  generate sin values in floating point:    
+ * 
+ * tableSize = 256;
  * for(n = -1; n < (tableSize + 1); n++)    
  * {    
- *	sinTable[n+1]=sin(2*pi*n/tableSize);    
- * } 
    
+ *	sinTable[n+1]= sin(2*pi*n/tableSize);    
+ * } 
     
  * where pi value is  3.14159265358979    
  * \par    
- * Convert Floating point to Q15(Fixed point):    
+ * Second, convert floating-point to Q15 (fixed-point):    
  *	(sinTable[i] * pow(2, 15))    
  * \par    
- * rounding to nearest integer is done    
+ * Finally, round to the nearest integer value:
  * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
- */
-
+*/
 
 static const q15_t sinTableQ15[259] = {
   0xfcdc, 0x0, 0x324, 0x648, 0x96b, 0xc8c, 0xfab, 0x12c8,
@@ -103,7 +111,7 @@ static const q15_t sinTableQ15[259] = {
  * @param[in] x Scaled input value in radians.   
  * @return  sin(x).   
  *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
+ * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
  */
 
 q15_t arm_sin_q15(
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q31.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q31.c
index cf540e24f0..034a3b42cb 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q31.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sin_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_sin_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -43,19 +51,20 @@
 
 /**   
  * \par    
- * Tables generated are in Q31(1.31 Fixed point format)    
- * Generation of sin values in floating point:    
- * 
tableSize = 256;      
+ * Table values are in Q31 (1.31 fixed-point format) and generation is done in 
+ * three steps.  First,  generate sin values in floating point:    
+ * 
+ * tableSize = 256;      
  * for(n = -1; n < (tableSize + 1); n++)    
  * {    
  *	sinTable[n+1]= sin(2*pi*n/tableSize);    
  * } 
    
  * where pi value is  3.14159265358979    
  * \par    
- * Convert Floating point to Q31(Fixed point):    
+ * Second, convert floating-point to Q31 (Fixed point):
  *	(sinTable[i] * pow(2, 31))    
  * \par    
- * rounding to nearest integer is done    
+ * Finally, round to the nearest integer value:
  * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
  */
 
@@ -129,12 +138,11 @@ static const q31_t sinTableQ31[259] = {
 
 
 /**   
- * @brief Fast approximation to the trigonometric sine function for Q31 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  sin(x).   
- *   
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi), Here range excludes 2*pi.   
- */
+ * @brief Fast approximation to the trigonometric sine function for Q31 data.
+ * @param[in] x Scaled input value in radians.
+ * @return  sin(x).
+ *
+ * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
 
 q31_t arm_sin_q31(
   q31_t x)
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c
index 32eee32522..07b5a90c1d 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------     
-* Copyright (C) 2011 ARM Limited. All rights reserved.  
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.  
 *     
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *     
 * Project:      CMSIS DSP Library  
 * Title:		arm_sqrt_q15.c     
@@ -11,15 +11,31 @@
 *     
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.0 2011/03/08 
-*     Alpha release. 
-* 
-* Version 1.0.1 2011/09/30 
-*     Beta release.  
-*     
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 #include "arm_math.h"
 #include "arm_common_tables.h"
@@ -38,8 +54,9 @@
    * @brief  Q15 square root function.    
    * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.    
    * @param[out]  *pOut  square root of input value.    
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if    
-   * in is negative value and returns zero output for negative values.    
+   * @return The function returns ARM_MATH_SUCCESS if the input value is positive
+   * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
+   * negative inputs, the function returns *pOut = 0.
    */
 
 arm_status arm_sqrt_q15(
@@ -49,6 +66,11 @@ arm_status arm_sqrt_q15(
   q15_t number, temp1, var1, signBits1, half;
   q31_t bits_val1;
   float32_t temp_float1;
+  union
+  {
+    q31_t fracval;
+    float32_t floatval;
+  } tempconv;
 
   number = in;
 
@@ -75,11 +97,13 @@ arm_status arm_sqrt_q15(
     /*Convert to float */
     temp_float1 = number * 3.051757812500000e-005f;
     /*Store as integer */
-    bits_val1 = *(int *) &temp_float1;
+    tempconv.floatval = temp_float1;
+    bits_val1 = tempconv.fracval;
     /* Subtract the shifted value from the magic number to give intial guess */
     bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
     /* Store as float */
-    temp_float1 = *(float *) &bits_val1;
+    tempconv.fracval = bits_val1;
+    temp_float1 = tempconv.floatval;
     /* Convert to integer format */
     var1 = (q31_t) (temp_float1 * 16384);
 
diff --git a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c
index 65de4b3d16..7217834a86 100644
--- a/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c
+++ b/libraries/dsp/cmsis_dsp/FastMathFunctions/arm_sqrt_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------     
-* Copyright (C) 2011 ARM Limited. All rights reserved.  
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.  
 *     
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *     
 * Project:      CMSIS DSP Library  
 * Title:		arm_sqrt_q31.c     
@@ -11,15 +11,31 @@
 *     
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.0 2011/03/08 
-*     Alpha release. 
-* 
-* Version 1.0.1 2011/09/30 
-*     Beta release.  
-*     
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 #include "arm_math.h"
 #include "arm_common_tables.h"
@@ -37,8 +53,9 @@
  * @brief Q31 square root function.    
  * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.    
  * @param[out]  *pOut square root of input value.    
- * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if    
- * in is negative value and returns zero output for negative values.    
+ * @return The function returns ARM_MATH_SUCCESS if the input value is positive
+ * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
+ * negative inputs, the function returns *pOut = 0.
  */
 
 arm_status arm_sqrt_q31(
@@ -47,6 +64,11 @@ arm_status arm_sqrt_q31(
 {
   q31_t number, temp1, bits_val1, var1, signBits1, half;
   float32_t temp_float1;
+  union
+  {
+      q31_t fracval;
+      float32_t floatval;
+  } tempconv;
 
   number = in;
 
@@ -73,11 +95,13 @@ arm_status arm_sqrt_q31(
     /*Convert to float */
     temp_float1 = number * 4.6566128731e-010f;
     /*Store as integer */
-    bits_val1 = *(int *) &temp_float1;
+    tempconv.floatval = temp_float1;
+    bits_val1 = tempconv.fracval;
     /* Subtract the shifted value from the magic number to give intial guess */
     bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
     /* Store as float */
-    temp_float1 = *(float *) &bits_val1;
+    tempconv.fracval = bits_val1;
+    temp_float1 = tempconv.floatval;
     /* Convert to integer format */
     var1 = (q31_t) (temp_float1 * 1073741824);
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
index 4ca7111b39..dccba7b52d 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_32x64_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
index 607f7f5074..f6a4f83ec2 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_32x64_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -100,6 +105,9 @@
  * There is also an associated initialization function which performs the following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero. 
+ *
  * \par    
  * Use of the initialization function is optional.    
  * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
@@ -198,7 +206,7 @@ void arm_biquad_cas_df1_32x64_q31(
   uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -545,7 +553,7 @@ void arm_biquad_cas_df1_32x64_q31(
 
   } while(--stage);
 
-#endif /*    #ifndef ARM_MATH_CM0     */
+#endif /*    #ifndef ARM_MATH_CM0_FAMILY     */
 }
 
   /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c
index 4ea80e1615..f3002bb3e2 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_f32.c    
@@ -12,29 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -104,6 +106,8 @@
  * The initialization function performs following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -188,7 +192,7 @@ void arm_biquad_cascade_df1_f32(
   uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -411,7 +415,7 @@ void arm_biquad_cascade_df1_f32(
 
   } while(stage > 0u);
 
-#endif /*   #ifndef ARM_MATH_CM0         */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY         */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
index 3d9b5f64aa..65b0e41a8a 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_fast_q15.c    
@@ -12,28 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/16     
-*    Initial version    
-*    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
index 62f02502c1..196047c390 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_fast_q31.c    
@@ -12,27 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/27     
-*    Initial version    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -76,7 +80,7 @@ void arm_biquad_cascade_df1_fast_q31(
   q31_t * pDst,
   uint32_t blockSize)
 {
-  q31_t acc;                                     /*  accumulator                   */
+  q31_t acc = 0;                                 /*  accumulator                   */
   q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
   q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
   q31_t *pIn = pSrc;                             /*  input pointer initialization  */
@@ -120,15 +124,20 @@ void arm_biquad_cascade_df1_fast_q31(
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);
+      //acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);
+      mult_32x32_keep32_R(acc, b1, Xn1);
       /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);   
+      multAcc_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
       /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
 
       /* The result is converted to 1.31 , Yn2 variable is reused */
       Yn2 = acc << shift;
@@ -141,15 +150,20 @@ void arm_biquad_cascade_df1_fast_q31(
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
+      //acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
+      mult_32x32_keep32_R(acc, b0, Xn2);
       /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
+      multAcc_32x32_keep32_R(acc, b1, Xn);
       /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, b2, Xn1);
       /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
       /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
 
       /* The result is converted to 1.31, Yn1 variable is reused  */
       Yn1 = acc << shift;
@@ -162,15 +176,20 @@ void arm_biquad_cascade_df1_fast_q31(
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
+      //acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
+      mult_32x32_keep32_R(acc, b0, Xn1);
       /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, b1, Xn2);
       /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
+      multAcc_32x32_keep32_R(acc, b2, Xn);
       /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
 
       /* The result is converted to 1.31, Yn2 variable is reused  */
       Yn2 = acc << shift;
@@ -184,15 +203,20 @@ void arm_biquad_cascade_df1_fast_q31(
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
+      //acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
+      mult_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
       /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
       /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
       /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
 
       /* Every time after the output is computed state should be updated. */
       /* The states should be updated as:  */
@@ -217,22 +241,28 @@ void arm_biquad_cascade_df1_fast_q31(
      ** No loop unrolling is used. */
     sample = (blockSize & 0x3u);
 
-    while(sample > 0u)
-    {
+   while(sample > 0u)
+   {
       /* Read the input */
       Xn = *pIn++;
 
       /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
       /* acc =  b0 * x[n] */
-      acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
+      //acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
+      mult_32x32_keep32_R(acc, b0, Xn);
       /* acc +=  b1 * x[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
       /* acc +=  b[2] * x[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
       /* acc +=  a1 * y[n-1] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
       /* acc +=  a2 * y[n-2] */
-      acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
       /* The result is converted to 1.31  */
       acc = acc << shift;
 
@@ -252,7 +282,7 @@ void arm_biquad_cascade_df1_fast_q31(
 
       /* decrement the loop counter */
       sample--;
-    }
+   }
 
     /*  The first stage goes from the input buffer to the output buffer. */
     /*  Subsequent stages occur in-place in the output buffer */
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
index b5032a55f1..5533f50958 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df1_init_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
index fa102f681b..b74734d357 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df1_init_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
index 74eea26474..89b2477fc5 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_init_q31.c    
@@ -12,29 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c
index 3109c08602..f891a412a1 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_q15.c    
@@ -12,29 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -78,7 +80,7 @@ void arm_biquad_cascade_df1_q15(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -327,6 +329,7 @@ void arm_biquad_cascade_df1_q15(
   {
     /* Reading the coefficients */
     b0 = *pCoeffs++;
+    pCoeffs++;  // skip the 0 coefficient
     b1 = *pCoeffs++;
     b2 = *pCoeffs++;
     a1 = *pCoeffs++;
@@ -398,7 +401,7 @@ void arm_biquad_cascade_df1_q15(
 
   } while(--stage);
 
-#endif /*     #ifndef ARM_MATH_CM0 */
+#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c
index 53a7a1047a..174398b9d2 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df1_q31.c    
@@ -12,29 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -88,7 +90,7 @@ void arm_biquad_cascade_df1_q31(
   uint32_t sample, stage = S->numStages;         /*  loop counters                     */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q31_t acc_l, acc_h;                            /*  temporary output variables    */
 
@@ -392,7 +394,7 @@ void arm_biquad_cascade_df1_q31(
 
   } while(--stage);
 
-#endif /*  #ifndef ARM_MATH_CM0 */
+#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
 }
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
index 0b81422fff..1462d51e7b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
@@ -1,8 +1,7 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_biquad_cascade_df2T_f32.c    
@@ -12,366 +11,349 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
 /**       
- * @ingroup groupFilters       
- */
+* @ingroup groupFilters       
+*/
 
 /**       
- * @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
- *       
- * This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
- * The filters are implemented as a cascade of second order Biquad sections.       
- * These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
- * Only floating-point data is supported.       
- *       
- * This function operate on blocks of input and output data and each call to the function       
- * processes blockSize samples through the filter.       
- * pSrc points to the array of input data and       
- * pDst points to the array of output data.       
- * Both arrays contain blockSize values.       
- *       
- * \par Algorithm       
- * Each Biquad stage implements a second order filter using the difference equation:       
- * 
       
- *    y[n] = b0 * x[n] + d1       
- *    d1 = b1 * x[n] + a1 * y[n] + d2       
- *    d2 = b2 * x[n] + a2 * y[n]       
- * 
       
- * where d1 and d2 represent the two state values.       
- *       
- * \par       
- * A Biquad filter using a transposed Direct Form II structure is shown below.       
- * \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
- * Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
- * Pay careful attention to the sign of the feedback coefficients.       
- * Some design tools flip the sign of the feedback coefficients:       
- * 
       
- *    y[n] = b0 * x[n] + d1;       
- *    d1 = b1 * x[n] - a1 * y[n] + d2;       
- *    d2 = b2 * x[n] - a2 * y[n];       
- * 
       
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
- *       
- * \par       
- * Higher order filters are realized as a cascade of second order sections.       
- * numStages refers to the number of second order stages used.       
- * For example, an 8th order filter would be realized with numStages=4 second order stages.       
- * A 9th order filter would be realized with numStages=5 second order stages with the       
- * coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
- *       
- * \par       
- * pState points to the state variable array.       
- * Each Biquad stage has 2 state variables d1 and d2.       
- * The state variables are arranged in the pState array as:       
- * 
       
- *     {d11, d12, d21, d22, ...}       
- * 
       
- * where d1x refers to the state variables for the first Biquad and       
- * d2x refers to the state variables for the second Biquad.       
- * The state array has a total length of 2*numStages values.       
- * The state variables are updated after each block of data is processed; the coefficients are untouched.       
- *       
- * \par       
- * The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
- * The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
- * That is why the Direct Form I structure supports Q15 and Q31 data types.    
- * The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
- * Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
- * The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
- *       
- * \par Instance Structure       
- * The coefficients and state variables for a filter are stored together in an instance data structure.       
- * A separate instance structure must be defined for each filter.       
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
- *       
- * \par Init Functions       
- * There is also an associated initialization function.      
- * The initialization function performs following operations:       
- * - Sets the values of the internal structure fields.       
- * - Zeros out the values in the state buffer.       
- *       
- * \par       
- * Use of the initialization function is optional.       
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
- * To place an instance structure into a const data section, the instance structure must be manually initialized.       
- * Set the values in the state buffer to zeros before static initialization.       
- * For example, to statically initialize the instance structure use       
- * 
       
- *     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
- * 
       
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
- * pCoeffs is the address of the coefficient buffer;        
- *       
- */
+* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
+*       
+* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
+* The filters are implemented as a cascade of second order Biquad sections.       
+* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
+* Only floating-point data is supported.       
+*       
+* This function operate on blocks of input and output data and each call to the function       
+* processes blockSize samples through the filter.       
+* pSrc points to the array of input data and       
+* pDst points to the array of output data.       
+* Both arrays contain blockSize values.       
+*       
+* \par Algorithm       
+* Each Biquad stage implements a second order filter using the difference equation:       
+* 
       
+*    y[n] = b0 * x[n] + d1       
+*    d1 = b1 * x[n] + a1 * y[n] + d2       
+*    d2 = b2 * x[n] + a2 * y[n]       
+* 
       
+* where d1 and d2 represent the two state values.       
+*       
+* \par       
+* A Biquad filter using a transposed Direct Form II structure is shown below.       
+* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
+* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
+* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
+* Pay careful attention to the sign of the feedback coefficients.       
+* Some design tools flip the sign of the feedback coefficients:       
+* 
       
+*    y[n] = b0 * x[n] + d1;       
+*    d1 = b1 * x[n] - a1 * y[n] + d2;       
+*    d2 = b2 * x[n] - a2 * y[n];       
+* 
       
+* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
+*       
+* \par       
+* Higher order filters are realized as a cascade of second order sections.       
+* numStages refers to the number of second order stages used.       
+* For example, an 8th order filter would be realized with numStages=4 second order stages.       
+* A 9th order filter would be realized with numStages=5 second order stages with the       
+* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
+*       
+* \par       
+* pState points to the state variable array.       
+* Each Biquad stage has 2 state variables d1 and d2.       
+* The state variables are arranged in the pState array as:       
+* 
       
+*     {d11, d12, d21, d22, ...}       
+* 
       
+* where d1x refers to the state variables for the first Biquad and       
+* d2x refers to the state variables for the second Biquad.       
+* The state array has a total length of 2*numStages values.       
+* The state variables are updated after each block of data is processed; the coefficients are untouched.       
+*       
+* \par       
+* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
+* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
+* That is why the Direct Form I structure supports Q15 and Q31 data types.    
+* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
+* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
+* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
+*       
+* \par Instance Structure       
+* The coefficients and state variables for a filter are stored together in an instance data structure.       
+* A separate instance structure must be defined for each filter.       
+* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
+*       
+* \par Init Functions       
+* There is also an associated initialization function.      
+* The initialization function performs following operations:       
+* - Sets the values of the internal structure fields.       
+* - Zeros out the values in the state buffer.       
+* To do this manually without calling the init function, assign the follow subfields of the instance structure:
+* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
+*       
+* \par       
+* Use of the initialization function is optional.       
+* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
+* To place an instance structure into a const data section, the instance structure must be manually initialized.       
+* Set the values in the state buffer to zeros before static initialization.       
+* For example, to statically initialize the instance structure use       
+* 
       
+*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
+* 
       
+* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
+* pCoeffs is the address of the coefficient buffer;        
+*       
+*/
 
 /**       
- * @addtogroup BiquadCascadeDF2T       
- * @{       
- */
+* @addtogroup BiquadCascadeDF2T       
+* @{       
+*/
 
 /**      
- * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
- * @param[in]  *S        points to an instance of the filter data structure.      
- * @param[in]  *pSrc     points to the block of input data.      
- * @param[out] *pDst     points to the block of output data      
- * @param[in]  blockSize number of samples to process.      
- * @return none.      
- */
+* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
+* @param[in]  *S        points to an instance of the filter data structure.      
+* @param[in]  *pSrc     points to the block of input data.      
+* @param[out] *pDst     points to the block of output data      
+* @param[in]  blockSize number of samples to process.      
+* @return none.      
+*/
 
+
+LOW_OPTIMIZATION_ENTER
 void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+const arm_biquad_cascade_df2T_instance_f32 * S,
+float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
 {
 
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  State pointer             */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc0;                                /*  accumulator               */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn;                                  /*  temporary input           */
-  float32_t d1, d2;                              /*  state variables           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
+   float32_t *pIn = pSrc;                         /*  source pointer            */
+   float32_t *pOut = pDst;                        /*  destination pointer       */
+   float32_t *pState = S->pState;                 /*  State pointer             */
+   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+   float32_t acc1;                                /*  accumulator               */
+   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+   float32_t Xn1;                                 /*  temporary input           */
+   float32_t d1, d2;                              /*  state variables           */
+   uint32_t sample, stage = S->numStages;         /*  loop counters             */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY_FAMILY
 
-  float32_t Xn1, Xn2;                            /*  Input State variables     */
-  float32_t acc1;                                /*  accumulator               */
+   float32_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
+   float32_t acc2, acc3, acc4;              		  /*  accumulator               */
 
 
+   float32_t p0, p1, p2, p3, p4, A1;
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
+   /* Run the below code for Cortex-M4 and Cortex-M3 */
+   do
+   {
+      /* Reading the coefficients */     
+      b0 = *pCoeffs++;
+      b1 = *pCoeffs++;
+      b2 = *pCoeffs++;
+      a1 = *pCoeffs++;
+      a2 = *pCoeffs++;
+      
 
-    /*Reading the state values */
-    d1 = pState[0];
-    d2 = pState[1];
+      /*Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
 
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    sample = blockSize >> 2u;
+      /* Apply loop unrolling and compute 4 output values simultaneously. */
+      sample = blockSize >> 2u;
 
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
+   ** a second loop below computes the remaining 1 to 3 samples. */
+      while(sample > 0u) {
 
-      /* y[n] = b0 * x[n] + d1 */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      /* d2 = b2 * x[n] + a2 * y[n] */
+         /* y[n] = b0 * x[n] + d1 */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         /* d2 = b2 * x[n] + a2 * y[n] */
 
-      /* Read the first input */
-      Xn1 = *pIn++;
+         /* Read the four inputs */
+         Xn1 = pIn[0];
+         Xn2 = pIn[1];
+         Xn3 = pIn[2];
+         Xn4 = pIn[3];
+         pIn += 4;     
 
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn1) + d1;
+         p0 = b0 * Xn1; 
+         p1 = b1 * Xn1;
+         acc1 = p0 + d1;
+         p0 = b0 * Xn2; 
+         p3 = a1 * acc1;
+         p2 = b2 * Xn1;
+         A1 = p1 + p3;
+         p4 = a2 * acc1;
+         d1 = A1 + d2;
+         d2 = p2 + p4;
 
-      /* d1 = b1 * x[n] + d2 */
-      d1 = (b1 * Xn1) + d2;
+         p1 = b1 * Xn2;
+         acc2 = p0 + d1;
+         p0 = b0 * Xn3;	 
+         p3 = a1 * acc2; 
+         p2 = b2 * Xn2;                                 
+         A1 = p1 + p3;
+         p4 = a2 * acc2;
+         d1 = A1 + d2;
+         d2 = p2 + p4;
 
-      /* d2 = b2 * x[n] */
-      d2 = (b2 * Xn1);
+         p1 = b1 * Xn3;
+         acc3 = p0 + d1;
+         p0 = b0 * Xn4;	
+         p3 = a1 * acc3;
+         p2 = b2 * Xn3;
+         A1 = p1 + p3;
+         p4 = a2 * acc3;
+         d1 = A1 + d2;
+         d2 = p2 + p4;
 
-      /* Read the second input */
-      Xn2 = *pIn++;
+         acc4 = p0 + d1;
+         p1 = b1 * Xn4;
+         p3 = a1 * acc4;
+         p2 = b2 * Xn4;
+         A1 = p1 + p3;
+         p4 = a2 * acc4;
+         d1 = A1 + d2;
+         d2 = p2 + p4;
 
-      /* d1 = b1 * x[n] + a1 * y[n] */
-      d1 = (a1 * acc0) + d1;
+         pOut[0] = acc1;	
+         pOut[1] = acc2;	
+         pOut[2] = acc3;	
+         pOut[3] = acc4;
+				 pOut += 4;
+				 
+         sample--;	       
+      }
 
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
+      sample = blockSize & 0x3u;
+      while(sample > 0u) {
+         Xn1 = *pIn++;
 
-      d2 = (a2 * acc0) + d2;
+         p0 = b0 * Xn1; 
+         p1 = b1 * Xn1;
+         acc1 = p0 + d1;
+         p3 = a1 * acc1;
+         p2 = b2 * Xn1;
+         A1 = p1 + p3;
+         p4 = a2 * acc1;
+         d1 = A1 + d2;
+         d2 = p2 + p4;
+	
+         *pOut++ = acc1;
+         
+         sample--;	       
+      }
 
-      /* y[n] = b0 * x[n] + d1 */
-      acc1 = (b0 * Xn2) + d1;
+      /* Store the updated state variables back into the state array */
+      *pState++ = d1;
+      *pState++ = d2;
 
-      /* Read the third input */
-      Xn1 = *pIn++;
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
 
-      d1 = (b1 * Xn2) + d2;
-
-      d2 = (b2 * Xn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc1;
-
-      d1 = (a1 * acc1) + d1;
-
-      d2 = (a2 * acc1) + d2;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn1) + d1;
-
-      d1 = (b1 * Xn1) + d2;
-
-      d2 = (b2 * Xn1);
-
-      /* Read the fourth input */
-      Xn2 = *pIn++;
-
-      d1 = (a1 * acc0) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      d2 = (a2 * acc0) + d2;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc1 = (b0 * Xn2) + d1;
-
-      d1 = (b1 * Xn2) + d2;
-
-      d2 = (b2 * Xn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc1;
-
-      d1 = (a1 * acc1) + d1;
-
-      d2 = (a2 * acc1) + d2;
+      /*Reset the output working pointer */
+      pOut = pDst;
 
       /* decrement the loop counter */
-      sample--;
+      stage--;
 
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3u;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn) + d1;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-
-      /* Every time after the output is computed state should be updated. */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
-
-      /* d2 = b2 * x[n] + a2 * y[n] */
-      d2 = (b2 * Xn) + (a2 * acc0);
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* Store the updated state variables back into the state array */
-    *pState++ = d1;
-    *pState++ = d2;
-
-    /* The current stage input is given as the output to the next stage */
-    pIn = pDst;
-
-    /*Reset the output working pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
+   } while(stage > 0u);
 
 #else
 
-  /* Run the below code for Cortex-M0 */
+   /* Run the below code for Cortex-M0 */
 
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
+   do
+   {
+      /* Reading the coefficients */
+      b0 = *pCoeffs++;
+      b1 = *pCoeffs++;
+      b2 = *pCoeffs++;
+      a1 = *pCoeffs++;
+      a2 = *pCoeffs++;
 
-    /*Reading the state values */
-    d1 = pState[0];
-    d2 = pState[1];
+      /*Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
 
 
-    sample = blockSize;
+      sample = blockSize;
 
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
+      while(sample > 0u)
+      {
+         /* Read the input */
+         Xn1 = *pIn++;
 
-      /* y[n] = b0 * x[n] + d1 */
-      acc0 = (b0 * Xn) + d1;
+         /* y[n] = b0 * x[n] + d1 */
+         acc1 = (b0 * Xn1) + d1;
 
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
+         /* Store the result in the accumulator in the destination buffer. */
+         *pOut++ = acc1;
 
-      /* Every time after the output is computed state should be updated. */
-      /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-      d1 = ((b1 * Xn) + (a1 * acc0)) + d2;
+         /* Every time after the output is computed state should be updated. */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
 
-      /* d2 = b2 * x[n] + a2 * y[n] */
-      d2 = (b2 * Xn) + (a2 * acc0);
+         /* d2 = b2 * x[n] + a2 * y[n] */
+         d2 = (b2 * Xn1) + (a2 * acc1);
+
+         /* decrement the loop counter */
+         sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      *pState++ = d1;
+      *pState++ = d2;
+
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
+
+      /*Reset the output working pointer */
+      pOut = pDst;
 
       /* decrement the loop counter */
-      sample--;
-    }
+      stage--;
 
-    /* Store the updated state variables back into the state array */
-    *pState++ = d1;
-    *pState++ = d2;
+   } while(stage > 0u);
 
-    /* The current stage input is given as the output to the next stage */
-    pIn = pDst;
-
-    /*Reset the output working pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#endif /*  #ifndef ARM_MATH_CM0         */
+#endif /*  #ifndef ARM_MATH_CM0_FAMILY         */
 
 }
+LOW_OPTIMIZATION_EXIT
 
-
-  /**       
+/**       
    * @} end of BiquadCascadeDF2T group       
    */
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
index 3f0afd706b..a84d095d7d 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_biquad_cascade_df2T_init_f32.c    
@@ -12,26 +12,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_f32.c
index 9b036c85c9..dd9c95ae73 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_f32.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -129,7 +130,7 @@ void arm_conv_f32(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -637,7 +638,7 @@ void arm_conv_f32(
     pDst[i] = sum;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0        */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c
index a8097419d3..339854e4af 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_fast_opt_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c
index 499e6cfb25..56bce36ca9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_fast_q15.c   
@@ -11,26 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 * 
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c
index 46c694b707..b30d32589b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_fast_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c
index 2d9ada7be2..ff0b949b81 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_opt_q15.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c
index b57e4a24b0..e3dc97ea78 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_opt_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_opt_q7.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c
index b3200f7e8b..0ced299162 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_f32.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -102,7 +103,7 @@ arm_status arm_conv_partial_f32(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -652,7 +653,7 @@ arm_status arm_conv_partial_f32(
   }
   return (status);
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
index 1c04d2217a..3df1d3f213 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_fast_opt_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c
index 5d6eb6f49f..42a96ce3ef 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_partial_fast_q15.c   
@@ -11,26 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c
index 0e4795f478..3b31583f65 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_fast_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c
index 0dd3347a82..412c0eefa4 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_opt_q15.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c
index 6a82603165..8c277c1e66 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_opt_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_opt_q7.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c
index 83d7cc6219..920f8a16f3 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_partial_q15.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 * 
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c
index 89c98be966..fb97eabfcd 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_partial_q31.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -73,7 +74,7 @@ arm_status arm_conv_partial_q31(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -590,7 +591,7 @@ arm_status arm_conv_partial_q31(
   }
   return (status);
 
-#endif /*    #ifndef ARM_MATH_CM0      */
+#endif /*    #ifndef ARM_MATH_CM0_FAMILY      */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c
index b532669947..6eea774ad9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_partial_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_partial_q7.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -75,7 +76,7 @@ arm_status arm_conv_partial_q7(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -724,7 +725,7 @@ arm_status arm_conv_partial_q7(
   }
   return (status);
 
-#endif /*  #ifndef ARM_MATH_CM0 */
+#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q15.c
index ac6425dfe1..d4daec59e9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_q15.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q31.c
index 713ea1bd47..c5ce68e97f 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_conv_q31.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -83,7 +84,7 @@ void arm_conv_q31(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -555,7 +556,7 @@ void arm_conv_q31(
     pDst[i] = (q31_t) (sum >> 31u);
   }
 
-#endif /*     #ifndef ARM_MATH_CM0 */
+#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q7.c
index 9fc7e4044f..ab7b12f309 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_conv_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_conv_q7.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*  
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -81,7 +82,7 @@ void arm_conv_q7(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -680,7 +681,7 @@ void arm_conv_q7(
     pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
   }
 
-#endif /*   #ifndef ARM_MATH_CM0        */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c
index 317950ec49..3171209063 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_f32.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -121,7 +122,7 @@ void arm_correlate_f32(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -729,7 +730,7 @@ void arm_correlate_f32(
       *pDst++ = sum;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c
index 59970e11d4..bd600765ad 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_fast_opt_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c
index ca7fe1f2ab..184492f87c 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_correlate_fast_q15.c   
@@ -11,26 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c
index 5b337ca544..b86f55080e 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_fast_q31.c    
@@ -10,27 +10,32 @@
 * Description:	Fast Q31 Correlation.    
 *    
 * Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+*
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c
index 3a1c8cd4a6..bb236d8183 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_opt_q15.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c
index 48a6d091c3..adaea59d7d 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_opt_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_opt_q7.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-* 
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c
index 1832424890..7f861b35cd 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_correlate_q15.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c
index 8d0a0c3b12..53ba335f33 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_correlate_q31.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.11 2011/10/18  
-*    Bug Fix in conv, correlation, partial convolution.  
-* 
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -82,7 +83,7 @@ void arm_correlate_q31(
   q31_t * pDst)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -655,7 +656,7 @@ void arm_correlate_q31(
       *pDst++ = (q31_t) (sum >> 31u);
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c
index eb2ddff999..f0f7d12ea9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_correlate_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:		arm_correlate_q7.c   
@@ -11,30 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
 *
-* Version 1.0.11 2011/10/18 
-*    Bug Fix in conv, correlation, partial convolution. 
-*
-* Version 1.0.10 2011/7/15 
-*    Big Endian support added and Merged M0 and M3/M4 Source code.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated   
-*   
-* Version 0.0.7  2010/06/10    
-*    Misra-C changes done   
-*   
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -81,7 +82,7 @@ void arm_correlate_q7(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -780,7 +781,7 @@ void arm_correlate_q7(
       *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c
index 60cd2ad3b3..2c3d82a66b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_decimate_f32.c    
@@ -11,27 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -96,6 +100,8 @@
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
  * - Checks to make sure that the size of the input is a multiple of the decimation factor.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -147,7 +153,7 @@ void arm_fir_decimate_f32(
   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   uint32_t blkCntN4;
   float32_t *px0, *px1, *px2, *px3;
@@ -509,7 +515,7 @@ void arm_fir_decimate_f32(
     i--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0        */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c
index b3d55464b7..261be56ecf 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_decimate_fast_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c
index d2f0e5fd07..623f080a5a 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_decimate_fast_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c
index 55c1e991a8..1bc8ce0d5f 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c
index a6ccab926d..3127360c68 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c
index 046ac1aa31..20eebc7c9b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_decimate_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c
index 3fead69284..cb86bac066 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_decimate_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -65,7 +70,7 @@
  * Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
 #ifndef UNALIGNED_SUPPORT_DISABLE
 
@@ -683,7 +688,7 @@ void arm_fir_decimate_q15(
 
 
 }
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c
index 72bf76c3a2..8c75e7f63c 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_decimate_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_decimate_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -81,7 +86,7 @@ void arm_fir_decimate_q31(
   uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -297,7 +302,7 @@ void arm_fir_decimate_q31(
     i--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_f32.c
index a407131e8a..f921acb317 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------  
-* Copyright (C) 2010 ARM Limited. All rights reserved.  
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.  
 *  
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *  
 * Project: 	    CMSIS DSP Library  
 * Title:	    arm_fir_f32.c  
@@ -11,544 +11,641 @@
 *  
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.2 2010/11/11  
-*    Documentation updated.   
-*  
-* Version 1.0.1 2010/10/05   
-*    Production release and review comments incorporated.  
-*  
-* Version 1.0.0 2010/09/20   
-*    Production release and review comments incorporated.  
-*  
-* Version 0.0.5  2010/04/26   
-* 	 incorporated review comments and updated with latest CMSIS layer  
-*  
-* Version 0.0.3  2010/03/10   
-*    Initial version  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
 /**  
- * @ingroup groupFilters  
- */
+* @ingroup groupFilters  
+*/
 
 /**  
- * @defgroup FIR Finite Impulse Response (FIR) Filters  
- *  
- * This set of functions implements Finite Impulse Response (FIR) filters  
- * for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.  
- * The functions operate on blocks of input and output data and each call to the function processes  
- * blockSize samples through the filter.  pSrc and  
- * pDst points to input and output arrays containing blockSize values.  
- *  
- * \par Algorithm:  
- * The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.  
- * Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].  
- * 
  
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
- * 
  
- * \par  
- * \image html FIR.gif "Finite Impulse Response filter"  
- * \par  
- * pCoeffs points to a coefficient array of size numTaps.  
- * Coefficients are stored in time reversed order.  
- * \par  
- * 
  
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
- * 
  
- * \par  
- * pState points to a state array of size numTaps + blockSize - 1.  
- * Samples in the state buffer are stored in the following order.  
- * \par  
- * 
  
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
- * 
  
- * \par  
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.  
- * The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,  
- * to be avoided and yields a significant speed improvement.  
- * The state variables are updated after each block of data is processed; the coefficients are untouched.  
- * \par Instance Structure  
- * The coefficients and state variables for a filter are stored together in an instance data structure.  
- * A separate instance structure must be defined for each filter.  
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.  
- * There are separate instance structure declarations for each of the 4 supported data types.  
- *  
- * \par Initialization Functions  
- * There is also an associated initialization function for each data type.  
- * The initialization function performs the following operations:  
- * - Sets the values of the internal structure fields.  
- * - Zeros out the values in the state buffer.  
- *  
- * \par  
- * Use of the initialization function is optional.  
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.  
- * To place an instance structure into a const data section, the instance structure must be manually initialized.  
- * Set the values in the state buffer to zeros before static initialization.  
- * The code below statically initializes each of the 4 different data type filter instance structures  
- * 
  
- *arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
- *arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
- * 
  
- *  
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;  
- * pCoeffs is the address of the coefficient buffer.  
- *  
- * \par Fixed-Point Behavior  
- * Care must be taken when using the fixed-point versions of the FIR filter functions.  
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.  
- * Refer to the function specific documentation below for usage guidelines.  
- */
+* @defgroup FIR Finite Impulse Response (FIR) Filters  
+*  
+* This set of functions implements Finite Impulse Response (FIR) filters  
+* for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.  
+* The functions operate on blocks of input and output data and each call to the function processes  
+* blockSize samples through the filter.  pSrc and  
+* pDst points to input and output arrays containing blockSize values.  
+*  
+* \par Algorithm:  
+* The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.  
+* Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].  
+* 
  
+*    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
+* 
  
+* \par  
+* \image html FIR.gif "Finite Impulse Response filter"  
+* \par  
+* pCoeffs points to a coefficient array of size numTaps.  
+* Coefficients are stored in time reversed order.  
+* \par  
+* 
  
+*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
+* 
  
+* \par  
+* pState points to a state array of size numTaps + blockSize - 1.  
+* Samples in the state buffer are stored in the following order.  
+* \par  
+* 
  
+*    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
+* 
  
+* \par  
+* Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.  
+* The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,  
+* to be avoided and yields a significant speed improvement.  
+* The state variables are updated after each block of data is processed; the coefficients are untouched.  
+* \par Instance Structure  
+* The coefficients and state variables for a filter are stored together in an instance data structure.  
+* A separate instance structure must be defined for each filter.  
+* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.  
+* There are separate instance structure declarations for each of the 4 supported data types.  
+*  
+* \par Initialization Functions  
+* There is also an associated initialization function for each data type.  
+* The initialization function performs the following operations:  
+* - Sets the values of the internal structure fields.  
+* - Zeros out the values in the state buffer.  
+* To do this manually without calling the init function, assign the follow subfields of the instance structure:
+* numTaps, pCoeffs, pState. Also set all of the values in pState to zero. 
+*  
+* \par  
+* Use of the initialization function is optional.  
+* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.  
+* To place an instance structure into a const data section, the instance structure must be manually initialized.  
+* Set the values in the state buffer to zeros before static initialization.  
+* The code below statically initializes each of the 4 different data type filter instance structures  
+* 
  
+*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
+*arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
+* 
  
+*  
+* where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;  
+* pCoeffs is the address of the coefficient buffer.  
+*  
+* \par Fixed-Point Behavior  
+* Care must be taken when using the fixed-point versions of the FIR filter functions.  
+* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.  
+* Refer to the function specific documentation below for usage guidelines.  
+*/
 
 /**  
- * @addtogroup FIR  
- * @{  
- */
+* @addtogroup FIR  
+* @{  
+*/
 
 /**  
- *  
- * @param[in]  *S points to an instance of the floating-point FIR filter structure.  
- * @param[in]  *pSrc points to the block of input data.  
- * @param[out] *pDst points to the block of output data.  
- * @param[in]  blockSize number of samples to process per call.  
- * @return     none.  
- *  
- */
+*  
+* @param[in]  *S points to an instance of the floating-point FIR filter structure.  
+* @param[in]  *pSrc points to the block of input data.  
+* @param[out] *pDst points to the block of output data.  
+* @param[in]  blockSize number of samples to process per call.  
+* @return     none.  
+*  
+*/
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+/* Run the below code for Cortex-M4 and Cortex-M3 */
 
 void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+const arm_fir_instance_f32 * S,
+float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
 {
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-  float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+   float32_t *pState = S->pState;                 /* State pointer */
+   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
+   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
+   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+   float32_t p0,p1,p2,p3,p4,p5,p6,p7;             /* Temporary product values */
 
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
+   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+   /* pStateCurnt points to the location where the new input data should be written */
+   pStateCurnt = &(S->pState[(numTaps - 1u)]);
 
-  /* Apply loop unrolling and compute 4 output values simultaneously.  
-   * The variables acc0 ... acc3 hold output values that are being computed:  
-   *  
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-   */
-  blkCnt = blockSize >> 3;
+   /* Apply loop unrolling and compute 8 output values simultaneously.  
+    * The variables acc0 ... acc7 hold output values that are being computed:  
+    *  
+    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
+    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
+    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
+    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
+    */
+   blkCnt = blockSize >> 3;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
+   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.  
+   ** a second loop below computes the remaining 1 to 7 samples. */
+   while(blkCnt > 0u)
+   {
+      /* Copy four new input samples into the state buffer */
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
 
-    /* Set all accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-    acc4 = 0.0f;
-    acc5 = 0.0f;
-    acc6 = 0.0f;
-    acc7 = 0.0f;
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+      acc4 = 0.0f;
+      acc5 = 0.0f;
+      acc6 = 0.0f;
+      acc7 = 0.0f;		
 
-    /* Initialize state pointer */
-    px = pState;
+      /* Initialize state pointer */
+      px = pState;
 
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
+      /* Initialize coeff pointer */
+      pb = (pCoeffs);		
+   
+      /* This is separated from the others to avoid 
+       * a call to __aeabi_memmove which would be slower
+       */
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
+      *pStateCurnt++ = *pSrc++;
 
-    /* Read the first three samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *px++;
-    x1 = *px++;
-    x2 = *px++;
-    x3 = *px++;
-    x4 = *px++;
-    x5 = *px++;
-    x6 = *px++;
+      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+      x3 = *px++;
+      x4 = *px++;
+      x5 = *px++;
+      x6 = *px++;
 
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 3u;
+      /* Loop unrolling.  Process 8 taps at a time. */
+      tapCnt = numTaps >> 3u;
+      
+      /* Loop over the number of taps.  Unroll by a factor of 8.  
+       ** Repeat until we've computed numTaps-8 coefficients. */
+      while(tapCnt > 0u)
+      {
+         /* Read the b[numTaps-1] coefficient */
+         c0 = *(pb++);
 
-    /* Loop over the number of taps.  Unroll by a factor of 4.  
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
+         /* Read x[n-numTaps-3] sample */
+         x7 = *(px++);
 
-      /* Read x[n-numTaps-3] sample */
-      x7 = *(px++);
+         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
+         p0 = x0 * c0;
 
-      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-      acc0 += x0 * c0;
+         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
+         p1 = x1 * c0;
 
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-      acc1 += x1 * c0;
+         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
+         p2 = x2 * c0;
 
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-      acc2 += x2 * c0;
+         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
+         p3 = x3 * c0;
 
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-      acc3 += x3 * c0;
+         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
+         p4 = x4 * c0;
 
-      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-      acc4 += x4 * c0;
+         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
+         p5 = x5 * c0;
 
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-      acc5 += x5 * c0;
+         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
+         p6 = x6 * c0;
 
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-      acc6 += x6 * c0;
+         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
+         p7 = x7 * c0;
+         
+         /* Read the b[numTaps-2] coefficient */
+         c0 = *(pb++);
 
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-      acc7 += x7 * c0;
+         /* Read x[n-numTaps-4] sample */
+         x0 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
 
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
 
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
+         /* Perform the multiply-accumulate */
+         p0 = x1 * c0;
+         p1 = x2 * c0;   
+         p2 = x3 * c0;   
+         p3 = x4 * c0;   
+         p4 = x5 * c0;   
+         p5 = x6 * c0;   
+         p6 = x7 * c0;   
+         p7 = x0 * c0;   
+         
+         /* Read the b[numTaps-3] coefficient */
+         c0 = *(pb++);
 
-      /* Perform the multiply-accumulate */
-      acc0 += x1 * c0;
-      acc1 += x2 * c0;
-      acc2 += x3 * c0;
-      acc3 += x4 * c0;
-      acc4 += x5 * c0;
-      acc5 += x6 * c0;
-      acc6 += x7 * c0;
-      acc7 += x0 * c0;
+         /* Read x[n-numTaps-5] sample */
+         x1 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
 
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
+         /* Perform the multiply-accumulates */      
+         p0 = x2 * c0;
+         p1 = x3 * c0;   
+         p2 = x4 * c0;   
+         p3 = x5 * c0;   
+         p4 = x6 * c0;   
+         p5 = x7 * c0;   
+         p6 = x0 * c0;   
+         p7 = x1 * c0;   
 
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px++);
+         /* Read the b[numTaps-4] coefficient */
+         c0 = *(pb++);
+
+         /* Read x[n-numTaps-6] sample */
+         x2 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Perform the multiply-accumulates */      
+         p0 = x3 * c0;
+         p1 = x4 * c0;   
+         p2 = x5 * c0;   
+         p3 = x6 * c0;   
+         p4 = x7 * c0;   
+         p5 = x0 * c0;   
+         p6 = x1 * c0;   
+         p7 = x2 * c0;   
+
+         /* Read the b[numTaps-4] coefficient */
+         c0 = *(pb++);
+
+         /* Read x[n-numTaps-6] sample */
+         x3 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Perform the multiply-accumulates */      
+         p0 = x4 * c0;
+         p1 = x5 * c0;   
+         p2 = x6 * c0;   
+         p3 = x7 * c0;   
+         p4 = x0 * c0;   
+         p5 = x1 * c0;   
+         p6 = x2 * c0;   
+         p7 = x3 * c0;   
+
+         /* Read the b[numTaps-4] coefficient */
+         c0 = *(pb++);
+
+         /* Read x[n-numTaps-6] sample */
+         x4 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Perform the multiply-accumulates */      
+         p0 = x5 * c0;
+         p1 = x6 * c0;   
+         p2 = x7 * c0;   
+         p3 = x0 * c0;   
+         p4 = x1 * c0;   
+         p5 = x2 * c0;   
+         p6 = x3 * c0;   
+         p7 = x4 * c0;   
+
+         /* Read the b[numTaps-4] coefficient */
+         c0 = *(pb++);
+
+         /* Read x[n-numTaps-6] sample */
+         x5 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Perform the multiply-accumulates */      
+         p0 = x6 * c0;
+         p1 = x7 * c0;   
+         p2 = x0 * c0;   
+         p3 = x1 * c0;   
+         p4 = x2 * c0;   
+         p5 = x3 * c0;   
+         p6 = x4 * c0;   
+         p7 = x5 * c0;   
+
+         /* Read the b[numTaps-4] coefficient */
+         c0 = *(pb++);
+
+         /* Read x[n-numTaps-6] sample */
+         x6 = *(px++);
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Perform the multiply-accumulates */      
+         p0 = x7 * c0;
+         p1 = x0 * c0;   
+         p2 = x1 * c0;   
+         p3 = x2 * c0;   
+         p4 = x3 * c0;   
+         p5 = x4 * c0;   
+         p6 = x5 * c0;   
+         p7 = x6 * c0;   
+
+         tapCnt--;
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+      }
+
+      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
+      tapCnt = numTaps % 0x8u;
+
+      while(tapCnt > 0u)
+      {
+         /* Read coefficients */
+         c0 = *(pb++);
+
+         /* Fetch 1 state variable */
+         x7 = *(px++);
+
+         /* Perform the multiply-accumulates */      
+         p0 = x0 * c0;
+         p1 = x1 * c0;   
+         p2 = x2 * c0;   
+         p3 = x3 * c0;   
+         p4 = x4 * c0;   
+         p5 = x5 * c0;   
+         p6 = x6 * c0;   
+         p7 = x7 * c0;   
+
+         /* Reuse the present sample states for next sample */
+         x0 = x1;
+         x1 = x2;
+         x2 = x3;
+         x3 = x4;
+         x4 = x5;
+         x5 = x6;
+         x6 = x7;
+         
+         acc0 += p0;
+         acc1 += p1;
+         acc2 += p2;
+         acc3 += p3;
+         acc4 += p4;
+         acc5 += p5;
+         acc6 += p6;
+         acc7 += p7;
+
+         /* Decrement the loop counter */
+         tapCnt--;
+      }
+
+      /* Advance the state pointer by 8 to process the next group of 8 samples */
+      pState = pState + 8;
+
+      /* The results in the 8 accumulators, store in the destination buffer. */
+      *pDst++ = acc0;
+      *pDst++ = acc1;
+      *pDst++ = acc2;
+      *pDst++ = acc3;
+      *pDst++ = acc4;
+      *pDst++ = acc5;
+      *pDst++ = acc6;
+      *pDst++ = acc7;
+
+      blkCnt--;
+   }
+
+   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.  
+   ** No loop unrolling is used. */
+   blkCnt = blockSize % 0x8u;
+
+   while(blkCnt > 0u)
+   {
+      /* Copy one sample at a time into state buffer */
+      *pStateCurnt++ = *pSrc++;
+
+      /* Set the accumulator to zero */
+      acc0 = 0.0f;
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize Coefficient pointer */
+      pb = (pCoeffs);
+
+      i = numTaps;
 
       /* Perform the multiply-accumulates */
-      acc0 += x2 * c0;
-      acc1 += x3 * c0;
-      acc2 += x4 * c0;
-      acc3 += x5 * c0;
-      acc4 += x6 * c0;
-      acc5 += x7 * c0;
-      acc6 += x0 * c0;
-      acc7 += x1 * c0;
+      do
+      {
+         acc0 += *px++ * *pb++;
+         i--;
 
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
+      } while(i > 0u);
 
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px++);
+      /* The result is store in the destination buffer. */
+      *pDst++ = acc0;
 
-      /* Perform the multiply-accumulates */
-      acc0 += x3 * c0;
-      acc1 += x4 * c0;
-      acc2 += x5 * c0;
-      acc3 += x6 * c0;
-      acc4 += x7 * c0;
-      acc5 += x0 * c0;
-      acc6 += x1 * c0;
-      acc7 += x2 * c0;
+      /* Advance state pointer by 1 for the next sample */
+      pState = pState + 1;
 
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
+      blkCnt--;
+   }
 
-      /* Read x[n-numTaps-6] sample */
-      x3 = *(px++);
+   /* Processing is complete.  
+   ** Now copy the last numTaps - 1 samples to the start of the state buffer.  
+   ** This prepares the state buffer for the next function call. */
 
-      /* Perform the multiply-accumulates */
-      acc0 += x4 * c0;
-      acc1 += x5 * c0;
-      acc2 += x6 * c0;
-      acc3 += x7 * c0;
-      acc4 += x0 * c0;
-      acc5 += x1 * c0;
-      acc6 += x2 * c0;
-      acc7 += x3 * c0;
+   /* Points to the start of the state buffer */
+   pStateCurnt = S->pState;
 
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
+   tapCnt = (numTaps - 1u) >> 2u;
 
-      /* Read x[n-numTaps-6] sample */
-      x4 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x5 * c0;
-      acc1 += x6 * c0;
-      acc2 += x7 * c0;
-      acc3 += x0 * c0;
-      acc4 += x1 * c0;
-      acc5 += x2 * c0;
-      acc6 += x3 * c0;
-      acc7 += x4 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x5 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x6 * c0;
-      acc1 += x7 * c0;
-      acc2 += x0 * c0;
-      acc3 += x1 * c0;
-      acc4 += x2 * c0;
-      acc5 += x3 * c0;
-      acc6 += x4 * c0;
-      acc7 += x5 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x6 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x7 * c0;
-      acc1 += x0 * c0;
-      acc2 += x1 * c0;
-      acc3 += x2 * c0;
-      acc4 += x3 * c0;
-      acc5 += x4 * c0;
-      acc6 += x5 * c0;
-      acc7 += x6 * c0;
-
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x8u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x7 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-      acc4 += x4 * c0;
-      acc5 += x5 * c0;
-      acc6 += x6 * c0;
-      acc7 += x7 * c0;
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-      x3 = x4;
-      x4 = x5;
-      x5 = x6;
-      x6 = x7;
+   /* copy data */
+   while(tapCnt > 0u)
+   {
+      *pStateCurnt++ = *pState++;
+      *pStateCurnt++ = *pState++;
+      *pStateCurnt++ = *pState++;
+      *pStateCurnt++ = *pState++;
 
       /* Decrement the loop counter */
       tapCnt--;
-    }
+   }
 
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 8;
+   /* Calculate remaining number of copies */
+   tapCnt = (numTaps - 1u) % 0x4u;
 
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-    *pDst++ = acc4;
-    *pDst++ = acc5;
-    *pDst++ = acc6;
-    *pDst++ = acc7;
+   /* Copy the remaining q31_t data */
+   while(tapCnt > 0u)
+   {
+      *pStateCurnt++ = *pState++;
 
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x8u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += *px++ * *pb++;
-      i--;
-
-    } while(i > 0u);
-
-    /* The result is store in the destination buffer. */
-    *pDst++ = acc0;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    blkCnt--;
-  }
-
-  /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
+      /* Decrement the loop counter */
+      tapCnt--;
+   }
 }
 
 #else
 
 void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
+const arm_fir_instance_f32 * S,
+float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
 {
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+   float32_t *pState = S->pState;                 /* State pointer */
+   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
 
-  /* Run the below code for Cortex-M0 */
+   /* Run the below code for Cortex-M0 */
 
-  float32_t acc;
+   float32_t acc;
 
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
+   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+   /* pStateCurnt points to the location where the new input data should be written */
+   pStateCurnt = &(S->pState[(numTaps - 1u)]);
 
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
+   /* Initialize blkCnt with blockSize */
+   blkCnt = blockSize;
 
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
+   while(blkCnt > 0u)
+   {
+      /* Copy one sample at a time into state buffer */
+      *pStateCurnt++ = *pSrc++;
 
-    /* Set the accumulator to zero */
-    acc = 0.0f;
+      /* Set the accumulator to zero */
+      acc = 0.0f;
 
-    /* Initialize state pointer */
-    px = pState;
+      /* Initialize state pointer */
+      px = pState;
 
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
+      /* Initialize Coefficient pointer */
+      pb = pCoeffs;
 
-    i = numTaps;
+      i = numTaps;
 
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += *px++ * *pb++;
-      i--;
+      /* Perform the multiply-accumulates */
+      do
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         acc += *px++ * *pb++;
+         i--;
 
-    } while(i > 0u);
+      } while(i > 0u);
 
-    /* The result is store in the destination buffer. */
-    *pDst++ = acc;
+      /* The result is store in the destination buffer. */
+      *pDst++ = acc;
 
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
+      /* Advance state pointer by 1 for the next sample */
+      pState = pState + 1;
 
-    blkCnt--;
-  }
+      blkCnt--;
+   }
 
-  /* Processing is complete.         
+   /* Processing is complete.         
    ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
    ** This prepares the state buffer for the next function call. */
 
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
+   /* Points to the start of the state buffer */
+   pStateCurnt = S->pState;
 
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1u;
+   /* Copy numTaps number of values */
+   tapCnt = numTaps - 1u;
 
-  /* Copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
+   /* Copy data */
+   while(tapCnt > 0u)
+   {
+      *pStateCurnt++ = *pState++;
 
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
+      /* Decrement the loop counter */
+      tapCnt--;
+   }
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 /**  
- * @} end of FIR group  
- */
+* @} end of FIR group  
+*/
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c
index 02634327bc..e701ed2c96 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_fast_q15.c    
@@ -11,27 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/16     
-*    Initial version    
-*    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c
index eeccb6c8a0..1ba7e38c89 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_fast_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.9  2010/08/27     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -66,6 +71,7 @@
  * Use the function arm_fir_init_q31() to initialize the filter structure.    
  */
 
+IAR_ONLY_LOW_OPTIMIZATION_ENTER
 void arm_fir_fast_q31(
   const arm_fir_instance_q31 * S,
   q31_t * pSrc,
@@ -138,16 +144,16 @@ void arm_fir_fast_q31(
       x3 = *(px++);
 
       /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      multAcc_32x32_keep32_R(acc0, x0, c0);
 
       /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      multAcc_32x32_keep32_R(acc1, x1, c0);
 
       /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      multAcc_32x32_keep32_R(acc2, x2, c0);
 
       /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+      multAcc_32x32_keep32_R(acc3, x3, c0);
 
       /* Read the b[numTaps-1] coefficient */
       c0 = *(pb++);
@@ -155,11 +161,11 @@ void arm_fir_fast_q31(
       /* Read x[n-numTaps-4] sample */
       x0 = *(px++);
 
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
+      /* Perform the multiply-accumulates */      
+      multAcc_32x32_keep32_R(acc0, x1, c0);
+      multAcc_32x32_keep32_R(acc1, x2, c0);
+      multAcc_32x32_keep32_R(acc2, x3, c0);
+      multAcc_32x32_keep32_R(acc3, x0, c0);
 
       /* Read the b[numTaps-2] coefficient */
       c0 = *(pb++);
@@ -167,11 +173,11 @@ void arm_fir_fast_q31(
       /* Read x[n-numTaps-5] sample */
       x1 = *(px++);
 
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
+      /* Perform the multiply-accumulates */      
+      multAcc_32x32_keep32_R(acc0, x2, c0);
+      multAcc_32x32_keep32_R(acc1, x3, c0);
+      multAcc_32x32_keep32_R(acc2, x0, c0);
+      multAcc_32x32_keep32_R(acc3, x1, c0);
 
       /* Read the b[numTaps-3] coefficients */
       c0 = *(pb++);
@@ -179,11 +185,11 @@ void arm_fir_fast_q31(
       /* Read x[n-numTaps-6] sample */
       x2 = *(px++);
 
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
+      /* Perform the multiply-accumulates */      
+      multAcc_32x32_keep32_R(acc0, x3, c0);
+      multAcc_32x32_keep32_R(acc1, x0, c0);
+      multAcc_32x32_keep32_R(acc2, x1, c0);
+      multAcc_32x32_keep32_R(acc3, x2, c0);
       i--;
     }
 
@@ -198,11 +204,11 @@ void arm_fir_fast_q31(
       /* Fetch 1 state variable */
       x3 = *(px++);
 
-      /* Perform the multiply-accumulates */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+      /* Perform the multiply-accumulates */      
+      multAcc_32x32_keep32_R(acc0, x0, c0);
+      multAcc_32x32_keep32_R(acc1, x1, c0);
+      multAcc_32x32_keep32_R(acc2, x2, c0);
+      multAcc_32x32_keep32_R(acc3, x3, c0);
 
       /* Reuse the present sample states for next sample */
       x0 = x1;
@@ -251,9 +257,7 @@ void arm_fir_fast_q31(
     /* Perform the multiply-accumulates */
     do
     {
-      acc0 =
-        (q31_t) ((((q63_t) acc0 << 32) +
-                  ((q63_t) (*px++) * (*(pb++)))) >> 32);
+      multAcc_32x32_keep32_R(acc0, (*px++), (*(pb++)));
       i--;
     } while(i > 0u);
 
@@ -269,28 +273,14 @@ void arm_fir_fast_q31(
   }
 
   /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
+   ** Now copy the last numTaps - 1 samples to the start of the state buffer.    
    ** This prepares the state buffer for the next function call. */
 
   /* Points to the start of the state buffer */
   pStateCurnt = S->pState;
 
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
   /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
+  tapCnt = (numTaps - 1u);
 
   /* Copy the remaining q31_t data */
   while(tapCnt > 0u)
@@ -303,7 +293,7 @@ void arm_fir_fast_q31(
 
 
 }
-
+IAR_ONLY_LOW_OPTIMIZATION_EXIT
 /**    
  * @} end of FIR group    
  */
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c
index 4665ad135d..429c958eb4 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c
index cb113916ff..279757fca0 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -95,7 +97,7 @@ arm_status arm_fir_init_q15(
   arm_status status;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -143,7 +145,7 @@ arm_status arm_fir_init_q15(
 
   return (status);
 
-#endif /*  #ifndef ARM_MATH_CM0 */
+#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c
index 121db2a886..2dfc876929 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_init_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c
index 1ea905cb6a..107bfb37f2 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_init_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_init_q7.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c
index 24e072cdec..9f0cd46f36 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_interpolate_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -98,6 +103,8 @@
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
  * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -134,7 +141,7 @@
  * @param[in] blockSize number of input samples to process per call.    
  * @return none.    
  */
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -565,7 +572,7 @@ void arm_fir_interpolate_f32(
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c
index 097c883b6c..ffcb7e8cf4 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c
index d147d10b3a..1beeac21c8 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c
index 21e25dd542..cb2ab04413 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_init_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_interpolate_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c
index 3f11c47ae4..836169237f 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fir_interpolate_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
@@ -62,7 +67,7 @@
  * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -495,7 +500,7 @@ void arm_fir_interpolate_q15(
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 
  /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c
index 05e64e1465..33ecec21db 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_interpolate_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fir_interpolate_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
@@ -62,7 +67,7 @@
  * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -492,7 +497,7 @@ void arm_fir_interpolate_q31(
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
  /**    
   * @} end of FIR_Interpolate group    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c
index 3b5fc9408f..0e9990b151 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_lattice_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -86,6 +91,8 @@
  * The initialization function performs the following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -133,7 +140,7 @@ void arm_fir_lattice_f32(
   float32_t *pk;                                 /* temporary coefficient pointer */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -490,7 +497,7 @@ void arm_fir_lattice_f32(
 
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c
index 13f3bab16b..0580f4032f 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c
index 8bdc71a7c8..cb6a8eadcb 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c
index b79d3844f2..51acb790aa 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_init_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_lattice_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c
index 655b9b5fb8..06dfff9cb1 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_lattice_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -66,7 +71,7 @@ void arm_fir_lattice_q15(
   q15_t *pk;                                     /* temporary coefficient pointer */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -522,7 +527,7 @@ void arm_fir_lattice_q15(
 
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c
index c923721333..c0ddf96932 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_lattice_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_lattice_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -58,7 +63,7 @@
  * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.    
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -340,7 +345,7 @@ void arm_fir_lattice_q31(
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q15.c
index ac3e2210c3..840507fb72 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -73,7 +75,7 @@
  * Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function.       
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
 /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -593,7 +595,7 @@ void arm_fir_q15(
 
 #endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
 
-#else /* ARM_MATH_CM0 */
+#else /* ARM_MATH_CM0_FAMILY */
 
 
 /* Run the below code for Cortex-M0 */
@@ -679,7 +681,7 @@ void arm_fir_q15(
 
 }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q31.c
index 8113d7e274..dc43626b1a 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -78,7 +80,7 @@ void arm_fir_q31(
   q31_t *pStateCurnt;                            /* Points to the current sample of the state */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -354,7 +356,7 @@ void arm_fir_q31(
   }
 
 
-#endif /*  #ifndef ARM_MATH_CM0 */
+#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q7.c
index 97974992a0..e7cd81e2cc 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_q7.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -71,7 +73,7 @@ void arm_fir_q7(
   uint32_t blockSize)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -379,7 +381,7 @@ void arm_fir_q7(
     i--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c
index 3b2dff4531..3a3db2c108 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_sparse_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -77,6 +82,8 @@
  * The initialization function performs the following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -166,7 +173,7 @@ void arm_fir_sparse_f32(
   pOut = pDst;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -356,7 +363,7 @@ void arm_fir_sparse_f32(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0        */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c
index cc9cb53f76..fe48f35ada 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c
index ef25875281..ef50dbffe8 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c
index abad5b85d5..3ba24559b8 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c
index 9fb5c564d5..2057213784 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_init_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_fir_sparse_init_q7.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE. 
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c
index 62e7afecbb..bd363bb567 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_sparse_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -85,7 +90,7 @@ void arm_fir_sparse_q15(
   q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -397,7 +402,7 @@ void arm_fir_sparse_q15(
     blkCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c
index 9f02312501..88b7181e2c 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_sparse_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -111,7 +116,7 @@ void arm_fir_sparse_q31(
   pOut = pDst;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -361,7 +366,7 @@ void arm_fir_sparse_q31(
     blkCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c
index e67339250f..33067b6c8c 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_fir_sparse_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_fir_sparse_q7.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ------------------------------------------------------------------- */
 #include "arm_math.h"
 
@@ -90,7 +95,7 @@ void arm_fir_sparse_q7(
   q31_t in;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -389,7 +394,7 @@ void arm_fir_sparse_q7(
     blkCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c
index 264e15ed9e..8c6c8ef7a9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_iir_lattice_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -85,7 +90,9 @@
  * There is also an associated initialization function for each data type.    
  * The initialization function performs the following operations:    
  * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
+ * - Zeros out the values in the state buffer.   
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero. 
  *    
  * \par    
  * Use of the initialization function is optional.    
@@ -120,7 +127,7 @@
  * @return none.    
  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -432,7 +439,7 @@ void arm_iir_lattice_f32(
 
 }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c
index e2227e3e5b..6538364f90 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c
index 618505c2cb..55a31289f1 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c
index 85d18e6697..84dcabf46c 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_init_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_iir_lattice_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c
index d6221621e3..9b0ff9869d 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_iir_lattice_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -71,7 +76,7 @@ void arm_iir_lattice_q15(
 {
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -85,10 +90,10 @@ void arm_iir_lattice_q15(
   q15_t *pState;                                 /* State pointer */
   q15_t *pStateCurnt;                            /* State current pointer */
   q15_t out;                                     /* Temporary variable for output */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  q15_t v1, v2;
-#endif
   q31_t v;                                       /* Temporary variable for ladder coefficient */
+#ifdef UNALIGNED_SUPPORT_DISABLE
+	q15_t v1, v2;
+#endif
 
 
   blkCnt = blockSize;
@@ -447,7 +452,7 @@ void arm_iir_lattice_q15(
     stgCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c
index cff10f872e..978c4a70d1 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_iir_lattice_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_iir_lattice_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -81,7 +86,7 @@ void arm_iir_lattice_q31(
   pState = &S->pState[0];
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -333,7 +338,7 @@ void arm_iir_lattice_q31(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_f32.c
index ca804ed101..cca785fae7 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -117,6 +122,9 @@
  * The initialization function performs the following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero. 
+ *
  * \par    
  * Use of the initialization function is optional.    
  * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
@@ -198,7 +206,7 @@ void arm_lms_f32(
   blkCnt = blockSize;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -425,7 +433,7 @@ void arm_lms_f32(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c
index 8030ba334b..05f3416c80 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c
index e6dbf3467b..a49d821b8b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c
index bb3dfcb2a8..2519b0d53b 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_init_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c
index 3237f0f1b6..5357ee87ea 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_norm_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -120,6 +125,11 @@
  * The initialization function performs the following operations:    
  * - Sets the values of the internal structure fields.    
  * - Zeros out the values in the state buffer.    
+ * To do this manually without calling the init function, assign the follow subfields of the instance structure:
+ * numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. 
+ * For Q7, Q15, and Q31 the following fields must also be initialized;
+ * recipTable, postShift
+ *
  * \par    
  * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.    
  * \par Fixed-Point Behavior:    
@@ -195,7 +205,7 @@ void arm_lms_norm_f32(
   blkCnt = blockSize;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -447,7 +457,7 @@ void arm_lms_norm_f32(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c
index 6b7b6289e7..070377823a 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_f32.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c
index a70e97bffa..8ed6db4288 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q15.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c
index b539ecf92c..c422f77f23 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_init_q31.c
@@ -1,8 +1,8 @@
 /*-----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_lms_norm_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------*/
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c
index 13f36a066c..795b03bee5 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_norm_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -110,7 +115,7 @@ void arm_lms_norm_q15(
   blkCnt = blockSize;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -425,7 +430,7 @@ void arm_lms_norm_q15(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c
index fee7015b0b..223816a048 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_norm_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_norm_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -111,7 +116,7 @@ void arm_lms_norm_q31(
   blkCnt = blockSize;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -417,7 +422,7 @@ void arm_lms_norm_q31(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q15.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q15.c
index bb225d3c2e..a52a04bf63 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q15.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -90,7 +95,7 @@ void arm_lms_q15(
   int32_t uShift = (32 - lShift);
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -365,7 +370,7 @@ void arm_lms_q15(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q31.c b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q31.c
index 96ae9ecf65..0356133df9 100644
--- a/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q31.c
+++ b/libraries/dsp/cmsis_dsp/FilteringFunctions/arm_lms_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_lms_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -101,7 +106,7 @@ void arm_lms_q31(
   blkCnt = blockSize;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -355,7 +360,7 @@ void arm_lms_q31(
     tapCnt--;
   }
 
-#endif /*   #ifndef ARM_MATH_CM0 */
+#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c
index 9ebd9e21c7..5bb93007b9 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_add_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -77,11 +79,11 @@ arm_status arm_mat_add_f32(
   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
   float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
@@ -103,7 +105,7 @@ arm_status arm_mat_add_f32(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Loop unrolling */
     blkCnt = numSamples >> 2u;
@@ -180,7 +182,7 @@ arm_status arm_mat_add_f32(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c
index 9c86301310..668937648a 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_add_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -91,7 +93,7 @@ arm_status arm_mat_add_q15(
     /* Total number of samples in the input matrix */
     numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -146,7 +148,7 @@ arm_status arm_mat_add_q15(
       blkCnt--;
     }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     /* set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c
index ee1207e570..08f06f08ee 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_add_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_add_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -71,12 +73,12 @@ arm_status arm_mat_add_q31(
   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
   q31_t inA1, inB1;                              /* temporary variables */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q31_t inA2, inB2;                              /* temporary variables */
   q31_t out1, out2;                              /* temporary variables */
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
@@ -97,7 +99,7 @@ arm_status arm_mat_add_q31(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -174,7 +176,7 @@ arm_status arm_mat_add_q31(
     blkCnt = numSamples;
 
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c
index 8d2cea559b..6932adcba3 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c
index 7255627c2e..2c499b1ce9 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------------- */
 
 
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c
index 86ad404da6..5dabc779cd 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_init_q31.c    
@@ -10,29 +10,31 @@
 * Description:	Q31 matrix initialization.    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------------- */
 
 
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c
index e8c6daebb2..52d83aa7d6 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_inverse_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        1. March 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_inverse_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -86,7 +94,8 @@ arm_status arm_mat_inverse_f32(
   uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
   uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
+  float32_t maxC;                                /* maximum value in the column */
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -125,12 +134,13 @@ arm_status arm_mat_inverse_f32(
 	 *    
 	 *		3. Begin with the first row. Let i = 1.    
 	 *    
-	 *	    4. Check to see if the pivot for row i is zero.    
+	 *	    4. Check to see if the pivot for column i is the greatest of the column.    
 	 *		   The pivot is the element of the main diagonal that is on the current row.    
 	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is zero, exchange that row with a row below it that does not    
-	 *		   contain a zero in column i. If this is not possible, then an inverse    
-	 *		   to that matrix does not exist.    
+	 *		   If the pivot is not the most significant of the coluimns, exchange that row with a row
+	 *		   below it that does contain the most significant value in column i. If the most
+	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
+	 *		   The most significant value of the column is the absolut maximum.
 	 *    
 	 *	    5. Divide every element of row i by the pivot.    
 	 *    
@@ -204,8 +214,26 @@ arm_status arm_mat_inverse_f32(
       /* Destination pointer modifier */
       k = 1u;
 
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
+     /* Grab the most significant value from column l */
+      maxC = 0;
+      for (i = 0; i < numRows; i++)
+      {
+        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
+        pInT1 += numCols;
+      }
+
+      /* Update the status if the matrix is singular */
+      if(maxC == 0.0f)
+      {
+        status = ARM_MATH_SINGULAR;
+        break;
+      }
+
+      /* Restore pInT1  */
+      pInT1 -= numRows * numCols;
+      
+      /* Check if the pivot element is the most significant of the column */
+      if( (in > 0.0f ? in : -in) != maxC)
       {
         /* Loop over the number rows present below */
         i = numRows - (l + 1u);
@@ -216,9 +244,9 @@ arm_status arm_mat_inverse_f32(
           pInT2 = pInT1 + (numCols * l);
           pInT4 = pInT3 + (numCols * k);
 
-          /* Check if there is a non zero pivot element to    
+          /* Look for the most significant element to    
            * replace in the rows below */
-          if(*pInT2 != 0.0f)
+          if((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
           {
             /* Loop over number of columns    
              * to the right of the pilot element */
@@ -281,7 +309,7 @@ arm_status arm_mat_inverse_f32(
       pInT2 = pPivotRowDst;
 
       /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
+      in = *pPivotRowIn;
 
       /* Loop over number of columns    
        * to the right of the pilot element */
@@ -583,13 +611,15 @@ arm_status arm_mat_inverse_f32(
       {
         /* Divide each element of the row of the input matrix     
          * by the pivot element */
-        *pInT1++ = *pInT1 / in;
+        *pInT1 = *pInT1 / in;
+        pInT1++;
       }
       for (j = 0u; j < numCols; j++)
       {
         /* Divide each element of the row of the destination matrix     
          * by the pivot element */
-        *pInT2++ = *pInT2 / in;
+        *pInT2 = *pInT2 / in;
+        pInT2++;
       }
 
       /* Replace the rows with the sum of that row and a multiple of row i     
@@ -624,7 +654,8 @@ arm_status arm_mat_inverse_f32(
           {
             /* Replace the element by the sum of that row     
                and a multiple of the reference row  */
-            *pInT1++ = *pInT1 - (in * *pPRT_in++);
+            *pInT1 = *pInT1 - (in * *pPRT_in++);
+            pInT1++;
           }
           /* Loop over the number of columns to     
              replace the elements in the destination matrix */
@@ -632,7 +663,8 @@ arm_status arm_mat_inverse_f32(
           {
             /* Replace the element by the sum of that row     
                and a multiple of the reference row  */
-            *pInT2++ = *pInT2 - (in * *pPRT_pDst++);
+            *pInT2 = *pInT2 - (in * *pPRT_pDst++);
+            pInT2++;
           }
 
         }
@@ -649,7 +681,7 @@ arm_status arm_mat_inverse_f32(
     }
 
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c
index a04f12600a..bae73f1467 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_mult_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -88,7 +90,7 @@ arm_status arm_mat_mult_f32(
   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -261,7 +263,7 @@ arm_status arm_mat_mult_f32(
 
       } while(col > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
       /* Update the pointer pInA to point to the  starting address of the next row */
       i = i + numColsB;
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c
index 5699511cf8..cf587ef16b 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_mult_fast_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c
index a7b08fbabf..1c5f414347 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_fast_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_mult_fast_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c
index 46ceca1f26..1e112ab777 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_mult_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -78,11 +80,11 @@ arm_status arm_mat_mult_q15(
   const arm_matrix_instance_q15 * pSrcA,
   const arm_matrix_instance_q15 * pSrcB,
   arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
+  q15_t * pState CMSIS_UNUSED)
 {
   q63_t sum;                                     /* accumulator */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -453,7 +455,7 @@ arm_status arm_mat_mult_q15(
 
     } while(row > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
     /* set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c
index 54026e3db4..218b7f53ff 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_mult_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_mult_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -88,7 +90,7 @@ arm_status arm_mat_mult_q31(
   uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
   uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c
index 833c282a7c..a242c91c9c 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:        arm_mat_scale_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -86,12 +88,12 @@ arm_status arm_mat_scale_f32(
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix scaling     */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   float32_t in1, in2, in3, in4;                  /* temporary variables */
   float32_t out1, out2, out3, out4;              /* temporary variables */
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
 #ifdef ARM_MATH_MATRIX_CHECK
   /* Check for matrix mismatch condition */
@@ -106,7 +108,7 @@ arm_status arm_mat_scale_f32(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -154,7 +156,7 @@ arm_status arm_mat_scale_f32(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c
index 684fbcc50c..bb28cfc11c 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_scale_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -76,13 +78,13 @@ arm_status arm_mat_scale_q15(
   uint32_t blkCnt;                               /* loop counters */
   arm_status status;                             /* status of matrix scaling     */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q15_t in1, in2, in3, in4;
   q31_t out1, out2, out3, out4;
   q31_t inA1, inA2;
 
-#endif //     #ifndef ARM_MATH_CM0
+#endif //     #ifndef ARM_MATH_CM0_FAMILY
 
 #ifdef ARM_MATH_MATRIX_CHECK
   /* Check for matrix mismatch */
@@ -97,7 +99,7 @@ arm_status arm_mat_scale_q15(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
     /* Loop Unrolling */
@@ -156,7 +158,7 @@ arm_status arm_mat_scale_q15(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c
index 7227ad38ae..6b2b1046b2 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_scale_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_scale_q31.c    
@@ -11,30 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
-* -------------------------------------------------------------------- */
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  ------------------------------------------------ */
 
 #include "arm_math.h"
 
@@ -77,7 +78,7 @@ arm_status arm_mat_scale_q31(
   arm_status status;                             /* status of matrix scaling      */
   q31_t in1, in2, out1;                          /* temporary variabels */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q31_t in3, in4, out2, out3, out4;              /* temporary variables */
 
@@ -96,7 +97,7 @@ arm_status arm_mat_scale_q31(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -167,7 +168,7 @@ arm_status arm_mat_scale_q31(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c
index 6ee7a46c8f..0b83133ca7 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_sub_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -76,11 +78,11 @@ arm_status arm_mat_sub_f32(
   float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
   float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
@@ -101,7 +103,7 @@ arm_status arm_mat_sub_f32(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -182,7 +184,7 @@ arm_status arm_mat_sub_f32(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c
index ea32f04bd1..ff7c30432f 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_sub_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -92,7 +94,7 @@ arm_status arm_mat_sub_q15(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -143,7 +145,7 @@ arm_status arm_mat_sub_q15(
       blkCnt--;
     }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c
index 157d59b725..c2edef1ebe 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_sub_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_sub_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -72,12 +74,12 @@ arm_status arm_mat_sub_q31(
   q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
   q31_t inA1, inB1;                              /* temporary variables */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q31_t inA2, inB2;                              /* temporary variables */
   q31_t out1, out2;                              /* temporary variables */
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   uint32_t numSamples;                           /* total number of elements in the matrix  */
   uint32_t blkCnt;                               /* loop counters */
@@ -99,7 +101,7 @@ arm_status arm_mat_sub_q31(
     /* Total number of samples in the input matrix */
     numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
     /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -176,7 +178,7 @@ arm_status arm_mat_sub_q31(
     /* Initialize blkCnt with number of samples */
     blkCnt = numSamples;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
     while(blkCnt > 0u)
     {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c
index 721b512b79..4cd968ae19 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_trans_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 /**    
@@ -74,7 +76,7 @@ arm_status arm_mat_trans_f32(
   uint16_t nRows = pSrc->numRows;                /* number of rows */
   uint16_t nColumns = pSrc->numCols;             /* number of columns */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -194,7 +196,7 @@ arm_status arm_mat_trans_f32(
         col--;
       }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
       i++;
 
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c
index bb03e72de0..ee4eea6056 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_trans_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -66,7 +68,7 @@ arm_status arm_mat_trans_q15(
   uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
   arm_status status;                             /* status of matrix transpose */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 #ifndef UNALIGNED_SUPPORT_DISABLE
@@ -249,7 +251,7 @@ arm_status arm_mat_trans_q15(
       /* Initialize column loop counter */
       col = nColumns;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
       while(col > 0u)
       {
diff --git a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c
index 70cb018605..636eb45eb8 100644
--- a/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c
+++ b/libraries/dsp/cmsis_dsp/MatrixFunctions/arm_mat_trans_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_mat_trans_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-*    incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -65,7 +67,7 @@ arm_status arm_mat_trans_q31(
   uint16_t nRows = pSrc->numRows;                /* number of nRows */
   uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -185,7 +187,7 @@ arm_status arm_mat_trans_q31(
         col--;
       }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
       i++;
 
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_f32.c
index 06a348cd42..eb19ebbc19 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_max_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -65,7 +73,7 @@ void arm_max_f32(
   float32_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
@@ -147,7 +155,7 @@ void arm_max_f32(
 
   blkCnt = (blockSize - 1u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q15.c
index 5544cde57e..e4a90ef444 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_max_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -57,7 +65,7 @@ void arm_max_q15(
   q15_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q15_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
@@ -139,7 +147,7 @@ void arm_max_q15(
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q31.c
index 208f2b67b9..d1bb6cad57 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_max_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -57,7 +65,7 @@ void arm_max_q31(
   q31_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
@@ -139,7 +147,7 @@ void arm_max_q31(
 
   blkCnt = (blockSize - 1u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q7.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q7.c
index 22ee440443..c9bcc645df 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q7.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_max_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_max_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -57,7 +65,7 @@ void arm_max_q7(
   q7_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
   q7_t maxVal1, maxVal2, out;                    /* Temporary variables to store the output value. */
@@ -139,7 +147,7 @@ void arm_max_q7(
 
   blkCnt = (blockSize - 1u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c
index ea4ffb0cc5..cb36be6613 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_mean_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -72,7 +80,7 @@ void arm_mean_f32(
   float32_t sum = 0.0f;                          /* Temporary result storage */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t in1, in2, in3, in4;
@@ -110,7 +118,7 @@ void arm_mean_f32(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c
index 2e8fdfa091..e599287bdc 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_mean_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -69,7 +77,7 @@ void arm_mean_q15(
   q31_t sum = 0;                                 /* Temporary result storage */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in;
@@ -104,7 +112,7 @@ void arm_mean_q15(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c
index 4dd3ce6b36..5d41bde266 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_mean_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -69,7 +77,7 @@ void arm_mean_q31(
   q63_t sum = 0;                                 /* Temporary result storage */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2, in3, in4;
@@ -107,7 +115,7 @@ void arm_mean_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c
index 22c60ccdd9..b71145fe53 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_mean_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_mean_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -69,7 +77,7 @@ void arm_mean_q7(
   q31_t sum = 0;                                 /* Temporary result storage */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in;
@@ -104,7 +112,7 @@ void arm_mean_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_f32.c
index 723b693ca6..61af826867 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_min_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -66,7 +74,7 @@ void arm_min_f32(
   float32_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -146,7 +154,7 @@ void arm_min_f32(
 
   blkCnt = (blockSize - 1u);
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   while(blkCnt > 0)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q15.c
index 831505bb24..a31ca72bfd 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_min_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -59,7 +67,7 @@ void arm_min_q15(
   q15_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q15_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
@@ -138,7 +146,7 @@ void arm_min_q15(
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   while(blkCnt > 0)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q31.c
index 76896902ee..fe0a5131c1 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_min_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -59,7 +67,7 @@ void arm_min_q31(
   q31_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
@@ -139,7 +147,7 @@ void arm_min_q31(
   /* Load first input value that act as reference value for comparision */
   out = *pSrc++;
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   while(blkCnt > 0)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q7.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q7.c
index 88e4dcef5e..335aee702b 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q7.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_min_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_min_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -58,7 +66,7 @@ void arm_min_q7(
   q7_t * pResult,
   uint32_t * pIndex)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -139,7 +147,7 @@ void arm_min_q7(
 
   blkCnt = (blockSize - 1u);
 
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
   while(blkCnt > 0)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_f32.c
index 4e3505b997..464265e164 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_power_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -77,7 +82,7 @@ void arm_power_f32(
   float32_t in;                                  /* Temporary variable to store input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -115,7 +120,7 @@ void arm_power_f32(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 
   while(blkCnt > 0u)
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q15.c
index a8d0db898d..9005e3d971 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_power_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -69,7 +77,7 @@ void arm_power_q15(
 {
   q63_t sum = 0;                                 /* Temporary result storage */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -133,7 +141,7 @@ void arm_power_q15(
     blkCnt--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Store the results in 34.30 format  */
   *pResult = sum;
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q31.c
index 49cdb67fa3..344a3a369f 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_power_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -73,7 +81,7 @@ void arm_power_q31(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -113,7 +121,7 @@ void arm_power_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q7.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q7.c
index 39fd2e98d0..872e36b4c9 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q7.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_power_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_power_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -71,7 +79,7 @@ void arm_power_q7(
   q7_t in;                                       /* Temporary variable to store input */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -111,7 +119,7 @@ void arm_power_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c
index eacc166ffb..b3f67db03c 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_rms_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -74,7 +82,7 @@ void arm_rms_f32(
   float32_t in;                                  /* Tempoprary variable to store input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -111,7 +119,7 @@ void arm_rms_f32(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c
index 4621a2c21a..5de2f2a8a1 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_rms_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -66,7 +74,7 @@ void arm_rms_q15(
 {
   q63_t sum = 0;                                 /* accumulator */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -108,9 +116,9 @@ void arm_rms_q15(
   }
 
   /* Truncating and saturating the accumulator to 1.15 format */
-  sum = __SSAT((q31_t) (sum >> 15), 16);
+  in = (q31_t)(sum >> 15);
 
-  in1 = (q15_t) (sum / blockSize);
+  in1 = __SSAT(in / blockSize, 16);
 
   /* Store the result in the destination */
   arm_sqrt_q15(in1, pResult);
@@ -120,6 +128,7 @@ void arm_rms_q15(
   /* Run the below code for Cortex-M0 */
 
   q15_t in;                                      /* temporary variable to store the input value */
+  q31_t tmp;                                     /* temporary variable to store the input value */
   uint32_t blkCnt;                               /* loop counter */
 
   /* Loop over blockSize number of values */
@@ -137,14 +146,14 @@ void arm_rms_q15(
   }
 
   /* Truncating and saturating the accumulator to 1.15 format */
-  sum = __SSAT((q31_t) (sum >> 15), 16);
+  tmp = (q31_t)(sum >> 15);
 
-  in = (q15_t) (sum / blockSize);
+  in = __SSAT(tmp / blockSize, 16);
 
   /* Store the result in the destination */
   arm_sqrt_q15(in, pResult);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c
index 56eff443ad..0a8bf1f73a 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_rms_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_rms_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -71,7 +79,7 @@ void arm_rms_q31(
   q31_t in;                                      /* Temporary variable to store the input */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -119,7 +127,7 @@ void arm_rms_q31(
   /* Run the below code for Cortex-M0 */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_f32.c
index 2fcc4e5a73..135eb74d63 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_std_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -79,7 +87,7 @@ void arm_std_f32(
   float32_t in;                                  /* input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -179,7 +187,7 @@ void arm_std_f32(
   /* Compute standard deviation and then store the result to the destination */
   arm_sqrt_f32(var, pResult);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q15.c
index ac51167a12..b6c2d13d21 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_std_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -74,7 +82,7 @@ void arm_std_q15(
   q15_t t;                                       /* Temporary variable */
   q63_t sumOfSquares = 0;                        /* Accumulator */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -187,7 +195,7 @@ void arm_std_q15(
   /* Compute standard deviation and store the result to the destination */
   arm_sqrt_q15(in, pResult);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 
 }
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q31.c
index de60bc06ea..ae830e7722 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_std_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_std_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -79,7 +87,7 @@ void arm_std_q31(
   uint32_t blkCnt;                               /* loop counter */
   q63_t sumOfSquares = 0;                        /* Accumulator */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -163,7 +171,7 @@ void arm_std_q31(
   sumOfSquares = (sumOfSquares >> 31);
   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 30);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Compute mean of all input values */
   t = (q31_t) ((1.0f / (blockSize * (blockSize - 1u))) * 2147483648.0f);
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_f32.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_f32.c
index 4dfd846c2b..e3e46ff016 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_f32.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_var_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -80,7 +88,7 @@ void arm_var_f32(
   float32_t in;                                  /* input value */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -175,7 +183,7 @@ void arm_var_f32(
   /* Compute the variance */
   *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q15.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q15.c
index d37e66a57c..695f08e506 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q15.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_var_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -76,7 +84,7 @@ void arm_var_q15(
   q15_t t;                                       /* Temporary variable */
   q63_t sumOfSquares = 0;                        /* Accumulator */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -160,7 +168,7 @@ void arm_var_q15(
   sumOfSquares = __SSAT((sumOfSquares >> 15u), 16u);
   meanOfSquares = (q31_t) ((sumOfSquares * t) >> 14u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   /* Compute mean of all input values */
   t = (q15_t) ((1.0f / (float32_t) (blockSize * (blockSize - 1u))) * 32768);
diff --git a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q31.c b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q31.c
index 7acef7ef12..3d6492ab04 100644
--- a/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q31.c
+++ b/libraries/dsp/cmsis_dsp/StatisticsFunctions/arm_var_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_var_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -78,7 +86,7 @@ void arm_var_q31(
   q31_t t;                                       /* Temporary variable */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q63_t sumSquare1 = 0;                          /* Accumulator */
@@ -130,7 +138,7 @@ void arm_var_q31(
   /* Run the below code for Cortex-M0 */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_f32.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_f32.c
index 5621b87520..f50cb532fd 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_f32.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_copy_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -73,7 +78,7 @@ void arm_copy_f32(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t in1, in2, in3, in4;
@@ -112,7 +117,7 @@ void arm_copy_f32(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q15.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q15.c
index e605a72698..b60e68ac14 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q15.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_copy_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -59,7 +64,7 @@ void arm_copy_q15(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -91,7 +96,7 @@ void arm_copy_q15(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q31.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q31.c
index 843083db22..3654d3d30e 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q31.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_copy_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -61,7 +66,7 @@ void arm_copy_q31(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2, in3, in4;
@@ -100,7 +105,7 @@ void arm_copy_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q7.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q7.c
index 06288fc0b0..303286fe5e 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q7.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_copy_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_copy_q7.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -60,7 +65,7 @@ void arm_copy_q7(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -91,7 +96,7 @@ void arm_copy_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 
   while(blkCnt > 0u)
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_f32.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_f32.c
index 98d6635f58..3f5f86e0e5 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_f32.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fill_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -73,7 +78,7 @@ void arm_fill_f32(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   float32_t in1 = value;
@@ -110,7 +115,7 @@ void arm_fill_f32(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 
   while(blkCnt > 0u)
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q15.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q15.c
index 9de552934a..5c73cf627a 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q15.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fill_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -60,7 +65,7 @@ void arm_fill_q15(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -97,7 +102,7 @@ void arm_fill_q15(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q31.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q31.c
index 2d4f22e1e7..2e8c133ae3 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q31.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fill_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -61,7 +66,7 @@ void arm_fill_q31(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1 = value;
@@ -98,7 +103,7 @@ void arm_fill_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q7.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q7.c
index 2a26be451b..376b7a588b 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q7.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_fill_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_fill_q7.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -60,7 +65,7 @@ void arm_fill_q7(
 {
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -95,7 +100,7 @@ void arm_fill_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q15.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q15.c
index 8ff2efd197..cfa5ec6512 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q15.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_float_to_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -79,7 +87,7 @@ void arm_float_to_q15(
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -187,7 +195,7 @@ void arm_float_to_q15(
     blkCnt--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q31.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q31.c
index 1244c8b753..a39fbe7e39 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q31.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_float_to_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -83,7 +91,7 @@ void arm_float_to_q31(
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -194,7 +202,7 @@ void arm_float_to_q31(
     blkCnt--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q7.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q7.c
index e43f0531ee..2820af7e66 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q7.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_float_to_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_float_to_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -78,7 +86,7 @@ void arm_float_to_q7(
 
 #endif /*      #ifdef ARM_MATH_ROUNDING        */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -186,7 +194,7 @@ void arm_float_to_q7(
     blkCnt--;
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_float.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_float.c
index c927358515..2310b909dc 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_float.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_float.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q15_to_float.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -75,7 +83,7 @@ void arm_q15_to_float(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -108,7 +116,7 @@ void arm_q15_to_float(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c
index d785e93018..2d5c86e22a 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q15_to_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -67,7 +75,7 @@ void arm_q15_to_q31(
   q15_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2;
@@ -129,7 +137,7 @@ void arm_q15_to_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c
index 8d9a9be044..d261221505 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q15_to_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q15_to_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -68,7 +76,7 @@ void arm_q15_to_q7(
   q15_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2;
@@ -127,7 +135,7 @@ void arm_q15_to_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_float.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_float.c
index b2f6de9b26..4f60511c22 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_float.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_float.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q31_to_float.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -72,7 +80,7 @@ void arm_q31_to_float(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -105,7 +113,7 @@ void arm_q31_to_float(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c
index 1c99dbb473..a2b9fde747 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q31_to_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -67,7 +75,7 @@ void arm_q31_to_q15(
   q31_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2, in3, in4;
@@ -118,7 +126,7 @@ void arm_q31_to_q15(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c
index 2531c11e81..c2f9b9a040 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q31_to_q7.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q31_to_q7.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -67,7 +75,7 @@ void arm_q31_to_q7(
   q31_t *pIn = pSrc;                             /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
   q31_t in1, in2, in3, in4;
@@ -109,7 +117,7 @@ void arm_q31_to_q7(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_float.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_float.c
index 8e3f6f1b7d..3b7f586a57 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_float.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_float.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q7_to_float.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -72,7 +80,7 @@ void arm_q7_to_float(
   uint32_t blkCnt;                               /* loop counter */
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -105,7 +113,7 @@ void arm_q7_to_float(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c
index a48ec29b82..444321c601 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q7_to_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -70,7 +78,7 @@ void arm_q7_to_q15(
   q7_t *pIn = pSrc;                              /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
   q31_t in;
   q31_t in1, in2;
   q31_t out1, out2;
@@ -130,7 +138,7 @@ void arm_q7_to_q15(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c
index 0607a9a4c8..fefd78a017 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/arm_q7_to_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:		arm_q7_to_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * ---------------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -67,7 +75,7 @@ void arm_q7_to_q31(
   q7_t *pIn = pSrc;                              /* Src pointer */
   uint32_t blkCnt;                               /* loop counter */
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   q31_t in;
 
@@ -115,7 +123,7 @@ void arm_q7_to_q31(
   /* Loop over blockSize number of values */
   blkCnt = blockSize;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
   while(blkCnt > 0u)
   {
diff --git a/libraries/dsp/cmsis_dsp/SupportFunctions/math_helper.c b/libraries/dsp/cmsis_dsp/SupportFunctions/math_helper.c
index 75dcd5f252..dbf2cfe1bc 100644
--- a/libraries/dsp/cmsis_dsp/SupportFunctions/math_helper.c
+++ b/libraries/dsp/cmsis_dsp/SupportFunctions/math_helper.c
@@ -1,8 +1,8 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010 ARM Limited. All rights reserved.  
-*  
-* $Date:        29. November 2010  
-* $Revision: 	V1.0.3  
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0    
 *  
 * Project: 	    CMSIS DSP Library 
 *
@@ -12,20 +12,31 @@
 *  
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.0.3 2010/11/29 
-*    Re-organized the CMSIS folders and updated documentation.  
-*   
-* Version 1.0.2 2010/11/11  
-*    Documentation updated.   
-*  
-* Version 1.0.1 2010/10/05   
-*    Production release and review comments incorporated.  
-*  
-* Version 1.0.0 2010/09/20   
-*    Production release and review comments incorporated.  
-*  
-* Version 0.0.7  2010/06/10   
-*    Misra-C changes done 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 /* ----------------------------------------------------------------------
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal.c
index 5529914755..7e1795db31 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_bitreversal.c    
@@ -11,155 +11,175 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Initial Version  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 #include "arm_common_tables.h"
 
 /*    
- * @brief  In-place bit reversal function.   
- * @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.   
- * @param[in]      fftSize      length of the FFT.   
- * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.   
- * @param[in]      *pBitRevTab  points to the bit reversal table.   
- * @return none.   
- */
+* @brief  In-place bit reversal function.   
+* @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.   
+* @param[in]      fftSize      length of the FFT.   
+* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.   
+* @param[in]      *pBitRevTab  points to the bit reversal table.   
+* @return none.   
+*/
 
 void arm_bitreversal_f32(
-  float32_t * pSrc,
-  uint16_t fftSize,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab)
+float32_t * pSrc,
+uint16_t fftSize,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTab)
 {
-  uint16_t fftLenBy2, fftLenBy2p1;
-  uint16_t i, j;
-  float32_t in;
+   uint16_t fftLenBy2, fftLenBy2p1;
+   uint16_t i, j;
+   float32_t in;
 
-  /*  Initializations */
-  j = 0u;
-  fftLenBy2 = fftSize >> 1u;
-  fftLenBy2p1 = (fftSize >> 1u) + 1u;
+   /*  Initializations */
+   j = 0u;
+   fftLenBy2 = fftSize >> 1u;
+   fftLenBy2p1 = (fftSize >> 1u) + 1u;
 
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      in = pSrc[2u * i];
-      pSrc[2u * i] = pSrc[2u * j];
-      pSrc[2u * j] = in;
+   /* Bit Reversal Implementation */
+   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
+   {
+      if(i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2u * i];
+         pSrc[2u * i] = pSrc[2u * j];
+         pSrc[2u * j] = in;
+
+         /*  pSrc[i+1u] <-> pSrc[j+1u] */
+         in = pSrc[(2u * i) + 1u];
+         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
+         pSrc[(2u * j) + 1u] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2u * (i + fftLenBy2p1)];
+         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
+         pSrc[2u * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
+         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
+         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
+         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
+         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
+
+      }
 
       /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[(2u * i) + 1u];
-      pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-      pSrc[(2u * j) + 1u] = in;
+      in = pSrc[2u * (i + 1u)];
+      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
+      pSrc[2u * (j + fftLenBy2)] = in;
 
-      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-      in = pSrc[2u * (i + fftLenBy2p1)];
-      pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-      pSrc[2u * (j + fftLenBy2p1)] = in;
+      /*  pSrc[i+2u] <-> pSrc[j+2u] */
+      in = pSrc[(2u * (i + 1u)) + 1u];
+      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
+      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
 
-      /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-      in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-        pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
 
-    }
-
-    /*  pSrc[i+1u] <-> pSrc[j+1u] */
-    in = pSrc[2u * (i + 1u)];
-    pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-    pSrc[2u * (j + fftLenBy2)] = in;
-
-    /*  pSrc[i+2u] <-> pSrc[j+2u] */
-    in = pSrc[(2u * (i + 1u)) + 1u];
-    pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-    pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTab;
-
-    /*  Updating the bit reversal index depending on the fft length  */
-    pBitRevTab += bitRevFactor;
-  }
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
 }
 
 
 
 /*    
- * @brief  In-place bit reversal function.   
- * @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen       length of the FFT.   
- * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
- * @param[in]      *pBitRevTab  points to bit reversal table.   
- * @return none.   
- */
+* @brief  In-place bit reversal function.   
+* @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.   
+* @param[in]      fftLen       length of the FFT.   
+* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
+* @param[in]      *pBitRevTab  points to bit reversal table.   
+* @return none.   
+*/
 
 void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTable)
+q31_t * pSrc,
+uint32_t fftLen,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTable)
 {
-  uint32_t fftLenBy2, fftLenBy2p1, i, j;
-  q31_t in;
+   uint32_t fftLenBy2, fftLenBy2p1, i, j;
+   q31_t in;
 
-  /*  Initializations      */
-  j = 0u;
-  fftLenBy2 = fftLen / 2u;
-  fftLenBy2p1 = (fftLen / 2u) + 1u;
+   /*  Initializations      */
+   j = 0u;
+   fftLenBy2 = fftLen / 2u;
+   fftLenBy2p1 = (fftLen / 2u) + 1u;
 
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      in = pSrc[2u * i];
-      pSrc[2u * i] = pSrc[2u * j];
-      pSrc[2u * j] = in;
+   /* Bit Reversal Implementation */
+   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
+   {
+      if(i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2u * i];
+         pSrc[2u * i] = pSrc[2u * j];
+         pSrc[2u * j] = in;
+
+         /*  pSrc[i+1u] <-> pSrc[j+1u] */
+         in = pSrc[(2u * i) + 1u];
+         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
+         pSrc[(2u * j) + 1u] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2u * (i + fftLenBy2p1)];
+         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
+         pSrc[2u * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
+         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
+         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
+         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
+         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
+
+      }
 
       /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[(2u * i) + 1u];
-      pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-      pSrc[(2u * j) + 1u] = in;
+      in = pSrc[2u * (i + 1u)];
+      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
+      pSrc[2u * (j + fftLenBy2)] = in;
 
-      /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-      in = pSrc[2u * (i + fftLenBy2p1)];
-      pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-      pSrc[2u * (j + fftLenBy2p1)] = in;
+      /*  pSrc[i+2u] <-> pSrc[j+2u] */
+      in = pSrc[(2u * (i + 1u)) + 1u];
+      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
+      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
 
-      /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-      in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-        pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-      pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTable;
 
-    }
-
-    /*  pSrc[i+1u] <-> pSrc[j+1u] */
-    in = pSrc[2u * (i + 1u)];
-    pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-    pSrc[2u * (j + fftLenBy2)] = in;
-
-    /*  pSrc[i+2u] <-> pSrc[j+2u] */
-    in = pSrc[(2u * (i + 1u)) + 1u];
-    pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-    pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTable;
-
-    /*  Updating the bit reversal index depending on the fft length */
-    pBitRevTable += bitRevFactor;
-  }
+      /*  Updating the bit reversal index depending on the fft length */
+      pBitRevTable += bitRevFactor;
+   }
 }
 
 
@@ -171,52 +191,52 @@ void arm_bitreversal_q31(
    * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
    * @param[in]      *pBitRevTab  points to bit reversal table.   
    * @return none.   
- */
+*/
 
 void arm_bitreversal_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab)
+q15_t * pSrc16,
+uint32_t fftLen,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTab)
 {
-  q31_t *pSrc = (q31_t *) pSrc16;
-  q31_t in;
-  uint32_t fftLenBy2, fftLenBy2p1;
-  uint32_t i, j;
+   q31_t *pSrc = (q31_t *) pSrc16;
+   q31_t in;
+   uint32_t fftLenBy2, fftLenBy2p1;
+   uint32_t i, j;
 
-  /*  Initializations */
-  j = 0u;
-  fftLenBy2 = fftLen / 2u;
-  fftLenBy2p1 = (fftLen / 2u) + 1u;
+   /*  Initializations */
+   j = 0u;
+   fftLenBy2 = fftLen / 2u;
+   fftLenBy2p1 = (fftLen / 2u) + 1u;
 
-  /* Bit Reversal Implementation */
-  for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-  {
-    if(i < j)
-    {
-      /*  pSrc[i] <-> pSrc[j]; */
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[i];
-      pSrc[i] = pSrc[j];
-      pSrc[j] = in;
+   /* Bit Reversal Implementation */
+   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
+   {
+      if(i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         /*  pSrc[i+1u] <-> pSrc[j+1u] */
+         in = pSrc[i];
+         pSrc[i] = pSrc[j];
+         pSrc[j] = in;
 
-      /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
-      /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
-      in = pSrc[i + fftLenBy2p1];
-      pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
-      pSrc[j + fftLenBy2p1] = in;
-    }
+         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
+         /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
+         in = pSrc[i + fftLenBy2p1];
+         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
+         pSrc[j + fftLenBy2p1] = in;
+      }
 
-    /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
-    /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
-    in = pSrc[i + 1u];
-    pSrc[i + 1u] = pSrc[j + fftLenBy2];
-    pSrc[j + fftLenBy2] = in;
+      /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
+      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
+      in = pSrc[i + 1u];
+      pSrc[i + 1u] = pSrc[j + fftLenBy2];
+      pSrc[j + fftLenBy2] = in;
 
-    /*  Reading the index for the bit reversal */
-    j = *pBitRevTab;
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
 
-    /*  Updating the bit reversal index depending on the fft length  */
-    pBitRevTab += bitRevFactor;
-  }
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal2.S b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal2.S
new file mode 100644
index 0000000000..7a2885b1e6
--- /dev/null
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_bitreversal2.S
@@ -0,0 +1,148 @@
+;/* ----------------------------------------------------------------------    
+;* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
+;*    
+;* $Date:        17. January 2013  
+;* $Revision: 	V1.4.1  
+;*    
+;* Project: 	    CMSIS DSP Library    
+;* Title:	    arm_bitreversal2.S   
+;*    
+;* Description:	This is the arm_bitreversal_32 function done in
+;*                assembly for maximum speed.  This function is called
+;*                after doing an fft to reorder the output.  The function
+;*                is loop unrolled by 2.
+;*    
+;* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+;*  
+;* Redistribution and use in source and binary forms, with or without 
+;* modification, are permitted provided that the following conditions
+;* are met:
+;*   - Redistributions of source code must retain the above copyright
+;*     notice, this list of conditions and the following disclaimer.
+;*   - Redistributions in binary form must reproduce the above copyright
+;*     notice, this list of conditions and the following disclaimer in
+;*     the documentation and/or other materials provided with the 
+;*     distribution.
+;*   - Neither the name of ARM LIMITED nor the names of its contributors
+;*     may be used to endorse or promote products derived from this
+;*     software without specific prior written permission.
+;*
+;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+;* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+;* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+;* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+;* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+;* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+;* POSSIBILITY OF SUCH DAMAGE.   
+;* -------------------------------------------------------------------- */
+#if defined(__CC_ARM) //Keil
+	#define CODESECT AREA     ||.text||, CODE, READONLY, ALIGN=2
+	#define LABEL
+#elif defined(__IASMARM__) //IAR
+	#define CODESECT SECTION `.text`:CODE
+	#define PROC 
+	#define LABEL 
+	#define ENDP
+	#define EXPORT PUBLIC
+#elif defined (__GNUC__) //GCC
+	.syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	#define THUMB .thumb
+	#define CODESECT .section text
+	#define EXPORT .global
+	#define PROC :
+	#define LABEL :
+	#define ENDP
+	#define END
+#endif
+
+	CODESECT
+	THUMB
+
+;/*    
+;* @brief  In-place bit reversal function.   
+;* @param[in, out] *pSrc        points to the in-place buffer of unknown 32-bit data type. 
+;* @param[in]      bitRevLen    bit reversal table length
+;* @param[in]      *pBitRevTab  points to bit reversal table.   
+;* @return none.   
+;*/
+	EXPORT arm_bitreversal_32
+   
+#if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS)
+
+arm_bitreversal_32 PROC
+	ADDS     r3,r1,#1
+	PUSH     {r4-r6}           
+	ADDS     r1,r2,#0          
+	LSRS     r3,r3,#1          
+arm_bitreversal_32_0 LABEL
+	LDRH     r2,[r1,#2]        
+	LDRH     r6,[r1,#0]    
+	ADD      r2,r0,r2   
+	ADD      r6,r0,r6   
+	LDR      r5,[r2,#0] 
+	LDR      r4,[r6,#0]
+	STR      r5,[r6,#0]
+	STR      r4,[r2,#0]    
+	LDR      r5,[r2,#4]        
+	LDR      r4,[r6,#4]       
+	STR      r5,[r6,#4]       
+	STR      r4,[r2,#4]        
+	ADDS     r1,r1,#4          
+	SUBS     r3,r3,#1          
+	BNE      arm_bitreversal_32_0
+	POP      {r4-r6}
+	BX       lr
+	ENDP
+
+#else
+
+arm_bitreversal_32 PROC
+	ADDS     r3,r1,#1
+	CMP      r3,#1
+	IT       LS
+	BXLS     lr
+	PUSH     {r4-r9}           
+	ADDS     r1,r2,#2          
+	LSRS     r3,r3,#2          
+arm_bitreversal_32_0 LABEL       ;/* loop unrolled by 2 */
+	LDRH     r8,[r1,#4]        
+	LDRH     r9,[r1,#2]  
+	LDRH     r2,[r1,#0]        
+	LDRH     r12,[r1,#-2]    
+	ADD      r8,r0,r8   
+	ADD      r9,r0,r9    
+	ADD      r2,r0,r2   
+	ADD      r12,r0,r12   
+	LDR      r7,[r9,#0] 
+	LDR      r6,[r8,#0]
+	LDR      r5,[r2,#0] 
+	LDR      r4,[r12,#0]
+	STR      r6,[r9,#0]
+	STR      r7,[r8,#0] 
+	STR      r5,[r12,#0]
+	STR      r4,[r2,#0]      
+	LDR      r7,[r9,#4]        
+	LDR      r6,[r8,#4] 
+	LDR      r5,[r2,#4]        
+	LDR      r4,[r12,#4]           
+	STR      r6,[r9,#4]       
+	STR      r7,[r8,#4]   
+	STR      r5,[r12,#4]       
+	STR      r4,[r2,#4]        
+	ADDS     r1,r1,#8          
+	SUBS     r3,r3,#1          
+	BNE      arm_bitreversal_32_0
+	POP      {r4-r9}
+	BX       lr
+	ENDP
+   
+#endif
+   
+	END
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_f32.c
new file mode 100644
index 0000000000..8a13dfa95b
--- /dev/null
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_f32.c
@@ -0,0 +1,616 @@
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
+*    
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_f32.c   
+*    
+* Description:	Combined Radix Decimation in Frequency CFFT Floating point processing function
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
+* -------------------------------------------------------------------- */
+
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+extern void arm_radix8_butterfly_f32(
+  float32_t * pSrc,
+  uint16_t fftLen,
+  const float32_t * pCoef,
+  uint16_t twidCoefModifier);
+
+extern void arm_bitreversal_32(
+		uint32_t * pSrc,
+		const uint16_t bitRevLen,
+		const uint16_t * pBitRevTable);
+
+/**   
+* @ingroup groupTransforms   
+*/
+
+/**   
+* @defgroup ComplexFFT Complex FFT Functions   
+*   
+* \par
+* The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+* Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
+* than the DFT, especially for long lengths.
+* The algorithms described in this section
+* operate on complex data.  A separate set of functions is devoted to handling
+* of real sequences.
+* \par
+* There are separate algorithms for handling floating-point, Q15, and Q31 data
+* types.  The algorithms available for each data type are described next.
+* \par
+* The FFT functions operate in-place.  That is, the array holding the input data
+* will also be used to hold the corresponding result.  The input data is complex
+* and contains 2*fftLen interleaved values as shown below.
+* 
 {real[0], imag[0], real[1], imag[1],..} 

+* The FFT result will be contained in the same array and the frequency domain
+* values will have the same interleaving.
+*
+* \par Floating-point
+* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
+* stages are performed along with a single radix-2 or radix-4 stage, as needed.
+* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+* a different twiddle factor table.  
+* \par
+* The function uses the standard FFT definition and output values may grow by a
+* factor of fftLen when computing the forward transform.  The
+* inverse transform includes a scale of 1/fftLen as part of the
+* calculation and this matches the textbook definition of the inverse FFT.
+* \par
+* Preinitialized data structures containing twiddle factors and bit reversal
+* tables are provided and defined in arm_const_structs.h.  Include 
+* this header in your function and then pass one of the constant structures as 
+* an argument to arm_cfft_f32.  For example:
+* \par
+* arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)
+* \par
+* computes a 64-point inverse complex FFT including bit reversal.
+* The data structures are treated as constant data and not modified during the
+* calculation.  The same data structure can be reused for multiple transforms
+* including mixing forward and inverse transforms.
+* \par
+* Earlier releases of the library provided separate radix-2 and radix-4
+* algorithms that operated on floating-point data.  These functions are still
+* provided but are deprecated.  The older functions are slower and less general
+* than the new functions.
+* \par
+* An example of initialization of the constants for the arm_cfft_f32 function follows:
+* \par
+* const static arm_cfft_instance_f32 *S;
+* ...
+*		switch (length) {
+*    		case 16:
+*    			S = & arm_cfft_sR_f32_len16;
+*    		break;
+*    		case 32:
+*    			S = & arm_cfft_sR_f32_len32;
+*    		break;
+*			case 64:
+*    			S = & arm_cfft_sR_f32_len64;
+*    		break;
+*    		case 128:
+*    			S = & arm_cfft_sR_f32_len128;
+*    		break;
+*    		case 256:
+*    			S = & arm_cfft_sR_f32_len256;
+*    		break;
+*    		case 512:
+*    			S = & arm_cfft_sR_f32_len512;
+*    		break;
+*    		case 1024:
+*    			S = & arm_cfft_sR_f32_len1024;
+*    		break;
+*    		case 2048:
+*    			S = & arm_cfft_sR_f32_len2048;
+*    		break;
+*    		case 4096:
+*    			S = & arm_cfft_sR_f32_len4096;
+*    		break;
+*			}
+* \par Q15 and Q31
+* The library provides radix-2 and radix-4 FFT algorithms for fixed-point data.  The
+* radix-2 algorithm supports lengths of [16, 32, 64, ..., 4096].  The radix-4
+* algorithm supports lengths of [16, 64, 256, ..., 4096].  When possible, you
+* should use the radix-4 algorithm since it is faster than the radix-2 of the
+* same length.
+* \par
+* The forward FFTs include scaling in order to prevent results from overflowing.
+* Intermediate results are scaled down during each butterfly stage.  In the
+* radix-2 algorithm, a scale of 0.5 is applied during each butterfly.  In the
+* radix-4 algorithm, a scale of 0.25 is applied.  The scaling applies to both
+* the forward and the inverse FFTs.  Thus the forward FFT contains an additional
+* scale factor of 1/fftLen as compared to the standard textbook
+* definition of the FFT.  The inverse FFT also scales down during each butterfly
+* stage and this corresponds to the standard textbook definition.
+* \par
+* A separate instance structure must be defined for each transform used but
+* twiddle factor and bit reversal tables can be reused.
+* \par 
+* There is also an associated initialization function for each data type.   
+* The initialization function performs the following operations:   
+* - Sets the values of the internal structure fields.   
+* - Initializes twiddle factor table and bit reversal table pointers.
+* \par   
+* Use of the initialization function is optional.   
+* However, if the initialization function is used, then the instance structure 
+* cannot be placed into a const data section. To place an instance structure 
+* into a const data section, the instance structure should be manually 
+* initialized as follows:
+* 
   
+*arm_cfft_radix2_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
+*arm_cfft_radix2_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
+*arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
+*arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
+*arm_cfft_instance_f32 S = {fftLen, pTwiddle, pBitRevTable, bitRevLength};
+* 
   
+* \par   
+* where fftLen length of CFFT/CIFFT; ifftFlag Flag for
+* selection of forward or inverse transform.  When ifftFlag is set the inverse
+* transform is calculated.
+* bitReverseFlag Flag for selection of output order (Set bitReverseFlag to output in normal order otherwise output in bit reversed order);    
+* pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the bit reversal table.   
+* twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;    
+* pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.   
+* onebyfftLen value of 1/fftLen to calculate CIFFT;
+* \par
+* The Q15 and Q31 FFT functions use a large bit reversal and twiddle factor
+* table.  The tables are defined for the maximum length transform and a subset
+* of the coefficients are used in shorter transforms.
+* 
+*/
+
+void arm_cfft_radix8by2_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
+{
+   uint32_t    L  = S->fftLen;
+   float32_t * pCol1, * pCol2, * pMid1, * pMid2;
+   float32_t * p2 = p1 + L;
+   const float32_t * tw = (float32_t *) S->pTwiddle;
+   float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
+   float32_t m0, m1, m2, m3;
+   uint32_t l;
+
+   pCol1 = p1;
+   pCol2 = p2;
+
+   //    Define new length
+   L >>= 1;
+   //    Initialize mid pointers
+   pMid1 = p1 + L;
+   pMid2 = p2 + L;
+
+   // do two dot Fourier transform
+   for ( l = L >> 2; l > 0; l-- ) 
+   {
+      t1[0] = p1[0];
+      t1[1] = p1[1];
+      t1[2] = p1[2];
+      t1[3] = p1[3];
+
+      t2[0] = p2[0];
+      t2[1] = p2[1];
+      t2[2] = p2[2];
+      t2[3] = p2[3];
+
+      t3[0] = pMid1[0];
+      t3[1] = pMid1[1];
+      t3[2] = pMid1[2];
+      t3[3] = pMid1[3];
+
+      t4[0] = pMid2[0];
+      t4[1] = pMid2[1];
+      t4[2] = pMid2[2];
+      t4[3] = pMid2[3];
+
+      *p1++ = t1[0] + t2[0];
+      *p1++ = t1[1] + t2[1];
+      *p1++ = t1[2] + t2[2];
+      *p1++ = t1[3] + t2[3];    // col 1
+
+      t2[0] = t1[0] - t2[0];
+      t2[1] = t1[1] - t2[1];
+      t2[2] = t1[2] - t2[2];
+      t2[3] = t1[3] - t2[3];    // for col 2
+
+      *pMid1++ = t3[0] + t4[0];
+      *pMid1++ = t3[1] + t4[1];
+      *pMid1++ = t3[2] + t4[2];
+      *pMid1++ = t3[3] + t4[3]; // col 1
+
+      t4[0] = t4[0] - t3[0];
+      t4[1] = t4[1] - t3[1];
+      t4[2] = t4[2] - t3[2];
+      t4[3] = t4[3] - t3[3];    // for col 2
+
+      twR = *tw++;
+      twI = *tw++;
+
+      // multiply by twiddle factors
+      m0 = t2[0] * twR;
+      m1 = t2[1] * twI;
+      m2 = t2[1] * twR;
+      m3 = t2[0] * twI;
+      
+      // R  =  R  *  Tr - I * Ti
+      *p2++ = m0 + m1;
+      // I  =  I  *  Tr + R * Ti
+      *p2++ = m2 - m3;
+      
+      // use vertical symmetry
+	  //  0.9988 - 0.0491i <==> -0.0491 - 0.9988i
+      m0 = t4[0] * twI;
+      m1 = t4[1] * twR;
+      m2 = t4[1] * twI;
+      m3 = t4[0] * twR;
+      
+      *pMid2++ = m0 - m1;
+      *pMid2++ = m2 + m3;
+
+      twR = *tw++;
+      twI = *tw++;
+      
+      m0 = t2[2] * twR;
+      m1 = t2[3] * twI;
+      m2 = t2[3] * twR;
+      m3 = t2[2] * twI;
+      
+      *p2++ = m0 + m1;
+      *p2++ = m2 - m3;
+         
+      m0 = t4[2] * twI;
+      m1 = t4[3] * twR;
+      m2 = t4[3] * twI;
+      m3 = t4[2] * twR;
+      
+      *pMid2++ = m0 - m1;
+      *pMid2++ = m2 + m3;
+   }
+
+   // first col
+   arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 2u);
+   // second col
+   arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 2u);
+   
+}
+
+void arm_cfft_radix8by4_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
+{
+   uint32_t    L  = S->fftLen >> 1;
+   float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
+	const float32_t *tw2, *tw3, *tw4;
+   float32_t * p2 = p1 + L;
+   float32_t * p3 = p2 + L;
+   float32_t * p4 = p3 + L;
+   float32_t t2[4], t3[4], t4[4], twR, twI;
+   float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
+   float32_t m0, m1, m2, m3;
+   uint32_t l, twMod2, twMod3, twMod4;
+
+   pCol1 = p1;         // points to real values by default
+   pCol2 = p2;
+   pCol3 = p3;
+   pCol4 = p4;
+   pEnd1 = p2 - 1;     // points to imaginary values by default
+   pEnd2 = p3 - 1;
+   pEnd3 = p4 - 1;
+   pEnd4 = pEnd3 + L;
+   
+   tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
+   
+   L >>= 1;
+
+   // do four dot Fourier transform
+
+   twMod2 = 2;
+   twMod3 = 4;
+   twMod4 = 6;
+
+   // TOP
+   p1ap3_0 = p1[0] + p3[0];
+   p1sp3_0 = p1[0] - p3[0];
+   p1ap3_1 = p1[1] + p3[1];
+   p1sp3_1 = p1[1] - p3[1];
+
+   // col 2
+   t2[0] = p1sp3_0 + p2[1] - p4[1];
+   t2[1] = p1sp3_1 - p2[0] + p4[0];
+   // col 3
+   t3[0] = p1ap3_0 - p2[0] - p4[0];
+   t3[1] = p1ap3_1 - p2[1] - p4[1];
+   // col 4
+   t4[0] = p1sp3_0 - p2[1] + p4[1];
+   t4[1] = p1sp3_1 + p2[0] - p4[0];
+   // col 1
+   *p1++ = p1ap3_0 + p2[0] + p4[0];
+   *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+   // Twiddle factors are ones
+   *p2++ = t2[0];
+   *p2++ = t2[1];
+   *p3++ = t3[0];
+   *p3++ = t3[1];
+   *p4++ = t4[0];
+   *p4++ = t4[1];
+   
+   tw2 += twMod2;
+   tw3 += twMod3;
+   tw4 += twMod4;
+   
+   for (l = (L - 2) >> 1; l > 0; l-- ) 
+   {
+
+      // TOP
+      p1ap3_0 = p1[0] + p3[0];
+      p1sp3_0 = p1[0] - p3[0];
+      p1ap3_1 = p1[1] + p3[1];
+      p1sp3_1 = p1[1] - p3[1];
+      // col 2
+      t2[0] = p1sp3_0 + p2[1] - p4[1];
+      t2[1] = p1sp3_1 - p2[0] + p4[0];
+      // col 3
+      t3[0] = p1ap3_0 - p2[0] - p4[0];
+      t3[1] = p1ap3_1 - p2[1] - p4[1];
+      // col 4
+      t4[0] = p1sp3_0 - p2[1] + p4[1];
+      t4[1] = p1sp3_1 + p2[0] - p4[0];
+      // col 1 - top
+      *p1++ = p1ap3_0 + p2[0] + p4[0];
+      *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+      // BOTTOM
+      p1ap3_1 = pEnd1[-1] + pEnd3[-1];
+      p1sp3_1 = pEnd1[-1] - pEnd3[-1];
+      p1ap3_0 = pEnd1[0] + pEnd3[0];
+      p1sp3_0 = pEnd1[0] - pEnd3[0];
+      // col 2
+      t2[2] = pEnd2[0]  - pEnd4[0] + p1sp3_1;
+      t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
+      // col 3
+      t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
+      t3[3] = p1ap3_0 - pEnd2[0]  - pEnd4[0];
+      // col 4
+      t4[2] = pEnd2[0]  - pEnd4[0]  - p1sp3_1;
+      t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
+      // col 1 - Bottom
+      *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];
+      *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
+
+      // COL 2
+      // read twiddle factors
+      twR = *tw2++;
+      twI = *tw2++;
+      // multiply by twiddle factors
+      //  let    Z1 = a + i(b),   Z2 = c + i(d)
+      //   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d)
+      // Top
+      m0 = t2[0] * twR;
+      m1 = t2[1] * twI;
+      m2 = t2[1] * twR;
+      m3 = t2[0] * twI;
+      
+      *p2++ = m0 + m1;
+      *p2++ = m2 - m3;
+      // use vertical symmetry col 2
+      // 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i
+      // Bottom
+      m0 = t2[3] * twI;
+      m1 = t2[2] * twR;
+      m2 = t2[2] * twI;
+      m3 = t2[3] * twR;
+      
+      *pEnd2-- = m0 - m1;
+      *pEnd2-- = m2 + m3;
+
+      // COL 3
+      twR = tw3[0];
+      twI = tw3[1];
+      tw3 += twMod3;
+      // Top
+      m0 = t3[0] * twR;
+      m1 = t3[1] * twI;
+      m2 = t3[1] * twR;
+      m3 = t3[0] * twI;
+      
+      *p3++ = m0 + m1;
+      *p3++ = m2 - m3;
+      // use vertical symmetry col 3
+      // 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i
+      // Bottom
+      m0 = -t3[3] * twR;
+      m1 = t3[2] * twI;
+      m2 = t3[2] * twR;
+      m3 = t3[3] * twI;
+      
+      *pEnd3-- = m0 - m1;
+      *pEnd3-- = m3 - m2;
+      
+      // COL 4
+      twR = tw4[0];
+      twI = tw4[1];
+      tw4 += twMod4;
+      // Top
+      m0 = t4[0] * twR;
+      m1 = t4[1] * twI;
+      m2 = t4[1] * twR;
+      m3 = t4[0] * twI;
+      
+      *p4++ = m0 + m1;
+      *p4++ = m2 - m3;
+      // use vertical symmetry col 4
+      // 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i
+      // Bottom
+      m0 = t4[3] * twI;
+      m1 = t4[2] * twR;
+      m2 = t4[2] * twI;
+      m3 = t4[3] * twR;
+      
+      *pEnd4-- = m0 - m1;
+      *pEnd4-- = m2 + m3;
+   }
+
+   //MIDDLE
+   // Twiddle factors are 
+   //  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i
+   p1ap3_0 = p1[0] + p3[0];
+   p1sp3_0 = p1[0] - p3[0];
+   p1ap3_1 = p1[1] + p3[1];
+   p1sp3_1 = p1[1] - p3[1];
+
+   // col 2
+   t2[0] = p1sp3_0 + p2[1] - p4[1];
+   t2[1] = p1sp3_1 - p2[0] + p4[0];
+   // col 3
+   t3[0] = p1ap3_0 - p2[0] - p4[0];
+   t3[1] = p1ap3_1 - p2[1] - p4[1];
+   // col 4
+   t4[0] = p1sp3_0 - p2[1] + p4[1];
+   t4[1] = p1sp3_1 + p2[0] - p4[0];
+   // col 1 - Top
+   *p1++ = p1ap3_0 + p2[0] + p4[0];
+   *p1++ = p1ap3_1 + p2[1] + p4[1];
+   
+   // COL 2
+   twR = tw2[0];
+   twI = tw2[1];
+   
+   m0 = t2[0] * twR;
+   m1 = t2[1] * twI;
+   m2 = t2[1] * twR;
+   m3 = t2[0] * twI;
+   
+   *p2++ = m0 + m1;
+   *p2++ = m2 - m3;
+      // COL 3
+   twR = tw3[0];
+   twI = tw3[1];
+   
+   m0 = t3[0] * twR;
+   m1 = t3[1] * twI;
+   m2 = t3[1] * twR;
+   m3 = t3[0] * twI;
+   
+   *p3++ = m0 + m1;
+   *p3++ = m2 - m3;
+   // COL 4
+   twR = tw4[0];
+   twI = tw4[1];
+   
+   m0 = t4[0] * twR;
+   m1 = t4[1] * twI;
+   m2 = t4[1] * twR;
+   m3 = t4[0] * twI;
+   
+   *p4++ = m0 + m1;
+   *p4++ = m2 - m3;
+
+   // first col
+   arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 4u);
+   // second col
+   arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 4u);
+   // third col
+   arm_radix8_butterfly_f32( pCol3, L, (float32_t *) S->pTwiddle, 4u);
+   // fourth col
+   arm_radix8_butterfly_f32( pCol4, L, (float32_t *) S->pTwiddle, 4u);
+
+}
+
+/**
+* @addtogroup ComplexFFT   
+* @{   
+*/
+
+/**   
+* @details   
+* @brief       Processing function for the floating-point complex FFT.
+* @param[in]      *S    points to an instance of the floating-point CFFT structure.  
+* @param[in, out] *p1   points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
+* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
+* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
+* @return none.  
+*/
+
+void arm_cfft_f32( 
+   const arm_cfft_instance_f32 * S, 
+   float32_t * p1,
+   uint8_t ifftFlag,
+   uint8_t bitReverseFlag)
+{
+
+   uint32_t  L = S->fftLen, l;
+   float32_t invL, * pSrc;
+
+  if(ifftFlag == 1u)
+  {
+	  /*  Conjugate input data  */
+	  pSrc = p1 + 1;
+	  for(l=0; lpTwiddle, 1);
+			 break;
+		}  
+
+	if( bitReverseFlag )
+		arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
+
+  if(ifftFlag == 1u)
+  {
+	  invL = 1.0f/(float32_t)L;
+	  /*  Conjugate and scale output data */
+	  pSrc = p1;
+	  for(l=0; l2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.   
- * \par  
- * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.   
- * 
 {real[0], imag[0], real[1], imag[1],..} 
   
- *   
- * \par Lengths supported by the transform:  
- * \par   
- * Internally, the function utilize a radix-2 decimation in frequency(DIF) algorithm   
- * and the size of the FFT supported are of the lengths [16, 32, 64, 128, 256, 512, 1024, 2048, 4096].  
- *    
- *   
- * \par Algorithm:   
- *   
- * Complex Fast Fourier Transform:   
- * \par    
- * Input real and imaginary data:   
- * 
   
- * x(n) = xa + j * ya   
- * x(n+N/2 ) = xb + j * yb   
- * 
   
- * where N is length of FFT   
- * \par   
- * Output real and imaginary data:   
- * 
   
- * X(2r) = xa'+ j * ya'   
- * X(2r+1) = xb'+ j * yb'   
- * 
   
- * \par   
- * Twiddle factors for radix-2 FFT:   
- * 
   
- * Wn = cosVal + j * (- sinVal)   
- * 
   
- *   
- * \par   
- * \image html CFFT_Radix2.gif "Radix-2 Decimation-in Frequency Complex Fast Fourier Transform"   
- *   
- * \par   
- * Output from Radix-2 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.   
- * \par   
- *  Butterfly CFFT equations:   
- * 
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal + (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal - (xa-xb) * sinVal   
- * 
   
- *   
- *   
- * Complex Inverse Fast Fourier Transform:   
- * \par   
- * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.   
- *   
- * \par   
- *  Modified Butterfly CIFFT equations:   
- * 
   
- * xa' = xa + xb  
- * ya' = ya + yb  
- * xb' = (xa-xb)* cosVal - (ya-yb) * sinVal   
- * yb' = (ya-yb)* cosVal + (xa-xb) * sinVal   
- * 
   
- *   
- * \par Instance Structure   
- * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused.   
- * There are separate instance structure declarations for each of the 3 supported data types.   
- *   
- * \par Initialization Functions   
- * There is also an associated initialization function for each data type.   
- * The initialization function performs the following operations:   
- * - Sets the values of the internal structure fields.   
- * - Initializes twiddle factor table and bit reversal table pointers   
- * \par   
- * Use of the initialization function is optional.   
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.   
- * To place an instance structure into a const data section, the instance structure must be manually initialized.   
- * Manually initialize the instance structure as follows:   
- * 
   
- *arm_cfft_radix2_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};   
- *arm_cfft_radix2_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- *arm_cfft_radix2_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};   
- * 
   
- * \par   
- * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);   
- * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);    
- * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.   
- * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;    
- * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.   
- * onebyfftLen value of 1/fftLen to calculate CIFFT;   
- *  
- * \par Fixed-Point Behavior   
- * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.   
- * Refer to the function specific documentation below for usage guidelines.   
- */
-
+* @ingroup groupTransforms   
+*/
 
 /**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
+* @addtogroup ComplexFFT   
+* @{   
+*/
 
 /**   
- * @details   
- * @brief Processing function for the floating-point Radix-2 CFFT/CIFFT.  
- * @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
+* @details
+* @brief Radix-2 CFFT/CIFFT.
+* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
+* in the future.
+* @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.  
+* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
+* @return none.
+*/
 
 void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc)
+const arm_cfft_radix2_instance_f32 * S,
+float32_t * pSrc)
 {
 
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-2  */
-    arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier, S->onebyfftLen);
-  }
-  else
-  {
-    /*  Complex FFT radix-2  */
-    arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
+   if(S->ifftFlag == 1u)
+   {
+      /*  Complex IFFT radix-2  */
+      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /*  Complex FFT radix-2  */
+      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier);
+   }
 
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
+   if(S->bitReverseFlag == 1u)
+   {
+      /*  Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
 
 }
 
 
 /**    
- * @} end of Radix2_CFFT_CIFFT group    
- */
+* @} end of ComplexFFT group    
+*/
 
 
 
@@ -183,329 +117,369 @@ void arm_cfft_radix2_f32(
 ** ------------------------------------------------------------------- */
 
 /*    
- * @brief  Core function for the floating-point CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to the twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
+* @brief  Core function for the floating-point CFFT butterfly process.   
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
+* @param[in]      fftLen           length of the FFT.   
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+* @return none.   
+*/
 
 void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier)
+float32_t * pSrc,
+uint32_t fftLen,
+float32_t * pCoef,
+uint16_t twidCoefModifier)
 {
 
-  int i, j, k, l;
-  int n1, n2, ia;
-  float32_t xt, yt, cosVal, sinVal;
+   uint32_t i, j, k, l;
+   uint32_t n1, n2, ia;
+   float32_t xt, yt, cosVal, sinVal;
+   float32_t p0, p1, p2, p3;
+   float32_t a0, a1;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
-  /*  Initializations for the first stage */
-  n2 = fftLen;
+   /*  Initializations for the first stage */
+   n2 = fftLen >> 1;
+   ia = 0;
+   i = 0;
 
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    /*  Twiddle coefficients index modifier */
-    ia = ia + twidCoefModifier;
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i + 0], pSrc[i + fftLen/1] */
-    l = i + n2;
-
-    /*  Butterfly implementation */
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-    pSrc[2u * l] = xt * cosVal + yt * sinVal;
-
-    pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal;
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
+   // loop for groups 
+   for (k = n2; k > 0; k--)
+   {
       cosVal = pCoef[ia * 2];
       sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
 
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
+      /*  Twiddle coefficients index modifier */
+      ia += twidCoefModifier;
+
+      /*  index calculation for the input as, */
+      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
+      l = i + n2;
+
+      /*  Butterfly implementation */
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+      
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;  
+      
+      pSrc[2 * i]     = a0;   
+      pSrc[2 * i + 1] = a1;       
+      
+      pSrc[2 * l]     = p0 + p1;
+      pSrc[2 * l + 1] = p2 - p3;
+      
+      i++;
+   }                             // groups loop end 
+
+   twidCoefModifier <<= 1u;
+
+   // loop for stage 
+   for (k = n2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups 
+      j = 0;
+      do
       {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
 
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+         // loop for butterfly 
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
 
-        pSrc[2u * l] = xt * cosVal + yt * sinVal;
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+            
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;  
+            
+            pSrc[2 * i] = a0;   
+            pSrc[2 * i + 1] = a1;       
+            
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+            
+            i += n1;
+         } while( i < fftLen );                        // butterfly loop end 
+         j++;
+      } while( j < n2);                          // groups loop end 
+      twidCoefModifier <<= 1u;
+   }                             // stages loop end 
 
-        pSrc[2u * l + 1u] = yt * cosVal - xt * sinVal;
+   // loop for butterfly 
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
 
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // groups loop end 
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+      
+      pSrc[2 * i] = a0;   
+      pSrc[2 * i + 1] = a1;
+      pSrc[2 * i + 2] = xt;
+      pSrc[2 * i + 3] = yt;
+   }                             // groups loop end 
 
 #else
+ 
+   n2 = fftLen;
 
-  //N = fftLen; 
-  n2 = fftLen;
+   // loop for stage 
+   for (k = fftLen; k > 1; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
 
-  // loop for stage 
-  for (k = fftLen; k > 1; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
+      // loop for groups 
+      j = 0;
+      do
       {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
 
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+         // loop for butterfly 
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
 
-        pSrc[2 * l] = (cosVal * xt + sinVal * yt);      // >> 15; 
-        pSrc[2 * l + 1] = (cosVal * yt - sinVal * xt);  // >> 15; 
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+            
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;  
+            
+            pSrc[2 * i] = a0;   
+            pSrc[2 * i + 1] = a1;       
+            
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+            
+            i += n1;
+         } while(i < fftLen);
+         j++;
+      } while(j < n2);
+      twidCoefModifier <<= 1u;
+   }
 
-      }
-    }
-    twidCoefModifier = twidCoefModifier << 1u;
-  }
-
-#endif //    #ifndef ARM_MATH_CM0
+#endif //    #ifndef ARM_MATH_CM0_FAMILY
 
 }
 
 
 void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen)
+float32_t * pSrc,
+uint32_t fftLen,
+float32_t * pCoef,
+uint16_t twidCoefModifier,
+float32_t onebyfftLen)
 {
 
-  int i, j, k, l;
-  int n1, n2, ia;
-  float32_t xt, yt, cosVal, sinVal;
+   uint32_t i, j, k, l;
+   uint32_t n1, n2, ia;
+   float32_t xt, yt, cosVal, sinVal;
+   float32_t p0, p1, p2, p3;
+   float32_t a0, a1;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
-  //N = fftLen; 
-  n2 = fftLen;
+   n2 = fftLen >> 1;
+   ia = 0;
 
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-    pSrc[2u * l] = xt * cosVal - yt * sinVal;
-
-    pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
+   // loop for groups 
+   for (i = 0; i < n2; i++)
+   {
       cosVal = pCoef[ia * 2];
       sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
+      ia += twidCoefModifier;
 
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
+      l = i + n2;
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+      
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;  
+      
+      pSrc[2 * i] = a0;   
+      pSrc[2 * i + 1] = a1;       
+      
+      pSrc[2 * l]     = p0 - p1;
+      pSrc[2 * l + 1] = p2 + p3;  
+   }                             // groups loop end 
+
+   twidCoefModifier <<= 1u;
+
+   // loop for stage 
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups 
+      j = 0;
+      do
       {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
 
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+         // loop for butterfly 
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
 
-        pSrc[2u * l] = xt * cosVal - yt * sinVal;
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+            
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;  
+            
+            pSrc[2 * i] = a0;   
+            pSrc[2 * i + 1] = a1;       
+            
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3; 
 
-        pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
+            i += n1;
+         } while( i < fftLen );                 // butterfly loop end 
+         j++;
+      } while(j < n2);                      // groups loop end 
 
-      }                         // butterfly loop end 
+      twidCoefModifier <<= 1u;
+   }                             // stages loop end 
 
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen;
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen;
-
-    pSrc[2u * l] = xt * onebyfftLen;
-
-    pSrc[2u * l + 1u] = yt * onebyfftLen;
-
-  }                             // butterfly loop end 
+   // loop for butterfly 
+   for (i = 0; i < fftLen; i += 2)
+   {   
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
+      
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+      
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen; 
+      
+      pSrc[2 * i] = p0;
+      pSrc[2 * i + 1] = p1;  
+      pSrc[2 * i + 2] = p2;       
+      pSrc[2 * i + 3] = p3;
+   }                             // butterfly loop end 
 
 #else
 
-  //N = fftLen; 
-  n2 = fftLen;
+   n2 = fftLen;
 
-  // loop for stage 
-  for (k = fftLen; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
+   // loop for stage 
+   for (k = fftLen; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
 
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
+      // loop for groups 
+      j = 0;
+      do
       {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = pSrc[2 * i] + pSrc[2 * l];
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
 
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+         // loop for butterfly 
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
 
-        pSrc[2u * l] = xt * cosVal - yt * sinVal;
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+            
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;  
+            
+            pSrc[2 * i] = a0;   
+            pSrc[2 * i + 1] = a1;       
+            
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3;  
+            
+            i += n1;
+         } while( i < fftLen );                    // butterfly loop end 
+         j++;
+      } while( j < n2 );                      // groups loop end 
 
-        pSrc[2u * l + 1u] = yt * cosVal + xt * sinVal;
+      twidCoefModifier = twidCoefModifier << 1u;
+   }                             // stages loop end 
 
-      }                         // butterfly loop end 
+   n1 = n2;
+   n2 = n2 >> 1;
 
-    }                           // groups loop end 
+   // loop for butterfly 
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen; 
+      
+      pSrc[2 * i] = p0;
+      pSrc[2u * l] = p2;
+     
+      pSrc[2 * i + 1] = p1;    
+      pSrc[2u * l + 1u] = p3;
+   }                             // butterfly loop end 
 
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) * onebyfftLen;
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) * onebyfftLen;
-
-    pSrc[2u * l] = xt * onebyfftLen;
-
-    pSrc[2u * l + 1u] = yt * onebyfftLen;
-
-  }                             // butterfly loop end 
-
-#endif //      #ifndef ARM_MATH_CM0
+#endif //      #ifndef ARM_MATH_CM0_FAMILY
 
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c
index 76c781fc32..81932bc1e5 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:	    arm_cfft_radix4_init_f32.c   
@@ -11,26 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.3 2010/11/29  
-*    Re-organized the CMSIS folders and updated documentation.   
-*    
-* Version 1.0.2 2010/11/11   
-*    Documentation updated.    
-*   
-* Version 1.0.1 2010/10/05    
-*    Production release and review comments incorporated.   
-*   
-* Version 1.0.0 2010/09/20    
-*    Production release and review comments incorporated.   
-*   
-* Version 0.0.5  2010/04/26    
-* 	 incorporated review comments and updated with latest CMSIS layer   
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 
@@ -42,12 +47,14 @@
  */
 
 /**   
- * @addtogroup Radix2_CFFT_CIFFT   
+ * @addtogroup ComplexFFT   
  * @{   
  */
 
 /**   
 * @brief  Initialization function for the floating-point CFFT/CIFFT.  
+* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
+* in the future.
 * @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.  
 * @param[in]     fftLen         length of the FFT.  
 * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
@@ -194,5 +201,5 @@ arm_status arm_cfft_radix2_init_f32(
 }
 
 /**   
- * @} end of Radix2_CFFT_CIFFT group   
+ * @} end of ComplexFFT group   
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c
index b6ba22c186..e96ba3f16b 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1   
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix2_init_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -45,7 +47,7 @@
 
 
 /**    
- * @addtogroup Radix2_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
@@ -182,5 +184,5 @@ arm_status arm_cfft_radix2_init_q15(
 }
 
 /**    
- * @} end of Radix2_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c
index 94eeeb00ae..d2e84d5862 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1  
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:	    arm_cfft_radix2_init_q31.c   
@@ -11,9 +11,31 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 
@@ -25,7 +47,7 @@
  */
 
 /**   
- * @addtogroup Radix2_CFFT_CIFFT   
+ * @addtogroup ComplexFFT   
  * @{   
  */
 
@@ -160,5 +182,5 @@ arm_status arm_cfft_radix2_init_q31(
 }
 
 /**   
- * @} end of Radix2_CFFT_CIFFT group   
+ * @} end of ComplexFFT group   
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c
index c385091c7a..0caf6021d9 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:	    arm_cfft_radix2_q15.c   
@@ -12,30 +12,59 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
+void arm_radix2_butterfly_q15(
+  q15_t * pSrc,
+  uint32_t fftLen,
+  q15_t * pCoef,
+  uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_q15(
+  q15_t * pSrc,
+  uint32_t fftLen,
+  q15_t * pCoef,
+  uint16_t twidCoefModifier);
+	
+void arm_bitreversal_q15(
+  q15_t * pSrc,
+  uint32_t fftLen,
+  uint16_t bitRevFactor,
+  uint16_t * pBitRevTab);
+
 /**   
  * @ingroup groupTransforms   
  */
 
 /**   
- * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions   
- *   
- * \par   
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).   
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- */
-
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
+ * @addtogroup ComplexFFT   
  * @{   
  */
 
@@ -67,7 +96,7 @@ void arm_cfft_radix2_q15(
 }
 
 /**   
- * @} end of Radix2_CFFT_CIFFT group   
+ * @} end of ComplexFFT group   
  */
 
 void arm_radix2_butterfly_q15(
@@ -76,10 +105,10 @@ void arm_radix2_butterfly_q15(
   q15_t * pCoef,
   uint16_t twidCoefModifier)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
-  int i, j, k, l;
-  int n1, n2, ia;
+  unsigned i, j, k, l;
+  unsigned n1, n2, ia;
   q15_t in;
   q31_t T, S, R;
   q31_t coeff, out1, out2;
@@ -283,8 +312,8 @@ void arm_radix2_butterfly_q15(
 
 #else
 
-  int i, j, k, l;
-  int n1, n2, ia;
+  unsigned i, j, k, l;
+  unsigned n1, n2, ia;
   q15_t xt, yt, cosVal, sinVal;
 
 
@@ -394,7 +423,7 @@ void arm_radix2_butterfly_q15(
 
   twidCoefModifier = twidCoefModifier << 1u;
 
-#endif //             #ifndef ARM_MATH_CM0
+#endif //             #ifndef ARM_MATH_CM0_FAMILY
 
 }
 
@@ -405,10 +434,10 @@ void arm_radix2_butterfly_inverse_q15(
   q15_t * pCoef,
   uint16_t twidCoefModifier)
 {
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
-  int i, j, k, l;
-  int n1, n2, ia;
+  unsigned i, j, k, l;
+  unsigned n1, n2, ia;
   q15_t in;
   q31_t T, S, R;
   q31_t coeff, out1, out2;
@@ -603,8 +632,8 @@ void arm_radix2_butterfly_inverse_q15(
 #else
 
 
-  int i, j, k, l;
-  int n1, n2, ia;
+  unsigned i, j, k, l;
+  unsigned n1, n2, ia;
   q15_t xt, yt, cosVal, sinVal;
 
   //N = fftLen; 
@@ -707,6 +736,6 @@ void arm_radix2_butterfly_inverse_q15(
   }                             // groups loop end 
 
 
-#endif //             #ifndef ARM_MATH_CM0
+#endif //             #ifndef ARM_MATH_CM0_FAMILY
 
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c
index 5b950c39c6..bda6a39063 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix2_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------   
-* Copyright (C) 2010 ARM Limited. All rights reserved.   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
 *   
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *   
 * Project: 	    CMSIS DSP Library   
 * Title:	    arm_cfft_radix2_q31.c   
@@ -12,299 +12,339 @@
 *   
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 0.0.3  2010/03/10    
-*    Initial version   
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @defgroup Radix2_CFFT_CIFFT Radix-2 Complex FFT Functions   
- *   
- * \par   
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).   
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- */
-
-
-/**   
- * @addtogroup Radix2_CFFT_CIFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the fixed-point CFFT/CIFFT.  
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q31(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
- * @} end of Radix2_CFFT_CIFFT group   
- */
-
 void arm_radix2_butterfly_q31(
   q31_t * pSrc,
   uint32_t fftLen,
   q31_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-
-  int i, j, k, l;
-  int n1, n2, ia;
-  q31_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-    xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-    pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
-
-    yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-    pSrc[2 * i + 1] =
-      ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
-
-    pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) +
-                    ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-    pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) -
-                         ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) +
-                        ((int32_t) (((q63_t) yt * sinVal) >> 32)));
-
-        pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) -
-                             ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-    i += n1;
-    l = i + n2;
-
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // butterfly loop end 
-
-}
-
+  uint16_t twidCoefModifier);
 
 void arm_radix2_butterfly_inverse_q31(
   q31_t * pSrc,
   uint32_t fftLen,
   q31_t * pCoef,
-  uint16_t twidCoefModifier)
+  uint16_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+  q31_t * pSrc,
+  uint32_t fftLen,
+  uint16_t bitRevFactor,
+  uint16_t * pBitRevTab);
+
+/**   
+* @ingroup groupTransforms   
+*/
+
+/**   
+* @addtogroup ComplexFFT   
+* @{   
+*/
+
+/**   
+* @details   
+* @brief Processing function for the fixed-point CFFT/CIFFT.  
+* @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
+* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
+* @return none.  
+*/
+
+void arm_cfft_radix2_q31(
+const arm_cfft_radix2_instance_q31 * S,
+q31_t * pSrc)
 {
 
-  int i, j, k, l;
-  int n1, n2, ia;
-  q31_t xt, yt, cosVal, sinVal;
+   if(S->ifftFlag == 1u)
+   {
+      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
+   else
+   {
+      arm_radix2_butterfly_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
 
-  //N = fftLen; 
-  n2 = fftLen;
+   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+}
 
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
+/**   
+* @} end of ComplexFFT group   
+*/
 
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
+void arm_radix2_butterfly_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint16_t twidCoefModifier)
+{
 
-    l = i + n2;
-    xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
-    pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
+   unsigned i, j, k, l, m;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
 
-    yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
-    pSrc[2 * i + 1] =
-      ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
+   //N = fftLen; 
+   n2 = fftLen;
 
-    pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) -
-                    ((int32_t) (((q63_t) yt * sinVal) >> 32)));
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
 
-    pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) +
-                         ((int32_t) (((q63_t) xt * sinVal) >> 32)));
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
+   // loop for groups 
+   for (i = 0; i < n2; i++)
+   {
       cosVal = pCoef[ia * 2];
       sinVal = pCoef[(ia * 2) + 1];
       ia = ia + twidCoefModifier;
 
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
+      
+      yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multAcc_32x32_keep32_R(p0, yt, sinVal); 
+      multSub_32x32_keep32_R(p1, xt, sinVal);
+      
+      pSrc[2u * l] = p0;
+      pSrc[2u * l + 1u] = p1;
+
+   }                             // groups loop end 
+
+   twidCoefModifier <<= 1u;
+
+   // loop for stage 
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups 
+      for (j = 0; j < n2; j++)
       {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
 
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
+         // loop for butterfly 
+         i = j;
+         m = fftLen / n1;
+         do
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
+            
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
 
-        pSrc[2u * l] = (((int32_t) (((q63_t) xt * cosVal) >> 32)) -
-                        ((int32_t) (((q63_t) yt * sinVal) >> 32)));
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multAcc_32x32_keep32_R(p0, yt, sinVal);
+            multSub_32x32_keep32_R(p1, xt, sinVal);
+            
+            pSrc[2u * l] = p0;
+            pSrc[2u * l + 1u] = p1;
+            i += n1;
+            m--;
+         } while( m > 0);                   // butterfly loop end 
 
-        pSrc[2u * l + 1u] = (((int32_t) (((q63_t) yt * cosVal) >> 32)) +
-                             ((int32_t) (((q63_t) xt * sinVal) >> 32)));
+      }                           // groups loop end 
 
-      }                         // butterfly loop end 
+      twidCoefModifier <<= 1u;
+   }                             // stages loop end 
 
-    }                           // groups loop end 
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
 
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
 
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
+   // loop for butterfly 
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
 
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-  ia = ia + twidCoefModifier;
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
 
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+      pSrc[2u * l] = xt;
 
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+      pSrc[2u * l + 1u] = yt;
 
-    pSrc[2u * l] = xt;
+      i += n1;
+      l = i + n2;
 
-    pSrc[2u * l + 1u] = yt;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
 
-    i += n1;
-    l = i + n2;
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
 
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+      pSrc[2u * l] = xt;
 
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+      pSrc[2u * l + 1u] = yt;
 
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // butterfly loop end 
+   }                             // butterfly loop end 
+
+}
+
+
+void arm_radix2_butterfly_inverse_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint16_t twidCoefModifier)
+{
+
+   unsigned i, j, k, l;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
+
+   //N = fftLen; 
+   n2 = fftLen;
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   // loop for groups 
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 2u) - (pSrc[2 * l] >> 2u);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 2u) + (pSrc[2 * l] >> 2u)) >> 1u;
+      
+      yt = (pSrc[2 * i + 1] >> 2u) - (pSrc[2 * l + 1] >> 2u);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 2u) + (pSrc[2 * i + 1] >> 2u)) >> 1u;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multSub_32x32_keep32_R(p0, yt, sinVal);
+      multAcc_32x32_keep32_R(p1, xt, sinVal);
+      
+      pSrc[2u * l] = p0;
+      pSrc[2u * l + 1u] = p1;
+   }                             // groups loop end 
+
+   twidCoefModifier = twidCoefModifier << 1u;
+
+   // loop for stage 
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups 
+      for (j = 0; j < n2; j++)
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly 
+         for (i = j; i < fftLen; i += n1)
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
+      
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
+
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multSub_32x32_keep32_R(p0, yt, sinVal);
+            multAcc_32x32_keep32_R(p1, xt, sinVal);
+            
+            pSrc[2u * l] = p0;
+            pSrc[2u * l + 1u] = p1;
+         }                         // butterfly loop end 
+
+      }                           // groups loop end 
+
+      twidCoefModifier = twidCoefModifier << 1u;
+   }                             // stages loop end 
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
+
+   // loop for butterfly 
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2u * l] = xt;
+
+      pSrc[2u * l + 1u] = yt;
+
+      i += n1;
+      l = i + n2;
+
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2u * l] = xt;
+
+      pSrc[2u * l + 1u] = yt;
+
+   }                             // butterfly loop end 
 
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c
index d1fb3196e3..5acaf768b4 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_f32.c    
@@ -12,1225 +12,1199 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
-/**    
- * @ingroup groupTransforms    
- */
+extern void arm_bitreversal_f32(
+float32_t * pSrc,
+uint16_t fftSize,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTab);
 
 /**    
- * @defgroup Radix4_CFFT_CIFFT Radix-4 Complex FFT Functions    
- *    
- * \par    
- * Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).    
- * Computational complexity of CFFT reduces drastically when compared to DFT.    
- * \par    
- * This set of functions implements CFFT/CIFFT    
- * for Q15, Q31, and floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.    
- * Complex input is stored in input buffer in an interleaved fashion.    
- *    
- * \par    
- * The functions operate on blocks of input and output data and each call to the function processes    
- * 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.    
- * \par   
- * The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.    
- * 
 {real[0], imag[0], real[1], imag[1],..} 
    
- *    
- * \par Lengths supported by the transform:   
- * \par    
- * Internally, the function utilize a radix-4 decimation in frequency(DIF) algorithm    
- * and the size of the FFT supported are of the lengths [16, 64, 256, 1024].   
- *     
- *    
- * \par Algorithm:    
- *    
- * Complex Fast Fourier Transform:    
- * \par     
- * Input real and imaginary data:    
- * 
    
- * x(n) = xa + j * ya    
- * x(n+N/4 ) = xb + j * yb    
- * x(n+N/2 ) = xc + j * yc    
- * x(n+3N 4) = xd + j * yd    
- * 
    
- * where N is length of FFT    
- * \par    
- * Output real and imaginary data:    
- * 
    
- * X(4r) = xa'+ j * ya'    
- * X(4r+1) = xb'+ j * yb'    
- * X(4r+2) = xc'+ j * yc'    
- * X(4r+3) = xd'+ j * yd'    
- * 
    
- * \par    
- * Twiddle factors for radix-4 FFT:    
- * 
    
- * Wn = co1 + j * (- si1)    
- * W2n = co2 + j * (- si2)    
- * W3n = co3 + j * (- si3)    
- * 
    
- *    
- * \par    
- * \image html CFFT.gif "Radix-4 Decimation-in Frequency Complex Fast Fourier Transform"    
- *    
- * \par    
- * Output from Radix-4 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.    
- * \par    
- *  Butterfly CFFT equations:    
- * 
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
- * yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
- * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
- * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
- * 
    
- *    
- *    
- * Complex Inverse Fast Fourier Transform:    
- * \par    
- * CIFFT uses same twiddle factor table as CFFT with modifications in the design equation as shown below.    
- *    
- * \par    
- *  Modified Butterfly CIFFT equations:    
- * 
    
- * xa' = xa + xb + xc + xd    
- * ya' = ya + yb + yc + yd    
- * xc' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
- * yc' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
- * xb' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
- * yb' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
- * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
- * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
- * 
    
- *    
- * \par Instance Structure    
- * A separate instance structure must be defined for each Instance but the twiddle factors and bit reversal tables can be reused.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes twiddle factor table and bit reversal table pointers    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_cfft_radix4_instance_f32 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor, onebyfftLen};    
- *arm_cfft_radix4_instance_q31 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- *arm_cfft_radix4_instance_q15 S = {fftLen, ifftFlag, bitReverseFlag, pTwiddle, pBitRevTable, twidCoefModifier, bitRevFactor};    
- * 
    
- * \par    
- * where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);    
- * bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);     
- * pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.    
- * twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;     
- * pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.    
- * onebyfftLen value of 1/fftLen to calculate CIFFT;    
- *   
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-
-/**    
- * @addtogroup Radix4_CFFT_CIFFT    
- * @{    
- */
-
-/**    
- * @details    
- * @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.   
- * @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
- * @return none.   
- */
-
-void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier, S->onebyfftLen);
-  }
-  else
-  {
-    /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-
-/**    
- * @} end of Radix4_CFFT_CIFFT group    
- */
-
+* @ingroup groupTransforms    
+*/
 
 /* ----------------------------------------------------------------------    
 ** Internal helper function used by the FFTs    
 ** ------------------------------------------------------------------- */
 
 /*    
- * @brief  Core function for the floating-point CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to the twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
+* @brief  Core function for the floating-point CFFT butterfly process.   
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
+* @param[in]      fftLen           length of the FFT.   
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+* @return none.   
+*/
 
 void arm_radix4_butterfly_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier)
+float32_t * pSrc,
+uint16_t fftLen,
+float32_t * pCoef,
+uint16_t twidCoefModifier)
 {
 
-  float32_t co1, co2, co3, si1, si2, si3;
-  uint32_t ia1, ia2, ia3;
-  uint32_t i0, i1, i2, i3;
-  uint32_t n1, n2, j, k;
+   float32_t co1, co2, co3, si1, si2, si3;
+   uint32_t ia1, ia2, ia3;
+   uint32_t i0, i1, i2, i3;
+   uint32_t n1, n2, j, k;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY_FAMILY
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
-  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-    Ybminusd;
-  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-  float32_t *ptr1;
+   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+   Ybminusd;
+   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+   float32_t *ptr1;
+   float32_t p0,p1,p2,p3,p4,p5;
+   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
 
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
+   /* n2 = fftLen/4 */
+   n2 >>= 2u;
+   i0 = 0u;
+   ia1 = 0u;
 
-  j = n2;
+   j = n2;
 
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
 
-    xaIn = pSrc[(2u * i0)];
-    yaIn = pSrc[(2u * i0) + 1u];
+      xaIn = pSrc[(2u * i0)];
+      yaIn = pSrc[(2u * i0) + 1u];
 
-    xcIn = pSrc[(2u * i2)];
-    ycIn = pSrc[(2u * i2) + 1u];
+      xbIn = pSrc[(2u * i1)];
+      ybIn = pSrc[(2u * i1) + 1u];
 
-    xbIn = pSrc[(2u * i1)];
-    ybIn = pSrc[(2u * i1) + 1u];
+      xcIn = pSrc[(2u * i2)];
+      ycIn = pSrc[(2u * i2) + 1u];
 
-    xdIn = pSrc[(2u * i3)];
-    ydIn = pSrc[(2u * i3) + 1u];
+      xdIn = pSrc[(2u * i3)];
+      ydIn = pSrc[(2u * i3) + 1u];
 
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
 
-    /*  index calculation for the coefficients */
-    ia2 = ia1 + ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-    /* xb - xd */
-    Xbminusd = xbIn - xdIn;
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-    /* yb + yd */
-    Ybminusd = ybIn - ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-    /* (xa - xc) + (yb - yd) */
-    Xb12C_out = (Xaminusc + Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yb12C_out = (Yaminusc - Xbminusd);
-    /* (xa + xc) - (xb + xd) */
-    Xc12C_out = (Xaplusc - Xbplusd);
-    /* (ya + yc) - (yb + yd) */
-    Yc12C_out = (Yaplusc - Ybplusd);
-    /* (xa - xc) - (yb - yd) */
-    Xd12C_out = (Xaminusc - Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yd12C_out = (Xbminusd + Yaminusc);
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /*  index calculation for the coefficients */
-    ia3 = ia2 + ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    Xb12_out = Xb12C_out * co1;
-    Yb12_out = Yb12C_out * co1;
-    Xc12_out = Xc12C_out * co2;
-    Yc12_out = Yc12C_out * co2;
-    Xd12_out = Xd12C_out * co3;
-    Yd12_out = Yd12C_out * co3;
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    Xb12_out += Yb12C_out * si1;
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    Yb12_out -= Xb12C_out * si1;
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    Xc12_out += Yc12C_out * si2;
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    Yc12_out -= Xc12C_out * si2;
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    Xd12_out += Yd12C_out * si3;
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    Yd12_out -= Xd12C_out * si3;
-
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = Xc12_out;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = Yc12_out;
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = Xb12_out;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = Yb12_out;
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = Xd12_out;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = Yd12_out;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  }
-  while(--j);
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
       co2 = pCoef[ia2 * 2u];
       si2 = pCoef[(ia2 * 2u) + 1u];
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+      /* xb - xd */
+      Xbminusd = xbIn - xdIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+      /* yb - yd */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+
+      /* (xa - xc) + (yb - yd) */
+      Xb12C_out = (Xaminusc + Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = (Yaminusc - Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = (Xaplusc - Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = (Yaplusc - Ybplusd);
+      /* (xa - xc) - (yb - yd) */
+      Xd12C_out = (Xaminusc - Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yd12C_out = (Xbminusd + Yaminusc);
+
+      co1 = pCoef[ia1 * 2u];
+      si1 = pCoef[(ia1 * 2u) + 1u];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
       co3 = pCoef[ia3 * 2u];
       si3 = pCoef[(ia3 * 2u) + 1u];
 
+      Xb12_out = Xb12C_out * co1;
+      Yb12_out = Yb12C_out * co1;
+      Xc12_out = Xc12C_out * co2;
+      Yc12_out = Yc12C_out * co2;
+      Xd12_out = Xd12C_out * co3;
+      Yd12_out = Yd12C_out * co3;
+         
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = Yb12C_out * si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = Xb12C_out * si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = Yc12C_out * si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = Xc12C_out * si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = Yd12C_out * si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 = Xd12C_out * si3;
+      
+      Xb12_out += p0;
+      Yb12_out -= p1;
+      Xc12_out += p2;
+      Yc12_out -= p3;
+      Xd12_out += p4;
+      Yd12_out -= p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+      pSrc[2u * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+      pSrc[(2u * i1) + 1u] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+      pSrc[2u * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+      pSrc[(2u * i2) + 1u] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+      pSrc[2u * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+      pSrc[(2u * i3) + 1u] = Yd12_out;
+
       /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
+      ia1 += twidCoefModifier;
 
-      for (i0 = j; i0 < fftLen; i0 += n1)
+      /*  Updating input index */
+      i0++;
+
+   }
+   while(--j);
+
+   twidCoefModifier <<= 2u;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2u;
+      ia1 = 0u;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
       {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2u];
+         si1 = pCoef[(ia1 * 2u) + 1u];
+         co2 = pCoef[ia2 * 2u];
+         si2 = pCoef[(ia2 * 2u) + 1u];
+         co3 = pCoef[ia3 * 2u];
+         si3 = pCoef[(ia3 * 2u) + 1u];
 
-        xaIn = pSrc[(2u * i0)];
-        yaIn = pSrc[(2u * i0) + 1u];
+         /*  Twiddle coefficients index modifier */
+         ia1 += twidCoefModifier;
+      
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
 
-        xbIn = pSrc[(2u * i1)];
-        ybIn = pSrc[(2u * i1) + 1u];
+            xaIn = pSrc[(2u * i0)];
+            yaIn = pSrc[(2u * i0) + 1u];
 
-        xcIn = pSrc[(2u * i2)];
-        ycIn = pSrc[(2u * i2) + 1u];
+            xbIn = pSrc[(2u * i1)];
+            ybIn = pSrc[(2u * i1) + 1u];
 
-        xdIn = pSrc[(2u * i3)];
-        ydIn = pSrc[(2u * i3) + 1u];
+            xcIn = pSrc[(2u * i2)];
+            ycIn = pSrc[(2u * i2) + 1u];
 
-        /* xa - xc */
-        Xaminusc = xaIn - xcIn;
-        /* (xb - xd) */
-        Xbminusd = xbIn - xdIn;
-        /* ya - yc */
-        Yaminusc = yaIn - ycIn;
-        /* (yb - yd) */
-        Ybminusd = ybIn - ydIn;
+            xdIn = pSrc[(2u * i3)];
+            ydIn = pSrc[(2u * i3) + 1u];
 
-        /* xa + xc */
-        Xaplusc = xaIn + xcIn;
-        /* xb + xd */
-        Xbplusd = xbIn + xdIn;
-        /* ya + yc */
-        Yaplusc = yaIn + ycIn;
-        /* yb + yd */
-        Ybplusd = ybIn + ydIn;
+            /* xa - xc */
+            Xaminusc = xaIn - xcIn;
+            /* (xb - xd) */
+            Xbminusd = xbIn - xdIn;
+            /* ya - yc */
+            Yaminusc = yaIn - ycIn;
+            /* (yb - yd) */
+            Ybminusd = ybIn - ydIn;
 
-        /* (xa - xc) + (yb - yd) */
-        Xb12C_out = (Xaminusc + Ybminusd);
-        /* (ya - yc) -  (xb - xd) */
-        Yb12C_out = (Yaminusc - Xbminusd);
-        /* xa + xc -(xb + xd) */
-        Xc12C_out = (Xaplusc - Xbplusd);
-        /* (ya + yc) - (yb + yd) */
-        Yc12C_out = (Yaplusc - Ybplusd);
-        /* (xa - xc) - (yb - yd) */
-        Xd12C_out = (Xaminusc - Ybminusd);
-        /* (ya - yc) +  (xb - xd) */
-        Yd12C_out = (Xbminusd + Yaminusc);
+            /* xa + xc */
+            Xaplusc = xaIn + xcIn;
+            /* xb + xd */
+            Xbplusd = xbIn + xdIn;
+            /* ya + yc */
+            Yaplusc = yaIn + ycIn;
+            /* yb + yd */
+            Ybplusd = ybIn + ydIn;
 
-        pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-        pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+            /* (xa - xc) + (yb - yd) */
+            Xb12C_out = (Xaminusc + Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yb12C_out = (Yaminusc - Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = (Xaplusc - Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = (Yaplusc - Ybplusd);
+            /* (xa - xc) - (yb - yd) */
+            Xd12C_out = (Xaminusc - Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yd12C_out = (Xbminusd + Yaminusc);
 
-        Xb12_out = Xb12C_out * co1;
-        Yb12_out = Yb12C_out * co1;
-        Xc12_out = Xc12C_out * co2;
-        Yc12_out = Yc12C_out * co2;
-        Xd12_out = Xd12C_out * co3;
-        Yd12_out = Yd12C_out * co3;
+            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
 
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        Xb12_out += Yb12C_out * si1;
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        Yb12_out -= Xb12C_out * si1;
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        Xc12_out += Yc12C_out * si2;
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        Yc12_out -= Xc12C_out * si2;
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        Xd12_out += Yd12C_out * si3;
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        Yd12_out -= Xd12C_out * si3;
+            Xb12_out = Xb12C_out * co1;
+            Yb12_out = Yb12C_out * co1;
+            Xc12_out = Xc12C_out * co2;
+            Yc12_out = Yc12C_out * co2;
+            Xd12_out = Xd12C_out * co3;
+            Yd12_out = Yd12C_out * co3;
+         
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = Yb12C_out * si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = Xb12C_out * si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = Yc12C_out * si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = Xc12C_out * si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = Yd12C_out * si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = Xd12C_out * si3;
+            
+            Xb12_out += p0;
+            Yb12_out -= p1;
+            Xc12_out += p2;
+            Yc12_out -= p3;
+            Xd12_out += p4;
+            Yd12_out -= p5;
 
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = Xc12_out;
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2u * i1] = Xc12_out;
 
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = Yc12_out;
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2u * i1) + 1u] = Yc12_out;
 
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = Xb12_out;
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2u * i2] = Xb12_out;
 
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = Yb12_out;
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2u * i2) + 1u] = Yb12_out;
 
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = Xd12_out;
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2u * i3] = Xd12_out;
 
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = Yd12_out;
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2u * i3) + 1u] = Yd12_out;
 
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
+            i0 += n1;
+         } while(i0 < fftLen);
+         j++;
+      } while(j <= (n2 - 1u));
+      twidCoefModifier <<= 2u;
+   }
 
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
 
-  /*  Calculations of last stage */
-  do
-  {
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
 
-    xaIn = ptr1[0];
-    xcIn = ptr1[4];
-    yaIn = ptr1[1];
-    ycIn = ptr1[5];
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
 
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
 
-    xbIn = ptr1[2];
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
 
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
 
-    xdIn = ptr1[6];
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
 
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
 
-    ybIn = ptr1[3];
+      /* (xb-xd) */
+      Xbminusd = xbIn - xdIn;
 
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
+      /* (yb-yd) */
+      Ybminusd = ybIn - ydIn;
 
-    ydIn = ptr1[7];
+      /* xa' = xa + xb + xc + xd */
+      a0 = (Xaplusc + Xbplusd);
+      /* ya' = ya + yb + yc + yd */
+      a1 = (Yaplusc + Ybplusd);
+      /* xc' = (xa-xb+xc-xd) */
+      a2 = (Xaplusc - Xbplusd);
+      /* yc' = (ya-yb+yc-yd) */
+      a3 = (Yaplusc - Ybplusd);
+      /* xb' = (xa+yb-xc-yd) */
+      a4 = (Xaminusc + Ybminusd);
+      /* yb' = (ya-xb-yc+xd) */
+      a5 = (Yaminusc - Xbminusd);
+      /* xd' = (xa-yb-xc+yd)) */
+      a6 = (Xaminusc - Ybminusd);
+      /* yd' = (ya+xb-yc-xd) */
+      a7 = (Xbminusd + Yaminusc);
+   
+      ptr1[0] = a0;
+      ptr1[1] = a1;
+      ptr1[2] = a2;
+      ptr1[3] = a3;
+      ptr1[4] = a4;
+      ptr1[5] = a5;
+      ptr1[6] = a6;
+      ptr1[7] = a7;
 
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    ptr1[0] = (Xaplusc + Xbplusd);
-
-    /* (xb-xd) */
-    Xbminusd = xbIn - xdIn;
-
-    /* ya' = ya + yb + yc + yd */
-    ptr1[1] = (Yaplusc + Ybplusd);
-
-    /* (yb-yd) */
-    Ybminusd = ybIn - ydIn;
-
-    /* xc' = (xa-xb+xc-xd) */
-    ptr1[2] = (Xaplusc - Xbplusd);
-    /* yc' = (ya-yb+yc-yd) */
-    ptr1[3] = (Yaplusc - Ybplusd);
-    /* xb' = (xa+yb-xc-yd) */
-    ptr1[4] = (Xaminusc + Ybminusd);
-    /* yb' = (ya-xb-yc+xd) */
-    ptr1[5] = (Yaminusc - Xbminusd);
-    /* xd' = (xa-yb-xc+yd)) */
-    ptr1[6] = (Xaminusc - Ybminusd);
-    /* yd' = (ya+xb-yc-xd) */
-    ptr1[7] = (Xbminusd + Yaminusc);
-
-    /* increment pointer by 8 */
-    ptr1 = ptr1 + 8u;
-
-  } while(--j);
+      /* increment pointer by 8 */
+      ptr1 += 8u;
+   } while(--j);
 
 #else
 
-  float32_t t1, t2, r1, r2, s1, s2;
+   float32_t t1, t2, r1, r2, s1, s2;
 
-  /* Run the below code for Cortex-M0 */
+   /* Run the below code for Cortex-M0 */
 
-  /*  Initializations for the fft calculation */
-  n2 = fftLen;
-  n1 = n2;
-  for (k = fftLen; k > 1u; k >>= 2u)
-  {
-    /*  Initializations for the fft calculation */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
+   /*  Initializations for the fft calculation */
+   n2 = fftLen;
+   n1 = n2;
+   for (k = fftLen; k > 1u; k >>= 2u)
+   {
+      /*  Initializations for the fft calculation */
+      n1 = n2;
+      n2 >>= 2u;
+      ia1 = 0u;
 
-    /*  FFT Calculation */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
+      /*  FFT Calculation */
+      j = 0;
+      do
       {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2u];
+         si1 = pCoef[(ia1 * 2u) + 1u];
+         co2 = pCoef[ia2 * 2u];
+         si2 = pCoef[(ia2 * 2u) + 1u];
+         co3 = pCoef[ia3 * 2u];
+         si3 = pCoef[(ia3 * 2u) + 1u];
 
-        /* xa + xc */
-        r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
 
-        /* xa - xc */
-        r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
 
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+            /* xa + xc */
+            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
 
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+            /* xa - xc */
+            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
 
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
+            /* ya + yc */
+            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
 
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = r1 + t1;
+            /* ya - yc */
+            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
 
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
+            /* xb + xd */
+            t1 = pSrc[2u * i1] + pSrc[2u * i3];
 
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2u * i0] = r1 + t1;
 
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = s1 + t2;
+            /* xa + xc -(xb + xd) */
+            r1 = r1 - t1;
 
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
+            /* yb + yd */
+            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
 
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2u * i0) + 1u] = s1 + t2;
 
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
+            /* (ya + yc) - (yb + yd) */
+            s1 = s1 - t2;
 
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
+            /* (yb - yd) */
+            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
 
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
+            /* (xb - xd) */
+            t2 = pSrc[2u * i1] - pSrc[2u * i3];
 
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
 
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
 
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
+            /* (xa - xc) + (yb - yd) */
+            r1 = r2 + t1;
 
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
+            /* (xa - xc) - (yb - yd) */
+            r2 = r2 - t1;
 
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
+            /* (ya - yc) -  (xb - xd) */
+            s1 = s2 - t2;
 
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
+            /* (ya - yc) +  (xb - xd) */
+            s2 = s2 + t2;
 
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
 
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
+         
+            i0 += n1;
+         } while( i0 < fftLen);
+         j++;
+      } while(j <= (n2 - 1u));
+      twidCoefModifier <<= 2u;
+   }
+
+#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
 
 }
 
 /*    
- * @brief  Core function for the floating-point CIFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @param[in]      onebyfftLen      value of 1/fftLen.   
- * @return none.   
- */
+* @brief  Core function for the floating-point CIFFT butterfly process.   
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
+* @param[in]      fftLen           length of the FFT.   
+* @param[in]      *pCoef           points to twiddle coefficient buffer.   
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+* @param[in]      onebyfftLen      value of 1/fftLen.   
+* @return none.   
+*/
 
 void arm_radix4_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen)
+float32_t * pSrc,
+uint16_t fftLen,
+float32_t * pCoef,
+uint16_t twidCoefModifier,
+float32_t onebyfftLen)
 {
-  float32_t co1, co2, co3, si1, si2, si3;
-  uint32_t ia1, ia2, ia3;
-  uint32_t i0, i1, i2, i3;
-  uint32_t n1, n2, j, k;
+   float32_t co1, co2, co3, si1, si2, si3;
+   uint32_t ia1, ia2, ia3;
+   uint32_t i0, i1, i2, i3;
+   uint32_t n1, n2, j, k;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY_FAMILY
 
-  float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-  float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-    Ybminusd;
-  float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-  float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-  float32_t *ptr1;
+   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+   Ybminusd;
+   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+   float32_t *ptr1;
+   float32_t p0,p1,p2,p3,p4,p5,p6,p7;
+   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
 
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
 
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
+   /* n2 = fftLen/4 */
+   n2 >>= 2u;
+   i0 = 0u;
+   ia1 = 0u;
 
-  j = n2;
+   j = n2;
 
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
 
-    /*  Butterfly implementation */
-    xaIn = pSrc[(2u * i0)];
-    yaIn = pSrc[(2u * i0) + 1u];
+      /*  Butterfly implementation */
+      xaIn = pSrc[(2u * i0)];
+      yaIn = pSrc[(2u * i0) + 1u];
 
-    xcIn = pSrc[(2u * i2)];
-    ycIn = pSrc[(2u * i2) + 1u];
+      xcIn = pSrc[(2u * i2)];
+      ycIn = pSrc[(2u * i2) + 1u];
 
-    xbIn = pSrc[(2u * i1)];
-    ybIn = pSrc[(2u * i1) + 1u];
+      xbIn = pSrc[(2u * i1)];
+      ybIn = pSrc[(2u * i1) + 1u];
 
-    xdIn = pSrc[(2u * i3)];
-    ydIn = pSrc[(2u * i3) + 1u];
+      xdIn = pSrc[(2u * i3)];
+      ydIn = pSrc[(2u * i3) + 1u];
 
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
-    /* xb + xd */
-    Xbplusd = xbIn + xdIn;
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
 
-    /*  index calculation for the coefficients */
-    ia2 = ia1 + ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
-    /* xb - xd */
-    Xbminusd = xbIn - xdIn;
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
-    /* yb - yd */
-    Ybminusd = ybIn - ydIn;
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
-
-    /* (xa - xc) - (yb - yd) */
-    Xb12C_out = (Xaminusc - Ybminusd);
-    /* (ya - yc) + (xb - xd) */
-    Yb12C_out = (Yaminusc + Xbminusd);
-    /* (xa + xc) - (xb + xd) */
-    Xc12C_out = (Xaplusc - Xbplusd);
-    /* (ya + yc) - (yb + yd) */
-    Yc12C_out = (Yaplusc - Ybplusd);
-    /* (xa - xc) + (yb - yd) */
-    Xd12C_out = (Xaminusc + Ybminusd);
-    /* (ya - yc) - (xb - xd) */
-    Yd12C_out = (Yaminusc - Xbminusd);
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /*  index calculation for the coefficients */
-    ia3 = ia2 + ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    Xb12_out = Xb12C_out * co1;
-    Yb12_out = Yb12C_out * co1;
-    Xc12_out = Xc12C_out * co2;
-    Yc12_out = Yc12C_out * co2;
-    Xd12_out = Xd12C_out * co3;
-    Yd12_out = Yd12C_out * co3;
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    Xb12_out -= Yb12C_out * si1;
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    Yb12_out += Xb12C_out * si1;
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    Xc12_out -= Yc12C_out * si2;
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    Yc12_out += Xc12C_out * si2;
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    Xd12_out -= Yd12C_out * si3;
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    Yd12_out += Xd12C_out * si3;
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = Xc12_out;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = Yc12_out;
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = Xb12_out;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = Yb12_out;
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = Xd12_out;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = Yd12_out;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
       co2 = pCoef[ia2 * 2u];
       si2 = pCoef[(ia2 * 2u) + 1u];
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+      /* xb - xd */
+      Xbminusd = xbIn - xdIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+      /* yb - yd */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+
+      /* (xa - xc) - (yb - yd) */
+      Xb12C_out = (Xaminusc - Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = (Yaminusc + Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = (Xaplusc - Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = (Yaplusc - Ybplusd);
+      /* (xa - xc) + (yb - yd) */
+      Xd12C_out = (Xaminusc + Ybminusd);
+      /* (ya - yc) - (xb - xd) */
+      Yd12C_out = (Yaminusc - Xbminusd);
+
+      co1 = pCoef[ia1 * 2u];
+      si1 = pCoef[(ia1 * 2u) + 1u];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
       co3 = pCoef[ia3 * 2u];
       si3 = pCoef[(ia3 * 2u) + 1u];
 
+      Xb12_out = Xb12C_out * co1;
+      Yb12_out = Yb12C_out * co1;
+      Xc12_out = Xc12C_out * co2;
+      Yc12_out = Yc12C_out * co2;
+      Xd12_out = Xd12C_out * co3;
+      Yd12_out = Yd12C_out * co3;
+   
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = Yb12C_out * si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = Xb12C_out * si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = Yc12C_out * si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = Xc12C_out * si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = Yd12C_out * si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 = Xd12C_out * si3;
+      
+      Xb12_out -= p0;
+      Yb12_out += p1;
+      Xc12_out -= p2;
+      Yc12_out += p3;
+      Xd12_out -= p4;
+      Yd12_out += p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2u * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2u * i1) + 1u] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2u * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2u * i2) + 1u] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2u * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2u * i3) + 1u] = Yd12_out;
+
       /*  Twiddle coefficients index modifier */
       ia1 = ia1 + twidCoefModifier;
 
-      for (i0 = j; i0 < fftLen; i0 += n1)
+      /*  Updating input index */
+      i0 = i0 + 1u;
+
+   } while(--j);
+
+   twidCoefModifier <<= 2u;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2u;
+      ia1 = 0u;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
       {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2u];
+         si1 = pCoef[(ia1 * 2u) + 1u];
+         co2 = pCoef[ia2 * 2u];
+         si2 = pCoef[(ia2 * 2u) + 1u];
+         co3 = pCoef[ia3 * 2u];
+         si3 = pCoef[(ia3 * 2u) + 1u];
 
-        xaIn = pSrc[(2u * i0)];
-        yaIn = pSrc[(2u * i0) + 1u];
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
 
-        xbIn = pSrc[(2u * i1)];
-        ybIn = pSrc[(2u * i1) + 1u];
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
 
-        xcIn = pSrc[(2u * i2)];
-        ycIn = pSrc[(2u * i2) + 1u];
+            xaIn = pSrc[(2u * i0)];
+            yaIn = pSrc[(2u * i0) + 1u];
 
-        xdIn = pSrc[(2u * i3)];
-        ydIn = pSrc[(2u * i3) + 1u];
+            xbIn = pSrc[(2u * i1)];
+            ybIn = pSrc[(2u * i1) + 1u];
 
-        /* xa - xc */
-        Xaminusc = xaIn - xcIn;
-        /* (xb - xd) */
-        Xbminusd = xbIn - xdIn;
-        /* ya - yc */
-        Yaminusc = yaIn - ycIn;
-        /* (yb - yd) */
-        Ybminusd = ybIn - ydIn;
+            xcIn = pSrc[(2u * i2)];
+            ycIn = pSrc[(2u * i2) + 1u];
 
-        /* xa + xc */
-        Xaplusc = xaIn + xcIn;
-        /* xb + xd */
-        Xbplusd = xbIn + xdIn;
-        /* ya + yc */
-        Yaplusc = yaIn + ycIn;
-        /* yb + yd */
-        Ybplusd = ybIn + ydIn;
+            xdIn = pSrc[(2u * i3)];
+            ydIn = pSrc[(2u * i3) + 1u];
 
-        /* (xa - xc) - (yb - yd) */
-        Xb12C_out = (Xaminusc - Ybminusd);
-        /* (ya - yc) +  (xb - xd) */
-        Yb12C_out = (Yaminusc + Xbminusd);
-        /* xa + xc -(xb + xd) */
-        Xc12C_out = (Xaplusc - Xbplusd);
-        /* (ya + yc) - (yb + yd) */
-        Yc12C_out = (Yaplusc - Ybplusd);
-        /* (xa - xc) + (yb - yd) */
-        Xd12C_out = (Xaminusc + Ybminusd);
-        /* (ya - yc) -  (xb - xd) */
-        Yd12C_out = (Yaminusc - Xbminusd);
+            /* xa - xc */
+            Xaminusc = xaIn - xcIn;
+            /* (xb - xd) */
+            Xbminusd = xbIn - xdIn;
+            /* ya - yc */
+            Yaminusc = yaIn - ycIn;
+            /* (yb - yd) */
+            Ybminusd = ybIn - ydIn;
 
-        pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-        pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+            /* xa + xc */
+            Xaplusc = xaIn + xcIn;
+            /* xb + xd */
+            Xbplusd = xbIn + xdIn;
+            /* ya + yc */
+            Yaplusc = yaIn + ycIn;
+            /* yb + yd */
+            Ybplusd = ybIn + ydIn;
 
-        Xb12_out = Xb12C_out * co1;
-        Yb12_out = Yb12C_out * co1;
-        Xc12_out = Xc12C_out * co2;
-        Yc12_out = Yc12C_out * co2;
-        Xd12_out = Xd12C_out * co3;
-        Yd12_out = Yd12C_out * co3;
+            /* (xa - xc) - (yb - yd) */
+            Xb12C_out = (Xaminusc - Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yb12C_out = (Yaminusc + Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = (Xaplusc - Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = (Yaplusc - Ybplusd);
+            /* (xa - xc) + (yb - yd) */
+            Xd12C_out = (Xaminusc + Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yd12C_out = (Yaminusc - Xbminusd);
 
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        Xb12_out -= Yb12C_out * si1;
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        Yb12_out += Xb12C_out * si1;
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        Xc12_out -= Yc12C_out * si2;
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        Yc12_out += Xc12C_out * si2;
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        Xd12_out -= Yd12C_out * si3;
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        Yd12_out += Xd12C_out * si3;
+            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
 
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = Xc12_out;
+            Xb12_out = Xb12C_out * co1;
+            Yb12_out = Yb12C_out * co1;
+            Xc12_out = Xc12C_out * co2;
+            Yc12_out = Yc12C_out * co2;
+            Xd12_out = Xd12C_out * co3;
+            Yd12_out = Yd12C_out * co3;
 
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = Yc12_out;
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = Yb12C_out * si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = Xb12C_out * si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = Yc12C_out * si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = Xc12C_out * si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = Yd12C_out * si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = Xd12C_out * si3;
+            
+            Xb12_out -= p0;
+            Yb12_out += p1;
+            Xc12_out -= p2;
+            Yc12_out += p3;
+            Xd12_out -= p4;
+            Yd12_out += p5;
 
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = Xb12_out;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2u * i1] = Xc12_out;
 
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = Yb12_out;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2u * i1) + 1u] = Yc12_out;
 
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = Xd12_out;
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2u * i2] = Xb12_out;
 
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = Yd12_out;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2u * i2) + 1u] = Yb12_out;
 
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-  /*  Initializations of last stage */
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2u * i3] = Xd12_out;
 
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2u * i3) + 1u] = Yd12_out;
 
-  /*  Calculations of last stage */
-  do
-  {
+            i0 += n1;
+         } while(i0 < fftLen);
+         j++;
+      } while(j <= (n2 - 1u));
+      twidCoefModifier <<= 2u;
+   }
+   /*  Initializations of last stage */
 
-    xaIn = ptr1[0];
-    xcIn = ptr1[4];
-    yaIn = ptr1[1];
-    ycIn = ptr1[5];
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
 
-    /*  Butterfly implementation */
-    /* xa + xc */
-    Xaplusc = xaIn + xcIn;
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
 
-    xbIn = ptr1[2];
+      /*  Butterfly implementation */
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
 
-    /* xa - xc */
-    Xaminusc = xaIn - xcIn;
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
 
-    xdIn = ptr1[6];
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
 
-    /* ya + yc */
-    Yaplusc = yaIn + ycIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
 
-    ybIn = ptr1[3];
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
 
-    /* ya - yc */
-    Yaminusc = yaIn - ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
 
-    ydIn = ptr1[7];
+      /* (xb-xd) */
+      Xbminusd = xbIn - xdIn;
 
-    /* xc + xd */
-    Xbplusd = xbIn + xdIn;
+      /* (yb-yd) */
+      Ybminusd = ybIn - ydIn;
+      
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      a0 = (Xaplusc + Xbplusd);
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      a1 = (Yaplusc + Ybplusd);
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      a2 = (Xaplusc - Xbplusd);
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      a3 = (Yaplusc - Ybplusd);
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      a4 = (Xaminusc - Ybminusd);
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      a5 = (Yaminusc + Xbminusd);
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      a6 = (Xaminusc + Ybminusd);
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      a7 = (Yaminusc - Xbminusd);
+   
+      p0 = a0 * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p2 = a2 * onebyfftLen;
+      p3 = a3 * onebyfftLen;
+      p4 = a4 * onebyfftLen;
+      p5 = a5 * onebyfftLen;
+      p6 = a6 * onebyfftLen;
+      p7 = a7 * onebyfftLen;
+   
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      ptr1[0] = p0;
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      ptr1[1] = p1;
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      ptr1[2] = p2;
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      ptr1[3] = p3;
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[4] = p4;
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      ptr1[5] = p5;
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[6] = p6;
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      ptr1[7] = p7;
 
-    /* yb + yd */
-    Ybplusd = ybIn + ydIn;
+      /* increment source pointer by 8 for next calculations */
+      ptr1 = ptr1 + 8u;
 
-    /* xa' = xa + xb + xc + xd */
-    ptr1[0] = (Xaplusc + Xbplusd) * onebyfftLen;
-
-    /* (xb-xd) */
-    Xbminusd = xbIn - xdIn;
-
-    /* ya' = ya + yb + yc + yd */
-    ptr1[1] = (Yaplusc + Ybplusd) * onebyfftLen;
-
-    /* (yb-yd) */
-    Ybminusd = ybIn - ydIn;
-
-    /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-    ptr1[2] = (Xaplusc - Xbplusd) * onebyfftLen;
-
-    /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-    ptr1[3] = (Yaplusc - Ybplusd) * onebyfftLen;
-
-    /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-    ptr1[4] = (Xaminusc - Ybminusd) * onebyfftLen;
-
-    /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-    ptr1[5] = (Yaminusc + Xbminusd) * onebyfftLen;
-
-    /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-    ptr1[6] = (Xaminusc + Ybminusd) * onebyfftLen;
-
-    /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-    ptr1[7] = (Yaminusc - Xbminusd) * onebyfftLen;
-
-    /* increment source pointer by 8 for next calculations */
-    ptr1 = ptr1 + 8u;
-
-  } while(--j);
+   } while(--j);
 
 #else
 
-  float32_t t1, t2, r1, r2, s1, s2;
+   float32_t t1, t2, r1, r2, s1, s2;
 
-  /* Run the below code for Cortex-M0 */
+   /* Run the below code for Cortex-M0 */
 
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
 
-  /*  Calculation of first stage */
-  for (k = fftLen; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
+   /*  Calculation of first stage */
+   for (k = fftLen; k > 4u; k >>= 2u)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2u;
+      ia1 = 0u;
 
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
+      /*  Calculation of first stage */
+      j = 0;
+      do
       {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2u];
+         si1 = pCoef[(ia1 * 2u) + 1u];
+         co2 = pCoef[ia2 * 2u];
+         si2 = pCoef[(ia2 * 2u) + 1u];
+         co3 = pCoef[ia3 * 2u];
+         si3 = pCoef[(ia3 * 2u) + 1u];
 
-        /* xa + xc */
-        r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
 
-        /* xa - xc */
-        r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
 
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+            /* xa + xc */
+            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
 
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+            /* xa - xc */
+            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
 
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
+            /* ya + yc */
+            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
 
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = r1 + t1;
+            /* ya - yc */
+            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
 
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
+            /* xb + xd */
+            t1 = pSrc[2u * i1] + pSrc[2u * i3];
 
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2u * i0] = r1 + t1;
 
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = s1 + t2;
+            /* xa + xc -(xb + xd) */
+            r1 = r1 - t1;
 
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
+            /* yb + yd */
+            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
 
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2u * i0) + 1u] = s1 + t2;
 
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
+            /* (ya + yc) - (yb + yd) */
+            s1 = s1 - t2;
 
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
+            /* (yb - yd) */
+            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
 
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
+            /* (xb - xd) */
+            t2 = pSrc[2u * i1] - pSrc[2u * i3];
 
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
 
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
 
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
+            /* (xa - xc) - (yb - yd) */
+            r1 = r2 - t1;
 
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
+            /* (xa - xc) + (yb - yd) */
+            r2 = r2 + t1;
 
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
+            /* (ya - yc) +  (xb - xd) */
+            s1 = s2 + t2;
 
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
+            /* (ya - yc) -  (xb - xd) */
+            s2 = s2 - t2;
 
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
 
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-  /*  Initializations of last stage */
-  n1 = n2;
-  n2 >>= 2u;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
 
-  /*  Calculations of last stage */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
 
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = pSrc[2u * i0] + pSrc[2u * i2];
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
+         
+            i0 += n1;
+         } while( i0 < fftLen);
+         j++;
+      } while(j <= (n2 - 1u));
+      twidCoefModifier <<= 2u;
+   }
+   /*  Initializations of last stage */
+   n1 = n2;
+   n2 >>= 2u;
 
-    /* xa - xc */
-    r2 = pSrc[2u * i0] - pSrc[2u * i2];
+   /*  Calculations of last stage */
+   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
 
-    /* ya + yc */
-    s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+      /*  Butterfly implementation */
+      /* xa + xc */
+      r1 = pSrc[2u * i0] + pSrc[2u * i2];
 
-    /* ya - yc */
-    s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+      /* xa - xc */
+      r2 = pSrc[2u * i0] - pSrc[2u * i2];
 
-    /* xc + xd */
-    t1 = pSrc[2u * i1] + pSrc[2u * i3];
+      /* ya + yc */
+      s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
 
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
+      /* ya - yc */
+      s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
 
-    /* (xa + xb) - (xc + xd) */
-    r1 = r1 - t1;
+      /* xc + xd */
+      t1 = pSrc[2u * i1] + pSrc[2u * i3];
 
-    /* yb + yd */
-    t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+      /* xa' = xa + xb + xc + xd */
+      pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
 
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
+      /* (xa + xb) - (xc + xd) */
+      r1 = r1 - t1;
 
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
+      /* yb + yd */
+      t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
 
-    /* (yb-yd) */
-    t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
 
-    /* (xb-xd) */
-    t2 = pSrc[2u * i1] - pSrc[2u * i3];
+      /* (ya + yc) - (yb + yd) */
+      s1 = s1 - t2;
 
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = r1 * onebyfftLen;
+      /* (yb-yd) */
+      t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
 
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
+      /* (xb-xd) */
+      t2 = pSrc[2u * i1] - pSrc[2u * i3];
 
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2u * i1] = r1 * onebyfftLen;
 
-    /* (xa - xc) - (yb-yd) */
-    r1 = r2 - t1;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
 
-    /* (xa - xc) + (yb-yd) */
-    r2 = r2 + t1;
+      /* (xa - xc) - (yb-yd) */
+      r1 = r2 - t1;
 
-    /* (ya - yc) + (xb-xd) */
-    s1 = s2 + t2;
+      /* (xa - xc) + (yb-yd) */
+      r2 = r2 + t1;
 
-    /* (ya - yc) - (xb-xd) */
-    s2 = s2 - t2;
+      /* (ya - yc) + (xb-xd) */
+      s1 = s2 + t2;
 
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = r1 * onebyfftLen;
+      /* (ya - yc) - (xb-xd) */
+      s2 = s2 - t2;
 
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2u * i2] = r1 * onebyfftLen;
 
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = r2 * onebyfftLen;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
 
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
-  }
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2u * i3] = r2 * onebyfftLen;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
+   }
+
+#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
+}
+
+/**    
+* @addtogroup ComplexFFT    
+* @{    
+*/
+
+/**    
+* @details    
+* @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.   
+* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
+* in the future.
+* @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.   
+* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
+* @return none.   
+*/
+
+void arm_cfft_radix4_f32(
+const arm_cfft_radix4_instance_f32 * S,
+float32_t * pSrc)
+{
+
+   if(S->ifftFlag == 1u)
+   {
+      /*  Complex IFFT radix-4  */
+      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /*  Complex FFT radix-4  */
+      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier);
+   }
+
+   if(S->bitReverseFlag == 1u)
+   {
+      /*  Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
 
 }
+
+/**    
+* @} end of ComplexFFT group    
+*/
+
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c
index 11cf66ff8b..18f93f1694 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_init_f32.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 
@@ -45,12 +47,14 @@
  */
 
 /**    
- * @addtogroup Radix4_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
 /**    
 * @brief  Initialization function for the floating-point CFFT/CIFFT.   
+* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
+* in the future.
 * @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.   
 * @param[in]     fftLen         length of the FFT.   
 * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
@@ -157,5 +161,5 @@ arm_status arm_cfft_radix4_init_f32(
 }
 
 /**    
- * @} end of Radix4_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c
index dd637a3612..10c9fad754 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_init_q15.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -45,7 +47,7 @@
 
 
 /**    
- * @addtogroup Radix4_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
@@ -145,5 +147,5 @@ arm_status arm_cfft_radix4_init_q15(
 }
 
 /**    
- * @} end of Radix4_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c
index 66f06e6342..8d4e792e65 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013 
+* $Revision: 	V1.4.1   
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_init_q31.c    
@@ -11,29 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -44,7 +46,7 @@
  */
 
 /**    
- * @addtogroup Radix4_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
@@ -141,5 +143,5 @@ arm_status arm_cfft_radix4_init_q31(
 }
 
 /**    
- * @} end of Radix4_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c
index 023e2f7abc..5676032575 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_q15.c    
@@ -12,39 +12,60 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
+
+void arm_radix4_butterfly_q15(
+  q15_t * pSrc16,
+  uint32_t fftLen,
+  q15_t * pCoef16,
+  uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_q15(
+  q15_t * pSrc16,
+  uint32_t fftLen,
+  q15_t * pCoef16,
+  uint32_t twidCoefModifier);
+
+void arm_bitreversal_q15(
+  q15_t * pSrc,
+  uint32_t fftLen,
+  uint16_t bitRevFactor,
+  uint16_t * pBitRevTab);
+
 /**    
  * @ingroup groupTransforms    
  */
 
 /**    
- * @addtogroup Radix4_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
@@ -92,7 +113,7 @@ void arm_cfft_radix4_q15(
 }
 
 /**    
- * @} end of Radix4_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
 
 /*    
@@ -145,7 +166,7 @@ void arm_radix4_butterfly_q15(
   uint32_t twidCoefModifier)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -997,7 +1018,7 @@ void arm_radix4_butterfly_q15(
   /* output is in 7.9(q9) format for the 64 point  */
   /* output is in 5.11(q11) format for the 16 point  */
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
@@ -1058,7 +1079,7 @@ void arm_radix4_butterfly_inverse_q15(
   uint32_t twidCoefModifier)
 {
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -1891,6 +1912,6 @@ void arm_radix4_butterfly_inverse_q15(
   /* output is in 7.9(q9) format for the 64 point  */
   /* output is in 5.11(q11) format for the 16 point  */
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c
index cfa5d8df0e..b56a0e0827 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix4_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_cfft_radix4_q31.c    
@@ -12,39 +12,59 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.5  2010/04/26     
-* 	 incorporated review comments and updated with latest CMSIS layer    
-*    
-* Version 0.0.3  2010/03/10     
-*    Initial version    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
+
 #include "arm_math.h"
 
+void arm_radix4_butterfly_inverse_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint32_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTab);
 
 /**    
  * @ingroup groupTransforms    
  */
 
 /**    
- * @addtogroup Radix4_CFFT_CIFFT    
+ * @addtogroup ComplexFFT    
  * @{    
  */
 
@@ -93,7 +113,7 @@ void arm_cfft_radix4_q31(
 }
 
 /**    
- * @} end of Radix4_CFFT_CIFFT group    
+ * @} end of ComplexFFT group    
  */
 
 /*    
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix8_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix8_f32.c
new file mode 100644
index 0000000000..7ae0bfda53
--- /dev/null
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_cfft_radix8_f32.c
@@ -0,0 +1,384 @@
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
+*    
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_radix8_f32.c    
+*    
+* Description:	Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function        
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.      
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/**    
+* @ingroup groupTransforms    
+*/
+
+/**    
+* @defgroup Radix8_CFFT_CIFFT Radix-8 Complex FFT Functions    
+*    
+* \par    
+* Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).    
+* Computational complexity of CFFT reduces drastically when compared to DFT.    
+* \par    
+* This set of functions implements CFFT/CIFFT    
+* for floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.    
+* Complex input is stored in input buffer in an interleaved fashion.    
+*    
+* \par    
+* The functions operate on blocks of input and output data and each call to the function processes    
+* 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.    
+* \par   
+* The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.    
+* 
 {real[0], imag[0], real[1], imag[1],..} 
    
+*    
+* \par Lengths supported by the transform:   
+* \par    
+* Internally, the function utilize a Radix-8 decimation in frequency(DIF) algorithm    
+* and the size of the FFT supported are of the lengths [ 64, 512, 4096].   
+*     
+*    
+* \par Algorithm:    
+*    
+* Complex Fast Fourier Transform:    
+* \par     
+* Input real and imaginary data:    
+* 
    
+* x(n) = xa + j * ya    
+* x(n+N/4 ) = xb + j * yb    
+* x(n+N/2 ) = xc + j * yc    
+* x(n+3N 4) = xd + j * yd    
+* 
    
+* where N is length of FFT    
+* \par    
+* Output real and imaginary data:    
+* 
    
+* X(4r) = xa'+ j * ya'    
+* X(4r+1) = xb'+ j * yb'    
+* X(4r+2) = xc'+ j * yc'    
+* X(4r+3) = xd'+ j * yd'    
+* 
    
+* \par    
+* Twiddle factors for Radix-8 FFT:    
+* 
    
+* Wn = co1 + j * (- si1)    
+* W2n = co2 + j * (- si2)    
+* W3n = co3 + j * (- si3)    
+* 
    
+*    
+* \par    
+* \image html CFFT.gif "Radix-8 Decimation-in Frequency Complex Fast Fourier Transform"    
+*    
+* \par    
+* Output from Radix-8 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.    
+* \par    
+*  Butterfly CFFT equations:    
+* 
    
+* xa' = xa + xb + xc + xd    
+* ya' = ya + yb + yc + yd    
+* xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
+* yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
+* xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
+* yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
+* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
+* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
+* 
    
+*    
+* \par    
+* where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);    
+* bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);     
+* pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.    
+* twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;     
+* pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.    
+* onebyfftLen value of 1/fftLen to calculate CIFFT;    
+*   
+* \par Fixed-Point Behavior    
+* Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.    
+* Refer to the function specific documentation below for usage guidelines.    
+*/
+
+
+/*    
+* @brief  Core function for the floating-point CFFT butterfly process.   
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
+* @param[in]      fftLen           length of the FFT.   
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
+* @return none.   
+*/
+
+void arm_radix8_butterfly_f32(
+float32_t * pSrc,
+uint16_t fftLen,
+const float32_t * pCoef,
+uint16_t twidCoefModifier)
+{
+   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
+   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
+   uint32_t id;
+   uint32_t n1, n2, j;
+   
+   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
+   float32_t t1, t2;
+   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
+   float32_t p1, p2, p3, p4;
+   float32_t co2, co3, co4, co5, co6, co7, co8;
+   float32_t si2, si3, si4, si5, si6, si7, si8;
+   const float32_t C81 = 0.70710678118f;
+
+   n2 = fftLen;
+   
+   do 
+   {
+      n1 = n2;
+      n2 = n2 >> 3;
+      i1 = 0;
+      
+      do
+      {
+         i2 = i1 + n2;
+         i3 = i2 + n2;
+         i4 = i3 + n2;
+         i5 = i4 + n2;
+         i6 = i5 + n2;
+         i7 = i6 + n2;
+         i8 = i7 + n2;
+         r1 = pSrc[2 * i1] + pSrc[2 * i5];
+         r5 = pSrc[2 * i1] - pSrc[2 * i5];
+         r2 = pSrc[2 * i2] + pSrc[2 * i6];
+         r6 = pSrc[2 * i2] - pSrc[2 * i6];
+         r3 = pSrc[2 * i3] + pSrc[2 * i7];
+         r7 = pSrc[2 * i3] - pSrc[2 * i7];
+         r4 = pSrc[2 * i4] + pSrc[2 * i8];
+         r8 = pSrc[2 * i4] - pSrc[2 * i8];
+         t1 = r1 - r3;
+         r1 = r1 + r3;
+         r3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1] = r1 + r2;   
+         pSrc[2 * i5] = r1 - r2;
+         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+         t2 = r1 - s3;
+         r1 = r1 + s3;
+         s3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1 + 1] = r1 + r2;
+         pSrc[2 * i5 + 1] = r1 - r2;
+         pSrc[2 * i3]     = t1 + s3;
+         pSrc[2 * i7]     = t1 - s3;
+         pSrc[2 * i3 + 1] = t2 - r3;
+         pSrc[2 * i7 + 1] = t2 + r3;
+         r1 = (r6 - r8) * C81;
+         r6 = (r6 + r8) * C81;
+         r2 = (s6 - s8) * C81;
+         s6 = (s6 + s8) * C81;
+         t1 = r5 - r1;
+         r5 = r5 + r1;
+         r8 = r7 - r6;
+         r7 = r7 + r6;
+         t2 = s5 - r2;
+         s5 = s5 + r2;
+         s8 = s7 - s6;
+         s7 = s7 + s6;
+         pSrc[2 * i2]     = r5 + s7;
+         pSrc[2 * i8]     = r5 - s7;
+         pSrc[2 * i6]     = t1 + s8;
+         pSrc[2 * i4]     = t1 - s8;
+         pSrc[2 * i2 + 1] = s5 - r7;
+         pSrc[2 * i8 + 1] = s5 + r7;
+         pSrc[2 * i6 + 1] = t2 - r8;
+         pSrc[2 * i4 + 1] = t2 + r8;
+         
+         i1 += n1;
+      } while(i1 < fftLen);
+      
+      if(n2 < 8)
+         break;
+      
+      ia1 = 0;
+      j = 1;
+      
+      do
+      {      
+         /*  index calculation for the coefficients */
+         id  = ia1 + twidCoefModifier;
+         ia1 = id;
+         ia2 = ia1 + id;
+         ia3 = ia2 + id;
+         ia4 = ia3 + id;
+         ia5 = ia4 + id;
+         ia6 = ia5 + id;
+         ia7 = ia6 + id;
+                  
+         co2 = pCoef[2 * ia1];
+         co3 = pCoef[2 * ia2];
+         co4 = pCoef[2 * ia3];
+         co5 = pCoef[2 * ia4];
+         co6 = pCoef[2 * ia5];
+         co7 = pCoef[2 * ia6];
+         co8 = pCoef[2 * ia7];
+         si2 = pCoef[2 * ia1 + 1];
+         si3 = pCoef[2 * ia2 + 1];
+         si4 = pCoef[2 * ia3 + 1];
+         si5 = pCoef[2 * ia4 + 1];
+         si6 = pCoef[2 * ia5 + 1];
+         si7 = pCoef[2 * ia6 + 1];
+         si8 = pCoef[2 * ia7 + 1];         
+         
+         i1 = j;
+         
+         do
+         {
+            /*  index calculation for the input */
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+            i4 = i3 + n2;
+            i5 = i4 + n2;
+            i6 = i5 + n2;
+            i7 = i6 + n2;
+            i8 = i7 + n2;
+            r1 = pSrc[2 * i1] + pSrc[2 * i5];
+            r5 = pSrc[2 * i1] - pSrc[2 * i5];
+            r2 = pSrc[2 * i2] + pSrc[2 * i6];
+            r6 = pSrc[2 * i2] - pSrc[2 * i6];
+            r3 = pSrc[2 * i3] + pSrc[2 * i7];
+            r7 = pSrc[2 * i3] - pSrc[2 * i7];
+            r4 = pSrc[2 * i4] + pSrc[2 * i8];
+            r8 = pSrc[2 * i4] - pSrc[2 * i8];
+            t1 = r1 - r3;
+            r1 = r1 + r3;
+            r3 = r2 - r4;
+            r2 = r2 + r4;
+            pSrc[2 * i1] = r1 + r2;
+            r2 = r1 - r2;
+            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+            t2 = s1 - s3;
+            s1 = s1 + s3;
+            s3 = s2 - s4;
+            s2 = s2 + s4;
+            r1 = t1 + s3;
+            t1 = t1 - s3;
+            pSrc[2 * i1 + 1] = s1 + s2;
+            s2 = s1 - s2;
+            s1 = t2 - r3;
+            t2 = t2 + r3;
+            p1 = co5 * r2;
+            p2 = si5 * s2;
+            p3 = co5 * s2;
+            p4 = si5 * r2;
+            pSrc[2 * i5]     = p1 + p2;
+            pSrc[2 * i5 + 1] = p3 - p4;
+            p1 = co3 * r1;
+            p2 = si3 * s1;
+            p3 = co3 * s1;
+            p4 = si3 * r1;
+            pSrc[2 * i3]     = p1 + p2;
+            pSrc[2 * i3 + 1] = p3 - p4;
+            p1 = co7 * t1;
+            p2 = si7 * t2;
+            p3 = co7 * t2;
+            p4 = si7 * t1;
+            pSrc[2 * i7]     = p1 + p2;
+            pSrc[2 * i7 + 1] = p3 - p4;
+            r1 = (r6 - r8) * C81;
+            r6 = (r6 + r8) * C81;
+            s1 = (s6 - s8) * C81;
+            s6 = (s6 + s8) * C81;
+            t1 = r5 - r1;
+            r5 = r5 + r1;
+            r8 = r7 - r6;
+            r7 = r7 + r6;
+            t2 = s5 - s1;
+            s5 = s5 + s1;
+            s8 = s7 - s6;
+            s7 = s7 + s6;
+            r1 = r5 + s7;
+            r5 = r5 - s7;
+            r6 = t1 + s8;
+            t1 = t1 - s8;
+            s1 = s5 - r7;
+            s5 = s5 + r7;
+            s6 = t2 - r8;
+            t2 = t2 + r8;
+            p1 = co2 * r1;
+            p2 = si2 * s1;
+            p3 = co2 * s1;
+            p4 = si2 * r1;
+            pSrc[2 * i2]     = p1 + p2;
+            pSrc[2 * i2 + 1] = p3 - p4;
+            p1 = co8 * r5;
+            p2 = si8 * s5;
+            p3 = co8 * s5;
+            p4 = si8 * r5;
+            pSrc[2 * i8]     = p1 + p2;
+            pSrc[2 * i8 + 1] = p3 - p4;
+            p1 = co6 * r6;
+            p2 = si6 * s6;
+            p3 = co6 * s6;
+            p4 = si6 * r6;
+            pSrc[2 * i6]     = p1 + p2;
+            pSrc[2 * i6 + 1] = p3 - p4;
+            p1 = co4 * t1;
+            p2 = si4 * t2;
+            p3 = co4 * t2;
+            p4 = si4 * t1;
+            pSrc[2 * i4]     = p1 + p2;
+            pSrc[2 * i4 + 1] = p3 - p4;
+            
+            i1 += n1;
+         } while(i1 < fftLen);
+         
+         j++;
+      } while(j < n2);
+      
+      twidCoefModifier <<= 3;
+   } while(n2 > 7);   
+}
+
+/**    
+* @} end of Radix8_CFFT_CIFFT group    
+*/
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_f32.c
index 75cc3ef689..9c61a6167e 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.      
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -177,7 +185,7 @@ void arm_dct4_f32(
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -444,7 +452,7 @@ void arm_dct4_f32(
     i--;
   } while(i > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c
index f6848f61fc..eade6eeba8 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_init_f32.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
 * -------------------------------------------------------------------- */
 
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c
index 8038716bd7..1e0ad73d45 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_init_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c
index 9294ae062c..673628db0a 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_init_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q15.c
index ac3f691ecd..cc7e76c7fe 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_q15.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -104,7 +112,7 @@ void arm_dct4_q15(
   pbuff = pInlineBuffer;
 
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -377,7 +385,7 @@ void arm_dct4_q15(
     i--;
   } while(i > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q31.c
index a8c3678779..546686b346 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_dct4_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_dct4_q31.c    
@@ -11,23 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -104,7 +112,7 @@ void arm_dct4_q31(
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -378,7 +386,7 @@ void arm_dct4_q31(
     i--;
   } while(i > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_f32.c
index a3a2d23aa5..bb3f35dd41 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_f32.c    
@@ -11,111 +11,56 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
-/**    
- * @ingroup groupTransforms    
- */
+extern void arm_radix4_butterfly_f32(
+    float32_t * pSrc,
+    uint16_t fftLen,
+    float32_t * pCoef,
+    uint16_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_f32(
+    float32_t * pSrc,
+    uint16_t fftLen,
+    float32_t * pCoef,
+    uint16_t twidCoefModifier,
+    float32_t onebyfftLen);
+
+extern void arm_bitreversal_f32(
+    float32_t * pSrc,
+    uint16_t fftSize,
+    uint16_t bitRevFactor,
+    uint16_t * pBitRevTab);
 
 /**    
- * @defgroup RFFT_RIFFT Real FFT Functions    
- *    
- * \par    
- * Complex FFT/IFFT typically assumes complex input and output. However many applications use real valued data in time domain.     
- * Real FFT/IFFT efficiently process real valued sequences with the advantage of requirement of low memory and with less complexity.    
- *    
- * \par    
- * This set of functions implements Real Fast Fourier Transforms(RFFT) and Real Inverse Fast Fourier Transform(RIFFT)    
- * for Q15, Q31, and floating-point data types.      
- *    
- *    
- * \par Algorithm:    
- *    
- * Real Fast Fourier Transform:    
- * \par    
- * Real FFT of N-point is calculated using CFFT of N/2-point and Split RFFT process as shown below figure.    
- * \par    
- * \image html RFFT.gif "Real Fast Fourier Transform"    
- * \par    
- * The RFFT functions operate on blocks of input and output data and each call to the function processes    
- * fftLenR samples through the transform.  pSrc  points to input array containing fftLenR values.    
- * pDst  points to output array containing 2*fftLenR values. \n   
- * Input for real FFT is in the order of     
- * 
{real[0], real[1], real[2], real[3], ..}
    
- * Output for real FFT is complex and are in the order of    
- * 
{real(0), imag(0), real(1), imag(1), ...}
     
- *    
- * Real Inverse Fast Fourier Transform:    
- * \par    
- * Real IFFT of N-point is calculated using Split RIFFT process and CFFT of N/2-point as shown below figure.    
- * \par    
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"    
- * \par    
- * The RIFFT functions operate on blocks of input and output data and each call to the function processes    
- * 2*fftLenR samples through the transform.  pSrc  points to input array containing 2*fftLenR values.    
- * pDst  points to output array containing fftLenR values. \n    
- * Input for real IFFT is complex and are in the order of   
- * 
{real(0), imag(0), real(1), imag(1), ...}
   
- *  Output for real IFFT is real and in the order of     
- * 
{real[0], real[1], real[2], real[3], ..}
   
- *    
- * \par Lengths supported by the transform:   
- * \par    
- * Real FFT/IFFT supports the lengths [128, 512, 2048], as it internally uses CFFT/CIFFT.    
- *    
- * \par Instance Structure    
- * A separate instance structure must be defined for each Instance but the twiddle factors can be reused.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes twiddle factor tables.   
- * - Initializes CFFT data structure fields.     
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_rfft_instance_f32 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- * 
    
- * where fftLenReal length of RFFT/RIFFT; fftLenBy2 length of CFFT/CIFFT.     
- * ifftFlagR Flag for selection of RFFT or RIFFT(Set ifftFlagR to calculate RIFFT otherwise calculates RFFT);    
- * bitReverseFlagR Flag for selection of output order(Set bitReverseFlagR to output in normal order otherwise output in bit reversed order);     
- * twidCoefRModifier modifier for twiddle factor table which supports 128, 512, 2048 RFFT lengths with same table;    
- * pTwiddleARealpoints to A array of twiddle coefficients; pTwiddleBRealpoints to B array of twiddle coefficients;    
- * pCfft points to the CFFT Instance structure. The CFFT structure also needs to be initialized, refer to arm_cfft_radix4_f32() for details regarding    
- * static initialization of cfft structure.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the RFFT/RIFFT function.    
- * Refer to the function specific documentation below for usage guidelines.    
+ * @ingroup groupTransforms    
  */
 
 /*--------------------------------------------------------------------    
@@ -138,12 +83,14 @@ void arm_split_rifft_f32(
   uint32_t modifier);
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
 /**    
  * @brief Processing function for the floating-point RFFT/RIFFT.   
+ * @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed
+ * in the future.
  * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.   
  * @param[in]  *pSrc points to the input buffer.   
  * @param[out] *pDst points to the output buffer.   
@@ -204,7 +151,7 @@ void arm_rfft_f32(
 }
 
 /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_f32.c
new file mode 100644
index 0000000000..17ef077a70
--- /dev/null
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_f32.c
@@ -0,0 +1,354 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision: 	V1.4.1
+*
+* Project: 	    CMSIS DSP Library
+* Title:	    arm_rfft_f32.c
+*
+* Description:	RFFT & RIFFT Floating point process function
+*
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+void stage_rfft_f32(
+  arm_rfft_fast_instance_f32 * S,
+  float32_t * p, float32_t * pOut)
+{
+   uint32_t  k;								   /* Loop Counter                     */
+   float32_t twR, twI;						   /* RFFT Twiddle coefficients        */
+   float32_t * pCoeff = S->pTwiddleRFFT;  /* Points to RFFT Twiddle factors   */
+   float32_t *pA = p;						   /* increasing pointer               */
+   float32_t *pB = p;						   /* decreasing pointer               */
+   float32_t xAR, xAI, xBR, xBI;				/* temporary variables              */
+   float32_t t1a, t1b;				         /* temporary variables              */
+   float32_t p0, p1, p2, p3;				   /* temporary variables              */
+
+
+   k = (S->Sint).fftLen - 1;					
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+   
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = xBR + xAR  ;
+   
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = xBI + xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f * ( t1a + t1b );
+   *pOut++ = 0.5f * ( t1a - t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   do
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xBR - xAR ;
+      t1b = xBI + xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = twR * t1a;
+      p1 = twI * t1a;
+      p2 = twR * t1b;
+      p3 = twI * t1b;
+
+      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   } while(k > 0u);
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f32(
+arm_rfft_fast_instance_f32 * S,
+float32_t * p, float32_t * pOut)
+{
+   uint32_t  k;								/* Loop Counter                     */
+   float32_t twR, twI;						/* RFFT Twiddle coefficients        */
+   float32_t *pCoeff = S->pTwiddleRFFT;		/* Points to RFFT Twiddle factors   */
+   float32_t *pA = p;						/* increasing pointer               */
+   float32_t *pB = p;						/* decreasing pointer               */
+   float32_t xAR, xAI, xBR, xBI;			/* temporary variables              */
+   float32_t t1a, t1b, r, s, t, u;			/* temporary variables              */
+
+   k = (S->Sint).fftLen - 1;					
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f * ( xAR + xAI );
+   *pOut++ = 0.5f * ( xAR - xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2	   ;
+
+   while(k > 0u)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xAR - xBR ;
+      t1b = xAI + xBI ;
+
+      r = twR * t1a;
+      s = twI * t1b;
+      t = twI * t1a;
+      u = twR * t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   }
+
+}
+
+/**
+* @ingroup groupTransforms
+*/
+
+/**
+ * @defgroup Fast Real FFT Functions
+ *
+ * \par
+ * The CMSIS DSP library includes specialized algorithms for computing the
+ * FFT of real data sequences.  The FFT is defined over complex data but
+ * in many applications the input is real.  Real FFT algorithms take advantage
+ * of the symmetry properties of the FFT and have a speed advantage over complex
+ * algorithms of the same length.
+ * \par
+ * The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
+ * \par
+ * The real length N forward FFT of a sequence is computed using the steps shown below.
+ * \par
+ * \image html RFFT.gif "Real Fast Fourier Transform"
+ * \par
+ * The real sequence is initially treated as if it were complex to perform a CFFT.
+ * Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+ * in complex format. Except the first complex number that contains the two real numbers
+ * X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+ * contains two real values packed.
+ * \par
+ * The input for the inverse RFFT should keep the same format as the output of the 
+ * forward RFFT. A first processing stage pre-process the data to later perform an
+ * inverse CFFT.
+ * \par    
+ * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"    
+ * \par    
+ * The algorithms for floating-point, Q15, and Q31 data are slightly different
+ * and we describe each algorithm in turn.
+ * \par Floating-point
+ * The main functions are arm_rfft_fast_f32()
+ * and arm_rfft_fast_init_f32().  The older functions
+ * arm_rfft_f32() and arm_rfft_init_f32() have been
+ * deprecated but are still documented.
+ * \par
+ * The FFT of a real N-point sequence has even symmetry in the frequency
+ * domain.  The second half of the data equals the conjugate of the first half
+ * flipped in frequency:
+ * 
+ *X[0] - real data
+ *X[1] - complex data
+ *X[2] - complex data
+ *... 
+ *X[fftLen/2-1] - complex data
+ *X[fftLen/2] - real data
+ *X[fftLen/2+1] - conjugate of X[fftLen/2-1]
+ *X[fftLen/2+2] - conjugate of X[fftLen/2-2]
+ *... 
+ *X[fftLen-1] - conjugate of X[1]
+ * 

+ * Looking at the data, we see that we can uniquely represent the FFT using only
+ * 
+ *N/2+1 samples:
+ *X[0] - real data
+ *X[1] - complex data
+ *X[2] - complex data
+ *... 
+ *X[fftLen/2-1] - complex data
+ *X[fftLen/2] - real data
+ * 

+ * Looking more closely we see that the first and last samples are real valued.
+ * They can be packed together and we can thus represent the FFT of an N-point
+ * real sequence by N/2 complex values:
+ * 
+ *X[0],X[N/2] - packed real data: X[0] + jX[N/2]
+ *X[1] - complex data
+ *X[2] - complex data
+ *... 
+ *X[fftLen/2-1] - complex data
+ * 

+ * The real FFT functions pack the frequency domain data in this fashion.  The
+ * forward transform outputs the data in this form and the inverse transform
+ * expects input data in this form.  The function always performs the needed
+ * bitreversal so that the input and output data is always in normal order.  The 
+ * functions support lengths of [32, 64, 128, ..., 4096] samples.
+ * \par
+ * The forward and inverse real FFT functions apply the standard FFT scaling; no
+ * scaling on the forward transform and 1/fftLen scaling on the inverse
+ * transform.
+ * \par Q15 and Q31
+ * The real algorithms are defined in a similar manner and utilize N/2 complex
+ * transforms behind the scenes.  In the case of fixed-point data, a radix-4
+ * complex transform is performed and this limits the allows sequence lengths to
+ * 128, 512, and 2048 samples.
+ * \par
+ * TBD.  We need to document input and output order of data.
+ * \par
+ * The complex transforms used internally include scaling to prevent fixed-point
+ * overflows.  The overall scaling equals 1/(fftLen/2).
+ * \par
+ * A separate instance structure must be defined for each transform used but 
+ * twiddle factor and bit reversal tables can be reused.
+ * \par
+ * There is also an associated initialization function for each data type. 
+ * The initialization function performs the following operations:
+ * - Sets the values of the internal structure fields.   
+ * - Initializes twiddle factor table and bit reversal table pointers.
+ * - Initializes the internal complex FFT data structure.
+ * \par   
+ * Use of the initialization function is optional.   
+ * However, if the initialization function is used, then the instance structure 
+ * cannot be placed into a const data section. To place an instance structure 
+ * into a const data section, the instance structure should be manually 
+ * initialized as follows:
+ * 
+ *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
+ *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
+ * 

+ * where fftLenReal is the length of the real transform;
+ * fftLenBy2 length of  the internal complex transform.
+ * ifftFlagR Selects forward (=0) or inverse (=1) transform.
+ * bitReverseFlagR Selects bit reversed output (=0) or normal order
+ * output (=1).
+ * twidCoefRModifier stride modifier for the twiddle factor table.
+ * The value is based on the FFT length;
+ * pTwiddleARealpoints to the A array of twiddle coefficients; 
+ * pTwiddleBRealpoints to the B array of twiddle coefficients;    
+ * pCfft points to the CFFT Instance structure. The CFFT structure
+ * must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding    
+ * static initialization of the complex FFT instance structure.    
+ */
+
+/**
+* @addtogroup RealFFT
+* @{
+*/
+
+/**
+* @brief Processing function for the floating-point real FFT.
+* @param[in]  *S              points to an arm_rfft_fast_instance_f32 structure.
+* @param[in]  *p              points to the input buffer.
+* @param[in]  *pOut           points to an arm_rfft_fast_instance_f32 structure.
+* @param[in]  ifftFlag        RFFT if flag is 0, RIFFT if flag is 1
+* @return none.
+*/
+
+void arm_rfft_fast_f32(
+arm_rfft_fast_instance_f32 * S,
+float32_t * p, float32_t * pOut,
+uint8_t ifftFlag)
+{
+   arm_cfft_instance_f32 * Sint = &(S->Sint);
+   Sint->fftLen = S->fftLenRFFT / 2;
+
+   /* Calculation of Real FFT */
+   if(ifftFlag)
+   {
+      /*  Real FFT comression */
+      merge_rfft_f32(S, p, pOut);
+
+      /* Complex radix-4 IFFT process */
+      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
+   }
+   else
+   {
+      /* Calculation of RFFT of input */
+      arm_cfft_f32( Sint, p, ifftFlag, 1);
+   
+      /*  Real FFT extraction */
+      stage_rfft_f32(S, p, pOut);
+   }
+}
+
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_init_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_init_f32.c
new file mode 100644
index 0000000000..c415379422
--- /dev/null
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_fast_init_f32.c
@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
+*    
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
+*    
+* Project: 	    CMSIS DSP Library    
+* Title:	    arm_cfft_init_f32.c   
+*    
+* Description:	Split Radix Decimation in Frequency CFFT Floating point processing function   
+*    
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.   
+* -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**   
+ * @ingroup groupTransforms   
+ */
+
+/**   
+ * @addtogroup RealFFT   
+ * @{   
+ */
+
+/**   
+* @brief  Initialization function for the floating-point real FFT.  
+* @param[in,out] *S             points to an arm_rfft_fast_instance_f32 structure.
+* @param[in]     fftLen         length of the Real Sequence.  
+* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
+*   
+* \par Description:  
+* \par   
+* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
+* Set(=1) ifftFlag for calculation of CIFFT otherwise  RFFT is calculated  
+* \par   
+* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
+* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
+* \par   
+* The parameter fftLen	Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 16, 32, 64, 128, 256, 512, 1024, 2048, 4096.   
+* \par   
+* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
+*/
+arm_status arm_rfft_fast_init_f32(
+  arm_rfft_fast_instance_f32 * S,
+  uint16_t fftLen)
+{
+  arm_cfft_instance_f32 * Sint;
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+  /*  Initialise the FFT length */
+  Sint = &(S->Sint);
+  Sint->fftLen = fftLen/2;
+  S->fftLenRFFT = fftLen;
+  /*  Initialise the Twiddle coefficient pointer */
+  //  S->pTwiddle = (float32_t *) twiddleCoef;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (Sint->fftLen)
+  {
+  case 4096u:
+    /*  Initializations of structure parameters for 4096 point FFT */
+    /*  Initialise the bit reversal table length */
+    Sint->bitRevLength = ARMBITREVINDEXTABLE4096_TABLE_LENGTH;
+    /*  Initialise the bit reversal table pointer */
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable4096;
+    /*  Initialise the 1/fftLen Value */
+    break;
+  case 2048u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE2048_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
+    break;
+  case 1024u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE1024_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
+    break;
+  case 512u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
+    break;
+  case 256u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
+    break;
+  case 128u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
+    break;
+  case 64u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE__64_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
+    break;
+  case 32u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE__32_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
+    break;
+  case 16u:
+    Sint->bitRevLength = ARMBITREVINDEXTABLE__16_TABLE_LENGTH;
+    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
+    break;
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**   
+ * @} end of RealFFT group   
+ */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c
index 0133ae511c..2f0032968e 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_f32.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_init_f32.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
 
@@ -41,7 +46,7 @@
  */
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
@@ -8274,6 +8279,8 @@ static const float32_t realCoefB[8192] = {
 
 /**    
 * @brief  Initialization function for the floating-point RFFT/RIFFT.   
+* @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed
+* in the future.
 * @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.   
 * @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.   
 * @param[in]     fftLenReal     length of the FFT.   
@@ -8365,5 +8372,5 @@ arm_status arm_rfft_init_f32(
 }
 
   /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c
index 144b2d0c61..31fa6c2e54 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_init_q15.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 
@@ -41,7 +46,7 @@
  */
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
@@ -2225,5 +2230,5 @@ arm_status arm_rfft_init_q15(
 }
 
   /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c
index f2f82f73b4..da815cff05 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_init_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_init_q31.c    
@@ -11,26 +11,31 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
@@ -40,7 +45,7 @@
  */
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
@@ -4270,5 +4275,5 @@ arm_status arm_rfft_init_q31(
 }
 
   /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q15.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q15.c
index a307ecd215..0b6613cde9 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q15.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q15.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_q15.c    
@@ -12,32 +12,54 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.     
 * -------------------------------------------------------------------- */
 
-
 #include "arm_math.h"
 
-/*--------------------------------------------------------------------    
+void arm_radix4_butterfly_q15(
+  q15_t * pSrc16,
+  uint32_t fftLen,
+  q15_t * pCoef16,
+  uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_q15(
+  q15_t * pSrc16,
+  uint32_t fftLen,
+  q15_t * pCoef16,
+  uint32_t twidCoefModifier);
+
+void arm_bitreversal_q15(
+  q15_t * pSrc,
+  uint32_t fftLen,
+  uint16_t bitRevFactor,
+  uint16_t * pBitRevTab);
+	
+	/*--------------------------------------------------------------------    
 *		Internal functions prototypes    
 --------------------------------------------------------------------*/
 
@@ -58,7 +80,7 @@ void arm_split_rifft_q15(
   uint32_t modifier);
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
@@ -128,7 +150,7 @@ void arm_rfft_q15(
 }
 
   /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
 
 /**    
@@ -166,7 +188,7 @@ void arm_split_rfft_q15(
   pSrc1 = &pSrc[2];
   pSrc2 = &pSrc[(2u * fftLen) - 2u];
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -296,7 +318,7 @@ void arm_split_rfft_q15(
   pDst[0] = pSrc[0] + pSrc[1];
   pDst[1] = 0;
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
 
@@ -332,7 +354,7 @@ void arm_split_rifft_q15(
   pSrc1 = &pSrc[0];
   pSrc2 = &pSrc[2u * fftLen];
 
-#ifndef ARM_MATH_CM0
+#ifndef ARM_MATH_CM0_FAMILY
 
   /* Run the below code for Cortex-M4 and Cortex-M3 */
 
@@ -455,6 +477,6 @@ void arm_split_rifft_q15(
 
   }
 
-#endif /* #ifndef ARM_MATH_CM0 */
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
 
 }
diff --git a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q31.c b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q31.c
index c50c2951a5..488cbd9a5f 100644
--- a/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q31.c
+++ b/libraries/dsp/cmsis_dsp/TransformFunctions/arm_rfft_q31.c
@@ -1,8 +1,8 @@
 /* ----------------------------------------------------------------------    
-* Copyright (C) 2010 ARM Limited. All rights reserved.    
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
 *    
-* $Date:        15. February 2012  
-* $Revision: 	V1.1.0  
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.1  
 *    
 * Project: 	    CMSIS DSP Library    
 * Title:	    arm_rfft_q31.c    
@@ -12,30 +12,53 @@
 *    
 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
 *  
-* Version 1.1.0 2012/02/15 
-*    Updated with more optimizations, bug fixes and minor API changes.  
-*   
-* Version 1.0.10 2011/7/15  
-*    Big Endian support added and Merged M0 and M3/M4 Source code.   
-*    
-* Version 1.0.3 2010/11/29   
-*    Re-organized the CMSIS folders and updated documentation.    
-*     
-* Version 1.0.2 2010/11/11    
-*    Documentation updated.     
-*    
-* Version 1.0.1 2010/10/05     
-*    Production release and review comments incorporated.    
-*    
-* Version 1.0.0 2010/09/20     
-*    Production release and review comments incorporated.    
-*    
-* Version 0.0.7  2010/06/10     
-*    Misra-C changes done    
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.    
 * -------------------------------------------------------------------- */
 
 #include "arm_math.h"
 
+void arm_radix4_butterfly_inverse_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+q31_t * pCoef,
+uint32_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+q31_t * pSrc,
+uint32_t fftLen,
+uint16_t bitRevFactor,
+uint16_t * pBitRevTab);
+
 /*--------------------------------------------------------------------    
 *		Internal functions prototypes    
 --------------------------------------------------------------------*/
@@ -57,7 +80,7 @@ void arm_split_rifft_q31(
   uint32_t modifier);
 
 /**    
- * @addtogroup RFFT_RIFFT    
+ * @addtogroup RealFFT    
  * @{    
  */
 
@@ -129,7 +152,7 @@ void arm_rfft_q31(
 
 
   /**    
-   * @} end of RFFT_RIFFT group    
+   * @} end of RealFFT group    
    */
 
 /**    
diff --git a/libraries/dsp/cmsis_dsp/arm_common_tables.h b/libraries/dsp/cmsis_dsp/arm_common_tables.h
index 8c35ef2bd5..7a59b5923e 100644
--- a/libraries/dsp/cmsis_dsp/arm_common_tables.h
+++ b/libraries/dsp/cmsis_dsp/arm_common_tables.h
@@ -1,24 +1,41 @@
-/* ---------------------------------------------------------------------- 
-* Copyright (C) 2010 ARM Limited. All rights reserved. 
-* 
-* $Date:        11. November 2010  
-* $Revision: 	V1.0.2  
-* 
-* Project: 	    CMSIS DSP Library 
-* Title:	    arm_common_tables.h 
-* 
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions 
-* 
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
+*
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+*
 * Target Processor: Cortex-M4/Cortex-M3
-*  
-* Version 1.0.2 2010/11/11 
-*    Documentation updated.  
-* 
-* Version 1.0.1 2010/10/05  
-*    Production release and review comments incorporated. 
-* 
-* Version 1.0.0 2010/09/20  
-*    Production release and review comments incorporated. 
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
 * -------------------------------------------------------------------- */
 
 #ifndef _ARM_COMMON_TABLES_H
@@ -31,8 +48,46 @@ extern const q15_t armRecipTableQ15[64];
 extern const q31_t armRecipTableQ31[64];
 extern const q31_t realCoefAQ31[1024];
 extern const q31_t realCoefBQ31[1024];
-extern const float32_t twiddleCoef[6144];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
 extern const q31_t twiddleCoefQ31[6144];
 extern const q15_t twiddleCoefQ15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
 
 #endif /*  ARM_COMMON_TABLES_H */
diff --git a/libraries/dsp/cmsis_dsp/arm_math.h b/libraries/dsp/cmsis_dsp/arm_math.h
index a514ed6afe..0b7c6902b3 100644
--- a/libraries/dsp/cmsis_dsp/arm_math.h
+++ b/libraries/dsp/cmsis_dsp/arm_math.h
@@ -1,33 +1,41 @@
-/* ----------------------------------------------------------------------   
- * Copyright (C) 2010-2011 ARM Limited. All rights reserved.   
- *   
- * $Date:        15. February 2012  
- * $Revision: 	V1.1.0  
- *   
- * Project: 	    CMSIS DSP Library   
- * Title:	     	arm_math.h
- *   
- * Description:	 Public header file for CMSIS DSP Library
- *   
- * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
- *  
- * Version 1.1.0 2012/02/15 
- *    Updated with more optimizations, bug fixes and minor API changes.  
- *  
- * Version 1.0.10 2011/7/15 
- *    Big Endian support added and Merged M0 and M3/M4 Source code.  
- *   
- * Version 1.0.3 2010/11/29  
- *    Re-organized the CMSIS folders and updated documentation.   
- *    
- * Version 1.0.2 2010/11/11   
- *    Documentation updated.    
- *   
- * Version 1.0.1 2010/10/05    
- *    Production release and review comments incorporated.   
- *   
- * Version 1.0.0 2010/09/20    
- *    Production release and review comments incorporated.   
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
+*
+* $Date:        17. January 2013
+* $Revision:    V1.4.1
+*
+* Project:      CMSIS DSP Library
+* Title:        arm_math.h
+*
+* Description:  Public header file for CMSIS DSP Library
+*
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
  * -------------------------------------------------------------------- */
 
 /**
@@ -35,10 +43,10 @@
    *
    * Introduction
    *
-   * This user manual describes the CMSIS DSP software library, 
+   * This user manual describes the CMSIS DSP software library,
    * a suite of common signal processing functions for use on Cortex-M processor based devices.
    *
-   * The library is divided into a number of functions each covering a specific category:  
+   * The library is divided into a number of functions each covering a specific category:
    * - Basic math functions
    * - Fast math functions
    * - Complex math functions
@@ -51,41 +59,7 @@
    * - Interpolation functions
    *
    * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values. 
-   *
-   * Pre-processor Macros 
-   * 
-   * Each library project have differant pre-processor macros. 
-   * 
-   * - UNALIGNED_SUPPORT_DISABLE: 
-   * 
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access    
-   * 
-   * - ARM_MATH_BIG_ENDIAN: 
-   * 
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets. 
-   * 
-   * - ARM_MATH_MATRIX_CHECK: 
-   * 
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices 
-   * 
-   * - ARM_MATH_ROUNDING: 
-   * 
-   * Define macro ARM_MATH_ROUNDING for rounding on support functions
-   *
-   * - ARM_MATH_CMx:
-   *
-   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
-   * and ARM_MATH_CM0 for building library on cortex-M0 target.
-   * 
-   * - __FPU_PRESENT:
-   *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries 
-   *
-   * Toolchain Support
-   *
-   * The library has been developed and tested with MDK-ARM version 4.23. 
-   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
+   * 32-bit integer and 32-bit floating-point values.
    *
    * Using the Library
    *
@@ -100,33 +74,67 @@
    * - arm_cortexM0b_math.lib (Big endian on Cortex-M3)
    *
    * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single 
-   * public header file  arm_math.h for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants. 
-   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or 
-   * ARM_MATH_CM0 depending on the target processor in the application.
+   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+   * public header file  arm_math.h for Cortex-M4/M3/M0 with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   * Define the appropriate pre processor MACRO ARM_MATH_CM4 or  ARM_MATH_CM3 or
+   * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
    *
    * Examples
    *
    * The library ships with a number of examples which demonstrate how to use the library functions.
    *
+   * Toolchain Support
+   *
+   * The library has been developed and tested with MDK-ARM version 4.60.
+   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
+   *
    * Building the Library
    *
    * The library installer contains project files to re build libraries on MDK Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder.
    * - arm_cortexM0b_math.uvproj
    * - arm_cortexM0l_math.uvproj
    * - arm_cortexM3b_math.uvproj
-   * - arm_cortexM3l_math.uvproj  
+   * - arm_cortexM3l_math.uvproj
    * - arm_cortexM4b_math.uvproj
    * - arm_cortexM4l_math.uvproj
    * - arm_cortexM4bf_math.uvproj
    * - arm_cortexM4lf_math.uvproj
    *
    *
-   * The project can be built by opening the appropriate project in MDK-ARM 4.23 chain and defining the optional pre processor MACROs detailed above.
+   * The project can be built by opening the appropriate project in MDK-ARM 4.60 chain and defining the optional pre processor MACROs detailed above.
+   *
+   * Pre-processor Macros
+   *
+   * Each library project have differant pre-processor macros.
+   *
+   * - UNALIGNED_SUPPORT_DISABLE:
+   *
+   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
+   *
+   * Define macro ARM_MATH_ROUNDING for rounding on support functions
+   *
+   * - ARM_MATH_CMx:
+   *
+   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
+   * and ARM_MATH_CM0 for building library on cortex-M0 target, ARM_MATH_CM0PLUS for building library on cortex-M0+ target.
+   *
+   * - __FPU_PRESENT:
+   *
+   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
    *
    * Copyright Notice
    *
-   * Copyright (C) 2010 ARM Limited. All rights reserved.
+   * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
    */
 
 
@@ -258,20 +266,16 @@
 
 #define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
 
-#if defined (TARGET_LPC1768)
-#   define ARM_MATH_CM3    1
-
-#elif defined (TARGET_LPC11U24)
-#   define ARM_MATH_CM0    1
-#endif
-
-
 #if defined (ARM_MATH_CM4)
 #include "core_cm4.h"
 #elif defined (ARM_MATH_CM3)
 #include "core_cm3.h"
 #elif defined (ARM_MATH_CM0)
 #include "core_cm0.h"
+#define ARM_MATH_CM0_FAMILY
+#elif defined (ARM_MATH_CM0PLUS)
+#include "core_cm0plus.h"
+#define ARM_MATH_CM0_FAMILY
 #else
 #include "ARMCM4.h"
 #warning "Define either ARM_MATH_CM4 OR ARM_MATH_CM3...By Default building on ARM_MATH_CM4....."
@@ -373,17 +377,27 @@ extern "C"
   /**
    * @brief definition to read/write two 16 bit values.
    */
-#if defined  (__GNUC__)
-  #define __SIMD32(addr)         (*( int32_t **) & (addr))
-  #define  _SIMD32_OFFSET(addr)  (*( int32_t * )   (addr))
+#if defined __CC_ARM
+#define __SIMD32_TYPE int32_t __packed
+#define CMSIS_UNUSED __attribute__((unused))
+#elif defined __ICCARM__
+#define CMSIS_UNUSED
+#define __SIMD32_TYPE int32_t __packed
+#elif defined __GNUC__
+#define __SIMD32_TYPE int32_t
+#define CMSIS_UNUSED __attribute__((unused))
 #else
-  #define __SIMD32(addr)         (*(__packed                    int32_t **) & (addr))
-  #define  _SIMD32_OFFSET(addr)  (*(__packed                    int32_t * )   (addr))
-#endif 
+#error Unknown compiler
+#endif
 
-  #define __SIMD64(addr)  (*(int64_t **) & (addr))
+#define __SIMD32(addr)  (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
 
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
+#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
+
+#define __SIMD64(addr)  (*(int64_t **) & (addr))
+
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
   /**
    * @brief definition to pack two 16 bit values.
    */
@@ -417,7 +431,7 @@ extern "C"
   /**
    * @brief Clips Q63 to Q31 values.
    */
-  __STATIC_INLINE q31_t clip_q63_to_q31(
+  static __INLINE q31_t clip_q63_to_q31(
   q63_t x)
   {
     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -427,7 +441,7 @@ extern "C"
   /**
    * @brief Clips Q63 to Q15 values.
    */
-  __STATIC_INLINE q15_t clip_q63_to_q15(
+  static __INLINE q15_t clip_q63_to_q15(
   q63_t x)
   {
     return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
@@ -437,7 +451,7 @@ extern "C"
   /**
    * @brief Clips Q31 to Q7 values.
    */
-  __STATIC_INLINE q7_t clip_q31_to_q7(
+  static __INLINE q7_t clip_q31_to_q7(
   q31_t x)
   {
     return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
@@ -447,7 +461,7 @@ extern "C"
   /**
    * @brief Clips Q31 to Q15 values.
    */
-  __STATIC_INLINE q15_t clip_q31_to_q15(
+  static __INLINE q15_t clip_q31_to_q15(
   q31_t x)
   {
     return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
@@ -458,7 +472,7 @@ extern "C"
    * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
    */
 
-  __STATIC_INLINE q63_t mult32x64(
+  static __INLINE q63_t mult32x64(
   q63_t x,
   q31_t y)
   {
@@ -467,20 +481,16 @@ extern "C"
   }
 
 
-#if defined (ARM_MATH_CM0) && defined ( __CC_ARM   )
+#if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM   )
 #define __CLZ __clz
-#endif
+#elif defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) || defined (__TASKING__) )
 
-#if defined (ARM_MATH_CM0) && defined ( __TASKING__ )
-/* No need to redefine __CLZ */
-#endif
-
-#if defined (ARM_MATH_CM0) && ((defined (__ICCARM__)) ||(defined (__GNUC__)) )
-
-  __STATIC_INLINE  uint32_t __CLZ(q31_t data);
+  static __INLINE uint32_t __CLZ(
+  q31_t data);
 
 
-  __STATIC_INLINE uint32_t __CLZ(q31_t data)
+  static __INLINE uint32_t __CLZ(
+  q31_t data)
   {
     uint32_t count = 0;
     uint32_t mask = 0x80000000;
@@ -498,10 +508,10 @@ extern "C"
 #endif
 
   /**
-   * @brief Function to Calculates 1/in(reciprocal) value of Q31 Data type.
+   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
    */
 
-  __STATIC_INLINE uint32_t arm_recip_q31(
+  static __INLINE uint32_t arm_recip_q31(
   q31_t in,
   q31_t * dst,
   q31_t * pRecipTable)
@@ -550,9 +560,9 @@ extern "C"
   }
 
   /**
-   * @brief Function to Calculates 1/in(reciprocal) value of Q15 Data type.
+   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
    */
-  __STATIC_INLINE uint32_t arm_recip_q15(
+  static __INLINE uint32_t arm_recip_q15(
   q15_t in,
   q15_t * dst,
   q15_t * pRecipTable)
@@ -603,9 +613,9 @@ extern "C"
   /*
    * @brief C custom defined intrinisic function for only M0 processors
    */
-#if defined(ARM_MATH_CM0)
+#if defined(ARM_MATH_CM0_FAMILY)
 
-  __STATIC_INLINE q31_t __SSAT(
+  static __INLINE q31_t __SSAT(
   q31_t x,
   uint32_t y)
   {
@@ -641,19 +651,19 @@ extern "C"
 
   }
 
-#endif /* end of ARM_MATH_CM0 */
+#endif /* end of ARM_MATH_CM0_FAMILY */
 
 
 
   /*
    * @brief C custom defined intrinsic function for M3 and M0 processors
    */
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0)
+#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
 
   /*
    * @brief C custom defined QADD8 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QADD8(
+  static __INLINE q31_t __QADD8(
   q31_t x,
   q31_t y)
   {
@@ -680,7 +690,7 @@ extern "C"
   /*
    * @brief C custom defined QSUB8 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QSUB8(
+  static __INLINE q31_t __QSUB8(
   q31_t x,
   q31_t y)
   {
@@ -710,7 +720,7 @@ extern "C"
   /*
    * @brief C custom defined QADD16 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QADD16(
+  static __INLINE q31_t __QADD16(
   q31_t x,
   q31_t y)
   {
@@ -733,7 +743,7 @@ extern "C"
   /*
    * @brief C custom defined SHADD16 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SHADD16(
+  static __INLINE q31_t __SHADD16(
   q31_t x,
   q31_t y)
   {
@@ -756,7 +766,7 @@ extern "C"
   /*
    * @brief C custom defined QSUB16 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QSUB16(
+  static __INLINE q31_t __QSUB16(
   q31_t x,
   q31_t y)
   {
@@ -778,7 +788,7 @@ extern "C"
   /*
    * @brief C custom defined SHSUB16 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SHSUB16(
+  static __INLINE q31_t __SHSUB16(
   q31_t x,
   q31_t y)
   {
@@ -800,7 +810,7 @@ extern "C"
   /*
    * @brief C custom defined QASX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QASX(
+  static __INLINE q31_t __QASX(
   q31_t x,
   q31_t y)
   {
@@ -818,7 +828,7 @@ extern "C"
   /*
    * @brief C custom defined SHASX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SHASX(
+  static __INLINE q31_t __SHASX(
   q31_t x,
   q31_t y)
   {
@@ -841,7 +851,7 @@ extern "C"
   /*
    * @brief C custom defined QSAX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QSAX(
+  static __INLINE q31_t __QSAX(
   q31_t x,
   q31_t y)
   {
@@ -859,7 +869,7 @@ extern "C"
   /*
    * @brief C custom defined SHSAX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SHSAX(
+  static __INLINE q31_t __SHSAX(
   q31_t x,
   q31_t y)
   {
@@ -881,7 +891,7 @@ extern "C"
   /*
    * @brief C custom defined SMUSDX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMUSDX(
+  static __INLINE q31_t __SMUSDX(
   q31_t x,
   q31_t y)
   {
@@ -893,7 +903,7 @@ extern "C"
   /*
    * @brief C custom defined SMUADX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMUADX(
+  static __INLINE q31_t __SMUADX(
   q31_t x,
   q31_t y)
   {
@@ -905,7 +915,7 @@ extern "C"
   /*
    * @brief C custom defined QADD for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QADD(
+  static __INLINE q31_t __QADD(
   q31_t x,
   q31_t y)
   {
@@ -915,7 +925,7 @@ extern "C"
   /*
    * @brief C custom defined QSUB for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __QSUB(
+  static __INLINE q31_t __QSUB(
   q31_t x,
   q31_t y)
   {
@@ -925,7 +935,7 @@ extern "C"
   /*
    * @brief C custom defined SMLAD for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMLAD(
+  static __INLINE q31_t __SMLAD(
   q31_t x,
   q31_t y,
   q31_t sum)
@@ -938,7 +948,7 @@ extern "C"
   /*
    * @brief C custom defined SMLADX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMLADX(
+  static __INLINE q31_t __SMLADX(
   q31_t x,
   q31_t y,
   q31_t sum)
@@ -951,7 +961,7 @@ extern "C"
   /*
    * @brief C custom defined SMLSDX for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMLSDX(
+  static __INLINE q31_t __SMLSDX(
   q31_t x,
   q31_t y,
   q31_t sum)
@@ -964,7 +974,7 @@ extern "C"
   /*
    * @brief C custom defined SMLALD for M3 and M0 processors
    */
-  __STATIC_INLINE q63_t __SMLALD(
+  static __INLINE q63_t __SMLALD(
   q31_t x,
   q31_t y,
   q63_t sum)
@@ -977,7 +987,7 @@ extern "C"
   /*
    * @brief C custom defined SMLALDX for M3 and M0 processors
    */
-  __STATIC_INLINE q63_t __SMLALDX(
+  static __INLINE q63_t __SMLALDX(
   q31_t x,
   q31_t y,
   q63_t sum)
@@ -990,7 +1000,7 @@ extern "C"
   /*
    * @brief C custom defined SMUAD for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMUAD(
+  static __INLINE q31_t __SMUAD(
   q31_t x,
   q31_t y)
   {
@@ -1002,7 +1012,7 @@ extern "C"
   /*
    * @brief C custom defined SMUSD for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SMUSD(
+  static __INLINE q31_t __SMUSD(
   q31_t x,
   q31_t y)
   {
@@ -1015,7 +1025,7 @@ extern "C"
   /*
    * @brief C custom defined SXTB16 for M3 and M0 processors
    */
-  __STATIC_INLINE q31_t __SXTB16(
+  static __INLINE q31_t __SXTB16(
   q31_t x)
   {
 
@@ -1024,7 +1034,7 @@ extern "C"
   }
 
 
-#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0) */
+#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
 
 
   /**
@@ -1524,6 +1534,7 @@ extern "C"
    * @param[in]       *pSrcA points to the first input matrix structure
    * @param[in]       *pSrcB points to the second input matrix structure
    * @param[out]      *pDst points to output matrix structure
+   * @param[in]		  *pState points to the array for storing intermediate results
    * @return     The function returns either
    * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
@@ -1539,7 +1550,7 @@ extern "C"
    * @param[in]       *pSrcA  points to the first input matrix structure
    * @param[in]       *pSrcB  points to the second input matrix structure
    * @param[out]      *pDst   points to output matrix structure
-   * @param[in]		  *pState points to the array for storing intermediate results  
+   * @param[in]		  *pState points to the array for storing intermediate results
    * @return     The function returns either
    * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
    */
@@ -1721,7 +1732,7 @@ extern "C"
   typedef struct
   {
     q15_t A0;    /**< The derived gain, A0 = Kp + Ki + Kd . */
-#ifdef ARM_MATH_CM0
+#ifdef ARM_MATH_CM0_FAMILY
     q15_t A1;
     q15_t A2;
 #else
@@ -1939,52 +1950,8 @@ extern "C"
   uint32_t blockSize);
 
 
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q31;
 
 
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
-  } arm_cfft_radix4_instance_f32;
 
 
   /**
@@ -2002,6 +1969,43 @@ extern "C"
     uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix2_instance_q15;
 
+  arm_status arm_cfft_radix2_init_q15(
+  arm_cfft_radix2_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+  q15_t * pSrc);
+
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q15;
+
+  arm_status arm_cfft_radix4_init_q15(
+  arm_cfft_radix4_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix4_q15(
+  const arm_cfft_radix4_instance_q15 * S,
+  q15_t * pSrc);
+
   /**
    * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
    */
@@ -2017,6 +2021,42 @@ extern "C"
     uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
   } arm_cfft_radix2_instance_q31;
 
+  arm_status arm_cfft_radix2_init_q31(
+  arm_cfft_radix2_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
+  void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+  q31_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Q31 CFFT/CIFFT function.
+   */
+
+  typedef struct
+  {
+    uint16_t fftLen;                 /**< length of the FFT. */
+    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q31;
+
+
+  void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+  q31_t * pSrc);
+
+  arm_status arm_cfft_radix4_init_q31(
+  arm_cfft_radix4_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
+
   /**
    * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
@@ -2033,401 +2073,63 @@ extern "C"
     float32_t onebyfftLen;                 /**< value of 1/fftLen. */
   } arm_cfft_radix2_instance_f32;
 
-
-  /**
-   * @brief Processing function for the Q15 CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc);
-
-  /**
-   * @brief Processing function for the Q15 CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc);
-
-  /**
-   * @brief Initialization function for the Q15 CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        arm_status     function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
-   */
-
-  arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Initialization function for the Q15 CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        arm_status     function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
-   */
-
-  arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Processing function for the Q31 CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the Q31 CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc);
-
-  /**
-   * @brief  Initialization function for the Q31 CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        arm_status     function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
-   */
-
-  arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Processing function for the Radix-2 Q31 CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the Radix-2 Q31 CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc);
-
-  /**
-   * @brief  Initialization function for the Radix-2 Q31 CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the Radix-2 Q31 CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        arm_status     function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
-   */
-
-  arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-
-
-  /**
-   * @brief Processing function for the floating-point CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the floating-point CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief  Initialization function for the floating-point CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
-   */
-
+/* Deprecated */
   arm_status arm_cfft_radix2_init_f32(
   arm_cfft_radix2_instance_f32 * S,
   uint16_t fftLen,
   uint8_t ifftFlag,
   uint8_t bitReverseFlag);
 
-  /**
-   * @brief Processing function for the floating-point CFFT/CIFFT.
-   * @param[in]      *S    points to an instance of the floating-point CFFT/CIFFT structure.
-   * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.
-   * @return none.
-   */
-
-  void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
+/* Deprecated */
+  void arm_cfft_radix2_f32(
+  const arm_cfft_radix2_instance_f32 * S,
   float32_t * pSrc);
 
   /**
-   * @brief  Initialization function for the floating-point CFFT/CIFFT.
-   * @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.
-   * @param[in]     fftLen         length of the FFT.
-   * @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
 
+  typedef struct
+  {
+    uint16_t fftLen;                   /**< length of the FFT. */
+    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
+  } arm_cfft_radix4_instance_f32;
+
+/* Deprecated */
   arm_status arm_cfft_radix4_init_f32(
   arm_cfft_radix4_instance_f32 * S,
   uint16_t fftLen,
   uint8_t ifftFlag,
   uint8_t bitReverseFlag);
 
-
-
-  /*----------------------------------------------------------------------
-   *		Internal functions prototypes FFT function
-   ----------------------------------------------------------------------*/
+/* Deprecated */
+  void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+  float32_t * pSrc);
 
   /**
-   * @brief  Core function for the floating-point CFFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef           points to the twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
    */
 
-  void arm_radix4_butterfly_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier);
-
-  /**
-   * @brief  Core function for the floating-point CIFFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef           points to twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @param[in]      onebyfftLen      value of 1/fftLen.
-   * @return none.
-   */
-
-  void arm_radix4_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen);
-
-  /**
-   * @brief  In-place bit reversal function.
-   * @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.
-   * @param[in]      fftSize      length of the FFT.
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
-   * @param[in]      *pBitRevTab  points to the bit reversal table.
-   * @return none.
-   */
-
-  void arm_bitreversal_f32(
-  float32_t * pSrc,
-  uint16_t fftSize,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-  /**
-   * @brief  Core function for the Q31 CFFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
-   */
-
-  void arm_radix4_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier);
-
-  /**
-   * @brief  Core function for the f32 FFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
-   */
-
-  void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier);
-
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
-
-  void arm_radix2_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef           points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
-
-  void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-
-        /**  
-	 * @brief  Core function for the Radix-2 Q15 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q15 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef       	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
-
-  void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-
-        /**  
-	 * @brief  Core function for the Radix-2 Q31 CFFT Inverse butterfly process. 
-	 * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type. 
-	 * @param[in]      fftLen           length of the FFT. 
-	 * @param[in]      *pCoef         	points to Twiddle coefficient buffer.
-	 * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. 
-	 * @return none. 
-	 */
-
-  void arm_radix2_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-  /**
-   * @brief  Core function for the f32 IFFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of f32 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef        	  points to Twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @param[in]		 onebyfftLen	  1/fftLenfth
-   * @return none.
-   */
-
-  void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen);
-
-                                                                /**
-   * @brief  Core function for the Q31 CIFFT butterfly process.
-   * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef           points to twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
-   */
-
-  void arm_radix4_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier);
-
-  /**
-   * @brief  In-place bit reversal function.
-   * @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.
-   * @param[in]      fftLen       length of the FFT.
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-   * @param[in]      *pBitRevTab  points to bit reversal table.
-   * @return none.
-   */
-
-  void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-  /**
-   * @brief  Core function for the Q15 CFFT butterfly process.
-   * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef16         points to twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
-   */
-
-  void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
-
-
-  /**
-   * @brief  Core function for the Q15 CIFFT butterfly process.
-   * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.
-   * @param[in]      fftLen           length of the FFT.
-   * @param[in]      *pCoef16         points to twiddle coefficient buffer.
-   * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-   * @return none.
-   */
-
-  void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
-
-  /**
-   * @brief  In-place bit reversal function.
-   * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.
-   * @param[in]      fftLen       length of the FFT.
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-   * @param[in]      *pBitRevTab  points to bit reversal table.
-   * @return none.
-   */
-
-  void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
+  typedef struct
+  {
+    uint16_t fftLen;                   /**< length of the FFT. */
+    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+    uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_f32;
 
+  void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+  float32_t * p1,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag);
 
   /**
    * @brief Instance structure for the Q15 RFFT/RIFFT function.
@@ -2445,6 +2147,18 @@ extern "C"
     arm_cfft_radix4_instance_q15 *pCfft;          /**< points to the complex FFT instance. */
   } arm_rfft_instance_q15;
 
+  arm_status arm_rfft_init_q15(
+  arm_rfft_instance_q15 * S,
+  arm_cfft_radix4_instance_q15 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag);
+
+  void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+  q15_t * pSrc,
+  q15_t * pDst);
+
   /**
    * @brief Instance structure for the Q31 RFFT/RIFFT function.
    */
@@ -2461,6 +2175,18 @@ extern "C"
     arm_cfft_radix4_instance_q31 *pCfft;        /**< points to the complex FFT instance. */
   } arm_rfft_instance_q31;
 
+  arm_status arm_rfft_init_q31(
+  arm_rfft_instance_q31 * S,
+  arm_cfft_radix4_instance_q31 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag);
+
+  void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+  q31_t * pSrc,
+  q31_t * pDst);
+
   /**
    * @brief Instance structure for the floating-point RFFT/RIFFT function.
    */
@@ -2477,76 +2203,6 @@ extern "C"
     arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
   } arm_rfft_instance_f32;
 
-  /**
-   * @brief Processing function for the Q15 RFFT/RIFFT.
-   * @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.
-   * @param[in]  *pSrc points to the input buffer.
-   * @param[out] *pDst points to the output buffer.
-   * @return none.
-   */
-
-  void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst);
-
-  /**
-   * @brief  Initialization function for the Q15 RFFT/RIFFT.
-   * @param[in, out] *S             points to an instance of the Q15 RFFT/RIFFT structure.
-   * @param[in]      *S_CFFT        points to an instance of the Q15 CFFT/CIFFT structure.
-   * @param[in]      fftLenReal     length of the FFT.
-   * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-   * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
-   */
-
-  arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  /**
-   * @brief Processing function for the Q31 RFFT/RIFFT.
-   * @param[in]  *S    points to an instance of the Q31 RFFT/RIFFT structure.
-   * @param[in]  *pSrc points to the input buffer.
-   * @param[out] *pDst points to the output buffer.
-   * @return none.
-   */
-
-  void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst);
-
-  /**
-   * @brief  Initialization function for the Q31 RFFT/RIFFT.
-   * @param[in, out] *S             points to an instance of the Q31 RFFT/RIFFT structure.
-   * @param[in, out] *S_CFFT        points to an instance of the Q31 CFFT/CIFFT structure.
-   * @param[in]      fftLenReal     length of the FFT.
-   * @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-   * @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
-   */
-
-  arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  /**
-   * @brief  Initialization function for the floating-point RFFT/RIFFT.
-   * @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.
-   * @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.
-   * @param[in]     fftLenReal     length of the FFT.
-   * @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.
-   * @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.
-   * @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.
-   */
-
   arm_status arm_rfft_init_f32(
   arm_rfft_instance_f32 * S,
   arm_cfft_radix4_instance_f32 * S_CFFT,
@@ -2554,19 +2210,31 @@ extern "C"
   uint32_t ifftFlagR,
   uint32_t bitReverseFlag);
 
-  /**
-   * @brief Processing function for the floating-point RFFT/RIFFT.
-   * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.
-   * @param[in]  *pSrc points to the input buffer.
-   * @param[out] *pDst points to the output buffer.
-   * @return none.
-   */
-
   void arm_rfft_f32(
   const arm_rfft_instance_f32 * S,
   float32_t * pSrc,
   float32_t * pDst);
 
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+
+typedef struct
+  {
+    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
+    uint16_t fftLenRFFT;                        /**< length of the real sequence */
+	float32_t * pTwiddleRFFT;					/**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f32 ;
+
+arm_status arm_rfft_fast_init_f32 (
+	arm_rfft_fast_instance_f32 * S,
+	uint16_t fftLen);
+
+void arm_rfft_fast_f32(
+  arm_rfft_fast_instance_f32 * S,
+  float32_t * p, float32_t * pOut,
+  uint8_t ifftFlag);
+
   /**
    * @brief Instance structure for the floating-point DCT4/IDCT4 function.
    */
@@ -3163,7 +2831,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Copies the elements of a floating-point vector. 
+   * @brief  Copies the elements of a floating-point vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3175,7 +2843,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q7 vector. 
+   * @brief  Copies the elements of a Q7 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3187,7 +2855,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q15 vector. 
+   * @brief  Copies the elements of a Q15 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3199,7 +2867,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Copies the elements of a Q31 vector. 
+   * @brief  Copies the elements of a Q31 vector.
    * @param[in]  *pSrc input pointer
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3210,7 +2878,7 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
   /**
-   * @brief  Fills a constant value into a floating-point vector. 
+   * @brief  Fills a constant value into a floating-point vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3222,7 +2890,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q7 vector. 
+   * @brief  Fills a constant value into a Q7 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3234,7 +2902,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q15 vector. 
+   * @brief  Fills a constant value into a Q15 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3246,7 +2914,7 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief  Fills a constant value into a Q31 vector. 
+   * @brief  Fills a constant value into a Q31 vector.
    * @param[in]  value input value to be filled
    * @param[out]  *pDst output pointer
    * @param[in]  blockSize number of samples to process
@@ -3257,14 +2925,14 @@ extern "C"
   q31_t * pDst,
   uint32_t blockSize);
 
-/**  
- * @brief Convolution of floating-point sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_f32(
@@ -3274,17 +2942,17 @@ extern "C"
   uint32_t srcBLen,
   float32_t * pDst);
 
-  
-  /**   
-   * @brief Convolution of Q15 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
 
@@ -3298,14 +2966,14 @@ extern "C"
   q15_t * pScratch2);
 
 
-/**  
- * @brief Convolution of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.  
- * @param[in] srcALen length of the first input sequence.  
- * @param[in] *pSrcB points to the second input sequence.  
- * @param[in] srcBLen length of the second input sequence.  
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.  
- * @return none.  
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in] *pSrcA points to the first input sequence.
+ * @param[in] srcALen length of the first input sequence.
+ * @param[in] *pSrcB points to the second input sequence.
+ * @param[in] srcBLen length of the second input sequence.
+ * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ * @return none.
  */
 
   void arm_conv_q15(
@@ -3339,9 +3007,9 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return none.   
+   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_fast_opt_q15(
@@ -3390,16 +3058,16 @@ extern "C"
   q31_t * pDst);
 
 
-    /**   
-   * @brief Convolution of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_conv_opt_q7(
@@ -3452,18 +3120,18 @@ extern "C"
   uint32_t firstIndex,
   uint32_t numPoints);
 
-    /**   
-   * @brief Partial convolution of Q15 sequences.   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+    /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q15(
@@ -3530,9 +3198,9 @@ extern "C"
    * @param[out]      *pDst points to the block of output data
    * @param[in]       firstIndex is the first output sample to start with.
    * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_fast_opt_q15(
@@ -3591,18 +3259,18 @@ extern "C"
   uint32_t numPoints);
 
 
-  /**   
-   * @brief Partial convolution of Q7 sequences   
-   * @param[in]       *pSrcA points to the first input sequence.   
-   * @param[in]       srcALen length of the first input sequence.   
-   * @param[in]       *pSrcB points to the second input sequence.   
-   * @param[in]       srcBLen length of the second input sequence.   
-   * @param[out]      *pDst points to the block of output data   
-   * @param[in]       firstIndex is the first output sample to start with.   
-   * @param[in]       numPoints is the number of output points to be computed.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]       *pSrcA points to the first input sequence.
+   * @param[in]       srcALen length of the first input sequence.
+   * @param[in]       *pSrcB points to the second input sequence.
+   * @param[in]       srcBLen length of the second input sequence.
+   * @param[out]      *pDst points to the block of output data
+   * @param[in]       firstIndex is the first output sample to start with.
+   * @param[in]       numPoints is the number of output points to be computed.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
    */
 
   arm_status arm_conv_partial_opt_q7(
@@ -4094,8 +3762,8 @@ extern "C"
    * @brief Initialization function for the Q15 FIR lattice filter.
    * @param[in] *S points to an instance of the Q15 FIR lattice structure.
    * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages. 
-   * @param[in] *pState points to the state buffer.  The array is of length numStages. 
+   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] *pState points to the state buffer.  The array is of length numStages.
    * @return none.
    */
 
@@ -4662,15 +4330,15 @@ extern "C"
   float32_t * pDst);
 
 
-   /**   
-   * @brief Correlation of Q15 sequences   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @return none.   
+   /**
+   * @brief Correlation of Q15 sequences
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @return none.
    */
   void arm_correlate_opt_q15(
   q15_t * pSrcA,
@@ -4724,7 +4392,7 @@ extern "C"
    * @param[in] *pSrcB points to the second input sequence.
    * @param[in] srcBLen length of the second input sequence.
    * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
+   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
    * @return none.
    */
 
@@ -4772,16 +4440,16 @@ extern "C"
 
 
 
- /**   
-   * @brief Correlation of Q7 sequences.   
-   * @param[in] *pSrcA points to the first input sequence.   
-   * @param[in] srcALen length of the first input sequence.   
-   * @param[in] *pSrcB points to the second input sequence.   
-   * @param[in] srcBLen length of the second input sequence.   
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.   
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
-   * @return none.   
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in] *pSrcA points to the first input sequence.
+   * @param[in] srcALen length of the first input sequence.
+   * @param[in] *pSrcB points to the second input sequence.
+   * @param[in] srcBLen length of the second input sequence.
+   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return none.
    */
 
   void arm_correlate_opt_q7(
@@ -5027,9 +4695,9 @@ extern "C"
 
   /*
    * @brief  Floating-point sin_cos function.
-   * @param[in]  theta    input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cos output. 
+   * @param[in]  theta    input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cos output.
    * @return none.
    */
 
@@ -5040,9 +4708,9 @@ extern "C"
 
   /*
    * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees 
-   * @param[out] *pSinVal points to the processed sine output. 
-   * @param[out] *pCosVal points to the processed cosine output. 
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] *pSinVal points to the processed sine output.
+   * @param[out] *pCosVal points to the processed cosine output.
    * @return none.
    */
 
@@ -5140,7 +4808,7 @@ extern "C"
   /**
    * @defgroup PID PID Motor Control
    *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control 
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
    * loop mechanism widely used in industrial control systems.
    * A PID controller is the most commonly used type of feedback controller.
    *
@@ -5159,39 +4827,39 @@ extern "C"
    *
    * \par
    * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   * 
-   * \par 
-   * \image html PID.gif "Proportional Integral Derivative Controller" 
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
    *
    * \par
    * The PID controller calculates an "error" value as the difference between
    * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.  
-   * The proportional value determines the reaction to the current error, 
-   * the integral value determines the reaction based on the sum of recent errors, 
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
    * and the derivative value determines the reaction based on the rate at which the error has been changing.
    *
-   * \par Instance Structure 
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure. 
-   * A separate instance structure must be defined for each PID Controller. 
-   * There are separate instance structure declarations for each of the 3 supported data types. 
-   * 
-   * \par Reset Functions 
-   * There is also an associated reset function for each data type which clears the state array. 
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
    *
-   * \par Initialization Functions 
-   * There is also an associated initialization function for each data type. 
-   * The initialization function performs the following operations: 
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
    * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.   
-   * 
-   * \par 
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function. 
+   * - Zeros out the values in the state buffer.
    *
-   * \par Fixed-Point Behavior 
-   * Care must be taken when using the fixed-point versions of the PID Controller functions. 
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered. 
-   * Refer to the function specific documentation below for usage guidelines. 
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+   *
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
    */
 
   /**
@@ -5207,7 +4875,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE float32_t arm_pid_f32(
+  static __INLINE float32_t arm_pid_f32(
   arm_pid_instance_f32 * S,
   float32_t in)
   {
@@ -5233,16 +4901,16 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * Scaling and Overflow Behavior: 
-   * \par 
-   * The function is implemented using an internal 64-bit accumulator. 
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. 
-   * Thus, if the accumulator result overflows it wraps around rather than clip. 
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions. 
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format. 
+   * Scaling and Overflow Behavior:
+   * \par
+   * The function is implemented using an internal 64-bit accumulator.
+   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+   * Thus, if the accumulator result overflows it wraps around rather than clip.
+   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
    */
 
-  __STATIC_INLINE q31_t arm_pid_q31(
+  static __INLINE q31_t arm_pid_q31(
   arm_pid_instance_q31 * S,
   q31_t in)
   {
@@ -5280,48 +4948,43 @@ extern "C"
    * @param[in] in input sample to process
    * @return out processed output sample.
    *
-   * Scaling and Overflow Behavior: 
-   * \par 
-   * The function is implemented using a 64-bit internal accumulator. 
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result. 
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. 
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. 
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits. 
+   * Scaling and Overflow Behavior:
+   * \par
+   * The function is implemented using a 64-bit internal accumulator.
+   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
    * Lastly, the accumulator is saturated to yield a result in 1.15 format.
    */
 
-  __STATIC_INLINE q15_t arm_pid_q15(
+  static __INLINE q15_t arm_pid_q15(
   arm_pid_instance_q15 * S,
   q15_t in)
   {
     q63_t acc;
     q15_t out;
 
+#ifndef ARM_MATH_CM0_FAMILY
+    __SIMD32_TYPE *vstate;
+
     /* Implementation of PID controller */
 
-#ifdef ARM_MATH_CM0
-
-    /* acc = A0 * x[n]  */
-    acc = ((q31_t) S->A0) * in;
-
-#else
-
     /* acc = A0 * x[n]  */
     acc = (q31_t) __SMUAD(S->A0, in);
 
-#endif
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    vstate = __SIMD32_CONST(S->state);
+    acc = __SMLALD(S->A1, (q31_t) *vstate, acc);
 
-#ifdef ARM_MATH_CM0
+#else
+    /* acc = A0 * x[n]  */
+    acc = ((q31_t) S->A0) * in;
 
     /* acc += A1 * x[n-1] + A2 * x[n-2]  */
     acc += (q31_t) S->A1 * S->state[0];
     acc += (q31_t) S->A2 * S->state[1];
 
-#else
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc = __SMLALD(S->A1, (q31_t) __SIMD32(S->state), acc);
-
 #endif
 
     /* acc += y[n-1] */
@@ -5374,7 +5037,7 @@ extern "C"
    * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta
    * can be calculated using only Ia and Ib.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeFormula.gif
@@ -5401,7 +5064,7 @@ extern "C"
    * @return none.
    */
 
-  __STATIC_INLINE void arm_clarke_f32(
+  static __INLINE void arm_clarke_f32(
   float32_t Ia,
   float32_t Ib,
   float32_t * pIalpha,
@@ -5431,7 +5094,7 @@ extern "C"
    * There is saturation on the addition, hence there is no risk of overflow.
    */
 
-  __STATIC_INLINE void arm_clarke_q31(
+  static __INLINE void arm_clarke_q31(
   q31_t Ia,
   q31_t Ib,
   q31_t * pIalpha,
@@ -5478,8 +5141,8 @@ extern "C"
   /**
    * @defgroup inv_clarke Vector Inverse Clarke Transform
    * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   * 
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html clarkeInvFormula.gif
@@ -5506,7 +5169,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE void arm_inv_clarke_f32(
+  static __INLINE void arm_inv_clarke_f32(
   float32_t Ialpha,
   float32_t Ibeta,
   float32_t * pIa,
@@ -5521,7 +5184,7 @@ extern "C"
   }
 
   /**
-   * @brief  Inverse Clarke transform for Q31 version 
+   * @brief  Inverse Clarke transform for Q31 version
    * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
    * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
    * @param[out]      *pIa    points to output three-phase coordinate a
@@ -5535,7 +5198,7 @@ extern "C"
    * There is saturation on the subtraction, hence there is no risk of overflow.
    */
 
-  __STATIC_INLINE void arm_inv_clarke_q31(
+  static __INLINE void arm_inv_clarke_q31(
   q31_t Ialpha,
   q31_t Ibeta,
   q31_t * pIa,
@@ -5583,19 +5246,19 @@ extern "C"
    * @defgroup park Vector Park Transform
    *
    * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents 
-   * from the stationary to the moving reference frame and control the spatial relationship between 
+   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
    * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the 
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
    * current vector and the relationship from the two reference frames:
    * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkFormula.gif
-   * where Ialpha and Ibeta are the stator vector components,  
-   * pId and pIq are rotor vector components and cosVal and sinVal are the 
+   * where Ialpha and Ibeta are the stator vector components,
+   * pId and pIq are rotor vector components and cosVal and sinVal are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5622,7 +5285,7 @@ extern "C"
    *
    */
 
-  __STATIC_INLINE void arm_park_f32(
+  static __INLINE void arm_park_f32(
   float32_t Ialpha,
   float32_t Ibeta,
   float32_t * pId,
@@ -5639,7 +5302,7 @@ extern "C"
   }
 
   /**
-   * @brief  Park transform for Q31 version 
+   * @brief  Park transform for Q31 version
    * @param[in]       Ialpha input two-phase vector coordinate alpha
    * @param[in]       Ibeta  input two-phase vector coordinate beta
    * @param[out]      *pId   points to output rotor reference frame d
@@ -5656,7 +5319,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE void arm_park_q31(
+  static __INLINE void arm_park_q31(
   q31_t Ialpha,
   q31_t Ibeta,
   q31_t * pId,
@@ -5712,12 +5375,12 @@ extern "C"
    * @defgroup inv_park Vector Inverse Park transform
    * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
    *
-   * The function operates on a single sample of data and each call to the function returns the processed output. 
+   * The function operates on a single sample of data and each call to the function returns the processed output.
    * The library provides separate functions for Q31 and floating-point data types.
    * \par Algorithm
    * \image html parkInvFormula.gif
-   * where pIalpha and pIbeta are the stator vector components,  
-   * Id and Iq are rotor vector components and cosVal and sinVal are the 
+   * where pIalpha and pIbeta are the stator vector components,
+   * Id and Iq are rotor vector components and cosVal and sinVal are the
    * cosine and sine values of theta (rotor flux position).
    * \par Fixed-Point Behavior
    * Care must be taken when using the Q31 version of the Park transform.
@@ -5741,7 +5404,7 @@ extern "C"
    * @return none.
    */
 
-  __STATIC_INLINE void arm_inv_park_f32(
+  static __INLINE void arm_inv_park_f32(
   float32_t Id,
   float32_t Iq,
   float32_t * pIalpha,
@@ -5759,7 +5422,7 @@ extern "C"
 
 
   /**
-   * @brief  Inverse Park transform for	Q31 version 
+   * @brief  Inverse Park transform for	Q31 version
    * @param[in]       Id        input coordinate of rotor reference frame d
    * @param[in]       Iq        input coordinate of rotor reference frame q
    * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
@@ -5776,7 +5439,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE void arm_inv_park_q31(
+  static __INLINE void arm_inv_park_q31(
   q31_t Id,
   q31_t Iq,
   q31_t * pIalpha,
@@ -5835,7 +5498,7 @@ extern "C"
    * Linear interpolation is a method of curve fitting using linear polynomials.
    * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
    *
-   * \par 
+   * \par
    * \image html LinearInterp.gif "Linear interpolation"
    *
    * \par
@@ -5855,10 +5518,10 @@ extern "C"
    * sample of data and each call to the function returns a single processed value.
    * S points to an instance of the Linear Interpolate function data structure.
    * x is the input sample value. The functions returns the output value.
-   * 
+   *
    * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table 
-   * if x is below input range and returns last value of table if x is above range.  
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
    */
 
   /**
@@ -5874,7 +5537,7 @@ extern "C"
    *
    */
 
-  __STATIC_INLINE float32_t arm_linear_interp_f32(
+  static __INLINE float32_t arm_linear_interp_f32(
   arm_linear_interp_instance_f32 * S,
   float32_t x)
   {
@@ -5887,14 +5550,14 @@ extern "C"
     float32_t *pYData = S->pYData;               /* pointer to output table */
 
     /* Calculation of index */
-    i = (x - S->x1) / xSpacing;
+    i = (int32_t) ((x - S->x1) / xSpacing);
 
     if(i < 0)
     {
       /* Iniatilize output for below specified range as least output value of table */
       y = pYData[0];
     }
-    else if(i >= S->nValues)
+    else if((uint32_t)i >= S->nValues)
     {
       /* Iniatilize output for above specified range as last output value of table */
       y = pYData[S->nValues - 1];
@@ -5933,7 +5596,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE q31_t arm_linear_interp_q31(
+  static __INLINE q31_t arm_linear_interp_q31(
   q31_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -5948,7 +5611,7 @@ extern "C"
     /* Index value calculation */
     index = ((x & 0xFFF00000) >> 20);
 
-    if(index >= (nValues - 1))
+    if(index >= (int32_t)(nValues - 1))
     {
       return (pYData[nValues - 1]);
     }
@@ -5990,12 +5653,12 @@ extern "C"
    *
    * \par
    * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12. 
+   * This function can support maximum of table size 2^12.
    *
    */
 
 
-  __STATIC_INLINE q15_t arm_linear_interp_q15(
+  static __INLINE q15_t arm_linear_interp_q15(
   q15_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -6010,7 +5673,7 @@ extern "C"
     /* Index value calculation */
     index = ((x & 0xFFF00000) >> 20u);
 
-    if(index >= (nValues - 1))
+    if(index >= (int32_t)(nValues - 1))
     {
       return (pYData[nValues - 1]);
     }
@@ -6055,7 +5718,7 @@ extern "C"
    */
 
 
-  __STATIC_INLINE q7_t arm_linear_interp_q7(
+  static __INLINE q7_t arm_linear_interp_q7(
   q7_t * pYData,
   q31_t x,
   uint32_t nValues)
@@ -6063,22 +5726,22 @@ extern "C"
     q31_t y;                                     /* output */
     q7_t y0, y1;                                 /* Nearest output values */
     q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
+    uint32_t index;                              /* Index to read nearest output values */
 
     /* Input is in 12.20 format */
     /* 12 bits for the table index */
     /* Index value calculation */
-    index = ((x & 0xFFF00000) >> 20u);
+    if (x < 0)
+    {
+      return (pYData[0]);
+    }
+    index = (x >> 20) & 0xfff;
 
 
     if(index >= (nValues - 1))
     {
       return (pYData[nValues - 1]);
     }
-    else if(index < 0)
-    {
-      return (pYData[0]);
-    }
     else
     {
 
@@ -6170,14 +5833,14 @@ extern "C"
    * @defgroup SQRT Square Root
    *
    * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.  
+   * There are separate functions for Q15, Q31, and floating-point data types.
    * The square root function is computed using the Newton-Raphson algorithm.
    * This is an iterative algorithm of the form:
    * 
    *      x1 = x0 - f(x0)/f'(x0)
    * 

    * where x1 is the current estimate,
-   * x0 is the previous estimate and
+   * x0 is the previous estimate, and
    * f'(x0) is the derivative of f() evaluated at x0.
    * For the square root function, the algorithm reduces to:
    * 
@@ -6200,21 +5863,19 @@ extern "C"
    * in is negative value and returns zero output for negative values.
    */
 
-  __STATIC_INLINE arm_status arm_sqrt_f32(
+  static __INLINE arm_status arm_sqrt_f32(
   float32_t in,
   float32_t * pOut)
   {
     if(in > 0)
     {
 
-//    #if __FPU_USED
-    #if (__FPU_USED == 1) && defined ( __CC_ARM   )
-        *pOut = __sqrtf(in);
-    #elif (__FPU_USED == 1) && defined ( __TMS_740 )
-        *pOut = __builtin_sqrtf(in);
-    #else
-        *pOut = sqrtf(in);
-    #endif
+//      #if __FPU_USED
+#if (__FPU_USED == 1) && defined ( __CC_ARM   )
+      *pOut = __sqrtf(in);
+#else
+      *pOut = sqrtf(in);
+#endif
 
       return (ARM_MATH_SUCCESS);
     }
@@ -6262,7 +5923,7 @@ extern "C"
    * @brief floating-point Circular write function.
    */
 
-  __STATIC_INLINE void arm_circularWrite_f32(
+  static __INLINE void arm_circularWrite_f32(
   int32_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -6307,7 +5968,7 @@ extern "C"
   /**
    * @brief floating-point Circular Read function.
    */
-  __STATIC_INLINE void arm_circularRead_f32(
+  static __INLINE void arm_circularRead_f32(
   int32_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -6362,7 +6023,7 @@ extern "C"
    * @brief Q15 Circular write function.
    */
 
-  __STATIC_INLINE void arm_circularWrite_q15(
+  static __INLINE void arm_circularWrite_q15(
   q15_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -6407,7 +6068,7 @@ extern "C"
   /**
    * @brief Q15 Circular Read function.
    */
-  __STATIC_INLINE void arm_circularRead_q15(
+  static __INLINE void arm_circularRead_q15(
   q15_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -6464,7 +6125,7 @@ extern "C"
    * @brief Q7 Circular write function.
    */
 
-  __STATIC_INLINE void arm_circularWrite_q7(
+  static __INLINE void arm_circularWrite_q7(
   q7_t * circBuffer,
   int32_t L,
   uint16_t * writeOffset,
@@ -6509,7 +6170,7 @@ extern "C"
   /**
    * @brief Q7 Circular Read function.
    */
-  __STATIC_INLINE void arm_circularRead_q7(
+  static __INLINE void arm_circularRead_q7(
   q7_t * circBuffer,
   int32_t L,
   int32_t * readOffset,
@@ -7080,11 +6741,11 @@ extern "C"
   uint32_t numSamples);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q31 output vector
-   * @param[in]       blockSize length of the input vector 
-   * @return none. 
+   * @param[in]       blockSize length of the input vector
+   * @return none.
    */
   void arm_float_to_q31(
   float32_t * pSrc,
@@ -7092,10 +6753,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q15 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q15(
@@ -7104,10 +6765,10 @@ extern "C"
   uint32_t blockSize);
 
   /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector. 
-   * @param[in]       *pSrc points to the floating-point input vector 
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]       *pSrc points to the floating-point input vector
    * @param[out]      *pDst points to the Q7 output vector
-   * @param[in]       blockSize length of the input vector 
+   * @param[in]       blockSize length of the input vector
    * @return          none
    */
   void arm_float_to_q7(
@@ -7227,12 +6888,12 @@ extern "C"
    *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
    *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
    * 

-   * Note that the coordinates (x, y) contain integer and fractional components.  
+   * Note that the coordinates (x, y) contain integer and fractional components.
    * The integer components specify which portion of the table to use while the
    * fractional components control the interpolation processor.
    *
    * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output. 
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
    */
 
   /**
@@ -7250,7 +6911,7 @@ extern "C"
   */
 
 
-  __STATIC_INLINE float32_t arm_bilinear_interp_f32(
+  static __INLINE float32_t arm_bilinear_interp_f32(
   const arm_bilinear_interp_instance_f32 * S,
   float32_t X,
   float32_t Y)
@@ -7318,7 +6979,7 @@ extern "C"
   * @return out interpolated value.
   */
 
-  __STATIC_INLINE q31_t arm_bilinear_interp_q31(
+  static __INLINE q31_t arm_bilinear_interp_q31(
   arm_bilinear_interp_instance_q31 * S,
   q31_t X,
   q31_t Y)
@@ -7394,7 +7055,7 @@ extern "C"
   * @return out interpolated value.
   */
 
-  __STATIC_INLINE q15_t arm_bilinear_interp_q15(
+  static __INLINE q15_t arm_bilinear_interp_q15(
   arm_bilinear_interp_instance_q15 * S,
   q31_t X,
   q31_t Y)
@@ -7474,7 +7135,7 @@ extern "C"
   * @return out interpolated value.
   */
 
-  __STATIC_INLINE q7_t arm_bilinear_interp_q7(
+  static __INLINE q7_t arm_bilinear_interp_q7(
   arm_bilinear_interp_instance_q7 * S,
   q31_t X,
   q31_t Y)
@@ -7547,6 +7208,84 @@ extern "C"
    */
 
 
+#if   defined ( __CC_ARM ) //Keil
+//SMMLAR
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+//SMMLSR
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+//SMMULR
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+
+//Enter low optimization region - place directly above function definition
+  #define LOW_OPTIMIZATION_ENTER \
+     _Pragma ("push")         \
+     _Pragma ("O1")
+
+//Exit low optimization region - place directly after end of function definition
+  #define LOW_OPTIMIZATION_EXIT \
+     _Pragma ("pop")
+
+//Enter low optimization region - place directly above function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+//Exit low optimization region - place directly after end of function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__ICCARM__) //IAR
+ //SMMLA
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a += (q31_t) (((q63_t) x * y) >> 32)
+
+ //SMMLS
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a -= (q31_t) (((q63_t) x * y) >> 32)
+
+//SMMUL
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y ) >> 32)
+
+//Enter low optimization region - place directly above function definition
+  #define LOW_OPTIMIZATION_ENTER \
+     _Pragma ("optimize=low")
+
+//Exit low optimization region - place directly after end of function definition
+  #define LOW_OPTIMIZATION_EXIT
+
+//Enter low optimization region - place directly above function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
+     _Pragma ("optimize=low")
+
+//Exit low optimization region - place directly after end of function definition
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined(__GNUC__)
+ //SMMLA
+  #define multAcc_32x32_keep32_R(a, x, y) \
+  a += (q31_t) (((q63_t) x * y) >> 32)
+
+ //SMMLS
+  #define multSub_32x32_keep32_R(a, x, y) \
+  a -= (q31_t) (((q63_t) x * y) >> 32)
+
+//SMMUL
+  #define mult_32x32_keep32_R(a, x, y) \
+  a = (q31_t) (((q63_t) x * y ) >> 32)
+
+  #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
+
+  #define LOW_OPTIMIZATION_EXIT
+
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#endif
+
 
 
 
diff --git a/libraries/dsp/cmsis_dsp/math_helper.h b/libraries/dsp/cmsis_dsp/math_helper.h
index 934a75d45c..749f00d433 100644
--- a/libraries/dsp/cmsis_dsp/math_helper.h
+++ b/libraries/dsp/cmsis_dsp/math_helper.h
@@ -1,32 +1,42 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010 ARM Limited. All rights reserved.  
-*  
-* $Date:        29. November 2010  
-* $Revision: 	V1.0.3  
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
 *  
 * Project: 	    CMSIS DSP Library 
 *
 * Title:	    math_helper.h
 * 
-*
 * Description:	Prototypes of all helper functions required.  
 *
 * Target Processor: Cortex-M4/Cortex-M3
 *  
-* Version 1.0.3 2010/11/29 
-*    Re-organized the CMSIS folders and updated documentation.  
-*   
-* Version 1.0.2 2010/11/11  
-*    Documentation updated.   
-*  
-* Version 1.0.1 2010/10/05   
-*    Production release and review comments incorporated.  
-*  
-* Version 1.0.0 2010/09/20   
-*    Production release and review comments incorporated.  
-*  
-* Version 0.0.7  2010/06/10   
-*    Misra-C changes done 
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
 * -------------------------------------------------------------------- */
 
 
diff --git a/libraries/tests/dsp/cmsis/fir_f32/main.cpp b/libraries/tests/dsp/cmsis/fir_f32/main.cpp
index 990bf7b00c..092a25de28 100644
--- a/libraries/tests/dsp/cmsis/fir_f32/main.cpp
+++ b/libraries/tests/dsp/cmsis/fir_f32/main.cpp
@@ -38,7 +38,7 @@ const float32_t firCoeffs32[NUM_TAPS] = {
 /* ---------------------------------------------------------------------- 
  * FIR LPF Example 
  * ------------------------------------------------------------------- */
-int32_t main(void) { 
+int main(void) { 
     /* Call FIR init function to initialize the instance structure. */
     arm_fir_instance_f32 S;
     arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], BLOCK_SIZE); 
diff --git a/workspace_tools/libraries.py b/workspace_tools/libraries.py
index 1eca5e1413..95040f7573 100644
--- a/workspace_tools/libraries.py
+++ b/workspace_tools/libraries.py
@@ -55,14 +55,12 @@ LIBRARIES = [
         "source_dir": DSP_CMSIS,
         "build_dir": DSP_LIBRARIES,
         "dependencies": [MBED_LIBRARIES],
-        "supported": CORTEX_ARM_SUPPORT
     },
     {
         "id": "dsp",
         "source_dir": DSP_ABSTRACTION,
         "build_dir": DSP_LIBRARIES,
         "dependencies": [MBED_LIBRARIES, DSP_CMSIS],
-        "supported": CORTEX_ARM_SUPPORT
     },
     
     # Network libraries
diff --git a/workspace_tools/tests.py b/workspace_tools/tests.py
index f649ce4375..9d7630f0c0 100644
--- a/workspace_tools/tests.py
+++ b/workspace_tools/tests.py
@@ -611,7 +611,6 @@ TESTS = [
         "id": "CMSIS_DSP_1", "description": "FIR",
         "source_dir": join(TEST_DIR, "dsp", "cmsis", "fir_f32"),
         "dependencies": [MBED_LIBRARIES, DSP_LIBRARIES],
-        "supported": CORTEX_ARM_SUPPORT,
     },
     
     # mbed DSP
@@ -619,7 +618,6 @@ TESTS = [
         "id": "DSP_1", "description": "FIR",
         "source_dir": join(TEST_DIR, "dsp", "mbed", "fir_f32"),
         "dependencies": [MBED_LIBRARIES, DSP_LIBRARIES],
-        "supported": CORTEX_ARM_SUPPORT,
     },
     
     # KL25Z
diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py
index ea8ae58f23..6cf314c12e 100644
--- a/workspace_tools/toolchains/__init__.py
+++ b/workspace_tools/toolchains/__init__.py
@@ -139,7 +139,7 @@ class mbedToolchain:
     CORTEX_SYMBOLS = {
         "Cortex-M3" : ["__CORTEX_M3", "ARM_MATH_CM3"],
         "Cortex-M0" : ["__CORTEX_M0", "ARM_MATH_CM0"],
-        "Cortex-M0+": ["__CORTEX_M0PLUS", "ARM_MATH_CM0"],
+        "Cortex-M0+": ["__CORTEX_M0PLUS", "ARM_MATH_CM0PLUS"],
         "Cortex-M4" : ["__CORTEX_M4", "ARM_MATH_CM4", "__FPU_PRESENT=1"],
     }
 
@@ -325,7 +325,7 @@ class mbedToolchain:
             object = self.relative_object_path(build_path, base_path, source)
             if self.need_update(object, [source]):
                 self.progress("assemble", source, build_update=True)
-                self.assemble(source, object)
+                self.assemble(source, object, inc_paths)
             objects.append(object)
         
         # The dependency checking for C/C++ is delegated to the specific compiler
diff --git a/workspace_tools/toolchains/arm.py b/workspace_tools/toolchains/arm.py
index 5c96c9778b..4a3e714eb7 100644
--- a/workspace_tools/toolchains/arm.py
+++ b/workspace_tools/toolchains/arm.py
@@ -58,7 +58,7 @@ class ARM(mbedToolchain):
             '-I%s' % ARM_INC
         ]
         
-        self.asm = [main_cc] + common
+        self.asm = [main_cc] + common + ['-I%s' % ARM_INC]
         if not "analyze" in self.options:
             self.cc = [main_cc] + common + common_c + ["--c99"]
             self.cppc = [main_cc] + common + common_c + ["--cpp", "--no_rtti"]
@@ -77,8 +77,11 @@ class ARM(mbedToolchain):
             if option in tool:
                 tool.remove(option)
     
-    def assemble(self, source, object):
-        self.default_cmd(self.cc + ["-o", object, source])
+    def assemble(self, source, object, includes):
+        # Preprocess first, then assemble
+        tempfile = object + '.E.s'
+        self.default_cmd(self.asm + ['-D%s' % s for s in self.get_symbols() + self.macros] + ["-I%s" % i for i in includes] + ["-E", "-o", tempfile, source])
+        self.default_cmd(self.asm + ["-o", object, tempfile])
     
     def parse_dependencies(self, dep_path):
         dependencies = []
diff --git a/workspace_tools/toolchains/gcc.py b/workspace_tools/toolchains/gcc.py
index 9644648039..1eaeffa16c 100644
--- a/workspace_tools/toolchains/gcc.py
+++ b/workspace_tools/toolchains/gcc.py
@@ -60,10 +60,9 @@ class GCC(mbedToolchain):
         if "debug-info" in self.options:
             common_flags.append("-g")
 
-        self.asm = [join(tool_path, "arm-none-eabi-as")] + self.cpu
-
         main_cc = join(tool_path, "arm-none-eabi-gcc")
         main_cppc = join(tool_path, "arm-none-eabi-g++")
+        self.asm = [main_cc, "-x", "assembler-with-cpp"] + common_flags
         if not "analyze" in self.options:
             self.cc  = [main_cc, "-std=gnu99"] + common_flags
             self.cppc =[main_cppc, "-std=gnu++98"] + common_flags
@@ -77,8 +76,8 @@ class GCC(mbedToolchain):
         self.ar = join(tool_path, "arm-none-eabi-ar")
         self.elf2bin = join(tool_path, "arm-none-eabi-objcopy")
     
-    def assemble(self, source, object):
-        self.default_cmd(self.asm + ["-o", object, source])
+    def assemble(self, source, object, includes):
+        self.default_cmd(self.asm + ['-D%s' % s for s in self.get_symbols() + self.macros] + ["-I%s" % i for i in includes] + ["-o", object, source])
     
     def parse_dependencies(self, dep_path):
         dependencies = []
diff --git a/workspace_tools/toolchains/iar.py b/workspace_tools/toolchains/iar.py
index f6a6741d84..87fcbe9781 100644
--- a/workspace_tools/toolchains/iar.py
+++ b/workspace_tools/toolchains/iar.py
@@ -90,8 +90,8 @@ class IAR(mbedToolchain):
         return [path.strip() for path in open(dep_path).readlines()
                 if (path and not path.isspace())]
     
-    def assemble(self, source, object):
-        self.default_cmd(self.asm + ["-o", object, source])
+    def assemble(self, source, object, includes):
+        self.default_cmd(self.asm + ['-D%s' % s for s in self.get_symbols() + self.macros] + ["-I%s" % i for i in includes] + ["-o", object, source])
     
     def archive(self, objects, lib_path):
         if exists(lib_path):

From bd89e121e570cbe4e97ed88df2d52239af25fc4d Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Fri, 8 Nov 2013 17:52:10 +0200
Subject: [PATCH 108/117] Added build script for travis (build_travis.py)

---
 .travis.yml                     |  2 +-
 workspace_tools/build_travis.py | 35 +++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 1 deletion(-)
 create mode 100644 workspace_tools/build_travis.py

diff --git a/.travis.yml b/.travis.yml
index 4cad481375..37ad3c41e5 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -2,4 +2,4 @@
 install: "sudo $TRAVIS_BUILD_DIR/travis/install_dependencies.sh > /dev/null"
 python: 
   - "2.7"
-script: "python workspace_tools/build.py -r -e -U -u -d -b -t GCC_ARM"
+script: "python workspace_tools/build_travis.py"
diff --git a/workspace_tools/build_travis.py b/workspace_tools/build_travis.py
new file mode 100644
index 0000000000..595650a363
--- /dev/null
+++ b/workspace_tools/build_travis.py
@@ -0,0 +1,35 @@
+# Travis-CI build script
+
+import os
+import sys
+
+################################################################################
+# Configure builds here
+# "libs" can contain "dsp", "rtos", "eth", "usb_host", "usb", "ublox"
+
+build_list = (
+    { "target": "LPC1768",  "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "eth", "usb_host", "usb", "ublox"] },
+    { "target": "KL25Z",    "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
+    { "target": "LPC4088",  "toolchains": "GCC_ARM", "libs": ["dsp", "rtos", "usb"] },
+)
+
+################################################################################
+# Driver
+
+def run_builds(dry_run):
+    for build in build_list:
+        toolchain_list = build["toolchains"]
+        if type(toolchain_list) != type([]): toolchain_list = [toolchain_list]
+        for toolchain in toolchain_list:
+            cmdline = "python workspace_tools/build.py -m %s -t %s -c " % (build["target"], toolchain)
+            libs = build.get("libs", [])
+            if libs:
+                cmdline = cmdline + " ".join(["--" + l for l in libs])
+            if dry_run:
+                print(cmdline)
+            else:
+                if os.system(cmdline) != 0:
+                    sys.exit(1)
+
+if __name__ == "__main__":
+    run_builds("-s" in sys.argv)

From 15422b3a67f7e3d63710b23d79c832271feec5c1 Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Fri, 8 Nov 2013 18:21:58 +0200
Subject: [PATCH 109/117] Travis-CI: display the build command before running
 it

---
 workspace_tools/build_travis.py | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/workspace_tools/build_travis.py b/workspace_tools/build_travis.py
index 595650a363..83f3ead72d 100644
--- a/workspace_tools/build_travis.py
+++ b/workspace_tools/build_travis.py
@@ -25,9 +25,8 @@ def run_builds(dry_run):
             libs = build.get("libs", [])
             if libs:
                 cmdline = cmdline + " ".join(["--" + l for l in libs])
-            if dry_run:
-                print(cmdline)
-            else:
+            print "Executing: " + cmdline
+            if not dry_run:
                 if os.system(cmdline) != 0:
                     sys.exit(1)
 

From 76ffc4935ec263f436c55aa9f8dce08bc2bb754d Mon Sep 17 00:00:00 2001
From: Joris Aerts 
Date: Fri, 8 Nov 2013 13:39:00 -0800
Subject: [PATCH 110/117] Fix bug in gpio_set not setting reserved pins
 correctly

Loop going over reserved pins was not going over all entries as result of incorrect sizeof
---
 .../mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c
index 7ed3ed91a3..60610ac90e 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/gpio_api.c
@@ -24,7 +24,7 @@ uint32_t gpio_set(PinName pin) {
     unsigned i;
     int f = 0;
 
-    for (i = 0; i < sizeof(reserved_pins) / sizeof(int); i ++)
+    for (i = 0; i < sizeof(reserved_pins) / sizeof(PinName); i ++)
         if (pin == reserved_pins[i]) {
             f = 1;
             break;

From 5b6faea448cdb6aad9914d535a27bab7fc4de05a Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Mon, 11 Nov 2013 13:28:18 +0200
Subject: [PATCH 111/117] Removed redundant label TARGET_LPC81X_COMMON

---
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/LPC8xx.h         | 0
 .../{TARGET_LPC81X_COMMON => }/TOOLCHAIN_ARM_MICRO/sys.cpp    | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis.h          | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis_nvic.c     | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis_nvic.h     | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/system_LPC8xx.h  | 0
 .../{TARGET_LPC81X_COMMON => }/PeripheralNames.h              | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/PortNames.h      | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/device.h         | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_api.c       | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_irq_api.c   | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_object.h    | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/i2c_api.c        | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/objects.h        | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/pinmap.c         | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/serial_api.c     | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/spi_api.c        | 0
 .../TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/us_ticker.c      | 0
 workspace_tools/targets.py                                    | 4 ++--
 19 files changed, 2 insertions(+), 2 deletions(-)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/LPC8xx.h (100%)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/TOOLCHAIN_ARM_MICRO/sys.cpp (100%)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis.h (100%)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis_nvic.c (100%)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/cmsis_nvic.h (100%)
 rename libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/system_LPC8xx.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/PeripheralNames.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/PortNames.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/device.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_api.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_irq_api.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/gpio_object.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/i2c_api.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/objects.h (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/pinmap.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/serial_api.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/spi_api.c (100%)
 rename libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/{TARGET_LPC81X_COMMON => }/us_ticker.c (100%)

diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/LPC8xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/LPC8xx.h
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/LPC8xx.h
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/LPC8xx.h
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/TOOLCHAIN_ARM_MICRO/sys.cpp b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TOOLCHAIN_ARM_MICRO/sys.cpp
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/TOOLCHAIN_ARM_MICRO/sys.cpp
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TOOLCHAIN_ARM_MICRO/sys.cpp
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis.h
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis.h
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis.h
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis_nvic.c
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis_nvic.c
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis_nvic.c
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis_nvic.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis_nvic.h
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/cmsis_nvic.h
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/cmsis_nvic.h
diff --git a/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/system_LPC8xx.h b/libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/system_LPC8xx.h
similarity index 100%
rename from libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/system_LPC8xx.h
rename to libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC81X/system_LPC8xx.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/PeripheralNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/PeripheralNames.h
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/PeripheralNames.h
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/PeripheralNames.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/PortNames.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/PortNames.h
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/PortNames.h
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/PortNames.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/device.h
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/device.h
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/device.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_api.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_api.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_api.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_irq_api.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_irq_api.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_irq_api.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_object.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_object.h
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/gpio_object.h
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/gpio_object.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/i2c_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/i2c_api.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/i2c_api.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/i2c_api.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/objects.h b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/objects.h
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/objects.h
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/objects.h
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/pinmap.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pinmap.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/pinmap.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/pinmap.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/serial_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/serial_api.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/spi_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/spi_api.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/spi_api.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/spi_api.c
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/us_ticker.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/us_ticker.c
similarity index 100%
rename from libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/TARGET_LPC81X_COMMON/us_ticker.c
rename to libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC81X/us_ticker.c
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index 33669de513..f61fc5dbe6 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -139,7 +139,7 @@ class LPC812(Target):
         
         self.core = "Cortex-M0+"
         
-        self.extra_labels = ['NXP', 'LPC81X', 'LPC81X_COMMON']
+        self.extra_labels = ['NXP', 'LPC81X']
         
         self.supported_toolchains = ["uARM"]
         
@@ -152,7 +152,7 @@ class LPC810(Target):
         
         self.core = "Cortex-M0+"
         
-        self.extra_labels = ['NXP', 'LPC81X', 'LPC81X_COMMON']
+        self.extra_labels = ['NXP', 'LPC81X']
         
         self.supported_toolchains = ["uARM"]
         

From b2733e9b9af906952b295cd6abcf916bf79780ab Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Mon, 11 Nov 2013 15:13:27 +0200
Subject: [PATCH 112/117] Added preliminary support for nRF51822 as a target

No actual files for the target, just the target definition for now, so it
can't be compiled yet.
---
 workspace_tools/targets.py | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index f61fc5dbe6..5894fe2b19 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -303,6 +303,16 @@ class LPC11U35_401(Target):
 
         self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
 
+class nRF51822(Target):
+    def __init__(self):
+        Target.__init__(self)
+
+        self.core = "Cortex-M0"
+
+        self.extra_labels = ["NORDIC"]
+
+        self.supported_toolchains = ["ARM"]
+
 # Get a single instance for each target
 TARGETS = [
     LPC2368(),
@@ -322,7 +332,8 @@ TARGETS = [
     LPC1114(),
     LPC11C24(),
     LPC11U35_401(),
-    LPC4088_EA()
+    LPC4088_EA(),
+    nRF51822()
 ]
 
 # Map each target name to its unique instance

From 0c62e8462370f2e3d9c401ac1285871571d7c47a Mon Sep 17 00:00:00 2001
From: Mihail Stoyanov 
Date: Thu, 14 Nov 2013 16:24:51 +0000
Subject: [PATCH 113/117] Added support to export mbed special .bld and .lib
 files Added support to export repositories for seamless offline setup

---
 workspace_tools/export/exporters.py    | 19 +++++++++---
 workspace_tools/toolchains/__init__.py | 40 ++++++++++++++++++++++++--
 2 files changed, 52 insertions(+), 7 deletions(-)

diff --git a/workspace_tools/export/exporters.py b/workspace_tools/export/exporters.py
index d7353e9898..3debb6ccdf 100644
--- a/workspace_tools/export/exporters.py
+++ b/workspace_tools/export/exporters.py
@@ -5,6 +5,7 @@ from jinja2 import Template
 from contextlib import closing
 from zipfile import ZipFile, ZIP_DEFLATED
 
+from workspace_tools.utils import mkdir
 from workspace_tools.toolchains import TOOLCHAIN_CLASSES
 from workspace_tools.targets import TARGET_MAP
 
@@ -27,17 +28,22 @@ class Exporter():
     def __scan_and_copy(self, src_path, trg_path):
         resources = self.toolchain.scan_resources(src_path)
         
-        for r_type in ['headers', 's_sources', 'c_sources', 'cpp_sources', 'objects', 'libraries', 'linker_script']:
+        for r_type in ['headers', 's_sources', 'c_sources', 'cpp_sources',
+            'objects', 'libraries', 'linker_script',
+            'lib_builds', 'lib_refs', 'repo_files']:
             r = getattr(resources, r_type)
             if r:
                 self.toolchain.copy_files(r, trg_path, rel_path=src_path)
-        return resources.lib_builds
+        return resources
     
     def scan_and_copy_resources(self, prj_path, trg_path):
         # Copy only the file for the required target and toolchain
         lib_builds = []
+        repo_dirs = []
         for src in ['lib', 'src']:
-            lib_builds.extend(self.__scan_and_copy(join(prj_path, src), trg_path))
+            resources = self.__scan_and_copy(join(prj_path, src), trg_path)
+            lib_builds.extend(resources.lib_builds)
+            repo_dirs.extend(resources.repo_dirs)
         
         # The libraries builds
         for bld in lib_builds:
@@ -45,7 +51,12 @@ class Exporter():
             lib_data = self.build_url_resolver(build_url)
             lib_path = lib_data['path'].rstrip('\\/')
             self.__scan_and_copy(lib_path, join(trg_path, lib_data['name']))
-        
+            # create .hg dir in build dir so it's ignored when versioning
+            hgdir = join(trg_path, lib_data['name'], '.hg')
+            mkdir(hgdir)
+            fhandle = file(join(hgdir, 'keep.me'), 'a')
+            fhandle.close()
+
         # Final scan of the actual exported resources
         self.resources = self.toolchain.scan_resources(trg_path)
         self.resources.relative_to(trg_path, self.DOT_IN_RELATIVE_PATH)
diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py
index a5ee60d497..88bce40702 100644
--- a/workspace_tools/toolchains/__init__.py
+++ b/workspace_tools/toolchains/__init__.py
@@ -59,6 +59,10 @@ class Resources:
         
         # mbed special files
         self.lib_builds = []
+        self.lib_refs = []
+        
+        self.repo_dirs = []
+        self.repo_files = []
         
         self.linker_script = None
     
@@ -75,13 +79,18 @@ class Resources:
         self.libraries += resources.libraries
         
         self.lib_builds += resources.lib_builds
+        self.lib_refs += resources.lib_refs
+        
+        self.repo_dirs += resources.repo_dirs
+        self.repo_files += resources.repo_files
         
         if resources.linker_script is not None:
             self.linker_script = resources.linker_script
     
     def relative_to(self, base, dot=False):
         for field in ['inc_dirs', 'headers', 's_sources', 'c_sources',
-                      'cpp_sources', 'lib_dirs', 'objects', 'libraries']:
+                      'cpp_sources', 'lib_dirs', 'objects', 'libraries',
+                      'lib_builds', 'lib_refs', 'repo_dirs', 'repo_files']:
             v = [rel_path(f, base, dot) for f in getattr(self, field)]
             setattr(self, field, v)
         if self.linker_script is not None:
@@ -89,7 +98,8 @@ class Resources:
     
     def win_to_unix(self):
         for field in ['inc_dirs', 'headers', 's_sources', 'c_sources',
-                      'cpp_sources', 'lib_dirs', 'objects', 'libraries']:
+                      'cpp_sources', 'lib_dirs', 'objects', 'libraries',
+                      'lib_builds', 'lib_refs', 'repo_dirs', 'repo_files']:
             v = [f.replace('\\', '/') for f in getattr(self, field)]
             setattr(self, field, v)
         if self.linker_script is not None:
@@ -240,6 +250,11 @@ class mbedToolchain:
         for root, dirs, files in walk(path):
             # Remove ignored directories
             for d in copy(dirs):
+                if d == '.hg':
+                    dir_path = join(root, d)
+                    resources.repo_dirs.append(dir_path)
+                    resources.repo_files.extend(self.scan_repository(dir_path))
+
                 if ((d.startswith('.') or d in self.legacy_ignore_dirs) or
                     (d.startswith('TARGET_') and d[7:] not in labels['TARGET']) or
                     (d.startswith('TOOLCHAIN_') and d[10:] not in labels['TOOLCHAIN'])):
@@ -275,11 +290,30 @@ class mbedToolchain:
                 elif ext == self.LINKER_EXT:
                     resources.linker_script = file_path
                 
+                elif ext == '.lib':
+                    resources.lib_refs.append(file_path)
                 elif ext == '.bld':
                     resources.lib_builds.append(file_path)
+                elif file == '.hgignore':
+                    resources.repo_files.append(file_path)
         
         return resources
-    
+
+    def scan_repository(self, path):
+        resources = []
+        
+        for root, dirs, files in walk(path):
+            # Remove ignored directories
+            for d in copy(dirs):
+                if d == '.' or d == '..':
+                    dirs.remove(d)
+            
+            for file in files:
+                file_path = join(root, file)
+                resources.append(file_path)
+        
+        return resources
+
     def copy_files(self, files_paths, trg_path, rel_path=None):
         # Handle a single file
         if type(files_paths) != ListType: files_paths = [files_paths]

From b43e947c3beee6fdc5b447c978bbf1617fbc3d2f Mon Sep 17 00:00:00 2001
From: Mihail Stoyanov 
Date: Thu, 14 Nov 2013 18:45:14 +0200
Subject: [PATCH 114/117] Added support to export mbed special .bld and .lib
 files

Added support to export repositories for seamless offline setup
---
 workspace_tools/export/exporters.py    | 19 +++++++++---
 workspace_tools/toolchains/__init__.py | 40 ++++++++++++++++++++++++--
 2 files changed, 52 insertions(+), 7 deletions(-)

diff --git a/workspace_tools/export/exporters.py b/workspace_tools/export/exporters.py
index d7353e9898..3debb6ccdf 100644
--- a/workspace_tools/export/exporters.py
+++ b/workspace_tools/export/exporters.py
@@ -5,6 +5,7 @@ from jinja2 import Template
 from contextlib import closing
 from zipfile import ZipFile, ZIP_DEFLATED
 
+from workspace_tools.utils import mkdir
 from workspace_tools.toolchains import TOOLCHAIN_CLASSES
 from workspace_tools.targets import TARGET_MAP
 
@@ -27,17 +28,22 @@ class Exporter():
     def __scan_and_copy(self, src_path, trg_path):
         resources = self.toolchain.scan_resources(src_path)
         
-        for r_type in ['headers', 's_sources', 'c_sources', 'cpp_sources', 'objects', 'libraries', 'linker_script']:
+        for r_type in ['headers', 's_sources', 'c_sources', 'cpp_sources',
+            'objects', 'libraries', 'linker_script',
+            'lib_builds', 'lib_refs', 'repo_files']:
             r = getattr(resources, r_type)
             if r:
                 self.toolchain.copy_files(r, trg_path, rel_path=src_path)
-        return resources.lib_builds
+        return resources
     
     def scan_and_copy_resources(self, prj_path, trg_path):
         # Copy only the file for the required target and toolchain
         lib_builds = []
+        repo_dirs = []
         for src in ['lib', 'src']:
-            lib_builds.extend(self.__scan_and_copy(join(prj_path, src), trg_path))
+            resources = self.__scan_and_copy(join(prj_path, src), trg_path)
+            lib_builds.extend(resources.lib_builds)
+            repo_dirs.extend(resources.repo_dirs)
         
         # The libraries builds
         for bld in lib_builds:
@@ -45,7 +51,12 @@ class Exporter():
             lib_data = self.build_url_resolver(build_url)
             lib_path = lib_data['path'].rstrip('\\/')
             self.__scan_and_copy(lib_path, join(trg_path, lib_data['name']))
-        
+            # create .hg dir in build dir so it's ignored when versioning
+            hgdir = join(trg_path, lib_data['name'], '.hg')
+            mkdir(hgdir)
+            fhandle = file(join(hgdir, 'keep.me'), 'a')
+            fhandle.close()
+
         # Final scan of the actual exported resources
         self.resources = self.toolchain.scan_resources(trg_path)
         self.resources.relative_to(trg_path, self.DOT_IN_RELATIVE_PATH)
diff --git a/workspace_tools/toolchains/__init__.py b/workspace_tools/toolchains/__init__.py
index 6cf314c12e..c3b4e1c637 100644
--- a/workspace_tools/toolchains/__init__.py
+++ b/workspace_tools/toolchains/__init__.py
@@ -59,6 +59,10 @@ class Resources:
         
         # mbed special files
         self.lib_builds = []
+        self.lib_refs = []
+        
+        self.repo_dirs = []
+        self.repo_files = []
         
         self.linker_script = None
     
@@ -75,13 +79,18 @@ class Resources:
         self.libraries += resources.libraries
         
         self.lib_builds += resources.lib_builds
+        self.lib_refs += resources.lib_refs
+        
+        self.repo_dirs += resources.repo_dirs
+        self.repo_files += resources.repo_files
         
         if resources.linker_script is not None:
             self.linker_script = resources.linker_script
     
     def relative_to(self, base, dot=False):
         for field in ['inc_dirs', 'headers', 's_sources', 'c_sources',
-                      'cpp_sources', 'lib_dirs', 'objects', 'libraries']:
+                      'cpp_sources', 'lib_dirs', 'objects', 'libraries',
+                      'lib_builds', 'lib_refs', 'repo_dirs', 'repo_files']:
             v = [rel_path(f, base, dot) for f in getattr(self, field)]
             setattr(self, field, v)
         if self.linker_script is not None:
@@ -89,7 +98,8 @@ class Resources:
     
     def win_to_unix(self):
         for field in ['inc_dirs', 'headers', 's_sources', 'c_sources',
-                      'cpp_sources', 'lib_dirs', 'objects', 'libraries']:
+                      'cpp_sources', 'lib_dirs', 'objects', 'libraries',
+                      'lib_builds', 'lib_refs', 'repo_dirs', 'repo_files']:
             v = [f.replace('\\', '/') for f in getattr(self, field)]
             setattr(self, field, v)
         if self.linker_script is not None:
@@ -244,6 +254,11 @@ class mbedToolchain:
         for root, dirs, files in walk(path):
             # Remove ignored directories
             for d in copy(dirs):
+                if d == '.hg':
+                    dir_path = join(root, d)
+                    resources.repo_dirs.append(dir_path)
+                    resources.repo_files.extend(self.scan_repository(dir_path))
+
                 if ((d.startswith('.') or d in self.legacy_ignore_dirs) or
                     (d.startswith('TARGET_') and d[7:] not in labels['TARGET']) or
                     (d.startswith('TOOLCHAIN_') and d[10:] not in labels['TOOLCHAIN'])):
@@ -281,11 +296,30 @@ class mbedToolchain:
                 elif ext == self.LINKER_EXT:
                     resources.linker_script = file_path
                 
+                elif ext == '.lib':
+                    resources.lib_refs.append(file_path)
                 elif ext == '.bld':
                     resources.lib_builds.append(file_path)
+                elif file == '.hgignore':
+                    resources.repo_files.append(file_path)
         
         return resources
-    
+
+    def scan_repository(self, path):
+        resources = []
+        
+        for root, dirs, files in walk(path):
+            # Remove ignored directories
+            for d in copy(dirs):
+                if d == '.' or d == '..':
+                    dirs.remove(d)
+            
+            for file in files:
+                file_path = join(root, file)
+                resources.append(file_path)
+        
+        return resources
+
     def copy_files(self, files_paths, trg_path, rel_path=None):
         # Handle a single file
         if type(files_paths) != ListType: files_paths = [files_paths]

From f168089a91e9e63b0168e2e1dfa2ab76e475e12f Mon Sep 17 00:00:00 2001
From: root 
Date: Fri, 15 Nov 2013 18:59:19 +0000
Subject: [PATCH 115/117] Drop deep repository scanning from scan_resources()
 so it doesn't affect compile Implement repository scanning through
 __scan_all() for exporter

---
 workspace_tools/export/exporters.py | 28 ++++++++++++++++++++++++----
 1 file changed, 24 insertions(+), 4 deletions(-)

diff --git a/workspace_tools/export/exporters.py b/workspace_tools/export/exporters.py
index 3debb6ccdf..5fb5b91251 100644
--- a/workspace_tools/export/exporters.py
+++ b/workspace_tools/export/exporters.py
@@ -1,6 +1,8 @@
 """Just a template for subclassing"""
 import uuid, shutil, os, logging, fnmatch
+from os import walk, remove
 from os.path import join, dirname, isdir, split
+from copy import copy
 from jinja2 import Template
 from contextlib import closing
 from zipfile import ZipFile, ZIP_DEFLATED
@@ -35,15 +37,32 @@ class Exporter():
             if r:
                 self.toolchain.copy_files(r, trg_path, rel_path=src_path)
         return resources
+
+    def __scan_all(self, path):
+        resources = []
+        
+        for root, dirs, files in walk(path):
+            for d in copy(dirs):
+                if d == '.' or d == '..':
+                    dirs.remove(d)
+
+            for file in files:
+                file_path = join(root, file)
+                resources.append(file_path)
+        
+        return resources
     
     def scan_and_copy_resources(self, prj_path, trg_path):
         # Copy only the file for the required target and toolchain
         lib_builds = []
-        repo_dirs = []
         for src in ['lib', 'src']:
             resources = self.__scan_and_copy(join(prj_path, src), trg_path)
             lib_builds.extend(resources.lib_builds)
-            repo_dirs.extend(resources.repo_dirs)
+
+            # The repository files
+            for repo_dir in resources.repo_dirs:
+                repo_files = self.__scan_all(repo_dir)
+                self.toolchain.copy_files(repo_files, trg_path, rel_path=join(prj_path, src))
         
         # The libraries builds
         for bld in lib_builds:
@@ -51,7 +70,8 @@ class Exporter():
             lib_data = self.build_url_resolver(build_url)
             lib_path = lib_data['path'].rstrip('\\/')
             self.__scan_and_copy(lib_path, join(trg_path, lib_data['name']))
-            # create .hg dir in build dir so it's ignored when versioning
+
+            # Create .hg dir in mbed build dir so it's ignored when versioning
             hgdir = join(trg_path, lib_data['name'], '.hg')
             mkdir(hgdir)
             fhandle = file(join(hgdir, 'keep.me'), 'a')
@@ -64,7 +84,7 @@ class Exporter():
         # This prevents exporting the mbed libraries from source
         # if not self.toolchain.mbed_libs:
         #    raise OldLibrariesException()
-    
+
     def gen_file(self, template_file, data, target_file):
         template_path = join(Exporter.TEMPLATE_DIR, template_file)
         template_text = open(template_path).read()

From 86e57616ced2af28b5eb1998732f4bd8dc3b97d1 Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Mon, 18 Nov 2013 19:50:33 +0200
Subject: [PATCH 116/117] Added LPC4088_EA to the list of targets

---
 workspace_tools/build_release.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/workspace_tools/build_release.py b/workspace_tools/build_release.py
index 1c3adeb742..493be5cfd2 100644
--- a/workspace_tools/build_release.py
+++ b/workspace_tools/build_release.py
@@ -25,7 +25,6 @@ sys.path.append(ROOT)
 from workspace_tools.build_api import build_mbed_libs
 from workspace_tools.targets import TARGET_MAP
 
-
 OFFICIAL_MBED_LIBRARY_BUILD = (
     ('KL25Z', ('ARM', 'GCC_ARM')),
     ('LPC11U24', ('ARM', 'uARM')),
@@ -34,6 +33,7 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
     ('LPC812', ('uARM',)),
     ('LPC1347', ('ARM',)),
     ('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR')),
+    ('LPC4088_EA', ('ARM', 'GCC_ARM', 'GCC_CR')),
     ('LPC1114', ('uARM',)),
 )
 

From 0abfca29387bd5e3e2fad7378f63233b8c174e5d Mon Sep 17 00:00:00 2001
From: Bogdan Marinescu 
Date: Mon, 18 Nov 2013 20:24:51 +0200
Subject: [PATCH 117/117] Added export maps

Since some targets with different names use the same exporters (for example
LPC4088_EA and LPC4088), add an "export map" for this situation.
---
 workspace_tools/export/__init__.py | 3 ++-
 workspace_tools/targets.py         | 3 +++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/workspace_tools/export/__init__.py b/workspace_tools/export/__init__.py
index 3a95f35f14..753c3620d2 100644
--- a/workspace_tools/export/__init__.py
+++ b/workspace_tools/export/__init__.py
@@ -22,7 +22,7 @@ from shutil import copytree, rmtree
 from workspace_tools.utils import mkdir
 from workspace_tools.export import uvision4, codesourcery, codered, gccarm, ds5_5, iar
 from workspace_tools.export.exporters import zip_working_directory_and_clean_up, OldLibrariesException
-
+from workspace_tools.targets import EXPORT_MAP
 
 EXPORTERS = {
     'uvision': uvision4.Uvision4,
@@ -67,6 +67,7 @@ def export(project_path, project_name, ide, target, destination='/tmp/', tempdir
             report['errormsg'] = "Unsupported toolchain"
         else:
             Exporter = EXPORTERS[ide]
+            target = EXPORT_MAP.get(target, target)
             if target not in Exporter.TARGETS:
                 report['errormsg'] = ERROR_MESSAGE_UNSUPPORTED_TOOLCHAIN % (target, ide)
             else:
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index 5894fe2b19..54d475a798 100644
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -342,3 +342,6 @@ for t in TARGETS:
     TARGET_MAP[t.name] = t
 
 TARGET_NAMES = TARGET_MAP.keys()
+
+# Some targets with different name have the same exporters
+EXPORT_MAP = {"LPC4088_EA": "LPC4088"}