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* Base Commit for SAMW25 support.

pull/1359/head
akhilpanayam 2015-08-19 11:06:02 +05:30 committed by Karthik Purushothaman
parent 9b7d23d471
commit 8c6b817ca2
13 changed files with 1099 additions and 0 deletions
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126
libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/samd21g18a.ld Normal file
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Memory Spaces Definitions */
MEMORY
{
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
}
/* The stack size used by the application. NOTE: you need to adjust according to your application. */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
. = ALIGN(4);
_etext = .;
.dvectors (NOLOAD) :
{
_sdvectors = .;
. = . + 0xB0;
_edvectors = .;
} > ram
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
.heap (NOLOAD) :
{
. = ALIGN(4);
__end__ = . ;
. = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
. = ALIGN(4);
}

158
libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_GCC_ARM/startup_samd21.c Normal file
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#include "samd21.h"
/* Initialize segments */
extern uint32_t _sfixed;
extern uint32_t _efixed;
extern uint32_t _etext;
extern uint32_t _srelocate;
extern uint32_t _erelocate;
extern uint32_t _szero;
extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
int main(void);
/** \endcond */
void __libc_init_array(void);
/* Default empty handler */
void Dummy_Handler(void);
/* Cortex-M0+ core handlers */
void NMI_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void HardFault_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SVC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void PendSV_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SysTick_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
/* Peripherals handlers */
void PM_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SYSCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void WDT_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void RTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void EIC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void NVMCTRL_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void DMAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void USB_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void EVSYS_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void SERCOM5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TCC0_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TCC1_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TCC2_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TC3_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TC4_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TC5_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TC6_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void TC7_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void ADC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void AC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void DAC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void PTC_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
void I2S_Handler ( void ) __attribute__ ((weak, alias("Dummy_Handler")));
/* Exception Table */
__attribute__ ((section(".vectors")))
const DeviceVectors exception_table = {
/* Configure Initial Stack Pointer, using linker-generated symbols */
(void*) (&_estack),
(void*) Reset_Handler,
(void*) NMI_Handler,
(void*) HardFault_Handler,
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) SVC_Handler,
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) PendSV_Handler,
(void*) SysTick_Handler,
/* Configurable interrupts */
(void*) PM_Handler, /* 0 Power Manager */
(void*) SYSCTRL_Handler, /* 1 System Control */
(void*) WDT_Handler, /* 2 Watchdog Timer */
(void*) RTC_Handler, /* 3 Real-Time Counter */
(void*) EIC_Handler, /* 4 External Interrupt Controller */
(void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
(void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
(void*) USB_Handler, /* 7 Universal Serial Bus */
(void*) EVSYS_Handler, /* 8 Event System Interface */
(void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
(void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
(void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
(void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
(void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
(void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
(void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
(void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
(void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
(void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
(void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
(void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
(void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
(void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
(void*) ADC_Handler, /* 23 Analog Digital Converter */
(void*) AC_Handler, /* 24 Analog Comparators */
(void*) DAC_Handler, /* 25 Digital Analog Converter */
(void*) PTC_Handler, /* 26 Peripheral Touch Controller */
(void*) I2S_Handler /* 27 Inter-IC Sound Interface */
};
/**
* \brief This is the code that gets called on processor reset.
* To initialize the device, and call the main() routine.
*/
void Reset_Handler(void)
{
uint32_t *pSrc, *pDest;
/* Initialize the relocate segment */
pSrc = &_etext;
pDest = &_srelocate;
if (pSrc != pDest) {
for (; pDest < &_erelocate;) {
*pDest++ = *pSrc++;
}
}
/* Clear the zero segment */
for (pDest = &_szero; pDest < &_ezero;) {
*pDest++ = 0;
}
/* Set the vector table base address */
pSrc = (uint32_t *) & _sfixed;
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
/* Initialize the C library */
__libc_init_array();
/* Branch to main function */ // expected to be done by MBED OS
main();
/* Infinite loop */
while (1);
}
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
}
}

173
libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21/TARGET_SAMD21G18A/TOOLCHAIN_IAR/startup_samd21.c Normal file
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#include "samd21.h"
void __iar_program_start(void);
int __low_level_init(void);
void Dummy_Handler(void);
void Reset_Handler(void);
/**
* \brief Default interrupt handler for unused IRQs.
*/
void Dummy_Handler(void)
{
while (1) {
}
}
/* Cortex-M0+ core handlers */
void NMI_Handler ( void );
void HardFault_Handler ( void );
void SVC_Handler ( void );
void PendSV_Handler ( void );
void SysTick_Handler ( void );
/* Peripherals handlers */
void PM_Handler ( void );
void SYSCTRL_Handler ( void );
void WDT_Handler ( void );
void RTC_Handler ( void );
void EIC_Handler ( void );
void NVMCTRL_Handler ( void );
void DMAC_Handler ( void );
void USB_Handler ( void );
void EVSYS_Handler ( void );
void SERCOM0_Handler ( void );
void SERCOM1_Handler ( void );
void SERCOM2_Handler ( void );
void SERCOM3_Handler ( void );
void SERCOM4_Handler ( void );
void SERCOM5_Handler ( void );
void TCC0_Handler ( void );
void TCC1_Handler ( void );
void TCC2_Handler ( void );
void TC3_Handler ( void );
void TC4_Handler ( void );
void TC5_Handler ( void );
void TC6_Handler ( void );
void TC7_Handler ( void );
void ADC_Handler ( void );
void AC_Handler ( void );
void DAC_Handler ( void );
void PTC_Handler ( void );
void I2S_Handler ( void );
/* Cortex-M0+ core handlers */
#pragma weak NMI_Handler = Dummy_Handler
#pragma weak HardFault_Handler = Dummy_Handler
#pragma weak SVC_Handler = Dummy_Handler
#pragma weak PendSV_Handler = Dummy_Handler
#pragma weak SysTick_Handler = Dummy_Handler
/* Peripherals handlers */
#pragma weak PM_Handler = Dummy_Handler
#pragma weak SYSCTRL_Handler = Dummy_Handler
#pragma weak WDT_Handler = Dummy_Handler
#pragma weak RTC_Handler = Dummy_Handler
#pragma weak EIC_Handler = Dummy_Handler
#pragma weak NVMCTRL_Handler = Dummy_Handler
#pragma weak DMAC_Handler = Dummy_Handler
#pragma weak USB_Handler = Dummy_Handler
#pragma weak EVSYS_Handler = Dummy_Handler
#pragma weak SERCOM0_Handler = Dummy_Handler
#pragma weak SERCOM1_Handler = Dummy_Handler
#pragma weak SERCOM2_Handler = Dummy_Handler
#pragma weak SERCOM3_Handler = Dummy_Handler
#pragma weak SERCOM4_Handler = Dummy_Handler
#pragma weak SERCOM5_Handler = Dummy_Handler
#pragma weak TCC0_Handler = Dummy_Handler
#pragma weak TCC1_Handler = Dummy_Handler
#pragma weak TCC2_Handler = Dummy_Handler
#pragma weak TC3_Handler = Dummy_Handler
#pragma weak TC4_Handler = Dummy_Handler
#pragma weak TC5_Handler = Dummy_Handler
#pragma weak TC6_Handler = Dummy_Handler
#pragma weak TC7_Handler = Dummy_Handler
#pragma weak ADC_Handler = Dummy_Handler
#pragma weak AC_Handler = Dummy_Handler
#pragma weak DAC_Handler = Dummy_Handler
#pragma weak PTC_Handler = Dummy_Handler
#pragma weak I2S_Handler = Dummy_Handler
/* Exception Table */
#pragma language=extended
#pragma segment="CSTACK"
/* The name "__vector_table" has special meaning for C-SPY: */
/* it is where the SP start value is found, and the NVIC vector */
/* table register (VTOR) is initialized to this address if != 0 */
#pragma section = ".intvec"
#pragma location = ".intvec"
//! [startup_vector_table]
const DeviceVectors __vector_table[] = {
__sfe("CSTACK"),
(void*) __iar_program_start,
(void*) NMI_Handler,
(void*) HardFault_Handler,
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) SVC_Handler,
(void*) (0UL), /* Reserved */
(void*) (0UL), /* Reserved */
(void*) PendSV_Handler,
(void*) SysTick_Handler,
/* Configurable interrupts */
(void*) PM_Handler, /* 0 Power Manager */
(void*) SYSCTRL_Handler, /* 1 System Control */
(void*) WDT_Handler, /* 2 Watchdog Timer */
(void*) RTC_Handler, /* 3 Real-Time Counter */
(void*) EIC_Handler, /* 4 External Interrupt Controller */
(void*) NVMCTRL_Handler, /* 5 Non-Volatile Memory Controller */
(void*) DMAC_Handler, /* 6 Direct Memory Access Controller */
(void*) USB_Handler, /* 7 Universal Serial Bus */
(void*) EVSYS_Handler, /* 8 Event System Interface */
(void*) SERCOM0_Handler, /* 9 Serial Communication Interface 0 */
(void*) SERCOM1_Handler, /* 10 Serial Communication Interface 1 */
(void*) SERCOM2_Handler, /* 11 Serial Communication Interface 2 */
(void*) SERCOM3_Handler, /* 12 Serial Communication Interface 3 */
(void*) SERCOM4_Handler, /* 13 Serial Communication Interface 4 */
(void*) SERCOM5_Handler, /* 14 Serial Communication Interface 5 */
(void*) TCC0_Handler, /* 15 Timer Counter Control 0 */
(void*) TCC1_Handler, /* 16 Timer Counter Control 1 */
(void*) TCC2_Handler, /* 17 Timer Counter Control 2 */
(void*) TC3_Handler, /* 18 Basic Timer Counter 0 */
(void*) TC4_Handler, /* 19 Basic Timer Counter 1 */
(void*) TC5_Handler, /* 20 Basic Timer Counter 2 */
(void*) TC6_Handler, /* 21 Basic Timer Counter 3 */
(void*) TC7_Handler, /* 22 Basic Timer Counter 4 */
(void*) ADC_Handler, /* 23 Analog Digital Converter */
(void*) AC_Handler, /* 24 Analog Comparators */
(void*) DAC_Handler, /* 25 Digital Analog Converter */
(void*) PTC_Handler, /* 26 Peripheral Touch Controller */
(void*) I2S_Handler /* 27 Inter-IC Sound Interface */
};
//! [startup_vector_table]
/**------------------------------------------------------------------------------
* This is the code that gets called on processor reset. To initialize the
* device.
*------------------------------------------------------------------------------*/
int __low_level_init(void)
{
uint32_t *pSrc = __section_begin(".intvec");
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);
return 1; /* if return 0, the data sections will not be initialized */
}
/**------------------------------------------------------------------------------
* This is the code that gets called on processor reset. To initialize the
* device.
*------------------------------------------------------------------------------*/
void Reset_Handler(void)
{
__iar_program_start();
}

150
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralNames.h Normal file
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/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include <compiler.h>
#include "cmsis.h"
#include "PinNames.h"
#ifdef __cplusplus
extern "C" {
#endif
#define _SERCOM_SPI_NAME(n, unused) \
SPI##n,
#define _SERCOM_PAD_NAME(n, pad) \
SERCOM##n##_PAD##pad = ((n & 0xF) | ((pad & 0xF) << 4)),
#define _SERCOM_I2C_NAME(n, unused) \
I2C##n,
typedef enum {
UART_0 = (int)0x42000800UL, // Base address of SERCOM0
UART_1 = (int)0x42000C00UL, // Base address of SERCOM1
UART_2 = (int)0x42001000UL, // Base address of SERCOM2
UART_3 = (int)0x42001400UL, // Base address of SERCOM3
UART_4 = (int)0x42001800UL, // Base address of SERCOM4
UART_5 = (int)0x42001C00UL // Base address of SERCOM5
} UARTName;
typedef enum {
ADC_0 = 0x0ul,
ADC_1 = 0x1ul,
ADC_2 = 0x2ul,
ADC_3 = 0x3ul,
ADC_4 = 0x4ul,
ADC_5 = 0x5ul,
ADC_6 = 0x6ul,
ADC_7 = 0x7ul,
ADC_10 = 0xAul,
ADC_11 = 0xBul,
ADC_16 = 0x10ul,
ADC_17 = 0x11ul,
ADC_18 = 0x12ul,
ADC_19 = 0x13ul
} ADCName;
typedef enum {
DAC_0 = 0x42004800UL
} DACName;
typedef enum { // for each channel
EXTINT_0 = 0,
EXTINT_1,
EXTINT_2,
EXTINT_3,
EXTINT_4,
EXTINT_5,
EXTINT_6,
EXTINT_7,
EXTINT_8,
EXTINT_9,
EXTINT_10,
EXTINT_11,
EXTINT_12,
EXTINT_13,
EXTINT_14,
EXTINT_15
} EXTINTName;
typedef enum {
MREPEAT(SERCOM_INST_NUM, _SERCOM_SPI_NAME, ~)
} SPIName;
typedef enum {
MREPEAT(SERCOM_INST_NUM, _SERCOM_I2C_NAME, ~)
} I2CName;
typedef enum {
/* Pad 0 definitions */
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 0)
/* Pad 1 definitions */
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 1)
/* Pad 2 definitions */
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 2)
/* Pad 3 definitions */
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_NAME, 3)
} SercomPadName;
typedef enum {
PWM_0 = (0x42002000UL), /**< \brief (TCC0) APB Base Address */
PWM_1 = (0x42002400UL), /**< \brief (TCC1) APB Base Address */
PWM_2 = (0x42002800UL), /**< \brief (TCC2) APB Base Address */
} PWMName;
struct pwm_pin_channel {
PinName pin;
PWMName pwm;
uint8_t channel_index;
};
#define STDIO_UART_TX USBTX
#define STDIO_UART_RX USBRX
#define STDIO_UART UART_3
// Default peripherals
#define MBED_SPI0 PA18, PA16, PA19, PA17
#define MBED_UART0 PA04, PA05
#define MBED_UARTUSB USBTX, USBRX
#define MBED_I2C0 PA08, PA09
#define MBED_ANALOGOUT0 PA02
#define MBED_ANALOGIN0 PA03
#define MBED_ANALOGIN1 PA08
#define MBED_ANALOGIN2 PB09
#define MBED_ANALOGIN3 PA04
#define MBED_ANALOGIN4 PA05
#define MBED_ANALOGIN5 PA06
#define MBED_ANALOGIN7 PA07
#define MBED_PWMOUT0 PA18
#define MBED_PWMOUT1 PA19
#ifdef __cplusplus
}
#endif
#endif

136
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.c Normal file
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/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "PeripheralPins.h"
/************ADC***************/
const PinMap PinMap_ADC[] = {
{PA02, ADC_0, 1},
{PA03, ADC_1, 1},
{PB08, ADC_2, 1},
{PB09, ADC_3, 1},
{PA04, ADC_4, 1},
{PA05, ADC_5, 1},
{PA06, ADC_6, 1},
{PA07, ADC_7, 1},
{PB02, ADC_10, 1},
{PB03, ADC_11, 1},
{PA08, ADC_16, 1},
{PA09, ADC_17, 1},
{PA10, ADC_18, 1},
{PA11, ADC_19, 1},
/* Not connected */
{NC , NC , NC}
};
/************DAC***************/
const PinMap PinMap_DAC[] = {
{PA02, DAC_0, 1},
/* Not connected */
{NC , NC , NC}
};
/************SERCOM Pins***********/
const PinMap PinMap_SERCOM_PAD[] = {
/* Not connected */
{NC , NC , NC}
};
/*******SERCOM Pins extended*******/
const PinMap PinMap_SERCOM_PADEx[] = {
/* Not connected */
{NC , NC , NC}
};
/************PWM***************/
const PinMap PinMap_PWM[] = {
/* Not connected */
{NC , NC , NC}
};
/**********EXTINT*************/
const PinMap PinMap_EXTINT[] = {
{PA16, EXTINT_0, 0},
{PA00, EXTINT_0, 0},
{PA17, EXTINT_1, 0},
{PA01, EXTINT_1, 0},
{PA18, EXTINT_2, 0},
{PA02, EXTINT_2, 0},
{PB02, EXTINT_2, 0},
{PA03, EXTINT_3, 0},
{PA19, EXTINT_3, 0},
{PB03, EXTINT_3, 0},
{PA04, EXTINT_4, 0},
{PA20, EXTINT_4, 0},
{PA05, EXTINT_5, 0},
{PA21, EXTINT_5, 0},
{PA06, EXTINT_6, 0},
{PA22, EXTINT_6, 0},
{PB22, EXTINT_6, 0},
{PA07, EXTINT_7, 0},
{PA23, EXTINT_7, 0},
{PB23, EXTINT_7, 0},
{PA28, EXTINT_8, 0},
{PB08, EXTINT_8, 0},
{PA09, EXTINT_9, 0},
{PB09, EXTINT_9, 0},
{PA10, EXTINT_10, 0},
{PA30, EXTINT_10, 0},
{PB10, EXTINT_10, 0},
{PA11, EXTINT_11, 0},
{PA31, EXTINT_11, 0},
{PB11, EXTINT_11, 0},
{PA12, EXTINT_12, 0},
{PA24, EXTINT_12, 0},
{PA13, EXTINT_13, 0},
{PA25, EXTINT_13, 0},
{PA14, EXTINT_14, 0},
{PA15, EXTINT_15, 0},
{PA27, EXTINT_15, 0},
/* Not connected */
{NC , NC , NC}
};
const struct pwm_pin_channel pwn_pins[] = {
/* Not connected */
{NC , NC , NC}
};

40
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PeripheralPins.h Normal file
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@ -0,0 +1,40 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALPINS_H
#define MBED_PERIPHERALPINS_H
#include "pinmap.h"
#include "PeripheralNames.h"
/************ADC***************/
extern const PinMap PinMap_ADC[];
/************DAC***************/
extern const PinMap PinMap_DAC[];
/*********SERCOM*************/
extern const PinMap PinMap_SERCOM_PAD[];
extern const PinMap PinMap_SERCOM_PADEx[];
/************PWM***************/
extern const PinMap PinMap_PWM[];
/**********EXTINT*************/
extern const PinMap PinMap_EXTINT[];
#endif

95
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/PinNames.h Normal file
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@ -0,0 +1,95 @@
/* mbed Microcontroller Library
* Copyright (c) 2013 Nordic Semiconductor
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT,
PIN_INPUT_OUTPUT //pin state can be set and read back
} PinDirection;
typedef enum {
PA00 = 0,
PA01 = 1,
PA02 = 2,
PA03 = 3,
PA04 = 4,
PA05 = 5,
PA06 = 6,
PA07 = 7,
PA08 = 8,
PA09 = 9,
PA10 = 10,
PA11 = 11,
PA12 = 12,
PA13 = 13,
PA14 = 14,
PA15 = 15,
PA16 = 16,
PA17 = 17,
PA18 = 18,
PA19 = 19,
PA20 = 20,
PA21 = 21,
PA22 = 22,
PA23 = 23,
PA24 = 24,
PA25 = 25,
PA27 = 27,
PA28 = 28,
PA30 = 30,
PA31 = 31,
PB02 = 34,
PB03 = 35,
PB08 = 40,
PB09 = 41,
PB10 = 42,
PB11 = 43,
PB22 = 54,
PB23 = 55,
USBTX = PA22,
USBRX = PA23,
LED1 = PA23,
LED2 = PA23,
LED3 = PA23,
LED4 = PA23,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
typedef enum {
PullNone = 0,
PullUp = 1,
PullDown = 2,
PullDefault = PullUp
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

32
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/SAMW25_XPLAINED_PRO/mbed_overrides.c Normal file
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@ -0,0 +1,32 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "compiler.h"
#include "system.h"
uint8_t g_sys_init = 0;
//called before main - implement here if board needs it ortherwise, let
// the application override this if necessary
//TODO: To be implemented by adding system init and board init
void mbed_sdk_init()
{
if(g_sys_init == 0) {
g_sys_init = 1;
system_init();
}
}
/***************************************************************/

110
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/analogout_api.c Normal file
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@ -0,0 +1,110 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "analogout_api.h"
#include "cmsis.h"
#include "pinmap.h"
#include "PeripheralPins.h"
#include "dac.h"
struct dac_module dac_instance;
extern uint8_t g_sys_init;
#define MAX_VAL_10BIT 0x03FF
void analogout_init(dac_t *obj, PinName pin)
{
MBED_ASSERT(obj);
if (g_sys_init == 0) {
system_init();
g_sys_init = 1;
}
struct dac_config config_dac;
struct dac_chan_config config_dac_chan;
uint32_t pos_input;
pos_input = pinmap_find_peripheral(pin, PinMap_DAC);
MBED_ASSERT(pos_input != NC);
obj->dac = DAC_0;
dac_get_config_defaults(&config_dac);
dac_init(&dac_instance, (Dac *)DAC_0, &config_dac);
dac_chan_get_config_defaults(&config_dac_chan);
dac_chan_set_config(&dac_instance, DAC_CHANNEL_0, &config_dac_chan);
dac_chan_enable(&dac_instance, DAC_CHANNEL_0);
dac_enable(&dac_instance);
}
void analogout_free(dac_t *obj)
{
MBED_ASSERT(obj);
struct system_pinmux_config pin_conf;
dac_disable(&dac_instance);
pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
pin_conf.powersave = false;
pin_conf.mux_position = SYSTEM_PINMUX_GPIO;
system_pinmux_pin_set_config(PA02, &pin_conf); /*PA02 is the only DAC pin available*/
}
void analogout_write(dac_t *obj, float value)
{
MBED_ASSERT(obj);
uint16_t count_val = 0;
if (value < 0.0f) {
count_val = 0;
} else if (value > 1.0f) {
count_val = MAX_VAL_10BIT;
} else {
count_val = (uint16_t)(value * (float)MAX_VAL_10BIT);
}
dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
}
void analogout_write_u16(dac_t *obj, uint16_t value)
{
MBED_ASSERT(obj);
uint16_t count_val;
count_val = (uint16_t)((value * (float)MAX_VAL_10BIT) / 0xFFFF); /*Normalization to the value 0xFFFF*/
dac_chan_write(&dac_instance, DAC_CHANNEL_0, count_val);
}
static uint32_t data_reg_read(dac_t *obj)
{
Dac *const dac_module = (Dac *)obj->dac;
return (uint32_t)dac_module->DATA.reg;
}
float analogout_read(dac_t *obj)
{
MBED_ASSERT(obj);
uint32_t data_val = data_reg_read(obj);
return data_val/(float)MAX_VAL_10BIT;
}
uint16_t analogout_read_u16(dac_t *obj)
{
MBED_ASSERT(obj);
uint32_t data_val = data_reg_read(obj);
return (uint16_t)((data_val / (float)MAX_VAL_10BIT) * 0xFFFF); /*Normalization to the value 0xFFFF*/
}

63
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/TARGET_SAMD21G18A/device.h Normal file
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@ -0,0 +1,63 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_DEVICE_H
#define MBED_DEVICE_H
#define DEVICE_PORTIN 1
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 1
#define DEVICE_SERIAL 1
#define DEVICE_SERIAL_FC 1
#define DEVICE_SERIAL_ASYNCH 1
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 1
#define DEVICE_I2C_ASYNCH 1
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 1
#define DEVICE_SPI_ASYNCH 1
#define DEVICE_CAN 0
#define DEVICE_RTC 1
#define DEVICE_ETHERNET 0
#define DEVICE_PWMOUT 1
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 0
#define DEVICE_MAC_OFFSET 0
#define DEVICE_SLEEP 1
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 0
#define DEVICE_ERROR_PATTERN 0
#include "objects.h"
#endif

4
libraries/mbed/targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0+/port_api.c
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@ -25,6 +25,10 @@
#elif defined(TARGET_SAMD21J18A) #elif defined(TARGET_SAMD21J18A)
#define PORTA_MASK 0xDBFFFFFF // mask for available pins in Port A #define PORTA_MASK 0xDBFFFFFF // mask for available pins in Port A
#define PORTB_MASK 0xC0C3FFFF // mask for available pins in Port B #define PORTB_MASK 0xC0C3FFFF // mask for available pins in Port B
#elif defined(TARGET_SAMD21G18A)
#define PORTA_MASK 0xDBFFFFFF // mask for available pins in Port A
#define PORTB_MASK 0x00C00F0C // mask for available pins in Port B
#else
#endif #endif
uint32_t start_pin(PortName port) uint32_t start_pin(PortName port)

1
workspace_tools/export/gccarm.py
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@ -102,6 +102,7 @@ class GccArm(Exporter):
'SAMR21G18A', 'SAMR21G18A',
'TEENSY3_1', 'TEENSY3_1',
'SAMD21J18A', 'SAMD21J18A',
'SAMD21G18A',
] ]
DOT_IN_RELATIVE_PATH = True DOT_IN_RELATIVE_PATH = True

11
workspace_tools/targets.py
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@ -1612,6 +1612,16 @@ class SAMD21J18A(Target):
self.supported_toolchains = ["GCC_ARM"] self.supported_toolchains = ["GCC_ARM"]
self.default_toolchain = "GCC_ARM" self.default_toolchain = "GCC_ARM"
class SAMD21G18A(Target):
def __init__(self):
Target.__init__(self)
self.core = "Cortex-M0+"
self.extra_labels = ['Atmel', 'SAM_CortexM0+', 'SAMD21']
self.macros = ['__SAMD21G18A__', 'I2C_MASTER_CALLBACK_MODE=true', 'EXTINT_CALLBACK_MODE=true', 'USART_CALLBACK_MODE=true', 'TC_ASYNC=true']
self.supported_toolchains = ["GCC_ARM"]
self.default_toolchain = "GCC_ARM"
# Get a single instance for each target # Get a single instance for each target
TARGETS = [ TARGETS = [
@ -1775,6 +1785,7 @@ TARGETS = [
### Atmel ### ### Atmel ###
SAMR21G18A(), SAMR21G18A(),
SAMD21J18A(), SAMD21J18A(),
SAMD21G18A(),
] ]
# Map each target name to its unique instance # Map each target name to its unique instance