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mbed-os
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Display full paths in armlink output

pull/5125/head
Jimmy Brisson 2017-09-18 16:40:52 -05:00
parent 6d135c26b3
commit 8c54c4efa8
4 changed files with 4 additions and 4 deletions
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2
tools/profiles/debug.json
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@ -34,7 +34,7 @@
"asm": [], "asm": [],
"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"], "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
"cxx": ["--cpp", "--no_rtti", "--no_vla"], "cxx": ["--cpp", "--no_rtti", "--no_vla"],
"ld": [] "ld": ["--show_full_path"]
}, },
"uARM": { "uARM": {
"common": ["-c", "--gnu", "-Otime", "--split_sections", "common": ["-c", "--gnu", "-Otime", "--split_sections",

2
tools/profiles/develop.json
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@ -31,7 +31,7 @@
"asm": [], "asm": [],
"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"], "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
"cxx": ["--cpp", "--no_rtti", "--no_vla"], "cxx": ["--cpp", "--no_rtti", "--no_vla"],
"ld": [] "ld": ["--show_full_path"]
}, },
"uARM": { "uARM": {
"common": ["-c", "--gnu", "-Otime", "--split_sections", "common": ["-c", "--gnu", "-Otime", "--split_sections",

2
tools/profiles/release.json
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@ -31,7 +31,7 @@
"asm": [], "asm": [],
"c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"], "c": ["--md", "--no_depend_system_headers", "--c99", "-D__ASSERT_MSG"],
"cxx": ["--cpp", "--no_rtti", "--no_vla"], "cxx": ["--cpp", "--no_rtti", "--no_vla"],
"ld": [] "ld": ["--show_full_path"]
}, },
"uARM": { "uARM": {
"common": ["-c", "--gnu", "-Ospace", "--split_sections", "common": ["-c", "--gnu", "-Ospace", "--split_sections",

2
tools/toolchains/arm.py
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@ -71,7 +71,7 @@ class ARM(mbedToolchain):
self.cc = [main_cc] + self.flags['common'] + self.flags['c'] self.cc = [main_cc] + self.flags['common'] + self.flags['c']
self.cppc = [main_cc] + self.flags['common'] + self.flags['c'] + self.flags['cxx'] self.cppc = [main_cc] + self.flags['common'] + self.flags['c'] + self.flags['cxx']
self.ld = [join(ARM_BIN, "armlink")] self.ld = [join(ARM_BIN, "armlink")] + self.flags['ld']
self.ar = join(ARM_BIN, "armar") self.ar = join(ARM_BIN, "armar")
self.elf2bin = join(ARM_BIN, "fromelf") self.elf2bin = join(ARM_BIN, "fromelf")