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Fix SAML21J18A.sct 

Remove extra new lines which caused comments to be exposed as code.
pull/1547/head
Mac Lobdell 2016-02-08 13:43:40 -06:00 committed by 0xc0170
parent 4f59006467
commit 8abc70e657
1 changed files with 14 additions and 26 deletions
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38
libraries/mbed/targets/cmsis/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21/TARGET_SAML21J18A/TOOLCHAIN_ARM_STD/SAML21J18A.sct
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@ -1,29 +1,17 @@
; ;SAML21J18A
SAML21J18A ;256KB FLASH (0x40000) @ 0x000000000
; ;32KB RAM (0x8000) @ 0x20000000
256KB FLASH (0x40000) @ 0x000000000
;
2KB RAM (0x8000) @ 0x20000000
;SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
; LR_IROM1 0x00000000 0x40000 { ; load region size_region
SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) ER_IROM1 0x00000000 0x40000 { ; load address = execution address
LR_IROM1 0x00000000 0x40000 { ; *.o (RESET, +First)
load region size_region *(InRoot$$Sections)
ER_IROM1 0x00000000 0x40000 { ; .ANY (+RO)
load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
;
[RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment
RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4)
{
;
RW data
.ANY (+RW +ZI)
} }
; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4) - alignment
RW_IRAM1 (0x20000000+0xB4) (0x8000-0xB4) { ; RW data
.ANY (+RW +ZI)
}
} }