From 8a971019883502c2077e7740cd8fe88ba789a2cc Mon Sep 17 00:00:00 2001 From: Steven Cartmell Date: Wed, 22 Nov 2017 12:56:30 +0000 Subject: [PATCH] Fix watchdog API issues - Fix typo in module comment - Redefine the default system behaviour in sleep mode - Guard K64F enableWait flag - Remove bit shifts from reset reason enum --- hal/reset_reason_api.h | 21 ++++++++++--------- hal/watchdog_api.h | 12 +++++------ .../TARGET_MCU_K64F/reset_reason.c | 15 +++++++------ .../TARGET_MCU_K64F/watchdog.c | 4 +++- 4 files changed, 28 insertions(+), 24 deletions(-) diff --git a/hal/reset_reason_api.h b/hal/reset_reason_api.h index 8c5c3b7c75..536c190317 100644 --- a/hal/reset_reason_api.h +++ b/hal/reset_reason_api.h @@ -25,15 +25,16 @@ extern "C" { #endif typedef enum { - RESET_REASON_POWER_ON = (1 << 0), /**< Set when power is initially applied to the board. The power-on-reset circuit causes a POWER_ON reset when this occurs */ - RESET_REASON_PIN_RESET = (1 << 1), /**< Set when a reset is triggered by the hardware pin on the board */ - RESET_REASON_BROWN_OUT = (1 << 2), /**< Triggered when the voltage drops below the low voltage detect (LVD) threshold the system will be held in a reset until the voltage rises above the threshold */ - RESET_REASON_SOFTWARE = (1 << 3), /**< Set during software reset, typically triggered by writing the SYSRESETREQ bit in the Application Interrupt and Reset Control register */ - RESET_REASON_WATCHDOG = (1 << 4), /**< Set when a running watchdog timer fails to be refreshed */ - RESET_REASON_LOCKUP = (1 << 5), /**< Set when the core is locked because of an unrecoverable exception */ - RESET_REASON_MULTIPLE = (1 << 6), /**< Set if multiple reset reasons are set within the board. Occurs when the reset reason registers aren't cleared between resets */ - RESET_REASON_PLATFORM = (1 << 7), /**< Platform specific reset reason not captured in this enum */ - RESET_REASON_UNKNOWN = (1 << 8) /**< Unknown or unreadable reset reason **/ + RESET_REASON_POWER_ON, /**< Set when power is initially applied to the board. The power-on-reset circuit causes a POWER_ON reset when this occurs */ + RESET_REASON_PIN_RESET, /**< Set when a reset is triggered by the hardware pin on the board */ + RESET_REASON_BROWN_OUT, /**< Triggered when the voltage drops below the low voltage detect (LVD) threshold the system will be held in a reset until the voltage rises above the threshold */ + RESET_REASON_SOFTWARE, /**< Set during software reset, typically triggered by writing the SYSRESETREQ bit in the Application Interrupt and Reset Control register */ + RESET_REASON_WATCHDOG, /**< Set when a running watchdog timer fails to be refreshed */ + RESET_REASON_LOCKUP, /**< Set when the core is locked because of an unrecoverable exception */ + RESET_REASON_WAKE_LOW_POWER, /**< Set when waking from deep sleep mode */ + RESET_REASON_MULTIPLE, /**< Set if multiple reset reasons are set within the board. Occurs when the reset reason registers aren't cleared between resets */ + RESET_REASON_PLATFORM, /**< Platform specific reset reason not captured in this enum */ + RESET_REASON_UNKNOWN /**< Unknown or unreadable reset reason **/ } reset_reason_t; /** @@ -48,7 +49,7 @@ typedef enum { */ reset_reason_t hal_reset_reason_get(void); - /** +/** * Clear the reset reason from registers * * Reset the value of the reset status registers, the reset reason will persist diff --git a/hal/watchdog_api.h b/hal/watchdog_api.h index 14f8610cc8..8950efab2a 100644 --- a/hal/watchdog_api.h +++ b/hal/watchdog_api.h @@ -41,12 +41,11 @@ * to the user specified reset value. * * The watchdog timer supports a second mode of operation called windowed mode. - * When configured in this mode by setting enable_window to true, the timer - * watchdog will enable a restriction on the kick. If the watchdog timer too + * When configured in this mode by setting enable_window to true, the watchdog + * will enable a restriction on the kick. If the watchdog timer is kicked too * soon after it has last been refreshed a system reset occurs. The earliest * time in milliseconds the timer can be kicked without triggering a reset is * specified by window_ms. - * */ typedef struct @@ -74,10 +73,9 @@ typedef struct */ uint32_t window_ms; /** - * Configures the watchdog timer to run while the core is in sleep mode. By - * default when the system is put into the sleep the watchdog timer is paused. - * Enabling this setting causes the timer to countdown during this time. This - * flag is disabled by default. + * Configures the watchdog behaviour while the system is in sleep mode. When + * this flag is enabled the watchdog timer runs normally while the system is + * in sleep mode, when disabled the watchdog is paused during this time. */ bool enable_sleep; } watchdog_config_t; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/reset_reason.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/reset_reason.c index 6c8716c174..d8c8bedc88 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/reset_reason.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/reset_reason.c @@ -7,6 +7,15 @@ reset_reason_t hal_reset_reason_get(void) const uint32_t reset_sources = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll; + // Low power mode is exited via the RESET pin. Therefore, when this reset is + // triggered both the PIN and WAKEUP will have bits set, so check this flag + // first. +#if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP) + if ((reset_sources & kRCM_SourceWakeup) != 0) { + return RESET_REASON_PLATFORM; + } +#endif + // Check POR flag first. During a POR reset there will be two reset sources // set: POR and LVD. As during the power on phase the low voltage detector // circuit will detect a low voltage while the voltage is initially ramping @@ -44,12 +53,6 @@ reset_reason_t hal_reset_reason_get(void) } #endif -#if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP) - if ((reset_sources & kRCM_SourceWakeup) != 0) { - return RESET_REASON_PLATFORM; - } -#endif - #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG) if ((reset_sources & kRCM_SourceJtag) != 0) { return RESET_REASON_PLATFORM; diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/watchdog.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/watchdog.c index 5b7a7ca4fc..e2fd1a7936 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/watchdog.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/watchdog.c @@ -71,8 +71,10 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config) cfg.enableUpdate = true; cfg.enableInterrupt = false; cfg.enableWindowMode = config->enable_window; +#if PLATFORM_SUPPORTS_SLEEP cfg.workMode.enableWait = config->enable_sleep; - cfg.workMode.enableStop = true; +#endif + cfg.workMode.enableStop = false; cfg.workMode.enableDebug = false; const uint32_t prescaler = calculate_prescaler_value(config->timeout_ms);