mirror of https://github.com/ARMmbed/mbed-os.git
Refining SPI APIs implementation
vimalrajr
Karthik Purushothaman
parent
732e125c31
commit
8a68139cf0
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@ -32,8 +32,8 @@
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#define DEVICE_I2CSLAVE 0
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#define DEVICE_SPI 1
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#define DEVICE_SPISLAVE 0
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#define DEVICE_SPI_ASYNCH 1
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#define DEVICE_SPISLAVE 1
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#define DEVICE_SPI_ASYNCH 0
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#define DEVICE_CAN 0
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@ -22,7 +22,7 @@
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#include "pinmap.h"
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#include "sercom.h"
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////////////////////////////////////////
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/** Temporary definitions START */
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#define EXT1_SPI_MODULE SERCOM5
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#define EXT1_SPI_SERCOM_MUX_SETTING ((0x1 << SERCOM_SPI_CTRLA_DOPO_Pos) | (0x0 << SERCOM_SPI_CTRLA_DIPO_Pos))
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#define EXT1_SPI_SERCOM_PINMUX_PAD0 PINMUX_PB02D_SERCOM5_PAD0
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@ -37,14 +37,28 @@
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/** Unused pinmux. */
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# define PINMUX_UNUSED 0xFFFFFFFF
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////////////////////////////////////////
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/** Temporary definitions END */
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/**
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* \brief SPI modes enum
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*
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* SPI mode selection.
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*/
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enum spi_mode {
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/** Master mode. */
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SPI_MODE_MASTER = 1,
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/** Slave mode. */
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SPI_MODE_SLAVE = 0,
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};
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#if DEVICE_SPI_ASYNCH
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#define pSPI_S(obj) obj->spi.spi
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#define pSPI_S(obj) (&obj->spi)
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#define pSPI_SERCOM(obj) obj->spi.spi
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#else
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#define pSPI_S(obj) obj->spi
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#define pSPI_S(obj) (obj)
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#define pSPI_SERCOM(obj) (obj->spi)
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#endif
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#define _SPI(obj) pSPI_S(obj)->SPI
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#define _SPI(obj) pSPI_SERCOM(obj)->SPI
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/** SPI default baud rate. */
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#define SPI_DEFAULT_BAUD 50000//100000
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@ -53,9 +67,11 @@
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/** SPI timeout value. */
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# define SPI_TIMEOUT 10000
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extern uint8_t g_sys_init;
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#if DEVICE_SPI_ASYNCH
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/* Global variables */
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void *_sercom_instances[SERCOM_INST_NUM] = {0};
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extern void *_sercom_instances[SERCOM_INST_NUM];
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static void _spi_transceive_buffer(spi_t *obj);
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@ -73,9 +89,10 @@ void SERCOM##n##_SPIHandler(void) \
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/** Auto-generate a set of interrupt handlers for each SERCOM SPI in the device */
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MREPEAT(SERCOM_INST_NUM, _SERCOM_SPI_INTERRUPT_HANDLER, ~)
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uint32_t _sercom_handlers[SERCOM_INST_NUM] = {
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const uint32_t _sercom_handlers[SERCOM_INST_NUM] = {
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MREPEAT(SERCOM_INST_NUM, _SERCOM_SPI_INTERRUPT_HANDLER_DECLR, ~)
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};
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uint32_t _sercom_callbacks[SERCOM_INST_NUM] = {0};
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#endif
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static inline bool spi_is_syncing(spi_t *obj)
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@ -205,15 +222,21 @@ static inline bool spi_read(spi_t *obj, uint16_t *rx_data)
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* @param[in] sclk The pin to use for SCLK
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* @param[in] ssel The pin to use for SSEL
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*/
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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uint16_t baud = 0;
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uint32_t ctrla = 0;
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uint32_t ctrlb = 0;
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enum status_code error_code;
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if (g_sys_init == 0) {
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system_init();
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g_sys_init = 1;
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}
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// TODO: Calculate SERCOM instance from pins
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// TEMP: Giving our own value for testing
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pSPI_S(obj) = EXT1_SPI_MODULE;
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pSPI_SERCOM(obj) = EXT1_SPI_MODULE;
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/* Disable SPI */
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spi_disable(obj);
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@ -222,7 +245,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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if (_SPI(obj).CTRLA.reg & SERCOM_SPI_CTRLA_SWRST){
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return;
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}
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uint32_t sercom_index = _sercom_get_sercom_inst_index(pSPI_S(obj));
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uint32_t sercom_index = _sercom_get_sercom_inst_index(pSPI_SERCOM(obj));
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uint32_t pm_index, gclk_index;
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#if (SAML21)
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if (sercom_index == 5) {
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@ -266,6 +289,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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/* Set the SERCOM in SPI master mode */
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_SPI(obj).CTRLA.reg |= SERCOM_SPI_CTRLA_MODE(0x3);
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pSPI_S(obj)->mode = SPI_MODE_MASTER;
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// TODO: Do pin muxing here
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struct system_pinmux_config pin_conf;
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@ -283,12 +307,7 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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/* Configure the SERCOM pins according to the user configuration */
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for (uint8_t pad = 0; pad < 4; pad++) {
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uint32_t current_pinmux = pad_pinmuxes[pad];
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if (current_pinmux == PINMUX_DEFAULT) {
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current_pinmux = _sercom_get_default_pad(pSPI_S(obj), pad);
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}
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if (current_pinmux != PINMUX_UNUSED) {
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if (current_pinmux != PINMUX_UNUSED) {
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pin_conf.mux_position = current_pinmux & 0xFFFF;
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system_pinmux_pin_set_config(current_pinmux >> 16, &pin_conf);
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}
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@ -333,7 +352,8 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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* Disable the SPI clock
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* @param[in] obj The SPI object to deinitialize
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*/
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void spi_free(spi_t *obj) {
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void spi_free(spi_t *obj)
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{
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// [TODO]
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}
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@ -345,19 +365,43 @@ void spi_free(spi_t *obj) {
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* @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
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* @param[in] slave Zero for master mode or non-zero for slave mode
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*/
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void spi_format(spi_t *obj, int bits, int mode, int slave) {
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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/* Disable SPI */
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spi_disable(obj);
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/* Set the SERCOM in SPI mode */
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_SPI(obj).CTRLA.bit.MODE = slave? 0x2 : 0x3;
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if (slave) {
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/* Set the SERCOM in SPI mode */
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_SPI(obj).CTRLA.bit.MODE = 0x2;
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pSPI_S(obj)->mode = SPI_MODE_SLAVE;
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struct system_pinmux_config pin_conf;
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system_pinmux_get_config_defaults(&pin_conf);
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pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
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pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
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uint32_t pad_pinmuxes[] = {
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EXT1_SPI_SERCOM_PINMUX_PAD0, EXT1_SPI_SERCOM_PINMUX_PAD1,
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EXT1_SPI_SERCOM_PINMUX_PAD2, EXT1_SPI_SERCOM_PINMUX_PAD3
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};
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/* Configure the SERCOM pins according to the user configuration */
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for (uint8_t pad = 0; pad < 4; pad++) {
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uint32_t current_pinmux = pad_pinmuxes[pad];
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if (current_pinmux != PINMUX_UNUSED) {
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pin_conf.mux_position = current_pinmux & 0xFFFF;
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system_pinmux_pin_set_config(current_pinmux >> 16, &pin_conf);
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}
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}
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} else {
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/* Already in SPI master mode */
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}
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/* Set SPI Frame size - only 8-bit and 9-bit supported now */
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_SPI(obj).CTRLB.bit.CHSIZE = (bits > 8)? 1 : 0;
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/* Set SPI Clock Phase */
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_SPI(obj).CTRLA.bit.CPHA = (mode & 0x01)? 1 : 0;
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_SPI(obj).CTRLA.bit.CPHA = (mode & 0x01)? 1 : 0;
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/* Set SPI Clock Polarity */
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_SPI(obj).CTRLA.bit.CPOL = (mode & 0x02)? 1 : 0;
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@ -373,14 +417,15 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
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* @param[in,out] obj The SPI object to configure
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* @param[in] hz The baud rate in Hz
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*/
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void spi_frequency(spi_t *obj, int hz) {
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void spi_frequency(spi_t *obj, int hz)
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{
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uint16_t baud = 0;
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/* Disable SPI */
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spi_disable(obj);
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/* Find frequency of the internal SERCOMi_GCLK_ID_CORE */
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uint32_t sercom_index = _sercom_get_sercom_inst_index(pSPI_S(obj));
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uint32_t sercom_index = _sercom_get_sercom_inst_index(pSPI_SERCOM(obj));
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uint32_t gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
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uint32_t internal_clock = system_gclk_chan_get_hz(gclk_index);
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@ -412,7 +457,8 @@ void spi_frequency(spi_t *obj, int hz) {
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* @param[in] value The value to send
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* @return Returns the value received during send
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*/
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int spi_master_write(spi_t *obj, int value) {
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int spi_master_write(spi_t *obj, int value)
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{
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uint16_t rx_data = 0;
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/* Sanity check arguments */
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@ -449,7 +495,8 @@ int spi_master_write(spi_t *obj, int value) {
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* @param[in] obj The SPI peripheral to check
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* @return non-zero if a value is available
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*/
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int spi_slave_receive(spi_t *obj) {
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int spi_slave_receive(spi_t *obj)
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{
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/* Sanity check arguments */
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MBED_ASSERT(obj);
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@ -462,7 +509,8 @@ int spi_slave_receive(spi_t *obj) {
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* @param[in] obj The SPI peripheral to read
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* @return The value received
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*/
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int spi_slave_read(spi_t *obj) {
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int spi_slave_read(spi_t *obj)
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{
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int i;
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uint16_t rx_data = 0;
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@ -492,7 +540,8 @@ int spi_slave_read(spi_t *obj) {
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* @param[in] obj The SPI peripheral to write
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* @param[in] value The value to write
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*/
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void spi_slave_write(spi_t *obj, int value) {
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void spi_slave_write(spi_t *obj, int value)
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{
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int i;
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/* Sanity check arguments */
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@ -535,7 +584,7 @@ uint8_t spi_get_module(spi_t *obj)
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{
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/* Sanity check arguments */
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MBED_ASSERT(obj);
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return _sercom_get_sercom_inst_index(pSPI_S(obj));
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return _sercom_get_sercom_inst_index(pSPI_SERCOM(obj));
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}
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@ -647,14 +696,12 @@ static void _spi_transceive_buffer(spi_t *obj)
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{
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/* Sanity check arguments */
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MBED_ASSERT(obj);
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void (*callback_func)(void);
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uint16_t interrupt_status = _SPI(obj).INTFLAG.reg;
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uint8_t sercom_index = _sercom_get_sercom_inst_index(obj->spi.spi);
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/* Disable all interrupt handlers for now
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_SPI(obj).INTENCLR.reg = interrupt_status;*/
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uint16_t interrupt_status = _SPI(obj).INTFLAG.reg;
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interrupt_status &= _SPI(obj).INTENSET.reg;
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if (interrupt_status & SERCOM_SPI_INTFLAG_DRE) {
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@ -665,7 +712,7 @@ static void _spi_transceive_buffer(spi_t *obj)
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_spi_read_async(obj);
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}
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if ((obj->spi.event & SPI_EVENT_ERROR) || (obj->spi.event & SPI_EVENT_RX_OVERFLOW)) {
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if (obj->spi.event & (SPI_EVENT_ERROR | SPI_EVENT_RX_OVERFLOW)) {
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/* Disable all interrupts */
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_SPI(obj).INTENCLR.reg =
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SERCOM_SPI_INTFLAG_DRE |
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@ -680,30 +727,35 @@ static void _spi_transceive_buffer(spi_t *obj)
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} else {
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obj->spi.status = STATUS_ERR_BAD_DATA;
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}
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// TODO: Invoke callback
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callback_func = _sercom_callbacks[sercom_index];
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if (callback_func && (obj->spi.mask & (SPI_EVENT_ERROR | SPI_EVENT_RX_OVERFLOW))) {
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callback_func();
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}
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obj->spi.status = STATUS_OK;
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return;
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}
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if (interrupt_status & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_RXC)) {
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if ((obj->tx_buff.pos >= obj->tx_buff.length) && (obj->rx_buff.pos >= obj->rx_buff.length)) {
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/* Clear all interrupts */
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_SPI(obj).INTENCLR.reg =
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SERCOM_SPI_INTFLAG_DRE |
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SERCOM_SPI_INTFLAG_TXC |
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SERCOM_SPI_INTFLAG_RXC |
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SERCOM_SPI_INTFLAG_ERROR;
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NVIC_DisableIRQ(SERCOM0_IRQn + sercom_index);
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NVIC_SetVector((SERCOM0_IRQn + sercom_index), (uint32_t)NULL);
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//if (interrupt_status & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_RXC)) {
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if ((obj->tx_buff.pos >= obj->tx_buff.length) && (obj->rx_buff.pos >= obj->rx_buff.length)) {
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/* Clear all interrupts */
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_SPI(obj).INTENCLR.reg =
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SERCOM_SPI_INTFLAG_DRE |
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SERCOM_SPI_INTFLAG_TXC |
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SERCOM_SPI_INTFLAG_RXC |
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SERCOM_SPI_INTFLAG_ERROR;
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NVIC_DisableIRQ(SERCOM0_IRQn + sercom_index);
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NVIC_SetVector((SERCOM0_IRQn + sercom_index), (uint32_t)NULL);
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/* Transfer complete, invoke the callback function */
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obj->spi.event |= SPI_EVENT_COMPLETE;
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// TODO: Invoke callback
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return;
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}
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/* Transfer complete, invoke the callback function */
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obj->spi.event |= SPI_EVENT_COMPLETE;
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callback_func = _sercom_callbacks[sercom_index];
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if (callback_func && (obj->spi.mask & SPI_EVENT_COMPLETE)) {
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callback_func();
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}
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obj->spi.status = STATUS_OK;
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return;
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}
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/* Enable back interrupts
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_SPI(obj).INTENSET.reg = interrupt_status;*/
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//}
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}
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/** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
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@ -720,7 +772,51 @@ static void _spi_transceive_buffer(spi_t *obj)
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*/
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void spi_master_transfer(spi_t *obj, void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
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{
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// TODO:
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/* Sanity check arguments */
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MBED_ASSERT(obj);
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uint8_t sercom_index = _sercom_get_sercom_inst_index(obj->spi.spi);
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obj->spi.tx_buffer = tx;
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obj->tx_buff.buffer = tx;
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obj->tx_buff.pos = 0;
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obj->tx_buff.length = tx_length * (bit_width>>3);
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obj->spi.rx_buffer = rx;
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obj->rx_buff.buffer = rx;
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obj->rx_buff.pos = 0;
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obj->rx_buff.length = rx_length * (bit_width>>3);
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_sercom_callbacks[sercom_index] = handler;
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obj->spi.mask = event;
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if (hint == DMA_USAGE_NEVER) {
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/* Use irq method */
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uint16_t irq_mask = 0;
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obj->spi.status = STATUS_BUSY;
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/* Enable interrupt */
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NVIC_SetVector((SERCOM0_IRQn + sercom_index), _sercom_handlers[sercom_index]);
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NVIC_EnableIRQ(SERCOM0_IRQn + sercom_index);
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/* Clear all interrupts */
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_SPI(obj).INTENCLR.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_RXC | SERCOM_SPI_INTFLAG_ERROR;
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_SPI(obj).INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_ERROR;
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_SPI(obj).STATUS.reg |= SERCOM_SPI_STATUS_BUFOVF;
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/* Set SPI interrupts */
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if (tx) {
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irq_mask |= SERCOM_SPI_INTFLAG_DRE;
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}
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if (rx) {
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irq_mask |= SERCOM_SPI_INTFLAG_RXC;
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}
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if (event & SPI_EVENT_ERROR) {
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irq_mask |= SERCOM_SPI_INTFLAG_ERROR;
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}
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_SPI(obj).INTENSET.reg = irq_mask;
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}
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}
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/** The asynchronous IRQ handler
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@ -741,7 +837,12 @@ uint32_t spi_irq_handler_asynch(spi_t *obj)
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*/
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uint8_t spi_active(spi_t *obj)
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{
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return 0;
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if (obj->spi.status == STATUS_BUSY) {
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/* Check if the SPI module is busy with a job */
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return 1;
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} else {
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return 0;
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}
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}
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/** Abort an SPI transfer
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@ -764,7 +865,7 @@ void spi_abort_asynch(spi_t *obj)
|
|||
|
||||
// TODO: Disable and remove irq handler
|
||||
NVIC_DisableIRQ(SERCOM0_IRQn + sercom_index);
|
||||
NVIC_SetVector((SERCOM0_IRQn + sercom_index), NULL);
|
||||
NVIC_SetVector((SERCOM0_IRQn + sercom_index), (uint32_t)NULL);
|
||||
|
||||
obj->spi.status = STATUS_ABORTED;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue