mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #4813 from jacobjohnson-ON/master
Dual Flash and Hex file support on NCS36510pull/4812/head
Anna Bridge
GitHub
commit
8a1c7fab79
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@ -1,49 +1,82 @@
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/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = 0x00003000;
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_IROM1_start__ = 0x00003000; /* FLASHA program start*/
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define symbol __ICFEDIT_region_IROM1_end__ = 0x00051FFF; /* 316K = 320K - 4K(FIB table), FLASHA end */
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define symbol __ICFEDIT_region_IROM2_start__ = 0x00102000;
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define symbol __ICFEDIT_region_IROM2_end__ = 0x00151FFF; /* 320K */
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define symbol __ICFEDIT_region_EROM1_start__ = 0x0;
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define symbol __ICFEDIT_region_EROM1_end__ = 0x0;
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define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
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define symbol __ICFEDIT_region_EROM2_end__ = 0x0;
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define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
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define symbol __ICFEDIT_region_EROM3_end__ = 0x0;
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/* The memory space denoting the maximum possible amount of addressable memory */
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define memory Mem with size = 4G;
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define symbol __ICFEDIT_region_IRAM1_start__ = 0x3FFFC000; /* RAMA start */
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define symbol __ICFEDIT_region_IRAM1_end__ = 0x3FFFFFFF; /* RAMA end */
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define symbol __ICFEDIT_region_IRAM2_start__ = 0x3FFF8000; /* RAMB start */
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define symbol __ICFEDIT_region_IRAM2_end__ = 0x3FFFBFFF; /* RAMB end */
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define symbol __ICFEDIT_region_IRAM3_start__ = 0x3FFF4000; /* RAMC start */
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define symbol __ICFEDIT_region_IRAM3_end__ = 0x3FFF7FFF; /* RAMC end */
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define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM1_end__ = 0x0;
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define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM2_end__ = 0x0;
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define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
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define symbol __ICFEDIT_region_ERAM3_end__ = 0x0;
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/* Memory regions in an address space */
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define region FLASHA = Mem:[from 0x00003000 size 0x4D000]; /* 308K = 320K - 4K(FIB table) - 8K(Persistent) */
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define region FLASHB = Mem:[from 0x00100000 size 0x50000];
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define region RAMA = Mem:[from 0x3FFFC000 size 0x4000];
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define region RAMB = Mem:[from 0x3FFF8000 size 0x4000];
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/* G2H ZPRO requires RAMC to be enabled */
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define region RAMC = Mem:[from 0x3FFF4000 + 0x90 size 0x4000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */
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define region RAM_ALL = Mem:[from 0x3FFF4000 + 0x90 size 0xC000 - 0x90]; /* 8_byte_aligned(35 vectors * 4 bytes each) = 0x90 */
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = 0x200;
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define symbol __ICFEDIT_size_heap__ = 0x4000;
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/**** End of ICF editor section. ###ICF###*/
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/* Create a stack */
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define block CSTACK with size = 0x200, alignment = 8 { };
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/* No Heap is created for C library, all memory management should be handled by the application */
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define block HEAP with alignment = 8, size = 0x3000 { };
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define memory mem with size = 4G;
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define region FLASH_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]
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| mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
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/* Handle initialization */
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do not initialize { section .noinit };
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define region RAM_VECTOR_region = mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_start__ + 0x90 - 1];
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/* Initialize RW sections, exclude zero-initialized sections */
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initialize by copy with packing = none { readwrite };
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define region RAM_region = mem:[from __ICFEDIT_region_IRAM3_start__ + 0x90 to __ICFEDIT_region_IRAM3_end__]
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| mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__]
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| mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ ];
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define region CSTACK_region = mem:[from __ICFEDIT_region_IRAM1_end__ - __ICFEDIT_size_cstack__ + 1 to __ICFEDIT_region_IRAM1_end__];
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/* Define overlays for MIB's, ths allows view of one MIB from a application level while
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* MAC and PHY only know about their own MIB */
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define overlay MIBOVERLAY { section MIBSTARTSECTION };
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define overlay MIBOVERLAY { section MIBSECTION };
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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define block RAM_VECTORS with alignment = 8, size = 0x90 { };
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initialize by copy { readwrite };
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if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
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{
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// Required in a multi-threaded application
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initialize by copy with packing = none { section __DLIB_PERTHREAD };
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}
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/* Initialize the code in RAM, copied over from FLASH */
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initialize by copy with packing = none { readonly code section EXECINRAM };
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/*keep { readonly code section .EXECINRAM* } except { readonly code section EXECINRAM };*/
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/* Place startup code at a fixed address */
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place at start of FLASHA { readonly section .intvec, readonly section SWVERSION,readonly section FIBTABLE,readonly section .cstartup };
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/* Place code and data */
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/* Place constants and initializers in FLASHA: .rodata and .data_init */
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place in FLASHA { readonly };
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/* Place .data, .bss, and .noinit */
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/* and STACK */
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/* The relocatable exception table needs to be aligned at 0x0 or multiple of 0x100,
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* hence, place it as first block in RAM.
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*/
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place at start of RAM_ALL { section RAM_VECTORS };
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place in RAM_ALL { readonly code section EXECINRAM };
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place at end of RAM_ALL { block CSTACK };
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/*initialize by copy { readwrite };*/
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do not initialize { section .noinit };
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place in RAM_ALL { readwrite };
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place in RAM_ALL { block HEAP };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, readonly section SWVERSION, readonly section FIBTABLE };
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place in FLASH_region { readonly section .cstartup, readonly };
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place at start of RAM_VECTOR_region {block RAM_VECTORS};
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place in RAM_region { readwrite, block HEAP, section XHEAP, readonly code section EXECINRAM, overlay MIBOVERLAY, readwrite section MIBENDSECTION};
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place at end of CSTACK_region { block CSTACK };
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@ -3165,6 +3165,7 @@
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"value": "0xFFFFFFFF"
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}
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},
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"OUTPUT_EXT": "hex",
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"post_binary_hook": {"function": "NCS36510TargetCode.ncs36510_addfib"},
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"macros": ["CM3", "CPU_NCS36510", "TARGET_NCS36510", "LOAD_ADDRESS=0x3000"],
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"supported_toolchains": ["GCC_ARM", "ARM", "IAR"],
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@ -18,9 +18,12 @@ import intelhex
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from tools.config import Config
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FIB_BASE = 0x2000
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FLASH_BASE = 0x3000
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FW_REV = 0x01000100
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TRIM_BASE = 0x2800
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FLASH_BASE = 0x3000
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FLASHA_SIZE = 0x52000
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FLASHB_BASE = 0x00102000
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FLASHB_SIZE = 0x52000
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FW_REV = 0x01000100
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def ranges(i):
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for _, b in itertools.groupby(enumerate(i), lambda x_y: x_y[1] - x_y[0]):
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@ -29,17 +32,17 @@ def ranges(i):
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def add_fib_at_start(arginput):
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input_file = arginput + ".bin"
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file_name_hex = arginput + "_fib.hex"
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input_file = arginput + ".hex"
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file_name_hex = arginput + ".hex"
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file_name_bin = arginput + ".bin"
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# Read in hex file
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input_hex_file = intelhex.IntelHex()
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input_hex_file.padding = 0x00
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input_hex_file.loadbin(input_file, offset=FLASH_BASE)
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input_hex_file.loadhex(input_file)
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#set padding value to be returned when reading from unspecified address
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input_hex_file.padding = 0xFF
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# Create new hex file
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output_hex_file = intelhex.IntelHex()
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output_hex_file.padding = 0x00
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# Get the starting and ending address
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addresses = input_hex_file.addresses()
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@ -48,17 +51,41 @@ def add_fib_at_start(arginput):
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regions = len(start_end_pairs)
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if regions == 1:
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#single range indicating fits within first flash block (<320K)
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start, end = start_end_pairs[0]
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print("Memory start 0x%08X, end 0x%08X" % (start, end))
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# Compute checksum over the range (don't include data at location of crc)
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size = end - start + 1
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data = input_hex_file.tobinarray(start=start, size=size)
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crc32 = binascii.crc32(data) & 0xFFFFFFFF
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else:
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start = min(min(start_end_pairs))
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end = max(max(start_end_pairs))
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#multiple ranges indicating requires both flash blocks (>320K)
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start, end = start_end_pairs[0]
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start2, end2 = start_end_pairs[1]
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print("Region 1: memory start 0x%08X, end 0x%08X" % (start, end))
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print("Region 2: memory start 0x%08X, end 0x%08X" % (start2, end2))
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# Compute checksum over the range (don't include data at location of crc)
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# replace end with end of flash block A
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end = FLASHA_SIZE - 1
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size = end - start + 1
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data = input_hex_file.tobinarray(start=start, size=size)
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# replace start2 with base of flash block B
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start2 = FLASHB_BASE
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size2 = end2 - start2 + 1
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data2 = input_hex_file.tobinarray(start=start2, size=size2)
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#concatenate data and data2 arrays together
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data.extend(data2)
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crc32 = binascii.crc32(data) & 0xFFFFFFFF
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#replace size with sum of two memory region sizes
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size = size + size2
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assert start >= FLASH_BASE, ("Error - start 0x%x less than begining of user\
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flash area" %start)
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# Compute checksum over the range (don't include data at location of crc)
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size = end - start + 1
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data = input_hex_file.tobinarray(start=start, size=size)
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crc32 = binascii.crc32(data) & 0xFFFFFFFF
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assert regions <= 2, ("Error - more than 2 memory regions found")
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fw_rev = FW_REV
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@ -177,7 +204,7 @@ def add_fib_at_start(arginput):
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output_hex_file[trim_area_start + 1] = (mac_addr_low >> 8) & 0xFF
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output_hex_file[trim_area_start + 2] = (mac_addr_low >> 16) & 0xFF
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output_hex_file[trim_area_start + 3] = (mac_addr_low >> 24) & 0xFF
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output_hex_file[trim_area_start + 4] = mac_addr_high & 0xFF
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output_hex_file[trim_area_start + 5] = (mac_addr_high >> 8) & 0xFF
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output_hex_file[trim_area_start + 6] = (mac_addr_high >> 16) & 0xFF
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@ -202,7 +229,7 @@ def add_fib_at_start(arginput):
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output_hex_file[trim_area_start + 21] = (txtune >> 8) & 0xFF
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output_hex_file[trim_area_start + 22] = (txtune >> 16) & 0xFF
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output_hex_file[trim_area_start + 23] = (txtune >> 24) & 0xFF
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# pad the rest of the area with 0xFF
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for i in range(trim_area_start + trim_size, user_code_start):
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output_hex_file[i] = 0xFF
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@ -212,4 +239,3 @@ def add_fib_at_start(arginput):
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# Write out file(s)
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output_hex_file.tofile(file_name_hex, 'hex')
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output_hex_file.tofile(file_name_bin, 'bin')
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