MCUXpresso: Fix ENET driver to enable interrupts after interrupt handlers are set

Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
pull/3519/head
Mahadevan Mahesh 2017-01-03 13:08:07 -06:00
parent 9e24117b68
commit 89f8fe49a2
4 changed files with 163 additions and 116 deletions

View File

@ -106,6 +106,8 @@
#define ENET_NTOHS(n) __REV16(n) #define ENET_NTOHS(n) __REV16(n)
#define ENET_NTOHL(n) __REV(n) #define ENET_NTOHL(n) __REV(n)
/* Typedef for interrupt handler. */
typedef void (*enet_isr_t)(ENET_Type *base, enet_handle_t *handle);
/******************************************************************************* /*******************************************************************************
* Prototypes * Prototypes
******************************************************************************/ ******************************************************************************/
@ -132,7 +134,18 @@ static void ENET_SetMacController(ENET_Type *base,
const enet_buffer_config_t *bufferConfig, const enet_buffer_config_t *bufferConfig,
uint8_t *macAddr, uint8_t *macAddr,
uint32_t srcClock_Hz); uint32_t srcClock_Hz);
/*!
* @brief Set ENET handler.
*
* @param base ENET peripheral base address.
* @param handle The ENET handle pointer.
* @param config ENET configuration stucture pointer.
* @param bufferConfig ENET buffer configuration.
*/
static void ENET_SetHandler(ENET_Type *base,
enet_handle_t *handle,
const enet_config_t *config,
const enet_buffer_config_t *bufferConfig);
/*! /*!
* @brief Set ENET MAC transmit buffer descriptors. * @brief Set ENET MAC transmit buffer descriptors.
* *
@ -226,22 +239,26 @@ static status_t ENET_StoreRxFrameTime(ENET_Type *base, enet_handle_t *handle, en
static enet_handle_t *s_ENETHandle[FSL_FEATURE_SOC_ENET_COUNT] = {NULL}; static enet_handle_t *s_ENETHandle[FSL_FEATURE_SOC_ENET_COUNT] = {NULL};
/*! @brief Pointers to enet clocks for each instance. */ /*! @brief Pointers to enet clocks for each instance. */
const clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT] = ENET_CLOCKS; const clock_ip_name_t s_enetClock[] = ENET_CLOCKS;
/*! @brief Pointers to enet transmit IRQ number for each instance. */ /*! @brief Pointers to enet transmit IRQ number for each instance. */
const IRQn_Type s_enetTxIrqId[] = ENET_Transmit_IRQS; static const IRQn_Type s_enetTxIrqId[] = ENET_Transmit_IRQS;
/*! @brief Pointers to enet receive IRQ number for each instance. */ /*! @brief Pointers to enet receive IRQ number for each instance. */
const IRQn_Type s_enetRxIrqId[] = ENET_Receive_IRQS; static const IRQn_Type s_enetRxIrqId[] = ENET_Receive_IRQS;
#if defined(ENET_ENHANCEDBUFFERDESCRIPTOR_MODE) && ENET_ENHANCEDBUFFERDESCRIPTOR_MODE #if defined(ENET_ENHANCEDBUFFERDESCRIPTOR_MODE) && ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
/*! @brief Pointers to enet timestamp IRQ number for each instance. */ /*! @brief Pointers to enet timestamp IRQ number for each instance. */
const IRQn_Type s_enetTsIrqId[] = ENET_1588_Timer_IRQS; static const IRQn_Type s_enetTsIrqId[] = ENET_1588_Timer_IRQS;
#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
/*! @brief Pointers to enet error IRQ number for each instance. */ /*! @brief Pointers to enet error IRQ number for each instance. */
const IRQn_Type s_enetErrIrqId[] = ENET_Error_IRQS; static const IRQn_Type s_enetErrIrqId[] = ENET_Error_IRQS;
/*! @brief Pointers to enet bases for each instance. */ /*! @brief Pointers to enet bases for each instance. */
static ENET_Type *const s_enetBases[] = ENET_BASE_PTRS; static ENET_Type *const s_enetBases[] = ENET_BASE_PTRS;
/* ENET ISR for transactional APIs. */
static enet_isr_t s_enetTxIsr;
static enet_isr_t s_enetRxIsr;
static enet_isr_t s_enetErrIsr;
/******************************************************************************* /*******************************************************************************
* Code * Code
******************************************************************************/ ******************************************************************************/
@ -312,26 +329,13 @@ void ENET_Init(ENET_Type *base,
/* Initializes the ENET receive buffer descriptors. */ /* Initializes the ENET receive buffer descriptors. */
ENET_SetRxBufferDescriptors(bufferConfig->rxBdStartAddrAlign, bufferConfig->rxBufferAlign, ENET_SetRxBufferDescriptors(bufferConfig->rxBdStartAddrAlign, bufferConfig->rxBufferAlign,
bufferConfig->rxBuffSizeAlign, bufferConfig->rxBdNumber, bufferConfig->rxBuffSizeAlign, bufferConfig->rxBdNumber,
!!(config->interrupt & (kENET_RxFrameInterrupt | kENET_RxByteInterrupt))); !!(config->interrupt & (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt)));
/* Initializes the ENET MAC controller. */ /* Initializes the ENET MAC controller. */
ENET_SetMacController(base, config, bufferConfig, macAddr, srcClock_Hz); ENET_SetMacController(base, config, bufferConfig, macAddr, srcClock_Hz);
/* Initialize the handle to zero. */ /* Set all buffers or data in handler for data transmit/receive process. */
memset(handle, 0, sizeof(enet_handle_t)); ENET_SetHandler(base, handle, config, bufferConfig);
/* Store transfer parameters in handle pointer. */
handle->rxBdBase = bufferConfig->rxBdStartAddrAlign;
handle->rxBdCurrent = bufferConfig->rxBdStartAddrAlign;
handle->rxBdDirty = bufferConfig->rxBdStartAddrAlign;
handle->txBdBase = bufferConfig->txBdStartAddrAlign;
handle->txBdCurrent = bufferConfig->txBdStartAddrAlign;
handle->txBdDirty = bufferConfig->txBdStartAddrAlign;
handle->rxBuffSizeAlign = bufferConfig->rxBuffSizeAlign;
handle->txBuffSizeAlign = bufferConfig->txBuffSizeAlign;
/* Save the handle pointer in the global variables. */
s_ENETHandle[instance] = handle;
} }
void ENET_Deinit(ENET_Type *base) void ENET_Deinit(ENET_Type *base)
@ -355,6 +359,44 @@ void ENET_SetCallback(enet_handle_t *handle, enet_callback_t callback, void *use
handle->userData = userData; handle->userData = userData;
} }
static void ENET_SetHandler(ENET_Type *base,
enet_handle_t *handle,
const enet_config_t *config,
const enet_buffer_config_t *bufferConfig)
{
uint32_t instance = ENET_GetInstance(base);
memset(handle, 0, sizeof(enet_handle_t));
handle->rxBdBase = bufferConfig->rxBdStartAddrAlign;
handle->rxBdCurrent = bufferConfig->rxBdStartAddrAlign;
handle->txBdBase = bufferConfig->txBdStartAddrAlign;
handle->txBdCurrent = bufferConfig->txBdStartAddrAlign;
handle->txBdDirty = bufferConfig->txBdStartAddrAlign;
handle->rxBuffSizeAlign = bufferConfig->rxBuffSizeAlign;
handle->txBuffSizeAlign = bufferConfig->txBuffSizeAlign;
/* Save the handle pointer in the global variables. */
s_ENETHandle[instance] = handle;
/* Set the IRQ handler when the interrupt is enabled. */
if (config->interrupt & ENET_TX_INTERRUPT)
{
s_enetTxIsr = ENET_TransmitIRQHandler;
EnableIRQ(s_enetTxIrqId[instance]);
}
if (config->interrupt & ENET_RX_INTERRUPT)
{
s_enetRxIsr = ENET_ReceiveIRQHandler;
EnableIRQ(s_enetRxIrqId[instance]);
}
if (config->interrupt & ENET_ERR_INTERRUPT)
{
s_enetErrIsr = ENET_ErrorIRQHandler;
EnableIRQ(s_enetErrIrqId[instance]);
}
}
static void ENET_SetMacController(ENET_Type *base, static void ENET_SetMacController(ENET_Type *base,
const enet_config_t *config, const enet_config_t *config,
const enet_buffer_config_t *bufferConfig, const enet_buffer_config_t *bufferConfig,
@ -452,20 +494,6 @@ static void ENET_SetMacController(ENET_Type *base,
/* Enables Ethernet interrupt and NVIC. */ /* Enables Ethernet interrupt and NVIC. */
ENET_EnableInterrupts(base, config->interrupt); ENET_EnableInterrupts(base, config->interrupt);
if (config->interrupt & (kENET_RxByteInterrupt | kENET_RxFrameInterrupt))
{
EnableIRQ(s_enetRxIrqId[instance]);
}
if (config->interrupt & (kENET_TxByteInterrupt | kENET_TxFrameInterrupt))
{
EnableIRQ(s_enetTxIrqId[instance]);
}
if (config->interrupt & (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_GraceStopInterrupt | kENET_MiiInterrupt |
kENET_EBusERInterrupt | kENET_LateCollisionInterrupt | kENET_RetryLimitInterrupt |
kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt | kENET_WakeupInterrupt))
{
EnableIRQ(s_enetErrIrqId[instance]);
}
/* ENET control register setting. */ /* ENET control register setting. */
ecr = base->ECR; ecr = base->ECR;
@ -490,7 +518,7 @@ static void ENET_SetTxBufferDescriptors(volatile enet_tx_bd_struct_t *txBdStartA
for (count = 0; count < txBdNumber; count++) for (count = 0; count < txBdNumber; count++)
{ {
if (txBuffSizeAlign != NULL) if (txBuffStartAlign != NULL)
{ {
/* Set data buffer address. */ /* Set data buffer address. */
curBuffDescrip->buffer = (uint8_t *)((uint32_t)&txBuffStartAlign[count * txBuffSizeAlign]); curBuffDescrip->buffer = (uint8_t *)((uint32_t)&txBuffStartAlign[count * txBuffSizeAlign]);
@ -517,6 +545,7 @@ static void ENET_SetTxBufferDescriptors(volatile enet_tx_bd_struct_t *txBdStartA
/* Increase the index. */ /* Increase the index. */
curBuffDescrip++; curBuffDescrip++;
} }
} }
static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartAlign, static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartAlign,
@ -564,12 +593,8 @@ static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartA
void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex) void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)
{ {
uint32_t rcr; uint32_t rcr = base->RCR;
uint32_t tcr; uint32_t tcr = base->TCR;
rcr = base->RCR;
tcr = base->TCR;
/* Sets speed mode. */ /* Sets speed mode. */
if (kENET_MiiSpeed10M == speed) if (kENET_MiiSpeed10M == speed)
{ {
@ -1274,11 +1299,9 @@ void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_conf
/* Enables the time stamp interrupt for the master clock on a device. */ /* Enables the time stamp interrupt for the master clock on a device. */
ENET_EnableInterrupts(base, kENET_TsTimerInterrupt); ENET_EnableInterrupts(base, kENET_TsTimerInterrupt);
EnableIRQ(s_enetTsIrqId[instance]);
/* Enables the transmit interrupt to store the transmit frame time-stamp. */ /* Enables the transmit interrupt to store the transmit frame time-stamp. */
ENET_EnableInterrupts(base, kENET_TxFrameInterrupt); ENET_EnableInterrupts(base, kENET_TxFrameInterrupt);
EnableIRQ(s_enetTxIrqId[instance]); ENET_DisableInterrupts(base, kENET_TxBufferInterrupt);
/* Setting the receive and transmit state for transaction. */ /* Setting the receive and transmit state for transaction. */
handle->rxPtpTsDataRing.ptpTsData = ptpConfig->rxPtpTsData; handle->rxPtpTsDataRing.ptpTsData = ptpConfig->rxPtpTsData;
@ -1292,6 +1315,11 @@ void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_conf
handle->msTimerSecond = 0; handle->msTimerSecond = 0;
handle->txBdDirtyTime = handle->txBdBase; handle->txBdDirtyTime = handle->txBdBase;
handle->txBdDirtyStatic = handle->txBdBase; handle->txBdDirtyStatic = handle->txBdBase;
/* Set the IRQ handler when the interrupt is enabled. */
s_enetTxIsr = ENET_TransmitIRQHandler;
EnableIRQ(s_enetTsIrqId[instance]);
EnableIRQ(s_enetTxIrqId[instance]);
} }
void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc) void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc)
@ -1591,14 +1619,19 @@ void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle)
assert(handle); assert(handle);
/* Check if the transmit interrupt happen. */ /* Check if the transmit interrupt happen. */
if ((kENET_TxByteInterrupt | kENET_TxFrameInterrupt) & base->EIR) while ((kENET_TxBufferInterrupt | kENET_TxFrameInterrupt) & base->EIR)
{ {
/* Clear the transmit interrupt event. */
base->EIR = kENET_TxFrameInterrupt | kENET_TxByteInterrupt;
#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
if (base->EIR & kENET_TxFrameInterrupt)
{
/* Store the transmit timestamp from the buffer descriptor should be done here. */ /* Store the transmit timestamp from the buffer descriptor should be done here. */
ENET_StoreTxFrameTime(base, handle); ENET_StoreTxFrameTime(base, handle);
}
#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
/* Clear the transmit interrupt event. */
base->EIR = kENET_TxFrameInterrupt | kENET_TxBufferInterrupt;
/* Callback function. */ /* Callback function. */
if (handle->callback) if (handle->callback)
{ {
@ -1612,10 +1645,10 @@ void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle)
assert(handle); assert(handle);
/* Check if the receive interrupt happen. */ /* Check if the receive interrupt happen. */
if ((kENET_RxByteInterrupt | kENET_RxFrameInterrupt) & base->EIR) while ((kENET_RxBufferInterrupt | kENET_RxFrameInterrupt) & base->EIR)
{ {
/* Clear the transmit interrupt event. */ /* Clear the transmit interrupt event. */
base->EIR = kENET_RxFrameInterrupt | kENET_RxByteInterrupt; base->EIR = kENET_RxFrameInterrupt | kENET_RxBufferInterrupt;
/* Callback function. */ /* Callback function. */
if (handle->callback) if (handle->callback)
@ -1688,26 +1721,24 @@ void ENET_Ptp1588TimerIRQHandler(ENET_Type *base, enet_handle_t *handle)
} }
} }
} }
void ENET_1588_Timer_IRQHandler(void)
{
ENET_Ptp1588TimerIRQHandler(ENET, s_ENETHandle[0]);
}
#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */ #endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
void ENET_Transmit_IRQHandler(void) void ENET_Transmit_IRQHandler(void)
{ {
ENET_TransmitIRQHandler(ENET, s_ENETHandle[0]); s_enetTxIsr(ENET, s_ENETHandle[0]);
} }
void ENET_Receive_IRQHandler(void) void ENET_Receive_IRQHandler(void)
{ {
ENET_ReceiveIRQHandler(ENET, s_ENETHandle[0]); s_enetRxIsr(ENET, s_ENETHandle[0]);
} }
void ENET_Error_IRQHandler(void) void ENET_Error_IRQHandler(void)
{ {
ENET_ErrorIRQHandler(ENET, s_ENETHandle[0]); s_enetErrIsr(ENET, s_ENETHandle[0]);
}
void ENET_1588_Timer_IRQHandler(void)
{
#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
ENET_Ptp1588TimerIRQHandler(ENET, s_ENETHandle[0]);
#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
} }

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@ -122,6 +122,10 @@
#define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \ #define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \
(ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK) (ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK)
#endif #endif
#define ENET_TX_INTERRUPT (kENET_TxFrameInterrupt | kENET_TxBufferInterrupt)
#define ENET_RX_INTERRUPT (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt)
#define ENET_ERR_INTERRUPT (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_EBusERInterrupt | \
kENET_LateCollisionInterrupt | kENET_RetryLimitInterrupt | kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt)
/*! @name Defines the maximum Ethernet frame size. */ /*! @name Defines the maximum Ethernet frame size. */
/*@{*/ /*@{*/
@ -224,9 +228,9 @@ typedef enum _enet_interrupt_enable
kENET_BabtInterrupt = ENET_EIR_BABT_MASK, /*!< Babbling transmit error interrupt source */ kENET_BabtInterrupt = ENET_EIR_BABT_MASK, /*!< Babbling transmit error interrupt source */
kENET_GraceStopInterrupt = ENET_EIR_GRA_MASK, /*!< Graceful stop complete interrupt source */ kENET_GraceStopInterrupt = ENET_EIR_GRA_MASK, /*!< Graceful stop complete interrupt source */
kENET_TxFrameInterrupt = ENET_EIR_TXF_MASK, /*!< TX FRAME interrupt source */ kENET_TxFrameInterrupt = ENET_EIR_TXF_MASK, /*!< TX FRAME interrupt source */
kENET_TxByteInterrupt = ENET_EIR_TXB_MASK, /*!< TX BYTE interrupt source */ kENET_TxBufferInterrupt = ENET_EIR_TXB_MASK, /*!< TX BUFFER interrupt source */
kENET_RxFrameInterrupt = ENET_EIR_RXF_MASK, /*!< RX FRAME interrupt source */ kENET_RxFrameInterrupt = ENET_EIR_RXF_MASK, /*!< RX FRAME interrupt source */
kENET_RxByteInterrupt = ENET_EIR_RXB_MASK, /*!< RX BYTE interrupt source */ kENET_RxBufferInterrupt = ENET_EIR_RXB_MASK, /*!< RX BUFFER interrupt source */
kENET_MiiInterrupt = ENET_EIR_MII_MASK, /*!< MII interrupt source */ kENET_MiiInterrupt = ENET_EIR_MII_MASK, /*!< MII interrupt source */
kENET_EBusERInterrupt = ENET_EIR_EBERR_MASK, /*!< Ethernet bus error interrupt source */ kENET_EBusERInterrupt = ENET_EIR_EBERR_MASK, /*!< Ethernet bus error interrupt source */
kENET_LateCollisionInterrupt = ENET_EIR_LC_MASK, /*!< Late collision interrupt source */ kENET_LateCollisionInterrupt = ENET_EIR_LC_MASK, /*!< Late collision interrupt source */

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@ -134,7 +134,18 @@ static void ENET_SetMacController(ENET_Type *base,
const enet_buffer_config_t *bufferConfig, const enet_buffer_config_t *bufferConfig,
uint8_t *macAddr, uint8_t *macAddr,
uint32_t srcClock_Hz); uint32_t srcClock_Hz);
/*!
* @brief Set ENET handler.
*
* @param base ENET peripheral base address.
* @param handle The ENET handle pointer.
* @param config ENET configuration stucture pointer.
* @param bufferConfig ENET buffer configuration.
*/
static void ENET_SetHandler(ENET_Type *base,
enet_handle_t *handle,
const enet_config_t *config,
const enet_buffer_config_t *bufferConfig);
/*! /*!
* @brief Set ENET MAC transmit buffer descriptors. * @brief Set ENET MAC transmit buffer descriptors.
* *
@ -229,7 +240,7 @@ static enet_handle_t *s_ENETHandle[FSL_FEATURE_SOC_ENET_COUNT] = {NULL};
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to enet clocks for each instance. */ /*! @brief Pointers to enet clocks for each instance. */
const clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT] = ENET_CLOCKS; const clock_ip_name_t s_enetClock[] = ENET_CLOCKS;
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */ #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*! @brief Pointers to enet transmit IRQ number for each instance. */ /*! @brief Pointers to enet transmit IRQ number for each instance. */
@ -327,28 +338,8 @@ void ENET_Init(ENET_Type *base,
/* Initializes the ENET MAC controller. */ /* Initializes the ENET MAC controller. */
ENET_SetMacController(base, config, bufferConfig, macAddr, srcClock_Hz); ENET_SetMacController(base, config, bufferConfig, macAddr, srcClock_Hz);
/* Initialize the handle to zero. */ /* Set all buffers or data in handler for data transmit/receive process. */
memset(handle, 0, sizeof(enet_handle_t)); ENET_SetHandler(base, handle, config, bufferConfig);
/* Store transfer parameters in handle pointer. */
handle->rxBdBase = bufferConfig->rxBdStartAddrAlign;
handle->rxBdCurrent = bufferConfig->rxBdStartAddrAlign;
handle->txBdBase = bufferConfig->txBdStartAddrAlign;
handle->txBdCurrent = bufferConfig->txBdStartAddrAlign;
handle->txBdDirty = bufferConfig->txBdStartAddrAlign;
handle->rxBuffSizeAlign = bufferConfig->rxBuffSizeAlign;
handle->txBuffSizeAlign = bufferConfig->txBuffSizeAlign;
/* Save the handle pointer in the global variables. */
s_ENETHandle[instance] = handle;
/* Set the IRQ handler when the interrupt is enabled. */
if (config->interrupt)
{
s_enetTxIsr = ENET_TransmitIRQHandler;
s_enetRxIsr = ENET_ReceiveIRQHandler;
s_enetErrIsr = ENET_ErrorIRQHandler;
}
} }
void ENET_Deinit(ENET_Type *base) void ENET_Deinit(ENET_Type *base)
@ -374,6 +365,44 @@ void ENET_SetCallback(enet_handle_t *handle, enet_callback_t callback, void *use
handle->userData = userData; handle->userData = userData;
} }
static void ENET_SetHandler(ENET_Type *base,
enet_handle_t *handle,
const enet_config_t *config,
const enet_buffer_config_t *bufferConfig)
{
uint32_t instance = ENET_GetInstance(base);
memset(handle, 0, sizeof(enet_handle_t));
handle->rxBdBase = bufferConfig->rxBdStartAddrAlign;
handle->rxBdCurrent = bufferConfig->rxBdStartAddrAlign;
handle->txBdBase = bufferConfig->txBdStartAddrAlign;
handle->txBdCurrent = bufferConfig->txBdStartAddrAlign;
handle->txBdDirty = bufferConfig->txBdStartAddrAlign;
handle->rxBuffSizeAlign = bufferConfig->rxBuffSizeAlign;
handle->txBuffSizeAlign = bufferConfig->txBuffSizeAlign;
/* Save the handle pointer in the global variables. */
s_ENETHandle[instance] = handle;
/* Set the IRQ handler when the interrupt is enabled. */
if (config->interrupt & ENET_TX_INTERRUPT)
{
s_enetTxIsr = ENET_TransmitIRQHandler;
EnableIRQ(s_enetTxIrqId[instance]);
}
if (config->interrupt & ENET_RX_INTERRUPT)
{
s_enetRxIsr = ENET_ReceiveIRQHandler;
EnableIRQ(s_enetRxIrqId[instance]);
}
if (config->interrupt & ENET_ERR_INTERRUPT)
{
s_enetErrIsr = ENET_ErrorIRQHandler;
EnableIRQ(s_enetErrIrqId[instance]);
}
}
static void ENET_SetMacController(ENET_Type *base, static void ENET_SetMacController(ENET_Type *base,
const enet_config_t *config, const enet_config_t *config,
const enet_buffer_config_t *bufferConfig, const enet_buffer_config_t *bufferConfig,
@ -471,20 +500,6 @@ static void ENET_SetMacController(ENET_Type *base,
/* Enables Ethernet interrupt and NVIC. */ /* Enables Ethernet interrupt and NVIC. */
ENET_EnableInterrupts(base, config->interrupt); ENET_EnableInterrupts(base, config->interrupt);
if (config->interrupt & (kENET_RxBufferInterrupt | kENET_RxFrameInterrupt))
{
EnableIRQ(s_enetRxIrqId[instance]);
}
if (config->interrupt & (kENET_TxBufferInterrupt | kENET_TxFrameInterrupt))
{
EnableIRQ(s_enetTxIrqId[instance]);
}
if (config->interrupt & (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_GraceStopInterrupt | kENET_MiiInterrupt |
kENET_EBusERInterrupt | kENET_LateCollisionInterrupt | kENET_RetryLimitInterrupt |
kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt | kENET_WakeupInterrupt))
{
EnableIRQ(s_enetErrIrqId[instance]);
}
/* ENET control register setting. */ /* ENET control register setting. */
ecr = base->ECR; ecr = base->ECR;
@ -509,7 +524,7 @@ static void ENET_SetTxBufferDescriptors(volatile enet_tx_bd_struct_t *txBdStartA
for (count = 0; count < txBdNumber; count++) for (count = 0; count < txBdNumber; count++)
{ {
if (txBuffSizeAlign != NULL) if (txBuffStartAlign != NULL)
{ {
/* Set data buffer address. */ /* Set data buffer address. */
curBuffDescrip->buffer = (uint8_t *)((uint32_t)&txBuffStartAlign[count * txBuffSizeAlign]); curBuffDescrip->buffer = (uint8_t *)((uint32_t)&txBuffStartAlign[count * txBuffSizeAlign]);
@ -536,6 +551,7 @@ static void ENET_SetTxBufferDescriptors(volatile enet_tx_bd_struct_t *txBdStartA
/* Increase the index. */ /* Increase the index. */
curBuffDescrip++; curBuffDescrip++;
} }
} }
static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartAlign, static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartAlign,
@ -583,12 +599,8 @@ static void ENET_SetRxBufferDescriptors(volatile enet_rx_bd_struct_t *rxBdStartA
void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex) void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)
{ {
uint32_t rcr; uint32_t rcr = base->RCR;
uint32_t tcr; uint32_t tcr = base->TCR;
rcr = base->RCR;
tcr = base->TCR;
/* Sets speed mode. */ /* Sets speed mode. */
if (kENET_MiiSpeed10M == speed) if (kENET_MiiSpeed10M == speed)
{ {
@ -893,7 +905,6 @@ status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, u
{ {
break; break;
} }
memcpy(data + offset, curBuffDescrip->buffer, handle->rxBuffSizeAlign); memcpy(data + offset, curBuffDescrip->buffer, handle->rxBuffSizeAlign);
offset += handle->rxBuffSizeAlign; offset += handle->rxBuffSizeAlign;
@ -993,7 +1004,6 @@ status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, u
/* One frame requires more than one transmit buffers. */ /* One frame requires more than one transmit buffers. */
do do
{ {
#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE #ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
/* For enable the timestamp. */ /* For enable the timestamp. */
if (isPtpEventMessage) if (isPtpEventMessage)
@ -1291,15 +1301,11 @@ void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_conf
/* Enables the time stamp interrupt for the master clock on a device. */ /* Enables the time stamp interrupt for the master clock on a device. */
ENET_EnableInterrupts(base, kENET_TsTimerInterrupt); ENET_EnableInterrupts(base, kENET_TsTimerInterrupt);
EnableIRQ(s_enetTsIrqId[instance]);
/* Enables only frame interrupt for transmit side to store the transmit /* Enables only frame interrupt for transmit side to store the transmit
frame time-stamp when the whole frame is transmitted out. */ frame time-stamp when the whole frame is transmitted out. */
ENET_EnableInterrupts(base, kENET_TxFrameInterrupt); ENET_EnableInterrupts(base, kENET_TxFrameInterrupt);
ENET_DisableInterrupts(base, kENET_TxBufferInterrupt); ENET_DisableInterrupts(base, kENET_TxBufferInterrupt);
EnableIRQ(s_enetTxIrqId[instance]);
/* Setting the receive and transmit state for transaction. */ /* Setting the receive and transmit state for transaction. */
handle->rxPtpTsDataRing.ptpTsData = ptpConfig->rxPtpTsData; handle->rxPtpTsDataRing.ptpTsData = ptpConfig->rxPtpTsData;
handle->rxPtpTsDataRing.size = ptpConfig->ptpTsRxBuffNum; handle->rxPtpTsDataRing.size = ptpConfig->ptpTsRxBuffNum;
@ -1315,6 +1321,8 @@ void ENET_Ptp1588Configure(ENET_Type *base, enet_handle_t *handle, enet_ptp_conf
/* Set the IRQ handler when the interrupt is enabled. */ /* Set the IRQ handler when the interrupt is enabled. */
s_enetTxIsr = ENET_TransmitIRQHandler; s_enetTxIsr = ENET_TransmitIRQHandler;
EnableIRQ(s_enetTsIrqId[instance]);
EnableIRQ(s_enetTxIrqId[instance]);
} }
void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc) void ENET_Ptp1588StartTimer(ENET_Type *base, uint32_t ptpClkSrc)

View File

@ -121,6 +121,10 @@
#define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \ #define ENET_BUFFDESCRIPTOR_RX_EXT_ERR_MASK \
(ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK) (ENET_BUFFDESCRIPTOR_RX_MACERR_MASK | ENET_BUFFDESCRIPTOR_RX_PHYERR_MASK | ENET_BUFFDESCRIPTOR_RX_COLLISION_MASK)
#endif #endif
#define ENET_TX_INTERRUPT (kENET_TxFrameInterrupt | kENET_TxBufferInterrupt)
#define ENET_RX_INTERRUPT (kENET_RxFrameInterrupt | kENET_RxBufferInterrupt)
#define ENET_ERR_INTERRUPT (kENET_BabrInterrupt | kENET_BabtInterrupt | kENET_EBusERInterrupt | \
kENET_LateCollisionInterrupt | kENET_RetryLimitInterrupt | kENET_UnderrunInterrupt | kENET_PayloadRxInterrupt)
/*! @name Defines the maximum Ethernet frame size. */ /*! @name Defines the maximum Ethernet frame size. */
/*@{*/ /*@{*/