mirror of https://github.com/ARMmbed/mbed-os.git
Error resolve, bug fix and 2 new targets information add
1. Resolve the Error: L6218E: Undefined symbol flash_get_erase_value 2. Bug fix (ADC, USART, etc.) 3. Modify the wrong name (TATGET_GigaDevice-->TARGET_GigaDevice) 4. Add new targets (GD32-F450ZI and GD32-E103VB) support to target.json 5. Add INITIAL_SP macro for GD32-F450ZI and GD32-E103VBpull/8725/head
parent
95f7a97a9b
commit
881561ac5e
|
@ -43,9 +43,9 @@ typedef enum {
|
||||||
UART_4 = (int)UART4
|
UART_4 = (int)UART4
|
||||||
} UARTName;
|
} UARTName;
|
||||||
|
|
||||||
#define STDIO_UART_TX PORTA_9
|
#define STDIO_UART_TX PORTC_10
|
||||||
#define STDIO_UART_RX PORTA_10
|
#define STDIO_UART_RX PORTC_11
|
||||||
#define STDIO_UART UART_0
|
#define STDIO_UART UART_2
|
||||||
|
|
||||||
typedef enum {
|
typedef enum {
|
||||||
SPI_0 = (int)SPI0,
|
SPI_0 = (int)SPI0,
|
|
@ -272,7 +272,7 @@ const PinMap PinMap_UART_TX[] = {
|
||||||
{PORTB_10, UART_2, 7},
|
{PORTB_10, UART_2, 7},
|
||||||
{PORTC_10, UART_2, 7 | (5 << 3)}, /* GPIO_USART2_TX_PARTIAL_REMAP */
|
{PORTC_10, UART_2, 7 | (5 << 3)}, /* GPIO_USART2_TX_PARTIAL_REMAP */
|
||||||
{PORTD_8, UART_2, 7 | (6 << 3)}, /* GPIO_USART2_TX_FULL_REMAP */
|
{PORTD_8, UART_2, 7 | (6 << 3)}, /* GPIO_USART2_TX_FULL_REMAP */
|
||||||
{PORTC_10, UART_3, 7},
|
{PORTC_10_MUL0, UART_3, 7},
|
||||||
{PORTC_12, UART_4, 7},
|
{PORTC_12, UART_4, 7},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
@ -284,8 +284,8 @@ const PinMap PinMap_UART_RX[] = {
|
||||||
{PORTD_6, UART_1, 1 | (4 << 3)}, /* GPIO_USART1_RX_REMAP */
|
{PORTD_6, UART_1, 1 | (4 << 3)}, /* GPIO_USART1_RX_REMAP */
|
||||||
{PORTB_11, UART_2, 1},
|
{PORTB_11, UART_2, 1},
|
||||||
{PORTC_11, UART_2, 1 | (5 << 3)}, /* GPIO_USART2_RX_PARTIAL_REMAP */
|
{PORTC_11, UART_2, 1 | (5 << 3)}, /* GPIO_USART2_RX_PARTIAL_REMAP */
|
||||||
{PORTD_9, UART_2, 1 | (6 << 3)}, /* PGPIO_USART2_RX_PARTIAL_REMAP */
|
{PORTD_9, UART_2, 1 | (6 << 3)}, /* GPIO_USART2_RX_FULL_REMAP */
|
||||||
{PORTC_11, UART_3, 1},
|
{PORTC_11_MUL0, UART_3, 1},
|
||||||
{PORTD_2, UART_4, 1},
|
{PORTD_2, UART_4, 1},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
||||||
};
|
};
|
||||||
|
@ -317,7 +317,7 @@ const PinMap PinMap_SPI_MOSI[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
const PinMap PinMap_SPI_MISO[] = {
|
const PinMap PinMap_SPI_MISO[] = {
|
||||||
{PORTA_6, SPI_0, 1},
|
{PORTA_6, SPI_0, 7},
|
||||||
{PORTB_4, SPI_0, 7 | (1 << 3)}, /* GPIO_SPI0_REMAP */
|
{PORTB_4, SPI_0, 7 | (1 << 3)}, /* GPIO_SPI0_REMAP */
|
||||||
{PORTB_14, SPI_1, 7},
|
{PORTB_14, SPI_1, 7},
|
||||||
{NC, NC, 0}
|
{NC, NC, 0}
|
|
@ -102,7 +102,9 @@ typedef enum {
|
||||||
PORTC_9 = 0x29,
|
PORTC_9 = 0x29,
|
||||||
PORTC_9_MUL0 = PORTC_9 | MUL0,
|
PORTC_9_MUL0 = PORTC_9 | MUL0,
|
||||||
PORTC_10 = 0x2A,
|
PORTC_10 = 0x2A,
|
||||||
|
PORTC_10_MUL0 = PORTC_10 | MUL0,
|
||||||
PORTC_11 = 0x2B,
|
PORTC_11 = 0x2B,
|
||||||
|
PORTC_11_MUL0 = PORTC_11 | MUL0,
|
||||||
PORTC_12 = 0x2C,
|
PORTC_12 = 0x2C,
|
||||||
PORTC_13 = 0x2D,
|
PORTC_13 = 0x2D,
|
||||||
PORTC_14 = 0x2E,
|
PORTC_14 = 0x2E,
|
||||||
|
@ -152,21 +154,19 @@ typedef enum {
|
||||||
A1 = PORTC_1,
|
A1 = PORTC_1,
|
||||||
A2 = PORTC_2,
|
A2 = PORTC_2,
|
||||||
A3 = PORTC_3,
|
A3 = PORTC_3,
|
||||||
A4 = PORTC_4,
|
A4 = PORTA_0,
|
||||||
A4_I2C_SDA = PORTC_11,
|
A5 = PORTB_1,
|
||||||
A4_I2C_SCL = PORTC_10,
|
|
||||||
A5 = PORTC_5,
|
|
||||||
D0 = PORTA_3,
|
D0 = PORTA_3,
|
||||||
D1 = PORTA_2,
|
D1 = PORTA_2,
|
||||||
D2 = PORTA_4,
|
D2 = PORTE_4,
|
||||||
D3 = PORTC_6,
|
D3 = PORTD_12,
|
||||||
D4 = PORTB_3,
|
D4 = PORTB_3,
|
||||||
D5 = PORTC_7,
|
D5 = PORTC_7,
|
||||||
D6 = PORTC_8,
|
D6 = PORTB_0,
|
||||||
D7 = PORTB_4,
|
D7 = PORTB_4,
|
||||||
D8 = PORTB_5,
|
D8 = PORTD_11,
|
||||||
D9 = PORTC_9,
|
D9 = PORTE_5,
|
||||||
D10 = PORTA_1,
|
D10 = PORTA_8,
|
||||||
D11 = PORTB_15,
|
D11 = PORTB_15,
|
||||||
D12 = PORTB_14,
|
D12 = PORTB_14,
|
||||||
D13 = PORTB_13,
|
D13 = PORTB_13,
|
||||||
|
@ -177,29 +177,44 @@ typedef enum {
|
||||||
LED2 = PORTE_1,
|
LED2 = PORTE_1,
|
||||||
LED3 = PORTE_6,
|
LED3 = PORTE_6,
|
||||||
|
|
||||||
KEY2 = PORTA_0,
|
KEY1 = PORTE_2,
|
||||||
KEY3 = PORTB_1,
|
KEY2 = PORTE_7,
|
||||||
|
|
||||||
BUTTON1 = KEY2,
|
BUTTON1 = KEY1,
|
||||||
BUTTON2 = KEY3,
|
BUTTON2 = KEY2,
|
||||||
|
|
||||||
SERIAL_TX = PORTA_9,
|
SERIAL_TX = PORTC_10,
|
||||||
SERIAL_RX = PORTA_10,
|
SERIAL_RX = PORTC_11,
|
||||||
USBTX = PORTA_9,
|
USBTX = SERIAL_TX,
|
||||||
USBRX = PORTA_10,
|
USBRX = SERIAL_RX,
|
||||||
|
|
||||||
I2C_SCL = PORTB_6,
|
I2C_SCL = D15,
|
||||||
I2C_SDA = PORTB_7,
|
I2C_SDA = D14,
|
||||||
SPI_MOSI = PORTA_7,
|
SPI_MOSI = D11,
|
||||||
SPI_MISO = PORTA_6,
|
SPI_MISO = D12,
|
||||||
SPI_SCK = PORTA_5,
|
SPI_SCK = D13,
|
||||||
SPI_CS = PORTE_3,
|
SPI_CS = D10,
|
||||||
PWM_OUT = PORTA_7,
|
PWM_OUT = D9,
|
||||||
|
|
||||||
|
USBFS_VBUS = PORTA_9,
|
||||||
|
USBFS_DM = PORTA_11,
|
||||||
|
USBFS_DP = PORTA_12,
|
||||||
|
|
||||||
|
RMII_TX_EN = PORTB_11,
|
||||||
|
RMII_TXD0 = PORTB_12,
|
||||||
|
RMII_TXD1 = PORTB_13,
|
||||||
|
RMII_RXD0 = PORTC_4,
|
||||||
|
RMII_RXD1 = PORTC_5,
|
||||||
|
RMII_CRS_DV = PORTA_7,
|
||||||
|
RMII_MDC = PORTC_1,
|
||||||
|
RMII_MDIO = PORTA_2,
|
||||||
|
RMII_INT = PORTB_0,
|
||||||
|
RMII_REF_CLK = PORTA_1,
|
||||||
|
|
||||||
NC = (int)0xFFFFFFFF
|
NC = (int)0xFFFFFFFF
|
||||||
} PinName;
|
} PinName;
|
||||||
|
|
||||||
/* BIT[7:4] port number (0=PORTA, 1=PORTB, 2=PORTC, 3=PORTD, 4=PORTE, 5=PORTF)
|
/* BIT[7:4] port number (0=PORTA, 1=PORTB, 2=PORTC, 3=PORTD, 4=PORTE)
|
||||||
BIT[3:0] pin number */
|
BIT[3:0] pin number */
|
||||||
#define GD_PORT_GET(X) (((uint32_t)(X) >> 4) & 0xF)
|
#define GD_PORT_GET(X) (((uint32_t)(X) >> 4) & 0xF)
|
||||||
#define GD_PIN_GET(X) (((uint32_t)(X) & 0xF))
|
#define GD_PIN_GET(X) (((uint32_t)(X) & 0xF))
|
||||||
|
@ -208,7 +223,7 @@ typedef enum {
|
||||||
#define GD_PIN_MODE_GET(X) (X & 0x07)
|
#define GD_PIN_MODE_GET(X) (X & 0x07)
|
||||||
#define GD_PIN_SPEED_GET(X) ((X >> 9) & 0x03)
|
#define GD_PIN_SPEED_GET(X) ((X >> 9) & 0x03)
|
||||||
#define GD_PIN_REMAP_GET(X) ((X >> 3) & 0x3F)
|
#define GD_PIN_REMAP_GET(X) ((X >> 3) & 0x3F)
|
||||||
#define GD_PIN_CHANNEL_GET(X) ((X >> 11) & 0x0F)
|
#define GD_PIN_CHANNEL_GET(X) ((X >> 11) & 0x1F)
|
||||||
|
|
||||||
/* Defines GPIO pin direction */
|
/* Defines GPIO pin direction */
|
||||||
typedef enum {
|
typedef enum {
|
|
@ -89,7 +89,7 @@ void analogin_init(analogin_t *obj, PinName pin)
|
||||||
adc_channel_length_config(obj->adc, ADC_REGULAR_CHANNEL, 1);
|
adc_channel_length_config(obj->adc, ADC_REGULAR_CHANNEL, 1);
|
||||||
adc_special_function_config(obj->adc, ADC_SCAN_MODE, DISABLE);
|
adc_special_function_config(obj->adc, ADC_SCAN_MODE, DISABLE);
|
||||||
adc_special_function_config(obj->adc, ADC_CONTINUOUS_MODE, DISABLE);
|
adc_special_function_config(obj->adc, ADC_CONTINUOUS_MODE, DISABLE);
|
||||||
adc_external_trigger_config(ADC0, ADC_REGULAR_CHANNEL, ENABLE);
|
adc_external_trigger_config(obj->adc, ADC_REGULAR_CHANNEL, ENABLE);
|
||||||
adc_external_trigger_source_config(obj->adc, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
|
adc_external_trigger_source_config(obj->adc, ADC_REGULAR_CHANNEL, ADC0_1_2_EXTTRIG_REGULAR_NONE);
|
||||||
|
|
||||||
/* ADC enable */
|
/* ADC enable */
|
||||||
|
|
|
@ -192,4 +192,14 @@ uint32_t flash_get_size(const flash_t *obj)
|
||||||
return FLASH_SIZE;
|
return FLASH_SIZE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/** Get the flash erase value
|
||||||
|
*
|
||||||
|
* @param obj The flash object
|
||||||
|
* @return The flash erase value
|
||||||
|
*/
|
||||||
|
uint8_t flash_get_erase_value(const flash_t *obj)
|
||||||
|
{
|
||||||
|
return 0xFF;
|
||||||
|
}
|
||||||
|
|
||||||
#endif /* DEVICE_FLASH */
|
#endif /* DEVICE_FLASH */
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
int mbed_sdk_inited = 0;
|
int mbed_sdk_inited = 0;
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
\brief configure the system clock to 120M by PLL which selects HXTAL(8M) as its clock source
|
\brief configure the system clock to 120M by PLL which selects HXTAL(25M) as its clock source
|
||||||
\param[in] none
|
\param[in] none
|
||||||
\param[out] none
|
\param[out] none
|
||||||
\retval none
|
\retval none
|
||||||
|
@ -34,7 +34,7 @@ extern void ticker_32bits_timer_init(void);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
\brief configure the system clock to 120M by PLL which selects HXTAL(8M) as its clock source
|
\brief configure the system clock to 120M by PLL which selects HXTAL(25M) as its clock source
|
||||||
\param[in] none
|
\param[in] none
|
||||||
\param[out] none
|
\param[out] none
|
||||||
\retval none
|
\retval none
|
||||||
|
|
|
@ -177,7 +177,7 @@ void serial_baud(serial_t *obj, int baudrate)
|
||||||
struct serial_s *p_obj = GET_SERIAL_S(obj);
|
struct serial_s *p_obj = GET_SERIAL_S(obj);
|
||||||
|
|
||||||
/* store the UEN flag */
|
/* store the UEN flag */
|
||||||
uen_flag = USART_CTL0(USART0) & USART_CTL0_UEN;
|
uen_flag = USART_CTL0(p_obj->uart) & USART_CTL0_UEN;
|
||||||
|
|
||||||
/* disable the USART clock first */
|
/* disable the USART clock first */
|
||||||
usart_disable(p_obj->uart);
|
usart_disable(p_obj->uart);
|
||||||
|
|
|
@ -27,7 +27,7 @@ extern void ticker_timer_data_restore(void);
|
||||||
extern int serial_busy_state_check(void);
|
extern int serial_busy_state_check(void);
|
||||||
|
|
||||||
/*!
|
/*!
|
||||||
\brief configure the system clock to 120M by PLL which selects HXTAL(8M) as its clock source
|
\brief configure the system clock to 120M by PLL which selects HXTAL(25M) as its clock source
|
||||||
\param[in] none
|
\param[in] none
|
||||||
\param[out] none
|
\param[out] none
|
||||||
\retval none
|
\retval none
|
||||||
|
|
|
@ -29,6 +29,22 @@
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(TARGET_GD32E103VB)
|
||||||
|
|
||||||
|
#ifndef INITIAL_SP
|
||||||
|
#define INITIAL_SP (0x20008000UL)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(TARGET_GD32F450ZI)
|
||||||
|
|
||||||
|
#ifndef INITIAL_SP
|
||||||
|
#define INITIAL_SP (0x20070000UL)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS))
|
#if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS))
|
||||||
extern uint32_t __StackLimit[];
|
extern uint32_t __StackLimit[];
|
||||||
extern uint32_t __StackTop[];
|
extern uint32_t __StackTop[];
|
||||||
|
|
|
@ -7438,7 +7438,8 @@
|
||||||
"USTICKER",
|
"USTICKER",
|
||||||
"ANALOGIN",
|
"ANALOGIN",
|
||||||
"INTERRUPTIN",
|
"INTERRUPTIN",
|
||||||
"PORTIN", "PORTINOUT",
|
"PORTIN",
|
||||||
|
"PORTINOUT",
|
||||||
"PORTOUT",
|
"PORTOUT",
|
||||||
"PWMOUT",
|
"PWMOUT",
|
||||||
"SERIAL"
|
"SERIAL"
|
||||||
|
@ -7470,5 +7471,57 @@
|
||||||
"overrides": {
|
"overrides": {
|
||||||
"network-default-interface-type": "ETHERNET"
|
"network-default-interface-type": "ETHERNET"
|
||||||
}
|
}
|
||||||
|
},
|
||||||
|
"GD32_F450ZI": {
|
||||||
|
"inherits": ["GD32_Target"],
|
||||||
|
"supported_form_factors": ["ARDUINO"],
|
||||||
|
"core": "Cortex-M4",
|
||||||
|
"extra_labels_add": ["GD32F4XX", "GD32F450ZI", "GD_EMAC"],
|
||||||
|
"device_has_add": [
|
||||||
|
"RTC",
|
||||||
|
"I2C",
|
||||||
|
"CAN",
|
||||||
|
"I2CSLAVE",
|
||||||
|
"ANALOGOUT",
|
||||||
|
"SPI",
|
||||||
|
"SPISLAVE",
|
||||||
|
"SERIAL_ASYNCH",
|
||||||
|
"SERIAL_FC",
|
||||||
|
"EMAC",
|
||||||
|
"FLASH",
|
||||||
|
"SLEEP",
|
||||||
|
"MPU",
|
||||||
|
"TRNG",
|
||||||
|
"LPTICKER"
|
||||||
|
],
|
||||||
|
"device_name": "GD32F450ZI",
|
||||||
|
"detect_code": ["1702"],
|
||||||
|
"macros_add": ["GD32F450"],
|
||||||
|
"release_versions": ["5"],
|
||||||
|
"overrides": {
|
||||||
|
"network-default-interface-type": "ETHERNET"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"GD32_E103VB": {
|
||||||
|
"inherits": ["GD32_Target"],
|
||||||
|
"supported_form_factors": ["ARDUINO"],
|
||||||
|
"core": "Cortex-M23",
|
||||||
|
"extra_labels_add": ["GD32E10X", "GD32E103VB"],
|
||||||
|
"device_has_add": [
|
||||||
|
"RTC",
|
||||||
|
"I2C",
|
||||||
|
"CAN",
|
||||||
|
"I2CSLAVE",
|
||||||
|
"ANALOGOUT",
|
||||||
|
"SPI",
|
||||||
|
"SPISLAVE",
|
||||||
|
"SERIAL_ASYNCH",
|
||||||
|
"SERIAL_FC",
|
||||||
|
"FLASH",
|
||||||
|
"SLEEP"
|
||||||
|
],
|
||||||
|
"detect_code": ["1703"],
|
||||||
|
"macros_add": ["GD32E10X"],
|
||||||
|
"release_versions": ["5"]
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue