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FGGA UART test: add test cases with 7 and 9 bits data length

pull/12615/head
jeromecoutant 2020-03-11 09:38:35 +01:00
parent 475621ce36
commit 864c96efd4
1 changed files with 30 additions and 3 deletions
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33
TESTS/mbed_hal_fpga_ci_test_shield/uart/main.cpp
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@ -92,10 +92,20 @@ static void uart_test_common(int baudrate, int data_bits, SerialParity parity, i
// STM-specific constraints
// Only 7, 8 & 9 data bits.
MBED_ASSERT(data_bits >= 7 && data_bits <= 9);
// Only Odd or Even parity for 7 data bits.
if (data_bits == 7) {
MBED_ASSERT(parity != ParityNone);
#if defined(UART_9BITS_PARITY_NOT_SUPPORTED)
if ((data_bits == 9) && (parity != ParityNone)) {
utest_printf(" UART_9BITS_PARITY_NOT_SUPPORTED set ... ");
return;
}
#endif
#if defined(UART_7BITS_PARITY_NONE_NOT_SUPPORTED)
if ((data_bits == 7) && (parity == ParityNone)) {
utest_printf(" UART_7BITS_PARITY_NONE_NOT_SUPPORTED set ... ");
return;
}
#endif
// Limit the actual TX & RX chars to 8 bits for this test.
int test_buff_bits = data_bits < 8 ? data_bits : 8;
@ -333,6 +343,10 @@ Case cases[] = {
Case("basic, 9600, 8N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 1, false> >),
Case("basic (direct init), 9600, 8N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 8, ParityNone, 1, true> >),
// same test with 7 and 9 bits data length
Case("basic, 9600, 7N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 7, ParityNone, 1, false> >),
Case("basic, 9600, 9N1, FC off", all_peripherals<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<9600, 9, ParityNone, 1, false> >),
// One set of pins from one peripheral.
// baudrate
Case("19200, 8N1, FC off", one_peripheral<UARTNoFCPort, DefaultFormFactor, fpga_uart_test_common_no_fc<19200, 8, ParityNone, 1, false> >),
@ -351,6 +365,10 @@ Case cases[] = {
Case("basic, 9600, 8N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 1, false> >),
Case("basic (direct init), 9600, 8N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 1, true> >),
// same test with 7 and 9 bits data length
Case("basic, 9600, 7N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 7, ParityNone, 1, false> >),
Case("basic, 9600, 9N1, FC on", all_peripherals<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 9, ParityNone, 1, false> >),
// One set of pins from one peripheral.
// baudrate
Case("19200, 8N1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<19200, 8, ParityNone, 1, false> >),
@ -360,8 +378,17 @@ Case cases[] = {
// parity
#if !defined(UART_ODD_PARITY_NOT_SUPPORTED)
Case("9600, 8O1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityOdd, 1, false> >),
// same test with 7 and 9 bits data length
Case("9600, 7O1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 7, ParityOdd, 1, false> >),
Case("9600, 9O1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 9, ParityOdd, 1, false> >),
#endif
Case("9600, 8E1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityEven, 1, false> >),
// same test with 7 and 9 bits data length
Case("9600, 7E1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 7, ParityEven, 1, false> >),
Case("9600, 9E1, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 9, ParityEven, 1, false> >),
// stop bits
#if !defined(UART_TWO_STOP_BITS_NOT_SUPPORTED)
Case("9600, 8N2, FC on", one_peripheral<UARTPort, DefaultFormFactor, fpga_uart_test_common<9600, 8, ParityNone, 2, false> >),