Resolved review comments

pull/14688/head
Mohammed Mubeen 2021-07-03 13:22:25 +05:30
parent d4eba5c0a7
commit 8622f66b46
11 changed files with 20 additions and 84 deletions

View File

@ -31,35 +31,14 @@
namespace mbed {
class RawCAN: public CAN {
public:
RawCAN(PinName rd, PinName td);
using CAN::CAN;
/** Initialize CAN interface and set the frequency
*
* @param rd the read pin
* @param td the transmit pin
* @param hz the bus frequency in hertz
*/
RawCAN(PinName rd, PinName td, int hz);
/** Initialize CAN interface
*
* @param pinmap reference to structure which holds static pinmap
* @param td the transmit pin
* @param hz the bus frequency in hertz
/** Overriding lock apis to create unlocked CAN
*/
virtual ~RawCAN() {};
void lock() override {};
void unlock() override {};
/** Read a CANMessage from the bus.
*
* @param msg A CANMessage to read to.
* @param handle message filter handle (0 for any message)
*
* @returns
* 0 if no message arrived,
* 1 if message arrived
*/
int read(CANMessage &msg, int handle = 0);
};
}

View File

@ -1,43 +0,0 @@
/*
* Copyright (C) 2021, STMicroelectronics, All Rights Reserved
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License"); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "drivers/RawCan.h"
#if DEVICE_CAN
#include "platform/mbed_power_mgmt.h"
namespace mbed {
RawCAN::RawCAN(PinName rd, PinName td): CAN(rd, td) {}
RawCAN::RawCAN(PinName rd, PinName td, int hz): CAN(rd, td, hz) {}
/* There are situations where the RX interrupt of CAN are cleared only by
* CAN read operations and locks are not allowed in ISR context in mbed
* hence this provides an unlocked read to resolve such problem without
* any effect on the performance. This will work only in case of a single
* thread accessing a CAN instance, multiple threads will lead to race conditions
*/
int RawCAN::read(CANMessage &msg, int handle)
{
int ret = can_read(&_can, &msg, handle);
return ret;
}
}
#endif //DEVICE_CAN

View File

@ -155,7 +155,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -145,7 +145,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -154,7 +154,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -142,7 +142,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -157,7 +157,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -166,7 +166,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -156,7 +156,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -156,7 +156,7 @@ struct can_s {
CAN_HandleTypeDef CanHandle;
int index;
int hz;
int rxIrqStatus;
int rxIrqEnabled;
};
#endif

View File

@ -778,7 +778,7 @@ void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
{
irq_handler = handler;
can_irq_ids[obj->index] = id;
obj->rxIrqStatus = false;
obj->rxIrqEnabled = false;
}
void can_irq_free(can_t *obj)
@ -788,7 +788,7 @@ void can_irq_free(can_t *obj)
can->IER &= ~(CAN_IT_FMP0 | CAN_IT_FMP1 | CAN_IT_TME | \
CAN_IT_ERR | CAN_IT_EPV | CAN_IT_BOF);
can_irq_ids[obj->index] = 0;
obj->rxIrqStatus = DISABLED;
obj->rxIrqEnabled = false;
}
void can_free(can_t *obj)
@ -1014,7 +1014,7 @@ int can_read(can_t *obj, CAN_Message *msg, int handle)
/* Release the FIFO */
can->RF0R |= CAN_RF0R_RFOM0;
if(obj->rxIrqStatus == ENABLED) {
if(obj->rxIrqEnabled == true) {
__HAL_CAN_ENABLE_IT(&obj->CanHandle, CAN_IT_FMP0);
}
@ -1031,7 +1031,7 @@ void can_reset(can_t *obj)
/* restore registers state as saved in obj context */
can_registers_init(obj);
obj->rxIrqStatus = DISABLED;
obj->rxIrqEnabled = false;
}
unsigned char can_rderror(can_t *obj)
@ -1184,7 +1184,7 @@ static void can_irq(CANName name, int id)
tmp1 = __HAL_CAN_MSG_PENDING(&CanHandle, CAN_FIFO0);
tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_FMP0);
// In legacy can, reading is the only way to clear rx interrupt. But can_read has mutex locks
// In legacy can (bxCAN and earlier), reading is the only way to clear rx interrupt. But can_read has mutex locks
// since mutexes cannot be used in ISR context, rx interrupt is masked here to temporary disable it
// rx interrupts will be unamsked in read operation. reads must be deffered to thread context.
__HAL_CAN_DISABLE_IT(&CanHandle, CAN_IT_FMP0);
@ -1288,7 +1288,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
ier = CAN_IT_FMP0;
irq_n = CAN1_IRQ_RX_IRQN;
vector = (uint32_t)&CAN1_IRQ_RX_VECT;
obj->rxIrqStatus = ENABLED;
obj->rxIrqEnabled = true;
break;
case IRQ_TX:
ier = CAN_IT_TME;
@ -1321,7 +1321,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
ier = CAN_IT_FMP0;
irq_n = CAN2_IRQ_RX_IRQN;
vector = (uint32_t)&CAN2_IRQ_RX_VECT;
obj->rxIrqStatus = ENABLED;
obj->rxIrqEnabled = true;
break;
case IRQ_TX:
ier = CAN_IT_TME;
@ -1355,7 +1355,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
ier = CAN_IT_FMP0;
irq_n = CAN3_IRQ_RX_IRQN;
vector = (uint32_t)&CAN3_IRQ_RX_VECT;
obj->rxIrqStatus = ENABLED;
obj->rxIrqEnabled = true;
break;
case IRQ_TX:
ier = CAN_IT_TME;