diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c
index 419b473eea..ce81d4cfbf 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11U6X/analogin_api.c
@@ -66,13 +66,15 @@ void analogin_init(analogin_t *obj, PinName pin) {
     // Enable clock for ADC
     LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 13);
 
-    // Start ADC self-calibration
-    LPC_ADC->CTRL = (1UL << 30);
-    do {
-        tmp =  LPC_ADC->CTRL;
-    } while ((tmp & (1UL << 30)) != 0);
+    // Determine the clock divider for a 500kHz ADC clock during calibration
+    uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
+    
+    // Perform a self-calibration
+    LPC_ADC->CTRL = (1UL << 30) | (clkdiv & 0xFF);
+    while ((LPC_ADC->CTRL & (1UL << 30)) != 0);
 
-    LPC_ADC->CTRL = 1; // Sampling clock: SystemClock divided by 1
+    // Sampling clock: SystemClock divided by 1
+    LPC_ADC->CTRL = 0;
 }
 
 static inline uint32_t adc_read(analogin_t *obj) {
diff --git a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c
index 27964f4bfb..da3bcef999 100644
--- a/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c
+++ b/libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC15XX/analogin_api.c
@@ -77,19 +77,21 @@ void analogin_init(analogin_t *obj, PinName pin) {
         LPC_SYSCON->SYSAHBCLKCTRL0 |= (1 << 28);
     }
 
-    // select IRC as async. clock, divided by 1
+    // select IRC as asynchronous clock, divided by 1
     LPC_SYSCON->ADCASYNCCLKSEL  = 0;
     LPC_SYSCON->ADCASYNCCLKDIV  = 1;
 
     __IO LPC_ADC0_Type *adc_reg = (obj->adc < ADC1_0) ? (__IO LPC_ADC0_Type*)(LPC_ADC0) : (__IO LPC_ADC0_Type*)(LPC_ADC1);
 
-    // start calibration
-    adc_reg->CTRL |= (1UL << 30);
-    __NOP(); __NOP(); __NOP(); __NOP(); __NOP(); __NOP();
+    // determine the system clock divider for a 500kHz ADC clock during calibration
+    uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
+    
+    // perform a self-calibration
+    adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
+    while ((adc_reg->CTRL & (1UL << 30)) != 0);
 
-    // asynchronous mode
+    // switch to asynchronous mode
     adc_reg->CTRL = (1UL << 8);
-
 }
 
 static inline uint32_t adc_read(analogin_t *obj) {