Clean up unnecessary doxygen comments

Fix incorrect file names in a few headers
pull/11367/head
Kyle Kearney 2019-08-26 14:05:58 -07:00
parent d50145fd1d
commit 85dd8d704b
10 changed files with 13 additions and 147 deletions

View File

@ -23,35 +23,6 @@
* limitations under the License. * limitations under the License.
*******************************************************************************/ *******************************************************************************/
/**
* \addtogroup group_bsp_cy8ckit_062s2_43012 CY8CKIT-062S2-43012
* \ingroup group_bsp
* \{
* The CY8CKIT-062S2-43012 PSoC 6 Wi-Fi BT Pioneer Kit is a low-cost hardware platform that enables design and debug of PSoC 6 MCUs.
* It comes with a Murata LBEE5KL1DX module, based on the CYW43012 combo device, industry-leading CapSense for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone, and a thermistor. This kit is designed with a snap-away form-factor, allowing the user to separate the different components and features that come with this kit and use independently.
* In addition, support for Digilent's Pmod interface is also provided with this kit.
*
* <div class="category">Kit Features:</div>
* <ul>
* <li>Support of up to 2MB Flash and 1MB SRAM</li>
* <li>Dedicated SDHC to interface with WICED wireless devices.</li>
* <li>Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-MHz Arm Cortex-M0+ as the secondary processor for low-power operations.</li>
* <li>Supports Full-Speed USB, capacitive-sensing with CapSense, a PDM-PCM digital microphone interface, a Quad-SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li>
* </ul>
*
* <div class="category">Kit Contents:</div>
* <ul>
* <li>PSoC 6 Wi-Fi BT Pioneer Board</li>
* <li>USB Type-A to Micro-B cable</li>
* <li>Quick Start Guide</li>
* </ul>
*
* \defgroup group_bsp_cy8ckit_062s2_43012_macros Macros
* \defgroup group_bsp_cy8ckit_062s2_43012_functions Functions
* \defgroup group_bsp_cy8ckit_062s2_43012_enums Enumerated Types
*/
#pragma once #pragma once
#include "cybsp_types.h" #include "cybsp_types.h"
@ -73,5 +44,3 @@ extern "C" {
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif
/** \} group_bsp_cy8ckit_062s2_43012 */

View File

@ -2,8 +2,7 @@
* \file CY8CKIT-062-BLE/cybsp.c * \file CY8CKIT-062-BLE/cybsp.c
* *
* Description: * Description:
* Provides APIs for interacting with the hardware contained on the Cypress * Provides basic hardware initialization for the CY8CKIT-062-BLE pioneer kit.
* CY8CKIT-062-BLE pioneer kit.
* *
******************************************************************************** ********************************************************************************
* \copyright * \copyright

View File

@ -23,33 +23,6 @@
* limitations under the License. * limitations under the License.
*******************************************************************************/ *******************************************************************************/
/**
* \addtogroup group_bsp_cy8ckit_062_ble CY8CKIT-062-BLE
* \ingroup group_bsp
* \{
* The PSoC 6 BLE Pioneer Kit is a low-cost hardware platform
* that enables design and debug of the PSoC 63 MCU (CY8C6347BZI-BLD53).
*
* <div class="category">Kit Features:</div>
* <ul>
* <li>BLE v5.0</li>
* <li>Serial memory interface</li>
* <li>PDM-PCM digital microphone interface</li>
* <li>Industry-leading CapSense</li>
* </ul>
*
* <div class="category">Kit Contents:</div>
* <ul>
* <li>CY8CKIT-062-BLE evaluation board</li>
* <li>E-Ink display shield with an ultra-low-power 2.7" E-ink display, thermistor, 6-axis motion sensor, and digital microphone</li>
* <li>USB cable</li>
* </ul>
*
* \defgroup group_bsp_cy8ckit_062_ble_macros Macros
* \defgroup group_bsp_cy8ckit_062_ble_functions Functions
* \defgroup group_bsp_cy8ckit_062_ble_enums Enumerated Types
*/
#pragma once #pragma once
#include "cybsp_types.h" #include "cybsp_types.h"
@ -67,5 +40,3 @@ extern "C" {
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif
/** \} group_bsp_cy8ckit_062_ble */

View File

@ -40,8 +40,6 @@
extern "C" { extern "C" {
#endif #endif
/** \cond INTERNAL */
// HAL HW configuration data // HAL HW configuration data
extern cyhal_qspi_t cybsp_qspi; extern cyhal_qspi_t cybsp_qspi;
extern cyhal_uart_t cybsp_bt_uart; extern cyhal_uart_t cybsp_bt_uart;
@ -49,10 +47,6 @@ extern cyhal_uart_t cybsp_debug_uart;
extern cyhal_i2c_t cybsp_i2c; extern cyhal_i2c_t cybsp_i2c;
extern cyhal_rtc_t cybsp_rtc; extern cyhal_rtc_t cybsp_rtc;
/** \endcond */
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif
/** \} group_bsp_cy8ckit_062_wifi_bt */

View File

@ -23,34 +23,6 @@
* limitations under the License. * limitations under the License.
*******************************************************************************/ *******************************************************************************/
/**
* \addtogroup group_bsp_cy8cproto_062_4343w CY8CPROTO-062-4343W
* \ingroup group_bsp
* \{
* The CY8CPROTO-062-4343W PSoC 6 Wi-Fi BT Prototyping Kit is a low-cost hardware platform that enables design and debug of PSoC 6 MCUs.
* It comes with a Murata LBEE5KL1DX module, based on the CYW4343W combo device, industry-leading CapSense for touch buttons and slider, on-board debugger/programmer with KitProg3, microSD card interface, 512-Mb Quad-SPI NOR flash, PDM-PCM microphone, and a thermistor. This kit is designed with a snap-away form-factor, allowing the user to separate the different components and features that come with this kit and use independently.
* In addition, support for Digilent's Pmod interface is also provided with this kit.
*
* <div class="category">Kit Features:</div>
* <ul>
* <li>Support of up to 2MB Flash and 1MB SRAM</li>
* <li>Dedicated SDHC to interface with WICED wireless devices.</li>
* <li>Delivers dual-cores, with a 150-MHz Arm Cortex-M4 as the primary application processor and a 100-MHz Arm Cortex-M0+ as the secondary processor for low-power operations.</li>
* <li>Supports Full-Speed USB, capacitive-sensing with CapSense, a PDM-PCM digital microphone interface, a Quad-SPI interface, 13 serial communication blocks, 7 programmable analog blocks, and 56 programmable digital blocks.</li>
* </ul>
*
* <div class="category">Kit Contents:</div>
* <ul>
* <li>PSoC 6 Wi-Fi BT Prototyping Board</li>
* <li>USB Type-A to Micro-B cable</li>
* <li>Quick Start Guide</li>
* </ul>
*
* \defgroup group_bsp_cy8cproto_062_4343w_macros Macros
* \defgroup group_bsp_cy8cproto_062_4343w_functions Functions
* \defgroup group_bsp_cy8cproto_062_4343w_enums Enumerated Types
*/
#pragma once #pragma once
#include "cybsp_types.h" #include "cybsp_types.h"
@ -67,12 +39,6 @@
extern "C" { extern "C" {
#endif #endif
/** \cond INTERNAL */
/** \endcond */
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif
/** \} group_bsp_cy8cproto_062_4343w */

View File

@ -23,33 +23,6 @@
* limitations under the License. * limitations under the License.
*******************************************************************************/ *******************************************************************************/
/**
* \addtogroup group_bsp_cyw943012p6evb_01 CYW943012P6EVB-01
* \ingroup group_bsp
* \{
* The PSoC 6 CYW943012P6EVB-01 board is a low-cost hardware platform that
* enables design and debug of the PSoC 62 MCU (CY8C6247BZI-D54) and the
* Murata LBEE59B1LV Module (CYW43012 WiFi + Bluetooth Combo Chip).
*
* <div class="category">Kit Features:</div>
* <ul>
* <li>BLE v5.0</li>
* <li>Serial memory interface</li>
* <li>PDM-PCM digital microphone interface</li>
* <li>Industry-leading CapSense</li>
* </ul>
*
* <div class="category">Kit Contents:</div>
* <ul>
* <li>CYW943012P6EVB-01 evaluation board</li>
* <li>USB cable</li>
* </ul>
*
* \defgroup group_bsp_cyw943012p6evb_01_macros Macros
* \defgroup group_bsp_cyw943012p6evb_01_functions Functions
* \defgroup group_bsp_cyw943012p6evb_01_enums Enumerated Types
*/
#pragma once #pragma once
#include "cybsp_types.h" #include "cybsp_types.h"
@ -66,11 +39,6 @@
extern "C" { extern "C" {
#endif #endif
/** \cond INTERNAL */
/** \endcond */
#if defined(__cplusplus) #if defined(__cplusplus)
} }
#endif #endif
/** \} group_bsp_cyw943012p6evb_01 */

View File

@ -1,5 +1,5 @@
/***************************************************************************//** /***************************************************************************//**
* \file cy_network_buffer.h * \file cy_network_buffer.c
* *
* \brief * \brief
* Basic set of APIs for dealing with network packet buffers. This is used by WHD * Basic set of APIs for dealing with network packet buffers. This is used by WHD

View File

@ -24,12 +24,11 @@
*******************************************************************************/ *******************************************************************************/
/** /**
* \addtogroup group_abstraction_buffer Buffer management abstraction * \addtogroup group_bsp_network_buffer Buffer management
* \ingroup group_abstraction
* \{ * \{
* Basic set of APIs for dealing with network packet buffers * Basic set of APIs for dealing with network packet buffers
* *
* \defgroup group_abstraction_buffer_functions Functions * \defgroup group_bsp_network_buffer_functions Functions
*/ */
#pragma once #pragma once
@ -48,7 +47,7 @@ extern "C" {
/** /**
* \addtogroup group_abstraction_buffer_functions * \addtogroup group_bsp_network_buffer_functions
* \{ * \{
*/ */
@ -171,7 +170,7 @@ whd_result_t cy_buffer_add_remove_at_front(whd_buffer_t *buffer, int32_t add_rem
*/ */
void cy_network_process_ethernet_data(whd_interface_t interface, whd_buffer_t buffer); void cy_network_process_ethernet_data(whd_interface_t interface, whd_buffer_t buffer);
/** \} group_abstraction_buffer_functions */ /** \} group_bsp_network_buffer_functions */
#ifdef __cplusplus #ifdef __cplusplus
} }
@ -179,4 +178,4 @@ void cy_network_process_ethernet_data(whd_interface_t interface, whd_buffer_t bu
#endif /* defined(TARGET_WHD) */ #endif /* defined(TARGET_WHD) */
/** \} group_abstraction_buffer */ /** \} group_bsp_network_buffer */

View File

@ -47,17 +47,17 @@ extern "C" {
#endif #endif
/** /**
* \addtogroup group_abstraction_board_macros * \addtogroup group_bsp_core_macros
* \{ * \{
*/ */
/** Failed to configure sysclk power management callback */ /** Failed to configure sysclk power management callback */
#define CYBSP_RSLT_ERR_SYSCLK_PM_CALLBACK (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_BSP, 0)) #define CYBSP_RSLT_ERR_SYSCLK_PM_CALLBACK (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_BSP, 0))
/** \} group_abstraction_board_macros */ /** \} group_bsp_core_macros */
/** /**
* \addtogroup group_abstraction_board_functions * \addtogroup group_bsp_core_functions
* \{ * \{
*/ */
@ -140,10 +140,10 @@ void cybsp_btn_set_interrupt(cybsp_btn_t which, cyhal_gpio_event_t type, cyhal_g
*/ */
cy_rslt_t cybsp_register_sysclk_pm_callback(void); cy_rslt_t cybsp_register_sysclk_pm_callback(void);
/** \} group_abstraction_board_functions */ /** \} group_bsp_core_functions */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif /* __cplusplus */ #endif /* __cplusplus */
/** \} group_abstraction_board */ /** \} group_bsp_core */

View File

@ -1,5 +1,5 @@
/***************************************************************************//** /***************************************************************************//**
* \file cybsp_utils.c * \file cybsp_wifi.c
* *
* \brief * \brief
* Provides utility functions that are used by board support packages. * Provides utility functions that are used by board support packages.