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mcr20a use core_util_critical_section functions

pull/8243/head
Jarno Lamsa 2018-09-25 16:29:24 +03:00
parent 65a0a1aecd
commit 83a85d7830
2 changed files with 6 additions and 12 deletions
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10
components/802.15.4_RF/mcr20a-rf-driver/source/MCR20Drv.c
View File

@ -44,7 +44,7 @@
#if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI #if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI
#include "platform/arm_hal_interrupt.h" #include "platform/mbed_critical.h"
/***************************************************************************** /*****************************************************************************
* PRIVATE VARIABLES * * PRIVATE VARIABLES *
@ -524,7 +524,7 @@ void MCR20Drv_IRQ_Disable
void void
) )
{ {
platform_enter_critical(); core_util_critical_section_enter();
if( mPhyIrqDisableCnt == 0 ) if( mPhyIrqDisableCnt == 0 )
{ {
@ -533,7 +533,7 @@ void
mPhyIrqDisableCnt++; mPhyIrqDisableCnt++;
platform_exit_critical(); core_util_critical_section_exit();
} }
/*--------------------------------------------------------------------------- /*---------------------------------------------------------------------------
@ -547,7 +547,7 @@ void MCR20Drv_IRQ_Enable
void void
) )
{ {
platform_enter_critical(); core_util_critical_section_enter();
if( mPhyIrqDisableCnt ) if( mPhyIrqDisableCnt )
{ {
@ -559,7 +559,7 @@ void
} }
} }
platform_exit_critical(); core_util_critical_section_exit();
} }
/*--------------------------------------------------------------------------- /*---------------------------------------------------------------------------

8
components/802.15.4_RF/mcr20a-rf-driver/source/NanostackRfPhyMcr20a.cpp
View File

@ -1093,7 +1093,6 @@ static void rf_init_phy_mode(void)
*/ */
static void PHY_InterruptHandler(void) static void PHY_InterruptHandler(void)
{ {
/* Disable and clear transceiver(IRQ_B) interrupt */
MCR20Drv_IRQ_Disable(); MCR20Drv_IRQ_Disable();
irq_thread->signal_set(1); irq_thread->signal_set(1);
} }
@ -1106,6 +1105,7 @@ static void PHY_InterruptThread(void)
continue; continue;
} }
handle_interrupt(); handle_interrupt();
MCR20Drv_IRQ_Enable();
} }
} }
@ -1113,8 +1113,6 @@ static void handle_interrupt(void)
{ {
uint8_t xcvseqCopy; uint8_t xcvseqCopy;
//MCR20Drv_IRQ_Clear();
/* Read transceiver interrupt status and control registers */ /* Read transceiver interrupt status and control registers */
mStatusAndControlRegs[IRQSTS1] = mStatusAndControlRegs[IRQSTS1] =
MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[IRQSTS2], 7); MCR20Drv_DirectAccessSPIMultiByteRead(IRQSTS2, &mStatusAndControlRegs[IRQSTS2], 7);
@ -1158,7 +1156,6 @@ static void handle_interrupt(void)
MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5); MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
rf_ack_wait_timer_interrupt(); rf_ack_wait_timer_interrupt();
MCR20Drv_IRQ_Enable();
return; return;
} }
} }
@ -1182,7 +1179,6 @@ static void handle_interrupt(void)
{ {
rf_receive(); rf_receive();
} }
MCR20Drv_IRQ_Enable();
return; return;
} }
@ -1205,12 +1201,10 @@ static void handle_interrupt(void)
break; break;
} }
MCR20Drv_IRQ_Enable();
return; return;
} }
/* Other IRQ. Clear XCVR interrupt flags */ /* Other IRQ. Clear XCVR interrupt flags */
MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3); MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 3);
MCR20Drv_IRQ_Enable();
} }
/* /*