mirror of https://github.com/ARMmbed/mbed-os.git
Add Serial flow control and fix a bug that parity setting is wrong.
Modifies are as below. - Add flow control - Change the range of baud rate that can be set in the baud function. 8138 bps more -> 128 bps more - Fixed a bug that designation of parity had been reversed in format().pull/875/head
Masao Hamanaka
parent
25131013bd
commit
83712b1f83
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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* Copyright (c) 2006-2015 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -30,6 +30,8 @@
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/******************************************************************************
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* INITIALIZATION
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******************************************************************************/
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#define PCLK (66666666) // Define the peripheral clock P1 frequency.
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#define UART_NUM 8
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#define IRQ_NUM 2
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@ -52,35 +54,54 @@ static void uart7_rx_irq(void);
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static const PinMap PinMap_UART_TX[] = {
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{P6_3 , UART2, 7},
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{P2_14 , UART0, 6},
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{P5_0 , UART4, 5},
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{P5_3 , UART3, 5},
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{P5_6 , UART6, 5},
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{P2_5 , UART1, 6},
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{P6_3 , UART2, 7},
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{P5_3 , UART3, 5},
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{P8_8 , UART3, 7},
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{P5_0 , UART4, 5},
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{P8_14 , UART4, 7},
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{P8_13 , UART5, 5},
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{P7_4 , UART7, 4},
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{P11_10, UART5, 3},
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{P6_6 , UART5, 5},
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{P5_6 , UART6, 5},
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{P11_1 , UART6, 4},
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{P7_4 , UART7, 4},
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{NC , NC , 0}
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};
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static const PinMap PinMap_UART_RX[] = {
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{P6_2 , UART2, 7},
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{P2_15 , UART0, 6},
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{P5_1 , UART4, 5},
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{P5_4 , UART3, 5},
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{P5_7 , UART6, 5},
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{P2_6 , UART1, 6},
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{P6_2 , UART2, 7},
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{P5_4 , UART3, 5},
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{P8_9 , UART3, 7},
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{P5_1 , UART4, 5},
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{P8_15 , UART4, 7},
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{P8_11 , UART5, 5},
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{P7_5 , UART7, 4},
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{P11_11, UART5, 3},
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{P6_7 , UART5, 5},
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{P5_7 , UART6, 5},
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{P11_2 , UART6, 4},
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{P7_5 , UART7, 4},
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{NC , NC , 0}
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};
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static const PinMap PinMap_UART_CTS[] = {
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{P2_3 , UART1, 6},
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{P11_7 , UART5, 3},
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{P7_6 , UART7, 4},
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{NC , NC , 0}
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};
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static const PinMap PinMap_UART_RTS[] = {
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{P2_7 , UART1, 6},
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{P11_8 , UART5, 3},
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{P7_7 , UART7, 4},
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{NC , NC , 0}
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};
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static const struct st_scif *SCIF[] = SCIF_ADDRESS_LIST;
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static uart_irq_handler irq_handler;
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@ -141,7 +162,7 @@ static __IO uint16_t *SCFSR_MATCH[] = {
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void serial_init(serial_t *obj, PinName tx, PinName rx) {
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volatile uint8_t dummy ;
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volatile uint8_t dummy ;
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int is_stdio_uart = 0;
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// determine the UART to use
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uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
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@ -153,14 +174,30 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
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obj->uart = (struct st_scif *)SCIF[uart];
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// enable power
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switch (uart) {
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case UART0: CPG.STBCR4 &= ~(1 << 7); break;
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case UART1: CPG.STBCR4 &= ~(1 << 6); break;
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case UART2: CPG.STBCR4 &= ~(1 << 5); break;
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case UART3: CPG.STBCR4 &= ~(1 << 4); break;
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case UART4: CPG.STBCR4 &= ~(1 << 3); break;
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case UART5: CPG.STBCR4 &= ~(1 << 2); break;
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case UART6: CPG.STBCR4 &= ~(1 << 1); break;
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case UART7: CPG.STBCR4 &= ~(1 << 0); break;
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case UART0:
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CPG.STBCR4 &= ~(1 << 7);
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break;
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case UART1:
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CPG.STBCR4 &= ~(1 << 6);
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break;
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case UART2:
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CPG.STBCR4 &= ~(1 << 5);
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break;
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case UART3:
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CPG.STBCR4 &= ~(1 << 4);
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break;
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case UART4:
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CPG.STBCR4 &= ~(1 << 3);
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break;
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case UART5:
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CPG.STBCR4 &= ~(1 << 2);
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break;
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case UART6:
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CPG.STBCR4 &= ~(1 << 1);
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break;
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case UART7:
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CPG.STBCR4 &= ~(1 << 0);
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break;
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}
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dummy = CPG.STBCR4;
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@ -181,7 +218,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
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/* ORER bit clear */
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obj->uart->SCLSR = 0;
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/* ---- Serial extension mode register (SCEMR) setting ----
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/* ---- Serial extension mode register (SCEMR) setting ----
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b7 BGDM - Baud rate generator double-speed mode : Normal mode
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b0 ABCS - Base clock select in asynchronous mode : Base clock is 16 times the bit rate */
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obj->uart->SCEMR = 0x0000u;
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@ -193,26 +230,49 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
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/* ---- FIFO control register (SCFCR) setting ---- */
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obj->uart->SCFCR = 0x0030u;
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/* ---- Serial port register (SCSPTR) setting ----
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/* ---- Serial port register (SCSPTR) setting ----
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b1 SPB2IO - Serial port break output : disabled
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b0 SPB2DT - Serial port break data : High-level */
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//obj->uart->SCSPTR |= 0x0000u;
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obj->uart->SCSPTR = 0x0003u; // SPB2IO = 1, SPB2DT = 1
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obj->uart->SCSCR = 0x00F0;
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/* ---- Line status register (SCLSR) setting ----
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b0 ORER - Overrun error detect : clear */
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if (obj->uart->SCLSR & 0x0001) {
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obj->uart->SCLSR = 0u; // ORER clear
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}
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// pinout the chosen uart
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pinmap_pinout(tx, PinMap_UART_TX);
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pinmap_pinout(rx, PinMap_UART_RX);
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switch (uart) {
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case UART0: obj->index = 0; break;
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case UART1: obj->index = 1; break;
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case UART2: obj->index = 2; break;
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case UART3: obj->index = 3; break;
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case UART4: obj->index = 4; break;
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case UART5: obj->index = 5; break;
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case UART6: obj->index = 6; break;
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case UART7: obj->index = 7; break;
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case UART0:
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obj->index = 0;
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break;
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case UART1:
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obj->index = 1;
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break;
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case UART2:
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obj->index = 2;
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break;
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case UART3:
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obj->index = 3;
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break;
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case UART4:
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obj->index = 4;
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break;
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case UART5:
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obj->index = 5;
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break;
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case UART6:
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obj->index = 6;
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break;
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case UART7:
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obj->index = 7;
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break;
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}
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uart_data[obj->index].sw_rts.pin = NC;
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uart_data[obj->index].sw_cts.pin = NC;
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@ -232,13 +292,52 @@ void serial_free(serial_t *obj) {
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// serial_baud
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// set the baud rate, taking in to account the current SystemFrequency
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void serial_baud(serial_t *obj, int baudrate) {
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uint16_t DL;
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uint32_t PCLK = 66666666;
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obj->uart->SCSMR &= ~0x0003;
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uint16_t DL = (PCLK / (32 * baudrate)) -1;
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// set LCR[DLAB] to enable writing to divider registers
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obj->uart->SCBRR = DL;
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if (baudrate > 32552) {
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obj->uart->SCEMR = 0x0081; // BGDM = 1, ABCS = 1
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DL = PCLK / (8 * baudrate);
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if (DL > 0) {
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DL--;
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}
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obj->uart->SCBRR = (uint8_t)DL;
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} else if (baudrate > 16276) {
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obj->uart->SCEMR = 0x0080; // BGDM = 1
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obj->uart->SCBRR = PCLK / (16 * baudrate) - 1;
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} else if (baudrate > 8138) {
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obj->uart->SCEMR = 0x0000;
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obj->uart->SCBRR = PCLK / (32 * baudrate) - 1;
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} else if (baudrate > 4169) {
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obj->uart->SCSMR |= 0x0001;
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obj->uart->SCEMR = 0x0080; // BGDM = 1
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obj->uart->SCBRR = PCLK / (64 * baudrate) - 1;
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} else if (baudrate > 2034) {
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obj->uart->SCSMR |= 0x0001;
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obj->uart->SCEMR = 0x0000;
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obj->uart->SCBRR = PCLK / (128 * baudrate) - 1;
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} else if (baudrate > 1017) {
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obj->uart->SCSMR |= 0x0002;
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obj->uart->SCEMR = 0x0080; // BGDM = 1
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obj->uart->SCBRR = PCLK / (256 * baudrate) - 1;
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} else if (baudrate > 508) {
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obj->uart->SCSMR |= 0x0002;
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obj->uart->SCEMR = 0x0000;
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obj->uart->SCBRR = PCLK / (512 * baudrate) - 1;
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} else if (baudrate > 254) {
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obj->uart->SCSMR |= 0x0003;
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obj->uart->SCEMR = 0x0080; // BGDM = 1
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obj->uart->SCBRR = PCLK / (1024 * baudrate) - 1;
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} else if (baudrate > 127) {
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obj->uart->SCSMR |= 0x0003;
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obj->uart->SCEMR = 0x0000;
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obj->uart->SCBRR = PCLK / (2048 * baudrate) - 1;
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} else {
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obj->uart->SCSMR |= 0x0003;
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obj->uart->SCEMR = 0x0000;
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obj->uart->SCBRR = 0xFFu;
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}
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}
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void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
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@ -246,9 +345,9 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
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int parity_select;
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MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
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MBED_ASSERT((data_bits > 6) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
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MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 5: 5 data bits ... 3: 8 data bits
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MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
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(parity == ParityForced1) || (parity == ParityForced0));
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(parity == ParityForced1) || (parity == ParityForced0));
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stop_bits = (stop_bits == 1)? 0:
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(stop_bits == 2)? 1:
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@ -259,28 +358,30 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
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0; // must not to be
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switch (parity) {
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case ParityNone:
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parity_enable = 0;
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parity_select = 0;
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break;
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case ParityOdd:
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parity_enable = 1;
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parity_select = 0;
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break;
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case ParityEven:
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parity_enable = 1;
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parity_select = 1;
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break;
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default:
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parity_enable = 0;
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parity_select = 0;
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break;
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case ParityNone:
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parity_enable = 0;
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parity_select = 0;
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break;
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case ParityOdd:
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parity_enable = 1;
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parity_select = 1;
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break;
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case ParityEven:
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parity_enable = 1;
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parity_select = 0;
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break;
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case ParityForced1:
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case ParityForced0:
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default:
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parity_enable = 0;
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parity_select = 0;
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break;
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}
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obj->uart->SCSMR = data_bits << 6
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| parity_enable << 5
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| parity_select << 4
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| stop_bits << 3;
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| parity_enable << 5
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| parity_select << 4
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| stop_bits << 3;
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}
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/******************************************************************************
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@ -312,23 +413,55 @@ static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
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}
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/* TX handler */
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static void uart0_tx_irq(void) {uart_tx_irq(SCIFTXI0_IRQn, 0);}
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static void uart1_tx_irq(void) {uart_tx_irq(SCIFTXI1_IRQn, 1);}
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static void uart2_tx_irq(void) {uart_tx_irq(SCIFTXI2_IRQn, 2);}
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static void uart3_tx_irq(void) {uart_tx_irq(SCIFTXI3_IRQn, 3);}
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static void uart4_tx_irq(void) {uart_tx_irq(SCIFTXI4_IRQn, 4);}
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static void uart5_tx_irq(void) {uart_tx_irq(SCIFTXI5_IRQn, 5);}
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static void uart6_tx_irq(void) {uart_tx_irq(SCIFTXI6_IRQn, 6);}
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static void uart7_tx_irq(void) {uart_tx_irq(SCIFTXI7_IRQn, 7);}
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static void uart0_tx_irq(void) {
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uart_tx_irq(SCIFTXI0_IRQn, 0);
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}
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static void uart1_tx_irq(void) {
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uart_tx_irq(SCIFTXI1_IRQn, 1);
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}
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static void uart2_tx_irq(void) {
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uart_tx_irq(SCIFTXI2_IRQn, 2);
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}
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static void uart3_tx_irq(void) {
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uart_tx_irq(SCIFTXI3_IRQn, 3);
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}
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static void uart4_tx_irq(void) {
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uart_tx_irq(SCIFTXI4_IRQn, 4);
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}
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static void uart5_tx_irq(void) {
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uart_tx_irq(SCIFTXI5_IRQn, 5);
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}
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static void uart6_tx_irq(void) {
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uart_tx_irq(SCIFTXI6_IRQn, 6);
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}
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static void uart7_tx_irq(void) {
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uart_tx_irq(SCIFTXI7_IRQn, 7);
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}
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/* RX handler */
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static void uart0_rx_irq(void) {uart_rx_irq(SCIFRXI0_IRQn, 0);}
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static void uart1_rx_irq(void) {uart_rx_irq(SCIFRXI1_IRQn, 1);}
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static void uart2_rx_irq(void) {uart_rx_irq(SCIFRXI2_IRQn, 2);}
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static void uart3_rx_irq(void) {uart_rx_irq(SCIFRXI3_IRQn, 3);}
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static void uart4_rx_irq(void) {uart_rx_irq(SCIFRXI4_IRQn, 4);}
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static void uart5_rx_irq(void) {uart_rx_irq(SCIFRXI5_IRQn, 5);}
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static void uart6_rx_irq(void) {uart_rx_irq(SCIFRXI6_IRQn, 6);}
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static void uart7_rx_irq(void) {uart_rx_irq(SCIFRXI7_IRQn, 7);}
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static void uart0_rx_irq(void) {
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uart_rx_irq(SCIFRXI0_IRQn, 0);
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}
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static void uart1_rx_irq(void) {
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uart_rx_irq(SCIFRXI1_IRQn, 1);
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}
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static void uart2_rx_irq(void) {
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uart_rx_irq(SCIFRXI2_IRQn, 2);
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}
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static void uart3_rx_irq(void) {
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uart_rx_irq(SCIFRXI3_IRQn, 3);
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}
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static void uart4_rx_irq(void) {
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uart_rx_irq(SCIFRXI4_IRQn, 4);
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}
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static void uart5_rx_irq(void) {
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uart_rx_irq(SCIFRXI5_IRQn, 5);
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}
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static void uart6_rx_irq(void) {
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uart_rx_irq(SCIFRXI6_IRQn, 6);
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}
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static void uart7_rx_irq(void) {
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uart_rx_irq(SCIFRXI7_IRQn, 7);
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}
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void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
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irq_handler = handler;
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@ -369,42 +502,79 @@ static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
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* READ/WRITE
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******************************************************************************/
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int serial_getc(serial_t *obj) {
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uint16_t dummy_read;
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uint16_t err_read;
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int data;
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int was_masked;
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was_masked = __disable_irq();
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if (obj->uart->SCFSR & 0x93) {
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dummy_read = obj->uart->SCFSR;
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obj->uart->SCFSR = (dummy_read & ~0x93);
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err_read = obj->uart->SCFSR;
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obj->uart->SCFSR = (err_read & ~0x93);
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}
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obj->uart->SCSCR |= 0x0040; // Set RIE
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if (!was_masked) {
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__enable_irq();
|
||||
}
|
||||
|
||||
if (obj->uart->SCLSR & 0x0001) {
|
||||
obj->uart->SCLSR = 0u; // ORER clear
|
||||
}
|
||||
|
||||
while (!serial_readable(obj));
|
||||
data = obj->uart->SCFRDR & 0xff;
|
||||
obj->uart->SCFSR &= 0xfffc; // Clear DR,RDF
|
||||
|
||||
was_masked = __disable_irq();
|
||||
err_read = obj->uart->SCFSR;
|
||||
obj->uart->SCFSR = (err_read & 0xfffD); // Clear RDF
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
|
||||
if (err_read & 0x80) {
|
||||
data = -1; //err
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
uint16_t dummy_read;
|
||||
|
||||
int was_masked;
|
||||
|
||||
was_masked = __disable_irq();
|
||||
obj->uart->SCSCR |= 0x0080; // Set TIE
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
while (!serial_writable(obj));
|
||||
obj->uart->SCFTDR = c;
|
||||
was_masked = __disable_irq();
|
||||
dummy_read = obj->uart->SCFSR;
|
||||
obj->uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
uart_data[obj->index].count++;
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
return obj->uart->SCFSR & 0x02; // RDF
|
||||
return ((obj->uart->SCFSR & 0x02) != 0); // RDF
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
return obj->uart->SCFSR & 0x20; // TDFE
|
||||
return ((obj->uart->SCFSR & 0x20) != 0); // TDFE
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
obj->uart->SCFCR = 0x06;
|
||||
obj->uart->SCFCR = 0x06;
|
||||
int was_masked;
|
||||
was_masked = __disable_irq();
|
||||
|
||||
obj->uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1
|
||||
obj->uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0
|
||||
obj->uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0
|
||||
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
|
|
@ -412,12 +582,49 @@ void serial_pinout_tx(PinName tx) {
|
|||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
int was_masked;
|
||||
was_masked = __disable_irq();
|
||||
// TxD Output(L)
|
||||
obj->uart->SCSPTR &= ~0x0001u; // SPB2DT = 0
|
||||
obj->uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable)
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
int was_masked;
|
||||
was_masked = __disable_irq();
|
||||
obj->uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
|
||||
obj->uart->SCSPTR |= 0x0001u; // SPB2DT = 1
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
|
||||
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
|
||||
// determine the UART to use
|
||||
int was_masked;
|
||||
|
||||
serial_flow_irq_set(obj, 0);
|
||||
|
||||
if (type == FlowControlRTSCTS) {
|
||||
was_masked = __disable_irq();
|
||||
obj->uart->SCFCR = 0x0008u; // CTS/RTS enable
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
pinmap_pinout(rxflow, PinMap_UART_RTS);
|
||||
pinmap_pinout(txflow, PinMap_UART_CTS);
|
||||
} else {
|
||||
was_masked = __disable_irq();
|
||||
obj->uart->SCFCR = 0x0000u; // CTS/RTS diable
|
||||
if (!was_masked) {
|
||||
__enable_irq();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue