* | 1.40 |
* The following functions are renamed:\n
* Cy_SMIF_GetTxfrStatus into Cy_SMIF_GetTransferStatus;\n
@@ -591,7 +601,7 @@ extern "C" {
/** The Transfer width options for the command, data, the address and the mode. */
typedef enum
{
- CY_SMIF_WIDTH_SINGLE = 0U, /**< Normal SPI mode. */
+ CY_SMIF_WIDTH_SINGLE = 0U, /**< Single SPI mode. */
CY_SMIF_WIDTH_DUAL = 1U, /**< Dual SPI mode. */
CY_SMIF_WIDTH_QUAD = 2U, /**< Quad SPI mode. */
CY_SMIF_WIDTH_OCTAL = 3U, /**< Octal SPI mode. */
@@ -614,7 +624,7 @@ typedef enum
{
/**
* smif.spi_data[0] = DATA0, smif.spi_data[1] = DATA1, ..., smif.spi_data[7] = DATA7.
- * This value is allowed for the SPI, DSPI, quad-SPI, dual quad-SPI, and octal-SPI modes.
+ * This value is allowed for the SPI, DSPI, QSPI, dual QSPI, and octal SPI modes.
*/
CY_SMIF_DATA_SEL0 = 0,
/**
@@ -624,7 +634,7 @@ typedef enum
CY_SMIF_DATA_SEL1 = 1,
/**
* smif.spi_data[4] = DATA0, smif.spi_data[5] = DATA1, ..., smif.spi_data[7] = DATA3.
- * This value is only allowed for the SPI, DSPI, quad-SPI and dual quad-SPI modes.
+ * This value is only allowed for the SPI, DSPI, QSPI and dual QSPI modes.
*/
CY_SMIF_DATA_SEL2 = 2,
/**
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
index 918b85f149..b4f1d2760d 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_smif_memslot.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif_memslot.h
-* \version 1.40
+* \version 1.40.1
*
* \brief
* This file provides the constants and parameter values for the memory-level
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
index 7b80ad6739..f49264089b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_sysclk.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_sysclk.h
-* \version 1.40.2
+* \version 1.50
*
* Provides an API declaration of the sysclk driver.
*
@@ -104,6 +104,11 @@
*
* | Version | Changes | Reason for Change |
|---|
*
+* | 1.50 |
+* \ref Cy_SysClk_ClkHfGetFrequency is updated to reuse the \ref cy_BleEcoClockFreqHz global system variable. |
+* API enhancement. |
+*
+*
* | 1.40.2 |
* Update documentation based on collateral review feedback. |
* User experience enhancement. |
@@ -1831,10 +1836,8 @@ typedef struct
cy_en_csv_loss_window_t lossWindow;
cy_en_csv_error_actions_t lossAction;
} cy_stc_clkhf_csv_config_t;
-/** \endcond */
-/** \cond INTERNAL */
-extern uint32_t altHfFreq; /* Internal storage for BLE ECO frequency user setting */
+#define altHfFreq (cy_BleEcoClockFreqHz)
/** \endcond */
/**
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syslib.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syslib.h
index b568337cdf..0d7777895b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syslib.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syslib.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syslib.h
-* \version 2.40.1
+* \version 2.50
*
* Provides an API declaration of the SysLib driver.
*
@@ -121,12 +121,6 @@
* Description of Deviation(s) |
*
*
-* | 1.2 |
-* R |
-* No reliance shall be placed on undefined or unspecified behaviour. |
-* This specific behavior is explicitly covered in rule 20.1. |
-*
-*
* | 2.1 |
* R |
* This function contains a mixture of in-line assembler statements and C statements. |
@@ -139,26 +133,25 @@
* The unions are used for CFSR, HFSR and SHCSR Fault Status Registers
* content access as a word in code and as a structure during debug. |
*
-*
-* | 19.13 |
-* A |
-* The # and ## operators should not be used. |
-* The ## preprocessor operator is used in macros to form the field mask. |
-*
-*
-* | 20.1 |
-* R |
-* Reserved identifiers, macros and functions in the standard library, shall not be
-* defined, redefined or undefined. |
-* The driver defines the macros with leading underscores
-* (_CLR_SET_FLD/_BOOL2FLD/_FLD2BOOL) and therefore generates this MISRA violation. |
-*
*
*
* \section group_syslib_changelog Changelog
*
* | Version | Changes | Reason for Change |
|---|
*
+* | 2.50 |
+* Moved following macros to the core library:
+* CY_LO8,CY_HI8,CY_LO16,CY_HI16,CY_SWAP_ENDIAN16,CY_SWAP_ENDIAN32,
+* CY_SWAP_ENDIAN64,CY_GET_REG8,CY_SET_REG8,CY_GET_REG16,CY_SET_REG16,
+* CY_GET_REG24,CY_SET_REG24,CY_GET_REG32,CY_SET_REG32,_CLR_SET_FLD32U,
+* CY_REG32_CLR_SET,_CLR_SET_FLD16U,CY_REG16_CLR_SET,_CLR_SET_FLD8U,
+* CY_REG8_CLR_SET,_BOOL2FLD,_FLD2BOOL,CY_SYSLIB_DIV_ROUND,
+* CY_SYSLIB_DIV_ROUNDUP,CY_NOINIT,CY_SECTION,CY_UNUSED,CY_NOINLINE,
+* CY_ALIGN,CY_RAMFUNC_BEGIN,CY_RAMFUNC_END.
+* Use at least version 1.1 of the core library: https://github.com/cypresssemiconductorco/core-lib.
+* | Improve PDL code base. |
+*
+*
* | 2.40.1 |
* Correct the CY_RAMFUNC_BEGIN macro for the IAR compiler. |
* Removed the IAR compiler warning. |
@@ -196,7 +189,7 @@
* Driver library directory-structure simplification. |
*
*
-* | Added the following macros: \ref CY_REG32_CLR_SET, \ref _CLR_SET_FLD16U, \ref CY_REG16_CLR_SET, \ref _CLR_SET_FLD8U, \ref CY_REG8_CLR_SET |
+* Added the following macros: CY_REG32_CLR_SET, _CLR_SET_FLD16U, CY_REG16_CLR_SET, _CLR_SET_FLD8U, CY_REG8_CLR_SET |
* Register access simplification. |
*
*
@@ -256,6 +249,7 @@
#include
#include
+#include "cy_utils.h"
#include "cy_device.h"
#include "cy_device_headers.h"
@@ -463,87 +457,7 @@ typedef enum
#define CY_SYSLIB_DRV_VERSION_MAJOR 2
/** The driver minor version */
-#define CY_SYSLIB_DRV_VERSION_MINOR 40
-
-
-/*******************************************************************************
-* Data manipulation defines
-*******************************************************************************/
-
-/** Get the lower 8 bits of a 16-bit value. */
-#define CY_LO8(x) ((uint8_t) ((x) & 0xFFU))
-/** Get the upper 8 bits of a 16-bit value. */
-#define CY_HI8(x) ((uint8_t) ((uint16_t)(x) >> 8U))
-
-/** Get the lower 16 bits of a 32-bit value. */
-#define CY_LO16(x) ((uint16_t) ((x) & 0xFFFFU))
-/** Get the upper 16 bits of a 32-bit value. */
-#define CY_HI16(x) ((uint16_t) ((uint32_t)(x) >> 16U))
-
-/** Swap the byte ordering of a 16-bit value */
-#define CY_SWAP_ENDIAN16(x) ((uint16_t)(((x) << 8U) | (((x) >> 8U) & 0x00FFU)))
-
-/** Swap the byte ordering of a 32-bit value */
-#define CY_SWAP_ENDIAN32(x) ((uint32_t)((((x) >> 24U) & 0x000000FFU) | (((x) & 0x00FF0000U) >> 8U) | \
- (((x) & 0x0000FF00U) << 8U) | ((x) << 24U)))
-
-/** Swap the byte ordering of a 64-bit value */
-#define CY_SWAP_ENDIAN64(x) ((uint64_t) (((uint64_t) CY_SWAP_ENDIAN32((uint32_t)(x)) << 32U) | \
- CY_SWAP_ENDIAN32((uint32_t)((x) >> 32U))))
-
-
-/*******************************************************************************
-* Memory model definitions
-*******************************************************************************/
-#if defined(__ARMCC_VERSION)
- /** To create cross compiler compatible code, use the CY_NOINIT, CY_SECTION, CY_UNUSED, CY_ALIGN
- * attributes at the first place of declaration/definition.
- * For example: CY_NOINIT uint32_t noinitVar;
- */
- #if (__ARMCC_VERSION >= 6010050)
- #define CY_NOINIT __attribute__ ((section(".noinit")))
- #else
- #define CY_NOINIT __attribute__ ((section(".noinit"), zero_init))
- #endif /* (__ARMCC_VERSION >= 6010050) */
- #define CY_SECTION(name) __attribute__ ((section(name)))
- #define CY_UNUSED __attribute__ ((unused))
- #define CY_NOINLINE __attribute__ ((noinline))
- /* Specifies the minimum alignment (in bytes) for variables of the specified type. */
- #define CY_ALIGN(align) __ALIGNED(align)
- #define CY_RAMFUNC_BEGIN __attribute__ ((section(".cy_ramfunc")))
- #define CY_RAMFUNC_END
-#elif defined (__GNUC__)
- #if defined (__clang__)
- #define CY_NOINIT __attribute__ ((section("__DATA, __noinit")))
- #define CY_SECTION(name) __attribute__ ((section("__DATA, "name)))
- #define CY_RAMFUNC_BEGIN __attribute__ ((section("__DATA, .cy_ramfunc")))
- #define CY_RAMFUNC_END
- #else
- #define CY_NOINIT __attribute__ ((section(".noinit")))
- #define CY_SECTION(name) __attribute__ ((section(name)))
- #define CY_RAMFUNC_BEGIN __attribute__ ((section(".cy_ramfunc")))
- #define CY_RAMFUNC_END
- #endif
-
- #define CY_UNUSED __attribute__ ((unused))
- #define CY_NOINLINE __attribute__ ((noinline))
- #define CY_ALIGN(align) __ALIGNED(align)
-#elif defined (__ICCARM__)
- #define CY_PRAGMA(x) _Pragma(#x)
- #define CY_NOINIT __no_init
- #define CY_SECTION(name) CY_PRAGMA(location = name)
- #define CY_UNUSED
- #define CY_NOINLINE CY_PRAGMA(optimize = no_inline)
- #define CY_RAMFUNC_BEGIN CY_PRAGMA(diag_suppress = Ta023) __ramfunc
- #define CY_RAMFUNC_END CY_PRAGMA(diag_default = Ta023)
- #if (__VER__ < 8010001)
- #define CY_ALIGN(align) CY_PRAGMA(data_alignment = align)
- #else
- #define CY_ALIGN(align) __ALIGNED(align)
- #endif /* (__VER__ < 8010001) */
-#else
- #error "An unsupported toolchain"
-#endif /* (__ARMCC_VERSION) */
+#define CY_SYSLIB_DRV_VERSION_MINOR 50
typedef void (* cy_israddress)(void); /**< Type of ISR callbacks */
#if defined (__ICCARM__)
@@ -600,130 +514,6 @@ typedef double float64_t; /**< Specific-length typedef for the basic numerical
#endif /* (CY_ARM_FAULT_DEBUG == CY_ARM_FAULT_DEBUG_ENABLED) */
-/*******************************************************************************
-* Macro Name: CY_GET_REG8(addr)
-****************************************************************************//**
-*
-* Reads the 8-bit value from the specified address. This function can't be
-* used to access the Core register, otherwise a fault occurs.
-*
-* \param addr The register address.
-*
-* \return The read value.
-*
-*******************************************************************************/
-#define CY_GET_REG8(addr) (*((const volatile uint8_t *)(addr)))
-
-
-/*******************************************************************************
-* Macro Name: CY_SET_REG8(addr, value)
-****************************************************************************//**
-*
-* Writes an 8-bit value to the specified address. This function can't be
-* used to access the Core register, otherwise a fault occurs.
-*
-* \param addr The register address.
-*
-* \param value The value to write.
-*
-*******************************************************************************/
-#define CY_SET_REG8(addr, value) (*((volatile uint8_t *)(addr)) = (uint8_t)(value))
-
-
-/*******************************************************************************
-* Macro Name: CY_GET_REG16(addr)
-****************************************************************************//**
-*
-* Reads the 16-bit value from the specified address.
-*
-* \param addr The register address.
-*
-* \return The read value.
-*
-*******************************************************************************/
-#define CY_GET_REG16(addr) (*((const volatile uint16_t *)(addr)))
-
-
-/*******************************************************************************
-* Macro Name: CY_SET_REG16(addr, value)
-****************************************************************************//**
-*
-* Writes the 16-bit value to the specified address.
-*
-* \param addr The register address.
-*
-* \param value The value to write.
-*
-*******************************************************************************/
-#define CY_SET_REG16(addr, value) (*((volatile uint16_t *)(addr)) = (uint16_t)(value))
-
-
-/*******************************************************************************
-* Macro Name: CY_GET_REG24(addr)
-****************************************************************************//**
-*
-* Reads the 24-bit value from the specified address.
-*
-* \param addr The register address.
-*
-* \return The read value.
-*
-*******************************************************************************/
-#define CY_GET_REG24(addr) (((uint32_t) (*((const volatile uint8_t *)(addr)))) | \
- (((uint32_t) (*((const volatile uint8_t *)(addr) + 1))) << 8U) | \
- (((uint32_t) (*((const volatile uint8_t *)(addr) + 2))) << 16U))
-
-
-/*******************************************************************************
-* Macro Name: CY_SET_REG24(addr, value)
-****************************************************************************//**
-*
-* Writes the 24-bit value to the specified address.
-*
-* \param addr The register address.
-*
-* \param value The value to write.
-*
-*******************************************************************************/
-#define CY_SET_REG24(addr, value) do \
- { \
- (*((volatile uint8_t *) (addr))) = (uint8_t)(value); \
- (*((volatile uint8_t *) (addr) + 1)) = (uint8_t)((value) >> 8U); \
- (*((volatile uint8_t *) (addr) + 2)) = (uint8_t)((value) >> 16U); \
- } \
- while(0)
-
-
-/*******************************************************************************
-* Macro Name: CY_GET_REG32(addr)
-****************************************************************************//**
-*
-* Reads the 32-bit value from the specified register. The address is the little
-* endian order (LSB in lowest address).
-*
-* \param addr The register address.
-*
-* \return The read value.
-*
-*******************************************************************************/
-#define CY_GET_REG32(addr) (*((const volatile uint32_t *)(addr)))
-
-
-/*******************************************************************************
-* Macro Name: CY_SET_REG32(addr, value)
-****************************************************************************//**
-*
-* Writes the 32-bit value to the specified register. The address is the little
-* endian order (LSB in lowest address).
-*
-* \param addr The register address.
-*
-* \param value The value to write.
-*
-*******************************************************************************/
-#define CY_SET_REG32(addr, value) (*((volatile uint32_t *)(addr)) = (uint32_t)(value))
-
-
/**
* \defgroup group_syslib_macros_assert Assert Classes and Levels
* \{
@@ -764,155 +554,6 @@ typedef double float64_t; /**< Specific-length typedef for the basic numerical
/** \} group_syslib_macros_assert */
-/*******************************************************************************
-* Macro Name: CY_ASSERT
-****************************************************************************//**
-*
-* The macro that evaluates the expression and, if it is false (evaluates to 0),
-* the processor is halted. Cy_SysLib_AssertFailed() is called when the logical
-* expression is false to store the ASSERT location and halt the processor.
-*
-* \param x The logical expression. Asserts if false.
-* \note This macro is evaluated unless NDEBUG is not defined.
-* If NDEBUG is defined, just empty do while cycle is generated for this
-* macro for the sake of consistency and to avoid MISRA violation.
-* NDEBUG is defined by default for a Release build setting and not defined
-* for a Debug build setting.
-*
-*******************************************************************************/
-#if !defined(NDEBUG)
- #define CY_ASSERT(x) do \
- { \
- if(!(x)) \
- { \
- Cy_SysLib_AssertFailed((char_t *) __FILE__, (uint32_t) __LINE__); \
- } \
- } while(0)
-#else
- #define CY_ASSERT(x) do \
- { \
- } while(0)
-#endif /* !defined(NDEBUG) */
-
-
-/*******************************************************************************
-* Macro Name: _CLR_SET_FLD32U
-****************************************************************************//**
-*
-* The macro for setting a register with a name field and value for providing
-* get-clear-modify-write operations.
-* Returns a resulting value to be assigned to the register.
-*
-*******************************************************************************/
-#define _CLR_SET_FLD32U(reg, field, value) (((reg) & ((uint32_t)(~(field ## _Msk)))) | (_VAL2FLD(field, value)))
-
-
-/*******************************************************************************
-* Macro Name: CY_REG32_CLR_SET
-****************************************************************************//**
-*
-* Uses _CLR_SET_FLD32U macro for providing get-clear-modify-write
-* operations with a name field and value and writes a resulting value
-* to the 32-bit register.
-*
-*******************************************************************************/
-#define CY_REG32_CLR_SET(reg, field, value) ((reg) = _CLR_SET_FLD32U((reg), field, (value)))
-
-
-/*******************************************************************************
-* Macro Name: _CLR_SET_FLD16U
-****************************************************************************//**
-*
-* The macro for setting a 16-bit register with a name field and value for providing
-* get-clear-modify-write operations.
-* Returns a resulting value to be assigned to the 16-bit register.
-*
-*******************************************************************************/
-#define _CLR_SET_FLD16U(reg, field, value) ((uint16_t)(((reg) & ((uint16_t)(~(field ## _Msk)))) | \
- ((uint16_t)_VAL2FLD(field, value))))
-
-
-/*******************************************************************************
-* Macro Name: CY_REG16_CLR_SET
-****************************************************************************//**
-*
-* Uses _CLR_SET_FLD16U macro for providing get-clear-modify-write
-* operations with a name field and value and writes a resulting value
-* to the 16-bit register.
-*
-*******************************************************************************/
-#define CY_REG16_CLR_SET(reg, field, value) ((reg) = _CLR_SET_FLD16U((reg), field, (value)))
-
-
-/*******************************************************************************
-* Macro Name: _CLR_SET_FLD8U
-****************************************************************************//**
-*
-* The macro for setting a 8-bit register with a name field and value for providing
-* get-clear-modify-write operations.
-* Returns a resulting value to be assigned to the 8-bit register.
-*
-*******************************************************************************/
-#define _CLR_SET_FLD8U(reg, field, value) ((uint8_t)(((reg) & ((uint8_t)(~(field ## _Msk)))) | \
- ((uint8_t)_VAL2FLD(field, value))))
-
-
-/*******************************************************************************
-* Macro Name: CY_REG8_CLR_SET
-****************************************************************************//**
-*
-* Uses _CLR_SET_FLD8U macro for providing get-clear-modify-write
-* operations with a name field and value and writes a resulting value
-* to the 8-bit register.
-*
-*******************************************************************************/
-#define CY_REG8_CLR_SET(reg, field, value) ((reg) = _CLR_SET_FLD8U((reg), field, (value)))
-
-
-/*******************************************************************************
-* Macro Name: _BOOL2FLD
-****************************************************************************//**
-*
-* Returns a field mask if the value is not false.
-* Returns 0, if the value is false.
-*
-*******************************************************************************/
-#define _BOOL2FLD(field, value) (((value) != false) ? (field ## _Msk) : 0UL)
-
-
-/*******************************************************************************
-* Macro Name: _FLD2BOOL
-****************************************************************************//**
-*
-* Returns true, if the value includes the field mask.
-* Returns false, if the value doesn't include the field mask.
-*
-*******************************************************************************/
-#define _FLD2BOOL(field, value) (((value) & (field ## _Msk)) != 0UL)
-
-
-/*******************************************************************************
-* Macro Name: CY_SYSLIB_DIV_ROUND
-****************************************************************************//**
-*
-* Calculates a / b with rounding to the nearest integer,
-* a and b must have the same sign.
-*
-*******************************************************************************/
-#define CY_SYSLIB_DIV_ROUND(a, b) (((a) + ((b) / 2U)) / (b))
-
-
-/*******************************************************************************
-* Macro Name: CY_SYSLIB_DIV_ROUNDUP
-****************************************************************************//**
-*
-* Calculates a / b with rounding up if remainder != 0,
-* both a and b must be positive.
-*
-*******************************************************************************/
-#define CY_SYSLIB_DIV_ROUNDUP(a, b) ((((a) - 1U) / (b)) + 1U)
-
-
/******************************************************************************
* Constants
*****************************************************************************/
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
index a762587bf2..85cd16688b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_syspm.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syspm.h
-* \version 4.40
+* \version 4.50
*
* Provides the function definitions for the power management API.
*
@@ -724,6 +724,25 @@
*
* | Version | Changes | Reason for Change |
|---|
*
+* | 4.50 |
+* Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function. |
+*
+* Updated the mechanism for saving/restoring not retained UDB and clock
+* registers in the Cy_SysPm_CpuEnterDeepSleep() function.
+* |
+*
+*
+* |
+* Updated the \ref Cy_SysPm_CpuEnterDeepSleep() function to use values
+* stored into the variable instead of reading them directly from
+* SFLASH memory.
+* |
+*
+* SFLASH memory can be unavailable to read the correct value after
+* a Deep sleep state on the CY8C6xx6 and CY8C6xx7 devices.
+* |
+*
+*
* | 4.40 |
*
* Fixed \ref Cy_SysPm_LdoSetVoltage(), \ref Cy_SysPm_BuckEnable(), and
@@ -1223,7 +1242,7 @@ extern "C" {
#define CY_SYSPM_DRV_VERSION_MAJOR 4
/** Driver minor version */
-#define CY_SYSPM_DRV_VERSION_MINOR 40
+#define CY_SYSPM_DRV_VERSION_MINOR 50
/** SysPm driver identifier */
#define CY_SYSPM_ID (CY_PDL_DRV_ID(0x10U))
@@ -1705,6 +1724,9 @@ typedef struct
uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN0_REG; /**< UDB bank QCLK_EN0 register */
uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN1_REG; /**< UDB bank QCLK_EN1 register */
uint32_t CY_SYSPM_UDB_BCTL_QCLK_EN2_REG; /**< UDB bank QCLK_EN2 register */
+
+ uint32_t CY_SYSPM_CM0_CLOCK_CTL_REG; /**< CPUSS CM0+ clock control register */
+ uint32_t CY_SYSPM_CM4_CLOCK_CTL_REG; /**< CPUSS CM4 clock control register */
} cy_stc_syspm_backup_regs_t;
/** \} group_syspm_data_structures */
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_trigmux.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_trigmux.h
index f6a68c2d04..e8a12c1b9f 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_trigmux.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_trigmux.h
@@ -1,6 +1,6 @@
/*******************************************************************************
* \file cy_trigmux.h
-* \version 1.20
+* \version 1.20.1
*
* This file provides constants and parameter values for the Trigger multiplexer driver.
*
@@ -115,53 +115,51 @@
*
* For PERI_ver1:
* Step 1. Find the trigger group number in the Trigger Group Inputs section of the device
-* configuration header file that corresponds to the output of the first peripheral block.
-* For example, TRIG11_IN_TCPWM0_TR_OVERFLOW0 input of the reduction multiplexers belongs
-* to Trigger Group 11.
+* configuration header file that corresponds to the output of the source peripheral block.
+* For example, TRIG11_IN_TCPWM0_TR_OVERFLOW0 (see \ref group_trigmux_red_in_enums and the diagram
+* at the top of this section) input of the Reduction multiplexers belongs to Trigger Group 11.
*
* Step 2. Find the trigger group number in the Trigger Group Outputs section of the device
-* configuration header file that corresponds to the input of the second peripheral block.
-* For example, TRIG0_OUT_CPUSS_DW0_TR_IN0 output of the distribution multiplexer belongs to
-* Trigger Group 0.
+* configuration header file that corresponds to the input of the destination peripheral block.
+* For example, TRIG0_OUT_CPUSS_DW0_TR_IN0 (see \ref group_trigmux_dst_out_enums) output of the
+* Distribution multiplexer belongs to Trigger Group 0.
*
* Step 3. Find the same trigger group number in the Trigger Group Inputs section of the
* device configuration header file that corresponds to the trigger group number found in
-* Step 1. Select the reduction multiplexer output that can be connected to the trigger group
-* found in Step 2. For example, TRIG0_IN_TR_GROUP11_OUTPUT0 means that Reduction Multiplexer
-* Output 15 of Trigger Group 13 can be connected to Trigger Group 0.
+* Step 1. Select the Reduction multiplexer output that can be connected to the trigger group
+* found in Step 2. For example, TRIG0_IN_TR_GROUP11_OUTPUT0 (see \ref group_trigmux_dst_in_enums)
+* means that Reduction Multiplexer Output 0 of Trigger Group 11 can be connected to
+* Trigger Group 0.
*
* Step 4. Find the same trigger group number in the Trigger Group Outputs section of the
* device configuration header file that corresponds to the trigger group number found in Step 2.
* Select the distribution multiplexer input that can be connected to the trigger group found
-* in Step 1. For example, TRIG11_OUT_TR_GROUP0_INPUT9 means that the Distribution Multiplexer
-* Input 42 of Trigger Group 0 can be connected to the output of the reduction multiplexer
-* in Trigger Group 13 found in Step 3.
+* in Step 1. For example, TRIG11_OUT_TR_GROUP0_INPUT9 (see \ref group_trigmux_red_out_enums)
+* means that the Distribution Multiplexer Input 9 of Trigger Group 0 can be connected to the
+* output of the Reduction multiplexer in Trigger Group 11 found in Step 3.
*
* Step 5. Call Cy_TrigMux_Connect() API twice: the first call - with the constants for the
* inTrig and outTrig parameters found in Steps 1 and Step 4, the second call - with the
* constants for the inTrig and outTrig parameters found in Steps 2 and Step 3.
-* For example,
-* Cy_TrigMux_Connect(TRIG11_IN_TCPWM0_TR_OVERFLOW0, TRIG11_OUT_TR_GROUP0_INPUT9,
-* false, TRIGGER_TYPE_LEVEL);
-* Cy_TrigMux_Connect(TRIG0_IN_TR_GROUP11_OUTPUT0, TRIG0_OUT_CPUSS_DW0_TR_IN0,
-* false, TRIGGER_TYPE_EDGE);
+* For example:
+* \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_PERI_ver1
*
* For PERI_ver2:
* Step 1. Find the trigger group number in the Trigger Group Inputs section of the device
-* configuration header file that corresponds to the output of the first peripheral block.
-* For example, TRIG_IN_MUX_0_TCPWM0_TR_OVERFLOW0 TrigMux input belongs to Trigger Group 0.
-* It is the same TCPWM0 counter 0 overflow output (as in the example for PERI_ver1).
+* configuration header file that corresponds to the output of the source peripheral block.
+* For example, TRIG_IN_MUX_0_TCPWM0_TR_OVERFLOW0 (see \ref group_trigmux_in_enums) TrigMux
+* input belongs to Trigger Group 0. It is the same TCPWM0 counter 0 overflow output
+* (as in the example for PERI_ver1).
*
* Step 2. Find the same trigger group number in the Trigger Group Outputs section of the
* device configuration header file that corresponds to the trigger group number found in
-* Step 1. Select the TrigMux output that can be connected to the second peripheral block.
-* For example, TRIG_OUT_MUX_0_PDMA0_TR_IN0 means that the trigger multiplexer
-* Output 0 of Trigger Group 0 can be connected to the DW0 channel 0 trigger input
-* (the same DMA channel as mentioned in the example for PERI_ver1).
+* Step 1. Select the TrigMux output that can be connected to the destination peripheral block.
+* For example, TRIG_OUT_MUX_0_PDMA0_TR_IN0 (see \ref group_trigmux_out_enums) means that the
+* trigger multiplexer Output 0 of Trigger Group 0 can be connected to the DW0 channel 0 trigger
+* input (the same DMA channel as mentioned in the example for PERI_ver1).
*
* Step 3. Call Cy_TrigMux_Connect() API once:
-* Cy_TrigMux_Connect(TRIG_IN_MUX_0_TCPWM0_TR_OVERFLOW0, TRIG_OUT_MUX_0_PDMA0_TR_IN0,
-* false, TRIGGER_TYPE_EDGE);
+* \snippet trigmux/snippet/main.c snippet_Cy_TrigMux_PERI_ver2
*
* \section group_trigmux_more_information More Information
* For more information on the TrigMux peripheral, refer to the technical reference manual (TRM).
@@ -173,6 +171,11 @@
*
* | Version | Changes | Reason for Change |
|---|
*
+* | 1.20.1 |
+* Documentation is extended/improved. |
+* Enhancement based on usability feedback. |
+*
+*
* | 1.20 |
* Flattened the organization of the driver source code into the single source directory and the single include directory. |
* Driver library directory-structure simplification. |
@@ -217,6 +220,21 @@
* \defgroup group_trigmux_macros Macros
* \defgroup group_trigmux_functions Functions
* \defgroup group_trigmux_enums Enumerated Types
+* \{
+* \defgroup group_trigmux_red_enums Reduction Trigger Mutiplexers
+* \{
+* \defgroup group_trigmux_red_in_enums Reduction Trigger Mutiplexer Inputs
+* \defgroup group_trigmux_red_out_enums Reduction Trigger Mutiplexer Outputs
+* \}
+* \defgroup group_trigmux_dst_enums Distribution Trigger Mutiplexers
+* \{
+* \defgroup group_trigmux_dst_in_enums Distribution Trigger Mutiplexer Inputs
+* \defgroup group_trigmux_dst_out_enums Distribution Trigger Mutiplexer Outputs
+* \}
+* \defgroup group_trigmux_in_enums Trigger Mutiplexer Inputs
+* \defgroup group_trigmux_out_enums Trigger Mutiplexer Outputs
+* \defgroup group_trigmux_1to1_enums One-To-One Trigger Lines
+* \}
*/
#if !defined(CY_TRIGMUX_H)
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_wdt.h b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_wdt.h
index 8bba1d06b5..bc64ce9c77 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_wdt.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/include/cy_wdt.h
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_wdt.h
-* \version 1.10.1
+* \version 1.20
*
* This file provides constants and parameter values for the WDT driver.
*
@@ -191,6 +191,11 @@
*
* | Version | Changes | Reason for Change |
|---|
*
+* | 1.20 |
+* Added a new API function \ref Cy_WDT_IsEnabled() |
+* Enhancement based on usability feedback. |
+*
+*
* | 1.10.1 |
* Added info that the WDT lock state is not retained during
* system Deep Sleep power mode.
@@ -251,6 +256,7 @@
#include
#include "cy_device_headers.h"
#include "cy_device.h"
+#include "cy_syslib.h"
#if defined(__cplusplus)
extern "C" {
@@ -270,7 +276,7 @@ extern "C" {
#define CY_WDT_DRV_VERSION_MAJOR 1
/** The driver minor version */
-#define CY_WDT_DRV_VERSION_MINOR 10
+#define CY_WDT_DRV_VERSION_MINOR 20
/** The internal define for the first iteration of WDT unlocking */
#define CY_SRSS_WDT_LOCK_BIT0 ((uint32_t)0x01U << 30U)
@@ -364,6 +370,23 @@ __STATIC_INLINE void Cy_WDT_Disable(void)
}
+/*******************************************************************************
+* Function Name: Cy_WDT_IsEnabled
+****************************************************************************//**
+*
+* Reports an enable/disable state of the Watchdog timer.
+*
+* \return
+* - true - if the timer is enabled
+* - false - if the timer is disabled
+*
+*******************************************************************************/
+__STATIC_INLINE bool Cy_WDT_IsEnabled(void)
+{
+ return _FLD2BOOL(SRSS_WDT_CTL_WDT_EN, SRSS_WDT_CTL);
+}
+
+
/*******************************************************************************
* Function Name: Cy_WDT_GetMatch
****************************************************************************//**
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
index 8bb4a96a3b..16e71def22 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S
@@ -1,6 +1,6 @@
;-------------------------------------------------------------------------------
; \file cy_syslib_mdk.s
-; \version 2.40
+; \version 2.50
;
; \brief Assembly routines for ARMCC.
;
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
index 2b78215364..68249d7077 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_A_Clang/cy_syslib_a_clang.S
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syslib_a_clang.S
-* \version 2.40
+* \version 2.50
*
* \brief Assembly routines for Apple Clang.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
index 084ba8649c..1d6e16eba2 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syslib_gcc.S
-* \version 2.40
+* \version 2.50
*
* \brief Assembly routines for GNU GCC.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
index 37d79a089d..8847749100 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/TOOLCHAIN_IAR/cy_syslib_iar.S
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syslib_iar.s
-* \version 2.40
+* \version 2.50
*
* \brief Assembly routines for IAR Embedded Workbench IDE.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
index 8edd588d0b..8f92bd1df2 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_ble_clk.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_ble_clk.c
-* \version 3.20
+* \version 3.30
*
* \brief
* This driver provides the source code for API BLE ECO clock.
@@ -276,9 +276,11 @@ cy_en_ble_eco_status_t Cy_BLE_EcoConfigure(cy_en_ble_eco_freq_t freq, cy_en_ble_
/* If clock source for RCB is PeriClk */
if((BLE_BLESS_LL_CLK_EN & BLE_BLESS_LL_CLK_EN_SEL_RCB_CLK_Msk) == 0U)
{
- if(cy_PeriClkFreqHz > CY_BLE_DEFAULT_RCB_CTRL_FREQ)
+ uint32_t periClkFreqHz = Cy_SysClk_ClkPeriGetFrequency();
+
+ if(periClkFreqHz > CY_BLE_DEFAULT_RCB_CTRL_FREQ)
{
- rcbDivider = (cy_PeriClkFreqHz / CY_BLE_DEFAULT_RCB_CTRL_FREQ) - 1U;
+ rcbDivider = (periClkFreqHz / CY_BLE_DEFAULT_RCB_CTRL_FREQ) - 1U;
}
}
else
@@ -413,7 +415,7 @@ void Cy_BLE_EcoReset(void)
{
/* Initiate Soft Reset */
BLE_BLESS_LL_CLK_EN |= BLE_BLESS_LL_CLK_EN_BLESS_RESET_Msk;
- altHfFreq = 0UL; /* Reset the BLE ECO frequency */
+ cy_BleEcoClockFreqHz = 0UL; /* Reset the BLE ECO frequency */
}
@@ -785,7 +787,7 @@ static cy_en_ble_eco_status_t Cy_BLE_HAL_MxdRadioEnableClocks(cy_en_ble_eco_freq
temp |= (uint16_t)(CY_BLE_MXD_RADIO_CLK_BUF_AMP_32M_LARGE << CY_BLE_RF_DCXO_BUF_CFG_REG_BUF_AMP_SEL_SHIFT);
/* Update cy_BleEcoClockFreqHz for the proper Cy_SysLib_Delay functionality */
- altHfFreq = CY_BLE_DEFAULT_ECO_CLK_FREQ_32MHZ / (1UL << (uint16_t)sysClkDiv);
+ cy_BleEcoClockFreqHz = CY_BLE_DEFAULT_ECO_CLK_FREQ_32MHZ / (1UL << (uint16_t)sysClkDiv);
}
else
{
@@ -802,7 +804,7 @@ static cy_en_ble_eco_status_t Cy_BLE_HAL_MxdRadioEnableClocks(cy_en_ble_eco_freq
temp |= (uint16_t)(CY_BLE_MXD_RADIO_CLK_BUF_AMP_16M_LARGE << CY_BLE_RF_DCXO_BUF_CFG_REG_BUF_AMP_SEL_SHIFT);
/* Update cy_BleEcoClockFreqHz for the proper Cy_SysLib_Delay functionality */
- altHfFreq = CY_BLE_DEFAULT_ECO_CLK_FREQ_16MHZ / (1UL << (uint16_t)sysClkDiv);
+ cy_BleEcoClockFreqHz = CY_BLE_DEFAULT_ECO_CLK_FREQ_16MHZ / (1UL << (uint16_t)sysClkDiv);
}
temp |= (uint16_t)(blerdDivider << CY_BLE_RF_DCXO_BUF_CFG_REG_CLK_DIV_SHIFT);
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
index 4c7b385806..f5bd30c9d4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_flash.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_flash.c
-* \version 3.30.2
+* \version 3.30.3
*
* \brief
* Provides the public functions for the API for the PSoC 6 Flash Driver.
@@ -143,9 +143,7 @@ typedef cy_en_flashdrv_status_t (*Cy_Flash_Proxy)(cy_stc_flash_context_t *contex
/* The default delay time value */
#define CY_FLASH_DEFAULT_DELAY (150UL)
/* Calculates the time in microseconds to wait for the number of the CM0P ticks */
- #define CY_FLASH_DELAY_CORRECTIVE(ticks) ((((uint32)Cy_SysClk_ClkPeriGetDivider() + 1UL) * \
- (Cy_SysClk_ClkSlowGetDivider() + 1UL) * (ticks) * 1000UL)\
- / ((uint32_t)cy_Hfclk0FreqHz / 1000UL))
+ #define CY_FLASH_DELAY_CORRECTIVE(ticks) (((ticks) * 1000UL) / (Cy_SysClk_ClkSlowGetFrequency() / 1000UL))
/* Number of the CM0P ticks for StartProgram function delay corrective time */
#define CY_FLASH_START_PROGRAM_DELAY_TICKS (6000UL)
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sar.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sar.c
index f5a89837a3..29acc37e1b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sar.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sar.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_sar.c
-* \version 1.20.1
+* \version 1.20.2
*
* Provides the public functions for the API for the SAR driver.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_common.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_common.c
index 8cfb4dba11..14cc5ece9a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_common.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_common.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_scb_common.c
-* \version 2.30.1
+* \version 2.40
*
* Provides common API implementation of the SCB driver.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_ezi2c.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_ezi2c.c
index e2f30d46f4..8ab2a55508 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_ezi2c.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_ezi2c.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_scb_ezi2c.c
-* \version 2.30.1
+* \version 2.40
*
* Provides EZI2C API implementation of the SCB driver.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_i2c.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_i2c.c
index cbef087c42..a1137e740a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_i2c.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_i2c.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_scb_i2c.c
-* \version 2.30.1
+* \version 2.40
*
* Provides I2C API implementation of the SCB driver.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_spi.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_spi.c
index 74b498d72e..0706dff07d 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_spi.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_spi.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_scb_spi.c
-* \version 2.30.1
+* \version 2.40
*
* Provides SPI API implementation of the SCB driver.
*
@@ -605,7 +605,9 @@ cy_en_scb_spi_status_t Cy_SCB_SPI_Transfer(CySCB_Type *base, void *txBuffer, voi
cy_stc_scb_spi_context_t *context)
{
CY_ASSERT_L1(NULL != context);
+ #if !defined(NDEBUG)
CY_ASSERT_L1(CY_SCB_SPI_INIT_KEY == context->initKey);
+ #endif
CY_ASSERT_L1(CY_SCB_SPI_IS_BUFFER_VALID(txBuffer, rxBuffer, size));
cy_en_scb_spi_status_t retStatus = CY_SCB_SPI_TRANSFER_BUSY;
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_uart.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_uart.c
index 02babb2603..f7aabf5baa 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_uart.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_scb_uart.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_scb_uart.c
-* \version 2.30.1
+* \version 2.40
*
* Provides UART API implementation of the SCB driver.
*
@@ -34,6 +34,7 @@ extern "C" {
static void HandleDataReceive (CySCB_Type *base, cy_stc_scb_uart_context_t *context);
static void HandleRingBuffer (CySCB_Type *base, cy_stc_scb_uart_context_t *context);
static void HandleDataTransmit(CySCB_Type *base, cy_stc_scb_uart_context_t *context);
+static uint32_t SelectRxFifoLevel(CySCB_Type const *base);
/*******************************************************************************
@@ -453,12 +454,14 @@ cy_en_syspm_status_t Cy_SCB_UART_HibernateCallback(cy_stc_syspm_callback_params_
void Cy_SCB_UART_StartRingBuffer(CySCB_Type *base, void *buffer, uint32_t size, cy_stc_scb_uart_context_t *context)
{
CY_ASSERT_L1(NULL != context);
+ #if !defined(NDEBUG)
CY_ASSERT_L1(CY_SCB_UART_INIT_KEY == context->initKey);
+ #endif
CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
if ((NULL != buffer) && (size > 0UL))
{
- uint32_t halfFifoSize = (Cy_SCB_GetFifoSize(base) / 2UL);
+ uint32_t irqRxLevel = SelectRxFifoLevel(base);
context->rxRingBuf = buffer;
context->rxRingBufSize = size;
@@ -466,13 +469,32 @@ void Cy_SCB_UART_StartRingBuffer(CySCB_Type *base, void *buffer, uint32_t size,
context->rxRingBufTail = 0UL;
/* Set up an RX interrupt to handle the ring buffer */
- Cy_SCB_SetRxFifoLevel(base, (size >= halfFifoSize) ? (halfFifoSize - 1UL) : (size - 1UL));
+ Cy_SCB_SetRxFifoLevel(base, (size >= irqRxLevel) ? (irqRxLevel - 1UL) : (size - 1UL));
Cy_SCB_SetRxInterruptMask(base, CY_SCB_RX_INTR_LEVEL);
}
}
+/*******************************************************************************
+* Function Name: SelectRxFifoLevel
+****************************************************************************//**
+* Select RX FIFO level as RTS level if it is valid (>0) or half of RX FIFO size
+* in other case.
+*
+* \return
+* The RX FIFO level.
+*
+*******************************************************************************/
+static uint32_t SelectRxFifoLevel(CySCB_Type const *base)
+{
+ uint32_t halfFifoSize = Cy_SCB_GetFifoSize(base) / 2UL;
+ uint32_t rtsFifoLevel = Cy_SCB_UART_GetRtsFifoLevel(base);
+
+ return ((rtsFifoLevel != 0UL ) ? (rtsFifoLevel) : (halfFifoSize));
+}
+
+
/*******************************************************************************
* Function Name: Cy_SCB_UART_StopRingBuffer
****************************************************************************//**
@@ -615,7 +637,9 @@ void Cy_SCB_UART_ClearRingBuffer(CySCB_Type const *base, cy_stc_scb_uart_context
cy_en_scb_uart_status_t Cy_SCB_UART_Receive(CySCB_Type *base, void *buffer, uint32_t size, cy_stc_scb_uart_context_t *context)
{
CY_ASSERT_L1(NULL != context);
+ #if !defined(NDEBUG)
CY_ASSERT_L1(CY_SCB_UART_INIT_KEY == context->initKey);
+ #endif
CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
cy_en_scb_uart_status_t retStatus = CY_SCB_UART_RECEIVE_BUSY;
@@ -705,7 +729,7 @@ cy_en_scb_uart_status_t Cy_SCB_UART_Receive(CySCB_Type *base, void *buffer, uint
/* Set up a direct RX FIFO receive */
if (size > 0UL)
{
- uint32_t halfFifoSize = Cy_SCB_GetFifoSize(base) / 2UL;
+ uint32_t irqRxLevel = SelectRxFifoLevel(base);
/* Set up context */
context->rxStatus = CY_SCB_UART_RECEIVE_ACTIVE;
@@ -715,7 +739,7 @@ cy_en_scb_uart_status_t Cy_SCB_UART_Receive(CySCB_Type *base, void *buffer, uint
context->rxBufIdx = numToCopy;
/* Set the RX FIFO level to the trigger interrupt */
- Cy_SCB_SetRxFifoLevel(base, (size > halfFifoSize) ? (halfFifoSize - 1UL) : (size - 1UL));
+ Cy_SCB_SetRxFifoLevel(base, (size > irqRxLevel) ? (irqRxLevel - 1UL) : (size - 1UL));
/* Enable the RX interrupt sources to continue data reading */
Cy_SCB_SetRxInterruptMask(base, CY_SCB_UART_RX_INTR);
@@ -873,7 +897,9 @@ uint32_t Cy_SCB_UART_GetReceiveStatus(CySCB_Type const *base, cy_stc_scb_uart_co
cy_en_scb_uart_status_t Cy_SCB_UART_Transmit(CySCB_Type *base, void *buffer, uint32_t size, cy_stc_scb_uart_context_t *context)
{
CY_ASSERT_L1(NULL != context);
+ #if !defined(NDEBUG)
CY_ASSERT_L1(CY_SCB_UART_INIT_KEY == context->initKey);
+ #endif
CY_ASSERT_L1(CY_SCB_IS_BUFFER_VALID(buffer, size));
cy_en_scb_uart_status_t retStatus = CY_SCB_UART_TRANSMIT_BUSY;
@@ -1218,7 +1244,7 @@ void Cy_SCB_UART_Interrupt(CySCB_Type *base, cy_stc_scb_uart_context_t *context)
static void HandleDataReceive(CySCB_Type *base, cy_stc_scb_uart_context_t *context)
{
uint32_t numCopied;
- uint32_t halfFifoSize = Cy_SCB_GetFifoSize(base) / 2UL;
+ uint32_t irqRxLevel = SelectRxFifoLevel(base);
/* Get data from RX FIFO */
numCopied = Cy_SCB_UART_GetArray(base, context->rxBuf, context->rxBufSize);
@@ -1232,8 +1258,8 @@ static void HandleDataReceive(CySCB_Type *base, cy_stc_scb_uart_context_t *conte
if (NULL != context->rxRingBuf)
{
/* Adjust the level to proceed with the ring buffer */
- Cy_SCB_SetRxFifoLevel(base, (context->rxRingBufSize >= halfFifoSize) ?
- (halfFifoSize - 1UL) : (context->rxRingBufSize - 1UL));
+ Cy_SCB_SetRxFifoLevel(base, (context->rxRingBufSize >= irqRxLevel) ?
+ (irqRxLevel - 1UL) : (context->rxRingBufSize - 1UL));
Cy_SCB_SetRxInterruptMask(base, CY_SCB_RX_INTR_LEVEL);
}
@@ -1258,7 +1284,7 @@ static void HandleDataReceive(CySCB_Type *base, cy_stc_scb_uart_context_t *conte
buf = &buf[(Cy_SCB_IsRxDataWidthByte(base) ? (numCopied) : (2UL * numCopied))];
context->rxBuf = (void *) buf;
- if (context->rxBufSize < halfFifoSize)
+ if (context->rxBufSize < irqRxLevel)
{
/* Set the RX FIFO level to trigger an interrupt */
Cy_SCB_SetRxFifoLevel(base, (context->rxBufSize - 1UL));
@@ -1285,7 +1311,7 @@ static void HandleDataReceive(CySCB_Type *base, cy_stc_scb_uart_context_t *conte
*******************************************************************************/
static void HandleRingBuffer(CySCB_Type *base, cy_stc_scb_uart_context_t *context)
{
- uint32_t halfFifoSize = Cy_SCB_GetFifoSize(base) / 2UL;
+ uint32_t irqRxLevel = SelectRxFifoLevel(base);
uint32_t numToCopy = Cy_SCB_GetNumInRxFifo(base);
uint32_t locHead = context->rxRingBufHead;
uint32_t rxData;
@@ -1342,7 +1368,7 @@ static void HandleRingBuffer(CySCB_Type *base, cy_stc_scb_uart_context_t *contex
/* Get free entries in the ring buffer */
numToCopy = context->rxRingBufSize - Cy_SCB_UART_GetNumInRingBuffer(base, context);
- if (numToCopy < halfFifoSize)
+ if (numToCopy < irqRxLevel)
{
/* Adjust the level to copy to the ring buffer */
uint32_t level = (numToCopy > 0UL) ? (numToCopy - 1UL) : 0UL;
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_seglcd.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_seglcd.c
index a236b0e4d9..0e9ef763f7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_seglcd.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_seglcd.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_seglcd.c
-* \version 1.0
+* \version 1.0.1
*
* \brief
* Provides an API implementation of the SegLCD driver
@@ -95,15 +95,15 @@
#define CY_SEGLCD_IS_LSCLK_VALID(lsClk) ((CY_SEGLCD_LSCLK_LF == (lsClk)) || \
(CY_SEGLCD_LSCLK_MF == (lsClk)))
-#define CY_SEGLCD_FR_RATE_MIN (30)
-#define CY_SEGLCD_FR_RATE_MAX (150)
+#define CY_SEGLCD_FR_RATE_MIN (30U)
+#define CY_SEGLCD_FR_RATE_MAX (150U)
#define CY_SEGLCD_IS_RATE_VALID(frRate) (((frRate) >= CY_SEGLCD_FR_RATE_MIN) && ((frRate) <= CY_SEGLCD_FR_RATE_MAX))
#define CY_SEGLCD_CNTR_MAX (100UL)
#define CY_SEGLCD_IS_CNTR_VALID(contrast) (((uint32_t)(contrast)) <= CY_SEGLCD_CNTR_MAX)
-#define CY_SEGLCD_FREQ_MIN (10000)
-#define CY_SEGLCD_FREQ_MAX (100000000)
+#define CY_SEGLCD_FREQ_MIN (10000UL)
+#define CY_SEGLCD_FREQ_MAX (100000000UL)
#define CY_SEGLCD_IS_FREQ_VALID(freq) (((freq) >= CY_SEGLCD_FREQ_MIN) && ((freq) <= CY_SEGLCD_FREQ_MAX))
#define CY_SEGLCD_SPACE(disp) (((disp)->font->ascii) ? ' ' : CY_SEGLCD_NUM_BLANK)
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
index 2c50865cf5..30cad1e32a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif.c
-* \version 1.40
+* \version 1.40.1
*
* \brief
* This file provides the source code for the SMIF driver APIs.
@@ -281,7 +281,7 @@ void Cy_SMIF_SetDataSelect(SMIF_Type *base, cy_en_smif_slave_select_t slaveSelec
* \param slaveSelect
* Denotes the number of the slave device to which the transfer is made.
* (0, 1, 2 or 4 - the bit defines which slave to enable) Two-bit enable is
-* possible only for the Double Quad SPI mode.
+* possible only for the double quad SPI mode.
*
* \param completeTxfr
* Specifies if the slave select line must be de-asserted after transferring
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
index 557bbc5e6c..114c5e5d93 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_smif_memslot.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_smif_memslot.c
-* \version 1.40
+* \version 1.40.1
*
* \brief
* This file provides the source code for the memory-level APIs of the SMIF driver.
@@ -306,7 +306,6 @@ cy_en_smif_status_t Cy_SMIF_MemInit(SMIF_Type *base,
CY_ASSERT_L3(CY_SMIF_SLAVE_SEL_VALID(memCfg->slaveSelect));
CY_ASSERT_L3(CY_SMIF_DATA_SEL_VALID(memCfg->dataSelect));
CY_ASSERT_L1(NULL != memCfg->deviceCfg);
- CY_ASSERT_L2(MEM_ADDR_SIZE_VALID(memCfg->deviceCfg->numOfAddrBytes));
device = Cy_SMIF_GetDeviceBySlot(base, memCfg->slaveSelect);
if (NULL != device)
@@ -329,6 +328,8 @@ cy_en_smif_status_t Cy_SMIF_MemInit(SMIF_Type *base,
sfdpRes |= ((uint32_t)CY_SMIF_SFDP_FAIL << idx);
}
}
+ /* Check the size of the smif memory slot address */
+ CY_ASSERT_L2(MEM_ADDR_SIZE_VALID(memCfg->deviceCfg->numOfAddrBytes));
if (((uint32_t)CY_SMIF_SUCCESS == sfdpRet) &&
(0U != (memCfg->flags & CY_SMIF_FLAG_MEMORY_MAPPED)))
@@ -634,7 +635,7 @@ bool Cy_SMIF_MemIsBusy(SMIF_Type *base, cy_stc_smif_mem_config_t const *memDevic
****************************************************************************//**
*
* This function enables the memory device for the quad mode of operation.
-* This command must be executed before sending Quad SPI commands to the
+* This command must be executed before sending quad SPI commands to the
* memory device.
*
* \note In the dual quad mode, this API is called for each memory.
@@ -1182,7 +1183,7 @@ cy_en_smif_status_t Cy_SMIF_MemCmdRead(SMIF_Type *base,
* \param slaveSelect
* Denotes the number of the slave device to which the transfer is made.
* (0, 1, 2 or 4 - the bit defines which slave to enable). The two-bit enable
-* is possible only for the Double Quad SPI mode.
+* is possible only for the double quad SPI mode.
*
* \param size
* The size of data to be received. Must be > 0 and not greater than 65536.
@@ -2579,7 +2580,7 @@ cy_en_smif_status_t Cy_SMIF_MemSfdpDetect(SMIF_Type *base,
/* Page Program Time */
device->programTime = SfdpGetPageProgramTime(sfdpBuffer);
- /* The Read command for 3-byte addressing. The preference order Quad>Dual>SPI */
+ /* The Read command for 3-byte addressing. The preference order quad > dual > single SPI */
cy_stc_smif_mem_cmd_t *cmdRead = device->readCmd;
cy_en_smif_protocol_mode_t pMode = SfdpGetReadCmdParams(sfdpBuffer, dataSelect, cmdRead);
@@ -2715,7 +2716,7 @@ cy_en_smif_status_t Cy_SMIF_MemIsReady(SMIF_Type *base, cy_stc_smif_mem_config_t
* The memory device configuration.
*
* \param isQuadEnabled
-* This parameter is updated to indicate whether Quad mode is enabled (true) or
+* This parameter is updated to indicate whether quad mode is enabled (true) or
* not (false). The value is valid only when the function returns
* CY_SMIF_SUCCESS.
*
@@ -2743,7 +2744,7 @@ cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_co
*isQuadEnabled = false;
if(CY_SMIF_SUCCESS == status)
{
- /* Check whether Quad mode is already enabled or not */
+ /* Check whether quad mode is already enabled or not */
*isQuadEnabled = (maskQE == (readStatus & maskQE));
}
@@ -2756,7 +2757,7 @@ cy_en_smif_status_t Cy_SMIF_MemIsQuadEnabled(SMIF_Type *base, cy_stc_smif_mem_co
****************************************************************************//**
*
* Sets the QE (QUAD Enable) bit in the external memory
-* configuration register to enable Quad SPI mode.
+* configuration register to enable quad SPI mode.
* This is a blocking function, it will block the execution flow until
* the command transmission is completed.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
index 6d49d85fc7..73688148e5 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_sysclk.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_sysclk.c
-* \version 1.40.2
+* \version 1.50
*
* Provides an API implementation of the sysclk driver.
*
@@ -1789,10 +1789,6 @@ cy_en_syspm_status_t Cy_SysClk_DeepSleepCallback(cy_stc_syspm_callback_params_t
/* ========================= clkHf[n] SECTION ========================= */
/* ========================================================================== */
-/** \cond INTERNAL */
-uint32_t altHfFreq = 0UL; /* Internal storage for BLE ECO frequency user setting */
-/** \endcond */
-
/**
* \addtogroup group_sysclk_clk_hf_funcs
* \{
@@ -1844,9 +1840,11 @@ uint32_t Cy_SysClk_ClkHfGetFrequency(uint32_t clkHf)
freq = (CY_SYSCLK_ECOSTAT_STABLE == Cy_SysClk_EcoGetStatus()) ? ecoFreq : 0UL;
break;
+ #if defined(CY_IP_MXBLESS)
case CY_SYSCLK_CLKPATH_IN_ALTHF:
- freq = altHfFreq;
+ freq = cy_BleEcoClockFreqHz;
break;
+ #endif /* CY_IP_MXBLESS */
case CY_SYSCLK_CLKPATH_IN_ILO:
freq = (0UL != (SRSS_CLK_ILO_CONFIG & SRSS_CLK_ILO_CONFIG_ENABLE_Msk)) ? CY_SYSCLK_ILO_FREQ : 0UL;
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
index fbbab869c0..f2a231fd48 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syslib.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syslib.c
-* \version 2.40.1
+* \version 2.50
*
* Description:
* Provides system API implementation for the SysLib driver.
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
index 7b1244edfe..828d53fcfc 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_syspm.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_syspm.c
-* \version 4.40
+* \version 4.50
*
* This driver provides the source code for API power management.
*
@@ -31,7 +31,7 @@
/*******************************************************************************
* Internal Functions
*******************************************************************************/
-static bool EnterDeepSleepRam(cy_en_syspm_waitfor_t waitFor);
+static void EnterDeepSleepRam(cy_en_syspm_waitfor_t waitFor);
static void SetReadMarginTrimUlp(void);
static void SetReadMarginTrimLp(void);
@@ -62,17 +62,20 @@ static bool IsVoltageChangePossible(void);
/* Mask for both slow and fast mask clock dividers */
#define SYSPM_CLK_DIV_MASK (SYSPM_FAST_CLK_DIV_Msk | SYSPM_SLOW_CLK_DIV_Msk)
-
- #if (CY_CPU_CORTEX_M4)
- #define CUR_CORE_DP_MASK (0x01UL)
- #define OTHER_CORE_DP_MASK (0x02UL)
- #else
- #define CUR_CORE_DP_MASK (0x02UL)
- #define OTHER_CORE_DP_MASK (0x01UL)
- #endif
-
#endif /* #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE */
+
+#if (CY_CPU_CORTEX_M4)
+ #define CUR_CORE_DP_MASK (0x01UL << 28u)
+ #define OTHER_CORE_DP_MASK (0x02UL << 28u)
+#else
+ #define CUR_CORE_DP_MASK (0x02UL << 28u)
+ #define OTHER_CORE_DP_MASK (0x01UL << 28u)
+#endif
+
+#define SYSPM_IPC_STRUCT_ADDR_MASK (0x0FFFFFFFUL)
+#define SYSPM_IPC_STRUCT_UDB_DP_MASK (0x04UL << 28u)
+
/* The define for the current active bus master */
#if (CY_CPU_CORTEX_M0P)
#define ACTIVE_BUS_MASTER CPUSS_MS_ID_CM0
@@ -278,9 +281,6 @@ static cy_stc_syspm_callback_t* pmCallbackRoot[CALLBACK_ROOT_NR] = {NULL, NULL,
/* The array of the pointers to failed callback */
static cy_stc_syspm_callback_t* failedCallback[CALLBACK_ROOT_NR] = {NULL, NULL, NULL, NULL, NULL};
-/* Structure for registers that should retain while Deep Sleep mode */
-static cy_stc_syspm_backup_regs_t bkpRegs;
-
#if (CY_CPU_CORTEX_M4)
/* Global boolean variable used to clear the Event Register of the CM4 core */
static bool wasEventSent = false;
@@ -635,32 +635,12 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterSleep(cy_en_syspm_waitfor_t waitFor)
* Selects wait for action. See \ref cy_en_syspm_waitfor_t.
*
* \sideeffect
-* This side effect is applicable only for devices with a UDBs.
-* You can obtain unpredictable behavior of the UDB block after the device wakeup
-* from system Deep Sleep.
-* Unpredictable behavior scenario:
-* * The first CPU saves non-retained UDB configuration registers and goes into
-* the CPU Deep Sleep (Cy_SysPm_CpuEnterDeepSleep() function).
-* * These non-retained UDB configuration registers are modified in runtime by
-* another (second) active CPU.
-* * The second CPU saves non-retained UDB configuration registers and goes into
-* the CPU Deep Sleep (Cy_SysPm_CpuEnterDeepSleep() function).
-* These conditions save different values of the non-retained UDB configuration
-* registers. On the first CPU wakeup (system wakeup from Deep Sleep), these
-* registers are restored by the values saved on the first CPU. After the
-* second CPU wakeup, these registers are "reconfigured" by the values saved on
-* the second CPU.
-* Be aware of this situation.
-*
-* \sideeffect
* For CY8C6xx6, CY8C6xx7 devices this function clears the Event Register of the
* CM4 CPU after wakeup from WFE.
*
* \sideeffect
-* This side effect is applicable only for rev-08 of the CY8CKIT-062.
-* This function changes the slow and fast clock dividers to
-* SYSPM_CLK_DIVIDER right before entering into system Deep Sleep and restores
-* these dividers after wakeup.
+* This function changes the slow and fast clock dividers right before
+* entering into system Deep Sleep and restores these dividers after wakeup.
*
* \return
* Entered status, see \ref cy_en_syspm_status_t.
@@ -683,12 +663,18 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterSleep(cy_en_syspm_waitfor_t waitFor)
*******************************************************************************/
cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor)
{
+ /* Structure for registers that should retain while Deep Sleep mode */
+ static cy_stc_syspm_backup_regs_t bkpRegs;
+
uint32_t interruptState;
uint32_t cbDeepSleepRootIdx = (uint32_t) CY_SYSPM_DEEPSLEEP;
+ uint32_t ddftStructData = 0UL;
+ uint8_t deviceRev;
cy_en_syspm_status_t retVal = CY_SYSPM_SUCCESS;
CY_ASSERT_L3(CY_SYSPM_IS_WAIT_FOR_VALID(waitFor));
+ deviceRev = Cy_SysLib_GetDeviceRevision();
/* Call the registered callback functions with the CY_SYSPM_CHECK_READY
* parameter
*/
@@ -703,9 +689,6 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor)
*/
if (retVal == CY_SYSPM_SUCCESS)
{
- /* System Deep Sleep indicator */
- bool wasSystemDeepSleep = false;
-
/* Call the registered callback functions with the
* CY_SYSPM_BEFORE_TRANSITION parameter
*/
@@ -715,27 +698,67 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor)
(void) Cy_SysPm_ExecuteCallback(CY_SYSPM_DEEPSLEEP, CY_SYSPM_BEFORE_TRANSITION);
}
- if (0U != cy_device->udbPresent)
+ /* Preparation for the System Deep Sleep mode */
+
+ /* Acquire the IPC to prevent changing of the shared resources at the same time */
+ while (0U == _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, REG_IPC_STRUCT_ACQUIRE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT))))
{
- /* Check whether the UDB disabled on MMIO level */
- if (0UL != (PERI_GR_SL_CTL(MMIO_UDB_SLAVE_NR) & PERI_UDB_SLAVE_ENABLED))
- {
- /* Save non-retained registers */
- Cy_SysPm_SaveRegisters(&bkpRegs);
- }
+ /* Wait until the IPC structure is released by another CPU */
}
+ ddftStructData = REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT));
+
+ if (0U != (ddftStructData & OTHER_CORE_DP_MASK))
+ {
+ ddftStructData &= ~SYSPM_IPC_STRUCT_ADDR_MASK;
+
+ Cy_SysPm_SaveRegisters(&bkpRegs);
+
+ #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE
+ if (deviceRev == CY_SYSLIB_DEVICE_REV_0A)
+ {
+ /* Increase the clock divider for the slow and fast clocks to SYSPM_CLK_DIVIDER */
+ CPUSS_CM0_CLOCK_CTL =
+ _CLR_SET_FLD32U(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, SYSPM_CLK_DIVIDER);
+
+ CPUSS_CM4_CLOCK_CTL =
+ _CLR_SET_FLD32U(CPUSS_CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, SYSPM_CLK_DIVIDER);
+ }
+ else
+ #endif /* #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE */
+ {
+ /* Set the clock divider equal to 2 for the slow and fast clocks */
+ CPUSS_CM0_CLOCK_CTL =
+ _CLR_SET_FLD32U(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, 1);
+
+ CPUSS_CM4_CLOCK_CTL =
+ _CLR_SET_FLD32U(CPUSS_CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, 1);
+ }
+
+ ddftStructData |= (uint32_t) &bkpRegs;
+ }
+
+ ddftStructData |= CUR_CORE_DP_MASK;
+
+ /* Update pointer to the latest saved structure */
+ REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = ddftStructData;
+
+ /* Release the IPC */
+ REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0U;
+
+ /* Read the release value to make sure it is set */
+ (void) REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT));
+
/* Different device families and revisions have a different Deep Sleep entries */
if (Cy_SysLib_GetDevice() == CY_SYSLIB_DEVICE_PSOC6ABLE2)
{
/* The CPU enters Deep Sleep and wakes up in the RAM */
- wasSystemDeepSleep = EnterDeepSleepRam(waitFor);
+ EnterDeepSleepRam(waitFor);
}
else
{
#if (CY_CPU_CORTEX_M0P)
-
/* Check if there is a pending syscall */
if (Cy_IPC_Drv_IsLockAcquired(Cy_IPC_Drv_GetIpcBaseAddress(CY_IPC_CHAN_SYSCALL)) != false)
{
@@ -744,7 +767,6 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor)
}
else
#endif /* (CY_CPU_CORTEX_M0P) */
-
{
#if (CY_CPU_CORTEX_M4)
/* Repeat the WFI/WFE instruction if a wake up was not intended.
@@ -772,31 +794,31 @@ cy_en_syspm_status_t Cy_SysPm_CpuEnterDeepSleep(cy_en_syspm_waitfor_t waitFor)
}
}
- if (0U != cy_device->udbPresent)
+ /* Acquire the IPC to prevent changing of the shared resources at the same time */
+ while (0U == _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, REG_IPC_STRUCT_ACQUIRE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT))))
{
- /* Do not restore the UDBs if there was no system Deep Sleep mode or
- * UDBs are disabled on MMIO level
- */
- if (wasSystemDeepSleep && (0UL != (PERI_GR_SL_CTL(MMIO_UDB_SLAVE_NR) & PERI_UDB_SLAVE_ENABLED)))
- {
- cy_stc_syspm_backup_regs_t *ptrRegs;
-
- #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE
- if (Cy_SysLib_GetDeviceRevision() == CY_SYSLIB_DEVICE_REV_0A)
- {
- ptrRegs = &bkpRegs;
- }
- else
- #endif /* #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE */
- {
- ptrRegs = (cy_stc_syspm_backup_regs_t *) REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT));
- }
-
- /* Restore non-retained registers */
- Cy_SysPm_RestoreRegisters(ptrRegs);
- }
+ /* Wait until the IPC structure is released by another CPU */
}
+ ddftStructData = REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT));
+
+ if (0U != (ddftStructData & OTHER_CORE_DP_MASK))
+ {
+ cy_stc_syspm_backup_regs_t *ptrRegs;
+
+ ptrRegs = (cy_stc_syspm_backup_regs_t *) (SYSPM_IPC_STRUCT_ADDR_MASK & ddftStructData);
+
+ /* Restore saved registers */
+ Cy_SysPm_RestoreRegisters(ptrRegs);
+ }
+ ddftStructData &= ~CUR_CORE_DP_MASK;
+
+ /* Update pointer to the latest saved structure */
+ REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = ddftStructData;
+
+ /* Release the IPC */
+ REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0U;
+
Cy_SysLib_ExitCriticalSection(interruptState);
}
@@ -2591,7 +2613,7 @@ cy_en_syspm_status_t Cy_SysPm_ExecuteCallback(cy_en_syspm_callback_type_t type,
*/
if(retVal == CY_SYSPM_FAIL)
{
- failedCallback[(uint32_t) type] = lastExecutedCallback;
+ failedCallback[(uint32_t) type] = lastExecutedCallback;
}
else
{
@@ -2813,16 +2835,12 @@ cy_en_syspm_status_t Cy_SysPm_WriteVoltageBitForFlash(cy_en_syspm_flash_voltage_
* Function Name: Cy_SysPm_SaveRegisters
****************************************************************************//**
*
-* Saves non-retained UDB registers before system entering system Deep Sleep.
+* Saves non-retained UDB registers and the slow and fast clock dividers before
+* system entering system Deep Sleep.
* Must be called if programmable logic or function are implemented in the UDB
* array.
-*
-* \warning
-* Only one CPU on dual CPU devices should call this function. If both CPUs call
-* this function the UDB state restored may be inconsistent with the expected
-* state when restored.
*
-* Cypress ID #280370.
+* Cypress ID #280370, #1451.
*
* \param regs
* The structure where the registers are saved.
@@ -2836,15 +2854,21 @@ void Cy_SysPm_SaveRegisters(cy_stc_syspm_backup_regs_t *regs)
CY_ASSERT_L1(NULL != regs);
/* Save the registers before Deep Sleep */
- regs->CY_SYSPM_UDB_UDBIF_BANK_CTL_REG = UDB_UDBIF_BANK_CTL;
+ regs->CY_SYSPM_CM0_CLOCK_CTL_REG = CPUSS_CM0_CLOCK_CTL;
+ regs->CY_SYSPM_CM4_CLOCK_CTL_REG = CPUSS_CM4_CLOCK_CTL;
- regs->CY_SYSPM_UDB_BCTL_MDCLK_EN_REG = UDB_BCTL_MDCLK_EN;
- regs->CY_SYSPM_UDB_BCTL_MBCLK_EN_REG = UDB_BCTL_MBCLK_EN;
- regs->CY_SYSPM_UDB_BCTL_BOTSEL_L_REG = UDB_BCTL_BOTSEL_L;
- regs->CY_SYSPM_UDB_BCTL_BOTSEL_U_REG = UDB_BCTL_BOTSEL_U;
- regs->CY_SYSPM_UDB_BCTL_QCLK_EN0_REG = UDB_BCTL_QCLK_EN_0;
- regs->CY_SYSPM_UDB_BCTL_QCLK_EN1_REG = UDB_BCTL_QCLK_EN_1;
- regs->CY_SYSPM_UDB_BCTL_QCLK_EN2_REG = UDB_BCTL_QCLK_EN_2;
+ if ((0U != cy_device->udbPresent) && (0UL != (PERI_GR_SL_CTL(MMIO_UDB_SLAVE_NR) & PERI_UDB_SLAVE_ENABLED)))
+ {
+ regs->CY_SYSPM_UDB_UDBIF_BANK_CTL_REG = UDB_UDBIF_BANK_CTL;
+
+ regs->CY_SYSPM_UDB_BCTL_MDCLK_EN_REG = UDB_BCTL_MDCLK_EN;
+ regs->CY_SYSPM_UDB_BCTL_MBCLK_EN_REG = UDB_BCTL_MBCLK_EN;
+ regs->CY_SYSPM_UDB_BCTL_BOTSEL_L_REG = UDB_BCTL_BOTSEL_L;
+ regs->CY_SYSPM_UDB_BCTL_BOTSEL_U_REG = UDB_BCTL_BOTSEL_U;
+ regs->CY_SYSPM_UDB_BCTL_QCLK_EN0_REG = UDB_BCTL_QCLK_EN_0;
+ regs->CY_SYSPM_UDB_BCTL_QCLK_EN1_REG = UDB_BCTL_QCLK_EN_1;
+ regs->CY_SYSPM_UDB_BCTL_QCLK_EN2_REG = UDB_BCTL_QCLK_EN_2;
+ }
}
@@ -2852,20 +2876,16 @@ void Cy_SysPm_SaveRegisters(cy_stc_syspm_backup_regs_t *regs)
* Function Name: Cy_SysPm_RestoreRegisters
****************************************************************************//**
*
-* Restores non-retained UDB registers before system entering system Deep Sleep.
+* Restores non-retained UDB registers and the slow and fast clock dividers
+* before system entering system Deep Sleep.
* Must be called if programmable logic or function are implemented in the UDB
* array.
*
-* \warning
-* Only one CPU on dual CPU devices should call this function. If both CPUs call
-* this function the UDB state restored may be inconsistent with the expected
-* state when restored.
-*
-* Cypress ID #280370.
+* Cypress ID #280370, #1451.
*
* \param regs
* The structure with data stored (using Cy_SysPm_SaveRegisters()) into the
-* required non-retained registers after Deep Sleep.
+* required registers after Deep Sleep.
*
* \funcusage
* \snippet syspm/snippet/main.c snippet_Cy_SysPm_SaveRestoreRegisters
@@ -2876,15 +2896,21 @@ void Cy_SysPm_RestoreRegisters(cy_stc_syspm_backup_regs_t const *regs)
CY_ASSERT_L1(NULL != regs);
/* Restore the registers after Deep Sleep */
- UDB_BCTL_MDCLK_EN = regs->CY_SYSPM_UDB_BCTL_MDCLK_EN_REG;
- UDB_BCTL_MBCLK_EN = regs->CY_SYSPM_UDB_BCTL_MBCLK_EN_REG;
- UDB_BCTL_BOTSEL_L = regs->CY_SYSPM_UDB_BCTL_BOTSEL_L_REG;
- UDB_BCTL_BOTSEL_U = regs->CY_SYSPM_UDB_BCTL_BOTSEL_U_REG;
- UDB_BCTL_QCLK_EN_0 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN0_REG;
- UDB_BCTL_QCLK_EN_1 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN1_REG;
- UDB_BCTL_QCLK_EN_2 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN2_REG;
+ CPUSS_CM0_CLOCK_CTL = regs->CY_SYSPM_CM0_CLOCK_CTL_REG;
+ CPUSS_CM4_CLOCK_CTL = regs->CY_SYSPM_CM4_CLOCK_CTL_REG;
- UDB_UDBIF_BANK_CTL = regs->CY_SYSPM_UDB_UDBIF_BANK_CTL_REG;
+ if ((0U != cy_device->udbPresent) && (0UL != (PERI_GR_SL_CTL(MMIO_UDB_SLAVE_NR) & PERI_UDB_SLAVE_ENABLED)))
+ {
+ UDB_BCTL_MDCLK_EN = regs->CY_SYSPM_UDB_BCTL_MDCLK_EN_REG;
+ UDB_BCTL_MBCLK_EN = regs->CY_SYSPM_UDB_BCTL_MBCLK_EN_REG;
+ UDB_BCTL_BOTSEL_L = regs->CY_SYSPM_UDB_BCTL_BOTSEL_L_REG;
+ UDB_BCTL_BOTSEL_U = regs->CY_SYSPM_UDB_BCTL_BOTSEL_U_REG;
+ UDB_BCTL_QCLK_EN_0 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN0_REG;
+ UDB_BCTL_QCLK_EN_1 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN1_REG;
+ UDB_BCTL_QCLK_EN_2 = regs->CY_SYSPM_UDB_BCTL_QCLK_EN2_REG;
+
+ UDB_UDBIF_BANK_CTL = regs->CY_SYSPM_UDB_UDBIF_BANK_CTL_REG;
+ }
}
@@ -2909,64 +2935,11 @@ void Cy_SysPm_RestoreRegisters(cy_stc_syspm_backup_regs_t const *regs)
#else
CY_SECTION(".cy_ramfunc") CY_NOINLINE
#endif
-static bool EnterDeepSleepRam(cy_en_syspm_waitfor_t waitFor)
+static void EnterDeepSleepRam(cy_en_syspm_waitfor_t waitFor)
{
- /* Store the address of the IPC7 acquire register into the RAM */
- volatile uint32_t *ipcAcquire = ((uint32_t *) (®_IPC_STRUCT_ACQUIRE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT))));
-
/* Store the address of the Deep Sleep indicator into the RAM */
volatile uint32_t *delayDoneFlag = &FLASHC_BIST_DATA_0;
-
- /* Indicator of System Deep Sleep mode */
- bool retVal = false;
- /* Acquire the IPC to prevent changing of the shared resources at the same time */
- while (0U == _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, REG_IPC_STRUCT_ACQUIRE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT))))
- {
- /* Wait until the IPC structure is released by another CPU */
- }
-
-#ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE
- if (Cy_SysLib_GetDeviceRevision() == CY_SYSLIB_DEVICE_REV_0A)
- {
- /* Set the flag that the current CPU entered Deep Sleep */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) |= CUR_CORE_DP_MASK;
-
- /* Change the slow and fast clock dividers only under the condition that
- * the other CPU is already in Deep Sleep. Cypress ID #284516
- */
- if (0U != (REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) & OTHER_CORE_DP_MASK))
- {
- /* Get the divider values of the slow and high clocks and store them into
- * the IPC data register
- */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) =
- (REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) & ((uint32_t) ~(SYSPM_CLK_DIV_MASK))) |
- (((uint32_t)(_FLD2VAL(CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, CPUSS_CM0_CLOCK_CTL) << SYSPM_SLOW_CLK_DIV_Pos)) |
- ((uint32_t)(_FLD2VAL(CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, CPUSS_CM4_CLOCK_CTL) << SYSPM_FAST_CLK_DIV_Pos)));
-
- /* Increase the clock divider for the slow and fast clocks to SYSPM_CLK_DIVIDER */
- CPUSS_CM0_CLOCK_CTL =
- _CLR_SET_FLD32U(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV, SYSPM_CLK_DIVIDER);
-
- CPUSS_CM4_CLOCK_CTL =
- _CLR_SET_FLD32U(CPUSS_CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, SYSPM_CLK_DIVIDER);
-
- /* Read the divider value to make sure it is set */
- (void) CPUSS_CM0_CLOCK_CTL;
- (void) CPUSS_CM4_CLOCK_CTL;
- }
- }
- else
-#endif /* #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE */
- {
- /* Update pointer to the latest saved UDB structure */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = (uint32_t) &bkpRegs;
- }
-
- /* Release the IPC */
- REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0U;
-
#if (CY_CPU_CORTEX_M4)
/* Store the address of the CM4 power status register */
@@ -3006,81 +2979,41 @@ static bool EnterDeepSleepRam(cy_en_syspm_waitfor_t waitFor)
} while (_FLD2VAL(CPUSS_CM4_PWR_CTL_PWR_MODE, (*cpussCm4PwrCtlAddr)) == CM4_PWR_STS_RETAINED);
#endif /* (CY_CPU_CORTEX_M4) */
- /* Acquire the IPC to prevent changing of the shared resources at the same time */
- while (0U == _FLD2VAL(IPC_STRUCT_ACQUIRE_SUCCESS, (*ipcAcquire)))
+ /* Set 10 uS delay only under condition that the FLASHC_BIST_DATA[0] is
+ * cleared. Cypress ID #288510
+ */
+ if (*delayDoneFlag == NEED_DELAY)
{
- /* Wait until the IPC structure is released by another CPU */
- }
+ uint32_t ddftSlowCtl;
+ uint32_t clkOutputSlow;
+ uint32_t ddftFastCtl;
-#ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE
- if (Cy_SysLib_GetDeviceRevision() == CY_SYSLIB_DEVICE_REV_0A)
- {
- /* Read and change the slow and fast clock dividers only under the condition
- * that the other CPU is already in Deep Sleep. Cypress ID #284516
- */
- if (0U != (REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) & OTHER_CORE_DP_MASK))
+ /* Save timer configuration */
+ ddftSlowCtl = SRSS_TST_DDFT_SLOW_CTL_REG;
+ clkOutputSlow = SRSS_CLK_OUTPUT_SLOW;
+ ddftFastCtl = SRSS_TST_DDFT_FAST_CTL_REG;
+
+ /* Configure the counter to be sourced by IMO */
+ SRSS_TST_DDFT_SLOW_CTL_REG = SRSS_TST_DDFT_SLOW_CTL_MASK;
+ SRSS_CLK_OUTPUT_SLOW = CLK_OUTPUT_SLOW_MASK;
+ SRSS_TST_DDFT_FAST_CTL_REG = TST_DDFT_FAST_CTL_MASK;
+
+ /* Load the down-counter to count the 10 us */
+ SRSS_CLK_CAL_CNT1 = IMO_10US_DELAY;
+
+ while (0U == (SRSS_CLK_CAL_CNT1 & SRSS_CLK_CAL_CNT1_CAL_COUNTER_DONE_Msk))
{
- /* Restore the clock dividers for the slow and fast clocks */
- CPUSS_CM0_CLOCK_CTL =
- _CLR_SET_FLD32U(CPUSS_CM0_CLOCK_CTL, CPUSS_CM0_CLOCK_CTL_SLOW_INT_DIV,
- (_FLD2VAL(SYSPM_SLOW_CLK_DIV, REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)))));
-
- CPUSS_CM4_CLOCK_CTL =
- _CLR_SET_FLD32U(CPUSS_CM4_CLOCK_CTL, CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV,
- (_FLD2VAL(SYSPM_FAST_CLK_DIV, REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)))));
-
- retVal = true;
+ /* Wait until the counter stops counting */
}
- /* Indicate that the current CPU is out of Deep Sleep */
- REG_IPC_STRUCT_DATA(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) &= ((uint32_t) ~CUR_CORE_DP_MASK);
+ /* Indicate that delay was done */
+ *delayDoneFlag = DELAY_DONE;
+
+ /* Restore timer configuration */
+ SRSS_TST_DDFT_SLOW_CTL_REG = ddftSlowCtl;
+ SRSS_CLK_OUTPUT_SLOW = clkOutputSlow;
+ SRSS_TST_DDFT_FAST_CTL_REG = ddftFastCtl;
}
- else
-#endif /* #ifndef CY_PSOC6ABLE2_REV_0A_SUPPORT_DISABLE */
- {
- /* Set 10 uS delay only under condition that the FLASHC_BIST_DATA[0] is
- * cleared. Cypress ID #288510
- */
- if (*delayDoneFlag == NEED_DELAY)
- {
- uint32_t ddftSlowCtl;
- uint32_t clkOutputSlow;
- uint32_t ddftFastCtl;
-
- /* Save timer configuration */
- ddftSlowCtl = SRSS_TST_DDFT_SLOW_CTL_REG;
- clkOutputSlow = SRSS_CLK_OUTPUT_SLOW;
- ddftFastCtl = SRSS_TST_DDFT_FAST_CTL_REG;
-
- /* Configure the counter to be sourced by IMO */
- SRSS_TST_DDFT_SLOW_CTL_REG = SRSS_TST_DDFT_SLOW_CTL_MASK;
- SRSS_CLK_OUTPUT_SLOW = CLK_OUTPUT_SLOW_MASK;
- SRSS_TST_DDFT_FAST_CTL_REG = TST_DDFT_FAST_CTL_MASK;
-
- /* Load the down-counter to count the 10 us */
- SRSS_CLK_CAL_CNT1 = IMO_10US_DELAY;
-
- while (0U == (SRSS_CLK_CAL_CNT1 & SRSS_CLK_CAL_CNT1_CAL_COUNTER_DONE_Msk))
- {
- /* Wait until the counter stops counting */
- }
-
- /* Indicate that delay was done */
- *delayDoneFlag = DELAY_DONE;
-
- /* Restore timer configuration */
- SRSS_TST_DDFT_SLOW_CTL_REG = ddftSlowCtl;
- SRSS_CLK_OUTPUT_SLOW = clkOutputSlow;
- SRSS_TST_DDFT_FAST_CTL_REG = ddftFastCtl;
-
- retVal = true;
- }
- }
-
- /* Release the IPC */
- REG_IPC_STRUCT_RELEASE(CY_IPC_STRUCT_PTR(CY_IPC_CHAN_DDFT)) = 0U;
-
- return retVal;
}
#if defined (__ICCARM__)
#pragma diag_default=Ta023
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_trigmux.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_trigmux.c
index 6956f61ef1..0070b4f86b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_trigmux.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_trigmux.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_trigmux.c
-* \version 1.20
+* \version 1.20.1
*
* \brief Trigger mux API.
*
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_wdt.c b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_wdt.c
index eca611f184..c8789b502e 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_wdt.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/drivers/source/cy_wdt.c
@@ -1,6 +1,6 @@
/***************************************************************************//**
* \file cy_wdt.c
-* \version 1.10.1
+* \version 1.20
*
* This file provides the source code to the API for the WDT driver.
*
@@ -23,7 +23,6 @@
*******************************************************************************/
#include "cy_wdt.h"
-#include "cy_syslib.h"
#if defined(__cplusplus)
extern "C" {
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
index e7c3c53417..b6af7770d7 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/connectivity_wifi-1.0.cypersonality
@@ -168,10 +168,24 @@
+
+
+
+
+
+
+
+
+
+
+
+
-
+
+
+
@@ -192,11 +206,13 @@
+
+
@@ -209,6 +225,7 @@
+
@@ -227,10 +244,23 @@
-
+
+
+
+
+
+
+
+
+
-
-
+
+
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/csd-2.0.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/csd-2.0.cypersonality
index cd5500b857..151f6207a9 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/csd-2.0.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/csd-2.0.cypersonality
@@ -253,10 +253,9 @@
-
+
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
index 16a02772f2..2b6285774e 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/peripheral/seglcd-1.1.cypersonality
@@ -163,11 +163,10 @@
-
+
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/power-1.2.cypersonality b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/power-1.2.cypersonality
index c167619c24..b2b1538c45 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/power-1.2.cypersonality
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/personalities/platform/power-1.2.cypersonality
@@ -199,14 +199,14 @@
-
- 43012
- The 43012 devices
-
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/base/view.xml
new file mode 100644
index 0000000000..04bf73b413
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/base/view.xml
@@ -0,0 +1,17 @@
+
+
+ 0x00000000
+ 0x000
+ 0
+ 0
+
+
+ Cypress
+ 0
+ 1310720
+ 106-WLBGA
+ 106
+ 3200
+ 4400
+ The CYW43012TC0EKUBG device.
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/info.xml
new file mode 100644
index 0000000000..fb6d339281
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/info.xml
@@ -0,0 +1,6 @@
+
+
+ CYW43012TC0EKUBG
+ The CYW43012TC0EKUBG devices
+ true
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/studio/presentation
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/presentation
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/view.xml
new file mode 100644
index 0000000000..96da71097e
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0EKUBG/studio/view.xml
@@ -0,0 +1,23 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/base/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/base/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/base/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/info.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/info.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/info.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/studio/presentation
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/presentation
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/view.xml
similarity index 94%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/view.xml
index 10d33fcedd..2efa5cdb8e 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012TC0KFFBH/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012TC0KFFBH/studio/view.xml
@@ -2,7 +2,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/base/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/base/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/base/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/info.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/info.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/info.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation
new file mode 100644
index 0000000000..3d4d778bec
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/presentation
@@ -0,0 +1,2 @@
+Connectivity
+43012
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/view.xml
similarity index 94%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/view.xml
index 08416896ec..2278e82177 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/CYW43012WKWBG/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/CYW43012WKWBG/studio/view.xml
@@ -2,7 +2,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/hobto/ipblocks.cydata
new file mode 100644
index 0000000000..2c1caa018d
Binary files /dev/null and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/hobto/ipblocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/hobto/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/hobto/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/hobto/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/hobto/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/info.xml
new file mode 100644
index 0000000000..3f66ab53bf
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/info.xml
@@ -0,0 +1,5 @@
+
+
+ 43012C0
+ The 43012C0 devices
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/studio/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43012C0/studio/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/hobto/ipblocks.cydata
deleted file mode 100644
index 4a1e4211a6..0000000000
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/hobto/ipblocks.cydata and /dev/null differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/info.xml
deleted file mode 100644
index a66973f979..0000000000
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/info.xml
+++ /dev/null
@@ -1,5 +0,0 @@
-
-
- 43438
- The 43438 devices
-
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/base/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/base/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/base/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/info.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/info.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/info.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/studio/presentation
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/presentation
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/view.xml
similarity index 94%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/view.xml
index c50aafc2e4..419a6baa1f 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/CYW43438KUBG/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW43438KUBG/studio/view.xml
@@ -2,7 +2,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/base/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/base/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/base/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/info.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/info.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/info.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/studio/presentation
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/presentation
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/view.xml
similarity index 94%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/view.xml
index 42d65f915c..5b39ddbf31 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKUBG/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKUBG/studio/view.xml
@@ -2,7 +2,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/base/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/base/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/base/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/info.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/info.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/info.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/studio/presentation
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/presentation
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/view.xml
similarity index 94%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/view.xml
index d144487462..28634da81e 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/CYW4343WKWBG/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/CYW4343WKWBG/studio/view.xml
@@ -2,7 +2,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/hobto/ipblocks.cydata
new file mode 100644
index 0000000000..2e7a7aae9f
Binary files /dev/null and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/hobto/ipblocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/hobto/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/hobto/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/hobto/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/hobto/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/info.xml
new file mode 100644
index 0000000000..431144418a
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/info.xml
@@ -0,0 +1,5 @@
+
+
+ 4343A1
+ The 4343A1 devices
+
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/studio/view.xml
similarity index 100%
rename from targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/43438/studio/view.xml
rename to targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343A1/studio/view.xml
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/ipblocks.cydata
deleted file mode 100644
index dc13b6a85d..0000000000
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/ipblocks.cydata and /dev/null differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/view.xml
deleted file mode 100644
index db77a062a0..0000000000
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/hobto/view.xml
+++ /dev/null
@@ -1,4 +0,0 @@
-
-
-
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/info.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/info.xml
deleted file mode 100644
index 30e55dcf8f..0000000000
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/info.xml
+++ /dev/null
@@ -1,5 +0,0 @@
-
-
- 4343W
- The 4343W devices
-
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/studio/view.xml
deleted file mode 100644
index cdc66e3e2d..0000000000
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/4343W/studio/view.xml
+++ /dev/null
@@ -1 +0,0 @@
-
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_bt_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_bt_v1.cydata
index bb290d891c..05e979dc3b 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_bt_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_bt_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_coex_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_coex_v1.cydata
index 05cf58d18f..d4b5493220 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_coex_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_coex_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_wifi_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_wifi_v1.cydata
index 20b3f5c92f..ca0c3174f9 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_wifi_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/Connectivity/studio/connectivity/43xxx_wifi_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
index 1940a0f73d..9b8bed892c 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/CYB0644ABZI-S2D44/studio/view.xml
@@ -51,7 +51,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/amuxbus.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/amuxbus.cydata
index c2b08046cd..33a4626e2e 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/amuxbus.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/amuxbus.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/clocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/clocks.cydata
index 3849b150f1..6fef4a102c 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/clocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/clocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/dsi.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/dsi.cydata
index d5a7718bb7..45a803f5ac 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/dsi.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/dsi.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/interrupts.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/interrupts.cydata
index 51ed1205a4..dbb568ab49 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/interrupts.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/interrupts.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/ipblocks.cydata
index 5e07849abc..56153d13b9 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/ipblocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/ipblocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/pins.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/pins.cydata
index b2cea47d4e..b634ecf5d7 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/pins.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/pins.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/triggers.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/triggers.cydata
index 1f066fe399..39587c2b8f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/triggers.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/hobto/triggers.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/analogResourceMap.txt b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/analogResourceMap.txt
index d1a40d2c71..f937d2628b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/analogResourceMap.txt
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/analogResourceMap.txt
@@ -10,4 +10,3 @@ CTDAC 0 pass[0].ctdac[0]
TEMP 0 pass[0].sarmux[0].tempsensor[0]
SARADC 0 pass[0].sar[0]
VSSA 0 pass[0].vssa[0]
-VBGR 0 pass[0].vbgr[0]
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
index 3be4aa455a..44caf60459 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cysem
@@ -1,5 +1,5 @@
-
+
@@ -294,7 +294,7 @@
1
- Precision ILO: An additional source that can provide a much more accurate 32.768kHz clock than ILO when periodically calibrated using a high-accuracy clock such as the ECO. This clock is stopped in the hibernate power mode.
+ Internal Low Speed Oscillator: This is a low accuracy fixed-frequency clock in the kilohertz range that is available in sleep, deep sleep and hibernate power modes.
@@ -1965,18 +1965,18 @@ SYS_TICK
-
-
-
-
+
+
-
-
-
-
+
+
+
+
+
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cyvis b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cyvis
index f8f1ca2f9b..e82e6b2241 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cyvis
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/clocks.cyvis
@@ -1,5 +1,5 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/product_links.list b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/product_links.list
new file mode 100644
index 0000000000..85380788b6
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A2M/studio/product_links.list
@@ -0,0 +1 @@
+[PSoC 6 Product Selector](https://www.cypress.com/search/psg/114026#/?_facetShow=ss_pmain_core,ss_psecondary_core,fs_pmax_operating_frequency_mhz_,fs_pflash_kb_,fs_psram_kb_,fs_pno_of_gpios,fs_pble_maximum_data_rate_mbps_,fs_pble_power_output_dbm_,fs_pble_rx_sensitivity_dbm_,fs_pble_supported_frequency_band_ghz_,ss_pdedicated_adc___max_resolution_sample_rate_,ss_pcapsense,ss_pfs_usb,ss_pdedicated_dac___max_resolution_sample_rate_,fs_pno_of_dedicated_opamps,fs_pno_of_dedicated_comparators,fs_pno_of_dedicated_timer_counter_pwm_blocks,fs_pno_of_serial_communication_blocks_i2c_uart_spi_,fs_psmart_i_o,fs_pno)
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/base/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/base/view.xml
index 667ceb310d..470bd60bf3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/base/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/base/view.xml
@@ -6,7 +6,7 @@
1
CortexM0p,CortexM4
Cypress
- 524288
+ 458752
262144
68-QFN
68
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/view.xml
index 3a4e2ece26..a98b8cbe96 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/CYB06445LQI-S3D42/studio/view.xml
@@ -8,7 +8,7 @@
-
+
@@ -52,7 +52,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/amuxbus.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/amuxbus.cydata
index 972a771b98..3b69203063 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/amuxbus.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/amuxbus.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/clocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/clocks.cydata
index a1a093ff36..9011821bbd 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/clocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/clocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/dsi.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/dsi.cydata
index d5a7718bb7..45a803f5ac 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/dsi.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/dsi.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/interrupts.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/interrupts.cydata
index 51f5a9499c..f8167e914e 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/interrupts.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/interrupts.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/ipblocks.cydata
index 78c36fc677..4c8faf06d7 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/ipblocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/ipblocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/pins.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/pins.cydata
index 14a03b1ea7..3aefb18aec 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/pins.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/pins.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/triggers.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/triggers.cydata
index 1a10892550..61b2bd79e9 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/triggers.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/hobto/triggers.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
index 9392613647..f160ae144a 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cysem
@@ -1,5 +1,5 @@
-
+
@@ -259,7 +259,7 @@
1
- Precision ILO: An additional source that can provide a much more accurate 32.768kHz clock than ILO when periodically calibrated using a high-accuracy clock such as the ECO. This clock is stopped in the hibernate power mode.
+ Internal Low Speed Oscillator: This is a low accuracy fixed-frequency clock in the kilohertz range that is available in sleep, deep sleep and hibernate power modes.
@@ -1200,8 +1200,8 @@ SYS_TICK
-
+
@@ -1807,16 +1807,16 @@ SYS_TICK
-
-
-
+
+
+
+
+
-
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cyvis b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cyvis
index f82f0025e1..f89b6bcede 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cyvis
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/clocks.cyvis
@@ -1,5 +1,5 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/product_links.list b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/product_links.list
new file mode 100644
index 0000000000..85380788b6
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6A512K/studio/product_links.list
@@ -0,0 +1 @@
+[PSoC 6 Product Selector](https://www.cypress.com/search/psg/114026#/?_facetShow=ss_pmain_core,ss_psecondary_core,fs_pmax_operating_frequency_mhz_,fs_pflash_kb_,fs_psram_kb_,fs_pno_of_gpios,fs_pble_maximum_data_rate_mbps_,fs_pble_power_output_dbm_,fs_pble_rx_sensitivity_dbm_,fs_pble_supported_frequency_band_ghz_,ss_pdedicated_adc___max_resolution_sample_rate_,ss_pcapsense,ss_pfs_usb,ss_pdedicated_dac___max_resolution_sample_rate_,fs_pno_of_dedicated_opamps,fs_pno_of_dedicated_comparators,fs_pno_of_dedicated_timer_counter_pwm_blocks,fs_pno_of_serial_communication_blocks_i2c_uart_spi_,fs_psmart_i_o,fs_pno)
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
index d3b5d7b9fa..6a8bdde3e3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/presentation
@@ -1,2 +1,2 @@
PSoC 6
-PSoC 63
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/view.xml
index 21d084ff40..7311e0738b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD53/studio/view.xml
@@ -5,7 +5,7 @@
-
+
@@ -48,7 +48,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
index d3b5d7b9fa..6a8bdde3e3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/presentation
@@ -1,2 +1,2 @@
PSoC 6
-PSoC 63
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/view.xml
index 4b289cf509..240cfaccc4 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-BLD54/studio/view.xml
@@ -5,7 +5,7 @@
-
+
@@ -48,7 +48,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
index 2d84ef27e9..6a8bdde3e3 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/presentation
@@ -1,2 +1,2 @@
PSoC 6
-PSoC 62
+PSoC 64
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/view.xml
index f0451972da..97073c5517 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/view.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/CYB06447BZI-D54/studio/view.xml
@@ -5,7 +5,7 @@
-
+
@@ -48,7 +48,7 @@
-
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/amuxbus.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/amuxbus.cydata
index d7b8d51031..300f62f4b6 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/amuxbus.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/amuxbus.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/clocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/clocks.cydata
index 149b4663f9..05aabc1eaa 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/clocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/clocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/dsi.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/dsi.cydata
index 7a8fab992c..ddec98a5dd 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/dsi.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/dsi.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/interrupts.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/interrupts.cydata
index a0d21bfc66..6f768e2339 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/interrupts.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/interrupts.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/ipblocks.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/ipblocks.cydata
index 059dc04d00..f44949c92d 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/ipblocks.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/ipblocks.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/pins.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/pins.cydata
index d9d8457191..a847dbcc9f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/pins.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/pins.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/triggers.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/triggers.cydata
index 2e47f64a85..6c68ff3b1c 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/triggers.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/hobto/triggers.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cysem b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cysem
index 42cec63d46..955b34d57e 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cysem
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cysem
@@ -1,5 +1,5 @@
-
+
@@ -4716,7 +4716,7 @@
false
- VBGR
+ AREF
0
@@ -4725,7 +4725,7 @@
AREF_VBGR
- VBGR
+ VREF
@@ -8445,7 +8445,7 @@
-
+
@@ -8616,6 +8616,9 @@
+
+
+
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cyvis b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cyvis
index dd7ebea2a3..f458f89825 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cyvis
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analog.cyvis
@@ -1,5 +1,5 @@
-
+
@@ -663,6 +663,12 @@
w:PASS0_SARADC0_SAR
+
+
+ pass0_sar_vminus0
+
+
+
@@ -839,7 +845,7 @@
- VBGR
+ VREF
`=$RefName`
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analogResourceMap.txt b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analogResourceMap.txt
index 5a7c2f8b7e..260b5c5461 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analogResourceMap.txt
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/analogResourceMap.txt
@@ -10,4 +10,4 @@ CTDAC 0 pass[0].ctdac[0]
TEMP 0 pass[0].sarmux[0].tempsensor[0]
SARADC 0 pass[0].sar[0]
VSSA 0 pass[0].vssa[0]
-VBGR 0 pass[0].aref[0]
+AREF 0 pass[0].aref[0]
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/modules/module_43-SMT.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/modules/module_43-SMT.cydata
index ca27bc7ddd..76da58935d 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/modules/module_43-SMT.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/modules/module_43-SMT.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/product_links.list b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/product_links.list
new file mode 100644
index 0000000000..85380788b6
--- /dev/null
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/PSoC6ABLE2/studio/product_links.list
@@ -0,0 +1 @@
+[PSoC 6 Product Selector](https://www.cypress.com/search/psg/114026#/?_facetShow=ss_pmain_core,ss_psecondary_core,fs_pmax_operating_frequency_mhz_,fs_pflash_kb_,fs_psram_kb_,fs_pno_of_gpios,fs_pble_maximum_data_rate_mbps_,fs_pble_power_output_dbm_,fs_pble_rx_sensitivity_dbm_,fs_pble_supported_frequency_band_ghz_,ss_pdedicated_adc___max_resolution_sample_rate_,ss_pcapsense,ss_pfs_usb,ss_pdedicated_dac___max_resolution_sample_rate_,fs_pno_of_dedicated_opamps,fs_pno_of_dedicated_comparators,fs_pno_of_dedicated_timer_counter_pwm_blocks,fs_pno_of_serial_communication_blocks_i2c_uart_spi_,fs_psmart_i_o,fs_pno)
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/hobto/view.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/hobto/view.xml
deleted file mode 100644
index cdc66e3e2d..0000000000
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/hobto/view.xml
+++ /dev/null
@@ -1 +0,0 @@
-
\ No newline at end of file
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw0.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw0.cydata
index 51d97af74e..424bce2a1f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw0.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw0.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw1.cydata
index a820a30f69..4950e13467 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1-dw1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1.cydata
index 56e0d87fc7..59a8cac8a2 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dmac.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dmac.cydata
index 9fed152461..064ca19454 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dmac.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dmac.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw0.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw0.cydata
index 8351b31aa4..bb86fb30e4 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw0.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw0.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw1.cydata
index ab7d5dbaef..b55f3ff9ef 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1-dw1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1.cydata
index da9447e2c9..4f3ba596d2 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/m4cpuss_ver2_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxaudioss_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxaudioss_v1.cydata
index bb405a2775..adfb8f2fd8 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxaudioss_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxaudioss_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxbless_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxbless_v1.cydata
index e542aabd3e..b287b424a9 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxbless_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxbless_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcan_s40s_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcan_s40s_v1.cydata
index 3c806973ff..8c5cb5a43b 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcan_s40s_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcan_s40s_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcsdv2_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcsdv2_v1.cydata
index d191fa106f..7669111ba1 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcsdv2_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxcsdv2_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxefuse_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxefuse_v1.cydata
index 24968ac70f..05388c1439 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxefuse_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxefuse_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_v1.cydata
index fede36b62d..9fec2a817d 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_ver2_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_ver2_v1.cydata
index 83da1259b4..b836b65bbd 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_ver2_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlcd_ver2_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlpcomp_s40.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlpcomp_s40.cydata
index 3e4e10c111..8a7c5233fa 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlpcomp_s40.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxlpcomp_s40.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_v1.cydata
index 64dfe0006e..6a3efbb71b 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_ver2_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_ver2_v1.cydata
index 480fe8bcce..01edd9397d 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_ver2_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxperi_ver2_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata
index 7559ecc900..6b0476263f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxprofile_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1-port.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1-port.cydata
index c720b9ef0c..8580fb4f65 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1-port.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1-port.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1.cydata
index fa54cc0cd5..b22258da16 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2-port.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2-port.cydata
index 21a33bb364..faa72176da 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2-port.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2-port.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2.cydata
index 9ef6d1f207..f65d19a3fe 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40ioss_v2.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-ctbm.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-ctbm.cydata
index c7afe436d4..c804d9b89f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-ctbm.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-ctbm.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sar.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sar.cydata
index b86a304f9d..6a635d0884 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sar.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sar.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sarmux.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sarmux.cydata
index 853e4dec49..76f4594dfb 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sarmux.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1-sarmux.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1.cydata
index c3cfd95be3..e2a82dead1 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40pass_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata
new file mode 100644
index 0000000000..a9be78bedb
Binary files /dev/null and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-power.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-sysclk.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-sysclk.cydata
index f5c04a160d..0a35109c77 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-sysclk.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1-sysclk.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata
index 7da156f271..4c796d89b3 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxs40srss_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxscb_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxscb_v1.cydata
index e294cb15cd..d3b2b15b21 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxscb_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxscb_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata
index 5d475fb7e2..06b597a9e2 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsdhc_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsmif_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsmif_v1.cydata
index a5d96d7314..612d3c2754 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsmif_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxsmif_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata
index fdb56445bd..25d4895ca6 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxtcpwm_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxttcanfd_s40s_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxttcanfd_s40s_v1.cydata
index eb43d1eda8..03480a4b4f 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxttcanfd_s40s_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxttcanfd_s40s_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxudb_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxudb_v1.cydata
index 6c167c0ce2..42ac92a43e 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxudb_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxudb_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxusbfs_v1.cydata b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxusbfs_v1.cydata
index a2f0f02b6d..cb451c3f3c 100644
Binary files a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxusbfs_v1.cydata and b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/connectivity/mxusbfs_v1.cydata differ
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
index 1763c9f4ae..dc60a1a3ed 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/devices/MXS40/studio/features.mk
@@ -14,11 +14,18 @@ CY_DEVICES_WITH_DIE_PSOC6ABLE2=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 C
CY_DEVICES_WITH_DIE_PSOC6A2M=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
CY_DEVICES_WITH_DIE_PSOC6A512K=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
-CY_DEVICES_WITH_FLASH_KB_512=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
+CY_DEVICES_WITH_FLASH_KB_512=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
CY_DEVICES_WITH_FLASH_KB_1024=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CY8C6347LQI-BLD52 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
CY_DEVICES_WITH_FLASH_KB_832=CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54
CY_DEVICES_WITH_FLASH_KB_2048=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
CY_DEVICES_WITH_FLASH_KB_1856=CYB0644ABZI-S2D44
+CY_DEVICES_WITH_FLASH_KB_448=CYB06445LQI-S3D42
+
+CY_DEVICES_WITH_SRAM_KB_128=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42
+CY_DEVICES_WITH_SRAM_KB_288=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_SRAM_KB_1024=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
+CY_DEVICES_WITH_SRAM_KB_512=CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_SRAM_KB_256=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
CY_DEVICES_WITH_MAX_SPEED_MHZ_150=CY8C6036BZI-F04 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72
CY_DEVICES_WITH_MAX_SPEED_MHZ_50=CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6117BZI-F34 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6117FDI-F02 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6117WI-F34
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
index dee60c3d86..c7973f6737 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.dat
@@ -1 +1 @@
-1.1.2.62
+1.1.3.51
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
index 5298029c68..b1f03ef760 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/udd/version.xml
@@ -1 +1 @@
-1.1.2.62
+1.1.3.51
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
index 7fa78eaf8e..909bd30c58 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/psoc6pdl/version.xml
@@ -1 +1 @@
-1.3.1.1499
+1.4.0.1889
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