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Fix - Remove unwanted changes to the legacy nrf51822 target (caused by rebase). ad applied them to 

to regular targets.
Fix a typo and polish nordic's code.
pull/2943/head
Andrzej Puzdrowski 2016-10-10 11:01:56 +02:00
parent 2ea0c8a57c
commit 8302ce0625
18 changed files with 341 additions and 787 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_NRF5/source/btle/btle.cpp
View File

@ -120,7 +120,7 @@ error_t btle_init(void)
{
nrf_clock_lf_cfg_t clockConfiguration;
// register softdevice hanlder vector
// register softdevice handler vector
NVIC_SetVector(SD_EVT_IRQn, (uint32_t) SD_EVT_IRQHandler);
// Configure the LF clock according to values provided by btle_clock.h.

93
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/startup_nRF51822.S
View File

@ -45,28 +45,28 @@ __Vectors DCD __initial_sp ; Top of Stack
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -92,7 +92,6 @@ Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
@ -100,8 +99,6 @@ Reset_Handler PROC
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
@ -134,52 +131,52 @@ Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_COMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
TIMER0_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
TIMER1_IRQHandler
TIMER2_IRQHandler
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_COMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
SWI4_IRQHandler
SWI5_IRQHandler

96
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/startup_nRF51822.S
View File

@ -45,28 +45,28 @@ __Vectors DCD __initial_sp ; Top of Stack
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_COMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_IRQHandler ;LPCOMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -93,7 +93,9 @@ Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
ORRS R2, R2, R1
@ -106,8 +108,6 @@ Reset_Handler PROC
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
@ -140,52 +140,52 @@ Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_COMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
TIMER0_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
TIMER1_IRQHandler
TIMER2_IRQHandler
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_COMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
SWI4_IRQHandler
SWI5_IRQHandler

7
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_GCC_ARM/TARGET_MCU_NRF51_16K_S110/NRF51822.ld
View File

@ -114,13 +114,6 @@ SECTIONS
} > RAM
.noinit :
{
PROVIDE(__start_noinit = .);
KEEP(*(.noinit))
PROVIDE(__stop_noinit = .);
} > RAM
.bss :
{
. = ALIGN(4);

87
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/startup_NRF51822_IAR.S
View File

@ -20,7 +20,6 @@
EXTERN __iar_program_start
EXTERN SystemInit
EXTERN nrf_reloc_vector_table
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
@ -50,28 +49,28 @@ __vector_table
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_COMP_IRQHandler_v ;LPCOMP_COMP
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -101,8 +100,6 @@ Reset_Handler
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__iar_program_start
BX R0
@ -143,37 +140,37 @@ POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler_v
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler_v
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler_v
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler_v
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler_v
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler_v
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler_v
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler_v
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler_v
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler_v
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler_v
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler_v
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler_v
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler_v
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
@ -195,37 +192,37 @@ ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler_v
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler_v
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler_v
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler_v
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler_v
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler_v
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler_v
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler_v
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler_v
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler_v
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler_v
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler_v
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler_v
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler_v
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)

87
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/startup_NRF51822_IAR.S
View File

@ -20,7 +20,6 @@
EXTERN __iar_program_start
EXTERN SystemInit
EXTERN nrf_reloc_vector_table
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
@ -50,28 +49,28 @@ __vector_table
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_COMP_IRQHandler_v ;LPCOMP_COMP
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -101,8 +100,6 @@ Reset_Handler
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__iar_program_start
BX R0
@ -143,37 +140,37 @@ POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler_v
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler_v
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler_v
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler_v
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler_v
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler_v
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler_v
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler_v
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler_v
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler_v
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler_v
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler_v
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler_v
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler_v
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
@ -195,37 +192,37 @@ ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler_v
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler_v
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler_v
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler_v
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler_v
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler_v
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler_v
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler_v
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler_v
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler_v
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler_v
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler_v
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler_v
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler_v
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)

54
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/cmsis_nvic.c
View File

@ -52,14 +52,52 @@
*/
extern uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS];
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
/*
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
uint32_t i;
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{
nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
uint32_t NVIC_GetVector(IRQn_Type IRQn)
{
return nrf_dispatch_vector[IRQn + NVIC_USER_IRQ_OFFSET];
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + 16] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + 16];
}*/
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
// int i;
// Space for dynamic vectors, initialised to allocate in R/W
static volatile uint32_t* vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
/*
// Copy and switch to dynamic vectors if first time called
if((LPC_SYSCON->SYSMEMREMAP & 0x3) != 0x1) {
uint32_t *old_vectors = (uint32_t *)0; // FLASH vectors are at 0x0
for(i = 0; i < NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
LPC_SYSCON->SYSMEMREMAP = 0x1; // Remaps 0x0-0x1FF FLASH block to RAM block
}*/
// Set the vector
vectors[IRQn + 16] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
// We can always read vectors at 0x0, as the addresses are remapped
uint32_t *vectors = (uint32_t*)0;
// Return the vector
return vectors[IRQn + 16];
}

2
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/analogin_api.c
View File

@ -39,7 +39,7 @@ static const PinMap PinMap_ADC[] = {
{NC, NC, 0}
};
void ADC_IRQHandler(void); // export IRQ handler form nrf_drv_adc.c
void ADC_IRQHandler(void); // export IRQ handler from nrf_drv_adc.c
void analogin_init(analogin_t *obj, PinName pin)
{

93
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/startup_nRF51822.S
View File

@ -45,28 +45,28 @@ __Vectors DCD __initial_sp ; Top of Stack
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -92,6 +92,7 @@ Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
@ -99,6 +100,8 @@ Reset_Handler PROC
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
@ -131,52 +134,52 @@ Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_COMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
TIMER0_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_COMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
SWI4_IRQHandler
SWI5_IRQHandler

93
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/startup_nRF51822.S
View File

@ -45,28 +45,28 @@ __Vectors DCD __initial_sp ; Top of Stack
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD UART0_IRQHandler_v ;UART0
DCD SPI0_TWI0_IRQHandler_v ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler_v ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD GPIOTE_IRQHandler_v ;GPIOTE
DCD ADC_IRQHandler_v ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD TIMER1_IRQHandler_v ;TIMER1
DCD TIMER2_IRQHandler_v ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_IRQHandler ;LPCOMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler_v ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
DCD SWI3_IRQHandler_v ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
@ -93,6 +93,7 @@ Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT SystemInit
IMPORT __main
IMPORT nrf_reloc_vector_table
MOVS R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
@ -108,6 +109,8 @@ Reset_Handler PROC
LDR R0, =SystemInit
BLX R0
LDR R0, =nrf_reloc_vector_table
BLX R0
LDR R0, =__main
BX R0
ENDP
@ -140,52 +143,52 @@ Default_Handler PROC
EXPORT POWER_CLOCK_IRQHandler [WEAK]
EXPORT RADIO_IRQHandler [WEAK]
EXPORT UART0_IRQHandler [WEAK]
EXPORT SPI0_TWI0_IRQHandler [WEAK]
EXPORT SPI1_TWI1_IRQHandler [WEAK]
EXPORT GPIOTE_IRQHandler [WEAK]
EXPORT ADC_IRQHandler [WEAK]
EXPORT UART0_IRQHandler_v [WEAK]
EXPORT SPI0_TWI0_IRQHandler_v [WEAK]
EXPORT SPI1_TWI1_IRQHandler_v [WEAK]
EXPORT GPIOTE_IRQHandler_v [WEAK]
EXPORT ADC_IRQHandler_v [WEAK]
EXPORT TIMER0_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler [WEAK]
EXPORT TIMER2_IRQHandler [WEAK]
EXPORT TIMER1_IRQHandler_v [WEAK]
EXPORT TIMER2_IRQHandler_v [WEAK]
EXPORT RTC0_IRQHandler [WEAK]
EXPORT TEMP_IRQHandler [WEAK]
EXPORT RNG_IRQHandler [WEAK]
EXPORT ECB_IRQHandler [WEAK]
EXPORT CCM_AAR_IRQHandler [WEAK]
EXPORT WDT_IRQHandler [WEAK]
EXPORT RTC1_IRQHandler [WEAK]
EXPORT QDEC_IRQHandler [WEAK]
EXPORT LPCOMP_IRQHandler [WEAK]
EXPORT SWI0_IRQHandler [WEAK]
EXPORT SWI1_IRQHandler [WEAK]
EXPORT SWI2_IRQHandler [WEAK]
EXPORT SWI3_IRQHandler [WEAK]
EXPORT WDT_IRQHandler_v [WEAK]
EXPORT RTC1_IRQHandler_v [WEAK]
EXPORT QDEC_IRQHandler_v [WEAK]
EXPORT LPCOMP_IRQHandler_v [WEAK]
EXPORT SWI0_IRQHandler_v [WEAK]
EXPORT SWI1_IRQHandler_v [WEAK]
EXPORT SWI2_IRQHandler_v [WEAK]
EXPORT SWI3_IRQHandler_v [WEAK]
EXPORT SWI4_IRQHandler [WEAK]
EXPORT SWI5_IRQHandler [WEAK]
POWER_CLOCK_IRQHandler
RADIO_IRQHandler
UART0_IRQHandler
SPI0_TWI0_IRQHandler
SPI1_TWI1_IRQHandler
GPIOTE_IRQHandler
ADC_IRQHandler
UART0_IRQHandler_v
SPI0_TWI0_IRQHandler_v
SPI1_TWI1_IRQHandler_v
GPIOTE_IRQHandler_v
ADC_IRQHandler_v
TIMER0_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
TIMER1_IRQHandler_v
TIMER2_IRQHandler_v
RTC0_IRQHandler
TEMP_IRQHandler
RNG_IRQHandler
ECB_IRQHandler
CCM_AAR_IRQHandler
WDT_IRQHandler
RTC1_IRQHandler
QDEC_IRQHandler
LPCOMP_IRQHandler
SWI0_IRQHandler
SWI1_IRQHandler
SWI2_IRQHandler
SWI3_IRQHandler
WDT_IRQHandler_v
RTC1_IRQHandler_v
QDEC_IRQHandler_v
LPCOMP_IRQHandler_v
SWI0_IRQHandler_v
SWI1_IRQHandler_v
SWI2_IRQHandler_v
SWI3_IRQHandler_v
SWI4_IRQHandler
SWI5_IRQHandler

237
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/startup_NRF51822_IAR.S
View File

@ -1,237 +0,0 @@
;; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
;; The information contained herein is confidential property of Nordic
;; Semiconductor ASA.Terms and conditions of usage are described in detail
;; in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
;; Licensees are granted free, non-transferable use of the information. NO
;; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
;; the file.
;; Description message
MODULE ?cstartup
;; Stack size default : 1024
;; Heap size default : 2048
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD 0
DCD 0
DCD 0
;__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD 0
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
; Default handlers.
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
; Dummy exception handlers
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B .
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B .
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B .
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B .
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B .
; Dummy interrupt handlers
PUBWEAK POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
POWER_CLOCK_IRQHandler
B .
PUBWEAK RADIO_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC0_IRQHandler
B .
PUBWEAK TEMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TEMP_IRQHandler
B .
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RNG_IRQHandler
B .
PUBWEAK ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ECB_IRQHandler
B .
PUBWEAK CCM_AAR_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI4_IRQHandler
B .
PUBWEAK SWI5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI5_IRQHandler
B .
END

237
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/startup_NRF51822_IAR.S
View File

@ -1,237 +0,0 @@
;; Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
;; The information contained herein is confidential property of Nordic
;; Semiconductor ASA.Terms and conditions of usage are described in detail
;; in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
;; Licensees are granted free, non-transferable use of the information. NO
;; WARRANTY of ANY KIND is provided. This heading must NOT be removed from
;; the file.
;; Description message
MODULE ?cstartup
;; Stack size default : 1024
;; Heap size default : 2048
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
EXTERN SystemInit
PUBLIC __vector_table
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD 0
DCD 0
DCD 0
;__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD 0
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD POWER_CLOCK_IRQHandler ;POWER_CLOCK
DCD RADIO_IRQHandler ;RADIO
DCD UART0_IRQHandler ;UART0
DCD SPI0_TWI0_IRQHandler ;SPI0_TWI0
DCD SPI1_TWI1_IRQHandler ;SPI1_TWI1
DCD 0 ;Reserved
DCD GPIOTE_IRQHandler ;GPIOTE
DCD ADC_IRQHandler ;ADC
DCD TIMER0_IRQHandler ;TIMER0
DCD TIMER1_IRQHandler ;TIMER1
DCD TIMER2_IRQHandler ;TIMER2
DCD RTC0_IRQHandler ;RTC0
DCD TEMP_IRQHandler ;TEMP
DCD RNG_IRQHandler ;RNG
DCD ECB_IRQHandler ;ECB
DCD CCM_AAR_IRQHandler ;CCM_AAR
DCD WDT_IRQHandler ;WDT
DCD RTC1_IRQHandler ;RTC1
DCD QDEC_IRQHandler ;QDEC
DCD LPCOMP_COMP_IRQHandler ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler ;SWI1
DCD SWI2_IRQHandler ;SWI2
DCD SWI3_IRQHandler ;SWI3
DCD SWI4_IRQHandler ;SWI4
DCD SWI5_IRQHandler ;SWI5
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
DCD 0 ;Reserved
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
NRF_POWER_RAMON_ADDRESS EQU 0x40000524 ; NRF_POWER->RAMON address
NRF_POWER_RAMON_RAMxON_ONMODE_Msk EQU 0xF ; All RAM blocks on in onmode bit mask
; Default handlers.
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER:NOROOT(2)
Reset_Handler
LDR R0, =NRF_POWER_RAMON_ADDRESS
LDR R2, [R0]
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
ORRS R2, R2, R1
STR R2, [R0]
LDR R0, =SystemInit
BLX R0
LDR R0, =__iar_program_start
BX R0
; Dummy exception handlers
PUBWEAK NMI_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
NMI_Handler
B .
PUBWEAK HardFault_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
HardFault_Handler
B .
PUBWEAK SVC_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SVC_Handler
B .
PUBWEAK PendSV_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
PendSV_Handler
B .
PUBWEAK SysTick_Handler
SECTION .text:CODE:REORDER:NOROOT(1)
SysTick_Handler
B .
; Dummy interrupt handlers
PUBWEAK POWER_CLOCK_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
POWER_CLOCK_IRQHandler
B .
PUBWEAK RADIO_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RADIO_IRQHandler
B .
PUBWEAK UART0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
UART0_IRQHandler
B .
PUBWEAK SPI0_TWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI0_TWI0_IRQHandler
B .
PUBWEAK SPI1_TWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SPI1_TWI1_IRQHandler
B .
PUBWEAK GPIOTE_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
GPIOTE_IRQHandler
B .
PUBWEAK ADC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ADC_IRQHandler
B .
PUBWEAK TIMER0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER0_IRQHandler
B .
PUBWEAK TIMER1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER1_IRQHandler
B .
PUBWEAK TIMER2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TIMER2_IRQHandler
B .
PUBWEAK RTC0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC0_IRQHandler
B .
PUBWEAK TEMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
TEMP_IRQHandler
B .
PUBWEAK RNG_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RNG_IRQHandler
B .
PUBWEAK ECB_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
ECB_IRQHandler
B .
PUBWEAK CCM_AAR_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
CCM_AAR_IRQHandler
B .
PUBWEAK WDT_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
WDT_IRQHandler
B .
PUBWEAK RTC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
RTC1_IRQHandler
B .
PUBWEAK QDEC_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler
B .
PUBWEAK LPCOMP_COMP_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI0_IRQHandler
B .
PUBWEAK SWI1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI1_IRQHandler
B .
PUBWEAK SWI2_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI2_IRQHandler
B .
PUBWEAK SWI3_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI3_IRQHandler
B .
PUBWEAK SWI4_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI4_IRQHandler
B .
PUBWEAK SWI5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
SWI5_IRQHandler
B .
END

6
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/startup_NRF51822_IAR.S
View File

@ -67,7 +67,7 @@ __vector_table
DCD WDT_IRQHandler_v ;WDT
DCD RTC1_IRQHandler_v ;RTC1
DCD QDEC_IRQHandler_v ;QDEC
DCD LPCOMP_COMP_IRQHandler_v ;LPCOMP_COMP
DCD LPCOMP_IRQHandler_v ;LPCOMP_COMP
DCD SWI0_IRQHandler ;SWI0
DCD SWI1_IRQHandler_v ;SWI1
DCD SWI2_IRQHandler_v ;SWI2
@ -201,9 +201,9 @@ RTC1_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
QDEC_IRQHandler_v
B .
PUBWEAK LPCOMP_COMP_IRQHandler_v
PUBWEAK LPCOMP_IRQHandler_v
SECTION .text:CODE:REORDER:NOROOT(1)
LPCOMP_COMP_IRQHandler_v
LPCOMP_IRQHandler_v
B .
PUBWEAK SWI0_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)

2
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/pwmout_api.c
View File

@ -100,7 +100,7 @@ void GPIOTE_IRQHandler(void);// exported from nrf_drv_gpiote.c
void TIMER1_IRQHandler(void);
void TIMER2_IRQHandler(void);
static peripheral_hanlder_desc_t timer_handlers[] =
static const peripheral_handler_desc_t timer_handlers[] =
{
{
TIMER1_IRQn,

2
targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/pwmout_api.c
View File

@ -112,7 +112,7 @@ void PWM0_IRQHandler(void);
void PWM1_IRQHandler(void);
void PWM2_IRQHandler(void);
static peripheral_hanlder_desc_t pwm_handlers[PWM_INSTANCE_COUNT] =
static const peripheral_handler_desc_t pwm_handlers[PWM_INSTANCE_COUNT] =
{
{
PWM0_IRQn,

2
targets/TARGET_NORDIC/TARGET_NRF5/i2c_api.c
View File

@ -110,7 +110,7 @@ static uint8_t twi_address(int i2c_address)
void SPI0_TWI0_IRQHandler(void);
void SPI1_TWI1_IRQHandler(void);
static peripheral_hanlder_desc_t twi_handlers[TWI_COUNT] =
static const peripheral_handler_desc_t twi_handlers[TWI_COUNT] =
{
#if TWI0_ENABLED
{

2
targets/TARGET_NORDIC/TARGET_NRF5/irq_handlers_hw.h
View File

@ -49,7 +49,7 @@ typedef struct
{
IRQn_Type IRQn;
uint32_t vector;
} peripheral_hanlder_desc_t;
} peripheral_handler_desc_t;
#endif // IRQ_HANDLERS_HW_H__

26
targets/TARGET_NORDIC/TARGET_NRF5/spi_api.c
View File

@ -90,47 +90,47 @@ void SPI0_TWI0_IRQHandler(void);
void SPI1_TWI1_IRQHandler(void);
void SPIM2_SPIS2_SPI2_IRQHandler(void);
static peripheral_hanlder_desc_t spi_hanlder_desc[SPI_COUNT] = {
#if SPI0_ENABLED
static const peripheral_handler_desc_t spi_hanlder_desc[SPI_COUNT] = {
#if SPI0_ENABLED
{
SPIS0_IRQ,
(uint32_t) SPI0_TWI0_IRQHandler
},
#endif
#if SPI1_ENABLED
#endif
#if SPI1_ENABLED
{
SPIS1_IRQ,
(uint32_t) SPI1_TWI1_IRQHandler
},
#endif
#if SPI2_ENABLED
#endif
#if SPI2_ENABLED
{
SPIS2_IRQ,
(uint32_t) SPIM2_SPIS2_SPI2_IRQHandler
},
#endif
#endif
};
static sdk_driver_instances_t m_instances[SPI_COUNT] = {
#if SPI0_ENABLED
#if SPI0_ENABLED
{
NRF_DRV_SPI_INSTANCE(0),
NRF_DRV_SPIS_INSTANCE(0)
},
#endif
#if SPI1_ENABLED
#endif
#if SPI1_ENABLED
{
NRF_DRV_SPI_INSTANCE(1),
NRF_DRV_SPIS_INSTANCE(1)
},
#endif
#if SPI2_ENABLED
#endif
#if SPI2_ENABLED
{
NRF_DRV_SPI_INSTANCE(2),
NRF_DRV_SPIS_INSTANCE(2)
},
#endif
#endif
};
static void master_event_handler(uint8_t spi_idx,