mirror of https://github.com/ARMmbed/mbed-os.git
STM32 RTC : remove not necessary macro
__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIGpull/8085/head
parent
5c46bec4d4
commit
827c8bd486
|
@ -148,7 +148,6 @@ struct flash_s {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* STM32F0 HAL doesn't provide this API called in rtc_api.c */
|
/* STM32F0 HAL doesn't provide this API called in rtc_api.c */
|
||||||
#define __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
|
|
||||||
#define RTC_WKUP_IRQn RTC_IRQn
|
#define RTC_WKUP_IRQn RTC_IRQn
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -137,8 +137,4 @@ struct flash_s {
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* STM32F1 HAL doesn't provide this API called in rtc_api.c */
|
|
||||||
#define __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -145,8 +145,4 @@ struct flash_s {
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* STM32F3 HAL doesn't provide this API called in rtc_api.c */
|
|
||||||
#define __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -143,8 +143,4 @@ struct can_s {
|
||||||
};
|
};
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* STM32L4 HAL doesn't provide this API called in rtc_api.c */
|
|
||||||
#define __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -60,14 +60,12 @@ void rtc_init(void)
|
||||||
|
|
||||||
#if MBED_CONF_TARGET_LSE_AVAILABLE
|
#if MBED_CONF_TARGET_LSE_AVAILABLE
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||||
|
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
error("Cannot initialize RTC with LSE\n");
|
error("Cannot initialize RTC with LSE\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
|
|
||||||
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
|
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
|
||||||
|
|
||||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
||||||
|
@ -76,15 +74,13 @@ void rtc_init(void)
|
||||||
error("PeriphClkInitStruct RTC failed with LSE\n");
|
error("PeriphClkInitStruct RTC failed with LSE\n");
|
||||||
}
|
}
|
||||||
#else /* MBED_CONF_TARGET_LSE_AVAILABLE */
|
#else /* MBED_CONF_TARGET_LSE_AVAILABLE */
|
||||||
// Enable LSI clock
|
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||||
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
error("Cannot initialize RTC with LSI\n");
|
error("Cannot initialize RTC with LSI\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
|
|
||||||
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
|
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
|
||||||
|
|
||||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
||||||
|
@ -112,14 +108,14 @@ void rtc_init(void)
|
||||||
#endif /* TARGET_STM32F1 */
|
#endif /* TARGET_STM32F1 */
|
||||||
|
|
||||||
if (HAL_RTC_Init(&RtcHandle) != HAL_OK) {
|
if (HAL_RTC_Init(&RtcHandle) != HAL_OK) {
|
||||||
error("RTC initialization failed");
|
error("RTC initialization failed\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
#if !(TARGET_STM32F1) && !(TARGET_STM32F2)
|
#if !(TARGET_STM32F1) && !(TARGET_STM32F2)
|
||||||
/* STM32F1 : there are no shadow registers */
|
/* STM32F1 : there are no shadow registers */
|
||||||
/* STM32F2 : shadow registers can not be bypassed */
|
/* STM32F2 : shadow registers can not be bypassed */
|
||||||
if (HAL_RTCEx_EnableBypassShadow(&RtcHandle) != HAL_OK) {
|
if (HAL_RTCEx_EnableBypassShadow(&RtcHandle) != HAL_OK) {
|
||||||
error("EnableBypassShadow error");
|
error("EnableBypassShadow error\n");
|
||||||
}
|
}
|
||||||
#endif /* TARGET_STM32F1 || TARGET_STM32F2 */
|
#endif /* TARGET_STM32F1 || TARGET_STM32F2 */
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue